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2012-10-20drm/i915: Don't program DSPCLK_GATE_D twice on IVB and VLVDamien Lespiau1-6/+0
2012-10-20drm/i915: Program DSPCLK_GATE_D only once on IronlakeDamien Lespiau1-15/+6
2012-10-19drm/i915: Consolidate ILK_DSPCLK_GATE and PCH_DSPCLK_GATEDamien Lespiau2-41/+33
2012-10-19drm/i915: unconditionally use mt forcewake on hsw/ivbDaniel Vetter1-27/+4
2012-10-18drm/i915: set the correct function pointers for Haswell DPPaulo Zanoni1-6/+26
2012-10-18drm/i915: implement Haswell DP link train sequencePaulo Zanoni3-8/+81
2012-10-18drm/i915: fix Haswell DP M/N registersPaulo Zanoni2-2/+8
2012-10-18drm/i915: add DP support to intel_ddi_disable_portPaulo Zanoni1-1/+10
2012-10-18drm/i915: add DP support to intel_ddi_mode_setPaulo Zanoni3-28/+62
2012-10-18drm/i915: add DP support to intel_enable_ddiPaulo Zanoni1-9/+12
2012-10-18drm/i915: add DP support to intel_ddi_get_hw_statePaulo Zanoni1-4/+4
2012-10-18drm/i915: add DP support to intel_ddi_get_encoder_portPaulo Zanoni1-3/+9
2012-10-18drm/i915: fix DP AUX register definitions on HaswellPaulo Zanoni1-0/+23
2012-10-18drm/i915: Clear FORCEWAKE when taking over from BIOSChris Wilson3-0/+35
2012-10-18drm/i915: don't save/restor ADPA for kmsDaniel Vetter1-13/+12
2012-10-18drm/i915/crt: explicitly set up HOTPLUG_BITS on resumeDaniel Vetter3-14/+15
2012-10-18drm/i915/crt: don't set HOTPLUG bits on !PCHDaniel Vetter1-1/+5
2012-10-18drm/i915: don't save/restore HWS_PGA reg for kmsDaniel Vetter1-2/+4
2012-10-18drm/i915: don't save/restore irq regs for kmsDaniel Vetter1-26/+30
2012-10-18drm/i915: don't save/restore DP regs for kmsDaniel Vetter1-31/+37
2012-10-18drm/i915: use TU_SIZE macro at intel_dp_set_m_nPaulo Zanoni1-5/+2
2012-10-18drm/i915: add basic Haswell DP link train bitsPaulo Zanoni2-6/+102
2012-10-18drm/i915: add DP support to intel_ddi_pll_mode_setPaulo Zanoni1-1/+24
2012-10-18drm/i915: add intel_ddi_set_pipe_settingsPaulo Zanoni4-1/+48
2012-10-17drm/i915: add DP support to intel_ddi_enable_pipe_funcPaulo Zanoni3-9/+35
2012-10-17drm/i915: Document the multi-threaded FORCEWAKE bitsChris Wilson2-5/+7
2012-10-17drm/i915: Allow DRM_ROOT_ONLY|DRM_MASTER to submit privileged batchbuffersChris Wilson7-19/+84
2012-10-17drm/i915: move hpd handling to (ibx|cpt)_irq_handlerDaniel Vetter1-10/+6
2012-10-16drm/i915: Add rc6vids to debugfsBen Widawsky1-1/+8
2012-10-16drm/i915: Workaround to bump rc6 voltage to 450Ben Widawsky2-1/+19
2012-10-16drm/i915: Extract PCU communicationBen Widawsky3-44/+68
2012-10-12drm/i915: Fix the SCC/SSC typo in the SPLL bits definitionDamien Lespiau2-4/+4
2012-10-11drm/i915: pipe and planes should be disabled on haswell_crtc_mode_setPaulo Zanoni1-2/+5
2012-10-11drm/i915: disable DDI_BUF_CTL at the correct timePaulo Zanoni1-10/+23
2012-10-11drm/i915: don't implement WaDisableEarlyCull for HaswellPaulo Zanoni1-4/+0
2012-10-10drm/i915: don't rely on previous values set on DDI_BUF_CTLPaulo Zanoni1-5/+1
2012-10-10drm/i915: completely rewrite the Haswell PLL handling codePaulo Zanoni6-54/+238
2012-10-10drm/i915: add haswell_set_pipeconfPaulo Zanoni2-1/+27
2012-10-10drm/i915: add proper CPU/PCH checks to crtc_mode_set functionsPaulo Zanoni1-97/+115
2012-10-10drm/i915: add haswell_crtc_mode_setPaulo Zanoni1-1/+186
2012-10-10drm/i915: enable and disable PIPE_CLK_SEL at the right timePaulo Zanoni3-4/+41
2012-10-10drm/i915: enable and disable DDI_FUNC_CTL at the right timePaulo Zanoni4-19/+74
2012-10-10drm/i915: rewrite the LCPLL codePaulo Zanoni4-6/+45
2012-10-08drm/i915: Align the retire_requests worker to the nearest secondChris Wilson1-3/+6
2012-10-08drm/i915: Align the hangcheck wakeup to the nearest secondChris Wilson3-5/+4
2012-10-08drm/i915: Remove the WaDisableBackToBackFlipFix w/a for HaswellDamien Lespiau1-4/+0
2012-10-08drm/i915: Document that we are implementing WaDisableBackToBackFlipFixDamien Lespiau1-0/+2
2012-10-08drm/i915: remove duplicated include from intel_modes.cWei Yongjun1-1/+0
2012-10-08drm/i915: Remove the disabling of VHR unit clock gating for HSWDamien Lespiau1-5/+0
2012-10-04drm/i915: implement WaDisableEarlyCull for VLV and IVBJesse Barnes2-0/+13