| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2013-07-05 | drm/nvd7/gr: initial support | Maarten Lankhorst | 22 | -20/+1930 |
| 2013-07-05 | drm/nvc0-/gr: generate cs register lists from grctx data | Ben Skeggs | 11 | -2073/+1152 |
| 2013-07-05 | drm/nvc0-/gr: tpc regs a subset of gpc, add separate list for gpc/unk regs | Ben Skeggs | 8 | -34/+52 |
| 2013-07-05 | drm/nve0-/gr: some new gpc registers can have multiple copies | Ben Skeggs | 4 | -180/+227 |
| 2013-07-05 | drm/nvc0-/gr: pull out a group of separately context-switched gpc regs | Ben Skeggs | 6 | -96/+68 |
| 2013-07-05 | drm/nvc0-/gr: make register lists from initvals functions | Ben Skeggs | 21 | -8423/+6124 |
| 2013-07-01 | drm/nvd0-/disp: handle case where display engine is missing/disabled | Maarten Lankhorst | 6 | -7/+17 |
| 2013-07-01 | drm/gr/nvc0-: merge nvc0/nve0 ucode, and use cpp instead of m4 | Ben Skeggs | 14 | -2587/+1270 |
| 2013-07-01 | drm/nouveau/bsp/nv84: initial vp2 engine implementation | Ilia Mirkin | 3 | -14/+16 |
| 2013-07-01 | drm/nouveau/vp/nv84: initial vp2 engine implementation | Ilia Mirkin | 4 | -14/+17 |
| 2013-07-01 | drm/nouveau/core: xtensa engine base class implementation | Ilia Mirkin | 3 | -0/+209 |
| 2013-07-01 | drm/nouveau/vdec: fork vp3 implementations from vp2 | Ilia Mirkin | 6 | -14/+204 |
| 2013-07-01 | drm/nouveau/core: move falcon class to engine/ | Ben Skeggs | 11 | -24/+21 |
| 2013-07-01 | drm/nouveau/kms: don't fail if there's no dcb table entries | Ben Skeggs | 2 | -7/+9 |
| 2013-07-01 | drm/nouveau: remove limit on gart | Maarten Lankhorst | 1 | -5/+0 |
| 2013-07-01 | drm/nouveau/vm: perform a bar flush when flushing vm | Maarten Lankhorst | 2 | -0/+8 |
| 2013-07-01 | drm/nvc0/gr: cleanup register lists, and add nvce/nvcf to switches | Ben Skeggs | 6 | -600/+344 |
| 2013-07-01 | drm/nvc8/gr: update initial register/context values | Ben Skeggs | 6 | -10/+74 |
| 2013-07-01 | drm/nvc4/gr: update initial register/context values | Ben Skeggs | 6 | -9/+62 |
| 2013-07-01 | drm/nvc1/gr: update initial register/context values | Ben Skeggs | 6 | -35/+80 |
| 2013-07-01 | drm/nvc3/gr: update initial register/context values | Ben Skeggs | 6 | -12/+112 |
| 2013-07-01 | drm/nvc0/gr: update initial register/context values | Ben Skeggs | 6 | -544/+1042 |
| 2013-07-01 | drm/nvd9/gr: update initial register/context values | Ben Skeggs | 6 | -74/+482 |
| 2013-07-01 | drm/nve4/gr: update initial register/context values | Ben Skeggs | 4 | -157/+31 |
| 2013-07-01 | drm/nvc0-/gr: bump maximum gpc/tpc limits | Ben Skeggs | 1 | -2/+4 |
| 2013-07-01 | drm/nvf0/gr: initial register/context setup | Ben Skeggs | 6 | -482/+1057 |
| 2013-07-01 | drm/nve7/gr: update initial register/context values | Ben Skeggs | 4 | -3/+12 |
| 2013-07-01 | drm/nve6/gr: update initial register/context values | Ben Skeggs | 4 | -113/+383 |
| 2013-07-01 | drm/nouveau: delay busy bo vma removal until fence signals | Ben Skeggs | 4 | -15/+108 |
| 2013-07-01 | drm/nouveau/vm: make each vma take a reference on its parent vm | Ben Skeggs | 1 | -1/+4 |
| 2013-07-01 | drm/nouveau/core: remove nouveau_mm.mutex, no more users | Ben Skeggs | 3 | -5/+2 |
| 2013-07-01 | drm/nouveau/vm: take subdev mutex, not the mm, protects against race with vm/... | Ben Skeggs | 1 | -16/+17 |
| 2013-07-01 | drm/nvc0/vm: handle bar tlb flushes internally | Ben Skeggs | 3 | -34/+28 |
| 2013-07-01 | drm/nv50-/vm: take mutex rather than irqsave spinlock | Ben Skeggs | 2 | -10/+4 |
| 2013-07-01 | drm/nv50/vm: remove explicit vm knowledge from engines | Ben Skeggs | 9 | -66/+31 |
| 2013-07-01 | drm/nv50/vm: handle bar tlb flushes internally | Ben Skeggs | 3 | -5/+13 |
| 2013-07-01 | drm/nvc0/gr: port mp trap handling from calim's kepler code | Ben Skeggs | 1 | -6/+38 |
| 2013-07-01 | drm/nve0/gr: attempt to resume after sm traps | Ben Skeggs | 1 | -16/+6 |
| 2013-07-01 | drm/nve0/gr: s/tp/tpc/ | Ben Skeggs | 1 | -26/+27 |
| 2013-07-01 | drm/nve0/fifo: create our playlists up-front, at startup | Ben Skeggs | 1 | -14/+14 |
| 2013-07-01 | drm/nva3/clk: minor improvements to fractional N calculation | Ben Skeggs | 1 | -3/+11 |
| 2013-07-01 | drm/nouveau/fb: initialise vram controller as pfb sub-object | Ben Skeggs | 45 | -733/+1313 |
| 2013-07-01 | drm/nouveau/clk: change init ordering, no longer needed by devinit | Ben Skeggs | 1 | -2/+2 |
| 2013-07-01 | drm/nouveau/devinit: move simple pll setting routines to devinit | Ben Skeggs | 24 | -487/+628 |
| 2013-07-01 | drm/nouveau: pass generic subdev to calculation routines | Ben Skeggs | 7 | -18/+17 |
| 2013-07-01 | drm/nve0/ce: stub interrupt handler | Ben Skeggs | 2 | -0/+17 |
| 2013-07-01 | drm/nve0/ce: link ce2 to its engine, rather than from graphics | Ben Skeggs | 2 | -2/+2 |
| 2013-07-01 | drm/nve0/fifo: copy engine context stored in ramfc, not externally | Ben Skeggs | 1 | -8/+14 |
| 2013-07-01 | drm/nve0/ce: create engine object for ce2 | Ben Skeggs | 4 | -0/+36 |
| 2013-07-01 | drm/nouveau: pull in latest ucode builds from external tree | Ben Skeggs | 5 | -48/+51 |
