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2015-08-25drm/amdgpu: remove some more unused entity members v2Christian König2-11/+3
None of them are used any more. v2: fix type in error message Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-08-25drm/amdgpu: fix user fences when scheduler is enabledChristian König1-0/+2
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-08-25drm/amdgpu: fix fence wait in sync_fence, instead should be in sync_ringsChristian König3-3/+61
Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian K?nig <christian.koenig@amd.com>
2015-08-25drm/amdgpu: rework scheduler submission handling.Christian König2-37/+11
Remove active_hw_rq and it's protecting queue_lock, they are unused. User 32bit atomic for hw_rq_count, 64bits for counting to three is a bit overkill. Cleanup the function name and remove incorrect comments. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-25drm/amdgpu: remove v_seq handling from the scheduler v2Christian König9-57/+21
Simply not used any more. Only keep 32bit atomic for fence sequence numbering. v2: trivial rebase Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v1) Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> (v1) Reviewed-by: Chunming Zhou <david1.zhou@amd.com> (v1)
2015-08-25drm/amdgpu: improve sa_bo->fence by kernel fenceChunming Zhou8-34/+58
Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian K?nig <christian.koenig@amd.com>
2015-08-25drm/amdgpu: modify amdgpu_fence_wait_any() to amdgpu_fence_wait_multiple()Junwei Zhang3-22/+69
Rename the function and update the related code with this modified function. Add the new parameter of bool wait_all. If wait_all is true, it will return when all fences are signaled or timeout. If wait_all is false, it will return when any fence is signaled or timeout. Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-25drm/amdgpu: fix IH ring allocation for bus addresses (v2)Alex Deucher1-13/+7
Use pci_alloc_consistent rather than kzalloc since we need 256 byte aligned memory for the ring buffer. v2: fix copy paste typo in free function noticed by Jammy. bug: https://bugs.freedesktop.org/show_bug.cgi?id=91749 Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2015-08-22drm/amdgpu: Don't link train DisplayPort on HPD until we get the dpcdAlex Deucher1-0/+5
This is a port of: DRM - radeon: Don't link train DisplayPort on HPD until we get the dpcd to amdgpu. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2015-08-22DRM - radeon: Don't link train DisplayPort on HPD until we get the dpcdStephen Chandler Paul1-0/+5
Most of the time this isn't an issue since hotplugging an adaptor will trigger a crtc mode change which in turn, causes the driver to probe every DisplayPort for a dpcd. However, in cases where hotplugging doesn't cause a mode change (specifically when one unplugs a monitor from a DisplayPort connector, then plugs that same monitor back in seconds later on the same port without any other monitors connected), we never probe for the dpcd before starting the initial link training. What happens from there looks like this: - GPU has only one monitor connected. It's connected via DisplayPort, and does not go through an adaptor of any sort. - User unplugs DisplayPort connector from GPU. - Change in HPD is detected by the driver, we probe every DisplayPort for a possible connection. - Probe the port the user originally had the monitor connected on for it's dpcd. This fails, and we clear the first (and only the first) byte of the dpcd to indicate we no longer have a dpcd for this port. - User plugs the previously disconnected monitor back into the same DisplayPort. - radeon_connector_hotplug() is called before everyone else, and tries to handle the link training. Since only the first byte of the dpcd is zeroed, the driver is able to complete link training but does so against the wrong dpcd, causing it to initialize the link with the wrong settings. - Display stays blank (usually), dpcd is probed after the initial link training, and the driver prints no obvious messages to the log. In theory, since only one byte of the dpcd is chopped off (specifically, the byte that contains the revision information for DisplayPort), it's not entirely impossible that this bug may not show on certain monitors. For instance, the only reason this bug was visible on my ASUS PB238 monitor was due to the fact that this monitor using the enhanced framing symbol sequence, the flag for which is ignored if the radeon driver thinks that the DisplayPort version is below 1.1. Signed-off-by: Stephen Chandler Paul <cpaul@redhat.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2015-08-21drm/amdgpu: fix CS error handling v2Christian König1-41/+26
Stop double freeing the the BO list by pulling the content of amdgpu_cs_parser_prepare_job() into the IOCTL function again. v2: better commit message Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> (v1) Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-21drm/amdgpu: fix zeroing all IB fields manually v2Christian König7-18/+6
The problem now is that we don't necessarily call amdgpu_ib_get() in some error paths and so work with uninitialized data. Better require that the memory is already zeroed. v2: better commit message Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> (v1) Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-21drm/amdgpu: free the job immediately after dispatching itChristian König1-4/+3
Fixes a whole bunch of lockdep warnings. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-08-21drm/amdgpu: use a spinlock instead of a mutex for the rqChristian König2-33/+18
More appropriate and fixes some nasty lockdep warnings. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-08-21drm/amdgpu: don't need to use bo_list_clone any moreChunming Zhou1-21/+4
Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian K?nig <christian.koenig@amd.com>
2015-08-21drm/amdgpu: some clean up for cs_ioctlChunming Zhou2-36/+1
Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian K?nig <christian.koenig@amd.com>
2015-08-21drm/amdgpu: prepare job should be common code pathChunming Zhou1-6/+4
Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian K?nig <christian.koenig@amd.com>
2015-08-21drm/amdgpu: abstract amdgpu_job for schedulerChunming Zhou9-136/+130
Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian K?nig <christian.koenig@amd.com>
2015-08-20drm/amdgpu: bump the DRM version for new allowed mem-mapped registersMarek Olšák1-1/+2
Used by mesa, etc. for profiling. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-20Merge branch 'drm-next-fsl-dcu' of ↵Dave Airlie17-0/+1449
https://github.com/Jianwei-Wang/linux-drm-fsl-dcu into drm-next Merge Freescale DCU FRM driver. * 'drm-next-fsl-dcu' of https://github.com/Jianwei-Wang/linux-drm-fsl-dcu: MAINTAINERS: Add Freescale DCU DRM driver maintainer devicetree: Add NEC to the vendor-prefix list drm/layerscape: Add Freescale DCU DRM driver
2015-08-20MAINTAINERS: Add Freescale DCU DRM driver maintainerJianwei Wang1-0/+9
Add Alison and myself as maintainers of the Freescale DCU DRM driver. Signed-off-by: Alison Wang <b18965@freescale.com> Signed-off-by: Xiubo Li <lixiubo@cmss.chinamobile.com> Signed-off-by: Jianwei Wang <jianwei.wang.chn@gmail.com>
2015-08-20devicetree: Add NEC to the vendor-prefix listJianwei Wang1-0/+1
NEC represent NEC LCD Technologies, Ltd. Signed-off-by: Alison Wang <b18965@freescale.com> Signed-off-by: Xiubo Li <lixiubo@cmss.chinamobile.com> Signed-off-by: Jianwei Wang <jianwei.wang.chn@gmail.com>
2015-08-20drm/layerscape: Add Freescale DCU DRM driverJianwei Wang15-0/+1439
This patch add support for Two Dimensional Animation and Compositing Engine (2D-ACE) on the Freescale SoCs. 2D-ACE is a Freescale display controller. 2D-ACE describes the functionality of the module extremely well its name is a value that cannot be used as a token in programming languages. Instead the valid token "DCU" is used to tag the register names and function names. The Display Controller Unit (DCU) module is a system master that fetches graphics stored in internal or external memory and displays them on a TFT LCD panel. A wide range of panel sizes is supported and the timing of the interface signals is highly configurable. Graphics are read directly from memory and then blended in real-time, which allows for dynamic content creation with minimal CPU intervention. The features: (1) Full RGB888 output to TFT LCD panel. (2) Blending of each pixel using up to 4 source layers dependent on size of panel. (3) Each graphic layer can be placed with one pixel resolution in either axis. (4) Each graphic layer support RGB565 and RGB888 direct colors without alpha channel and BGRA8888 BGRA4444 ARGB1555 direct colors with an alpha channel and YUV422 format. (5) Each graphic layer support alpha blending with 8-bit resolution. This is a simplified version, only one primary plane, one framebuffer, one crtc, one connector and one encoder for TFT LCD panel. Signed-off-by: Alison Wang <b18965@freescale.com> Signed-off-by: Xiubo Li <lixiubo@cmss.chinamobile.com> Signed-off-by: Jianwei Wang <jianwei.wang.chn@gmail.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-08-20Merge branch 'drm-atmel-hlcdc-devel' of ↵Dave Airlie2-1/+219
https://github.com/bbrezillon/linux-at91 into drm-next The following PR add support for 3 more atmel SoCs and for some missing features (new input formats and PRIME support). * 'drm-atmel-hlcdc-devel' of https://github.com/bbrezillon/linux-at91: drm: atmel-hlcdc: add support for sama5d4 SoCs drm: atmel-hlcdc: add support for at91sam9n12 SoC drm: atmel-hlcdc: add support for at91sam9x5 SoCs drm: atmel-hlcdc: add RGB565 and RGB444 output support drm: atmel-hlcdc: add the missing DRM_ATOMIC flag drm: atmel-hlcdc: add PRIME support
2015-08-20Merge branch 'drm-next-4.3' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie74-1164/+14143
into drm-next amdgpu and radeon changes for 4.3. Highlights: - Fiji support for amdgpu. - CGS support for amdgpu. This is a new driver internal cross-component API. - Initial GPU scheduler for amdgpu. Still disabled by default. - Lots of bug fixes and optimizations * 'drm-next-4.3' of git://people.freedesktop.org/~agd5f/linux: (130 commits) drm/amdgpu: wait on page directory changes. v2 drm/amdgpu: Select BACKLIGHT_LCD_SUPPORT drm/radeon: Select BACKLIGHT_LCD_SUPPORT drm/amdgpu: cleanup sheduler rq handling v2 drm/amdgpu: move prepare work out of scheduler to cs_ioctl drm/amdgpu: fix unnecessary wake up drm/amdgpu: fix duplicated mapping invoke bug drm/amdgpu: drop bo_list_clone when no scheduler drm/amdgpu: disable GPU reset by default drm/amdgpu: fix type mismatch error drm/amdgpu: add reference for **fence drm/amdgpu: fix waiting for all fences before flipping drm/amdgpu: fix UVD return code checking drm/amdgpu: remove scheduler fence list v2 drm/amdgpu: remove amd_sched_wait_emit v2 drm/amdgpu: remove unecessary scheduler fence callbacks drm/amdgpu: fix scheduler fence implementation drm/amdgpu: don't grab dev->struct_mutex in pm functions drm/amdgpu: Don't take dev->struct_mutex in bo_force_delete drm/radeon: Don't take dev->struct_mutex in pm functions ...
2015-08-18drm: atmel-hlcdc: add support for sama5d4 SoCsBoris Brezillon1-0/+86
Describe capabilities of the HLCDC IP found on sama5d4 SoCs and add a new entry to the atmel_hlcdc_of_match table. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2015-08-18drm: atmel-hlcdc: add support for at91sam9n12 SoCBoris Brezillon1-0/+29
Describe capabilities of the HLCDC IP found on at91sam9n12 SoC and add a new entry to the atmel_hlcdc_of_match table. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2015-08-18drm: atmel-hlcdc: add support for at91sam9x5 SoCsBoris Brezillon1-0/+88
Describe capabilities of the HLCDC IP found on at91sam9x5 SoCs and add a new entry to the atmel_hlcdc_of_match table. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2015-08-18drm: atmel-hlcdc: add RGB565 and RGB444 output supportBoris Brezillon1-0/+4
The HLCDC IP supports RGB565 and RGB444 output formats. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2015-08-18drm: atmel-hlcdc: add the missing DRM_ATOMIC flagBoris Brezillon1-1/+2
The atmel-hlcdc driver already supports atomic operations, add the missing DRM_ATOMIC flag to expose the atomic features to userspace. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2015-08-18drm: atmel-hlcdc: add PRIME supportBoris Brezillon1-1/+11
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2015-08-17drm/amdgpu: wait on page directory changes. v2Bas Nieuwenhuizen3-0/+11
Pagetables can be moved and therefore the page directory update can be necessary for the current cs even if none of the the bo's are moved. In that scenario there is no fence between the sdma0 and gfx ring, so we add one. v2 (chk): rebased Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17drm/amdgpu: Select BACKLIGHT_LCD_SUPPORTThierry Reding1-0/+1
Explicitly select BACKLIGHT_LCD_SUPPORT to satisfy the direct dependency of BACKLIGHT_CLASS_DEVICE. Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17drm/radeon: Select BACKLIGHT_LCD_SUPPORTThierry Reding1-0/+1
Explicitly select BACKLIGHT_LCD_SUPPORT to satisfy the direct dependency of BACKLIGHT_CLASS_DEVICE. Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17drm/amdgpu: cleanup sheduler rq handling v2Christian König3-76/+54
Rework run queue implementation, especially remove the odd list handling. v2: cleanup the code only, no algorithem change. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-08-17drm/amdgpu: move prepare work out of scheduler to cs_ioctlChunming Zhou1-13/+8
Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian K?nig <christian.koenig@amd.com>
2015-08-17drm/amdgpu: fix unnecessary wake upChunming Zhou2-4/+7
decrease CPU extra overhead. Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Christian K?nig <christian.koenig@amd.com>
2015-08-17drm/amdgpu: fix duplicated mapping invoke bugmonk.liu1-0/+1
fix the bug that there is duplicated bo_update_mapping issued Signed-off-by: monk.liu <monk.liu@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17drm/amdgpu: drop bo_list_clone when no schedulermonk.liu1-9/+13
bo_list_clone() will take a lot of time when bo_list hold too much elements, like above 7000 Signed-off-by: Monk.Liu <monk.liu@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Jammy Zhou <jammy.zhou@amd.com>
2015-08-17drm/amdgpu: disable GPU reset by defaultAlex Deucher1-2/+2
It's not validated yet and causes more harm than good. Avoids spurious resets. Reviewed-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17drm/amdgpu: fix type mismatch errormonk.liu1-2/+3
remaining timeout returned by amdgpu_fence_wait_any can be larger than max int value, thus the truncated 32 bit value in r ends up being negative while its original long value is positive. Signed-off-by: monk.liu <monk.liu@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <jammy.zhou@amd.com>
2015-08-17drm/amdgpu: add reference for **fenceChunming Zhou11-3/+15
fix fence is released when pass to **fence sometimes. add reference for it. Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian K?nig <christian.koenig@amd.com>
2015-08-17drm/amdgpu: fix waiting for all fences before flippingChristian König2-29/+56
Otherwise we might see corruption. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17drm/amdgpu: fix UVD return code checkingChristian König1-5/+5
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Tested-and-Reviewed-by: Leo Liu <leo.liu@amd.com>
2015-08-17drm/amdgpu: remove scheduler fence list v2Christian König3-21/+1
Unused and missing proper locking. v2: add locking comment to commit message. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> (v1)
2015-08-17drm/amdgpu: remove amd_sched_wait_emit v2Christian König3-73/+0
Not used any more. v2: remove amd_sched_emit as well. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-08-17drm/amdgpu: remove unecessary scheduler fence callbacksChristian König1-24/+7
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-08-17drm/amdgpu: fix scheduler fence implementationChristian König1-1/+1
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-08-17drm/amdgpu: don't grab dev->struct_mutex in pm functionsDaniel Vetter1-2/+0
Similar to radeon, except that amdgpu doesn't even use struct_mutex to protect anything like the shared z buffer (sane gpu architecture, yay!). And the code already grabs the globa adev->ring_lock, so this code can't race with itself. Which makes struct_mutex completely redundnant. Remove it. Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17drm/amdgpu: Don't take dev->struct_mutex in bo_force_deleteDaniel Vetter1-3/+1
It really doesn't protect anything which doesn't have other locks already. Also this is run from driver unload code so not much need for locks anyway. Same changes as for radeon really. Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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