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-rw-r--r--sound/pci/azt3328.c7
-rw-r--r--sound/pci/cmipci.c2
-rw-r--r--sound/pci/emu10k1/emu10k1_synth.c35
-rw-r--r--sound/pci/hda/hda_codec.c87
-rw-r--r--sound/pci/hda/hda_codec.h22
-rw-r--r--sound/pci/hda/hda_controller.c136
-rw-r--r--sound/pci/hda/hda_controller.h397
-rw-r--r--sound/pci/hda/hda_i915.c2
-rw-r--r--sound/pci/hda/hda_intel.c23
-rw-r--r--sound/pci/hda/hda_intel.h2
-rw-r--r--sound/pci/hda/hda_local.h17
-rw-r--r--sound/pci/hda/hda_priv.h406
-rw-r--r--sound/pci/hda/hda_tegra.c9
-rw-r--r--sound/pci/rme9652/hdspm.c141
14 files changed, 577 insertions, 709 deletions
diff --git a/sound/pci/azt3328.c b/sound/pci/azt3328.c
index a40a2b4c8fd7..33b2a0af1b59 100644
--- a/sound/pci/azt3328.c
+++ b/sound/pci/azt3328.c
@@ -1385,8 +1385,8 @@ snd_azf3328_ctrl_codec_activity(struct snd_azf3328 *chip,
.running)
&& (!chip->codecs[peer_codecs[codec_type].other2]
.running));
- }
- if (call_function)
+ }
+ if (call_function)
snd_azf3328_ctrl_enable_codecs(chip, enable);
/* ...and adjust clock, too
@@ -2126,7 +2126,8 @@ static struct snd_pcm_ops snd_azf3328_i2s_out_ops = {
static int
snd_azf3328_pcm(struct snd_azf3328 *chip)
{
-enum { AZF_PCMDEV_STD, AZF_PCMDEV_I2S_OUT, NUM_AZF_PCMDEVS }; /* pcm devices */
+ /* pcm devices */
+ enum { AZF_PCMDEV_STD, AZF_PCMDEV_I2S_OUT, NUM_AZF_PCMDEVS };
struct snd_pcm *pcm;
int err;
diff --git a/sound/pci/cmipci.c b/sound/pci/cmipci.c
index 1d0f2cad2f5a..6cf464d9043d 100644
--- a/sound/pci/cmipci.c
+++ b/sound/pci/cmipci.c
@@ -2062,7 +2062,7 @@ static int snd_cmipci_get_volume(struct snd_kcontrol *kcontrol,
val = (snd_cmipci_mixer_read(cm, reg.right_reg) >> reg.right_shift) & reg.mask;
if (reg.invert)
val = reg.mask - val;
- ucontrol->value.integer.value[1] = val;
+ ucontrol->value.integer.value[1] = val;
}
spin_unlock_irq(&cm->reg_lock);
return 0;
diff --git a/sound/pci/emu10k1/emu10k1_synth.c b/sound/pci/emu10k1/emu10k1_synth.c
index 4c41c903a840..5457d5613f6b 100644
--- a/sound/pci/emu10k1/emu10k1_synth.c
+++ b/sound/pci/emu10k1/emu10k1_synth.c
@@ -29,8 +29,9 @@ MODULE_LICENSE("GPL");
/*
* create a new hardware dependent device for Emu10k1
*/
-static int snd_emu10k1_synth_new_device(struct snd_seq_device *dev)
+static int snd_emu10k1_synth_probe(struct device *_dev)
{
+ struct snd_seq_device *dev = to_seq_dev(_dev);
struct snd_emux *emux;
struct snd_emu10k1 *hw;
struct snd_emu10k1_synth_arg *arg;
@@ -79,8 +80,9 @@ static int snd_emu10k1_synth_new_device(struct snd_seq_device *dev)
return 0;
}
-static int snd_emu10k1_synth_delete_device(struct snd_seq_device *dev)
+static int snd_emu10k1_synth_remove(struct device *_dev)
{
+ struct snd_seq_device *dev = to_seq_dev(_dev);
struct snd_emux *emux;
struct snd_emu10k1 *hw;
unsigned long flags;
@@ -104,21 +106,14 @@ static int snd_emu10k1_synth_delete_device(struct snd_seq_device *dev)
* INIT part
*/
-static int __init alsa_emu10k1_synth_init(void)
-{
-
- static struct snd_seq_dev_ops ops = {
- snd_emu10k1_synth_new_device,
- snd_emu10k1_synth_delete_device,
- };
- return snd_seq_device_register_driver(SNDRV_SEQ_DEV_ID_EMU10K1_SYNTH, &ops,
- sizeof(struct snd_emu10k1_synth_arg));
-}
-
-static void __exit alsa_emu10k1_synth_exit(void)
-{
- snd_seq_device_unregister_driver(SNDRV_SEQ_DEV_ID_EMU10K1_SYNTH);
-}
-
-module_init(alsa_emu10k1_synth_init)
-module_exit(alsa_emu10k1_synth_exit)
+static struct snd_seq_driver emu10k1_synth_driver = {
+ .driver = {
+ .name = KBUILD_MODNAME,
+ .probe = snd_emu10k1_synth_probe,
+ .remove = snd_emu10k1_synth_remove,
+ },
+ .id = SNDRV_SEQ_DEV_ID_EMU10K1_SYNTH,
+ .argsize = sizeof(struct snd_emu10k1_synth_arg),
+};
+
+module_snd_seq_driver(emu10k1_synth_driver);
diff --git a/sound/pci/hda/hda_codec.c b/sound/pci/hda/hda_codec.c
index 2fe86d2e1b09..5e755eb6f19a 100644
--- a/sound/pci/hda/hda_codec.c
+++ b/sound/pci/hda/hda_codec.c
@@ -762,10 +762,7 @@ int snd_hda_queue_unsol_event(struct hda_bus *bus, u32 res, u32 res_ex)
return 0;
trace_hda_unsol_event(bus, res, res_ex);
- unsol = bus->unsol;
- if (!unsol)
- return 0;
-
+ unsol = &bus->unsol;
wp = (unsol->wp + 1) % HDA_UNSOL_QUEUE_SIZE;
unsol->wp = wp;
@@ -784,9 +781,8 @@ EXPORT_SYMBOL_GPL(snd_hda_queue_unsol_event);
*/
static void process_unsol_events(struct work_struct *work)
{
- struct hda_bus_unsolicited *unsol =
- container_of(work, struct hda_bus_unsolicited, work);
- struct hda_bus *bus = unsol->bus;
+ struct hda_bus *bus = container_of(work, struct hda_bus, unsol.work);
+ struct hda_bus_unsolicited *unsol = &bus->unsol;
struct hda_codec *codec;
unsigned int rp, caddr, res;
@@ -805,27 +801,6 @@ static void process_unsol_events(struct work_struct *work)
}
/*
- * initialize unsolicited queue
- */
-static int init_unsol_queue(struct hda_bus *bus)
-{
- struct hda_bus_unsolicited *unsol;
-
- if (bus->unsol) /* already initialized */
- return 0;
-
- unsol = kzalloc(sizeof(*unsol), GFP_KERNEL);
- if (!unsol) {
- dev_err(bus->card->dev, "can't allocate unsolicited queue\n");
- return -ENOMEM;
- }
- INIT_WORK(&unsol->work, process_unsol_events);
- unsol->bus = bus;
- bus->unsol = unsol;
- return 0;
-}
-
-/*
* destructor
*/
static void snd_hda_bus_free(struct hda_bus *bus)
@@ -836,7 +811,6 @@ static void snd_hda_bus_free(struct hda_bus *bus)
WARN_ON(!list_empty(&bus->codec_list));
if (bus->workq)
flush_workqueue(bus->workq);
- kfree(bus->unsol);
if (bus->ops.private_free)
bus->ops.private_free(bus);
if (bus->workq)
@@ -861,14 +835,12 @@ static int snd_hda_bus_dev_disconnect(struct snd_device *device)
/**
* snd_hda_bus_new - create a HDA bus
* @card: the card entry
- * @temp: the template for hda_bus information
* @busp: the pointer to store the created bus instance
*
* Returns 0 if successful, or a negative error code.
*/
int snd_hda_bus_new(struct snd_card *card,
- const struct hda_bus_template *temp,
- struct hda_bus **busp)
+ struct hda_bus **busp)
{
struct hda_bus *bus;
int err;
@@ -877,11 +849,6 @@ int snd_hda_bus_new(struct snd_card *card,
.dev_free = snd_hda_bus_dev_free,
};
- if (snd_BUG_ON(!temp))
- return -EINVAL;
- if (snd_BUG_ON(!temp->ops.command || !temp->ops.get_response))
- return -EINVAL;
-
if (busp)
*busp = NULL;
@@ -892,15 +859,10 @@ int snd_hda_bus_new(struct snd_card *card,
}
bus->card = card;
- bus->private_data = temp->private_data;
- bus->pci = temp->pci;
- bus->modelname = temp->modelname;
- bus->power_save = temp->power_save;
- bus->ops = temp->ops;
-
mutex_init(&bus->cmd_mutex);
mutex_init(&bus->prepare_mutex);
INIT_LIST_HEAD(&bus->codec_list);
+ INIT_WORK(&bus->unsol.work, process_unsol_events);
snprintf(bus->workq_name, sizeof(bus->workq_name),
"hd-audio%d", card->number);
@@ -1702,12 +1664,6 @@ int snd_hda_codec_configure(struct hda_codec *codec)
return err;
}
- if (codec->patch_ops.unsol_event) {
- err = init_unsol_queue(codec->bus);
- if (err < 0)
- return err;
- }
-
/* audio codec should override the mixer name */
if (codec->afg || !*codec->bus->card->mixername)
snprintf(codec->bus->card->mixername,
@@ -2192,11 +2148,10 @@ EXPORT_SYMBOL_GPL(snd_hda_codec_amp_read);
static int codec_amp_update(struct hda_codec *codec, hda_nid_t nid, int ch,
int direction, int idx, int mask, int val,
- bool init_only)
+ bool init_only, bool cache_only)
{
struct hda_amp_info *info;
unsigned int caps;
- unsigned int cache_only;
if (snd_BUG_ON(mask & ~0xff))
mask &= 0xff;
@@ -2214,7 +2169,7 @@ static int codec_amp_update(struct hda_codec *codec, hda_nid_t nid, int ch,
return 0;
}
info->vol[ch] = val;
- cache_only = info->head.dirty = codec->cached_write;
+ info->head.dirty |= cache_only;
caps = info->amp_caps;
mutex_unlock(&codec->hash_mutex);
if (!cache_only)
@@ -2238,7 +2193,8 @@ static int codec_amp_update(struct hda_codec *codec, hda_nid_t nid, int ch,
int snd_hda_codec_amp_update(struct hda_codec *codec, hda_nid_t nid, int ch,
int direction, int idx, int mask, int val)
{
- return codec_amp_update(codec, nid, ch, direction, idx, mask, val, false);
+ return codec_amp_update(codec, nid, ch, direction, idx, mask, val,
+ false, codec->cached_write);
}
EXPORT_SYMBOL_GPL(snd_hda_codec_amp_update);
@@ -2285,7 +2241,8 @@ EXPORT_SYMBOL_GPL(snd_hda_codec_amp_stereo);
int snd_hda_codec_amp_init(struct hda_codec *codec, hda_nid_t nid, int ch,
int dir, int idx, int mask, int val)
{
- return codec_amp_update(codec, nid, ch, dir, idx, mask, val, true);
+ return codec_amp_update(codec, nid, ch, dir, idx, mask, val, true,
+ codec->cached_write);
}
EXPORT_SYMBOL_GPL(snd_hda_codec_amp_init);
@@ -2427,8 +2384,8 @@ update_amp_value(struct hda_codec *codec, hda_nid_t nid,
maxval = get_amp_max_value(codec, nid, dir, 0);
if (val > maxval)
val = maxval;
- return snd_hda_codec_amp_update(codec, nid, ch, dir, idx,
- HDA_AMP_VOLMASK, val);
+ return codec_amp_update(codec, nid, ch, dir, idx, HDA_AMP_VOLMASK, val,
+ false, !hda_codec_is_power_on(codec));
}
/**
@@ -2478,14 +2435,12 @@ int snd_hda_mixer_amp_volume_put(struct snd_kcontrol *kcontrol,
long *valp = ucontrol->value.integer.value;
int change = 0;
- snd_hda_power_up(codec);
if (chs & 1) {
change = update_amp_value(codec, nid, 0, dir, idx, ofs, *valp);
valp++;
}
if (chs & 2)
change |= update_amp_value(codec, nid, 1, dir, idx, ofs, *valp);
- snd_hda_power_down(codec);
return change;
}
EXPORT_SYMBOL_GPL(snd_hda_mixer_amp_volume_put);
@@ -3153,19 +3108,19 @@ int snd_hda_mixer_amp_switch_put(struct snd_kcontrol *kcontrol,
long *valp = ucontrol->value.integer.value;
int change = 0;
- snd_hda_power_up(codec);
if (chs & 1) {
- change = snd_hda_codec_amp_update(codec, nid, 0, dir, idx,
- HDA_AMP_MUTE,
- *valp ? 0 : HDA_AMP_MUTE);
+ change = codec_amp_update(codec, nid, 0, dir, idx,
+ HDA_AMP_MUTE,
+ *valp ? 0 : HDA_AMP_MUTE, false,
+ !hda_codec_is_power_on(codec));
valp++;
}
if (chs & 2)
- change |= snd_hda_codec_amp_update(codec, nid, 1, dir, idx,
- HDA_AMP_MUTE,
- *valp ? 0 : HDA_AMP_MUTE);
+ change |= codec_amp_update(codec, nid, 1, dir, idx,
+ HDA_AMP_MUTE,
+ *valp ? 0 : HDA_AMP_MUTE, false,
+ !hda_codec_is_power_on(codec));
hda_call_check_power_status(codec, nid);
- snd_hda_power_down(codec);
return change;
}
EXPORT_SYMBOL_GPL(snd_hda_mixer_amp_switch_put);
diff --git a/sound/pci/hda/hda_codec.h b/sound/pci/hda/hda_codec.h
index 9c8820f21f94..96421a3b32cd 100644
--- a/sound/pci/hda/hda_codec.h
+++ b/sound/pci/hda/hda_codec.h
@@ -66,7 +66,6 @@ struct hda_beep;
struct hda_codec;
struct hda_pcm;
struct hda_pcm_stream;
-struct hda_bus_unsolicited;
/* NID type */
typedef u16 hda_nid_t;
@@ -101,13 +100,14 @@ struct hda_bus_ops {
#endif
};
-/* template to pass to the bus constructor */
-struct hda_bus_template {
- void *private_data;
- struct pci_dev *pci;
- const char *modelname;
- int *power_save;
- struct hda_bus_ops ops;
+/* unsolicited event handler */
+#define HDA_UNSOL_QUEUE_SIZE 64
+struct hda_bus_unsolicited {
+ /* ring buffer */
+ u32 queue[HDA_UNSOL_QUEUE_SIZE * 2];
+ unsigned int rp, wp;
+ /* workqueue */
+ struct work_struct work;
};
/*
@@ -119,7 +119,6 @@ struct hda_bus_template {
struct hda_bus {
struct snd_card *card;
- /* copied from template */
void *private_data;
struct pci_dev *pci;
const char *modelname;
@@ -136,7 +135,7 @@ struct hda_bus {
struct mutex prepare_mutex;
/* unsolicited event queue */
- struct hda_bus_unsolicited *unsol;
+ struct hda_bus_unsolicited unsol;
char workq_name[16];
struct workqueue_struct *workq; /* common workqueue for codecs */
@@ -420,8 +419,7 @@ enum {
/*
* constructors
*/
-int snd_hda_bus_new(struct snd_card *card, const struct hda_bus_template *temp,
- struct hda_bus **busp);
+int snd_hda_bus_new(struct snd_card *card, struct hda_bus **busp);
int snd_hda_codec_new(struct hda_bus *bus, unsigned int codec_addr,
struct hda_codec **codecp);
int snd_hda_codec_configure(struct hda_codec *codec);
diff --git a/sound/pci/hda/hda_controller.c b/sound/pci/hda/hda_controller.c
index a2ce773bdc62..f63d2cb55a82 100644
--- a/sound/pci/hda/hda_controller.c
+++ b/sound/pci/hda/hda_controller.c
@@ -30,7 +30,6 @@
#include <linux/reboot.h>
#include <sound/core.h>
#include <sound/initval.h>
-#include "hda_priv.h"
#include "hda_controller.h"
#define CREATE_TRACE_POINTS
@@ -732,17 +731,32 @@ static snd_pcm_uframes_t azx_pcm_pointer(struct snd_pcm_substream *substream)
azx_get_position(chip, azx_dev));
}
-static int azx_get_wallclock_tstamp(struct snd_pcm_substream *substream,
- struct timespec *ts)
+static int azx_get_time_info(struct snd_pcm_substream *substream,
+ struct timespec *system_ts, struct timespec *audio_ts,
+ struct snd_pcm_audio_tstamp_config *audio_tstamp_config,
+ struct snd_pcm_audio_tstamp_report *audio_tstamp_report)
{
struct azx_dev *azx_dev = get_azx_dev(substream);
u64 nsec;
- nsec = timecounter_read(&azx_dev->azx_tc);
- nsec = div_u64(nsec, 3); /* can be optimized */
- nsec = azx_adjust_codec_delay(substream, nsec);
+ if ((substream->runtime->hw.info & SNDRV_PCM_INFO_HAS_LINK_ATIME) &&
+ (audio_tstamp_config->type_requested == SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK)) {
- *ts = ns_to_timespec(nsec);
+ snd_pcm_gettime(substream->runtime, system_ts);
+
+ nsec = timecounter_read(&azx_dev->azx_tc);
+ nsec = div_u64(nsec, 3); /* can be optimized */
+ if (audio_tstamp_config->report_delay)
+ nsec = azx_adjust_codec_delay(substream, nsec);
+
+ *audio_ts = ns_to_timespec(nsec);
+
+ audio_tstamp_report->actual_type = SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK;
+ audio_tstamp_report->accuracy_report = 1; /* rest of structure is valid */
+ audio_tstamp_report->accuracy = 42; /* 24 MHz WallClock == 42ns resolution */
+
+ } else
+ audio_tstamp_report->actual_type = SNDRV_PCM_AUDIO_TSTAMP_TYPE_DEFAULT;
return 0;
}
@@ -756,7 +770,8 @@ static struct snd_pcm_hardware azx_pcm_hw = {
/* SNDRV_PCM_INFO_RESUME |*/
SNDRV_PCM_INFO_PAUSE |
SNDRV_PCM_INFO_SYNC_START |
- SNDRV_PCM_INFO_HAS_WALL_CLOCK |
+ SNDRV_PCM_INFO_HAS_WALL_CLOCK | /* legacy */
+ SNDRV_PCM_INFO_HAS_LINK_ATIME |
SNDRV_PCM_INFO_NO_PERIOD_WAKEUP),
.formats = SNDRV_PCM_FMTBIT_S16_LE,
.rates = SNDRV_PCM_RATE_48000,
@@ -842,10 +857,12 @@ static int azx_pcm_open(struct snd_pcm_substream *substream)
return -EINVAL;
}
- /* disable WALLCLOCK timestamps for capture streams
+ /* disable LINK_ATIME timestamps for capture streams
until we figure out how to handle digital inputs */
- if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
- runtime->hw.info &= ~SNDRV_PCM_INFO_HAS_WALL_CLOCK;
+ if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
+ runtime->hw.info &= ~SNDRV_PCM_INFO_HAS_WALL_CLOCK; /* legacy */
+ runtime->hw.info &= ~SNDRV_PCM_INFO_HAS_LINK_ATIME;
+ }
spin_lock_irqsave(&chip->reg_lock, flags);
azx_dev->substream = substream;
@@ -877,7 +894,7 @@ static struct snd_pcm_ops azx_pcm_ops = {
.prepare = azx_pcm_prepare,
.trigger = azx_pcm_trigger,
.pointer = azx_pcm_pointer,
- .wall_clock = azx_get_wallclock_tstamp,
+ .get_time_info = azx_get_time_info,
.mmap = azx_pcm_mmap,
.page = snd_pcm_sgbuf_ops_page,
};
@@ -1676,7 +1693,7 @@ irqreturn_t azx_interrupt(int irq, void *dev_id)
int i;
#ifdef CONFIG_PM
- if (chip->driver_caps & AZX_DCAPS_PM_RUNTIME)
+ if (azx_has_pm_runtime(chip))
if (!pm_runtime_active(chip->card->dev))
return IRQ_NONE;
#endif
@@ -1779,7 +1796,7 @@ static void azx_power_notify(struct hda_bus *bus, bool power_up)
{
struct azx *chip = bus->private_data;
- if (!(chip->driver_caps & AZX_DCAPS_PM_RUNTIME))
+ if (!azx_has_pm_runtime(chip))
return;
if (power_up)
@@ -1810,41 +1827,65 @@ static int get_jackpoll_interval(struct azx *chip)
return j;
}
-/* Codec initialization */
-int azx_codec_create(struct azx *chip, const char *model,
- unsigned int max_slots,
- int *power_save_to)
-{
- struct hda_bus_template bus_temp;
- int c, codecs, err;
-
- memset(&bus_temp, 0, sizeof(bus_temp));
- bus_temp.private_data = chip;
- bus_temp.modelname = model;
- bus_temp.pci = chip->pci;
- bus_temp.ops.command = azx_send_cmd;
- bus_temp.ops.get_response = azx_get_response;
- bus_temp.ops.attach_pcm = azx_attach_pcm_stream;
- bus_temp.ops.bus_reset = azx_bus_reset;
+static struct hda_bus_ops bus_ops = {
+ .command = azx_send_cmd,
+ .get_response = azx_get_response,
+ .attach_pcm = azx_attach_pcm_stream,
+ .bus_reset = azx_bus_reset,
#ifdef CONFIG_PM
- bus_temp.power_save = power_save_to;
- bus_temp.ops.pm_notify = azx_power_notify;
+ .pm_notify = azx_power_notify,
#endif
#ifdef CONFIG_SND_HDA_DSP_LOADER
- bus_temp.ops.load_dsp_prepare = azx_load_dsp_prepare;
- bus_temp.ops.load_dsp_trigger = azx_load_dsp_trigger;
- bus_temp.ops.load_dsp_cleanup = azx_load_dsp_cleanup;
+ .load_dsp_prepare = azx_load_dsp_prepare,
+ .load_dsp_trigger = azx_load_dsp_trigger,
+ .load_dsp_cleanup = azx_load_dsp_cleanup,
#endif
+};
- err = snd_hda_bus_new(chip->card, &bus_temp, &chip->bus);
+/* HD-audio bus initialization */
+int azx_bus_create(struct azx *chip, const char *model, int *power_save_to)
+{
+ struct hda_bus *bus;
+ int err;
+
+ err = snd_hda_bus_new(chip->card, &bus);
if (err < 0)
return err;
+ chip->bus = bus;
+ bus->private_data = chip;
+ bus->pci = chip->pci;
+ bus->modelname = model;
+ bus->ops = bus_ops;
+#ifdef CONFIG_PM
+ bus->power_save = power_save_to;
+#endif
+
if (chip->driver_caps & AZX_DCAPS_RIRB_DELAY) {
dev_dbg(chip->card->dev, "Enable delay in RIRB handling\n");
- chip->bus->needs_damn_long_delay = 1;
+ bus->needs_damn_long_delay = 1;
+ }
+
+ /* AMD chipsets often cause the communication stalls upon certain
+ * sequence like the pin-detection. It seems that forcing the synced
+ * access works around the stall. Grrr...
+ */
+ if (chip->driver_caps & AZX_DCAPS_SYNC_WRITE) {
+ dev_dbg(chip->card->dev, "Enable sync_write for stable communication\n");
+ bus->sync_write = 1;
+ bus->allow_bus_reset = 1;
}
+ return 0;
+}
+EXPORT_SYMBOL_GPL(azx_bus_create);
+
+/* Probe codecs */
+int azx_probe_codecs(struct azx *chip, unsigned int max_slots)
+{
+ struct hda_bus *bus = chip->bus;
+ int c, codecs, err;
+
codecs = 0;
if (!max_slots)
max_slots = AZX_DEFAULT_CODECS;
@@ -1872,21 +1913,11 @@ int azx_codec_create(struct azx *chip, const char *model,
}
}
- /* AMD chipsets often cause the communication stalls upon certain
- * sequence like the pin-detection. It seems that forcing the synced
- * access works around the stall. Grrr...
- */
- if (chip->driver_caps & AZX_DCAPS_SYNC_WRITE) {
- dev_dbg(chip->card->dev, "Enable sync_write for stable communication\n");
- chip->bus->sync_write = 1;
- chip->bus->allow_bus_reset = 1;
- }
-
/* Then create codec instances */
for (c = 0; c < max_slots; c++) {
if ((chip->codec_mask & (1 << c)) & chip->codec_probe_mask) {
struct hda_codec *codec;
- err = snd_hda_codec_new(chip->bus, c, &codec);
+ err = snd_hda_codec_new(bus, c, &codec);
if (err < 0)
continue;
codec->jackpoll_interval = get_jackpoll_interval(chip);
@@ -1900,7 +1931,7 @@ int azx_codec_create(struct azx *chip, const char *model,
}
return 0;
}
-EXPORT_SYMBOL_GPL(azx_codec_create);
+EXPORT_SYMBOL_GPL(azx_probe_codecs);
/* configure each codec instance */
int azx_codec_configure(struct azx *chip)
@@ -1913,13 +1944,6 @@ int azx_codec_configure(struct azx *chip)
}
EXPORT_SYMBOL_GPL(azx_codec_configure);
-/* mixer creation - all stuff is implemented in hda module */
-int azx_mixer_create(struct azx *chip)
-{
- return snd_hda_build_controls(chip->bus);
-}
-EXPORT_SYMBOL_GPL(azx_mixer_create);
-
static bool is_input_stream(struct azx *chip, unsigned char index)
{
diff --git a/sound/pci/hda/hda_controller.h b/sound/pci/hda/hda_controller.h
index c90d10fd4d8f..0d09aa6b49ac 100644
--- a/sound/pci/hda/hda_controller.h
+++ b/sound/pci/hda/hda_controller.h
@@ -15,10 +15,399 @@
#ifndef __SOUND_HDA_CONTROLLER_H
#define __SOUND_HDA_CONTROLLER_H
+#include <linux/timecounter.h>
+#include <linux/interrupt.h>
#include <sound/core.h>
+#include <sound/pcm.h>
#include <sound/initval.h>
#include "hda_codec.h"
-#include "hda_priv.h"
+
+/*
+ * registers
+ */
+#define AZX_REG_GCAP 0x00
+#define AZX_GCAP_64OK (1 << 0) /* 64bit address support */
+#define AZX_GCAP_NSDO (3 << 1) /* # of serial data out signals */
+#define AZX_GCAP_BSS (31 << 3) /* # of bidirectional streams */
+#define AZX_GCAP_ISS (15 << 8) /* # of input streams */
+#define AZX_GCAP_OSS (15 << 12) /* # of output streams */
+#define AZX_REG_VMIN 0x02
+#define AZX_REG_VMAJ 0x03
+#define AZX_REG_OUTPAY 0x04
+#define AZX_REG_INPAY 0x06
+#define AZX_REG_GCTL 0x08
+#define AZX_GCTL_RESET (1 << 0) /* controller reset */
+#define AZX_GCTL_FCNTRL (1 << 1) /* flush control */
+#define AZX_GCTL_UNSOL (1 << 8) /* accept unsol. response enable */
+#define AZX_REG_WAKEEN 0x0c
+#define AZX_REG_STATESTS 0x0e
+#define AZX_REG_GSTS 0x10
+#define AZX_GSTS_FSTS (1 << 1) /* flush status */
+#define AZX_REG_INTCTL 0x20
+#define AZX_REG_INTSTS 0x24
+#define AZX_REG_WALLCLK 0x30 /* 24Mhz source */
+#define AZX_REG_OLD_SSYNC 0x34 /* SSYNC for old ICH */
+#define AZX_REG_SSYNC 0x38
+#define AZX_REG_CORBLBASE 0x40
+#define AZX_REG_CORBUBASE 0x44
+#define AZX_REG_CORBWP 0x48
+#define AZX_REG_CORBRP 0x4a
+#define AZX_CORBRP_RST (1 << 15) /* read pointer reset */
+#define AZX_REG_CORBCTL 0x4c
+#define AZX_CORBCTL_RUN (1 << 1) /* enable DMA */
+#define AZX_CORBCTL_CMEIE (1 << 0) /* enable memory error irq */
+#define AZX_REG_CORBSTS 0x4d
+#define AZX_CORBSTS_CMEI (1 << 0) /* memory error indication */
+#define AZX_REG_CORBSIZE 0x4e
+
+#define AZX_REG_RIRBLBASE 0x50
+#define AZX_REG_RIRBUBASE 0x54
+#define AZX_REG_RIRBWP 0x58
+#define AZX_RIRBWP_RST (1 << 15) /* write pointer reset */
+#define AZX_REG_RINTCNT 0x5a
+#define AZX_REG_RIRBCTL 0x5c
+#define AZX_RBCTL_IRQ_EN (1 << 0) /* enable IRQ */
+#define AZX_RBCTL_DMA_EN (1 << 1) /* enable DMA */
+#define AZX_RBCTL_OVERRUN_EN (1 << 2) /* enable overrun irq */
+#define AZX_REG_RIRBSTS 0x5d
+#define AZX_RBSTS_IRQ (1 << 0) /* response irq */
+#define AZX_RBSTS_OVERRUN (1 << 2) /* overrun irq */
+#define AZX_REG_RIRBSIZE 0x5e
+
+#define AZX_REG_IC 0x60
+#define AZX_REG_IR 0x64
+#define AZX_REG_IRS 0x68
+#define AZX_IRS_VALID (1<<1)
+#define AZX_IRS_BUSY (1<<0)
+
+#define AZX_REG_DPLBASE 0x70
+#define AZX_REG_DPUBASE 0x74
+#define AZX_DPLBASE_ENABLE 0x1 /* Enable position buffer */
+
+/* SD offset: SDI0=0x80, SDI1=0xa0, ... SDO3=0x160 */
+enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, SDO3 };
+
+/* stream register offsets from stream base */
+#define AZX_REG_SD_CTL 0x00
+#define AZX_REG_SD_STS 0x03
+#define AZX_REG_SD_LPIB 0x04
+#define AZX_REG_SD_CBL 0x08
+#define AZX_REG_SD_LVI 0x0c
+#define AZX_REG_SD_FIFOW 0x0e
+#define AZX_REG_SD_FIFOSIZE 0x10
+#define AZX_REG_SD_FORMAT 0x12
+#define AZX_REG_SD_BDLPL 0x18
+#define AZX_REG_SD_BDLPU 0x1c
+
+/* PCI space */
+#define AZX_PCIREG_TCSEL 0x44
+
+/*
+ * other constants
+ */
+
+/* max number of fragments - we may use more if allocating more pages for BDL */
+#define BDL_SIZE 4096
+#define AZX_MAX_BDL_ENTRIES (BDL_SIZE / 16)
+#define AZX_MAX_FRAG 32
+/* max buffer size - no h/w limit, you can increase as you like */
+#define AZX_MAX_BUF_SIZE (1024*1024*1024)
+
+/* RIRB int mask: overrun[2], response[0] */
+#define RIRB_INT_RESPONSE 0x01
+#define RIRB_INT_OVERRUN 0x04
+#define RIRB_INT_MASK 0x05
+
+/* STATESTS int mask: S3,SD2,SD1,SD0 */
+#define AZX_MAX_CODECS 8
+#define AZX_DEFAULT_CODECS 4
+#define STATESTS_INT_MASK ((1 << AZX_MAX_CODECS) - 1)
+
+/* SD_CTL bits */
+#define SD_CTL_STREAM_RESET 0x01 /* stream reset bit */
+#define SD_CTL_DMA_START 0x02 /* stream DMA start bit */
+#define SD_CTL_STRIPE (3 << 16) /* stripe control */
+#define SD_CTL_TRAFFIC_PRIO (1 << 18) /* traffic priority */
+#define SD_CTL_DIR (1 << 19) /* bi-directional stream */
+#define SD_CTL_STREAM_TAG_MASK (0xf << 20)
+#define SD_CTL_STREAM_TAG_SHIFT 20
+
+/* SD_CTL and SD_STS */
+#define SD_INT_DESC_ERR 0x10 /* descriptor error interrupt */
+#define SD_INT_FIFO_ERR 0x08 /* FIFO error interrupt */
+#define SD_INT_COMPLETE 0x04 /* completion interrupt */
+#define SD_INT_MASK (SD_INT_DESC_ERR|SD_INT_FIFO_ERR|\
+ SD_INT_COMPLETE)
+
+/* SD_STS */
+#define SD_STS_FIFO_READY 0x20 /* FIFO ready */
+
+/* INTCTL and INTSTS */
+#define AZX_INT_ALL_STREAM 0xff /* all stream interrupts */
+#define AZX_INT_CTRL_EN 0x40000000 /* controller interrupt enable bit */
+#define AZX_INT_GLOBAL_EN 0x80000000 /* global interrupt enable bit */
+
+/* below are so far hardcoded - should read registers in future */
+#define AZX_MAX_CORB_ENTRIES 256
+#define AZX_MAX_RIRB_ENTRIES 256
+
+/* driver quirks (capabilities) */
+/* bits 0-7 are used for indicating driver type */
+#define AZX_DCAPS_NO_TCSEL (1 << 8) /* No Intel TCSEL bit */
+#define AZX_DCAPS_NO_MSI (1 << 9) /* No MSI support */
+#define AZX_DCAPS_SNOOP_MASK (3 << 10) /* snoop type mask */
+#define AZX_DCAPS_SNOOP_OFF (1 << 12) /* snoop default off */
+#define AZX_DCAPS_RIRB_DELAY (1 << 13) /* Long delay in read loop */
+#define AZX_DCAPS_RIRB_PRE_DELAY (1 << 14) /* Put a delay before read */
+#define AZX_DCAPS_CTX_WORKAROUND (1 << 15) /* X-Fi workaround */
+#define AZX_DCAPS_POSFIX_LPIB (1 << 16) /* Use LPIB as default */
+#define AZX_DCAPS_POSFIX_VIA (1 << 17) /* Use VIACOMBO as default */
+#define AZX_DCAPS_NO_64BIT (1 << 18) /* No 64bit address */
+#define AZX_DCAPS_SYNC_WRITE (1 << 19) /* sync each cmd write */
+#define AZX_DCAPS_OLD_SSYNC (1 << 20) /* Old SSYNC reg for ICH */
+#define AZX_DCAPS_NO_ALIGN_BUFSIZE (1 << 21) /* no buffer size alignment */
+/* 22 unused */
+#define AZX_DCAPS_4K_BDLE_BOUNDARY (1 << 23) /* BDLE in 4k boundary */
+#define AZX_DCAPS_REVERSE_ASSIGN (1 << 24) /* Assign devices in reverse order */
+#define AZX_DCAPS_COUNT_LPIB_DELAY (1 << 25) /* Take LPIB as delay */
+#define AZX_DCAPS_PM_RUNTIME (1 << 26) /* runtime PM support */
+#define AZX_DCAPS_I915_POWERWELL (1 << 27) /* HSW i915 powerwell support */
+#define AZX_DCAPS_CORBRP_SELF_CLEAR (1 << 28) /* CORBRP clears itself after reset */
+#define AZX_DCAPS_NO_MSI64 (1 << 29) /* Stick to 32-bit MSIs */
+#define AZX_DCAPS_SEPARATE_STREAM_TAG (1 << 30) /* capture and playback use separate stream tag */
+
+enum {
+ AZX_SNOOP_TYPE_NONE,
+ AZX_SNOOP_TYPE_SCH,
+ AZX_SNOOP_TYPE_ATI,
+ AZX_SNOOP_TYPE_NVIDIA,
+};
+
+/* HD Audio class code */
+#define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403
+
+struct azx_dev {
+ struct snd_dma_buffer bdl; /* BDL buffer */
+ u32 *posbuf; /* position buffer pointer */
+
+ unsigned int bufsize; /* size of the play buffer in bytes */
+ unsigned int period_bytes; /* size of the period in bytes */
+ unsigned int frags; /* number for period in the play buffer */
+ unsigned int fifo_size; /* FIFO size */
+ unsigned long start_wallclk; /* start + minimum wallclk */
+ unsigned long period_wallclk; /* wallclk for period */
+
+ void __iomem *sd_addr; /* stream descriptor pointer */
+
+ u32 sd_int_sta_mask; /* stream int status mask */
+
+ /* pcm support */
+ struct snd_pcm_substream *substream; /* assigned substream,
+ * set in PCM open
+ */
+ unsigned int format_val; /* format value to be set in the
+ * controller and the codec
+ */
+ unsigned char stream_tag; /* assigned stream */
+ unsigned char index; /* stream index */
+ int assigned_key; /* last device# key assigned to */
+
+ unsigned int opened:1;
+ unsigned int running:1;
+ unsigned int irq_pending:1;
+ unsigned int prepared:1;
+ unsigned int locked:1;
+ /*
+ * For VIA:
+ * A flag to ensure DMA position is 0
+ * when link position is not greater than FIFO size
+ */
+ unsigned int insufficient:1;
+ unsigned int wc_marked:1;
+ unsigned int no_period_wakeup:1;
+
+ struct timecounter azx_tc;
+ struct cyclecounter azx_cc;
+
+ int delay_negative_threshold;
+
+#ifdef CONFIG_SND_HDA_DSP_LOADER
+ /* Allows dsp load to have sole access to the playback stream. */
+ struct mutex dsp_mutex;
+#endif
+};
+
+/* CORB/RIRB */
+struct azx_rb {
+ u32 *buf; /* CORB/RIRB buffer
+ * Each CORB entry is 4byte, RIRB is 8byte
+ */
+ dma_addr_t addr; /* physical address of CORB/RIRB buffer */
+ /* for RIRB */
+ unsigned short rp, wp; /* read/write pointers */
+ int cmds[AZX_MAX_CODECS]; /* number of pending requests */
+ u32 res[AZX_MAX_CODECS]; /* last read value */
+};
+
+struct azx;
+
+/* Functions to read/write to hda registers. */
+struct hda_controller_ops {
+ /* Register Access */
+ void (*reg_writel)(u32 value, u32 __iomem *addr);
+ u32 (*reg_readl)(u32 __iomem *addr);
+ void (*reg_writew)(u16 value, u16 __iomem *addr);
+ u16 (*reg_readw)(u16 __iomem *addr);
+ void (*reg_writeb)(u8 value, u8 __iomem *addr);
+ u8 (*reg_readb)(u8 __iomem *addr);
+ /* Disable msi if supported, PCI only */
+ int (*disable_msi_reset_irq)(struct azx *);
+ /* Allocation ops */
+ int (*dma_alloc_pages)(struct azx *chip,
+ int type,
+ size_t size,
+ struct snd_dma_buffer *buf);
+ void (*dma_free_pages)(struct azx *chip, struct snd_dma_buffer *buf);
+ int (*substream_alloc_pages)(struct azx *chip,
+ struct snd_pcm_substream *substream,
+ size_t size);
+ int (*substream_free_pages)(struct azx *chip,
+ struct snd_pcm_substream *substream);
+ void (*pcm_mmap_prepare)(struct snd_pcm_substream *substream,
+ struct vm_area_struct *area);
+ /* Check if current position is acceptable */
+ int (*position_check)(struct azx *chip, struct azx_dev *azx_dev);
+};
+
+struct azx_pcm {
+ struct azx *chip;
+ struct snd_pcm *pcm;
+ struct hda_codec *codec;
+ struct hda_pcm_stream *hinfo[2];
+ struct list_head list;
+};
+
+typedef unsigned int (*azx_get_pos_callback_t)(struct azx *, struct azx_dev *);
+typedef int (*azx_get_delay_callback_t)(struct azx *, struct azx_dev *, unsigned int pos);
+
+struct azx {
+ struct snd_card *card;
+ struct pci_dev *pci;
+ int dev_index;
+
+ /* chip type specific */
+ int driver_type;
+ unsigned int driver_caps;
+ int playback_streams;
+ int playback_index_offset;
+ int capture_streams;
+ int capture_index_offset;
+ int num_streams;
+ const int *jackpoll_ms; /* per-card jack poll interval */
+
+ /* Register interaction. */
+ const struct hda_controller_ops *ops;
+
+ /* position adjustment callbacks */
+ azx_get_pos_callback_t get_position[2];
+ azx_get_delay_callback_t get_delay[2];
+
+ /* pci resources */
+ unsigned long addr;
+ void __iomem *remap_addr;
+ int irq;
+
+ /* locks */
+ spinlock_t reg_lock;
+ struct mutex open_mutex; /* Prevents concurrent open/close operations */
+
+ /* streams (x num_streams) */
+ struct azx_dev *azx_dev;
+
+ /* PCM */
+ struct list_head pcm_list; /* azx_pcm list */
+
+ /* HD codec */
+ unsigned short codec_mask;
+ int codec_probe_mask; /* copied from probe_mask option */
+ struct hda_bus *bus;
+ unsigned int beep_mode;
+
+ /* CORB/RIRB */
+ struct azx_rb corb;
+ struct azx_rb rirb;
+
+ /* CORB/RIRB and position buffers */
+ struct snd_dma_buffer rb;
+ struct snd_dma_buffer posbuf;
+
+#ifdef CONFIG_SND_HDA_PATCH_LOADER
+ const struct firmware *fw;
+#endif
+
+ /* flags */
+ const int *bdl_pos_adj;
+ int poll_count;
+ unsigned int running:1;
+ unsigned int initialized:1;
+ unsigned int single_cmd:1;
+ unsigned int polling_mode:1;
+ unsigned int msi:1;
+ unsigned int probing:1; /* codec probing phase */
+ unsigned int snoop:1;
+ unsigned int align_buffer_size:1;
+ unsigned int region_requested:1;
+ unsigned int disabled:1; /* disabled by VGA-switcher */
+
+ /* for debugging */
+ unsigned int last_cmd[AZX_MAX_CODECS];
+
+ /* reboot notifier (for mysterious hangup problem at power-down) */
+ struct notifier_block reboot_notifier;
+
+#ifdef CONFIG_SND_HDA_DSP_LOADER
+ struct azx_dev saved_azx_dev;
+#endif
+};
+
+#ifdef CONFIG_X86
+#define azx_snoop(chip) ((chip)->snoop)
+#else
+#define azx_snoop(chip) true
+#endif
+
+/*
+ * macros for easy use
+ */
+
+#define azx_writel(chip, reg, value) \
+ ((chip)->ops->reg_writel(value, (chip)->remap_addr + AZX_REG_##reg))
+#define azx_readl(chip, reg) \
+ ((chip)->ops->reg_readl((chip)->remap_addr + AZX_REG_##reg))
+#define azx_writew(chip, reg, value) \
+ ((chip)->ops->reg_writew(value, (chip)->remap_addr + AZX_REG_##reg))
+#define azx_readw(chip, reg) \
+ ((chip)->ops->reg_readw((chip)->remap_addr + AZX_REG_##reg))
+#define azx_writeb(chip, reg, value) \
+ ((chip)->ops->reg_writeb(value, (chip)->remap_addr + AZX_REG_##reg))
+#define azx_readb(chip, reg) \
+ ((chip)->ops->reg_readb((chip)->remap_addr + AZX_REG_##reg))
+
+#define azx_sd_writel(chip, dev, reg, value) \
+ ((chip)->ops->reg_writel(value, (dev)->sd_addr + AZX_REG_##reg))
+#define azx_sd_readl(chip, dev, reg) \
+ ((chip)->ops->reg_readl((dev)->sd_addr + AZX_REG_##reg))
+#define azx_sd_writew(chip, dev, reg, value) \
+ ((chip)->ops->reg_writew(value, (dev)->sd_addr + AZX_REG_##reg))
+#define azx_sd_readw(chip, dev, reg) \
+ ((chip)->ops->reg_readw((dev)->sd_addr + AZX_REG_##reg))
+#define azx_sd_writeb(chip, dev, reg, value) \
+ ((chip)->ops->reg_writeb(value, (dev)->sd_addr + AZX_REG_##reg))
+#define azx_sd_readb(chip, dev, reg) \
+ ((chip)->ops->reg_readb((dev)->sd_addr + AZX_REG_##reg))
+
+#define azx_has_pm_runtime(chip) \
+ (!AZX_DCAPS_PM_RUNTIME || ((chip)->driver_caps & AZX_DCAPS_PM_RUNTIME))
/* PCM setup */
static inline struct azx_dev *get_azx_dev(struct snd_pcm_substream *substream)
@@ -43,11 +432,9 @@ void azx_enter_link_reset(struct azx *chip);
irqreturn_t azx_interrupt(int irq, void *dev_id);
/* Codec interface */
-int azx_codec_create(struct azx *chip, const char *model,
- unsigned int max_slots,
- int *power_save_to);
+int azx_bus_create(struct azx *chip, const char *model, int *power_save_to);
+int azx_probe_codecs(struct azx *chip, unsigned int max_slots);
int azx_codec_configure(struct azx *chip);
-int azx_mixer_create(struct azx *chip);
int azx_init_stream(struct azx *chip);
void azx_notifier_register(struct azx *chip);
diff --git a/sound/pci/hda/hda_i915.c b/sound/pci/hda/hda_i915.c
index 714894527e06..52a85d87c23c 100644
--- a/sound/pci/hda/hda_i915.c
+++ b/sound/pci/hda/hda_i915.c
@@ -22,7 +22,7 @@
#include <linux/component.h>
#include <drm/i915_component.h>
#include <sound/core.h>
-#include "hda_priv.h"
+#include "hda_controller.h"
#include "hda_intel.h"
/* Intel HSW/BDW display HDA controller Extended Mode registers.
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c
index 4ca3d5d02436..4614cb1f9582 100644
--- a/sound/pci/hda/hda_intel.c
+++ b/sound/pci/hda/hda_intel.c
@@ -62,7 +62,6 @@
#include <linux/firmware.h>
#include "hda_codec.h"
#include "hda_controller.h"
-#include "hda_priv.h"
#include "hda_intel.h"
/* position fix mode */
@@ -852,7 +851,7 @@ static int azx_runtime_suspend(struct device *dev)
if (chip->disabled || hda->init_failed)
return 0;
- if (!(chip->driver_caps & AZX_DCAPS_PM_RUNTIME))
+ if (!azx_has_pm_runtime(chip))
return 0;
/* enable controller wake up event */
@@ -885,7 +884,7 @@ static int azx_runtime_resume(struct device *dev)
if (chip->disabled || hda->init_failed)
return 0;
- if (!(chip->driver_caps & AZX_DCAPS_PM_RUNTIME))
+ if (!azx_has_pm_runtime(chip))
return 0;
if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
@@ -928,8 +927,7 @@ static int azx_runtime_idle(struct device *dev)
if (chip->disabled || hda->init_failed)
return 0;
- if (!power_save_controller ||
- !(chip->driver_caps & AZX_DCAPS_PM_RUNTIME))
+ if (!power_save_controller || !azx_has_pm_runtime(chip))
return -EBUSY;
return 0;
@@ -1071,8 +1069,7 @@ static int azx_free(struct azx *chip)
struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
int i;
- if ((chip->driver_caps & AZX_DCAPS_PM_RUNTIME)
- && chip->running)
+ if (azx_has_pm_runtime(chip) && chip->running)
pm_runtime_get_noresume(&pci->dev);
azx_del_card_list(chip);
@@ -1896,12 +1893,14 @@ static int azx_probe_continue(struct azx *chip)
#endif
/* create codec instances */
- err = azx_codec_create(chip, model[dev],
- azx_max_codecs[chip->driver_type],
- power_save_addr);
+ err = azx_bus_create(chip, model[dev], power_save_addr);
+ if (err < 0)
+ goto out_free;
+ err = azx_probe_codecs(chip, azx_max_codecs[chip->driver_type]);
if (err < 0)
goto out_free;
+
#ifdef CONFIG_SND_HDA_PATCH_LOADER
if (chip->fw) {
err = snd_hda_load_patch(chip->bus, chip->fw->size,
@@ -1926,7 +1925,7 @@ static int azx_probe_continue(struct azx *chip)
goto out_free;
/* create mixer controls */
- err = azx_mixer_create(chip);
+ err = snd_hda_build_controls(chip->bus);
if (err < 0)
goto out_free;
@@ -1938,7 +1937,7 @@ static int azx_probe_continue(struct azx *chip)
power_down_all_codecs(chip);
azx_notifier_register(chip);
azx_add_card_list(chip);
- if ((chip->driver_caps & AZX_DCAPS_PM_RUNTIME) || hda->use_vga_switcheroo)
+ if (azx_has_pm_runtime(chip) || hda->use_vga_switcheroo)
pm_runtime_put_noidle(&pci->dev);
out_free:
diff --git a/sound/pci/hda/hda_intel.h b/sound/pci/hda/hda_intel.h
index 348611835476..d5231f7216a7 100644
--- a/sound/pci/hda/hda_intel.h
+++ b/sound/pci/hda/hda_intel.h
@@ -17,7 +17,7 @@
#define __SOUND_HDA_INTEL_H
#include <drm/i915_component.h>
-#include "hda_priv.h"
+#include "hda_controller.h"
struct hda_intel {
struct azx chip;
diff --git a/sound/pci/hda/hda_local.h b/sound/pci/hda/hda_local.h
index 62658f2f8c9f..49c08a7278c4 100644
--- a/sound/pci/hda/hda_local.h
+++ b/sound/pci/hda/hda_local.h
@@ -466,23 +466,6 @@ void snd_hda_pick_pin_fixup(struct hda_codec *codec,
const struct snd_hda_pin_quirk *pin_quirk,
const struct hda_fixup *fixlist);
-
-/*
- * unsolicited event handler
- */
-
-#define HDA_UNSOL_QUEUE_SIZE 64
-
-struct hda_bus_unsolicited {
- /* ring buffer */
- u32 queue[HDA_UNSOL_QUEUE_SIZE * 2];
- unsigned int rp, wp;
-
- /* workqueue */
- struct work_struct work;
- struct hda_bus *bus;
-};
-
/* helper macros to retrieve pin default-config values */
#define get_defcfg_connect(cfg) \
((cfg & AC_DEFCFG_PORT_CONN) >> AC_DEFCFG_PORT_CONN_SHIFT)
diff --git a/sound/pci/hda/hda_priv.h b/sound/pci/hda/hda_priv.h
deleted file mode 100644
index daf458299753..000000000000
--- a/sound/pci/hda/hda_priv.h
+++ /dev/null
@@ -1,406 +0,0 @@
-/*
- * Common defines for the alsa driver code base for HD Audio.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the Free
- * Software Foundation; either version 2 of the License, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- */
-
-#ifndef __SOUND_HDA_PRIV_H
-#define __SOUND_HDA_PRIV_H
-
-#include <linux/timecounter.h>
-#include <sound/core.h>
-#include <sound/pcm.h>
-
-/*
- * registers
- */
-#define AZX_REG_GCAP 0x00
-#define AZX_GCAP_64OK (1 << 0) /* 64bit address support */
-#define AZX_GCAP_NSDO (3 << 1) /* # of serial data out signals */
-#define AZX_GCAP_BSS (31 << 3) /* # of bidirectional streams */
-#define AZX_GCAP_ISS (15 << 8) /* # of input streams */
-#define AZX_GCAP_OSS (15 << 12) /* # of output streams */
-#define AZX_REG_VMIN 0x02
-#define AZX_REG_VMAJ 0x03
-#define AZX_REG_OUTPAY 0x04
-#define AZX_REG_INPAY 0x06
-#define AZX_REG_GCTL 0x08
-#define AZX_GCTL_RESET (1 << 0) /* controller reset */
-#define AZX_GCTL_FCNTRL (1 << 1) /* flush control */
-#define AZX_GCTL_UNSOL (1 << 8) /* accept unsol. response enable */
-#define AZX_REG_WAKEEN 0x0c
-#define AZX_REG_STATESTS 0x0e
-#define AZX_REG_GSTS 0x10
-#define AZX_GSTS_FSTS (1 << 1) /* flush status */
-#define AZX_REG_INTCTL 0x20
-#define AZX_REG_INTSTS 0x24
-#define AZX_REG_WALLCLK 0x30 /* 24Mhz source */
-#define AZX_REG_OLD_SSYNC 0x34 /* SSYNC for old ICH */
-#define AZX_REG_SSYNC 0x38
-#define AZX_REG_CORBLBASE 0x40
-#define AZX_REG_CORBUBASE 0x44
-#define AZX_REG_CORBWP 0x48
-#define AZX_REG_CORBRP 0x4a
-#define AZX_CORBRP_RST (1 << 15) /* read pointer reset */
-#define AZX_REG_CORBCTL 0x4c
-#define AZX_CORBCTL_RUN (1 << 1) /* enable DMA */
-#define AZX_CORBCTL_CMEIE (1 << 0) /* enable memory error irq */
-#define AZX_REG_CORBSTS 0x4d
-#define AZX_CORBSTS_CMEI (1 << 0) /* memory error indication */
-#define AZX_REG_CORBSIZE 0x4e
-
-#define AZX_REG_RIRBLBASE 0x50
-#define AZX_REG_RIRBUBASE 0x54
-#define AZX_REG_RIRBWP 0x58
-#define AZX_RIRBWP_RST (1 << 15) /* write pointer reset */
-#define AZX_REG_RINTCNT 0x5a
-#define AZX_REG_RIRBCTL 0x5c
-#define AZX_RBCTL_IRQ_EN (1 << 0) /* enable IRQ */
-#define AZX_RBCTL_DMA_EN (1 << 1) /* enable DMA */
-#define AZX_RBCTL_OVERRUN_EN (1 << 2) /* enable overrun irq */
-#define AZX_REG_RIRBSTS 0x5d
-#define AZX_RBSTS_IRQ (1 << 0) /* response irq */
-#define AZX_RBSTS_OVERRUN (1 << 2) /* overrun irq */
-#define AZX_REG_RIRBSIZE 0x5e
-
-#define AZX_REG_IC 0x60
-#define AZX_REG_IR 0x64
-#define AZX_REG_IRS 0x68
-#define AZX_IRS_VALID (1<<1)
-#define AZX_IRS_BUSY (1<<0)
-
-#define AZX_REG_DPLBASE 0x70
-#define AZX_REG_DPUBASE 0x74
-#define AZX_DPLBASE_ENABLE 0x1 /* Enable position buffer */
-
-/* SD offset: SDI0=0x80, SDI1=0xa0, ... SDO3=0x160 */
-enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, SDO3 };
-
-/* stream register offsets from stream base */
-#define AZX_REG_SD_CTL 0x00
-#define AZX_REG_SD_STS 0x03
-#define AZX_REG_SD_LPIB 0x04
-#define AZX_REG_SD_CBL 0x08
-#define AZX_REG_SD_LVI 0x0c
-#define AZX_REG_SD_FIFOW 0x0e
-#define AZX_REG_SD_FIFOSIZE 0x10
-#define AZX_REG_SD_FORMAT 0x12
-#define AZX_REG_SD_BDLPL 0x18
-#define AZX_REG_SD_BDLPU 0x1c
-
-/* PCI space */
-#define AZX_PCIREG_TCSEL 0x44
-
-/*
- * other constants
- */
-
-/* max number of fragments - we may use more if allocating more pages for BDL */
-#define BDL_SIZE 4096
-#define AZX_MAX_BDL_ENTRIES (BDL_SIZE / 16)
-#define AZX_MAX_FRAG 32
-/* max buffer size - no h/w limit, you can increase as you like */
-#define AZX_MAX_BUF_SIZE (1024*1024*1024)
-
-/* RIRB int mask: overrun[2], response[0] */
-#define RIRB_INT_RESPONSE 0x01
-#define RIRB_INT_OVERRUN 0x04
-#define RIRB_INT_MASK 0x05
-
-/* STATESTS int mask: S3,SD2,SD1,SD0 */
-#define AZX_MAX_CODECS 8
-#define AZX_DEFAULT_CODECS 4
-#define STATESTS_INT_MASK ((1 << AZX_MAX_CODECS) - 1)
-
-/* SD_CTL bits */
-#define SD_CTL_STREAM_RESET 0x01 /* stream reset bit */
-#define SD_CTL_DMA_START 0x02 /* stream DMA start bit */
-#define SD_CTL_STRIPE (3 << 16) /* stripe control */
-#define SD_CTL_TRAFFIC_PRIO (1 << 18) /* traffic priority */
-#define SD_CTL_DIR (1 << 19) /* bi-directional stream */
-#define SD_CTL_STREAM_TAG_MASK (0xf << 20)
-#define SD_CTL_STREAM_TAG_SHIFT 20
-
-/* SD_CTL and SD_STS */
-#define SD_INT_DESC_ERR 0x10 /* descriptor error interrupt */
-#define SD_INT_FIFO_ERR 0x08 /* FIFO error interrupt */
-#define SD_INT_COMPLETE 0x04 /* completion interrupt */
-#define SD_INT_MASK (SD_INT_DESC_ERR|SD_INT_FIFO_ERR|\
- SD_INT_COMPLETE)
-
-/* SD_STS */
-#define SD_STS_FIFO_READY 0x20 /* FIFO ready */
-
-/* INTCTL and INTSTS */
-#define AZX_INT_ALL_STREAM 0xff /* all stream interrupts */
-#define AZX_INT_CTRL_EN 0x40000000 /* controller interrupt enable bit */
-#define AZX_INT_GLOBAL_EN 0x80000000 /* global interrupt enable bit */
-
-/* below are so far hardcoded - should read registers in future */
-#define AZX_MAX_CORB_ENTRIES 256
-#define AZX_MAX_RIRB_ENTRIES 256
-
-/* driver quirks (capabilities) */
-/* bits 0-7 are used for indicating driver type */
-#define AZX_DCAPS_NO_TCSEL (1 << 8) /* No Intel TCSEL bit */
-#define AZX_DCAPS_NO_MSI (1 << 9) /* No MSI support */
-#define AZX_DCAPS_SNOOP_MASK (3 << 10) /* snoop type mask */
-#define AZX_DCAPS_SNOOP_OFF (1 << 12) /* snoop default off */
-#define AZX_DCAPS_RIRB_DELAY (1 << 13) /* Long delay in read loop */
-#define AZX_DCAPS_RIRB_PRE_DELAY (1 << 14) /* Put a delay before read */
-#define AZX_DCAPS_CTX_WORKAROUND (1 << 15) /* X-Fi workaround */
-#define AZX_DCAPS_POSFIX_LPIB (1 << 16) /* Use LPIB as default */
-#define AZX_DCAPS_POSFIX_VIA (1 << 17) /* Use VIACOMBO as default */
-#define AZX_DCAPS_NO_64BIT (1 << 18) /* No 64bit address */
-#define AZX_DCAPS_SYNC_WRITE (1 << 19) /* sync each cmd write */
-#define AZX_DCAPS_OLD_SSYNC (1 << 20) /* Old SSYNC reg for ICH */
-#define AZX_DCAPS_NO_ALIGN_BUFSIZE (1 << 21) /* no buffer size alignment */
-/* 22 unused */
-#define AZX_DCAPS_4K_BDLE_BOUNDARY (1 << 23) /* BDLE in 4k boundary */
-#define AZX_DCAPS_REVERSE_ASSIGN (1 << 24) /* Assign devices in reverse order */
-#define AZX_DCAPS_COUNT_LPIB_DELAY (1 << 25) /* Take LPIB as delay */
-#define AZX_DCAPS_PM_RUNTIME (1 << 26) /* runtime PM support */
-#define AZX_DCAPS_I915_POWERWELL (1 << 27) /* HSW i915 powerwell support */
-#define AZX_DCAPS_CORBRP_SELF_CLEAR (1 << 28) /* CORBRP clears itself after reset */
-#define AZX_DCAPS_NO_MSI64 (1 << 29) /* Stick to 32-bit MSIs */
-#define AZX_DCAPS_SEPARATE_STREAM_TAG (1 << 30) /* capture and playback use separate stream tag */
-
-enum {
- AZX_SNOOP_TYPE_NONE ,
- AZX_SNOOP_TYPE_SCH,
- AZX_SNOOP_TYPE_ATI,
- AZX_SNOOP_TYPE_NVIDIA,
-};
-
-/* HD Audio class code */
-#define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403
-
-struct azx_dev {
- struct snd_dma_buffer bdl; /* BDL buffer */
- u32 *posbuf; /* position buffer pointer */
-
- unsigned int bufsize; /* size of the play buffer in bytes */
- unsigned int period_bytes; /* size of the period in bytes */
- unsigned int frags; /* number for period in the play buffer */
- unsigned int fifo_size; /* FIFO size */
- unsigned long start_wallclk; /* start + minimum wallclk */
- unsigned long period_wallclk; /* wallclk for period */
-
- void __iomem *sd_addr; /* stream descriptor pointer */
-
- u32 sd_int_sta_mask; /* stream int status mask */
-
- /* pcm support */
- struct snd_pcm_substream *substream; /* assigned substream,
- * set in PCM open
- */
- unsigned int format_val; /* format value to be set in the
- * controller and the codec
- */
- unsigned char stream_tag; /* assigned stream */
- unsigned char index; /* stream index */
- int assigned_key; /* last device# key assigned to */
-
- unsigned int opened:1;
- unsigned int running:1;
- unsigned int irq_pending:1;
- unsigned int prepared:1;
- unsigned int locked:1;
- /*
- * For VIA:
- * A flag to ensure DMA position is 0
- * when link position is not greater than FIFO size
- */
- unsigned int insufficient:1;
- unsigned int wc_marked:1;
- unsigned int no_period_wakeup:1;
-
- struct timecounter azx_tc;
- struct cyclecounter azx_cc;
-
- int delay_negative_threshold;
-
-#ifdef CONFIG_SND_HDA_DSP_LOADER
- /* Allows dsp load to have sole access to the playback stream. */
- struct mutex dsp_mutex;
-#endif
-};
-
-/* CORB/RIRB */
-struct azx_rb {
- u32 *buf; /* CORB/RIRB buffer
- * Each CORB entry is 4byte, RIRB is 8byte
- */
- dma_addr_t addr; /* physical address of CORB/RIRB buffer */
- /* for RIRB */
- unsigned short rp, wp; /* read/write pointers */
- int cmds[AZX_MAX_CODECS]; /* number of pending requests */
- u32 res[AZX_MAX_CODECS]; /* last read value */
-};
-
-struct azx;
-
-/* Functions to read/write to hda registers. */
-struct hda_controller_ops {
- /* Register Access */
- void (*reg_writel)(u32 value, u32 __iomem *addr);
- u32 (*reg_readl)(u32 __iomem *addr);
- void (*reg_writew)(u16 value, u16 __iomem *addr);
- u16 (*reg_readw)(u16 __iomem *addr);
- void (*reg_writeb)(u8 value, u8 __iomem *addr);
- u8 (*reg_readb)(u8 __iomem *addr);
- /* Disable msi if supported, PCI only */
- int (*disable_msi_reset_irq)(struct azx *);
- /* Allocation ops */
- int (*dma_alloc_pages)(struct azx *chip,
- int type,
- size_t size,
- struct snd_dma_buffer *buf);
- void (*dma_free_pages)(struct azx *chip, struct snd_dma_buffer *buf);
- int (*substream_alloc_pages)(struct azx *chip,
- struct snd_pcm_substream *substream,
- size_t size);
- int (*substream_free_pages)(struct azx *chip,
- struct snd_pcm_substream *substream);
- void (*pcm_mmap_prepare)(struct snd_pcm_substream *substream,
- struct vm_area_struct *area);
- /* Check if current position is acceptable */
- int (*position_check)(struct azx *chip, struct azx_dev *azx_dev);
-};
-
-struct azx_pcm {
- struct azx *chip;
- struct snd_pcm *pcm;
- struct hda_codec *codec;
- struct hda_pcm_stream *hinfo[2];
- struct list_head list;
-};
-
-typedef unsigned int (*azx_get_pos_callback_t)(struct azx *, struct azx_dev *);
-typedef int (*azx_get_delay_callback_t)(struct azx *, struct azx_dev *, unsigned int pos);
-
-struct azx {
- struct snd_card *card;
- struct pci_dev *pci;
- int dev_index;
-
- /* chip type specific */
- int driver_type;
- unsigned int driver_caps;
- int playback_streams;
- int playback_index_offset;
- int capture_streams;
- int capture_index_offset;
- int num_streams;
- const int *jackpoll_ms; /* per-card jack poll interval */
-
- /* Register interaction. */
- const struct hda_controller_ops *ops;
-
- /* position adjustment callbacks */
- azx_get_pos_callback_t get_position[2];
- azx_get_delay_callback_t get_delay[2];
-
- /* pci resources */
- unsigned long addr;
- void __iomem *remap_addr;
- int irq;
-
- /* locks */
- spinlock_t reg_lock;
- struct mutex open_mutex; /* Prevents concurrent open/close operations */
-
- /* streams (x num_streams) */
- struct azx_dev *azx_dev;
-
- /* PCM */
- struct list_head pcm_list; /* azx_pcm list */
-
- /* HD codec */
- unsigned short codec_mask;
- int codec_probe_mask; /* copied from probe_mask option */
- struct hda_bus *bus;
- unsigned int beep_mode;
-
- /* CORB/RIRB */
- struct azx_rb corb;
- struct azx_rb rirb;
-
- /* CORB/RIRB and position buffers */
- struct snd_dma_buffer rb;
- struct snd_dma_buffer posbuf;
-
-#ifdef CONFIG_SND_HDA_PATCH_LOADER
- const struct firmware *fw;
-#endif
-
- /* flags */
- const int *bdl_pos_adj;
- int poll_count;
- unsigned int running:1;
- unsigned int initialized:1;
- unsigned int single_cmd:1;
- unsigned int polling_mode:1;
- unsigned int msi:1;
- unsigned int probing:1; /* codec probing phase */
- unsigned int snoop:1;
- unsigned int align_buffer_size:1;
- unsigned int region_requested:1;
- unsigned int disabled:1; /* disabled by VGA-switcher */
-
- /* for debugging */
- unsigned int last_cmd[AZX_MAX_CODECS];
-
- /* reboot notifier (for mysterious hangup problem at power-down) */
- struct notifier_block reboot_notifier;
-
-#ifdef CONFIG_SND_HDA_DSP_LOADER
- struct azx_dev saved_azx_dev;
-#endif
-};
-
-#ifdef CONFIG_X86
-#define azx_snoop(chip) ((chip)->snoop)
-#else
-#define azx_snoop(chip) true
-#endif
-
-/*
- * macros for easy use
- */
-
-#define azx_writel(chip, reg, value) \
- ((chip)->ops->reg_writel(value, (chip)->remap_addr + AZX_REG_##reg))
-#define azx_readl(chip, reg) \
- ((chip)->ops->reg_readl((chip)->remap_addr + AZX_REG_##reg))
-#define azx_writew(chip, reg, value) \
- ((chip)->ops->reg_writew(value, (chip)->remap_addr + AZX_REG_##reg))
-#define azx_readw(chip, reg) \
- ((chip)->ops->reg_readw((chip)->remap_addr + AZX_REG_##reg))
-#define azx_writeb(chip, reg, value) \
- ((chip)->ops->reg_writeb(value, (chip)->remap_addr + AZX_REG_##reg))
-#define azx_readb(chip, reg) \
- ((chip)->ops->reg_readb((chip)->remap_addr + AZX_REG_##reg))
-
-#define azx_sd_writel(chip, dev, reg, value) \
- ((chip)->ops->reg_writel(value, (dev)->sd_addr + AZX_REG_##reg))
-#define azx_sd_readl(chip, dev, reg) \
- ((chip)->ops->reg_readl((dev)->sd_addr + AZX_REG_##reg))
-#define azx_sd_writew(chip, dev, reg, value) \
- ((chip)->ops->reg_writew(value, (dev)->sd_addr + AZX_REG_##reg))
-#define azx_sd_readw(chip, dev, reg) \
- ((chip)->ops->reg_readw((dev)->sd_addr + AZX_REG_##reg))
-#define azx_sd_writeb(chip, dev, reg, value) \
- ((chip)->ops->reg_writeb(value, (dev)->sd_addr + AZX_REG_##reg))
-#define azx_sd_readb(chip, dev, reg) \
- ((chip)->ops->reg_readb((dev)->sd_addr + AZX_REG_##reg))
-
-#endif /* __SOUND_HDA_PRIV_H */
diff --git a/sound/pci/hda/hda_tegra.c b/sound/pci/hda/hda_tegra.c
index 375e94f4cf52..1bd7a9e04046 100644
--- a/sound/pci/hda/hda_tegra.c
+++ b/sound/pci/hda/hda_tegra.c
@@ -37,7 +37,6 @@
#include "hda_codec.h"
#include "hda_controller.h"
-#include "hda_priv.h"
/* Defines for Nvidia Tegra HDA support */
#define HDA_BAR0 0x8000
@@ -503,7 +502,11 @@ static int hda_tegra_probe(struct platform_device *pdev)
goto out_free;
/* create codec instances */
- err = azx_codec_create(chip, NULL, 0, &power_save);
+ err = azx_bus_create(chip, NULL, &power_save);
+ if (err < 0)
+ goto out_free;
+
+ err = azx_probe_codecs(chip, 0);
if (err < 0)
goto out_free;
@@ -517,7 +520,7 @@ static int hda_tegra_probe(struct platform_device *pdev)
goto out_free;
/* create mixer controls */
- err = azx_mixer_create(chip);
+ err = snd_hda_build_controls(chip->bus);
if (err < 0)
goto out_free;
diff --git a/sound/pci/rme9652/hdspm.c b/sound/pci/rme9652/hdspm.c
index ca67f896d117..cb666c73712d 100644
--- a/sound/pci/rme9652/hdspm.c
+++ b/sound/pci/rme9652/hdspm.c
@@ -6043,23 +6043,30 @@ hdspm_hw_constraints_aes32_sample_rates = {
.mask = 0
};
-static int snd_hdspm_playback_open(struct snd_pcm_substream *substream)
+static int snd_hdspm_open(struct snd_pcm_substream *substream)
{
struct hdspm *hdspm = snd_pcm_substream_chip(substream);
struct snd_pcm_runtime *runtime = substream->runtime;
+ bool playback = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK);
spin_lock_irq(&hdspm->lock);
-
snd_pcm_set_sync(substream);
+ runtime->hw = (playback) ? snd_hdspm_playback_subinfo :
+ snd_hdspm_capture_subinfo;
+ if (playback) {
+ if (hdspm->capture_substream == NULL)
+ hdspm_stop_audio(hdspm);
- runtime->hw = snd_hdspm_playback_subinfo;
-
- if (hdspm->capture_substream == NULL)
- hdspm_stop_audio(hdspm);
+ hdspm->playback_pid = current->pid;
+ hdspm->playback_substream = substream;
+ } else {
+ if (hdspm->playback_substream == NULL)
+ hdspm_stop_audio(hdspm);
- hdspm->playback_pid = current->pid;
- hdspm->playback_substream = substream;
+ hdspm->capture_pid = current->pid;
+ hdspm->capture_substream = substream;
+ }
spin_unlock_irq(&hdspm->lock);
@@ -6094,108 +6101,42 @@ static int snd_hdspm_playback_open(struct snd_pcm_substream *substream)
&hdspm_hw_constraints_aes32_sample_rates);
} else {
snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
- snd_hdspm_hw_rule_rate_out_channels, hdspm,
+ (playback ?
+ snd_hdspm_hw_rule_rate_out_channels :
+ snd_hdspm_hw_rule_rate_in_channels), hdspm,
SNDRV_PCM_HW_PARAM_CHANNELS, -1);
}
snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
- snd_hdspm_hw_rule_out_channels, hdspm,
+ (playback ? snd_hdspm_hw_rule_out_channels :
+ snd_hdspm_hw_rule_in_channels), hdspm,
SNDRV_PCM_HW_PARAM_CHANNELS, -1);
snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
- snd_hdspm_hw_rule_out_channels_rate, hdspm,
+ (playback ? snd_hdspm_hw_rule_out_channels_rate :
+ snd_hdspm_hw_rule_in_channels_rate), hdspm,
SNDRV_PCM_HW_PARAM_RATE, -1);
return 0;
}
-static int snd_hdspm_playback_release(struct snd_pcm_substream *substream)
+static int snd_hdspm_release(struct snd_pcm_substream *substream)
{
struct hdspm *hdspm = snd_pcm_substream_chip(substream);
+ bool playback = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK);
spin_lock_irq(&hdspm->lock);
- hdspm->playback_pid = -1;
- hdspm->playback_substream = NULL;
-
- spin_unlock_irq(&hdspm->lock);
-
- return 0;
-}
-
-
-static int snd_hdspm_capture_open(struct snd_pcm_substream *substream)
-{
- struct hdspm *hdspm = snd_pcm_substream_chip(substream);
- struct snd_pcm_runtime *runtime = substream->runtime;
-
- spin_lock_irq(&hdspm->lock);
- snd_pcm_set_sync(substream);
- runtime->hw = snd_hdspm_capture_subinfo;
-
- if (hdspm->playback_substream == NULL)
- hdspm_stop_audio(hdspm);
-
- hdspm->capture_pid = current->pid;
- hdspm->capture_substream = substream;
-
- spin_unlock_irq(&hdspm->lock);
-
- snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
- snd_pcm_hw_constraint_pow2(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
-
- switch (hdspm->io_type) {
- case AIO:
- case RayDAT:
- snd_pcm_hw_constraint_minmax(runtime,
- SNDRV_PCM_HW_PARAM_PERIOD_SIZE,
- 32, 4096);
- snd_pcm_hw_constraint_minmax(runtime,
- SNDRV_PCM_HW_PARAM_BUFFER_SIZE,
- 16384, 16384);
- break;
-
- default:
- snd_pcm_hw_constraint_minmax(runtime,
- SNDRV_PCM_HW_PARAM_PERIOD_SIZE,
- 64, 8192);
- snd_pcm_hw_constraint_minmax(runtime,
- SNDRV_PCM_HW_PARAM_PERIODS,
- 2, 2);
- break;
- }
-
- if (AES32 == hdspm->io_type) {
- runtime->hw.rates |= SNDRV_PCM_RATE_KNOT;
- snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
- &hdspm_hw_constraints_aes32_sample_rates);
+ if (playback) {
+ hdspm->playback_pid = -1;
+ hdspm->playback_substream = NULL;
} else {
- snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
- snd_hdspm_hw_rule_rate_in_channels, hdspm,
- SNDRV_PCM_HW_PARAM_CHANNELS, -1);
+ hdspm->capture_pid = -1;
+ hdspm->capture_substream = NULL;
}
- snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
- snd_hdspm_hw_rule_in_channels, hdspm,
- SNDRV_PCM_HW_PARAM_CHANNELS, -1);
-
- snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
- snd_hdspm_hw_rule_in_channels_rate, hdspm,
- SNDRV_PCM_HW_PARAM_RATE, -1);
-
- return 0;
-}
-
-static int snd_hdspm_capture_release(struct snd_pcm_substream *substream)
-{
- struct hdspm *hdspm = snd_pcm_substream_chip(substream);
-
- spin_lock_irq(&hdspm->lock);
-
- hdspm->capture_pid = -1;
- hdspm->capture_substream = NULL;
-
spin_unlock_irq(&hdspm->lock);
+
return 0;
}
@@ -6413,21 +6354,9 @@ static int snd_hdspm_hwdep_ioctl(struct snd_hwdep *hw, struct file *file,
return 0;
}
-static struct snd_pcm_ops snd_hdspm_playback_ops = {
- .open = snd_hdspm_playback_open,
- .close = snd_hdspm_playback_release,
- .ioctl = snd_hdspm_ioctl,
- .hw_params = snd_hdspm_hw_params,
- .hw_free = snd_hdspm_hw_free,
- .prepare = snd_hdspm_prepare,
- .trigger = snd_hdspm_trigger,
- .pointer = snd_hdspm_hw_pointer,
- .page = snd_pcm_sgbuf_ops_page,
-};
-
-static struct snd_pcm_ops snd_hdspm_capture_ops = {
- .open = snd_hdspm_capture_open,
- .close = snd_hdspm_capture_release,
+static struct snd_pcm_ops snd_hdspm_ops = {
+ .open = snd_hdspm_open,
+ .close = snd_hdspm_release,
.ioctl = snd_hdspm_ioctl,
.hw_params = snd_hdspm_hw_params,
.hw_free = snd_hdspm_hw_free,
@@ -6521,9 +6450,9 @@ static int snd_hdspm_create_pcm(struct snd_card *card,
strcpy(pcm->name, hdspm->card_name);
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
- &snd_hdspm_playback_ops);
+ &snd_hdspm_ops);
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
- &snd_hdspm_capture_ops);
+ &snd_hdspm_ops);
pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;