diff options
Diffstat (limited to 'include/linux/spi/spi.h')
| -rw-r--r-- | include/linux/spi/spi.h | 24 |
1 files changed, 19 insertions, 5 deletions
diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h index 662b336aa2e4..053abd22ad31 100644 --- a/include/linux/spi/spi.h +++ b/include/linux/spi/spi.h @@ -143,7 +143,7 @@ struct spi_device { u32 max_speed_hz; u8 chip_select; u8 bits_per_word; - u16 mode; + u32 mode; #define SPI_CPHA 0x01 /* clock phase */ #define SPI_CPOL 0x02 /* clock polarity */ #define SPI_MODE_0 (0|0) /* (original MicroWire) */ @@ -330,6 +330,9 @@ static inline void spi_unregister_driver(struct spi_driver *sdrv) * must fail if an unrecognized or unsupported mode is requested. * It's always safe to call this unless transfers are pending on * the device whose settings are being modified. + * @set_cs_timing: optional hook for SPI devices to request SPI master + * controller for configuring specific CS setup time, hold time and inactive + * delay interms of clock counts * @transfer: adds a message to the controller's transfer queue. * @cleanup: frees controller-specific state * @can_dma: determine whether this controller supports DMA @@ -363,6 +366,7 @@ static inline void spi_unregister_driver(struct spi_driver *sdrv) * @unprepare_transfer_hardware: there are currently no more messages on the * queue so the subsystem notifies the driver that it may relax the * hardware by issuing this call + * * @set_cs: set the logic level of the chip select line. May be called * from interrupt context. * @prepare_message: set up the controller to transfer a single message, @@ -439,13 +443,12 @@ struct spi_controller { u16 dma_alignment; /* spi_device.mode flags understood by this controller driver */ - u16 mode_bits; + u32 mode_bits; /* bitmask of supported bits_per_word for transfers */ u32 bits_per_word_mask; #define SPI_BPW_MASK(bits) BIT((bits) - 1) -#define SPI_BIT_MASK(bits) (((bits) == 32) ? ~0U : (BIT(bits) - 1)) -#define SPI_BPW_RANGE_MASK(min, max) (SPI_BIT_MASK(max) - SPI_BIT_MASK(min - 1)) +#define SPI_BPW_RANGE_MASK(min, max) GENMASK((max) - 1, (min) - 1) /* limits on transfer speed */ u32 min_speed_hz; @@ -489,6 +492,17 @@ struct spi_controller { */ int (*setup)(struct spi_device *spi); + /* + * set_cs_timing() method is for SPI controllers that supports + * configuring CS timing. + * + * This hook allows SPI client drivers to request SPI controllers + * to configure specific CS timing through spi_set_cs_timing() after + * spi_setup(). + */ + void (*set_cs_timing)(struct spi_device *spi, u8 setup_clk_cycles, + u8 hold_clk_cycles, u8 inactive_clk_cycles); + /* bidirectional bulk transfers * * + The transfer() method may not sleep; its main role is @@ -1277,7 +1291,7 @@ struct spi_board_info { /* mode becomes spi_device.mode, and is essential for chips * where the default of SPI_CS_HIGH = 0 is wrong. */ - u16 mode; + u32 mode; /* ... may need additional spi_device chip config data here. * avoid stuff protocol drivers can set; but include stuff |