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-rw-r--r--include/asm-m68knommu/bitops.h2
-rw-r--r--include/asm-m68knommu/commproc.h2
-rw-r--r--include/asm-m68knommu/delay.h2
-rw-r--r--include/asm-m68knommu/io.h2
-rw-r--r--include/asm-m68knommu/m5249sim.h4
-rw-r--r--include/asm-m68knommu/m5307sim.h12
-rw-r--r--include/asm-m68knommu/m5407sim.h12
-rw-r--r--include/asm-m68knommu/m68360_regs.h2
-rw-r--r--include/asm-m68knommu/mcfne.h27
-rw-r--r--include/asm-m68knommu/mcfsim.h4
-rw-r--r--include/asm-m68knommu/mcftimer.h2
-rw-r--r--include/asm-m68knommu/mcfuart.h4
-rw-r--r--include/asm-m68knommu/system.h17
13 files changed, 22 insertions, 70 deletions
diff --git a/include/asm-m68knommu/bitops.h b/include/asm-m68knommu/bitops.h
index f43afe1fc3b3..c142fbf2f376 100644
--- a/include/asm-m68knommu/bitops.h
+++ b/include/asm-m68knommu/bitops.h
@@ -262,7 +262,7 @@ static __inline__ unsigned long ext2_find_next_zero_bit(void *addr, unsigned lon
* tmp = __swab32(*(p++));
* tmp |= ~0UL >> (32-offset);
*
- * but this would decrease preformance, so we change the
+ * but this would decrease performance, so we change the
* shift:
*/
tmp = *(p++);
diff --git a/include/asm-m68knommu/commproc.h b/include/asm-m68knommu/commproc.h
index 0161ebb5d883..36e870b468ef 100644
--- a/include/asm-m68knommu/commproc.h
+++ b/include/asm-m68knommu/commproc.h
@@ -715,7 +715,7 @@ extern void cpm_install_handler(int vec, void (*handler)(void *), void *dev_id);
#define CICR_SCC_SCC3 ((uint)0x00200000) /* SCC3 @ SCCc */
#define CICR_SCB_SCC2 ((uint)0x00040000) /* SCC2 @ SCCb */
#define CICR_SCA_SCC1 ((uint)0x00000000) /* SCC1 @ SCCa */
-#define CICR_IRL_MASK ((uint)0x0000e000) /* Core interrrupt */
+#define CICR_IRL_MASK ((uint)0x0000e000) /* Core interrupt */
#define CICR_HP_MASK ((uint)0x00001f00) /* Hi-pri int. */
#define CICR_IEN ((uint)0x00000080) /* Int. enable */
#define CICR_SPS ((uint)0x00000001) /* SCC Spread */
diff --git a/include/asm-m68knommu/delay.h b/include/asm-m68knommu/delay.h
index 04a20fd051cf..55cbd6294ab6 100644
--- a/include/asm-m68knommu/delay.h
+++ b/include/asm-m68knommu/delay.h
@@ -68,7 +68,7 @@ static inline void _udelay(unsigned long usecs)
/*
* Moved the udelay() function into library code, no longer inlined.
* I had to change the algorithm because we are overflowing now on
- * the faster ColdFire parts. The code is a little biger, so it makes
+ * the faster ColdFire parts. The code is a little bigger, so it makes
* sense to library it.
*/
extern void udelay(unsigned long usecs);
diff --git a/include/asm-m68knommu/io.h b/include/asm-m68knommu/io.h
index 653d9b2d7ddf..6adef1ee2082 100644
--- a/include/asm-m68knommu/io.h
+++ b/include/asm-m68knommu/io.h
@@ -172,8 +172,6 @@ extern void iounmap(void *addr);
/*
* Macros used for converting between virtual and physical mappings.
*/
-#define mm_ptov(vaddr) ((void *) (vaddr))
-#define mm_vtop(vaddr) ((unsigned long) (vaddr))
#define phys_to_virt(vaddr) ((void *) (vaddr))
#define virt_to_phys(vaddr) ((unsigned long) (vaddr))
diff --git a/include/asm-m68knommu/m5249sim.h b/include/asm-m68knommu/m5249sim.h
index 399814f0b219..366eb8602d2f 100644
--- a/include/asm-m68knommu/m5249sim.h
+++ b/include/asm-m68knommu/m5249sim.h
@@ -43,10 +43,10 @@
#define MCFSIM_CSAR1 0x8c /* CS 1 Address reg (r/w) */
#define MCFSIM_CSMR1 0x90 /* CS 1 Mask reg (r/w) */
#define MCFSIM_CSCR1 0x96 /* CS 1 Control reg (r/w) */
-#define MCFSIM_CSAR2 0x98 /* CS 2 Adress reg (r/w) */
+#define MCFSIM_CSAR2 0x98 /* CS 2 Address reg (r/w) */
#define MCFSIM_CSMR2 0x9c /* CS 2 Mask reg (r/w) */
#define MCFSIM_CSCR2 0xa2 /* CS 2 Control reg (r/w) */
-#define MCFSIM_CSAR3 0xa4 /* CS 3 Adress reg (r/w) */
+#define MCFSIM_CSAR3 0xa4 /* CS 3 Address reg (r/w) */
#define MCFSIM_CSMR3 0xa8 /* CS 3 Mask reg (r/w) */
#define MCFSIM_CSCR3 0xae /* CS 3 Control reg (r/w) */
diff --git a/include/asm-m68knommu/m5307sim.h b/include/asm-m68knommu/m5307sim.h
index d3ce550f6ef4..5886728409c0 100644
--- a/include/asm-m68knommu/m5307sim.h
+++ b/include/asm-m68knommu/m5307sim.h
@@ -64,22 +64,22 @@
#define MCFSIM_CSMR7 0xda /* CS 7 Mask reg (r/w) */
#define MCFSIM_CSCR7 0xde /* CS 7 Control reg (r/w) */
#else
-#define MCFSIM_CSAR2 0x98 /* CS 2 Adress reg (r/w) */
+#define MCFSIM_CSAR2 0x98 /* CS 2 Address reg (r/w) */
#define MCFSIM_CSMR2 0x9c /* CS 2 Mask reg (r/w) */
#define MCFSIM_CSCR2 0xa2 /* CS 2 Control reg (r/w) */
-#define MCFSIM_CSAR3 0xa4 /* CS 3 Adress reg (r/w) */
+#define MCFSIM_CSAR3 0xa4 /* CS 3 Address reg (r/w) */
#define MCFSIM_CSMR3 0xa8 /* CS 3 Mask reg (r/w) */
#define MCFSIM_CSCR3 0xae /* CS 3 Control reg (r/w) */
-#define MCFSIM_CSAR4 0xb0 /* CS 4 Adress reg (r/w) */
+#define MCFSIM_CSAR4 0xb0 /* CS 4 Address reg (r/w) */
#define MCFSIM_CSMR4 0xb4 /* CS 4 Mask reg (r/w) */
#define MCFSIM_CSCR4 0xba /* CS 4 Control reg (r/w) */
-#define MCFSIM_CSAR5 0xbc /* CS 5 Adress reg (r/w) */
+#define MCFSIM_CSAR5 0xbc /* CS 5 Address reg (r/w) */
#define MCFSIM_CSMR5 0xc0 /* CS 5 Mask reg (r/w) */
#define MCFSIM_CSCR5 0xc6 /* CS 5 Control reg (r/w) */
-#define MCFSIM_CSAR6 0xc8 /* CS 6 Adress reg (r/w) */
+#define MCFSIM_CSAR6 0xc8 /* CS 6 Address reg (r/w) */
#define MCFSIM_CSMR6 0xcc /* CS 6 Mask reg (r/w) */
#define MCFSIM_CSCR6 0xd2 /* CS 6 Control reg (r/w) */
-#define MCFSIM_CSAR7 0xd4 /* CS 7 Adress reg (r/w) */
+#define MCFSIM_CSAR7 0xd4 /* CS 7 Address reg (r/w) */
#define MCFSIM_CSMR7 0xd8 /* CS 7 Mask reg (r/w) */
#define MCFSIM_CSCR7 0xde /* CS 7 Control reg (r/w) */
#endif /* CONFIG_OLDMASK */
diff --git a/include/asm-m68knommu/m5407sim.h b/include/asm-m68knommu/m5407sim.h
index 75dcdacdb298..cc22c4a53005 100644
--- a/include/asm-m68knommu/m5407sim.h
+++ b/include/asm-m68knommu/m5407sim.h
@@ -48,22 +48,22 @@
#define MCFSIM_CSMR1 0x90 /* CS 1 Mask reg (r/w) */
#define MCFSIM_CSCR1 0x96 /* CS 1 Control reg (r/w) */
-#define MCFSIM_CSAR2 0x98 /* CS 2 Adress reg (r/w) */
+#define MCFSIM_CSAR2 0x98 /* CS 2 Address reg (r/w) */
#define MCFSIM_CSMR2 0x9c /* CS 2 Mask reg (r/w) */
#define MCFSIM_CSCR2 0xa2 /* CS 2 Control reg (r/w) */
-#define MCFSIM_CSAR3 0xa4 /* CS 3 Adress reg (r/w) */
+#define MCFSIM_CSAR3 0xa4 /* CS 3 Address reg (r/w) */
#define MCFSIM_CSMR3 0xa8 /* CS 3 Mask reg (r/w) */
#define MCFSIM_CSCR3 0xae /* CS 3 Control reg (r/w) */
-#define MCFSIM_CSAR4 0xb0 /* CS 4 Adress reg (r/w) */
+#define MCFSIM_CSAR4 0xb0 /* CS 4 Address reg (r/w) */
#define MCFSIM_CSMR4 0xb4 /* CS 4 Mask reg (r/w) */
#define MCFSIM_CSCR4 0xba /* CS 4 Control reg (r/w) */
-#define MCFSIM_CSAR5 0xbc /* CS 5 Adress reg (r/w) */
+#define MCFSIM_CSAR5 0xbc /* CS 5 Address reg (r/w) */
#define MCFSIM_CSMR5 0xc0 /* CS 5 Mask reg (r/w) */
#define MCFSIM_CSCR5 0xc6 /* CS 5 Control reg (r/w) */
-#define MCFSIM_CSAR6 0xc8 /* CS 6 Adress reg (r/w) */
+#define MCFSIM_CSAR6 0xc8 /* CS 6 Address reg (r/w) */
#define MCFSIM_CSMR6 0xcc /* CS 6 Mask reg (r/w) */
#define MCFSIM_CSCR6 0xd2 /* CS 6 Control reg (r/w) */
-#define MCFSIM_CSAR7 0xd4 /* CS 7 Adress reg (r/w) */
+#define MCFSIM_CSAR7 0xd4 /* CS 7 Address reg (r/w) */
#define MCFSIM_CSMR7 0xd8 /* CS 7 Mask reg (r/w) */
#define MCFSIM_CSCR7 0xde /* CS 7 Control reg (r/w) */
diff --git a/include/asm-m68knommu/m68360_regs.h b/include/asm-m68knommu/m68360_regs.h
index a3f8cc8a4a84..d57217ca4f27 100644
--- a/include/asm-m68knommu/m68360_regs.h
+++ b/include/asm-m68knommu/m68360_regs.h
@@ -138,7 +138,7 @@
#define CICR_SCC_SCC3 ((uint)0x00200000) /* SCC3 @ SCCc */
#define CICR_SCD_SCC4 ((uint)0x00c00000) /* SCC4 @ SCCd */
-#define CICR_IRL_MASK ((uint)0x0000e000) /* Core interrrupt */
+#define CICR_IRL_MASK ((uint)0x0000e000) /* Core interrupt */
#define CICR_HP_MASK ((uint)0x00001f00) /* Hi-pri int. */
#define CICR_VBA_MASK ((uint)0x000000e0) /* Vector Base Address */
#define CICR_SPS ((uint)0x00000001) /* SCC Spread */
diff --git a/include/asm-m68knommu/mcfne.h b/include/asm-m68knommu/mcfne.h
index c920ccdb61fe..431f63aadd0e 100644
--- a/include/asm-m68knommu/mcfne.h
+++ b/include/asm-m68knommu/mcfne.h
@@ -60,17 +60,6 @@
#define NE2000_BYTE volatile unsigned char
#endif
-#if defined(CONFIG_CFV240)
-#define NE2000_ADDR 0x40010000
-#define NE2000_ADDR1 0x40010001
-#define NE2000_ODDOFFSET 0x00000000
-#define NE2000_IRQ 1
-#define NE2000_IRQ_VECTOR 0x19
-#define NE2000_IRQ_PRIORITY 2
-#define NE2000_IRQ_LEVEL 1
-#define NE2000_BYTE volatile unsigned char
-#endif
-
#if defined(CONFIG_M5307C3)
#define NE2000_ADDR 0x40000300
#define NE2000_ODDOFFSET 0x00010000
@@ -173,13 +162,8 @@ void ne2000_outsw(unsigned int addr, void *vbuf, unsigned long len);
* On most NE2000 implementations on ColdFire boards the chip is
* mapped in kinda funny, due to its ISA heritage.
*/
-#ifdef CONFIG_CFV240
-#define NE2000_PTR(addr) (NE2000_ADDR + ((addr & 0x3f) << 1) + 1)
-#define NE2000_DATA_PTR(addr) (NE2000_ADDR + ((addr & 0x3f) << 1))
-#else
#define NE2000_PTR(addr) ((addr&0x1)?(NE2000_ODDOFFSET+addr-1):(addr))
#define NE2000_DATA_PTR(addr) (addr)
-#endif
void ne2000_outb(unsigned int val, unsigned int addr)
@@ -285,17 +269,6 @@ void ne2000_irqsetup(int irq)
}
#endif
-#if defined(CONFIG_CFV240)
-void ne2000_irqsetup(int irq)
-{
- volatile unsigned char *icrp;
-
- icrp = (volatile unsigned char *) (MCF_MBAR + MCFSIM_ICR1);
- *icrp = MCFSIM_ICR_LEVEL1 | MCFSIM_ICR_PRI2 | MCFSIM_ICR_AUTOVEC;
- mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_EINT1);
-}
-#endif
-
#if defined(CONFIG_M5206e) && defined(CONFIG_NETtel)
void ne2000_irqsetup(int irq)
{
diff --git a/include/asm-m68knommu/mcfsim.h b/include/asm-m68knommu/mcfsim.h
index 1074ae717f74..da3f2ceff3a4 100644
--- a/include/asm-m68knommu/mcfsim.h
+++ b/include/asm-m68knommu/mcfsim.h
@@ -17,9 +17,7 @@
* Include 5204, 5206/e, 5235, 5249, 5270/5271, 5272, 5280/5282,
* 5307 or 5407 specific addresses.
*/
-#if defined(CONFIG_M5204)
-#include <asm/m5204sim.h>
-#elif defined(CONFIG_M5206) || defined(CONFIG_M5206e)
+#if defined(CONFIG_M5206) || defined(CONFIG_M5206e)
#include <asm/m5206sim.h>
#elif defined(CONFIG_M520x)
#include <asm/m520xsim.h>
diff --git a/include/asm-m68knommu/mcftimer.h b/include/asm-m68knommu/mcftimer.h
index 6f4d796e03db..0f90f6d2227a 100644
--- a/include/asm-m68knommu/mcftimer.h
+++ b/include/asm-m68knommu/mcftimer.h
@@ -16,7 +16,7 @@
/*
* Get address specific defines for this ColdFire member.
*/
-#if defined(CONFIG_M5204) || defined(CONFIG_M5206) || defined(CONFIG_M5206e)
+#if defined(CONFIG_M5206) || defined(CONFIG_M5206e)
#define MCFTIMER_BASE1 0x100 /* Base address of TIMER1 */
#define MCFTIMER_BASE2 0x120 /* Base address of TIMER2 */
#elif defined(CONFIG_M5272)
diff --git a/include/asm-m68knommu/mcfuart.h b/include/asm-m68knommu/mcfuart.h
index 1319a81814b1..ef2293873612 100644
--- a/include/asm-m68knommu/mcfuart.h
+++ b/include/asm-m68knommu/mcfuart.h
@@ -19,7 +19,7 @@
#if defined(CONFIG_M5272)
#define MCFUART_BASE1 0x100 /* Base address of UART1 */
#define MCFUART_BASE2 0x140 /* Base address of UART2 */
-#elif defined(CONFIG_M5204) || defined(CONFIG_M5206) || defined(CONFIG_M5206e)
+#elif defined(CONFIG_M5206) || defined(CONFIG_M5206e)
#if defined(CONFIG_NETtel)
#define MCFUART_BASE1 0x180 /* Base address of UART1 */
#define MCFUART_BASE2 0x140 /* Base address of UART2 */
@@ -71,7 +71,7 @@ struct mcf_platform_uart {
#define MCFUART_UTB 0x0c /* Transmit Buffer (w) */
#define MCFUART_UIPCR 0x10 /* Input Port Change (r) */
#define MCFUART_UACR 0x10 /* Auxiliary Control (w) */
-#define MCFUART_UISR 0x14 /* Interrup Status (r) */
+#define MCFUART_UISR 0x14 /* Interrupt Status (r) */
#define MCFUART_UIMR 0x14 /* Interrupt Mask (w) */
#define MCFUART_UBG1 0x18 /* Baud Rate MSB (r/w) */
#define MCFUART_UBG2 0x1c /* Baud Rate LSB (r/w) */
diff --git a/include/asm-m68knommu/system.h b/include/asm-m68knommu/system.h
index 15b4c7d45c94..ee2dc07bae0e 100644
--- a/include/asm-m68knommu/system.h
+++ b/include/asm-m68knommu/system.h
@@ -207,23 +207,6 @@ cmpxchg(volatile int *p, int old, int new)
}
-#ifdef CONFIG_M68332
-#define HARD_RESET_NOW() ({ \
- local_irq_disable(); \
- asm(" \
- movew #0x0000, 0xfffa6a; \
- reset; \
- /*movew #0x1557, 0xfffa44;*/ \
- /*movew #0x0155, 0xfffa46;*/ \
- moveal #0, %a0; \
- movec %a0, %vbr; \
- moveal 0, %sp; \
- moveal 4, %a0; \
- jmp (%a0); \
- "); \
-})
-#endif
-
#if defined( CONFIG_M68328 ) || defined( CONFIG_M68EZ328 ) || \
defined (CONFIG_M68360) || defined( CONFIG_M68VZ328 )
#define HARD_RESET_NOW() ({ \
generated by cgit v1.2.3 (git 2.39.0) at 2025-02-08 14:29:09 +0300