diff options
Diffstat (limited to 'drivers/spi/spi-imx.c')
| -rw-r--r-- | drivers/spi/spi-imx.c | 35 |
1 files changed, 29 insertions, 6 deletions
diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c index f63cb30f9010..deb782f6556c 100644 --- a/drivers/spi/spi-imx.c +++ b/drivers/spi/spi-imx.c @@ -186,17 +186,19 @@ static unsigned int spi_imx_clkdiv_1(unsigned int fin, /* MX1, MX31, MX35, MX51 CSPI */ static unsigned int spi_imx_clkdiv_2(unsigned int fin, - unsigned int fspi) + unsigned int fspi, unsigned int *fres) { int i, div = 4; for (i = 0; i < 7; i++) { if (fspi * div >= fin) - return i; + goto out; div <<= 1; } - return 7; +out: + *fres = fin / div; + return i; } static int spi_imx_bytes_per_word(const int bpw) @@ -453,6 +455,9 @@ static void mx51_ecspi_reset(struct spi_imx_data *spi_imx) #define MX31_CSPISTATUS 0x14 #define MX31_STATUS_RR (1 << 3) +#define MX31_CSPI_TESTREG 0x1C +#define MX31_TEST_LBC (1 << 14) + /* These functions also work for the i.MX35, but be aware that * the i.MX35 has a slightly different register layout for bits * we do not use here. @@ -482,9 +487,11 @@ static int mx31_config(struct spi_device *spi, struct spi_imx_config *config) { struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master); unsigned int reg = MX31_CSPICTRL_ENABLE | MX31_CSPICTRL_MASTER; + unsigned int clk; - reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, config->speed_hz) << + reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, config->speed_hz, &clk) << MX31_CSPICTRL_DR_SHIFT; + spi_imx->spi_bus_clk = clk; if (is_imx35_cspi(spi_imx)) { reg |= (config->bpw - 1) << MX35_CSPICTRL_BL_SHIFT; @@ -506,6 +513,13 @@ static int mx31_config(struct spi_device *spi, struct spi_imx_config *config) writel(reg, spi_imx->base + MXC_CSPICTRL); + reg = readl(spi_imx->base + MX31_CSPI_TESTREG); + if (spi->mode & SPI_LOOP) + reg |= MX31_TEST_LBC; + else + reg &= ~MX31_TEST_LBC; + writel(reg, spi_imx->base + MX31_CSPI_TESTREG); + return 0; } @@ -625,9 +639,12 @@ static int mx1_config(struct spi_device *spi, struct spi_imx_config *config) { struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master); unsigned int reg = MX1_CSPICTRL_ENABLE | MX1_CSPICTRL_MASTER; + unsigned int clk; - reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, config->speed_hz) << + reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, config->speed_hz, &clk) << MX1_CSPICTRL_DR_SHIFT; + spi_imx->spi_bus_clk = clk; + reg |= config->bpw - 1; if (spi->mode & SPI_CPHA) @@ -1179,7 +1196,7 @@ static int spi_imx_probe(struct platform_device *pdev) spi_imx->bitbang.master->prepare_message = spi_imx_prepare_message; spi_imx->bitbang.master->unprepare_message = spi_imx_unprepare_message; spi_imx->bitbang.master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; - if (is_imx51_ecspi(spi_imx)) + if (is_imx35_cspi(spi_imx) || is_imx51_ecspi(spi_imx)) spi_imx->bitbang.master->mode_bits |= SPI_LOOP; init_completion(&spi_imx->xfer_done); @@ -1251,6 +1268,12 @@ static int spi_imx_probe(struct platform_device *pdev) goto out_clk_put; } + if (!master->cs_gpios) { + dev_err(&pdev->dev, "No CS GPIOs available\n"); + ret = -EINVAL; + goto out_clk_put; + } + for (i = 0; i < master->num_chipselect; i++) { if (!gpio_is_valid(master->cs_gpios[i])) continue; |