diff options
Diffstat (limited to 'drivers/pinctrl/sh-pfc/gpio.c')
-rw-r--r-- | drivers/pinctrl/sh-pfc/gpio.c | 31 |
1 files changed, 17 insertions, 14 deletions
diff --git a/drivers/pinctrl/sh-pfc/gpio.c b/drivers/pinctrl/sh-pfc/gpio.c index 80f641ee4dea..ba353735ecf2 100644 --- a/drivers/pinctrl/sh-pfc/gpio.c +++ b/drivers/pinctrl/sh-pfc/gpio.c @@ -21,7 +21,7 @@ struct sh_pfc_gpio_data_reg { const struct pinmux_data_reg *info; - unsigned long shadow; + u32 shadow; }; struct sh_pfc_gpio_pin { @@ -59,19 +59,20 @@ static void gpio_get_data_reg(struct sh_pfc_chip *chip, unsigned int offset, *bit = gpio_pin->dbit; } -static unsigned long gpio_read_data_reg(struct sh_pfc_chip *chip, - const struct pinmux_data_reg *dreg) +static u32 gpio_read_data_reg(struct sh_pfc_chip *chip, + const struct pinmux_data_reg *dreg) { - void __iomem *mem = dreg->reg - chip->mem->phys + chip->mem->virt; + phys_addr_t address = dreg->reg; + void __iomem *mem = address - chip->mem->phys + chip->mem->virt; return sh_pfc_read_raw_reg(mem, dreg->reg_width); } static void gpio_write_data_reg(struct sh_pfc_chip *chip, - const struct pinmux_data_reg *dreg, - unsigned long value) + const struct pinmux_data_reg *dreg, u32 value) { - void __iomem *mem = dreg->reg - chip->mem->phys + chip->mem->virt; + phys_addr_t address = dreg->reg; + void __iomem *mem = address - chip->mem->phys + chip->mem->virt; sh_pfc_write_raw_reg(mem, dreg->reg_width, value); } @@ -85,7 +86,7 @@ static void gpio_setup_data_reg(struct sh_pfc_chip *chip, unsigned idx) unsigned int bit; unsigned int i; - for (i = 0, dreg = pfc->info->data_regs; dreg->reg; ++i, ++dreg) { + for (i = 0, dreg = pfc->info->data_regs; dreg->reg_width; ++i, ++dreg) { for (bit = 0; bit < dreg->reg_width; bit++) { if (dreg->enum_ids[bit] == pin->enum_id) { gpio_pin->dreg = i; @@ -154,17 +155,17 @@ static void gpio_pin_set_value(struct sh_pfc_chip *chip, unsigned offset, int value) { struct sh_pfc_gpio_data_reg *reg; - unsigned long pos; unsigned int bit; + unsigned int pos; gpio_get_data_reg(chip, offset, ®, &bit); pos = reg->info->reg_width - (bit + 1); if (value) - set_bit(pos, ®->shadow); + reg->shadow |= BIT(pos); else - clear_bit(pos, ®->shadow); + reg->shadow &= ~BIT(pos); gpio_write_data_reg(chip, reg->info, reg->shadow); } @@ -186,8 +187,8 @@ static int gpio_pin_get(struct gpio_chip *gc, unsigned offset) { struct sh_pfc_chip *chip = gpio_to_pfc_chip(gc); struct sh_pfc_gpio_data_reg *reg; - unsigned long pos; unsigned int bit; + unsigned int pos; gpio_get_data_reg(chip, offset, ®, &bit); @@ -341,6 +342,7 @@ sh_pfc_add_gpiochip(struct sh_pfc *pfc, int(*setup)(struct sh_pfc_chip *), int sh_pfc_register_gpiochip(struct sh_pfc *pfc) { struct sh_pfc_chip *chip; + phys_addr_t address; unsigned int i; int ret; @@ -352,11 +354,12 @@ int sh_pfc_register_gpiochip(struct sh_pfc *pfc) * that covers the data registers. In that case don't try to handle * GPIOs. */ + address = pfc->info->data_regs[0].reg; for (i = 0; i < pfc->num_windows; ++i) { struct sh_pfc_window *window = &pfc->windows[i]; - if (pfc->info->data_regs[0].reg >= window->phys && - pfc->info->data_regs[0].reg < window->phys + window->size) + if (address >= window->phys && + address < window->phys + window->size) break; } |