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path: root/drivers/pinctrl/pinctrl-tegra30.c
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Diffstat (limited to 'drivers/pinctrl/pinctrl-tegra30.c')
-rw-r--r--drivers/pinctrl/pinctrl-tegra30.c1287
1 files changed, 19 insertions, 1268 deletions
diff --git a/drivers/pinctrl/pinctrl-tegra30.c b/drivers/pinctrl/pinctrl-tegra30.c
index 2300deba25bd..41d24f5c2854 100644
--- a/drivers/pinctrl/pinctrl-tegra30.c
+++ b/drivers/pinctrl/pinctrl-tegra30.c
@@ -25,7 +25,7 @@
* Most pins affected by the pinmux can also be GPIOs. Define these first.
* These must match how the GPIO driver names/numbers its pins.
*/
-#define _GPIO(offset) (offset)
+#define _GPIO(offset) (offset)
#define TEGRA_PIN_CLK_32K_OUT_PA0 _GPIO(0)
#define TEGRA_PIN_UART3_CTS_N_PA1 _GPIO(1)
@@ -277,8 +277,8 @@
#define TEGRA_PIN_PEE7 _GPIO(247)
/* All non-GPIO pins follow */
-#define NUM_GPIOS (TEGRA_PIN_PEE7 + 1)
-#define _PIN(offset) (NUM_GPIOS + (offset))
+#define NUM_GPIOS (TEGRA_PIN_PEE7 + 1)
+#define _PIN(offset) (NUM_GPIOS + (offset))
/* Non-GPIO pins */
#define TEGRA_PIN_CLK_32K_IN _PIN(0)
@@ -2015,1253 +2015,13 @@ enum tegra_mux {
TEGRA_MUX_VI_ALT2,
TEGRA_MUX_VI_ALT3,
};
-static const char * const blink_groups[] = {
- "clk_32k_out_pa0",
-};
-
-static const char * const cec_groups[] = {
- "hdmi_cec_pee3",
- "owr",
-};
-
-static const char * const clk_12m_out_groups[] = {
- "pv3",
-};
-
-static const char * const clk_32k_in_groups[] = {
- "clk_32k_in",
-};
-
-static const char * const core_pwr_req_groups[] = {
- "core_pwr_req",
-};
-
-static const char * const cpu_pwr_req_groups[] = {
- "cpu_pwr_req",
-};
-
-static const char * const crt_groups[] = {
- "crt_hsync_pv6",
- "crt_vsync_pv7",
-};
-
-static const char * const dap_groups[] = {
- "clk1_req_pee2",
- "clk2_req_pcc5",
-};
-
-static const char * const ddr_groups[] = {
- "vi_d0_pt4",
- "vi_d1_pd5",
- "vi_d10_pt2",
- "vi_d11_pt3",
- "vi_d2_pl0",
- "vi_d3_pl1",
- "vi_d4_pl2",
- "vi_d5_pl3",
- "vi_d6_pl4",
- "vi_d7_pl5",
- "vi_d8_pl6",
- "vi_d9_pl7",
- "vi_hsync_pd7",
- "vi_vsync_pd6",
-};
-
-static const char * const dev3_groups[] = {
- "clk3_req_pee1",
-};
-
-static const char * const displaya_groups[] = {
- "dap3_din_pp1",
- "dap3_dout_pp2",
- "dap3_fs_pp0",
- "dap3_sclk_pp3",
- "pbb3",
- "pbb4",
- "pbb5",
- "pbb6",
- "lcd_cs0_n_pn4",
- "lcd_cs1_n_pw0",
- "lcd_d0_pe0",
- "lcd_d1_pe1",
- "lcd_d10_pf2",
- "lcd_d11_pf3",
- "lcd_d12_pf4",
- "lcd_d13_pf5",
- "lcd_d14_pf6",
- "lcd_d15_pf7",
- "lcd_d16_pm0",
- "lcd_d17_pm1",
- "lcd_d18_pm2",
- "lcd_d19_pm3",
- "lcd_d2_pe2",
- "lcd_d20_pm4",
- "lcd_d21_pm5",
- "lcd_d22_pm6",
- "lcd_d23_pm7",
- "lcd_d3_pe3",
- "lcd_d4_pe4",
- "lcd_d5_pe5",
- "lcd_d6_pe6",
- "lcd_d7_pe7",
- "lcd_d8_pf0",
- "lcd_d9_pf1",
- "lcd_dc0_pn6",
- "lcd_dc1_pd2",
- "lcd_de_pj1",
- "lcd_hsync_pj3",
- "lcd_m1_pw1",
- "lcd_pclk_pb3",
- "lcd_pwr0_pb2",
- "lcd_pwr1_pc1",
- "lcd_pwr2_pc6",
- "lcd_sck_pz4",
- "lcd_sdin_pz2",
- "lcd_sdout_pn5",
- "lcd_vsync_pj4",
- "lcd_wr_n_pz3",
-};
-
-static const char * const displayb_groups[] = {
- "dap3_din_pp1",
- "dap3_dout_pp2",
- "dap3_fs_pp0",
- "dap3_sclk_pp3",
- "pbb3",
- "pbb4",
- "pbb5",
- "pbb6",
- "lcd_cs0_n_pn4",
- "lcd_cs1_n_pw0",
- "lcd_d0_pe0",
- "lcd_d1_pe1",
- "lcd_d10_pf2",
- "lcd_d11_pf3",
- "lcd_d12_pf4",
- "lcd_d13_pf5",
- "lcd_d14_pf6",
- "lcd_d15_pf7",
- "lcd_d16_pm0",
- "lcd_d17_pm1",
- "lcd_d18_pm2",
- "lcd_d19_pm3",
- "lcd_d2_pe2",
- "lcd_d20_pm4",
- "lcd_d21_pm5",
- "lcd_d22_pm6",
- "lcd_d23_pm7",
- "lcd_d3_pe3",
- "lcd_d4_pe4",
- "lcd_d5_pe5",
- "lcd_d6_pe6",
- "lcd_d7_pe7",
- "lcd_d8_pf0",
- "lcd_d9_pf1",
- "lcd_dc0_pn6",
- "lcd_dc1_pd2",
- "lcd_de_pj1",
- "lcd_hsync_pj3",
- "lcd_m1_pw1",
- "lcd_pclk_pb3",
- "lcd_pwr0_pb2",
- "lcd_pwr1_pc1",
- "lcd_pwr2_pc6",
- "lcd_sck_pz4",
- "lcd_sdin_pz2",
- "lcd_sdout_pn5",
- "lcd_vsync_pj4",
- "lcd_wr_n_pz3",
-};
-
-static const char * const dtv_groups[] = {
- "gmi_a17_pb0",
- "gmi_a18_pb1",
- "gmi_cs0_n_pj0",
- "gmi_cs1_n_pj2",
-};
-
-static const char * const extperiph1_groups[] = {
- "clk1_out_pw4",
-};
-
-static const char * const extperiph2_groups[] = {
- "clk2_out_pw5",
-};
-
-static const char * const extperiph3_groups[] = {
- "clk3_out_pee0",
-};
-
-static const char * const gmi_groups[] = {
- "dap1_din_pn1",
- "dap1_dout_pn2",
- "dap1_fs_pn0",
- "dap1_sclk_pn3",
- "dap2_din_pa4",
- "dap2_dout_pa5",
- "dap2_fs_pa2",
- "dap2_sclk_pa3",
- "dap4_din_pp5",
- "dap4_dout_pp6",
- "dap4_fs_pp4",
- "dap4_sclk_pp7",
- "gen2_i2c_scl_pt5",
- "gen2_i2c_sda_pt6",
- "gmi_a16_pj7",
- "gmi_a17_pb0",
- "gmi_a18_pb1",
- "gmi_a19_pk7",
- "gmi_ad0_pg0",
- "gmi_ad1_pg1",
- "gmi_ad10_ph2",
- "gmi_ad11_ph3",
- "gmi_ad12_ph4",
- "gmi_ad13_ph5",
- "gmi_ad14_ph6",
- "gmi_ad15_ph7",
- "gmi_ad2_pg2",
- "gmi_ad3_pg3",
- "gmi_ad4_pg4",
- "gmi_ad5_pg5",
- "gmi_ad6_pg6",
- "gmi_ad7_pg7",
- "gmi_ad8_ph0",
- "gmi_ad9_ph1",
- "gmi_adv_n_pk0",
- "gmi_clk_pk1",
- "gmi_cs0_n_pj0",
- "gmi_cs1_n_pj2",
- "gmi_cs2_n_pk3",
- "gmi_cs3_n_pk4",
- "gmi_cs4_n_pk2",
- "gmi_cs6_n_pi3",
- "gmi_cs7_n_pi6",
- "gmi_dqs_pi2",
- "gmi_iordy_pi5",
- "gmi_oe_n_pi1",
- "gmi_rst_n_pi4",
- "gmi_wait_pi7",
- "gmi_wp_n_pc7",
- "gmi_wr_n_pi0",
- "pu0",
- "pu1",
- "pu2",
- "pu3",
- "pu4",
- "pu5",
- "pu6",
- "sdmmc4_clk_pcc4",
- "sdmmc4_cmd_pt7",
- "sdmmc4_dat0_paa0",
- "sdmmc4_dat1_paa1",
- "sdmmc4_dat2_paa2",
- "sdmmc4_dat3_paa3",
- "sdmmc4_dat4_paa4",
- "sdmmc4_dat5_paa5",
- "sdmmc4_dat6_paa6",
- "sdmmc4_dat7_paa7",
- "spi1_cs0_n_px6",
- "spi1_mosi_px4",
- "spi1_sck_px5",
- "spi2_cs0_n_px3",
- "spi2_miso_px1",
- "spi2_mosi_px0",
- "spi2_sck_px2",
- "uart2_cts_n_pj5",
- "uart2_rts_n_pj6",
- "uart3_cts_n_pa1",
- "uart3_rts_n_pc0",
- "uart3_rxd_pw7",
- "uart3_txd_pw6",
-};
-
-static const char * const gmi_alt_groups[] = {
- "gmi_a16_pj7",
- "gmi_cs3_n_pk4",
- "gmi_cs7_n_pi6",
- "gmi_wp_n_pc7",
-};
-
-static const char * const hda_groups[] = {
- "clk1_req_pee2",
- "dap1_din_pn1",
- "dap1_dout_pn2",
- "dap1_fs_pn0",
- "dap1_sclk_pn3",
- "dap2_din_pa4",
- "dap2_dout_pa5",
- "dap2_fs_pa2",
- "dap2_sclk_pa3",
- "pex_l0_clkreq_n_pdd2",
- "pex_l0_prsnt_n_pdd0",
- "pex_l0_rst_n_pdd1",
- "pex_l1_clkreq_n_pdd6",
- "pex_l1_prsnt_n_pdd4",
- "pex_l1_rst_n_pdd5",
- "pex_l2_clkreq_n_pcc7",
- "pex_l2_prsnt_n_pdd7",
- "pex_l2_rst_n_pcc6",
- "pex_wake_n_pdd3",
- "spdif_in_pk6",
-};
-
-static const char * const hdcp_groups[] = {
- "gen2_i2c_scl_pt5",
- "gen2_i2c_sda_pt6",
- "lcd_pwr0_pb2",
- "lcd_pwr2_pc6",
- "lcd_sck_pz4",
- "lcd_sdout_pn5",
- "lcd_wr_n_pz3",
-};
-
-static const char * const hdmi_groups[] = {
- "hdmi_int_pn7",
-};
-
-static const char * const hsi_groups[] = {
- "ulpi_data0_po1",
- "ulpi_data1_po2",
- "ulpi_data2_po3",
- "ulpi_data3_po4",
- "ulpi_data4_po5",
- "ulpi_data5_po6",
- "ulpi_data6_po7",
- "ulpi_data7_po0",
-};
-
-static const char * const i2c1_groups[] = {
- "gen1_i2c_scl_pc4",
- "gen1_i2c_sda_pc5",
- "spdif_in_pk6",
- "spdif_out_pk5",
- "spi2_cs1_n_pw2",
- "spi2_cs2_n_pw3",
-};
-
-static const char * const i2c2_groups[] = {
- "gen2_i2c_scl_pt5",
- "gen2_i2c_sda_pt6",
-};
-
-static const char * const i2c3_groups[] = {
- "cam_i2c_scl_pbb1",
- "cam_i2c_sda_pbb2",
- "sdmmc4_cmd_pt7",
- "sdmmc4_dat4_paa4",
-};
-
-static const char * const i2c4_groups[] = {
- "ddc_scl_pv4",
- "ddc_sda_pv5",
-};
-
-static const char * const i2cpwr_groups[] = {
- "pwr_i2c_scl_pz6",
- "pwr_i2c_sda_pz7",
-};
-
-static const char * const i2s0_groups[] = {
- "dap1_din_pn1",
- "dap1_dout_pn2",
- "dap1_fs_pn0",
- "dap1_sclk_pn3",
-};
-
-static const char * const i2s1_groups[] = {
- "dap2_din_pa4",
- "dap2_dout_pa5",
- "dap2_fs_pa2",
- "dap2_sclk_pa3",
-};
-
-static const char * const i2s2_groups[] = {
- "dap3_din_pp1",
- "dap3_dout_pp2",
- "dap3_fs_pp0",
- "dap3_sclk_pp3",
-};
-
-static const char * const i2s3_groups[] = {
- "dap4_din_pp5",
- "dap4_dout_pp6",
- "dap4_fs_pp4",
- "dap4_sclk_pp7",
-};
-
-static const char * const i2s4_groups[] = {
- "pbb0",
- "pbb7",
- "pcc1",
- "pcc2",
- "sdmmc4_dat4_paa4",
- "sdmmc4_dat5_paa5",
- "sdmmc4_dat6_paa6",
- "sdmmc4_dat7_paa7",
-};
-
-static const char * const invalid_groups[] = {
- "kb_row3_pr3",
- "sdmmc4_clk_pcc4",
-};
-
-static const char * const kbc_groups[] = {
- "kb_col0_pq0",
- "kb_col1_pq1",
- "kb_col2_pq2",
- "kb_col3_pq3",
- "kb_col4_pq4",
- "kb_col5_pq5",
- "kb_col6_pq6",
- "kb_col7_pq7",
- "kb_row0_pr0",
- "kb_row1_pr1",
- "kb_row10_ps2",
- "kb_row11_ps3",
- "kb_row12_ps4",
- "kb_row13_ps5",
- "kb_row14_ps6",
- "kb_row15_ps7",
- "kb_row2_pr2",
- "kb_row3_pr3",
- "kb_row4_pr4",
- "kb_row5_pr5",
- "kb_row6_pr6",
- "kb_row7_pr7",
- "kb_row8_ps0",
- "kb_row9_ps1",
-};
-
-static const char * const mio_groups[] = {
- "kb_col6_pq6",
- "kb_col7_pq7",
- "kb_row10_ps2",
- "kb_row11_ps3",
- "kb_row12_ps4",
- "kb_row13_ps5",
- "kb_row14_ps6",
- "kb_row15_ps7",
- "kb_row6_pr6",
- "kb_row7_pr7",
- "kb_row8_ps0",
- "kb_row9_ps1",
-};
-
-static const char * const nand_groups[] = {
- "gmi_ad0_pg0",
- "gmi_ad1_pg1",
- "gmi_ad10_ph2",
- "gmi_ad11_ph3",
- "gmi_ad12_ph4",
- "gmi_ad13_ph5",
- "gmi_ad14_ph6",
- "gmi_ad15_ph7",
- "gmi_ad2_pg2",
- "gmi_ad3_pg3",
- "gmi_ad4_pg4",
- "gmi_ad5_pg5",
- "gmi_ad6_pg6",
- "gmi_ad7_pg7",
- "gmi_ad8_ph0",
- "gmi_ad9_ph1",
- "gmi_adv_n_pk0",
- "gmi_clk_pk1",
- "gmi_cs0_n_pj0",
- "gmi_cs1_n_pj2",
- "gmi_cs2_n_pk3",
- "gmi_cs3_n_pk4",
- "gmi_cs4_n_pk2",
- "gmi_cs6_n_pi3",
- "gmi_cs7_n_pi6",
- "gmi_dqs_pi2",
- "gmi_iordy_pi5",
- "gmi_oe_n_pi1",
- "gmi_rst_n_pi4",
- "gmi_wait_pi7",
- "gmi_wp_n_pc7",
- "gmi_wr_n_pi0",
- "kb_col0_pq0",
- "kb_col1_pq1",
- "kb_col2_pq2",
- "kb_col3_pq3",
- "kb_col4_pq4",
- "kb_col5_pq5",
- "kb_col6_pq6",
- "kb_col7_pq7",
- "kb_row0_pr0",
- "kb_row1_pr1",
- "kb_row10_ps2",
- "kb_row11_ps3",
- "kb_row12_ps4",
- "kb_row13_ps5",
- "kb_row14_ps6",
- "kb_row15_ps7",
- "kb_row2_pr2",
- "kb_row3_pr3",
- "kb_row4_pr4",
- "kb_row5_pr5",
- "kb_row6_pr6",
- "kb_row7_pr7",
- "kb_row8_ps0",
- "kb_row9_ps1",
- "sdmmc4_clk_pcc4",
- "sdmmc4_cmd_pt7",
-};
-
-static const char * const nand_alt_groups[] = {
- "gmi_cs6_n_pi3",
- "gmi_cs7_n_pi6",
- "gmi_rst_n_pi4",
-};
-
-static const char * const owr_groups[] = {
- "pu0",
- "pv2",
- "kb_row5_pr5",
- "owr",
-};
-
-static const char * const pcie_groups[] = {
- "pex_l0_clkreq_n_pdd2",
- "pex_l0_prsnt_n_pdd0",
- "pex_l0_rst_n_pdd1",
- "pex_l1_clkreq_n_pdd6",
- "pex_l1_prsnt_n_pdd4",
- "pex_l1_rst_n_pdd5",
- "pex_l2_clkreq_n_pcc7",
- "pex_l2_prsnt_n_pdd7",
- "pex_l2_rst_n_pcc6",
- "pex_wake_n_pdd3",
-};
-
-static const char * const pwm0_groups[] = {
- "gmi_ad8_ph0",
- "pu3",
- "sdmmc3_dat3_pb4",
- "sdmmc3_dat5_pd0",
- "uart3_rts_n_pc0",
-};
-
-static const char * const pwm1_groups[] = {
- "gmi_ad9_ph1",
- "pu4",
- "sdmmc3_dat2_pb5",
- "sdmmc3_dat4_pd1",
-};
-
-static const char * const pwm2_groups[] = {
- "gmi_ad10_ph2",
- "pu5",
- "sdmmc3_clk_pa6",
-};
-
-static const char * const pwm3_groups[] = {
- "gmi_ad11_ph3",
- "pu6",
- "sdmmc3_cmd_pa7",
-};
-
-static const char * const pwr_int_n_groups[] = {
- "pwr_int_n",
-};
-
-static const char * const rsvd1_groups[] = {
- "gmi_ad0_pg0",
- "gmi_ad1_pg1",
- "gmi_ad12_ph4",
- "gmi_ad13_ph5",
- "gmi_ad14_ph6",
- "gmi_ad15_ph7",
- "gmi_ad2_pg2",
- "gmi_ad3_pg3",
- "gmi_ad4_pg4",
- "gmi_ad5_pg5",
- "gmi_ad6_pg6",
- "gmi_ad7_pg7",
- "gmi_adv_n_pk0",
- "gmi_clk_pk1",
- "gmi_cs0_n_pj0",
- "gmi_cs1_n_pj2",
- "gmi_cs2_n_pk3",
- "gmi_cs3_n_pk4",
- "gmi_cs4_n_pk2",
- "gmi_dqs_pi2",
- "gmi_iordy_pi5",
- "gmi_oe_n_pi1",
- "gmi_wait_pi7",
- "gmi_wp_n_pc7",
- "gmi_wr_n_pi0",
- "pu1",
- "pu2",
- "pv0",
- "pv1",
- "sdmmc3_dat0_pb7",
- "sdmmc3_dat1_pb6",
- "sdmmc3_dat2_pb5",
- "sdmmc3_dat3_pb4",
- "vi_pclk_pt0",
-};
-
-static const char * const rsvd2_groups[] = {
- "clk1_out_pw4",
- "clk2_out_pw5",
- "clk2_req_pcc5",
- "clk3_out_pee0",
- "clk3_req_pee1",
- "clk_32k_in",
- "clk_32k_out_pa0",
- "core_pwr_req",
- "cpu_pwr_req",
- "crt_hsync_pv6",
- "crt_vsync_pv7",
- "dap3_din_pp1",
- "dap3_dout_pp2",
- "dap3_fs_pp0",
- "dap3_sclk_pp3",
- "dap4_din_pp5",
- "dap4_dout_pp6",
- "dap4_fs_pp4",
- "dap4_sclk_pp7",
- "ddc_scl_pv4",
- "ddc_sda_pv5",
- "gen1_i2c_scl_pc4",
- "gen1_i2c_sda_pc5",
- "pbb0",
- "pbb7",
- "pcc1",
- "pcc2",
- "pv0",
- "pv1",
- "pv2",
- "pv3",
- "hdmi_cec_pee3",
- "hdmi_int_pn7",
- "jtag_rtck_pu7",
- "pwr_i2c_scl_pz6",
- "pwr_i2c_sda_pz7",
- "pwr_int_n",
- "sdmmc1_clk_pz0",
- "sdmmc1_cmd_pz1",
- "sdmmc1_dat0_py7",
- "sdmmc1_dat1_py6",
- "sdmmc1_dat2_py5",
- "sdmmc1_dat3_py4",
- "sdmmc3_dat0_pb7",
- "sdmmc3_dat1_pb6",
- "sdmmc4_rst_n_pcc3",
- "spdif_out_pk5",
- "sys_clk_req_pz5",
- "uart3_cts_n_pa1",
- "uart3_rxd_pw7",
- "uart3_txd_pw6",
- "ulpi_clk_py0",
- "ulpi_dir_py1",
- "ulpi_nxt_py2",
- "ulpi_stp_py3",
- "vi_d0_pt4",
- "vi_d10_pt2",
- "vi_d11_pt3",
- "vi_hsync_pd7",
- "vi_vsync_pd6",
-};
-
-static const char * const rsvd3_groups[] = {
- "cam_i2c_scl_pbb1",
- "cam_i2c_sda_pbb2",
- "clk1_out_pw4",
- "clk1_req_pee2",
- "clk2_out_pw5",
- "clk2_req_pcc5",
- "clk3_out_pee0",
- "clk3_req_pee1",
- "clk_32k_in",
- "clk_32k_out_pa0",
- "core_pwr_req",
- "cpu_pwr_req",
- "crt_hsync_pv6",
- "crt_vsync_pv7",
- "dap2_din_pa4",
- "dap2_dout_pa5",
- "dap2_fs_pa2",
- "dap2_sclk_pa3",
- "ddc_scl_pv4",
- "ddc_sda_pv5",
- "gen1_i2c_scl_pc4",
- "gen1_i2c_sda_pc5",
- "pbb0",
- "pbb7",
- "pcc1",
- "pcc2",
- "pv0",
- "pv1",
- "pv2",
- "pv3",
- "hdmi_cec_pee3",
- "hdmi_int_pn7",
- "jtag_rtck_pu7",
- "kb_row0_pr0",
- "kb_row1_pr1",
- "kb_row2_pr2",
- "kb_row3_pr3",
- "lcd_d0_pe0",
- "lcd_d1_pe1",
- "lcd_d10_pf2",
- "lcd_d11_pf3",
- "lcd_d12_pf4",
- "lcd_d13_pf5",
- "lcd_d14_pf6",
- "lcd_d15_pf7",
- "lcd_d16_pm0",
- "lcd_d17_pm1",
- "lcd_d18_pm2",
- "lcd_d19_pm3",
- "lcd_d2_pe2",
- "lcd_d20_pm4",
- "lcd_d21_pm5",
- "lcd_d22_pm6",
- "lcd_d23_pm7",
- "lcd_d3_pe3",
- "lcd_d4_pe4",
- "lcd_d5_pe5",
- "lcd_d6_pe6",
- "lcd_d7_pe7",
- "lcd_d8_pf0",
- "lcd_d9_pf1",
- "lcd_dc0_pn6",
- "lcd_dc1_pd2",
- "lcd_de_pj1",
- "lcd_hsync_pj3",
- "lcd_m1_pw1",
- "lcd_pclk_pb3",
- "lcd_pwr1_pc1",
- "lcd_vsync_pj4",
- "owr",
- "pex_l0_clkreq_n_pdd2",
- "pex_l0_prsnt_n_pdd0",
- "pex_l0_rst_n_pdd1",
- "pex_l1_clkreq_n_pdd6",
- "pex_l1_prsnt_n_pdd4",
- "pex_l1_rst_n_pdd5",
- "pex_l2_clkreq_n_pcc7",
- "pex_l2_prsnt_n_pdd7",
- "pex_l2_rst_n_pcc6",
- "pex_wake_n_pdd3",
- "pwr_i2c_scl_pz6",
- "pwr_i2c_sda_pz7",
- "pwr_int_n",
- "sdmmc1_clk_pz0",
- "sdmmc1_cmd_pz1",
- "sdmmc4_rst_n_pcc3",
- "sys_clk_req_pz5",
-};
-
-static const char * const rsvd4_groups[] = {
- "clk1_out_pw4",
- "clk1_req_pee2",
- "clk2_out_pw5",
- "clk2_req_pcc5",
- "clk3_out_pee0",
- "clk3_req_pee1",
- "clk_32k_in",
- "clk_32k_out_pa0",
- "core_pwr_req",
- "cpu_pwr_req",
- "crt_hsync_pv6",
- "crt_vsync_pv7",
- "dap4_din_pp5",
- "dap4_dout_pp6",
- "dap4_fs_pp4",
- "dap4_sclk_pp7",
- "ddc_scl_pv4",
- "ddc_sda_pv5",
- "gen1_i2c_scl_pc4",
- "gen1_i2c_sda_pc5",
- "gen2_i2c_scl_pt5",
- "gen2_i2c_sda_pt6",
- "gmi_a19_pk7",
- "gmi_ad0_pg0",
- "gmi_ad1_pg1",
- "gmi_ad10_ph2",
- "gmi_ad11_ph3",
- "gmi_ad12_ph4",
- "gmi_ad13_ph5",
- "gmi_ad14_ph6",
- "gmi_ad15_ph7",
- "gmi_ad2_pg2",
- "gmi_ad3_pg3",
- "gmi_ad4_pg4",
- "gmi_ad5_pg5",
- "gmi_ad6_pg6",
- "gmi_ad7_pg7",
- "gmi_ad8_ph0",
- "gmi_ad9_ph1",
- "gmi_adv_n_pk0",
- "gmi_clk_pk1",
- "gmi_cs2_n_pk3",
- "gmi_cs4_n_pk2",
- "gmi_dqs_pi2",
- "gmi_iordy_pi5",
- "gmi_oe_n_pi1",
- "gmi_rst_n_pi4",
- "gmi_wait_pi7",
- "gmi_wr_n_pi0",
- "pcc2",
- "pu0",
- "pu1",
- "pu2",
- "pu3",
- "pu4",
- "pu5",
- "pu6",
- "pv0",
- "pv1",
- "pv2",
- "pv3",
- "hdmi_cec_pee3",
- "hdmi_int_pn7",
- "jtag_rtck_pu7",
- "kb_col2_pq2",
- "kb_col3_pq3",
- "kb_col4_pq4",
- "kb_col5_pq5",
- "kb_row0_pr0",
- "kb_row1_pr1",
- "kb_row2_pr2",
- "kb_row4_pr4",
- "lcd_cs0_n_pn4",
- "lcd_cs1_n_pw0",
- "lcd_d0_pe0",
- "lcd_d1_pe1",
- "lcd_d10_pf2",
- "lcd_d11_pf3",
- "lcd_d12_pf4",
- "lcd_d13_pf5",
- "lcd_d14_pf6",
- "lcd_d15_pf7",
- "lcd_d16_pm0",
- "lcd_d17_pm1",
- "lcd_d18_pm2",
- "lcd_d19_pm3",
- "lcd_d2_pe2",
- "lcd_d20_pm4",
- "lcd_d21_pm5",
- "lcd_d22_pm6",
- "lcd_d23_pm7",
- "lcd_d3_pe3",
- "lcd_d4_pe4",
- "lcd_d5_pe5",
- "lcd_d6_pe6",
- "lcd_d7_pe7",
- "lcd_d8_pf0",
- "lcd_d9_pf1",
- "lcd_dc0_pn6",
- "lcd_dc1_pd2",
- "lcd_de_pj1",
- "lcd_hsync_pj3",
- "lcd_m1_pw1",
- "lcd_pclk_pb3",
- "lcd_pwr1_pc1",
- "lcd_sdin_pz2",
- "lcd_vsync_pj4",
- "owr",
- "pex_l0_clkreq_n_pdd2",
- "pex_l0_prsnt_n_pdd0",
- "pex_l0_rst_n_pdd1",
- "pex_l1_clkreq_n_pdd6",
- "pex_l1_prsnt_n_pdd4",
- "pex_l1_rst_n_pdd5",
- "pex_l2_clkreq_n_pcc7",
- "pex_l2_prsnt_n_pdd7",
- "pex_l2_rst_n_pcc6",
- "pex_wake_n_pdd3",
- "pwr_i2c_scl_pz6",
- "pwr_i2c_sda_pz7",
- "pwr_int_n",
- "spi1_miso_px7",
- "sys_clk_req_pz5",
- "uart3_cts_n_pa1",
- "uart3_rts_n_pc0",
- "uart3_rxd_pw7",
- "uart3_txd_pw6",
- "vi_d0_pt4",
- "vi_d1_pd5",
- "vi_d10_pt2",
- "vi_d11_pt3",
- "vi_d2_pl0",
- "vi_d3_pl1",
- "vi_d4_pl2",
- "vi_d5_pl3",
- "vi_d6_pl4",
- "vi_d7_pl5",
- "vi_d8_pl6",
- "vi_d9_pl7",
- "vi_hsync_pd7",
- "vi_pclk_pt0",
- "vi_vsync_pd6",
-};
-
-static const char * const rtck_groups[] = {
- "jtag_rtck_pu7",
-};
-
-static const char * const sata_groups[] = {
- "gmi_cs6_n_pi3",
-};
-
-static const char * const sdmmc1_groups[] = {
- "sdmmc1_clk_pz0",
- "sdmmc1_cmd_pz1",
- "sdmmc1_dat0_py7",
- "sdmmc1_dat1_py6",
- "sdmmc1_dat2_py5",
- "sdmmc1_dat3_py4",
-};
-
-static const char * const sdmmc2_groups[] = {
- "dap1_din_pn1",
- "dap1_dout_pn2",
- "dap1_fs_pn0",
- "dap1_sclk_pn3",
- "kb_row10_ps2",
- "kb_row11_ps3",
- "kb_row12_ps4",
- "kb_row13_ps5",
- "kb_row14_ps6",
- "kb_row15_ps7",
- "kb_row6_pr6",
- "kb_row7_pr7",
- "kb_row8_ps0",
- "kb_row9_ps1",
- "spdif_in_pk6",
- "spdif_out_pk5",
- "vi_d1_pd5",
- "vi_d2_pl0",
- "vi_d3_pl1",
- "vi_d4_pl2",
- "vi_d5_pl3",
- "vi_d6_pl4",
- "vi_d7_pl5",
- "vi_d8_pl6",
- "vi_d9_pl7",
- "vi_pclk_pt0",
-};
-
-static const char * const sdmmc3_groups[] = {
- "sdmmc3_clk_pa6",
- "sdmmc3_cmd_pa7",
- "sdmmc3_dat0_pb7",
- "sdmmc3_dat1_pb6",
- "sdmmc3_dat2_pb5",
- "sdmmc3_dat3_pb4",
- "sdmmc3_dat4_pd1",
- "sdmmc3_dat5_pd0",
- "sdmmc3_dat6_pd3",
- "sdmmc3_dat7_pd4",
-};
-
-static const char * const sdmmc4_groups[] = {
- "cam_i2c_scl_pbb1",
- "cam_i2c_sda_pbb2",
- "cam_mclk_pcc0",
- "pbb0",
- "pbb3",
- "pbb4",
- "pbb5",
- "pbb6",
- "pbb7",
- "pcc1",
- "sdmmc4_clk_pcc4",
- "sdmmc4_cmd_pt7",
- "sdmmc4_dat0_paa0",
- "sdmmc4_dat1_paa1",
- "sdmmc4_dat2_paa2",
- "sdmmc4_dat3_paa3",
- "sdmmc4_dat4_paa4",
- "sdmmc4_dat5_paa5",
- "sdmmc4_dat6_paa6",
- "sdmmc4_dat7_paa7",
- "sdmmc4_rst_n_pcc3",
-};
-
-static const char * const spdif_groups[] = {
- "sdmmc3_dat6_pd3",
- "sdmmc3_dat7_pd4",
- "spdif_in_pk6",
- "spdif_out_pk5",
- "uart2_rxd_pc3",
- "uart2_txd_pc2",
-};
-
-static const char * const spi1_groups[] = {
- "spi1_cs0_n_px6",
- "spi1_miso_px7",
- "spi1_mosi_px4",
- "spi1_sck_px5",
- "ulpi_clk_py0",
- "ulpi_dir_py1",
- "ulpi_nxt_py2",
- "ulpi_stp_py3",
-};
-
-static const char * const spi2_groups[] = {
- "sdmmc3_cmd_pa7",
- "sdmmc3_dat4_pd1",
- "sdmmc3_dat5_pd0",
- "sdmmc3_dat6_pd3",
- "sdmmc3_dat7_pd4",
- "spi1_cs0_n_px6",
- "spi1_mosi_px4",
- "spi1_sck_px5",
- "spi2_cs0_n_px3",
- "spi2_cs1_n_pw2",
- "spi2_cs2_n_pw3",
- "spi2_miso_px1",
- "spi2_mosi_px0",
- "spi2_sck_px2",
- "ulpi_data4_po5",
- "ulpi_data5_po6",
- "ulpi_data6_po7",
- "ulpi_data7_po0",
-};
-
-static const char * const spi2_alt_groups[] = {
- "spi1_cs0_n_px6",
- "spi1_miso_px7",
- "spi1_mosi_px4",
- "spi1_sck_px5",
- "spi2_cs1_n_pw2",
- "spi2_cs2_n_pw3",
-};
-
-static const char * const spi3_groups[] = {
- "sdmmc3_clk_pa6",
- "sdmmc3_dat0_pb7",
- "sdmmc3_dat1_pb6",
- "sdmmc3_dat2_pb5",
- "sdmmc3_dat3_pb4",
- "sdmmc4_dat0_paa0",
- "sdmmc4_dat1_paa1",
- "sdmmc4_dat2_paa2",
- "sdmmc4_dat3_paa3",
- "spi1_miso_px7",
- "spi2_cs0_n_px3",
- "spi2_cs1_n_pw2",
- "spi2_cs2_n_pw3",
- "spi2_miso_px1",
- "spi2_mosi_px0",
- "spi2_sck_px2",
- "ulpi_data0_po1",
- "ulpi_data1_po2",
- "ulpi_data2_po3",
- "ulpi_data3_po4",
-};
-
-static const char * const spi4_groups[] = {
- "gmi_a16_pj7",
- "gmi_a17_pb0",
- "gmi_a18_pb1",
- "gmi_a19_pk7",
- "sdmmc3_dat4_pd1",
- "sdmmc3_dat5_pd0",
- "sdmmc3_dat6_pd3",
- "sdmmc3_dat7_pd4",
- "uart2_cts_n_pj5",
- "uart2_rts_n_pj6",
- "uart2_rxd_pc3",
- "uart2_txd_pc2",
-};
-
-static const char * const spi5_groups[] = {
- "lcd_cs0_n_pn4",
- "lcd_cs1_n_pw0",
- "lcd_pwr0_pb2",
- "lcd_pwr2_pc6",
- "lcd_sck_pz4",
- "lcd_sdin_pz2",
- "lcd_sdout_pn5",
- "lcd_wr_n_pz3",
-};
-
-static const char * const spi6_groups[] = {
- "spi2_cs0_n_px3",
- "spi2_miso_px1",
- "spi2_mosi_px0",
- "spi2_sck_px2",
-};
-
-static const char * const sysclk_groups[] = {
- "sys_clk_req_pz5",
-};
-
-static const char * const test_groups[] = {
- "kb_col0_pq0",
- "kb_col1_pq1",
-};
-
-static const char * const trace_groups[] = {
- "kb_col0_pq0",
- "kb_col1_pq1",
- "kb_col2_pq2",
- "kb_col3_pq3",
- "kb_col4_pq4",
- "kb_col5_pq5",
- "kb_col6_pq6",
- "kb_col7_pq7",
- "kb_row4_pr4",
- "kb_row5_pr5",
-};
-
-static const char * const uarta_groups[] = {
- "pu0",
- "pu1",
- "pu2",
- "pu3",
- "pu4",
- "pu5",
- "pu6",
- "sdmmc1_clk_pz0",
- "sdmmc1_cmd_pz1",
- "sdmmc1_dat0_py7",
- "sdmmc1_dat1_py6",
- "sdmmc1_dat2_py5",
- "sdmmc1_dat3_py4",
- "sdmmc3_clk_pa6",
- "sdmmc3_cmd_pa7",
- "uart2_cts_n_pj5",
- "uart2_rts_n_pj6",
- "uart2_rxd_pc3",
- "uart2_txd_pc2",
- "ulpi_data0_po1",
- "ulpi_data1_po2",
- "ulpi_data2_po3",
- "ulpi_data3_po4",
- "ulpi_data4_po5",
- "ulpi_data5_po6",
- "ulpi_data6_po7",
- "ulpi_data7_po0",
-};
-
-static const char * const uartb_groups[] = {
- "uart2_cts_n_pj5",
- "uart2_rts_n_pj6",
- "uart2_rxd_pc3",
- "uart2_txd_pc2",
-};
-
-static const char * const uartc_groups[] = {
- "uart3_cts_n_pa1",
- "uart3_rts_n_pc0",
- "uart3_rxd_pw7",
- "uart3_txd_pw6",
-};
-
-static const char * const uartd_groups[] = {
- "gmi_a16_pj7",
- "gmi_a17_pb0",
- "gmi_a18_pb1",
- "gmi_a19_pk7",
- "ulpi_clk_py0",
- "ulpi_dir_py1",
- "ulpi_nxt_py2",
- "ulpi_stp_py3",
-};
-
-static const char * const uarte_groups[] = {
- "sdmmc1_dat0_py7",
- "sdmmc1_dat1_py6",
- "sdmmc1_dat2_py5",
- "sdmmc1_dat3_py4",
- "sdmmc4_dat0_paa0",
- "sdmmc4_dat1_paa1",
- "sdmmc4_dat2_paa2",
- "sdmmc4_dat3_paa3",
-};
-
-static const char * const ulpi_groups[] = {
- "ulpi_clk_py0",
- "ulpi_data0_po1",
- "ulpi_data1_po2",
- "ulpi_data2_po3",
- "ulpi_data3_po4",
- "ulpi_data4_po5",
- "ulpi_data5_po6",
- "ulpi_data6_po7",
- "ulpi_data7_po0",
- "ulpi_dir_py1",
- "ulpi_nxt_py2",
- "ulpi_stp_py3",
-};
-
-static const char * const vgp1_groups[] = {
- "cam_i2c_scl_pbb1",
-};
-
-static const char * const vgp2_groups[] = {
- "cam_i2c_sda_pbb2",
-};
-
-static const char * const vgp3_groups[] = {
- "pbb3",
- "sdmmc4_dat5_paa5",
-};
-
-static const char * const vgp4_groups[] = {
- "pbb4",
- "sdmmc4_dat6_paa6",
-};
-
-static const char * const vgp5_groups[] = {
- "pbb5",
- "sdmmc4_dat7_paa7",
-};
-
-static const char * const vgp6_groups[] = {
- "pbb6",
- "sdmmc4_rst_n_pcc3",
-};
-
-static const char * const vi_groups[] = {
- "cam_mclk_pcc0",
- "vi_d0_pt4",
- "vi_d1_pd5",
- "vi_d10_pt2",
- "vi_d11_pt3",
- "vi_d2_pl0",
- "vi_d3_pl1",
- "vi_d4_pl2",
- "vi_d5_pl3",
- "vi_d6_pl4",
- "vi_d7_pl5",
- "vi_d8_pl6",
- "vi_d9_pl7",
- "vi_hsync_pd7",
- "vi_mclk_pt1",
- "vi_pclk_pt0",
- "vi_vsync_pd6",
-};
-
-static const char * const vi_alt1_groups[] = {
- "cam_mclk_pcc0",
- "vi_mclk_pt1",
-};
-
-static const char * const vi_alt2_groups[] = {
- "vi_mclk_pt1",
-};
-
-static const char * const vi_alt3_groups[] = {
- "cam_mclk_pcc0",
- "vi_mclk_pt1",
-};
#define FUNCTION(fname) \
{ \
.name = #fname, \
- .groups = fname##_groups, \
- .ngroups = ARRAY_SIZE(fname##_groups), \
}
-static const struct tegra_function tegra30_functions[] = {
+static struct tegra_function tegra30_functions[] = {
FUNCTION(blink),
FUNCTION(cec),
FUNCTION(clk_12m_out),
@@ -3345,11 +2105,11 @@ static const struct tegra_function tegra30_functions[] = {
FUNCTION(vi_alt3),
};
-#define DRV_PINGROUP_REG_A 0x868 /* bank 0 */
-#define PINGROUP_REG_A 0x3000 /* bank 1 */
+#define DRV_PINGROUP_REG_A 0x868 /* bank 0 */
+#define PINGROUP_REG_A 0x3000 /* bank 1 */
-#define PINGROUP_REG_Y(r) ((r) - PINGROUP_REG_A)
-#define PINGROUP_REG_N(r) -1
+#define PINGROUP_REG_Y(r) ((r) - PINGROUP_REG_A)
+#define PINGROUP_REG_N(r) -1
#define PINGROUP(pg_name, f0, f1, f2, f3, f_safe, r, od, ior) \
{ \
@@ -3357,12 +2117,12 @@ static const struct tegra_function tegra30_functions[] = {
.pins = pg_name##_pins, \
.npins = ARRAY_SIZE(pg_name##_pins), \
.funcs = { \
- TEGRA_MUX_ ## f0, \
- TEGRA_MUX_ ## f1, \
- TEGRA_MUX_ ## f2, \
- TEGRA_MUX_ ## f3, \
+ TEGRA_MUX_##f0, \
+ TEGRA_MUX_##f1, \
+ TEGRA_MUX_##f2, \
+ TEGRA_MUX_##f3, \
}, \
- .func_safe = TEGRA_MUX_ ## f_safe, \
+ .func_safe = TEGRA_MUX_##f_safe, \
.mux_reg = PINGROUP_REG_Y(r), \
.mux_bank = 1, \
.mux_bit = 0, \
@@ -3389,6 +2149,9 @@ static const struct tegra_function tegra30_functions[] = {
.drvtype_reg = -1, \
}
+#define DRV_PINGROUP_REG_Y(r) ((r) - DRV_PINGROUP_REG_A)
+#define DRV_PINGROUP_REG_N(r) -1
+
#define DRV_PINGROUP(pg_name, r, hsm_b, schmitt_b, lpmd_b, \
drvdn_b, drvdn_w, drvup_b, drvup_w, \
slwr_b, slwr_w, slwf_b, slwf_w) \
@@ -3404,7 +2167,7 @@ static const struct tegra_function tegra30_functions[] = {
.lock_reg = -1, \
.ioreset_reg = -1, \
.rcv_sel_reg = -1, \
- .drv_reg = ((r) - DRV_PINGROUP_REG_A), \
+ .drv_reg = DRV_PINGROUP_REG_Y(r), \
.drv_bank = 0, \
.hsm_bit = hsm_b, \
.schmitt_bit = schmitt_b, \
@@ -3422,7 +2185,6 @@ static const struct tegra_function tegra30_functions[] = {
static const struct tegra_pingroup tegra30_groups[] = {
/* pg_name, f0, f1, f2, f3, safe, r, od, ior */
- /* FIXME: Fill in correct data in safe column */
PINGROUP(clk_32k_out_pa0, BLINK, RSVD2, RSVD3, RSVD4, RSVD4, 0x331c, N, N),
PINGROUP(uart3_cts_n_pa1, UARTC, RSVD2, GMI, RSVD4, RSVD4, 0x317c, N, N),
PINGROUP(dap2_fs_pa2, I2S1, HDA, RSVD3, GMI, RSVD3, 0x3358, N, N),
@@ -3735,6 +2497,7 @@ static struct of_device_id tegra30_pinctrl_of_match[] = {
{ .compatible = "nvidia,tegra30-pinmux", },
{ },
};
+MODULE_DEVICE_TABLE(of, tegra30_pinctrl_of_match);
static struct platform_driver tegra30_pinctrl_driver = {
.driver = {
@@ -3745,20 +2508,8 @@ static struct platform_driver tegra30_pinctrl_driver = {
.probe = tegra30_pinctrl_probe,
.remove = tegra_pinctrl_remove,
};
-
-static int __init tegra30_pinctrl_init(void)
-{
- return platform_driver_register(&tegra30_pinctrl_driver);
-}
-arch_initcall(tegra30_pinctrl_init);
-
-static void __exit tegra30_pinctrl_exit(void)
-{
- platform_driver_unregister(&tegra30_pinctrl_driver);
-}
-module_exit(tegra30_pinctrl_exit);
+module_platform_driver(tegra30_pinctrl_driver);
MODULE_AUTHOR("Stephen Warren <swarren@nvidia.com>");
MODULE_DESCRIPTION("NVIDIA Tegra30 pinctrl driver");
MODULE_LICENSE("GPL v2");
-MODULE_DEVICE_TABLE(of, tegra30_pinctrl_of_match);
generated by cgit v1.2.3 (git 2.39.0) at 2024-12-21 12:11:08 +0300