diff options
Diffstat (limited to 'drivers/pinctrl/intel')
| -rw-r--r-- | drivers/pinctrl/intel/pinctrl-baytrail.c | 32 | ||||
| -rw-r--r-- | drivers/pinctrl/intel/pinctrl-broxton.c | 3 | ||||
| -rw-r--r-- | drivers/pinctrl/intel/pinctrl-cherryview.c | 161 | ||||
| -rw-r--r-- | drivers/pinctrl/intel/pinctrl-denverton.c | 7 | ||||
| -rw-r--r-- | drivers/pinctrl/intel/pinctrl-intel.c | 198 | ||||
| -rw-r--r-- | drivers/pinctrl/intel/pinctrl-intel.h | 2 | ||||
| -rw-r--r-- | drivers/pinctrl/intel/pinctrl-lynxpoint.c | 38 | ||||
| -rw-r--r-- | drivers/pinctrl/intel/pinctrl-merrifield.c | 2 | ||||
| -rw-r--r-- | drivers/pinctrl/intel/pinctrl-moorefield.c | 2 |
9 files changed, 171 insertions, 274 deletions
diff --git a/drivers/pinctrl/intel/pinctrl-baytrail.c b/drivers/pinctrl/intel/pinctrl-baytrail.c index faa8b7ff5bcf..3cd0798ee631 100644 --- a/drivers/pinctrl/intel/pinctrl-baytrail.c +++ b/drivers/pinctrl/intel/pinctrl-baytrail.c @@ -7,16 +7,16 @@ */ #include <linux/acpi.h> +#include <linux/array_size.h> #include <linux/bitops.h> #include <linux/gpio/driver.h> #include <linux/init.h> #include <linux/interrupt.h> #include <linux/io.h> -#include <linux/kernel.h> #include <linux/module.h> #include <linux/types.h> #include <linux/platform_device.h> -#include <linux/pm_runtime.h> +#include <linux/pm.h> #include <linux/property.h> #include <linux/seq_file.h> #include <linux/string_helpers.h> @@ -722,8 +722,6 @@ static int byt_gpio_request_enable(struct pinctrl_dev *pctl_dev, raw_spin_unlock_irqrestore(&byt_lock, flags); - pm_runtime_get(vg->dev); - return 0; } @@ -734,7 +732,6 @@ static void byt_gpio_disable_free(struct pinctrl_dev *pctl_dev, struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctl_dev); byt_gpio_clear_triggering(vg, offset); - pm_runtime_put(vg->dev); } static void byt_gpio_direct_irq_check(struct intel_pinctrl *vg, @@ -983,11 +980,18 @@ static int byt_pin_config_set(struct pinctrl_dev *pctl_dev, break; case PIN_CONFIG_INPUT_DEBOUNCE: - if (arg) + if (arg) { conf |= BYT_DEBOUNCE_EN; - else + } else { conf &= ~BYT_DEBOUNCE_EN; + /* + * No need to update the pulse value. + * Debounce is going to be disabled. + */ + break; + } + switch (arg) { case 375: db_pulse = BYT_DEBOUNCE_PULSE_375US; @@ -1654,7 +1658,6 @@ static int byt_pinctrl_probe(struct platform_device *pdev) return ret; platform_set_drvdata(pdev, vg); - pm_runtime_enable(dev); return 0; } @@ -1743,26 +1746,15 @@ static int byt_gpio_resume(struct device *dev) return 0; } -static int byt_gpio_runtime_suspend(struct device *dev) -{ - return 0; -} - -static int byt_gpio_runtime_resume(struct device *dev) -{ - return 0; -} - static const struct dev_pm_ops byt_gpio_pm_ops = { LATE_SYSTEM_SLEEP_PM_OPS(byt_gpio_suspend, byt_gpio_resume) - RUNTIME_PM_OPS(byt_gpio_runtime_suspend, byt_gpio_runtime_resume, NULL) }; static struct platform_driver byt_gpio_driver = { .probe = byt_pinctrl_probe, .driver = { .name = "byt_gpio", - .pm = pm_ptr(&byt_gpio_pm_ops), + .pm = pm_sleep_ptr(&byt_gpio_pm_ops), .acpi_match_table = byt_gpio_acpi_match, .suppress_bind_attrs = true, }, diff --git a/drivers/pinctrl/intel/pinctrl-broxton.c b/drivers/pinctrl/intel/pinctrl-broxton.c index 4d5ddb297909..3118c7c8842f 100644 --- a/drivers/pinctrl/intel/pinctrl-broxton.c +++ b/drivers/pinctrl/intel/pinctrl-broxton.c @@ -998,6 +998,7 @@ static const struct platform_device_id bxt_pinctrl_platform_ids[] = { { "broxton-pinctrl", (kernel_ulong_t)bxt_pinctrl_soc_data }, { } }; +MODULE_DEVICE_TABLE(platform, bxt_pinctrl_platform_ids); static INTEL_PINCTRL_PM_OPS(bxt_pinctrl_pm_ops); @@ -1026,6 +1027,4 @@ module_exit(bxt_pinctrl_exit); MODULE_AUTHOR("Mika Westerberg <mika.westerberg@linux.intel.com>"); MODULE_DESCRIPTION("Intel Broxton SoC pinctrl/GPIO driver"); MODULE_LICENSE("GPL v2"); -MODULE_ALIAS("platform:apollolake-pinctrl"); -MODULE_ALIAS("platform:broxton-pinctrl"); MODULE_IMPORT_NS(PINCTRL_INTEL); diff --git a/drivers/pinctrl/intel/pinctrl-cherryview.c b/drivers/pinctrl/intel/pinctrl-cherryview.c index 81ee949b946d..067b0d344f0e 100644 --- a/drivers/pinctrl/intel/pinctrl-cherryview.c +++ b/drivers/pinctrl/intel/pinctrl-cherryview.c @@ -11,9 +11,10 @@ */ #include <linux/acpi.h> +#include <linux/array_size.h> +#include <linux/cleanup.h> #include <linux/dmi.h> #include <linux/gpio/driver.h> -#include <linux/kernel.h> #include <linux/module.h> #include <linux/platform_device.h> #include <linux/seq_file.h> @@ -612,26 +613,26 @@ static void chv_writel(struct intel_pinctrl *pctrl, unsigned int pin, unsigned i } /* When Pad Cfg is locked, driver can only change GPIOTXState or GPIORXState */ +static bool chv_pad_is_locked(u32 ctrl1) +{ + return ctrl1 & CHV_PADCTRL1_CFGLOCK; +} + static bool chv_pad_locked(struct intel_pinctrl *pctrl, unsigned int offset) { - return chv_readl(pctrl, offset, CHV_PADCTRL1) & CHV_PADCTRL1_CFGLOCK; + return chv_pad_is_locked(chv_readl(pctrl, offset, CHV_PADCTRL1)); } static void chv_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, unsigned int offset) { struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); - unsigned long flags; u32 ctrl0, ctrl1; - bool locked; - - raw_spin_lock_irqsave(&chv_lock, flags); - - ctrl0 = chv_readl(pctrl, offset, CHV_PADCTRL0); - ctrl1 = chv_readl(pctrl, offset, CHV_PADCTRL1); - locked = chv_pad_locked(pctrl, offset); - raw_spin_unlock_irqrestore(&chv_lock, flags); + scoped_guard(raw_spinlock_irqsave, &chv_lock) { + ctrl0 = chv_readl(pctrl, offset, CHV_PADCTRL0); + ctrl1 = chv_readl(pctrl, offset, CHV_PADCTRL1); + } if (ctrl0 & CHV_PADCTRL0_GPIOEN) { seq_puts(s, "GPIO "); @@ -646,7 +647,7 @@ static void chv_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, seq_printf(s, "0x%08x 0x%08x", ctrl0, ctrl1); - if (locked) + if (chv_pad_is_locked(ctrl1)) seq_puts(s, " [LOCKED]"); } @@ -663,17 +664,15 @@ static int chv_pinmux_set_mux(struct pinctrl_dev *pctldev, struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); struct device *dev = pctrl->dev; const struct intel_pingroup *grp; - unsigned long flags; int i; grp = &pctrl->soc->groups[group]; - raw_spin_lock_irqsave(&chv_lock, flags); + guard(raw_spinlock_irqsave)(&chv_lock); /* Check first that the pad is not locked */ for (i = 0; i < grp->grp.npins; i++) { if (chv_pad_locked(pctrl, grp->grp.pins[i])) { - raw_spin_unlock_irqrestore(&chv_lock, flags); dev_warn(dev, "unable to set mode for locked pin %u\n", grp->grp.pins[i]); return -EBUSY; } @@ -713,8 +712,6 @@ static int chv_pinmux_set_mux(struct pinctrl_dev *pctldev, invert_oe ? "" : "not "); } - raw_spin_unlock_irqrestore(&chv_lock, flags); - return 0; } @@ -745,16 +742,14 @@ static int chv_gpio_request_enable(struct pinctrl_dev *pctldev, unsigned int offset) { struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); - unsigned long flags; u32 value; - raw_spin_lock_irqsave(&chv_lock, flags); + guard(raw_spinlock_irqsave)(&chv_lock); if (chv_pad_locked(pctrl, offset)) { value = chv_readl(pctrl, offset, CHV_PADCTRL0); if (!(value & CHV_PADCTRL0_GPIOEN)) { /* Locked so cannot enable */ - raw_spin_unlock_irqrestore(&chv_lock, flags); return -EBUSY; } } else { @@ -789,8 +784,6 @@ static int chv_gpio_request_enable(struct pinctrl_dev *pctldev, chv_writel(pctrl, offset, CHV_PADCTRL0, value); } - raw_spin_unlock_irqrestore(&chv_lock, flags); - return 0; } @@ -799,14 +792,13 @@ static void chv_gpio_disable_free(struct pinctrl_dev *pctldev, unsigned int offset) { struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); - unsigned long flags; - raw_spin_lock_irqsave(&chv_lock, flags); + guard(raw_spinlock_irqsave)(&chv_lock); - if (!chv_pad_locked(pctrl, offset)) - chv_gpio_clear_triggering(pctrl, offset); + if (chv_pad_locked(pctrl, offset)) + return; - raw_spin_unlock_irqrestore(&chv_lock, flags); + chv_gpio_clear_triggering(pctrl, offset); } static int chv_gpio_set_direction(struct pinctrl_dev *pctldev, @@ -814,10 +806,9 @@ static int chv_gpio_set_direction(struct pinctrl_dev *pctldev, unsigned int offset, bool input) { struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); - unsigned long flags; u32 ctrl0; - raw_spin_lock_irqsave(&chv_lock, flags); + guard(raw_spinlock_irqsave)(&chv_lock); ctrl0 = chv_readl(pctrl, offset, CHV_PADCTRL0) & ~CHV_PADCTRL0_GPIOCFG_MASK; if (input) @@ -826,8 +817,6 @@ static int chv_gpio_set_direction(struct pinctrl_dev *pctldev, ctrl0 |= CHV_PADCTRL0_GPIOCFG_GPO << CHV_PADCTRL0_GPIOCFG_SHIFT; chv_writel(pctrl, offset, CHV_PADCTRL0, ctrl0); - raw_spin_unlock_irqrestore(&chv_lock, flags); - return 0; } @@ -846,15 +835,14 @@ static int chv_config_get(struct pinctrl_dev *pctldev, unsigned int pin, { struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); enum pin_config_param param = pinconf_to_config_param(*config); - unsigned long flags; u32 ctrl0, ctrl1; u16 arg = 0; u32 term; - raw_spin_lock_irqsave(&chv_lock, flags); - ctrl0 = chv_readl(pctrl, pin, CHV_PADCTRL0); - ctrl1 = chv_readl(pctrl, pin, CHV_PADCTRL1); - raw_spin_unlock_irqrestore(&chv_lock, flags); + scoped_guard(raw_spinlock_irqsave, &chv_lock) { + ctrl0 = chv_readl(pctrl, pin, CHV_PADCTRL0); + ctrl1 = chv_readl(pctrl, pin, CHV_PADCTRL1); + } term = (ctrl0 & CHV_PADCTRL0_TERM_MASK) >> CHV_PADCTRL0_TERM_SHIFT; @@ -906,6 +894,7 @@ static int chv_config_get(struct pinctrl_dev *pctldev, unsigned int pin, return -EINVAL; break; + } case PIN_CONFIG_DRIVE_PUSH_PULL: if (ctrl1 & CHV_PADCTRL1_ODEN) @@ -916,7 +905,6 @@ static int chv_config_get(struct pinctrl_dev *pctldev, unsigned int pin, if (!(ctrl1 & CHV_PADCTRL1_ODEN)) return -EINVAL; break; - } default: return -ENOTSUPP; @@ -929,10 +917,10 @@ static int chv_config_get(struct pinctrl_dev *pctldev, unsigned int pin, static int chv_config_set_pull(struct intel_pinctrl *pctrl, unsigned int pin, enum pin_config_param param, u32 arg) { - unsigned long flags; u32 ctrl0, pull; - raw_spin_lock_irqsave(&chv_lock, flags); + guard(raw_spinlock_irqsave)(&chv_lock); + ctrl0 = chv_readl(pctrl, pin, CHV_PADCTRL0); switch (param) { @@ -955,7 +943,6 @@ static int chv_config_set_pull(struct intel_pinctrl *pctrl, unsigned int pin, pull = CHV_PADCTRL0_TERM_20K << CHV_PADCTRL0_TERM_SHIFT; break; default: - raw_spin_unlock_irqrestore(&chv_lock, flags); return -EINVAL; } @@ -973,7 +960,6 @@ static int chv_config_set_pull(struct intel_pinctrl *pctrl, unsigned int pin, pull = CHV_PADCTRL0_TERM_20K << CHV_PADCTRL0_TERM_SHIFT; break; default: - raw_spin_unlock_irqrestore(&chv_lock, flags); return -EINVAL; } @@ -981,12 +967,10 @@ static int chv_config_set_pull(struct intel_pinctrl *pctrl, unsigned int pin, break; default: - raw_spin_unlock_irqrestore(&chv_lock, flags); return -EINVAL; } chv_writel(pctrl, pin, CHV_PADCTRL0, ctrl0); - raw_spin_unlock_irqrestore(&chv_lock, flags); return 0; } @@ -994,10 +978,10 @@ static int chv_config_set_pull(struct intel_pinctrl *pctrl, unsigned int pin, static int chv_config_set_oden(struct intel_pinctrl *pctrl, unsigned int pin, bool enable) { - unsigned long flags; u32 ctrl1; - raw_spin_lock_irqsave(&chv_lock, flags); + guard(raw_spinlock_irqsave)(&chv_lock); + ctrl1 = chv_readl(pctrl, pin, CHV_PADCTRL1); if (enable) @@ -1006,7 +990,6 @@ static int chv_config_set_oden(struct intel_pinctrl *pctrl, unsigned int pin, ctrl1 &= ~CHV_PADCTRL1_ODEN; chv_writel(pctrl, pin, CHV_PADCTRL1, ctrl1); - raw_spin_unlock_irqrestore(&chv_lock, flags); return 0; } @@ -1116,12 +1099,10 @@ static struct pinctrl_desc chv_pinctrl_desc = { static int chv_gpio_get(struct gpio_chip *chip, unsigned int offset) { struct intel_pinctrl *pctrl = gpiochip_get_data(chip); - unsigned long flags; u32 ctrl0, cfg; - raw_spin_lock_irqsave(&chv_lock, flags); - ctrl0 = chv_readl(pctrl, offset, CHV_PADCTRL0); - raw_spin_unlock_irqrestore(&chv_lock, flags); + scoped_guard(raw_spinlock_irqsave, &chv_lock) + ctrl0 = chv_readl(pctrl, offset, CHV_PADCTRL0); cfg = ctrl0 & CHV_PADCTRL0_GPIOCFG_MASK; cfg >>= CHV_PADCTRL0_GPIOCFG_SHIFT; @@ -1134,10 +1115,9 @@ static int chv_gpio_get(struct gpio_chip *chip, unsigned int offset) static void chv_gpio_set(struct gpio_chip *chip, unsigned int offset, int value) { struct intel_pinctrl *pctrl = gpiochip_get_data(chip); - unsigned long flags; u32 ctrl0; - raw_spin_lock_irqsave(&chv_lock, flags); + guard(raw_spinlock_irqsave)(&chv_lock); ctrl0 = chv_readl(pctrl, offset, CHV_PADCTRL0); @@ -1147,19 +1127,15 @@ static void chv_gpio_set(struct gpio_chip *chip, unsigned int offset, int value) ctrl0 &= ~CHV_PADCTRL0_GPIOTXSTATE; chv_writel(pctrl, offset, CHV_PADCTRL0, ctrl0); - - raw_spin_unlock_irqrestore(&chv_lock, flags); } static int chv_gpio_get_direction(struct gpio_chip *chip, unsigned int offset) { struct intel_pinctrl *pctrl = gpiochip_get_data(chip); u32 ctrl0, direction; - unsigned long flags; - raw_spin_lock_irqsave(&chv_lock, flags); - ctrl0 = chv_readl(pctrl, offset, CHV_PADCTRL0); - raw_spin_unlock_irqrestore(&chv_lock, flags); + scoped_guard(raw_spinlock_irqsave, &chv_lock) + ctrl0 = chv_readl(pctrl, offset, CHV_PADCTRL0); direction = ctrl0 & CHV_PADCTRL0_GPIOCFG_MASK; direction >>= CHV_PADCTRL0_GPIOCFG_SHIFT; @@ -1172,14 +1148,14 @@ static int chv_gpio_get_direction(struct gpio_chip *chip, unsigned int offset) static int chv_gpio_direction_input(struct gpio_chip *chip, unsigned int offset) { - return pinctrl_gpio_direction_input(chip->base + offset); + return pinctrl_gpio_direction_input(chip, offset); } static int chv_gpio_direction_output(struct gpio_chip *chip, unsigned int offset, int value) { chv_gpio_set(chip, offset, value); - return pinctrl_gpio_direction_output(chip->base + offset); + return pinctrl_gpio_direction_output(chip, offset); } static const struct gpio_chip chv_gpio_chip = { @@ -1200,23 +1176,20 @@ static void chv_gpio_irq_ack(struct irq_data *d) irq_hw_number_t hwirq = irqd_to_hwirq(d); u32 intr_line; - raw_spin_lock(&chv_lock); + guard(raw_spinlock)(&chv_lock); intr_line = chv_readl(pctrl, hwirq, CHV_PADCTRL0); intr_line &= CHV_PADCTRL0_INTSEL_MASK; intr_line >>= CHV_PADCTRL0_INTSEL_SHIFT; chv_pctrl_writel(pctrl, CHV_INTSTAT, BIT(intr_line)); - - raw_spin_unlock(&chv_lock); } static void chv_gpio_irq_mask_unmask(struct gpio_chip *gc, irq_hw_number_t hwirq, bool mask) { struct intel_pinctrl *pctrl = gpiochip_get_data(gc); u32 value, intr_line; - unsigned long flags; - raw_spin_lock_irqsave(&chv_lock, flags); + guard(raw_spinlock_irqsave)(&chv_lock); intr_line = chv_readl(pctrl, hwirq, CHV_PADCTRL0); intr_line &= CHV_PADCTRL0_INTSEL_MASK; @@ -1228,8 +1201,6 @@ static void chv_gpio_irq_mask_unmask(struct gpio_chip *gc, irq_hw_number_t hwirq else value |= BIT(intr_line); chv_pctrl_writel(pctrl, CHV_INTMASK, value); - - raw_spin_unlock_irqrestore(&chv_lock, flags); } static void chv_gpio_irq_mask(struct irq_data *d) @@ -1254,7 +1225,15 @@ static unsigned chv_gpio_irq_startup(struct irq_data *d) { /* * Check if the interrupt has been requested with 0 as triggering - * type. In that case it is assumed that the current values + * type. If not, bail out, ... + */ + if (irqd_get_trigger_type(d) != IRQ_TYPE_NONE) { + chv_gpio_irq_unmask(d); + return 0; + } + + /* + * ...otherwise it is assumed that the current values * programmed to the hardware are used (e.g BIOS configured * defaults). * @@ -1262,17 +1241,15 @@ static unsigned chv_gpio_irq_startup(struct irq_data *d) * read back the values from hardware now, set correct flow handler * and update mappings before the interrupt is being used. */ - if (irqd_get_trigger_type(d) == IRQ_TYPE_NONE) { + scoped_guard(raw_spinlock_irqsave, &chv_lock) { struct gpio_chip *gc = irq_data_get_irq_chip_data(d); struct intel_pinctrl *pctrl = gpiochip_get_data(gc); struct device *dev = pctrl->dev; struct intel_community_context *cctx = &pctrl->context.communities[0]; irq_hw_number_t hwirq = irqd_to_hwirq(d); irq_flow_handler_t handler; - unsigned long flags; u32 intsel, value; - raw_spin_lock_irqsave(&chv_lock, flags); intsel = chv_readl(pctrl, hwirq, CHV_PADCTRL0); intsel &= CHV_PADCTRL0_INTSEL_MASK; intsel >>= CHV_PADCTRL0_INTSEL_SHIFT; @@ -1289,7 +1266,6 @@ static unsigned chv_gpio_irq_startup(struct irq_data *d) intsel, hwirq); cctx->intr_lines[intsel] = hwirq; } - raw_spin_unlock_irqrestore(&chv_lock, flags); } chv_gpio_irq_unmask(d); @@ -1354,17 +1330,14 @@ static int chv_gpio_irq_type(struct irq_data *d, unsigned int type) struct gpio_chip *gc = irq_data_get_irq_chip_data(d); struct intel_pinctrl *pctrl = gpiochip_get_data(gc); irq_hw_number_t hwirq = irqd_to_hwirq(d); - unsigned long flags; u32 value; int ret; - raw_spin_lock_irqsave(&chv_lock, flags); + guard(raw_spinlock_irqsave)(&chv_lock); ret = chv_gpio_set_intr_line(pctrl, hwirq); - if (ret) { - raw_spin_unlock_irqrestore(&chv_lock, flags); + if (ret) return ret; - } /* * Pins which can be used as shared interrupt are configured in @@ -1405,8 +1378,6 @@ static int chv_gpio_irq_type(struct irq_data *d, unsigned int type) else if (type & IRQ_TYPE_LEVEL_MASK) irq_set_handler_locked(d, handle_level_irq); - raw_spin_unlock_irqrestore(&chv_lock, flags); - return 0; } @@ -1430,14 +1401,12 @@ static void chv_gpio_irq_handler(struct irq_desc *desc) struct intel_community_context *cctx = &pctrl->context.communities[0]; struct irq_chip *chip = irq_desc_get_chip(desc); unsigned long pending; - unsigned long flags; u32 intr_line; chained_irq_enter(chip, desc); - raw_spin_lock_irqsave(&chv_lock, flags); - pending = chv_pctrl_readl(pctrl, CHV_INTSTAT); - raw_spin_unlock_irqrestore(&chv_lock, flags); + scoped_guard(raw_spinlock_irqsave, &chv_lock) + pending = chv_pctrl_readl(pctrl, CHV_INTSTAT); for_each_set_bit(intr_line, &pending, community->nirqs) { unsigned int offset; @@ -1626,21 +1595,17 @@ static acpi_status chv_pinctrl_mmio_access_handler(u32 function, void *handler_context, void *region_context) { struct intel_pinctrl *pctrl = region_context; - unsigned long flags; - acpi_status ret = AE_OK; - raw_spin_lock_irqsave(&chv_lock, flags); + guard(raw_spinlock_irqsave)(&chv_lock); if (function == ACPI_WRITE) chv_pctrl_writel(pctrl, address, *value); else if (function == ACPI_READ) *value = chv_pctrl_readl(pctrl, address); else - ret = AE_BAD_PARAMETER; - - raw_spin_unlock_irqrestore(&chv_lock, flags); + return AE_BAD_PARAMETER; - return ret; + return AE_OK; } static int chv_pinctrl_probe(struct platform_device *pdev) @@ -1728,7 +1693,7 @@ static int chv_pinctrl_probe(struct platform_device *pdev) return 0; } -static int chv_pinctrl_remove(struct platform_device *pdev) +static void chv_pinctrl_remove(struct platform_device *pdev) { struct intel_pinctrl *pctrl = platform_get_drvdata(pdev); const struct intel_community *community = &pctrl->communities[0]; @@ -1736,18 +1701,15 @@ static int chv_pinctrl_remove(struct platform_device *pdev) acpi_remove_address_space_handler(ACPI_HANDLE(&pdev->dev), community->acpi_space_id, chv_pinctrl_mmio_access_handler); - - return 0; } static int chv_pinctrl_suspend_noirq(struct device *dev) { struct intel_pinctrl *pctrl = dev_get_drvdata(dev); struct intel_community_context *cctx = &pctrl->context.communities[0]; - unsigned long flags; int i; - raw_spin_lock_irqsave(&chv_lock, flags); + guard(raw_spinlock_irqsave)(&chv_lock); cctx->saved_intmask = chv_pctrl_readl(pctrl, CHV_INTMASK); @@ -1765,8 +1727,6 @@ static int chv_pinctrl_suspend_noirq(struct device *dev) ctx->padctrl1 = chv_readl(pctrl, desc->number, CHV_PADCTRL1); } - raw_spin_unlock_irqrestore(&chv_lock, flags); - return 0; } @@ -1774,10 +1734,9 @@ static int chv_pinctrl_resume_noirq(struct device *dev) { struct intel_pinctrl *pctrl = dev_get_drvdata(dev); struct intel_community_context *cctx = &pctrl->context.communities[0]; - unsigned long flags; int i; - raw_spin_lock_irqsave(&chv_lock, flags); + guard(raw_spinlock_irqsave)(&chv_lock); /* * Mask all interrupts before restoring per-pin configuration @@ -1819,8 +1778,6 @@ static int chv_pinctrl_resume_noirq(struct device *dev) chv_pctrl_writel(pctrl, CHV_INTSTAT, 0xffff); chv_pctrl_writel(pctrl, CHV_INTMASK, cctx->saved_intmask); - raw_spin_unlock_irqrestore(&chv_lock, flags); - return 0; } @@ -1835,7 +1792,7 @@ MODULE_DEVICE_TABLE(acpi, chv_pinctrl_acpi_match); static struct platform_driver chv_pinctrl_driver = { .probe = chv_pinctrl_probe, - .remove = chv_pinctrl_remove, + .remove_new = chv_pinctrl_remove, .driver = { .name = "cherryview-pinctrl", .pm = pm_sleep_ptr(&chv_pinctrl_pm_ops), diff --git a/drivers/pinctrl/intel/pinctrl-denverton.c b/drivers/pinctrl/intel/pinctrl-denverton.c index 0c4694cfa594..562a4f9188e4 100644 --- a/drivers/pinctrl/intel/pinctrl-denverton.c +++ b/drivers/pinctrl/intel/pinctrl-denverton.c @@ -257,6 +257,12 @@ static const struct acpi_device_id dnv_pinctrl_acpi_match[] = { }; MODULE_DEVICE_TABLE(acpi, dnv_pinctrl_acpi_match); +static const struct platform_device_id dnv_pinctrl_platform_ids[] = { + { "denverton-pinctrl", (kernel_ulong_t)&dnv_soc_data }, + { } +}; +MODULE_DEVICE_TABLE(platform, dnv_pinctrl_platform_ids); + static struct platform_driver dnv_pinctrl_driver = { .probe = intel_pinctrl_probe_by_hid, .driver = { @@ -264,6 +270,7 @@ static struct platform_driver dnv_pinctrl_driver = { .acpi_match_table = dnv_pinctrl_acpi_match, .pm = &dnv_pinctrl_pm_ops, }, + .id_table = dnv_pinctrl_platform_ids, }; static int __init dnv_pinctrl_init(void) diff --git a/drivers/pinctrl/intel/pinctrl-intel.c b/drivers/pinctrl/intel/pinctrl-intel.c index 999f453344d2..652ba451f885 100644 --- a/drivers/pinctrl/intel/pinctrl-intel.c +++ b/drivers/pinctrl/intel/pinctrl-intel.c @@ -8,6 +8,7 @@ */ #include <linux/acpi.h> +#include <linux/cleanup.h> #include <linux/gpio/driver.h> #include <linux/interrupt.h> #include <linux/log2.h> @@ -393,20 +394,17 @@ static int intel_pinmux_set_mux(struct pinctrl_dev *pctldev, { struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); const struct intel_pingroup *grp = &pctrl->soc->groups[group]; - unsigned long flags; int i; - raw_spin_lock_irqsave(&pctrl->lock, flags); + guard(raw_spinlock_irqsave)(&pctrl->lock); /* * All pins in the groups needs to be accessible and writable * before we can enable the mux for this group. */ for (i = 0; i < grp->grp.npins; i++) { - if (!intel_pad_usable(pctrl, grp->grp.pins[i])) { - raw_spin_unlock_irqrestore(&pctrl->lock, flags); + if (!intel_pad_usable(pctrl, grp->grp.pins[i])) return -EBUSY; - } } /* Now enable the mux setting for each pin in the group */ @@ -428,8 +426,6 @@ static int intel_pinmux_set_mux(struct pinctrl_dev *pctldev, writel(value, padcfg0); } - raw_spin_unlock_irqrestore(&pctrl->lock, flags); - return 0; } @@ -485,21 +481,16 @@ static int intel_gpio_request_enable(struct pinctrl_dev *pctldev, { struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); void __iomem *padcfg0; - unsigned long flags; padcfg0 = intel_get_padcfg(pctrl, pin, PADCFG0); - raw_spin_lock_irqsave(&pctrl->lock, flags); + guard(raw_spinlock_irqsave)(&pctrl->lock); - if (!intel_pad_owned_by_host(pctrl, pin)) { - raw_spin_unlock_irqrestore(&pctrl->lock, flags); + if (!intel_pad_owned_by_host(pctrl, pin)) return -EBUSY; - } - if (!intel_pad_is_unlocked(pctrl, pin)) { - raw_spin_unlock_irqrestore(&pctrl->lock, flags); + if (!intel_pad_is_unlocked(pctrl, pin)) return 0; - } /* * If pin is already configured in GPIO mode, we assume that @@ -507,15 +498,11 @@ static int intel_gpio_request_enable(struct pinctrl_dev *pctldev, * potential glitches on the pin. Otherwise, for the pin in * alternative mode, consumer has to supply respective flags. */ - if (intel_gpio_get_gpio_mode(padcfg0) == PADCFG0_PMODE_GPIO) { - raw_spin_unlock_irqrestore(&pctrl->lock, flags); + if (intel_gpio_get_gpio_mode(padcfg0) == PADCFG0_PMODE_GPIO) return 0; - } intel_gpio_set_gpio_mode(padcfg0); - raw_spin_unlock_irqrestore(&pctrl->lock, flags); - return 0; } @@ -525,13 +512,12 @@ static int intel_gpio_set_direction(struct pinctrl_dev *pctldev, { struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); void __iomem *padcfg0; - unsigned long flags; padcfg0 = intel_get_padcfg(pctrl, pin, PADCFG0); - raw_spin_lock_irqsave(&pctrl->lock, flags); + guard(raw_spinlock_irqsave)(&pctrl->lock); + __intel_gpio_set_direction(padcfg0, input); - raw_spin_unlock_irqrestore(&pctrl->lock, flags); return 0; } @@ -548,17 +534,13 @@ static const struct pinmux_ops intel_pinmux_ops = { static int intel_config_get_pull(struct intel_pinctrl *pctrl, unsigned int pin, enum pin_config_param param, u32 *arg) { - const struct intel_community *community; void __iomem *padcfg1; - unsigned long flags; u32 value, term; - community = intel_get_community(pctrl, pin); padcfg1 = intel_get_padcfg(pctrl, pin, PADCFG1); - raw_spin_lock_irqsave(&pctrl->lock, flags); - value = readl(padcfg1); - raw_spin_unlock_irqrestore(&pctrl->lock, flags); + scoped_guard(raw_spinlock_irqsave, &pctrl->lock) + value = readl(padcfg1); term = (value & PADCFG1_TERM_MASK) >> PADCFG1_TERM_SHIFT; @@ -592,7 +574,9 @@ static int intel_config_get_pull(struct intel_pinctrl *pctrl, unsigned int pin, break; - case PIN_CONFIG_BIAS_PULL_DOWN: + case PIN_CONFIG_BIAS_PULL_DOWN: { + const struct intel_community *community = intel_get_community(pctrl, pin); + if (!term || value & PADCFG1_TERM_UP) return -EINVAL; @@ -619,6 +603,7 @@ static int intel_config_get_pull(struct intel_pinctrl *pctrl, unsigned int pin, } break; + } default: return -EINVAL; @@ -631,7 +616,6 @@ static int intel_config_get_debounce(struct intel_pinctrl *pctrl, unsigned int p enum pin_config_param param, u32 *arg) { void __iomem *padcfg2; - unsigned long flags; unsigned long v; u32 value2; @@ -639,9 +623,9 @@ static int intel_config_get_debounce(struct intel_pinctrl *pctrl, unsigned int p if (!padcfg2) return -ENOTSUPP; - raw_spin_lock_irqsave(&pctrl->lock, flags); - value2 = readl(padcfg2); - raw_spin_unlock_irqrestore(&pctrl->lock, flags); + scoped_guard(raw_spinlock_irqsave, &pctrl->lock) + value2 = readl(padcfg2); + if (!(value2 & PADCFG2_DEBEN)) return -EINVAL; @@ -690,19 +674,8 @@ static int intel_config_set_pull(struct intel_pinctrl *pctrl, unsigned int pin, { unsigned int param = pinconf_to_config_param(config); unsigned int arg = pinconf_to_config_argument(config); - const struct intel_community *community; + u32 term = 0, up = 0, value; void __iomem *padcfg1; - unsigned long flags; - int ret = 0; - u32 value; - - community = intel_get_community(pctrl, pin); - padcfg1 = intel_get_padcfg(pctrl, pin, PADCFG1); - - raw_spin_lock_irqsave(&pctrl->lock, flags); - - value = readl(padcfg1); - value &= ~(PADCFG1_TERM_MASK | PADCFG1_TERM_UP); /* Set default strength value in case none is given */ if (arg == 1) @@ -715,78 +688,77 @@ static int intel_config_set_pull(struct intel_pinctrl *pctrl, unsigned int pin, case PIN_CONFIG_BIAS_PULL_UP: switch (arg) { case 20000: - value |= PADCFG1_TERM_20K << PADCFG1_TERM_SHIFT; + term = PADCFG1_TERM_20K; break; case 5000: - value |= PADCFG1_TERM_5K << PADCFG1_TERM_SHIFT; + term = PADCFG1_TERM_5K; break; case 4000: - value |= PADCFG1_TERM_4K << PADCFG1_TERM_SHIFT; + term = PADCFG1_TERM_4K; break; case 1000: - value |= PADCFG1_TERM_1K << PADCFG1_TERM_SHIFT; + term = PADCFG1_TERM_1K; break; case 833: - value |= PADCFG1_TERM_833 << PADCFG1_TERM_SHIFT; + term = PADCFG1_TERM_833; break; default: - ret = -EINVAL; - break; + return -EINVAL; } - value |= PADCFG1_TERM_UP; + up = PADCFG1_TERM_UP; break; - case PIN_CONFIG_BIAS_PULL_DOWN: + case PIN_CONFIG_BIAS_PULL_DOWN: { + const struct intel_community *community = intel_get_community(pctrl, pin); + switch (arg) { case 20000: - value |= PADCFG1_TERM_20K << PADCFG1_TERM_SHIFT; + term = PADCFG1_TERM_20K; break; case 5000: - value |= PADCFG1_TERM_5K << PADCFG1_TERM_SHIFT; + term = PADCFG1_TERM_5K; break; case 4000: - value |= PADCFG1_TERM_4K << PADCFG1_TERM_SHIFT; + term = PADCFG1_TERM_4K; break; case 1000: - if (!(community->features & PINCTRL_FEATURE_1K_PD)) { - ret = -EINVAL; - break; - } - value |= PADCFG1_TERM_1K << PADCFG1_TERM_SHIFT; + if (!(community->features & PINCTRL_FEATURE_1K_PD)) + return -EINVAL; + term = PADCFG1_TERM_1K; break; case 833: - if (!(community->features & PINCTRL_FEATURE_1K_PD)) { - ret = -EINVAL; - break; - } - value |= PADCFG1_TERM_833 << PADCFG1_TERM_SHIFT; + if (!(community->features & PINCTRL_FEATURE_1K_PD)) + return -EINVAL; + term = PADCFG1_TERM_833; break; default: - ret = -EINVAL; - break; + return -EINVAL; } break; + } default: - ret = -EINVAL; - break; + return -EINVAL; } - if (!ret) - writel(value, padcfg1); + padcfg1 = intel_get_padcfg(pctrl, pin, PADCFG1); - raw_spin_unlock_irqrestore(&pctrl->lock, flags); + guard(raw_spinlock_irqsave)(&pctrl->lock); - return ret; + value = readl(padcfg1); + value = (value & ~PADCFG1_TERM_MASK) | (term << PADCFG1_TERM_SHIFT); + value = (value & ~PADCFG1_TERM_UP) | up; + writel(value, padcfg1); + + return 0; } static int intel_config_set_debounce(struct intel_pinctrl *pctrl, unsigned int pin, unsigned int debounce) { void __iomem *padcfg0, *padcfg2; - unsigned long flags; u32 value0, value2; padcfg2 = intel_get_padcfg(pctrl, pin, PADCFG2); @@ -795,7 +767,7 @@ static int intel_config_set_debounce(struct intel_pinctrl *pctrl, padcfg0 = intel_get_padcfg(pctrl, pin, PADCFG0); - raw_spin_lock_irqsave(&pctrl->lock, flags); + guard(raw_spinlock_irqsave)(&pctrl->lock); value0 = readl(padcfg0); value2 = readl(padcfg2); @@ -808,10 +780,8 @@ static int intel_config_set_debounce(struct intel_pinctrl *pctrl, unsigned long v; v = order_base_2(debounce * NSEC_PER_USEC / DEBOUNCE_PERIOD_NSEC); - if (v < 3 || v > 15) { - raw_spin_unlock_irqrestore(&pctrl->lock, flags); + if (v < 3 || v > 15) return -EINVAL; - } /* Enable glitch filter and debouncer */ value0 |= PADCFG0_PREGFRXSEL; @@ -822,8 +792,6 @@ static int intel_config_set_debounce(struct intel_pinctrl *pctrl, writel(value0, padcfg0); writel(value2, padcfg2); - raw_spin_unlock_irqrestore(&pctrl->lock, flags); - return 0; } @@ -973,7 +941,6 @@ static void intel_gpio_set(struct gpio_chip *chip, unsigned int offset, int value) { struct intel_pinctrl *pctrl = gpiochip_get_data(chip); - unsigned long flags; void __iomem *reg; u32 padcfg0; int pin; @@ -986,20 +953,19 @@ static void intel_gpio_set(struct gpio_chip *chip, unsigned int offset, if (!reg) return; - raw_spin_lock_irqsave(&pctrl->lock, flags); + guard(raw_spinlock_irqsave)(&pctrl->lock); + padcfg0 = readl(reg); if (value) padcfg0 |= PADCFG0_GPIOTXSTATE; else padcfg0 &= ~PADCFG0_GPIOTXSTATE; writel(padcfg0, reg); - raw_spin_unlock_irqrestore(&pctrl->lock, flags); } static int intel_gpio_get_direction(struct gpio_chip *chip, unsigned int offset) { struct intel_pinctrl *pctrl = gpiochip_get_data(chip); - unsigned long flags; void __iomem *reg; u32 padcfg0; int pin; @@ -1012,9 +978,9 @@ static int intel_gpio_get_direction(struct gpio_chip *chip, unsigned int offset) if (!reg) return -EINVAL; - raw_spin_lock_irqsave(&pctrl->lock, flags); - padcfg0 = readl(reg); - raw_spin_unlock_irqrestore(&pctrl->lock, flags); + scoped_guard(raw_spinlock_irqsave, &pctrl->lock) + padcfg0 = readl(reg); + if (padcfg0 & PADCFG0_PMODE_MASK) return -EINVAL; @@ -1026,14 +992,14 @@ static int intel_gpio_get_direction(struct gpio_chip *chip, unsigned int offset) static int intel_gpio_direction_input(struct gpio_chip *chip, unsigned int offset) { - return pinctrl_gpio_direction_input(chip->base + offset); + return pinctrl_gpio_direction_input(chip, offset); } static int intel_gpio_direction_output(struct gpio_chip *chip, unsigned int offset, int value) { intel_gpio_set(chip, offset, value); - return pinctrl_gpio_direction_output(chip->base + offset); + return pinctrl_gpio_direction_output(chip, offset); } static const struct gpio_chip intel_gpio_chip = { @@ -1058,15 +1024,17 @@ static void intel_gpio_irq_ack(struct irq_data *d) pin = intel_gpio_to_pin(pctrl, irqd_to_hwirq(d), &community, &padgrp); if (pin >= 0) { - unsigned int gpp, gpp_offset, is_offset; + unsigned int gpp, gpp_offset; + void __iomem *is; gpp = padgrp->reg_num; gpp_offset = padgroup_offset(padgrp, pin); - is_offset = community->is_offset + gpp * 4; - raw_spin_lock(&pctrl->lock); - writel(BIT(gpp_offset), community->regs + is_offset); - raw_spin_unlock(&pctrl->lock); + is = community->regs + community->is_offset + gpp * 4; + + guard(raw_spinlock)(&pctrl->lock); + + writel(BIT(gpp_offset), is); } } @@ -1080,7 +1048,6 @@ static void intel_gpio_irq_mask_unmask(struct gpio_chip *gc, irq_hw_number_t hwi pin = intel_gpio_to_pin(pctrl, hwirq, &community, &padgrp); if (pin >= 0) { unsigned int gpp, gpp_offset; - unsigned long flags; void __iomem *reg, *is; u32 value; @@ -1090,7 +1057,7 @@ static void intel_gpio_irq_mask_unmask(struct gpio_chip *gc, irq_hw_number_t hwi reg = community->regs + community->ie_offset + gpp * 4; is = community->regs + community->is_offset + gpp * 4; - raw_spin_lock_irqsave(&pctrl->lock, flags); + guard(raw_spinlock_irqsave)(&pctrl->lock); /* Clear interrupt status first to avoid unexpected interrupt */ writel(BIT(gpp_offset), is); @@ -1101,7 +1068,6 @@ static void intel_gpio_irq_mask_unmask(struct gpio_chip *gc, irq_hw_number_t hwi else value |= BIT(gpp_offset); writel(value, reg); - raw_spin_unlock_irqrestore(&pctrl->lock, flags); } } @@ -1129,7 +1095,6 @@ static int intel_gpio_irq_type(struct irq_data *d, unsigned int type) struct intel_pinctrl *pctrl = gpiochip_get_data(gc); unsigned int pin = intel_gpio_to_pin(pctrl, irqd_to_hwirq(d), NULL, NULL); u32 rxevcfg, rxinv, value; - unsigned long flags; void __iomem *reg; reg = intel_get_padcfg(pctrl, pin, PADCFG0); @@ -1163,7 +1128,7 @@ static int intel_gpio_irq_type(struct irq_data *d, unsigned int type) else rxinv = 0; - raw_spin_lock_irqsave(&pctrl->lock, flags); + guard(raw_spinlock_irqsave)(&pctrl->lock); intel_gpio_set_gpio_mode(reg); @@ -1179,8 +1144,6 @@ static int intel_gpio_irq_type(struct irq_data *d, unsigned int type) else if (type & IRQ_TYPE_LEVEL_MASK) irq_set_handler_locked(d, handle_level_irq); - raw_spin_unlock_irqrestore(&pctrl->lock, flags); - return 0; } @@ -1219,16 +1182,19 @@ static int intel_gpio_community_irq_handler(struct intel_pinctrl *pctrl, for (gpp = 0; gpp < community->ngpps; gpp++) { const struct intel_padgroup *padgrp = &community->gpps[gpp]; - unsigned long pending, enabled, gpp_offset; + unsigned long pending, enabled; + unsigned int gpp, gpp_offset; + void __iomem *reg, *is; - raw_spin_lock(&pctrl->lock); + gpp = padgrp->reg_num; - pending = readl(community->regs + community->is_offset + - padgrp->reg_num * 4); - enabled = readl(community->regs + community->ie_offset + - padgrp->reg_num * 4); + reg = community->regs + community->ie_offset + gpp * 4; + is = community->regs + community->is_offset + gpp * 4; - raw_spin_unlock(&pctrl->lock); + scoped_guard(raw_spinlock, &pctrl->lock) { + pending = readl(is); + enabled = readl(reg); + } /* Only interrupts that are enabled */ pending &= enabled; @@ -1264,16 +1230,18 @@ static void intel_gpio_irq_init(struct intel_pinctrl *pctrl) for (i = 0; i < pctrl->ncommunities; i++) { const struct intel_community *community; - void __iomem *base; + void __iomem *reg, *is; unsigned int gpp; community = &pctrl->communities[i]; - base = community->regs; for (gpp = 0; gpp < community->ngpps; gpp++) { + reg = community->regs + community->ie_offset + gpp * 4; + is = community->regs + community->is_offset + gpp * 4; + /* Mask and clear all interrupts */ - writel(0, base + community->ie_offset + gpp * 4); - writel(0xffff, base + community->is_offset + gpp * 4); + writel(0, reg); + writel(0xffff, is); } } } diff --git a/drivers/pinctrl/intel/pinctrl-intel.h b/drivers/pinctrl/intel/pinctrl-intel.h index cee512f97b56..2bb553598e8b 100644 --- a/drivers/pinctrl/intel/pinctrl-intel.h +++ b/drivers/pinctrl/intel/pinctrl-intel.h @@ -10,11 +10,11 @@ #ifndef PINCTRL_INTEL_H #define PINCTRL_INTEL_H +#include <linux/array_size.h> #include <linux/bits.h> #include <linux/compiler_types.h> #include <linux/gpio/driver.h> #include <linux/irq.h> -#include <linux/kernel.h> #include <linux/pm.h> #include <linux/pinctrl/pinctrl.h> #include <linux/spinlock_types.h> diff --git a/drivers/pinctrl/intel/pinctrl-lynxpoint.c b/drivers/pinctrl/intel/pinctrl-lynxpoint.c index c3732a9f0658..e6878e4cf20c 100644 --- a/drivers/pinctrl/intel/pinctrl-lynxpoint.c +++ b/drivers/pinctrl/intel/pinctrl-lynxpoint.c @@ -8,14 +8,14 @@ */ #include <linux/acpi.h> +#include <linux/array_size.h> #include <linux/bitops.h> #include <linux/gpio/driver.h> #include <linux/interrupt.h> #include <linux/io.h> -#include <linux/kernel.h> #include <linux/module.h> #include <linux/platform_device.h> -#include <linux/pm_runtime.h> +#include <linux/pm.h> #include <linux/seq_file.h> #include <linux/slab.h> #include <linux/types.h> @@ -337,8 +337,6 @@ static int lp_gpio_request_enable(struct pinctrl_dev *pctldev, unsigned long flags; u32 value; - pm_runtime_get(lg->dev); - raw_spin_lock_irqsave(&lg->lock, flags); /* @@ -373,8 +371,6 @@ static void lp_gpio_disable_free(struct pinctrl_dev *pctldev, lp_gpio_disable_input(conf2); raw_spin_unlock_irqrestore(&lg->lock, flags); - - pm_runtime_put(lg->dev); } static int lp_gpio_set_direction(struct pinctrl_dev *pctldev, @@ -545,7 +541,7 @@ static void lp_gpio_set(struct gpio_chip *chip, unsigned int offset, int value) static int lp_gpio_direction_input(struct gpio_chip *chip, unsigned int offset) { - return pinctrl_gpio_direction_input(chip->base + offset); + return pinctrl_gpio_direction_input(chip, offset); } static int lp_gpio_direction_output(struct gpio_chip *chip, unsigned int offset, @@ -553,7 +549,7 @@ static int lp_gpio_direction_output(struct gpio_chip *chip, unsigned int offset, { lp_gpio_set(chip, offset, value); - return pinctrl_gpio_direction_output(chip->base + offset); + return pinctrl_gpio_direction_output(chip, offset); } static int lp_gpio_get_direction(struct gpio_chip *chip, unsigned int offset) @@ -841,24 +837,6 @@ static int lp_gpio_probe(struct platform_device *pdev) return ret; } - pm_runtime_enable(dev); - - return 0; -} - -static int lp_gpio_remove(struct platform_device *pdev) -{ - pm_runtime_disable(&pdev->dev); - return 0; -} - -static int lp_gpio_runtime_suspend(struct device *dev) -{ - return 0; -} - -static int lp_gpio_runtime_resume(struct device *dev) -{ return 0; } @@ -876,10 +854,7 @@ static int lp_gpio_resume(struct device *dev) return 0; } -static const struct dev_pm_ops lp_gpio_pm_ops = { - SYSTEM_SLEEP_PM_OPS(NULL, lp_gpio_resume) - RUNTIME_PM_OPS(lp_gpio_runtime_suspend, lp_gpio_runtime_resume, NULL) -}; +static DEFINE_SIMPLE_DEV_PM_OPS(lp_gpio_pm_ops, NULL, lp_gpio_resume); static const struct acpi_device_id lynxpoint_gpio_acpi_match[] = { { "INT33C7", (kernel_ulong_t)&lptlp_soc_data }, @@ -890,10 +865,9 @@ MODULE_DEVICE_TABLE(acpi, lynxpoint_gpio_acpi_match); static struct platform_driver lp_gpio_driver = { .probe = lp_gpio_probe, - .remove = lp_gpio_remove, .driver = { .name = "lp_gpio", - .pm = pm_ptr(&lp_gpio_pm_ops), + .pm = pm_sleep_ptr(&lp_gpio_pm_ops), .acpi_match_table = lynxpoint_gpio_acpi_match, }, }; diff --git a/drivers/pinctrl/intel/pinctrl-merrifield.c b/drivers/pinctrl/intel/pinctrl-merrifield.c index d809680a09c9..1a556f5822b6 100644 --- a/drivers/pinctrl/intel/pinctrl-merrifield.c +++ b/drivers/pinctrl/intel/pinctrl-merrifield.c @@ -6,8 +6,8 @@ * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com> */ +#include <linux/array_size.h> #include <linux/init.h> -#include <linux/kernel.h> #include <linux/mod_devicetable.h> #include <linux/module.h> #include <linux/platform_device.h> diff --git a/drivers/pinctrl/intel/pinctrl-moorefield.c b/drivers/pinctrl/intel/pinctrl-moorefield.c index 807a694b818b..7b995fbf5c84 100644 --- a/drivers/pinctrl/intel/pinctrl-moorefield.c +++ b/drivers/pinctrl/intel/pinctrl-moorefield.c @@ -6,8 +6,8 @@ * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com> */ +#include <linux/array_size.h> #include <linux/init.h> -#include <linux/kernel.h> #include <linux/mod_devicetable.h> #include <linux/module.h> #include <linux/platform_device.h> |