diff options
Diffstat (limited to 'drivers/net/phy/mxl-gpy.c')
| -rw-r--r-- | drivers/net/phy/mxl-gpy.c | 191 |
1 files changed, 179 insertions, 12 deletions
diff --git a/drivers/net/phy/mxl-gpy.c b/drivers/net/phy/mxl-gpy.c index 24bae27eedef..147d7a5a9b35 100644 --- a/drivers/net/phy/mxl-gpy.c +++ b/drivers/net/phy/mxl-gpy.c @@ -9,6 +9,7 @@ #include <linux/module.h> #include <linux/bitfield.h> #include <linux/hwmon.h> +#include <linux/mutex.h> #include <linux/phy.h> #include <linux/polynomial.h> #include <linux/netdevice.h> @@ -29,6 +30,10 @@ #define PHY_ID_GPY241BM 0x67C9DE80 #define PHY_ID_GPY245B 0x67C9DEC0 +#define PHY_CTL1 0x13 +#define PHY_CTL1_MDICD BIT(3) +#define PHY_CTL1_MDIAB BIT(2) +#define PHY_CTL1_AMDIX BIT(0) #define PHY_MIISTAT 0x18 /* MII state */ #define PHY_IMASK 0x19 /* interrupt mask */ #define PHY_ISTAT 0x1A /* interrupt status */ @@ -59,6 +64,13 @@ #define PHY_FWV_MAJOR_MASK GENMASK(11, 8) #define PHY_FWV_MINOR_MASK GENMASK(7, 0) +#define PHY_PMA_MGBT_POLARITY 0x82 +#define PHY_MDI_MDI_X_MASK GENMASK(1, 0) +#define PHY_MDI_MDI_X_NORMAL 0x3 +#define PHY_MDI_MDI_X_AB 0x2 +#define PHY_MDI_MDI_X_CD 0x1 +#define PHY_MDI_MDI_X_CROSS 0x0 + /* SGMII */ #define VSPEC1_SGMII_CTRL 0x08 #define VSPEC1_SGMII_CTRL_ANEN BIT(12) /* Aneg enable */ @@ -67,8 +79,16 @@ VSPEC1_SGMII_CTRL_ANRS) /* Temperature sensor */ -#define VPSPEC1_TEMP_STA 0x0E -#define VPSPEC1_TEMP_STA_DATA GENMASK(9, 0) +#define VSPEC1_TEMP_STA 0x0E +#define VSPEC1_TEMP_STA_DATA GENMASK(9, 0) + +/* Mailbox */ +#define VSPEC1_MBOX_DATA 0x5 +#define VSPEC1_MBOX_ADDRLO 0x6 +#define VSPEC1_MBOX_CMD 0x7 +#define VSPEC1_MBOX_CMD_ADDRHI GENMASK(7, 0) +#define VSPEC1_MBOX_CMD_RD (0 << 8) +#define VSPEC1_MBOX_CMD_READY BIT(15) /* WoL */ #define VPSPEC2_WOL_CTL 0x0E06 @@ -77,7 +97,13 @@ #define VPSPEC2_WOL_AD45 0x0E0A #define WOL_EN BIT(0) +/* Internal registers, access via mbox */ +#define REG_GPIO0_OUT 0xd3ce00 + struct gpy_priv { + /* serialize mailbox acesses */ + struct mutex mbox_lock; + u8 fw_major; u8 fw_minor; }; @@ -129,14 +155,14 @@ static int gpy_hwmon_read(struct device *dev, struct phy_device *phydev = dev_get_drvdata(dev); int ret; - ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, VPSPEC1_TEMP_STA); + ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_TEMP_STA); if (ret < 0) return ret; if (!ret) return -ENODATA; *value = polynomial_calc(&poly_N_to_temp, - FIELD_GET(VPSPEC1_TEMP_STA_DATA, ret)); + FIELD_GET(VSPEC1_TEMP_STA_DATA, ret)); return 0; } @@ -187,6 +213,45 @@ static int gpy_hwmon_register(struct phy_device *phydev) } #endif +static int gpy_mbox_read(struct phy_device *phydev, u32 addr) +{ + struct gpy_priv *priv = phydev->priv; + int val, ret; + u16 cmd; + + mutex_lock(&priv->mbox_lock); + + ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_MBOX_ADDRLO, + addr); + if (ret) + goto out; + + cmd = VSPEC1_MBOX_CMD_RD; + cmd |= FIELD_PREP(VSPEC1_MBOX_CMD_ADDRHI, addr >> 16); + + ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_MBOX_CMD, cmd); + if (ret) + goto out; + + /* The mbox read is used in the interrupt workaround. It was observed + * that a read might take up to 2.5ms. This is also the time for which + * the interrupt line is stuck low. To be on the safe side, poll the + * ready bit for 10ms. + */ + ret = phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND1, + VSPEC1_MBOX_CMD, val, + (val & VSPEC1_MBOX_CMD_READY), + 500, 10000, false); + if (ret) + goto out; + + ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_MBOX_DATA); + +out: + mutex_unlock(&priv->mbox_lock); + return ret; +} + static int gpy_config_init(struct phy_device *phydev) { int ret; @@ -201,6 +266,13 @@ static int gpy_config_init(struct phy_device *phydev) return ret < 0 ? ret : 0; } +static bool gpy_has_broken_mdint(struct phy_device *phydev) +{ + /* At least these PHYs are known to have broken interrupt handling */ + return phydev->drv->phy_id == PHY_ID_GPY215B || + phydev->drv->phy_id == PHY_ID_GPY215C; +} + static int gpy_probe(struct phy_device *phydev) { struct device *dev = &phydev->mdio.dev; @@ -218,6 +290,7 @@ static int gpy_probe(struct phy_device *phydev) if (!priv) return -ENOMEM; phydev->priv = priv; + mutex_init(&priv->mbox_lock); fw_version = phy_read(phydev, PHY_FWV); if (fw_version < 0) @@ -289,6 +362,33 @@ static bool gpy_sgmii_aneg_en(struct phy_device *phydev) return (ret & VSPEC1_SGMII_CTRL_ANEN) ? true : false; } +static int gpy_config_mdix(struct phy_device *phydev, u8 ctrl) +{ + int ret; + u16 val; + + switch (ctrl) { + case ETH_TP_MDI_AUTO: + val = PHY_CTL1_AMDIX; + break; + case ETH_TP_MDI_X: + val = (PHY_CTL1_MDIAB | PHY_CTL1_MDICD); + break; + case ETH_TP_MDI: + val = 0; + break; + default: + return 0; + } + + ret = phy_modify(phydev, PHY_CTL1, PHY_CTL1_AMDIX | PHY_CTL1_MDIAB | + PHY_CTL1_MDICD, val); + if (ret < 0) + return ret; + + return genphy_c45_restart_aneg(phydev); +} + static int gpy_config_aneg(struct phy_device *phydev) { bool changed = false; @@ -304,6 +404,10 @@ static int gpy_config_aneg(struct phy_device *phydev) : genphy_c45_pma_setup_forced(phydev); } + ret = gpy_config_mdix(phydev, phydev->mdix_ctrl); + if (ret < 0) + return ret; + ret = genphy_c45_an_config_aneg(phydev); if (ret < 0) return ret; @@ -370,14 +474,42 @@ static int gpy_config_aneg(struct phy_device *phydev) VSPEC1_SGMII_CTRL_ANRS, VSPEC1_SGMII_CTRL_ANRS); } -static void gpy_update_interface(struct phy_device *phydev) +static int gpy_update_mdix(struct phy_device *phydev) +{ + int ret; + + ret = phy_read(phydev, PHY_CTL1); + if (ret < 0) + return ret; + + if (ret & PHY_CTL1_AMDIX) + phydev->mdix_ctrl = ETH_TP_MDI_AUTO; + else + if (ret & PHY_CTL1_MDICD || ret & PHY_CTL1_MDIAB) + phydev->mdix_ctrl = ETH_TP_MDI_X; + else + phydev->mdix_ctrl = ETH_TP_MDI; + + ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, PHY_PMA_MGBT_POLARITY); + if (ret < 0) + return ret; + + if ((ret & PHY_MDI_MDI_X_MASK) < PHY_MDI_MDI_X_NORMAL) + phydev->mdix = ETH_TP_MDI_X; + else + phydev->mdix = ETH_TP_MDI; + + return 0; +} + +static int gpy_update_interface(struct phy_device *phydev) { int ret; /* Interface mode is fixed for USXGMII and integrated PHY */ if (phydev->interface == PHY_INTERFACE_MODE_USXGMII || phydev->interface == PHY_INTERFACE_MODE_INTERNAL) - return; + return -EINVAL; /* Automatically switch SERDES interface between SGMII and 2500-BaseX * according to speed. Disable ANEG in 2500-BaseX mode. @@ -387,10 +519,12 @@ static void gpy_update_interface(struct phy_device *phydev) phydev->interface = PHY_INTERFACE_MODE_2500BASEX; ret = phy_modify_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_SGMII_CTRL, VSPEC1_SGMII_CTRL_ANEN, 0); - if (ret < 0) + if (ret < 0) { phydev_err(phydev, "Error: Disable of SGMII ANEG failed: %d\n", ret); + return ret; + } break; case SPEED_1000: case SPEED_100: @@ -404,15 +538,22 @@ static void gpy_update_interface(struct phy_device *phydev) ret = phy_modify_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_SGMII_CTRL, VSPEC1_SGMII_ANEN_ANRS, VSPEC1_SGMII_ANEN_ANRS); - if (ret < 0) + if (ret < 0) { phydev_err(phydev, "Error: Enable of SGMII ANEG failed: %d\n", ret); + return ret; + } break; } - if (phydev->speed == SPEED_2500 || phydev->speed == SPEED_1000) - genphy_read_master_slave(phydev); + if (phydev->speed == SPEED_2500 || phydev->speed == SPEED_1000) { + ret = genphy_read_master_slave(phydev); + if (ret < 0) + return ret; + } + + return gpy_update_mdix(phydev); } static int gpy_read_status(struct phy_device *phydev) @@ -463,8 +604,11 @@ static int gpy_read_status(struct phy_device *phydev) break; } - if (phydev->link) - gpy_update_interface(phydev); + if (phydev->link) { + ret = gpy_update_interface(phydev); + if (ret < 0) + return ret; + } return 0; } @@ -492,6 +636,29 @@ static irqreturn_t gpy_handle_interrupt(struct phy_device *phydev) if (!(reg & PHY_IMASK_MASK)) return IRQ_NONE; + /* The PHY might leave the interrupt line asserted even after PHY_ISTAT + * is read. To avoid interrupt storms, delay the interrupt handling as + * long as the PHY drives the interrupt line. An internal bus read will + * stall as long as the interrupt line is asserted, thus just read a + * random register here. + * Because we cannot access the internal bus at all while the interrupt + * is driven by the PHY, there is no way to make the interrupt line + * unstuck (e.g. by changing the pinmux to GPIO input) during that time + * frame. Therefore, polling is the best we can do and won't do any more + * harm. + * It was observed that this bug happens on link state and link speed + * changes on a GPY215B and GYP215C independent of the firmware version + * (which doesn't mean that this list is exhaustive). + */ + if (gpy_has_broken_mdint(phydev) && + (reg & (PHY_IMASK_LSTC | PHY_IMASK_LSPC))) { + reg = gpy_mbox_read(phydev, REG_GPIO0_OUT); + if (reg < 0) { + phy_error(phydev); + return IRQ_NONE; + } + } + phy_trigger_machine(phydev); return IRQ_HANDLED; |