diff options
Diffstat (limited to 'drivers/net/ethernet/chelsio/cxgb4')
| -rw-r--r-- | drivers/net/ethernet/chelsio/cxgb4/Makefile | 1 | ||||
| -rw-r--r-- | drivers/net/ethernet/chelsio/cxgb4/cxgb4.h | 1 | ||||
| -rw-r--r-- | drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c | 375 | ||||
| -rw-r--r-- | drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c | 82 | ||||
| -rw-r--r-- | drivers/net/ethernet/chelsio/cxgb4/cxgb4_ppm.c | 464 | ||||
| -rw-r--r-- | drivers/net/ethernet/chelsio/cxgb4/cxgb4_ppm.h | 310 | ||||
| -rw-r--r-- | drivers/net/ethernet/chelsio/cxgb4/t4_hw.c | 2 | ||||
| -rw-r--r-- | drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h | 24 |
8 files changed, 337 insertions, 922 deletions
diff --git a/drivers/net/ethernet/chelsio/cxgb4/Makefile b/drivers/net/ethernet/chelsio/cxgb4/Makefile index 85c92821b239..ace0ab98d0f1 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/Makefile +++ b/drivers/net/ethernet/chelsio/cxgb4/Makefile @@ -7,5 +7,4 @@ obj-$(CONFIG_CHELSIO_T4) += cxgb4.o cxgb4-objs := cxgb4_main.o l2t.o t4_hw.o sge.o clip_tbl.o cxgb4_ethtool.o cxgb4-$(CONFIG_CHELSIO_T4_DCB) += cxgb4_dcb.o cxgb4-$(CONFIG_CHELSIO_T4_FCOE) += cxgb4_fcoe.o -cxgb4-$(CONFIG_CHELSIO_T4_UWIRE) += cxgb4_ppm.o cxgb4-$(CONFIG_DEBUG_FS) += cxgb4_debugfs.o diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h b/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h index b4fceb92479f..2e2aa9fec9bb 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h +++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h @@ -418,6 +418,7 @@ struct trace_params { struct link_config { unsigned short supported; /* link capabilities */ unsigned short advertising; /* advertised capabilities */ + unsigned short lp_advertising; /* peer advertised capabilities */ unsigned short requested_speed; /* speed user has requested */ unsigned short speed; /* actual link speed */ unsigned char requested_fc; /* flow control user has requested */ diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c index 7a0b92b2f73c..02f80febeb91 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c +++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c @@ -480,178 +480,293 @@ static int identify_port(struct net_device *dev, return t4_identify_port(adap, adap->pf, netdev2pinfo(dev)->viid, val); } -static unsigned int from_fw_linkcaps(enum fw_port_type type, unsigned int caps) +/** + * from_fw_port_mod_type - translate Firmware Port/Module type to Ethtool + * @port_type: Firmware Port Type + * @mod_type: Firmware Module Type + * + * Translate Firmware Port/Module type to Ethtool Port Type. + */ +static int from_fw_port_mod_type(enum fw_port_type port_type, + enum fw_port_module_type mod_type) { - unsigned int v = 0; - - if (type == FW_PORT_TYPE_BT_SGMII || type == FW_PORT_TYPE_BT_XFI || - type == FW_PORT_TYPE_BT_XAUI) { - v |= SUPPORTED_TP; - if (caps & FW_PORT_CAP_SPEED_100M) - v |= SUPPORTED_100baseT_Full; - if (caps & FW_PORT_CAP_SPEED_1G) - v |= SUPPORTED_1000baseT_Full; - if (caps & FW_PORT_CAP_SPEED_10G) - v |= SUPPORTED_10000baseT_Full; - } else if (type == FW_PORT_TYPE_KX4 || type == FW_PORT_TYPE_KX) { - v |= SUPPORTED_Backplane; - if (caps & FW_PORT_CAP_SPEED_1G) - v |= SUPPORTED_1000baseKX_Full; - if (caps & FW_PORT_CAP_SPEED_10G) - v |= SUPPORTED_10000baseKX4_Full; - } else if (type == FW_PORT_TYPE_KR) { - v |= SUPPORTED_Backplane | SUPPORTED_10000baseKR_Full; - } else if (type == FW_PORT_TYPE_BP_AP) { - v |= SUPPORTED_Backplane | SUPPORTED_10000baseR_FEC | - SUPPORTED_10000baseKR_Full | SUPPORTED_1000baseKX_Full; - } else if (type == FW_PORT_TYPE_BP4_AP) { - v |= SUPPORTED_Backplane | SUPPORTED_10000baseR_FEC | - SUPPORTED_10000baseKR_Full | SUPPORTED_1000baseKX_Full | - SUPPORTED_10000baseKX4_Full; - } else if (type == FW_PORT_TYPE_FIBER_XFI || - type == FW_PORT_TYPE_FIBER_XAUI || - type == FW_PORT_TYPE_SFP || - type == FW_PORT_TYPE_QSFP_10G || - type == FW_PORT_TYPE_QSA) { - v |= SUPPORTED_FIBRE; - if (caps & FW_PORT_CAP_SPEED_1G) - v |= SUPPORTED_1000baseT_Full; - if (caps & FW_PORT_CAP_SPEED_10G) - v |= SUPPORTED_10000baseT_Full; - } else if (type == FW_PORT_TYPE_BP40_BA || - type == FW_PORT_TYPE_QSFP) { - v |= SUPPORTED_40000baseSR4_Full; - v |= SUPPORTED_FIBRE; + if (port_type == FW_PORT_TYPE_BT_SGMII || + port_type == FW_PORT_TYPE_BT_XFI || + port_type == FW_PORT_TYPE_BT_XAUI) { + return PORT_TP; + } else if (port_type == FW_PORT_TYPE_FIBER_XFI || + port_type == FW_PORT_TYPE_FIBER_XAUI) { + return PORT_FIBRE; + } else if (port_type == FW_PORT_TYPE_SFP || + port_type == FW_PORT_TYPE_QSFP_10G || + port_type == FW_PORT_TYPE_QSA || + port_type == FW_PORT_TYPE_QSFP) { + if (mod_type == FW_PORT_MOD_TYPE_LR || + mod_type == FW_PORT_MOD_TYPE_SR || + mod_type == FW_PORT_MOD_TYPE_ER || + mod_type == FW_PORT_MOD_TYPE_LRM) + return PORT_FIBRE; + else if (mod_type == FW_PORT_MOD_TYPE_TWINAX_PASSIVE || + mod_type == FW_PORT_MOD_TYPE_TWINAX_ACTIVE) + return PORT_DA; + else + return PORT_OTHER; } - if (caps & FW_PORT_CAP_ANEG) - v |= SUPPORTED_Autoneg; - return v; + return PORT_OTHER; } -static unsigned int to_fw_linkcaps(unsigned int caps) +/** + * speed_to_fw_caps - translate Port Speed to Firmware Port Capabilities + * @speed: speed in Kb/s + * + * Translates a specific Port Speed into a Firmware Port Capabilities + * value. + */ +static unsigned int speed_to_fw_caps(int speed) { - unsigned int v = 0; - - if (caps & ADVERTISED_100baseT_Full) - v |= FW_PORT_CAP_SPEED_100M; - if (caps & ADVERTISED_1000baseT_Full) - v |= FW_PORT_CAP_SPEED_1G; - if (caps & ADVERTISED_10000baseT_Full) - v |= FW_PORT_CAP_SPEED_10G; - if (caps & ADVERTISED_40000baseSR4_Full) - v |= FW_PORT_CAP_SPEED_40G; - return v; + if (speed == 100) + return FW_PORT_CAP_SPEED_100M; + if (speed == 1000) + return FW_PORT_CAP_SPEED_1G; + if (speed == 10000) + return FW_PORT_CAP_SPEED_10G; + if (speed == 25000) + return FW_PORT_CAP_SPEED_25G; + if (speed == 40000) + return FW_PORT_CAP_SPEED_40G; + if (speed == 100000) + return FW_PORT_CAP_SPEED_100G; + return 0; } -static int get_settings(struct net_device *dev, struct ethtool_cmd *cmd) +/** + * fw_caps_to_lmm - translate Firmware to ethtool Link Mode Mask + * @port_type: Firmware Port Type + * @fw_caps: Firmware Port Capabilities + * @link_mode_mask: ethtool Link Mode Mask + * + * Translate a Firmware Port Capabilities specification to an ethtool + * Link Mode Mask. + */ +static void fw_caps_to_lmm(enum fw_port_type port_type, + unsigned int fw_caps, + unsigned long *link_mode_mask) { - const struct port_info *p = netdev_priv(dev); - - if (p->port_type == FW_PORT_TYPE_BT_SGMII || - p->port_type == FW_PORT_TYPE_BT_XFI || - p->port_type == FW_PORT_TYPE_BT_XAUI) { - cmd->port = PORT_TP; - } else if (p->port_type == FW_PORT_TYPE_FIBER_XFI || - p->port_type == FW_PORT_TYPE_FIBER_XAUI) { - cmd->port = PORT_FIBRE; - } else if (p->port_type == FW_PORT_TYPE_SFP || - p->port_type == FW_PORT_TYPE_QSFP_10G || - p->port_type == FW_PORT_TYPE_QSA || - p->port_type == FW_PORT_TYPE_QSFP) { - if (p->mod_type == FW_PORT_MOD_TYPE_LR || - p->mod_type == FW_PORT_MOD_TYPE_SR || - p->mod_type == FW_PORT_MOD_TYPE_ER || - p->mod_type == FW_PORT_MOD_TYPE_LRM) - cmd->port = PORT_FIBRE; - else if (p->mod_type == FW_PORT_MOD_TYPE_TWINAX_PASSIVE || - p->mod_type == FW_PORT_MOD_TYPE_TWINAX_ACTIVE) - cmd->port = PORT_DA; - else - cmd->port = PORT_OTHER; + #define SET_LMM(__lmm_name) __set_bit(ETHTOOL_LINK_MODE_ ## __lmm_name \ + ## _BIT, link_mode_mask) + + #define FW_CAPS_TO_LMM(__fw_name, __lmm_name) \ + do { \ + if (fw_caps & FW_PORT_CAP_ ## __fw_name) \ + SET_LMM(__lmm_name); \ + } while (0) + + switch (port_type) { + case FW_PORT_TYPE_BT_SGMII: + case FW_PORT_TYPE_BT_XFI: + case FW_PORT_TYPE_BT_XAUI: + SET_LMM(TP); + FW_CAPS_TO_LMM(SPEED_100M, 100baseT_Full); + FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full); + FW_CAPS_TO_LMM(SPEED_10G, 10000baseT_Full); + break; + + case FW_PORT_TYPE_KX4: + case FW_PORT_TYPE_KX: + SET_LMM(Backplane); + FW_CAPS_TO_LMM(SPEED_1G, 1000baseKX_Full); + FW_CAPS_TO_LMM(SPEED_10G, 10000baseKX4_Full); + break; + + case FW_PORT_TYPE_KR: + SET_LMM(Backplane); + SET_LMM(10000baseKR_Full); + break; + + case FW_PORT_TYPE_BP_AP: + SET_LMM(Backplane); + SET_LMM(10000baseR_FEC); + SET_LMM(10000baseKR_Full); + SET_LMM(1000baseKX_Full); + break; + + case FW_PORT_TYPE_BP4_AP: + SET_LMM(Backplane); + SET_LMM(10000baseR_FEC); + SET_LMM(10000baseKR_Full); + SET_LMM(1000baseKX_Full); + SET_LMM(10000baseKX4_Full); + break; + + case FW_PORT_TYPE_FIBER_XFI: + case FW_PORT_TYPE_FIBER_XAUI: + case FW_PORT_TYPE_SFP: + case FW_PORT_TYPE_QSFP_10G: + case FW_PORT_TYPE_QSA: + SET_LMM(FIBRE); + FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full); + FW_CAPS_TO_LMM(SPEED_10G, 10000baseT_Full); + break; + + case FW_PORT_TYPE_BP40_BA: + case FW_PORT_TYPE_QSFP: + SET_LMM(FIBRE); + SET_LMM(40000baseSR4_Full); + break; + + case FW_PORT_TYPE_CR_QSFP: + case FW_PORT_TYPE_SFP28: + SET_LMM(FIBRE); + SET_LMM(25000baseCR_Full); + break; + + case FW_PORT_TYPE_KR4_100G: + case FW_PORT_TYPE_CR4_QSFP: + SET_LMM(FIBRE); + SET_LMM(100000baseCR4_Full); + break; + + default: + break; + } + + FW_CAPS_TO_LMM(ANEG, Autoneg); + FW_CAPS_TO_LMM(802_3_PAUSE, Pause); + FW_CAPS_TO_LMM(802_3_ASM_DIR, Asym_Pause); + + #undef FW_CAPS_TO_LMM + #undef SET_LMM +} + +/** + * lmm_to_fw_caps - translate ethtool Link Mode Mask to Firmware + * capabilities + * + * @link_mode_mask: ethtool Link Mode Mask + * + * Translate ethtool Link Mode Mask into a Firmware Port capabilities + * value. + */ +static unsigned int lmm_to_fw_caps(const unsigned long *link_mode_mask) +{ + unsigned int fw_caps = 0; + + #define LMM_TO_FW_CAPS(__lmm_name, __fw_name) \ + do { \ + if (test_bit(ETHTOOL_LINK_MODE_ ## __lmm_name ## _BIT, \ + link_mode_mask)) \ + fw_caps |= FW_PORT_CAP_ ## __fw_name; \ + } while (0) + + LMM_TO_FW_CAPS(100baseT_Full, SPEED_100M); + LMM_TO_FW_CAPS(1000baseT_Full, SPEED_1G); + LMM_TO_FW_CAPS(10000baseT_Full, SPEED_10G); + LMM_TO_FW_CAPS(40000baseSR4_Full, SPEED_40G); + LMM_TO_FW_CAPS(25000baseCR_Full, SPEED_25G); + LMM_TO_FW_CAPS(100000baseCR4_Full, SPEED_100G); + + #undef LMM_TO_FW_CAPS + + return fw_caps; +} + +static int get_link_ksettings(struct net_device *dev, + struct ethtool_link_ksettings *link_ksettings) +{ + const struct port_info *pi = netdev_priv(dev); + struct ethtool_link_settings *base = &link_ksettings->base; + + ethtool_link_ksettings_zero_link_mode(link_ksettings, supported); + ethtool_link_ksettings_zero_link_mode(link_ksettings, advertising); + ethtool_link_ksettings_zero_link_mode(link_ksettings, lp_advertising); + + base->port = from_fw_port_mod_type(pi->port_type, pi->mod_type); + + if (pi->mdio_addr >= 0) { + base->phy_address = pi->mdio_addr; + base->mdio_support = (pi->port_type == FW_PORT_TYPE_BT_SGMII + ? ETH_MDIO_SUPPORTS_C22 + : ETH_MDIO_SUPPORTS_C45); } else { - cmd->port = PORT_OTHER; + base->phy_address = 255; + base->mdio_support = 0; } - if (p->mdio_addr >= 0) { - cmd->phy_address = p->mdio_addr; - cmd->transceiver = XCVR_EXTERNAL; - cmd->mdio_support = p->port_type == FW_PORT_TYPE_BT_SGMII ? - MDIO_SUPPORTS_C22 : MDIO_SUPPORTS_C45; + fw_caps_to_lmm(pi->port_type, pi->link_cfg.supported, + link_ksettings->link_modes.supported); + fw_caps_to_lmm(pi->port_type, pi->link_cfg.advertising, + link_ksettings->link_modes.advertising); + fw_caps_to_lmm(pi->port_type, pi->link_cfg.lp_advertising, + link_ksettings->link_modes.lp_advertising); + + if (netif_carrier_ok(dev)) { + base->speed = pi->link_cfg.speed; + base->duplex = DUPLEX_FULL; } else { - cmd->phy_address = 0; /* not really, but no better option */ - cmd->transceiver = XCVR_INTERNAL; - cmd->mdio_support = 0; + base->speed = SPEED_UNKNOWN; + base->duplex = DUPLEX_UNKNOWN; } - cmd->supported = from_fw_linkcaps(p->port_type, p->link_cfg.supported); - cmd->advertising = from_fw_linkcaps(p->port_type, - p->link_cfg.advertising); - ethtool_cmd_speed_set(cmd, - netif_carrier_ok(dev) ? p->link_cfg.speed : 0); - cmd->duplex = DUPLEX_FULL; - cmd->autoneg = p->link_cfg.autoneg; - cmd->maxtxpkt = 0; - cmd->maxrxpkt = 0; - return 0; -} + base->autoneg = pi->link_cfg.autoneg; + if (pi->link_cfg.supported & FW_PORT_CAP_ANEG) + ethtool_link_ksettings_add_link_mode(link_ksettings, + supported, Autoneg); + if (pi->link_cfg.autoneg) + ethtool_link_ksettings_add_link_mode(link_ksettings, + advertising, Autoneg); -static unsigned int speed_to_caps(int speed) -{ - if (speed == 100) - return FW_PORT_CAP_SPEED_100M; - if (speed == 1000) - return FW_PORT_CAP_SPEED_1G; - if (speed == 10000) - return FW_PORT_CAP_SPEED_10G; - if (speed == 40000) - return FW_PORT_CAP_SPEED_40G; return 0; } -static int set_settings(struct net_device *dev, struct ethtool_cmd *cmd) +static int set_link_ksettings(struct net_device *dev, + const struct ethtool_link_ksettings + *link_ksettings) { - unsigned int cap; - struct port_info *p = netdev_priv(dev); - struct link_config *lc = &p->link_cfg; - u32 speed = ethtool_cmd_speed(cmd); + struct port_info *pi = netdev_priv(dev); + struct link_config *lc = &pi->link_cfg; + const struct ethtool_link_settings *base = &link_ksettings->base; struct link_config old_lc; - int ret; + unsigned int fw_caps; + int ret = 0; - if (cmd->duplex != DUPLEX_FULL) /* only full-duplex supported */ + /* only full-duplex supported */ + if (base->duplex != DUPLEX_FULL) return -EINVAL; if (!(lc->supported & FW_PORT_CAP_ANEG)) { /* PHY offers a single speed. See if that's what's * being requested. */ - if (cmd->autoneg == AUTONEG_DISABLE && - (lc->supported & speed_to_caps(speed))) + if (base->autoneg == AUTONEG_DISABLE && + (lc->supported & speed_to_fw_caps(base->speed))) return 0; return -EINVAL; } old_lc = *lc; - if (cmd->autoneg == AUTONEG_DISABLE) { - cap = speed_to_caps(speed); + if (base->autoneg == AUTONEG_DISABLE) { + fw_caps = speed_to_fw_caps(base->speed); - if (!(lc->supported & cap)) + if (!(lc->supported & fw_caps)) return -EINVAL; - lc->requested_speed = cap; + lc->requested_speed = fw_caps; lc->advertising = 0; } else { - cap = to_fw_linkcaps(cmd->advertising); - if (!(lc->supported & cap)) + fw_caps = + lmm_to_fw_caps(link_ksettings->link_modes.advertising); + + if (!(lc->supported & fw_caps)) return -EINVAL; lc->requested_speed = 0; - lc->advertising = cap | FW_PORT_CAP_ANEG; + lc->advertising = fw_caps | FW_PORT_CAP_ANEG; } - lc->autoneg = cmd->autoneg; + lc->autoneg = base->autoneg; /* If the firmware rejects the Link Configuration request, back out * the changes and report the error. */ - ret = t4_link_l1cfg(p->adapter, p->adapter->mbox, p->tx_chan, lc); + ret = t4_link_l1cfg(pi->adapter, pi->adapter->mbox, pi->tx_chan, lc); if (ret) *lc = old_lc; @@ -1093,8 +1208,8 @@ static int get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info, } static const struct ethtool_ops cxgb_ethtool_ops = { - .get_settings = get_settings, - .set_settings = set_settings, + .get_link_ksettings = get_link_ksettings, + .set_link_ksettings = set_link_ksettings, .get_drvinfo = get_drvinfo, .get_msglevel = get_msglevel, .set_msglevel = set_msglevel, diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c index 477db477b133..c45de49dc963 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c +++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c @@ -64,6 +64,7 @@ #include <net/bonding.h> #include <net/addrconf.h> #include <asm/uaccess.h> +#include <linux/crash_dump.h> #include "cxgb4.h" #include "t4_regs.h" @@ -206,7 +207,7 @@ static int rx_dma_offset = 2; static unsigned int num_vf[NUM_OF_PF_WITH_SRIOV]; module_param_array(num_vf, uint, NULL, 0644); -MODULE_PARM_DESC(num_vf, "number of VFs for each of PFs 0-3"); +MODULE_PARM_DESC(num_vf, "number of VFs for each of PFs 0-3, deprecated parameter - please use the pci sysfs interface."); #endif /* TX Queue select used to determine what algorithm to use for selecting TX @@ -460,11 +461,8 @@ static int set_rxmode(struct net_device *dev, int mtu, bool sleep_ok) struct port_info *pi = netdev_priv(dev); struct adapter *adapter = pi->adapter; - if (!(dev->flags & IFF_PROMISC)) { - __dev_uc_sync(dev, cxgb4_mac_sync, cxgb4_mac_unsync); - if (!(dev->flags & IFF_ALLMULTI)) - __dev_mc_sync(dev, cxgb4_mac_sync, cxgb4_mac_unsync); - } + __dev_uc_sync(dev, cxgb4_mac_sync, cxgb4_mac_unsync); + __dev_mc_sync(dev, cxgb4_mac_sync, cxgb4_mac_unsync); return t4_set_rxmode(adapter, adapter->mbox, pi->viid, mtu, (dev->flags & IFF_PROMISC) ? 1 : 0, @@ -3735,7 +3733,8 @@ static int adap_init0(struct adapter *adap) return ret; /* Contact FW, advertising Master capability */ - ret = t4_fw_hello(adap, adap->mbox, adap->mbox, MASTER_MAY, &state); + ret = t4_fw_hello(adap, adap->mbox, adap->mbox, + is_kdump_kernel() ? MASTER_MUST : MASTER_MAY, &state); if (ret < 0) { dev_err(adap->pdev_dev, "could not connect to FW, error %d\n", ret); @@ -4366,6 +4365,11 @@ static void cfg_queues(struct adapter *adap) if (q10g > netif_get_num_default_rss_queues()) q10g = netif_get_num_default_rss_queues(); + /* Reduce memory usage in kdump environment, disable all offload. + */ + if (is_kdump_kernel()) + adap->params.offload = 0; + for_each_port(adap, i) { struct port_info *pi = adap2pinfo(adap, i); @@ -4829,6 +4833,60 @@ static int get_chip_type(struct pci_dev *pdev, u32 pl_rev) return -EINVAL; } +#ifdef CONFIG_PCI_IOV +static int cxgb4_iov_configure(struct pci_dev *pdev, int num_vfs) +{ + int err = 0; + int current_vfs = pci_num_vf(pdev); + u32 pcie_fw; + void __iomem *regs; + + regs = pci_ioremap_bar(pdev, 0); + if (!regs) { + dev_err(&pdev->dev, "cannot map device registers\n"); + return -ENOMEM; + } + + pcie_fw = readl(regs + PCIE_FW_A); + iounmap(regs); + /* Check if cxgb4 is the MASTER and fw is initialized */ + if (!(pcie_fw & PCIE_FW_INIT_F) || + !(pcie_fw & PCIE_FW_MASTER_VLD_F) || + PCIE_FW_MASTER_G(pcie_fw) != 4) { + dev_warn(&pdev->dev, + "cxgb4 driver needs to be MASTER to support SRIOV\n"); + return -EOPNOTSUPP; + } + + /* If any of the VF's is already assigned to Guest OS, then + * SRIOV for the same cannot be modified + */ + if (current_vfs && pci_vfs_assigned(pdev)) { + dev_err(&pdev->dev, + "Cannot modify SR-IOV while VFs are assigned\n"); + num_vfs = current_vfs; + return num_vfs; + } + + /* Disable SRIOV when zero is passed. + * One needs to disable SRIOV before modifying it, else + * stack throws the below warning: + * " 'n' VFs already enabled. Disable before enabling 'm' VFs." + */ + if (!num_vfs) { + pci_disable_sriov(pdev); + return num_vfs; + } + + if (num_vfs != current_vfs) { + err = pci_enable_sriov(pdev, num_vfs); + if (err) + return err; + } + return num_vfs; +} +#endif + static int init_one(struct pci_dev *pdev, const struct pci_device_id *ent) { int func, i, err, s_qpp, qpp, num_seg; @@ -5162,11 +5220,16 @@ static int init_one(struct pci_dev *pdev, const struct pci_device_id *ent) sriov: #ifdef CONFIG_PCI_IOV - if (func < ARRAY_SIZE(num_vf) && num_vf[func] > 0) + if (func < ARRAY_SIZE(num_vf) && num_vf[func] > 0) { + dev_warn(&pdev->dev, + "Enabling SR-IOV VFs using the num_vf module " + "parameter is deprecated - please use the pci sysfs " + "interface instead.\n"); if (pci_enable_sriov(pdev, num_vf[func]) == 0) dev_info(&pdev->dev, "instantiated %u virtual functions\n", num_vf[func]); + } #endif return 0; @@ -5259,6 +5322,9 @@ static struct pci_driver cxgb4_driver = { .probe = init_one, .remove = remove_one, .shutdown = remove_one, +#ifdef CONFIG_PCI_IOV + .sriov_configure = cxgb4_iov_configure, +#endif .err_handler = &cxgb4_eeh, }; diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_ppm.c b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_ppm.c deleted file mode 100644 index d88a7a7b2400..000000000000 --- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_ppm.c +++ /dev/null @@ -1,464 +0,0 @@ -/* - * cxgb4_ppm.c: Chelsio common library for T4/T5 iSCSI PagePod Manager - * - * Copyright (c) 2016 Chelsio Communications, Inc. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Written by: Karen Xie (kxie@chelsio.com) - */ - -#include <linux/kernel.h> -#include <linux/version.h> -#include <linux/module.h> -#include <linux/errno.h> -#include <linux/types.h> -#include <linux/debugfs.h> -#include <linux/export.h> -#include <linux/list.h> -#include <linux/skbuff.h> -#include <linux/pci.h> -#include <linux/scatterlist.h> - -#include "cxgb4_ppm.h" - -/* Direct Data Placement - - * Directly place the iSCSI Data-In or Data-Out PDU's payload into - * pre-posted final destination host-memory buffers based on the - * Initiator Task Tag (ITT) in Data-In or Target Task Tag (TTT) - * in Data-Out PDUs. The host memory address is programmed into - * h/w in the format of pagepod entries. The location of the - * pagepod entry is encoded into ddp tag which is used as the base - * for ITT/TTT. - */ - -/* Direct-Data Placement page size adjustment - */ -int cxgbi_ppm_find_page_index(struct cxgbi_ppm *ppm, unsigned long pgsz) -{ - struct cxgbi_tag_format *tformat = &ppm->tformat; - int i; - - for (i = 0; i < DDP_PGIDX_MAX; i++) { - if (pgsz == 1UL << (DDP_PGSZ_BASE_SHIFT + - tformat->pgsz_order[i])) { - pr_debug("%s: %s ppm, pgsz %lu -> idx %d.\n", - __func__, ppm->ndev->name, pgsz, i); - return i; - } - } - pr_info("ippm: ddp page size %lu not supported.\n", pgsz); - return DDP_PGIDX_MAX; -} - -/* DDP setup & teardown - */ -static int ppm_find_unused_entries(unsigned long *bmap, - unsigned int max_ppods, - unsigned int start, - unsigned int nr, - unsigned int align_mask) -{ - unsigned long i; - - i = bitmap_find_next_zero_area(bmap, max_ppods, start, nr, align_mask); - - if (unlikely(i >= max_ppods) && (start > nr)) - i = bitmap_find_next_zero_area(bmap, max_ppods, 0, start - 1, - align_mask); - if (unlikely(i >= max_ppods)) - return -ENOSPC; - - bitmap_set(bmap, i, nr); - return (int)i; -} - -static void ppm_mark_entries(struct cxgbi_ppm *ppm, int i, int count, - unsigned long caller_data) -{ - struct cxgbi_ppod_data *pdata = ppm->ppod_data + i; - - pdata->caller_data = caller_data; - pdata->npods = count; - - if (pdata->color == ((1 << PPOD_IDX_SHIFT) - 1)) - pdata->color = 0; - else - pdata->color++; -} - -static int ppm_get_cpu_entries(struct cxgbi_ppm *ppm, unsigned int count, - unsigned long caller_data) -{ - struct cxgbi_ppm_pool *pool; - unsigned int cpu; - int i; - - cpu = get_cpu(); - pool = per_cpu_ptr(ppm->pool, cpu); - spin_lock_bh(&pool->lock); - put_cpu(); - - i = ppm_find_unused_entries(pool->bmap, ppm->pool_index_max, - pool->next, count, 0); - if (i < 0) { - pool->next = 0; - spin_unlock_bh(&pool->lock); - return -ENOSPC; - } - - pool->next = i + count; - if (pool->next >= ppm->pool_index_max) - pool->next = 0; - - spin_unlock_bh(&pool->lock); - - pr_debug("%s: cpu %u, idx %d + %d (%d), next %u.\n", - __func__, cpu, i, count, i + cpu * ppm->pool_index_max, - pool->next); - - i += cpu * ppm->pool_index_max; - ppm_mark_entries(ppm, i, count, caller_data); - - return i; -} - -static int ppm_get_entries(struct cxgbi_ppm *ppm, unsigned int count, - unsigned long caller_data) -{ - int i; - - spin_lock_bh(&ppm->map_lock); - i = ppm_find_unused_entries(ppm->ppod_bmap, ppm->bmap_index_max, - ppm->next, count, 0); - if (i < 0) { - ppm->next = 0; - spin_unlock_bh(&ppm->map_lock); - pr_debug("ippm: NO suitable entries %u available.\n", - count); - return -ENOSPC; - } - - ppm->next = i + count; - if (ppm->next >= ppm->bmap_index_max) - ppm->next = 0; - - spin_unlock_bh(&ppm->map_lock); - - pr_debug("%s: idx %d + %d (%d), next %u, caller_data 0x%lx.\n", - __func__, i, count, i + ppm->pool_rsvd, ppm->next, - caller_data); - - i += ppm->pool_rsvd; - ppm_mark_entries(ppm, i, count, caller_data); - - return i; -} - -static void ppm_unmark_entries(struct cxgbi_ppm *ppm, int i, int count) -{ - pr_debug("%s: idx %d + %d.\n", __func__, i, count); - - if (i < ppm->pool_rsvd) { - unsigned int cpu; - struct cxgbi_ppm_pool *pool; - - cpu = i / ppm->pool_index_max; - i %= ppm->pool_index_max; - - pool = per_cpu_ptr(ppm->pool, cpu); - spin_lock_bh(&pool->lock); - bitmap_clear(pool->bmap, i, count); - - if (i < pool->next) - pool->next = i; - spin_unlock_bh(&pool->lock); - - pr_debug("%s: cpu %u, idx %d, next %u.\n", - __func__, cpu, i, pool->next); - } else { - spin_lock_bh(&ppm->map_lock); - - i -= ppm->pool_rsvd; - bitmap_clear(ppm->ppod_bmap, i, count); - - if (i < ppm->next) - ppm->next = i; - spin_unlock_bh(&ppm->map_lock); - - pr_debug("%s: idx %d, next %u.\n", __func__, i, ppm->next); - } -} - -void cxgbi_ppm_ppod_release(struct cxgbi_ppm *ppm, u32 idx) -{ - struct cxgbi_ppod_data *pdata; - - if (idx >= ppm->ppmax) { - pr_warn("ippm: idx too big %u > %u.\n", idx, ppm->ppmax); - return; - } - - pdata = ppm->ppod_data + idx; - if (!pdata->npods) { - pr_warn("ippm: idx %u, npods 0.\n", idx); - return; - } - - pr_debug("release idx %u, npods %u.\n", idx, pdata->npods); - ppm_unmark_entries(ppm, idx, pdata->npods); -} -EXPORT_SYMBOL(cxgbi_ppm_ppod_release); - -int cxgbi_ppm_ppods_reserve(struct cxgbi_ppm *ppm, unsigned short nr_pages, - u32 per_tag_pg_idx, u32 *ppod_idx, - u32 *ddp_tag, unsigned long caller_data) -{ - struct cxgbi_ppod_data *pdata; - unsigned int npods; - int idx = -1; - unsigned int hwidx; - u32 tag; - - npods = (nr_pages + PPOD_PAGES_MAX - 1) >> PPOD_PAGES_SHIFT; - if (!npods) { - pr_warn("%s: pages %u -> npods %u, full.\n", - __func__, nr_pages, npods); - return -EINVAL; - } - - /* grab from cpu pool first */ - idx = ppm_get_cpu_entries(ppm, npods, caller_data); - /* try the general pool */ - if (idx < 0) - idx = ppm_get_entries(ppm, npods, caller_data); - if (idx < 0) { - pr_debug("ippm: pages %u, nospc %u, nxt %u, 0x%lx.\n", - nr_pages, npods, ppm->next, caller_data); - return idx; - } - - pdata = ppm->ppod_data + idx; - hwidx = ppm->base_idx + idx; - - tag = cxgbi_ppm_make_ddp_tag(hwidx, pdata->color); - - if (per_tag_pg_idx) - tag |= (per_tag_pg_idx << 30) & 0xC0000000; - - *ppod_idx = idx; - *ddp_tag = tag; - - pr_debug("ippm: sg %u, tag 0x%x(%u,%u), data 0x%lx.\n", - nr_pages, tag, idx, npods, caller_data); - - return npods; -} -EXPORT_SYMBOL(cxgbi_ppm_ppods_reserve); - -void cxgbi_ppm_make_ppod_hdr(struct cxgbi_ppm *ppm, u32 tag, - unsigned int tid, unsigned int offset, - unsigned int length, - struct cxgbi_pagepod_hdr *hdr) -{ - /* The ddp tag in pagepod should be with bit 31:30 set to 0. - * The ddp Tag on the wire should be with non-zero 31:30 to the peer - */ - tag &= 0x3FFFFFFF; - - hdr->vld_tid = htonl(PPOD_VALID_FLAG | PPOD_TID(tid)); - - hdr->rsvd = 0; - hdr->pgsz_tag_clr = htonl(tag & ppm->tformat.idx_clr_mask); - hdr->max_offset = htonl(length); - hdr->page_offset = htonl(offset); - - pr_debug("ippm: tag 0x%x, tid 0x%x, xfer %u, off %u.\n", - tag, tid, length, offset); -} -EXPORT_SYMBOL(cxgbi_ppm_make_ppod_hdr); - -static void ppm_free(struct cxgbi_ppm *ppm) -{ - vfree(ppm); -} - -static void ppm_destroy(struct kref *kref) -{ - struct cxgbi_ppm *ppm = container_of(kref, - struct cxgbi_ppm, - refcnt); - pr_info("ippm: kref 0, destroy %s ppm 0x%p.\n", - ppm->ndev->name, ppm); - - *ppm->ppm_pp = NULL; - - free_percpu(ppm->pool); - ppm_free(ppm); -} - -int cxgbi_ppm_release(struct cxgbi_ppm *ppm) -{ - if (ppm) { - int rv; - - rv = kref_put(&ppm->refcnt, ppm_destroy); - return rv; - } - return 1; -} - -static struct cxgbi_ppm_pool *ppm_alloc_cpu_pool(unsigned int *total, - unsigned int *pcpu_ppmax) -{ - struct cxgbi_ppm_pool *pools; - unsigned int ppmax = (*total) / num_possible_cpus(); - unsigned int max = (PCPU_MIN_UNIT_SIZE - sizeof(*pools)) << 3; - unsigned int bmap; - unsigned int alloc_sz; - unsigned int count = 0; - unsigned int cpu; - - /* make sure per cpu pool fits into PCPU_MIN_UNIT_SIZE */ - if (ppmax > max) - ppmax = max; - - /* pool size must be multiple of unsigned long */ - bmap = BITS_TO_LONGS(ppmax); - ppmax = (bmap * sizeof(unsigned long)) << 3; - - alloc_sz = sizeof(*pools) + sizeof(unsigned long) * bmap; - pools = __alloc_percpu(alloc_sz, __alignof__(struct cxgbi_ppm_pool)); - - if (!pools) - return NULL; - - for_each_possible_cpu(cpu) { - struct cxgbi_ppm_pool *ppool = per_cpu_ptr(pools, cpu); - - memset(ppool, 0, alloc_sz); - spin_lock_init(&ppool->lock); - count += ppmax; - } - - *total = count; - *pcpu_ppmax = ppmax; - - return pools; -} - -int cxgbi_ppm_init(void **ppm_pp, struct net_device *ndev, - struct pci_dev *pdev, void *lldev, - struct cxgbi_tag_format *tformat, - unsigned int ppmax, - unsigned int llimit, - unsigned int start, - unsigned int reserve_factor) -{ - struct cxgbi_ppm *ppm = (struct cxgbi_ppm *)(*ppm_pp); - struct cxgbi_ppm_pool *pool = NULL; - unsigned int ppmax_pool = 0; - unsigned int pool_index_max = 0; - unsigned int alloc_sz; - unsigned int ppod_bmap_size; - - if (ppm) { - pr_info("ippm: %s, ppm 0x%p,0x%p already initialized, %u/%u.\n", - ndev->name, ppm_pp, ppm, ppm->ppmax, ppmax); - kref_get(&ppm->refcnt); - return 1; - } - - if (reserve_factor) { - ppmax_pool = ppmax / reserve_factor; - pool = ppm_alloc_cpu_pool(&ppmax_pool, &pool_index_max); - - pr_debug("%s: ppmax %u, cpu total %u, per cpu %u.\n", - ndev->name, ppmax, ppmax_pool, pool_index_max); - } - - ppod_bmap_size = BITS_TO_LONGS(ppmax - ppmax_pool); - alloc_sz = sizeof(struct cxgbi_ppm) + - ppmax * (sizeof(struct cxgbi_ppod_data)) + - ppod_bmap_size * sizeof(unsigned long); - - ppm = vmalloc(alloc_sz); - if (!ppm) - goto release_ppm_pool; - - memset(ppm, 0, alloc_sz); - - ppm->ppod_bmap = (unsigned long *)(&ppm->ppod_data[ppmax]); - - if ((ppod_bmap_size >> 3) > (ppmax - ppmax_pool)) { - unsigned int start = ppmax - ppmax_pool; - unsigned int end = ppod_bmap_size >> 3; - - bitmap_set(ppm->ppod_bmap, ppmax, end - start); - pr_info("%s: %u - %u < %u * 8, mask extra bits %u, %u.\n", - __func__, ppmax, ppmax_pool, ppod_bmap_size, start, - end); - } - - spin_lock_init(&ppm->map_lock); - kref_init(&ppm->refcnt); - - memcpy(&ppm->tformat, tformat, sizeof(struct cxgbi_tag_format)); - - ppm->ppm_pp = ppm_pp; - ppm->ndev = ndev; - ppm->pdev = pdev; - ppm->lldev = lldev; - ppm->ppmax = ppmax; - ppm->next = 0; - ppm->llimit = llimit; - ppm->base_idx = start > llimit ? - (start - llimit + 1) >> PPOD_SIZE_SHIFT : 0; - ppm->bmap_index_max = ppmax - ppmax_pool; - - ppm->pool = pool; - ppm->pool_rsvd = ppmax_pool; - ppm->pool_index_max = pool_index_max; - - /* check one more time */ - if (*ppm_pp) { - ppm_free(ppm); - ppm = (struct cxgbi_ppm *)(*ppm_pp); - - pr_info("ippm: %s, ppm 0x%p,0x%p already initialized, %u/%u.\n", - ndev->name, ppm_pp, *ppm_pp, ppm->ppmax, ppmax); - - kref_get(&ppm->refcnt); - return 1; - } - *ppm_pp = ppm; - - ppm->tformat.pgsz_idx_dflt = cxgbi_ppm_find_page_index(ppm, PAGE_SIZE); - - pr_info("ippm %s: ppm 0x%p, 0x%p, base %u/%u, pg %lu,%u, rsvd %u,%u.\n", - ndev->name, ppm_pp, ppm, ppm->base_idx, ppm->ppmax, PAGE_SIZE, - ppm->tformat.pgsz_idx_dflt, ppm->pool_rsvd, - ppm->pool_index_max); - - return 0; - -release_ppm_pool: - free_percpu(pool); - return -ENOMEM; -} -EXPORT_SYMBOL(cxgbi_ppm_init); - -unsigned int cxgbi_tagmask_set(unsigned int ppmax) -{ - unsigned int bits = fls(ppmax); - - if (bits > PPOD_IDX_MAX_SIZE) - bits = PPOD_IDX_MAX_SIZE; - - pr_info("ippm: ppmax %u/0x%x -> bits %u, tagmask 0x%x.\n", - ppmax, ppmax, bits, 1 << (bits + PPOD_IDX_SHIFT)); - - return 1 << (bits + PPOD_IDX_SHIFT); -} diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_ppm.h b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_ppm.h deleted file mode 100644 index d48732673b75..000000000000 --- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_ppm.h +++ /dev/null @@ -1,310 +0,0 @@ -/* - * cxgb4_ppm.h: Chelsio common library for T4/T5 iSCSI ddp operation - * - * Copyright (c) 2016 Chelsio Communications, Inc. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Written by: Karen Xie (kxie@chelsio.com) - */ - -#ifndef __CXGB4PPM_H__ -#define __CXGB4PPM_H__ - -#include <linux/kernel.h> -#include <linux/errno.h> -#include <linux/types.h> -#include <linux/debugfs.h> -#include <linux/list.h> -#include <linux/netdevice.h> -#include <linux/scatterlist.h> -#include <linux/skbuff.h> -#include <linux/vmalloc.h> -#include <linux/bitmap.h> - -struct cxgbi_pagepod_hdr { - u32 vld_tid; - u32 pgsz_tag_clr; - u32 max_offset; - u32 page_offset; - u64 rsvd; -}; - -#define PPOD_PAGES_MAX 4 -struct cxgbi_pagepod { - struct cxgbi_pagepod_hdr hdr; - u64 addr[PPOD_PAGES_MAX + 1]; -}; - -/* ddp tag format - * for a 32-bit tag: - * bit # - * 31 ..... ..... 0 - * X Y...Y Z...Z, where - * ^ ^^^^^ ^^^^ - * | | |____ when ddp bit = 0: color bits - * | | - * | |____ when ddp bit = 0: idx into the ddp memory region - * | - * |____ ddp bit: 0 - ddp tag, 1 - non-ddp tag - * - * [page selector:2] [sw/free bits] [0] [idx] [color:6] - */ - -#define DDP_PGIDX_MAX 4 -#define DDP_PGSZ_BASE_SHIFT 12 /* base page 4K */ - -struct cxgbi_task_tag_info { - unsigned char flags; -#define CXGBI_PPOD_INFO_FLAG_VALID 0x1 -#define CXGBI_PPOD_INFO_FLAG_MAPPED 0x2 - unsigned char cid; - unsigned short pg_shift; - unsigned int npods; - unsigned int idx; - unsigned int tag; - struct cxgbi_pagepod_hdr hdr; - int nents; - int nr_pages; - struct scatterlist *sgl; -}; - -struct cxgbi_tag_format { - unsigned char pgsz_order[DDP_PGIDX_MAX]; - unsigned char pgsz_idx_dflt; - unsigned char free_bits:4; - unsigned char color_bits:4; - unsigned char idx_bits; - unsigned char rsvd_bits; - unsigned int no_ddp_mask; - unsigned int idx_mask; - unsigned int color_mask; - unsigned int idx_clr_mask; - unsigned int rsvd_mask; -}; - -struct cxgbi_ppod_data { - unsigned char pg_idx:2; - unsigned char color:6; - unsigned char chan_id; - unsigned short npods; - unsigned long caller_data; -}; - -/* per cpu ppm pool */ -struct cxgbi_ppm_pool { - unsigned int base; /* base index */ - unsigned int next; /* next possible free index */ - spinlock_t lock; /* ppm pool lock */ - unsigned long bmap[0]; -} ____cacheline_aligned_in_smp; - -struct cxgbi_ppm { - struct kref refcnt; - struct net_device *ndev; /* net_device, 1st port */ - struct pci_dev *pdev; - void *lldev; - void **ppm_pp; - struct cxgbi_tag_format tformat; - unsigned int ppmax; - unsigned int llimit; - unsigned int base_idx; - - unsigned int pool_rsvd; - unsigned int pool_index_max; - struct cxgbi_ppm_pool __percpu *pool; - /* map lock */ - spinlock_t map_lock; /* ppm map lock */ - unsigned int bmap_index_max; - unsigned int next; - unsigned long *ppod_bmap; - struct cxgbi_ppod_data ppod_data[0]; -}; - -#define DDP_THRESHOLD 512 - -#define PPOD_PAGES_SHIFT 2 /* 4 pages per pod */ - -#define IPPOD_SIZE sizeof(struct cxgbi_pagepod) /* 64 */ -#define PPOD_SIZE_SHIFT 6 - -/* page pods are allocated in groups of this size (must be power of 2) */ -#define PPOD_CLUSTER_SIZE 16U - -#define ULPMEM_DSGL_MAX_NPPODS 16 /* 1024/PPOD_SIZE */ -#define ULPMEM_IDATA_MAX_NPPODS 3 /* (PPOD_SIZE * 3 + ulptx hdr) < 256B */ -#define PCIE_MEMWIN_MAX_NPPODS 16 /* 1024/PPOD_SIZE */ - -#define PPOD_COLOR_SHIFT 0 -#define PPOD_COLOR(x) ((x) << PPOD_COLOR_SHIFT) - -#define PPOD_IDX_SHIFT 6 -#define PPOD_IDX_MAX_SIZE 24 - -#define PPOD_TID_SHIFT 0 -#define PPOD_TID(x) ((x) << PPOD_TID_SHIFT) - -#define PPOD_TAG_SHIFT 6 -#define PPOD_TAG(x) ((x) << PPOD_TAG_SHIFT) - -#define PPOD_VALID_SHIFT 24 -#define PPOD_VALID(x) ((x) << PPOD_VALID_SHIFT) -#define PPOD_VALID_FLAG PPOD_VALID(1U) - -#define PPOD_PI_EXTRACT_CTL_SHIFT 31 -#define PPOD_PI_EXTRACT_CTL(x) ((x) << PPOD_PI_EXTRACT_CTL_SHIFT) -#define PPOD_PI_EXTRACT_CTL_FLAG V_PPOD_PI_EXTRACT_CTL(1U) - -#define PPOD_PI_TYPE_SHIFT 29 -#define PPOD_PI_TYPE_MASK 0x3 -#define PPOD_PI_TYPE(x) ((x) << PPOD_PI_TYPE_SHIFT) - -#define PPOD_PI_CHECK_CTL_SHIFT 27 -#define PPOD_PI_CHECK_CTL_MASK 0x3 -#define PPOD_PI_CHECK_CTL(x) ((x) << PPOD_PI_CHECK_CTL_SHIFT) - -#define PPOD_PI_REPORT_CTL_SHIFT 25 -#define PPOD_PI_REPORT_CTL_MASK 0x3 -#define PPOD_PI_REPORT_CTL(x) ((x) << PPOD_PI_REPORT_CTL_SHIFT) - -static inline int cxgbi_ppm_is_ddp_tag(struct cxgbi_ppm *ppm, u32 tag) -{ - return !(tag & ppm->tformat.no_ddp_mask); -} - -static inline int cxgbi_ppm_sw_tag_is_usable(struct cxgbi_ppm *ppm, - u32 tag) -{ - /* the sw tag must be using <= 31 bits */ - return !(tag & 0x80000000U); -} - -static inline int cxgbi_ppm_make_non_ddp_tag(struct cxgbi_ppm *ppm, - u32 sw_tag, - u32 *final_tag) -{ - struct cxgbi_tag_format *tformat = &ppm->tformat; - - if (!cxgbi_ppm_sw_tag_is_usable(ppm, sw_tag)) { - pr_info("sw_tag 0x%x NOT usable.\n", sw_tag); - return -EINVAL; - } - - if (!sw_tag) { - *final_tag = tformat->no_ddp_mask; - } else { - unsigned int shift = tformat->idx_bits + tformat->color_bits; - u32 lower = sw_tag & tformat->idx_clr_mask; - u32 upper = (sw_tag >> shift) << (shift + 1); - - *final_tag = upper | tformat->no_ddp_mask | lower; - } - return 0; -} - -static inline u32 cxgbi_ppm_decode_non_ddp_tag(struct cxgbi_ppm *ppm, - u32 tag) -{ - struct cxgbi_tag_format *tformat = &ppm->tformat; - unsigned int shift = tformat->idx_bits + tformat->color_bits; - u32 lower = tag & tformat->idx_clr_mask; - u32 upper = (tag >> tformat->rsvd_bits) << shift; - - return upper | lower; -} - -static inline u32 cxgbi_ppm_ddp_tag_get_idx(struct cxgbi_ppm *ppm, - u32 ddp_tag) -{ - u32 hw_idx = (ddp_tag >> PPOD_IDX_SHIFT) & - ppm->tformat.idx_mask; - - return hw_idx - ppm->base_idx; -} - -static inline u32 cxgbi_ppm_make_ddp_tag(unsigned int hw_idx, - unsigned char color) -{ - return (hw_idx << PPOD_IDX_SHIFT) | ((u32)color); -} - -static inline unsigned long -cxgbi_ppm_get_tag_caller_data(struct cxgbi_ppm *ppm, - u32 ddp_tag) -{ - u32 idx = cxgbi_ppm_ddp_tag_get_idx(ppm, ddp_tag); - - return ppm->ppod_data[idx].caller_data; -} - -/* sw bits are the free bits */ -static inline int cxgbi_ppm_ddp_tag_update_sw_bits(struct cxgbi_ppm *ppm, - u32 val, u32 orig_tag, - u32 *final_tag) -{ - struct cxgbi_tag_format *tformat = &ppm->tformat; - u32 v = val >> tformat->free_bits; - - if (v) { - pr_info("sw_bits 0x%x too large, avail bits %u.\n", - val, tformat->free_bits); - return -EINVAL; - } - if (!cxgbi_ppm_is_ddp_tag(ppm, orig_tag)) - return -EINVAL; - - *final_tag = (val << tformat->rsvd_bits) | - (orig_tag & ppm->tformat.rsvd_mask); - return 0; -} - -static inline void cxgbi_ppm_ppod_clear(struct cxgbi_pagepod *ppod) -{ - ppod->hdr.vld_tid = 0U; -} - -static inline void cxgbi_tagmask_check(unsigned int tagmask, - struct cxgbi_tag_format *tformat) -{ - unsigned int bits = fls(tagmask); - - /* reserve top most 2 bits for page selector */ - tformat->free_bits = 32 - 2 - bits; - tformat->rsvd_bits = bits; - tformat->color_bits = PPOD_IDX_SHIFT; - tformat->idx_bits = bits - 1 - PPOD_IDX_SHIFT; - tformat->no_ddp_mask = 1 << (bits - 1); - tformat->idx_mask = (1 << tformat->idx_bits) - 1; - tformat->color_mask = (1 << PPOD_IDX_SHIFT) - 1; - tformat->idx_clr_mask = (1 << (bits - 1)) - 1; - tformat->rsvd_mask = (1 << bits) - 1; - - pr_info("ippm: tagmask 0x%x, rsvd %u=%u+%u+1, mask 0x%x,0x%x, " - "pg %u,%u,%u,%u.\n", - tagmask, tformat->rsvd_bits, tformat->idx_bits, - tformat->color_bits, tformat->no_ddp_mask, tformat->rsvd_mask, - tformat->pgsz_order[0], tformat->pgsz_order[1], - tformat->pgsz_order[2], tformat->pgsz_order[3]); -} - -int cxgbi_ppm_find_page_index(struct cxgbi_ppm *ppm, unsigned long pgsz); -void cxgbi_ppm_make_ppod_hdr(struct cxgbi_ppm *ppm, u32 tag, - unsigned int tid, unsigned int offset, - unsigned int length, - struct cxgbi_pagepod_hdr *hdr); -void cxgbi_ppm_ppod_release(struct cxgbi_ppm *, u32 idx); -int cxgbi_ppm_ppods_reserve(struct cxgbi_ppm *, unsigned short nr_pages, - u32 per_tag_pg_idx, u32 *ppod_idx, u32 *ddp_tag, - unsigned long caller_data); -int cxgbi_ppm_init(void **ppm_pp, struct net_device *, struct pci_dev *, - void *lldev, struct cxgbi_tag_format *, - unsigned int ppmax, unsigned int llimit, - unsigned int start, - unsigned int reserve_factor); -int cxgbi_ppm_release(struct cxgbi_ppm *ppm); -void cxgbi_tagmask_check(unsigned int tagmask, struct cxgbi_tag_format *); -unsigned int cxgbi_tagmask_set(unsigned int ppmax); - -#endif /*__CXGB4PPM_H__*/ diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c index a63addb4e72c..dc92c80a75f4 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c +++ b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c @@ -7219,6 +7219,7 @@ void t4_handle_get_port_info(struct port_info *pi, const __be64 *rpl) lc->speed = speed; lc->fc = fc; lc->supported = be16_to_cpu(p->u.info.pcap); + lc->lp_advertising = be16_to_cpu(p->u.info.lpacap); t4_os_link_changed(adap, pi->port_id, link_ok); } } @@ -7284,6 +7285,7 @@ static void get_pci_mode(struct adapter *adapter, struct pci_params *p) static void init_link_config(struct link_config *lc, unsigned int caps) { lc->supported = caps; + lc->lp_advertising = 0; lc->requested_speed = 0; lc->speed = 0; lc->requested_fc = lc->fc = PAUSE_RX | PAUSE_TX; diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h b/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h index 392d6644fdd8..a89b30720e38 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h +++ b/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h @@ -2249,20 +2249,20 @@ struct fw_acl_vlan_cmd { enum fw_port_cap { FW_PORT_CAP_SPEED_100M = 0x0001, FW_PORT_CAP_SPEED_1G = 0x0002, - FW_PORT_CAP_SPEED_2_5G = 0x0004, + FW_PORT_CAP_SPEED_25G = 0x0004, FW_PORT_CAP_SPEED_10G = 0x0008, FW_PORT_CAP_SPEED_40G = 0x0010, FW_PORT_CAP_SPEED_100G = 0x0020, FW_PORT_CAP_FC_RX = 0x0040, FW_PORT_CAP_FC_TX = 0x0080, FW_PORT_CAP_ANEG = 0x0100, - FW_PORT_CAP_MDI_0 = 0x0200, - FW_PORT_CAP_MDI_1 = 0x0400, - FW_PORT_CAP_BEAN = 0x0800, - FW_PORT_CAP_PMA_LPBK = 0x1000, - FW_PORT_CAP_PCS_LPBK = 0x2000, - FW_PORT_CAP_PHYXS_LPBK = 0x4000, - FW_PORT_CAP_FAR_END_LPBK = 0x8000, + FW_PORT_CAP_MDIX = 0x0200, + FW_PORT_CAP_MDIAUTO = 0x0400, + FW_PORT_CAP_FEC = 0x0800, + FW_PORT_CAP_TECHKR = 0x1000, + FW_PORT_CAP_TECHKX4 = 0x2000, + FW_PORT_CAP_802_3_PAUSE = 0x4000, + FW_PORT_CAP_802_3_ASM_DIR = 0x8000, }; enum fw_port_mdi { @@ -2376,7 +2376,8 @@ struct fw_port_cmd { __u8 cbllen; __u8 auxlinfo; __u8 dcbxdis_pkd; - __u8 r8_lo[3]; + __u8 r8_lo; + __be16 lpacap; __be64 r9; } info; struct fw_port_diags { @@ -2555,6 +2556,11 @@ enum fw_port_type { FW_PORT_TYPE_QSA, FW_PORT_TYPE_QSFP, FW_PORT_TYPE_BP40_BA, + FW_PORT_TYPE_KR4_100G, + FW_PORT_TYPE_CR4_QSFP, + FW_PORT_TYPE_CR_QSFP, + FW_PORT_TYPE_CR2_QSFP, + FW_PORT_TYPE_SFP28, FW_PORT_TYPE_NONE = FW_PORT_CMD_PTYPE_M }; |