diff options
Diffstat (limited to 'drivers/mfd')
77 files changed, 2952 insertions, 755 deletions
diff --git a/drivers/mfd/88pm860x-core.c b/drivers/mfd/88pm860x-core.c index d2a85cde68da..e03b7f45b8f7 100644 --- a/drivers/mfd/88pm860x-core.c +++ b/drivers/mfd/88pm860x-core.c @@ -566,7 +566,7 @@ static int pm860x_irq_domain_map(struct irq_domain *d, unsigned int virq, return 0; } -static struct irq_domain_ops pm860x_irq_domain_ops = { +static const struct irq_domain_ops pm860x_irq_domain_ops = { .map = pm860x_irq_domain_map, .xlate = irq_domain_xlate_onetwocell, }; diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 476e63745742..653815950aa2 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -52,7 +52,8 @@ config PMIC_ADP5520 config MFD_AAT2870_CORE bool "AnalogicTech AAT2870" select MFD_CORE - depends on I2C=y && GPIOLIB + depends on I2C=y + depends on GPIOLIB || COMPILE_TEST help If you say yes here you get support for the AAT2870. This driver provides common support for accessing the device, @@ -94,6 +95,8 @@ config MFD_AXP20X config MFD_CROS_EC tristate "ChromeOS Embedded Controller" select MFD_CORE + select CHROME_PLATFORMS + select CROS_EC_PROTO help If you say Y here you get support for the ChromeOS Embedded Controller (EC) providing keyboard, battery and power services. @@ -102,7 +105,7 @@ config MFD_CROS_EC config MFD_CROS_EC_I2C tristate "ChromeOS Embedded Controller (I2C)" - depends on MFD_CROS_EC && I2C + depends on MFD_CROS_EC && CROS_EC_PROTO && I2C help If you say Y here, you get support for talking to the ChromeOS @@ -112,7 +115,7 @@ config MFD_CROS_EC_I2C config MFD_CROS_EC_SPI tristate "ChromeOS Embedded Controller (SPI)" - depends on MFD_CROS_EC && SPI && OF + depends on MFD_CROS_EC && CROS_EC_PROTO && SPI && OF ---help--- If you say Y here, you get support for talking to the ChromeOS EC @@ -283,6 +286,18 @@ config HTC_I2CPLD This device provides input and output GPIOs through an I2C interface to one or more sub-chips. +config MFD_INTEL_QUARK_I2C_GPIO + tristate "Intel Quark MFD I2C GPIO" + depends on PCI + depends on X86 + depends on COMMON_CLK + select MFD_CORE + help + This MFD provides support for I2C and GPIO that exist only + in a single PCI device. It splits the 2 IO devices to + their respective IO driver. + The GPIO exports a total amount of 8 interrupt-capable GPIOs. + config LPC_ICH tristate "Intel ICH LPC" depends on PCI @@ -364,6 +379,7 @@ config MFD_KEMPLD * COMe-bIP# * COMe-bPC2 (ETXexpress-PC) * COMe-bSC# (ETXexpress-SC T#) + * COMe-cBL6 * COMe-cBT6 * COMe-cCT6 * COMe-cDC2 (microETXexpress-DC) @@ -455,6 +471,20 @@ config MFD_MAX77693 additional drivers must be enabled in order to use the functionality of the device. +config MFD_MAX77843 + bool "Maxim Semiconductor MAX77843 PMIC Support" + depends on I2C=y + select MFD_CORE + select REGMAP_I2C + select REGMAP_IRQ + help + Say yes here to add support for Maxim Semiconductor MAX77843. + This is companion Power Management IC with LEDs, Haptic, Charger, + Fuel Gauge, MUIC(Micro USB Interface Controller) controls on chip. + This driver provides common support for accessing the device; + additional drivers must be enabled in order to use the functionality + of the device. + config MFD_MAX8907 tristate "Maxim Semiconductor MAX8907 PMIC Support" select MFD_CORE @@ -502,6 +532,16 @@ config MFD_MAX8998 additional drivers must be enabled in order to use the functionality of the device. +config MFD_MT6397 + tristate "MediaTek MT6397 PMIC Support" + select MFD_CORE + select IRQ_DOMAIN + help + Say yes here to add support for MediaTek MT6397 PMIC. This is + a Power Management IC. This driver provides common support for + accessing the device; additional drivers must be enabled in order + to use the functionality of the device. + config MFD_MENF21BMC tristate "MEN 14F021P00 Board Management Controller Support" depends on I2C @@ -655,6 +695,7 @@ config MFD_RT5033 depends on I2C=y select MFD_CORE select REGMAP_I2C + select REGMAP_IRQ help This driver provides for the Richtek RT5033 Power Management IC, which includes the I2C driver and the Core APIs. This driver provides @@ -753,6 +794,18 @@ config MFD_SM501_GPIO lines on the SM501. The platform data is used to supply the base number for the first GPIO line to register. +config MFD_SKY81452 + tristate "Skyworks Solutions SKY81452" + select MFD_CORE + select REGMAP_I2C + depends on I2C + help + This is the core driver for the Skyworks SKY81452 backlight and + voltage regulator device. + + This driver can also be built as a module. If so, the module + will be called sky81452. + config MFD_SMSC bool "SMSC ECE1099 series chips" depends on I2C=y @@ -1065,7 +1118,8 @@ config MFD_TPS6586X config MFD_TPS65910 bool "TI TPS65910 Power Management chip" - depends on I2C=y && GPIOLIB + depends on I2C=y + depends on GPIOLIB || COMPILE_TEST select MFD_CORE select REGMAP_I2C select REGMAP_IRQ @@ -1290,10 +1344,11 @@ config MFD_WM5102 Support for Wolfson Microelectronics WM5102 low power audio SoC config MFD_WM5110 - bool "Wolfson Microelectronics WM5110" + bool "Wolfson Microelectronics WM5110 and WM8280/WM8281" depends on MFD_ARIZONA help - Support for Wolfson Microelectronics WM5110 low power audio SoC + Support for Wolfson Microelectronics WM5110 and WM8280/WM8281 + low power audio SoC config MFD_WM8997 bool "Wolfson Microelectronics WM8997" @@ -1363,7 +1418,7 @@ config MFD_WM8994 depends on I2C help The WM8994 is a highly integrated hi-fi CODEC designed for - smartphone applicatiosn. As well as audio functionality it + smartphone applications. As well as audio functionality it has on board GPIO and regulator functionality which is supported via the relevant subsystems. This driver provides core support for the WM8994, in order to use the actual diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 19f3d744e3bd..ea40e076cb61 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -13,7 +13,7 @@ obj-$(CONFIG_MFD_CROS_EC) += cros_ec.o obj-$(CONFIG_MFD_CROS_EC_I2C) += cros_ec_i2c.o obj-$(CONFIG_MFD_CROS_EC_SPI) += cros_ec_spi.o -rtsx_pci-objs := rtsx_pcr.o rtsx_gops.o rts5209.o rts5229.o rtl8411.o rts5227.o rts5249.o +rtsx_pci-objs := rtsx_pcr.o rts5209.o rts5229.o rtl8411.o rts5227.o rts5249.o obj-$(CONFIG_MFD_RTSX_PCI) += rtsx_pci.o obj-$(CONFIG_MFD_RTSX_USB) += rtsx_usb.o @@ -39,13 +39,13 @@ obj-$(CONFIG_MFD_ARIZONA) += arizona-core.o obj-$(CONFIG_MFD_ARIZONA) += arizona-irq.o obj-$(CONFIG_MFD_ARIZONA_I2C) += arizona-i2c.o obj-$(CONFIG_MFD_ARIZONA_SPI) += arizona-spi.o -ifneq ($(CONFIG_MFD_WM5102),n) +ifeq ($(CONFIG_MFD_WM5102),y) obj-$(CONFIG_MFD_ARIZONA) += wm5102-tables.o endif -ifneq ($(CONFIG_MFD_WM5110),n) +ifeq ($(CONFIG_MFD_WM5110),y) obj-$(CONFIG_MFD_ARIZONA) += wm5110-tables.o endif -ifneq ($(CONFIG_MFD_WM8997),n) +ifeq ($(CONFIG_MFD_WM8997),y) obj-$(CONFIG_MFD_ARIZONA) += wm8997-tables.o endif obj-$(CONFIG_MFD_WM8400) += wm8400-core.o @@ -117,6 +117,7 @@ obj-$(CONFIG_MFD_DA9150) += da9150-core.o obj-$(CONFIG_MFD_MAX14577) += max14577.o obj-$(CONFIG_MFD_MAX77686) += max77686.o obj-$(CONFIG_MFD_MAX77693) += max77693.o +obj-$(CONFIG_MFD_MAX77843) += max77843.o obj-$(CONFIG_MFD_MAX8907) += max8907.o max8925-objs := max8925-core.o max8925-i2c.o obj-$(CONFIG_MFD_MAX8925) += max8925.o @@ -138,6 +139,7 @@ obj-$(CONFIG_AB8500_CORE) += ab8500-core.o ab8500-sysctrl.o obj-$(CONFIG_MFD_TIMBERDALE) += timberdale.o obj-$(CONFIG_PMIC_ADP5520) += adp5520.o obj-$(CONFIG_MFD_KEMPLD) += kempld-core.o +obj-$(CONFIG_MFD_INTEL_QUARK_I2C_GPIO) += intel_quark_i2c_gpio.o obj-$(CONFIG_LPC_SCH) += lpc_sch.o obj-$(CONFIG_LPC_ICH) += lpc_ich.o obj-$(CONFIG_MFD_RDC321X) += rdc321x-southbridge.o @@ -178,6 +180,8 @@ obj-$(CONFIG_MFD_MENF21BMC) += menf21bmc.o obj-$(CONFIG_MFD_HI6421_PMIC) += hi6421-pmic-core.o obj-$(CONFIG_MFD_DLN2) += dln2.o obj-$(CONFIG_MFD_RT5033) += rt5033.o +obj-$(CONFIG_MFD_SKY81452) += sky81452.o intel-soc-pmic-objs := intel_soc_pmic_core.o intel_soc_pmic_crc.o obj-$(CONFIG_INTEL_SOC_PMIC) += intel-soc-pmic.o +obj-$(CONFIG_MFD_MT6397) += mt6397-core.o diff --git a/drivers/mfd/ab8500-core.c b/drivers/mfd/ab8500-core.c index c80a2925f8e5..000da72a0ae9 100644 --- a/drivers/mfd/ab8500-core.c +++ b/drivers/mfd/ab8500-core.c @@ -574,7 +574,7 @@ static int ab8500_irq_map(struct irq_domain *d, unsigned int virq, return 0; } -static struct irq_domain_ops ab8500_irq_ops = { +static const struct irq_domain_ops ab8500_irq_ops = { .map = ab8500_irq_map, .xlate = irq_domain_xlate_twocell, }; diff --git a/drivers/mfd/ab8500-debugfs.c b/drivers/mfd/ab8500-debugfs.c index 9a8e185f11df..0236cd7cdce4 100644 --- a/drivers/mfd/ab8500-debugfs.c +++ b/drivers/mfd/ab8500-debugfs.c @@ -1283,7 +1283,7 @@ static irqreturn_t ab8500_debug_handler(int irq, void *data) /* Prints to seq_file or log_buf */ static int ab8500_registers_print(struct device *dev, u32 bank, - struct seq_file *s) + struct seq_file *s) { unsigned int i; @@ -1304,20 +1304,19 @@ static int ab8500_registers_print(struct device *dev, u32 bank, } if (s) { - err = seq_printf(s, - " [0x%02X/0x%02X]: 0x%02X\n", - bank, reg, value); - if (err < 0) { - /* Error is not returned here since - * the output is wanted in any case */ + seq_printf(s, " [0x%02X/0x%02X]: 0x%02X\n", + bank, reg, value); + /* Error is not returned here since + * the output is wanted in any case */ + if (seq_has_overflowed(s)) return 0; - } } else { dev_info(dev, " [0x%02X/0x%02X]: 0x%02X\n", bank, reg, value); } } } + return 0; } @@ -1330,8 +1329,7 @@ static int ab8500_print_bank_registers(struct seq_file *s, void *p) seq_printf(s, " bank 0x%02X:\n", bank); - ab8500_registers_print(dev, bank, s); - return 0; + return ab8500_registers_print(dev, bank, s); } static int ab8500_registers_open(struct inode *inode, struct file *file) @@ -1355,9 +1353,12 @@ static int ab8500_print_all_banks(struct seq_file *s, void *p) seq_puts(s, AB8500_NAME_STRING " register values:\n"); for (i = 0; i < AB8500_NUM_BANKS; i++) { - seq_printf(s, " bank 0x%02X:\n", i); + int err; - ab8500_registers_print(dev, i, s); + seq_printf(s, " bank 0x%02X:\n", i); + err = ab8500_registers_print(dev, i, s); + if (err) + return err; } return 0; } @@ -1458,7 +1459,8 @@ static const struct file_operations ab8500_all_banks_fops = { static int ab8500_bank_print(struct seq_file *s, void *p) { - return seq_printf(s, "0x%02X\n", debug_bank); + seq_printf(s, "0x%02X\n", debug_bank); + return 0; } static int ab8500_bank_open(struct inode *inode, struct file *file) @@ -1490,7 +1492,8 @@ static ssize_t ab8500_bank_write(struct file *file, static int ab8500_address_print(struct seq_file *s, void *p) { - return seq_printf(s, "0x%02X\n", debug_address); + seq_printf(s, "0x%02X\n", debug_address); + return 0; } static int ab8500_address_open(struct inode *inode, struct file *file) @@ -1598,7 +1601,8 @@ static int ab8500_interrupts_print(struct seq_file *s, void *p) for (line = 0; line < num_interrupt_lines; line++) { struct irq_desc *desc = irq_to_desc(line + irq_first); - seq_printf(s, "%3i: %6i %4i", line, + seq_printf(s, "%3i: %6i %4i", + line, num_interrupts[line], num_wake_interrupts[line]); @@ -1705,8 +1709,7 @@ static int ab8500_print_modem_registers(struct seq_file *s, void *p) dev_err(dev, "ab->read fail %d\n", err); return err; } - err = seq_printf(s, " [0x%02X/0x%02X]: 0x%02X\n", - bank, reg, value); + seq_printf(s, " [0x%02X/0x%02X]: 0x%02X\n", bank, reg, value); } err = abx500_set_register_interruptible(dev, AB8500_REGU_CTRL1, AB8500_SUPPLY_CONTROL_REG, orig_value); @@ -1743,8 +1746,9 @@ static int ab8500_gpadc_bat_ctrl_print(struct seq_file *s, void *p) bat_ctrl_convert = ab8500_gpadc_ad_to_voltage(gpadc, BAT_CTRL, bat_ctrl_raw); - return seq_printf(s, "%d,0x%X\n", - bat_ctrl_convert, bat_ctrl_raw); + seq_printf(s, "%d,0x%X\n", bat_ctrl_convert, bat_ctrl_raw); + + return 0; } static int ab8500_gpadc_bat_ctrl_open(struct inode *inode, struct file *file) @@ -1773,8 +1777,9 @@ static int ab8500_gpadc_btemp_ball_print(struct seq_file *s, void *p) btemp_ball_convert = ab8500_gpadc_ad_to_voltage(gpadc, BTEMP_BALL, btemp_ball_raw); - return seq_printf(s, - "%d,0x%X\n", btemp_ball_convert, btemp_ball_raw); + seq_printf(s, "%d,0x%X\n", btemp_ball_convert, btemp_ball_raw); + + return 0; } static int ab8500_gpadc_btemp_ball_open(struct inode *inode, @@ -1804,8 +1809,9 @@ static int ab8500_gpadc_main_charger_v_print(struct seq_file *s, void *p) main_charger_v_convert = ab8500_gpadc_ad_to_voltage(gpadc, MAIN_CHARGER_V, main_charger_v_raw); - return seq_printf(s, "%d,0x%X\n", - main_charger_v_convert, main_charger_v_raw); + seq_printf(s, "%d,0x%X\n", main_charger_v_convert, main_charger_v_raw); + + return 0; } static int ab8500_gpadc_main_charger_v_open(struct inode *inode, @@ -1835,8 +1841,9 @@ static int ab8500_gpadc_acc_detect1_print(struct seq_file *s, void *p) acc_detect1_convert = ab8500_gpadc_ad_to_voltage(gpadc, ACC_DETECT1, acc_detect1_raw); - return seq_printf(s, "%d,0x%X\n", - acc_detect1_convert, acc_detect1_raw); + seq_printf(s, "%d,0x%X\n", acc_detect1_convert, acc_detect1_raw); + + return 0; } static int ab8500_gpadc_acc_detect1_open(struct inode *inode, @@ -1866,8 +1873,9 @@ static int ab8500_gpadc_acc_detect2_print(struct seq_file *s, void *p) acc_detect2_convert = ab8500_gpadc_ad_to_voltage(gpadc, ACC_DETECT2, acc_detect2_raw); - return seq_printf(s, "%d,0x%X\n", - acc_detect2_convert, acc_detect2_raw); + seq_printf(s, "%d,0x%X\n", acc_detect2_convert, acc_detect2_raw); + + return 0; } static int ab8500_gpadc_acc_detect2_open(struct inode *inode, @@ -1897,8 +1905,9 @@ static int ab8500_gpadc_aux1_print(struct seq_file *s, void *p) aux1_convert = ab8500_gpadc_ad_to_voltage(gpadc, ADC_AUX1, aux1_raw); - return seq_printf(s, "%d,0x%X\n", - aux1_convert, aux1_raw); + seq_printf(s, "%d,0x%X\n", aux1_convert, aux1_raw); + + return 0; } static int ab8500_gpadc_aux1_open(struct inode *inode, struct file *file) @@ -1926,8 +1935,9 @@ static int ab8500_gpadc_aux2_print(struct seq_file *s, void *p) aux2_convert = ab8500_gpadc_ad_to_voltage(gpadc, ADC_AUX2, aux2_raw); - return seq_printf(s, "%d,0x%X\n", - aux2_convert, aux2_raw); + seq_printf(s, "%d,0x%X\n", aux2_convert, aux2_raw); + + return 0; } static int ab8500_gpadc_aux2_open(struct inode *inode, struct file *file) @@ -1955,8 +1965,9 @@ static int ab8500_gpadc_main_bat_v_print(struct seq_file *s, void *p) main_bat_v_convert = ab8500_gpadc_ad_to_voltage(gpadc, MAIN_BAT_V, main_bat_v_raw); - return seq_printf(s, "%d,0x%X\n", - main_bat_v_convert, main_bat_v_raw); + seq_printf(s, "%d,0x%X\n", main_bat_v_convert, main_bat_v_raw); + + return 0; } static int ab8500_gpadc_main_bat_v_open(struct inode *inode, @@ -1986,8 +1997,9 @@ static int ab8500_gpadc_vbus_v_print(struct seq_file *s, void *p) vbus_v_convert = ab8500_gpadc_ad_to_voltage(gpadc, VBUS_V, vbus_v_raw); - return seq_printf(s, "%d,0x%X\n", - vbus_v_convert, vbus_v_raw); + seq_printf(s, "%d,0x%X\n", vbus_v_convert, vbus_v_raw); + + return 0; } static int ab8500_gpadc_vbus_v_open(struct inode *inode, struct file *file) @@ -2015,8 +2027,9 @@ static int ab8500_gpadc_main_charger_c_print(struct seq_file *s, void *p) main_charger_c_convert = ab8500_gpadc_ad_to_voltage(gpadc, MAIN_CHARGER_C, main_charger_c_raw); - return seq_printf(s, "%d,0x%X\n", - main_charger_c_convert, main_charger_c_raw); + seq_printf(s, "%d,0x%X\n", main_charger_c_convert, main_charger_c_raw); + + return 0; } static int ab8500_gpadc_main_charger_c_open(struct inode *inode, @@ -2046,8 +2059,9 @@ static int ab8500_gpadc_usb_charger_c_print(struct seq_file *s, void *p) usb_charger_c_convert = ab8500_gpadc_ad_to_voltage(gpadc, USB_CHARGER_C, usb_charger_c_raw); - return seq_printf(s, "%d,0x%X\n", - usb_charger_c_convert, usb_charger_c_raw); + seq_printf(s, "%d,0x%X\n", usb_charger_c_convert, usb_charger_c_raw); + + return 0; } static int ab8500_gpadc_usb_charger_c_open(struct inode *inode, @@ -2077,8 +2091,9 @@ static int ab8500_gpadc_bk_bat_v_print(struct seq_file *s, void *p) bk_bat_v_convert = ab8500_gpadc_ad_to_voltage(gpadc, BK_BAT_V, bk_bat_v_raw); - return seq_printf(s, "%d,0x%X\n", - bk_bat_v_convert, bk_bat_v_raw); + seq_printf(s, "%d,0x%X\n", bk_bat_v_convert, bk_bat_v_raw); + + return 0; } static int ab8500_gpadc_bk_bat_v_open(struct inode *inode, struct file *file) @@ -2107,8 +2122,9 @@ static int ab8500_gpadc_die_temp_print(struct seq_file *s, void *p) die_temp_convert = ab8500_gpadc_ad_to_voltage(gpadc, DIE_TEMP, die_temp_raw); - return seq_printf(s, "%d,0x%X\n", - die_temp_convert, die_temp_raw); + seq_printf(s, "%d,0x%X\n", die_temp_convert, die_temp_raw); + + return 0; } static int ab8500_gpadc_die_temp_open(struct inode *inode, struct file *file) @@ -2137,8 +2153,9 @@ static int ab8500_gpadc_usb_id_print(struct seq_file *s, void *p) usb_id_convert = ab8500_gpadc_ad_to_voltage(gpadc, USB_ID, usb_id_raw); - return seq_printf(s, "%d,0x%X\n", - usb_id_convert, usb_id_raw); + seq_printf(s, "%d,0x%X\n", usb_id_convert, usb_id_raw); + + return 0; } static int ab8500_gpadc_usb_id_open(struct inode *inode, struct file *file) @@ -2166,8 +2183,9 @@ static int ab8540_gpadc_xtal_temp_print(struct seq_file *s, void *p) xtal_temp_convert = ab8500_gpadc_ad_to_voltage(gpadc, XTAL_TEMP, xtal_temp_raw); - return seq_printf(s, "%d,0x%X\n", - xtal_temp_convert, xtal_temp_raw); + seq_printf(s, "%d,0x%X\n", xtal_temp_convert, xtal_temp_raw); + + return 0; } static int ab8540_gpadc_xtal_temp_open(struct inode *inode, struct file *file) @@ -2197,8 +2215,9 @@ static int ab8540_gpadc_vbat_true_meas_print(struct seq_file *s, void *p) ab8500_gpadc_ad_to_voltage(gpadc, VBAT_TRUE_MEAS, vbat_true_meas_raw); - return seq_printf(s, "%d,0x%X\n", - vbat_true_meas_convert, vbat_true_meas_raw); + seq_printf(s, "%d,0x%X\n", vbat_true_meas_convert, vbat_true_meas_raw); + + return 0; } static int ab8540_gpadc_vbat_true_meas_open(struct inode *inode, @@ -2233,9 +2252,13 @@ static int ab8540_gpadc_bat_ctrl_and_ibat_print(struct seq_file *s, void *p) ibat_convert = ab8500_gpadc_ad_to_voltage(gpadc, IBAT_VIRTUAL_CHANNEL, ibat_raw); - return seq_printf(s, "%d,0x%X\n" "%d,0x%X\n", - bat_ctrl_convert, bat_ctrl_raw, - ibat_convert, ibat_raw); + seq_printf(s, + "%d,0x%X\n" + "%d,0x%X\n", + bat_ctrl_convert, bat_ctrl_raw, + ibat_convert, ibat_raw); + + return 0; } static int ab8540_gpadc_bat_ctrl_and_ibat_open(struct inode *inode, @@ -2269,9 +2292,13 @@ static int ab8540_gpadc_vbat_meas_and_ibat_print(struct seq_file *s, void *p) ibat_convert = ab8500_gpadc_ad_to_voltage(gpadc, IBAT_VIRTUAL_CHANNEL, ibat_raw); - return seq_printf(s, "%d,0x%X\n" "%d,0x%X\n", - vbat_meas_convert, vbat_meas_raw, - ibat_convert, ibat_raw); + seq_printf(s, + "%d,0x%X\n" + "%d,0x%X\n", + vbat_meas_convert, vbat_meas_raw, + ibat_convert, ibat_raw); + + return 0; } static int ab8540_gpadc_vbat_meas_and_ibat_open(struct inode *inode, @@ -2307,9 +2334,13 @@ static int ab8540_gpadc_vbat_true_meas_and_ibat_print(struct seq_file *s, ibat_convert = ab8500_gpadc_ad_to_voltage(gpadc, IBAT_VIRTUAL_CHANNEL, ibat_raw); - return seq_printf(s, "%d,0x%X\n" "%d,0x%X\n", - vbat_true_meas_convert, vbat_true_meas_raw, - ibat_convert, ibat_raw); + seq_printf(s, + "%d,0x%X\n" + "%d,0x%X\n", + vbat_true_meas_convert, vbat_true_meas_raw, + ibat_convert, ibat_raw); + + return 0; } static int ab8540_gpadc_vbat_true_meas_and_ibat_open(struct inode *inode, @@ -2344,9 +2375,13 @@ static int ab8540_gpadc_bat_temp_and_ibat_print(struct seq_file *s, void *p) ibat_convert = ab8500_gpadc_ad_to_voltage(gpadc, IBAT_VIRTUAL_CHANNEL, ibat_raw); - return seq_printf(s, "%d,0x%X\n" "%d,0x%X\n", - bat_temp_convert, bat_temp_raw, - ibat_convert, ibat_raw); + seq_printf(s, + "%d,0x%X\n" + "%d,0x%X\n", + bat_temp_convert, bat_temp_raw, + ibat_convert, ibat_raw); + + return 0; } static int ab8540_gpadc_bat_temp_and_ibat_open(struct inode *inode, @@ -2373,16 +2408,19 @@ static int ab8540_gpadc_otp_cal_print(struct seq_file *s, void *p) gpadc = ab8500_gpadc_get("ab8500-gpadc.0"); ab8540_gpadc_get_otp(gpadc, &vmain_l, &vmain_h, &btemp_l, &btemp_h, &vbat_l, &vbat_h, &ibat_l, &ibat_h); - return seq_printf(s, "VMAIN_L:0x%X\n" - "VMAIN_H:0x%X\n" - "BTEMP_L:0x%X\n" - "BTEMP_H:0x%X\n" - "VBAT_L:0x%X\n" - "VBAT_H:0x%X\n" - "IBAT_L:0x%X\n" - "IBAT_H:0x%X\n", - vmain_l, vmain_h, btemp_l, btemp_h, - vbat_l, vbat_h, ibat_l, ibat_h); + seq_printf(s, + "VMAIN_L:0x%X\n" + "VMAIN_H:0x%X\n" + "BTEMP_L:0x%X\n" + "BTEMP_H:0x%X\n" + "VBAT_L:0x%X\n" + "VBAT_H:0x%X\n" + "IBAT_L:0x%X\n" + "IBAT_H:0x%X\n", + vmain_l, vmain_h, btemp_l, btemp_h, + vbat_l, vbat_h, ibat_l, ibat_h); + + return 0; } static int ab8540_gpadc_otp_cal_open(struct inode *inode, struct file *file) @@ -2400,7 +2438,9 @@ static const struct file_operations ab8540_gpadc_otp_calib_fops = { static int ab8500_gpadc_avg_sample_print(struct seq_file *s, void *p) { - return seq_printf(s, "%d\n", avg_sample); + seq_printf(s, "%d\n", avg_sample); + + return 0; } static int ab8500_gpadc_avg_sample_open(struct inode *inode, struct file *file) @@ -2445,7 +2485,9 @@ static const struct file_operations ab8500_gpadc_avg_sample_fops = { static int ab8500_gpadc_trig_edge_print(struct seq_file *s, void *p) { - return seq_printf(s, "%d\n", trig_edge); + seq_printf(s, "%d\n", trig_edge); + + return 0; } static int ab8500_gpadc_trig_edge_open(struct inode *inode, struct file *file) @@ -2490,7 +2532,9 @@ static const struct file_operations ab8500_gpadc_trig_edge_fops = { static int ab8500_gpadc_trig_timer_print(struct seq_file *s, void *p) { - return seq_printf(s, "%d\n", trig_timer); + seq_printf(s, "%d\n", trig_timer); + + return 0; } static int ab8500_gpadc_trig_timer_open(struct inode *inode, struct file *file) @@ -2533,7 +2577,9 @@ static const struct file_operations ab8500_gpadc_trig_timer_fops = { static int ab8500_gpadc_conv_type_print(struct seq_file *s, void *p) { - return seq_printf(s, "%d\n", conv_type); + seq_printf(s, "%d\n", conv_type); + + return 0; } static int ab8500_gpadc_conv_type_open(struct inode *inode, struct file *file) @@ -2839,7 +2885,7 @@ static ssize_t ab8500_subscribe_write(struct file *file, } err = request_threaded_irq(user_val, NULL, ab8500_debug_handler, - IRQF_SHARED | IRQF_NO_SUSPEND, + IRQF_SHARED | IRQF_NO_SUSPEND | IRQF_ONESHOT, "ab8500-debug", &dev->kobj); if (err < 0) { pr_info("request_threaded_irq failed %d, %lu\n", diff --git a/drivers/mfd/ab8500-gpadc.c b/drivers/mfd/ab8500-gpadc.c index dabbc93abdd7..c51c1b188d64 100644 --- a/drivers/mfd/ab8500-gpadc.c +++ b/drivers/mfd/ab8500-gpadc.c @@ -948,7 +948,8 @@ static int ab8500_gpadc_probe(struct platform_device *pdev) if (gpadc->irq_sw >= 0) { ret = request_threaded_irq(gpadc->irq_sw, NULL, ab8500_bm_gpadcconvend_handler, - IRQF_NO_SUSPEND | IRQF_SHARED, "ab8500-gpadc-sw", + IRQF_NO_SUSPEND | IRQF_SHARED | IRQF_ONESHOT, + "ab8500-gpadc-sw", gpadc); if (ret < 0) { dev_err(gpadc->dev, @@ -961,7 +962,8 @@ static int ab8500_gpadc_probe(struct platform_device *pdev) if (gpadc->irq_hw >= 0) { ret = request_threaded_irq(gpadc->irq_hw, NULL, ab8500_bm_gpadcconvend_handler, - IRQF_NO_SUSPEND | IRQF_SHARED, "ab8500-gpadc-hw", + IRQF_NO_SUSPEND | IRQF_SHARED | IRQF_ONESHOT, + "ab8500-gpadc-hw", gpadc); if (ret < 0) { dev_err(gpadc->dev, diff --git a/drivers/mfd/ab8500-sysctrl.c b/drivers/mfd/ab8500-sysctrl.c index cfff0b643f1b..0d1825696153 100644 --- a/drivers/mfd/ab8500-sysctrl.c +++ b/drivers/mfd/ab8500-sysctrl.c @@ -49,7 +49,9 @@ static void ab8500_power_off(void) if (!psy) continue; - ret = psy->get_property(psy, POWER_SUPPLY_PROP_ONLINE, &val); + ret = power_supply_get_property(psy, POWER_SUPPLY_PROP_ONLINE, + &val); + power_supply_put(psy); if (!ret && val.intval) { charger_present = true; @@ -63,8 +65,8 @@ static void ab8500_power_off(void) /* Check if battery is known */ psy = power_supply_get_by_name("ab8500_btemp"); if (psy) { - ret = psy->get_property(psy, POWER_SUPPLY_PROP_TECHNOLOGY, - &val); + ret = power_supply_get_property(psy, + POWER_SUPPLY_PROP_TECHNOLOGY, &val); if (!ret && val.intval != POWER_SUPPLY_TECHNOLOGY_UNKNOWN) { printk(KERN_INFO "Charger \"%s\" is connected with known battery." @@ -72,6 +74,7 @@ static void ab8500_power_off(void) pss[i]); machine_restart("charging"); } + power_supply_put(psy); } shutdown: diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 09ba8f186e6a..bebf58a06a6b 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -250,20 +250,50 @@ static int arizona_wait_for_boot(struct arizona *arizona) return ret; } -static int arizona_apply_hardware_patch(struct arizona* arizona) +static inline void arizona_enable_reset(struct arizona *arizona) +{ + if (arizona->pdata.reset) + gpio_set_value_cansleep(arizona->pdata.reset, 0); +} + +static void arizona_disable_reset(struct arizona *arizona) +{ + if (arizona->pdata.reset) { + switch (arizona->type) { + case WM5110: + case WM8280: + /* Meet requirements for minimum reset duration */ + msleep(5); + break; + default: + break; + } + + gpio_set_value_cansleep(arizona->pdata.reset, 1); + msleep(1); + } +} + +struct arizona_sysclk_state { + unsigned int fll; + unsigned int sysclk; +}; + +static int arizona_enable_freerun_sysclk(struct arizona *arizona, + struct arizona_sysclk_state *state) { - unsigned int fll, sysclk; int ret, err; /* Cache existing FLL and SYSCLK settings */ - ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &fll); - if (ret != 0) { + ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &state->fll); + if (ret) { dev_err(arizona->dev, "Failed to cache FLL settings: %d\n", ret); return ret; } - ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, &sysclk); - if (ret != 0) { + ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, + &state->sysclk); + if (ret) { dev_err(arizona->dev, "Failed to cache SYSCLK settings: %d\n", ret); return ret; @@ -272,7 +302,7 @@ static int arizona_apply_hardware_patch(struct arizona* arizona) /* Start up SYSCLK using the FLL in free running mode */ ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, ARIZONA_FLL1_ENA | ARIZONA_FLL1_FREERUN); - if (ret != 0) { + if (ret) { dev_err(arizona->dev, "Failed to start FLL in freerunning mode: %d\n", ret); @@ -281,53 +311,137 @@ static int arizona_apply_hardware_patch(struct arizona* arizona) ret = arizona_poll_reg(arizona, 25, ARIZONA_INTERRUPT_RAW_STATUS_5, ARIZONA_FLL1_CLOCK_OK_STS, ARIZONA_FLL1_CLOCK_OK_STS); - if (ret != 0) { + if (ret) { ret = -ETIMEDOUT; goto err_fll; } ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 0x0144); - if (ret != 0) { + if (ret) { dev_err(arizona->dev, "Failed to start SYSCLK: %d\n", ret); goto err_fll; } + return 0; + +err_fll: + err = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll); + if (err) + dev_err(arizona->dev, + "Failed to re-apply old FLL settings: %d\n", err); + + return ret; +} + +static int arizona_disable_freerun_sysclk(struct arizona *arizona, + struct arizona_sysclk_state *state) +{ + int ret; + + ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, + state->sysclk); + if (ret) { + dev_err(arizona->dev, + "Failed to re-apply old SYSCLK settings: %d\n", ret); + return ret; + } + + ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll); + if (ret) { + dev_err(arizona->dev, + "Failed to re-apply old FLL settings: %d\n", ret); + return ret; + } + + return 0; +} + +static int wm5102_apply_hardware_patch(struct arizona *arizona) +{ + struct arizona_sysclk_state state; + int err, ret; + + ret = arizona_enable_freerun_sysclk(arizona, &state); + if (ret) + return ret; + /* Start the write sequencer and wait for it to finish */ ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0, - ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160); - if (ret != 0) { + ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160); + if (ret) { dev_err(arizona->dev, "Failed to start write sequencer: %d\n", ret); - goto err_sysclk; + goto err; } + ret = arizona_poll_reg(arizona, 5, ARIZONA_WRITE_SEQUENCER_CTRL_1, ARIZONA_WSEQ_BUSY, 0); - if (ret != 0) { + if (ret) { regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0, - ARIZONA_WSEQ_ABORT); + ARIZONA_WSEQ_ABORT); ret = -ETIMEDOUT; } -err_sysclk: - err = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, sysclk); - if (err != 0) { - dev_err(arizona->dev, - "Failed to re-apply old SYSCLK settings: %d\n", - err); - } +err: + err = arizona_disable_freerun_sysclk(arizona, &state); -err_fll: - err = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, fll); - if (err != 0) { + return ret ?: err; +} + +/* + * Register patch to some of the CODECs internal write sequences + * to ensure a clean exit from the low power sleep state. + */ +static const struct reg_default wm5110_sleep_patch[] = { + { 0x337A, 0xC100 }, + { 0x337B, 0x0041 }, + { 0x3300, 0xA210 }, + { 0x3301, 0x050C }, +}; + +static int wm5110_apply_sleep_patch(struct arizona *arizona) +{ + struct arizona_sysclk_state state; + int err, ret; + + ret = arizona_enable_freerun_sysclk(arizona, &state); + if (ret) + return ret; + + ret = regmap_multi_reg_write_bypassed(arizona->regmap, + wm5110_sleep_patch, + ARRAY_SIZE(wm5110_sleep_patch)); + + err = arizona_disable_freerun_sysclk(arizona, &state); + + return ret ?: err; +} + +static int wm5102_clear_write_sequencer(struct arizona *arizona) +{ + int ret; + + ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_3, + 0x0); + if (ret) { dev_err(arizona->dev, - "Failed to re-apply old FLL settings: %d\n", - err); + "Failed to clear write sequencer state: %d\n", ret); + return ret; } - if (ret != 0) + arizona_enable_reset(arizona); + regulator_disable(arizona->dcvdd); + + msleep(20); + + ret = regulator_enable(arizona->dcvdd); + if (ret) { + dev_err(arizona->dev, "Failed to re-enable DCVDD: %d\n", ret); return ret; - else - return err; + } + arizona_disable_reset(arizona); + + return 0; } #ifdef CONFIG_PM @@ -338,12 +452,33 @@ static int arizona_runtime_resume(struct device *dev) dev_dbg(arizona->dev, "Leaving AoD mode\n"); + if (arizona->has_fully_powered_off) { + dev_dbg(arizona->dev, "Re-enabling core supplies\n"); + + ret = regulator_bulk_enable(arizona->num_core_supplies, + arizona->core_supplies); + if (ret) { + dev_err(dev, "Failed to enable core supplies: %d\n", + ret); + return ret; + } + } + ret = regulator_enable(arizona->dcvdd); if (ret != 0) { dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret); + if (arizona->has_fully_powered_off) + regulator_bulk_disable(arizona->num_core_supplies, + arizona->core_supplies); return ret; } + if (arizona->has_fully_powered_off) { + arizona_disable_reset(arizona); + enable_irq(arizona->irq); + arizona->has_fully_powered_off = false; + } + regcache_cache_only(arizona->regmap, false); switch (arizona->type) { @@ -366,14 +501,53 @@ static int arizona_runtime_resume(struct device *dev) goto err; } - ret = arizona_apply_hardware_patch(arizona); - if (ret != 0) { + ret = wm5102_apply_hardware_patch(arizona); + if (ret) { dev_err(arizona->dev, "Failed to apply hardware patch: %d\n", ret); goto err; } break; + case WM5110: + case WM8280: + ret = arizona_wait_for_boot(arizona); + if (ret) + goto err; + + if (arizona->external_dcvdd) { + ret = regmap_update_bits(arizona->regmap, + ARIZONA_ISOLATION_CONTROL, + ARIZONA_ISOLATE_DCVDD1, 0); + if (ret) { + dev_err(arizona->dev, + "Failed to connect DCVDD: %d\n", ret); + goto err; + } + } else { + /* + * As this is only called for the internal regulator + * (where we know voltage ranges available) it is ok + * to request an exact range. + */ + ret = regulator_set_voltage(arizona->dcvdd, + 1200000, 1200000); + if (ret < 0) { + dev_err(arizona->dev, + "Failed to set resume voltage: %d\n", + ret); + goto err; + } + } + + ret = wm5110_apply_sleep_patch(arizona); + if (ret) { + dev_err(arizona->dev, + "Failed to re-apply sleep patch: %d\n", + ret); + goto err; + } + break; default: ret = arizona_wait_for_boot(arizona); if (ret != 0) { @@ -410,10 +584,17 @@ err: static int arizona_runtime_suspend(struct device *dev) { struct arizona *arizona = dev_get_drvdata(dev); + unsigned int val; int ret; dev_dbg(arizona->dev, "Entering AoD mode\n"); + ret = regmap_read(arizona->regmap, ARIZONA_JACK_DETECT_ANALOGUE, &val); + if (ret) { + dev_err(dev, "Failed to check jack det status: %d\n", ret); + return ret; + } + if (arizona->external_dcvdd) { ret = regmap_update_bits(arizona->regmap, ARIZONA_ISOLATION_CONTROL, @@ -426,10 +607,56 @@ static int arizona_runtime_suspend(struct device *dev) } } + switch (arizona->type) { + case WM5110: + case WM8280: + if (arizona->external_dcvdd) + break; + + /* + * As this is only called for the internal regulator + * (where we know voltage ranges available) it is ok + * to request an exact range. + */ + ret = regulator_set_voltage(arizona->dcvdd, 1175000, 1175000); + if (ret < 0) { + dev_err(arizona->dev, + "Failed to set suspend voltage: %d\n", ret); + return ret; + } + break; + case WM5102: + if (!(val & ARIZONA_JD1_ENA)) { + ret = regmap_write(arizona->regmap, + ARIZONA_WRITE_SEQUENCER_CTRL_3, 0x0); + if (ret) { + dev_err(arizona->dev, + "Failed to clear write sequencer: %d\n", + ret); + return ret; + } + } + break; + default: + break; + } + regcache_cache_only(arizona->regmap, true); regcache_mark_dirty(arizona->regmap); regulator_disable(arizona->dcvdd); + /* Allow us to completely power down if no jack detection */ + if (!(val & ARIZONA_JD1_ENA)) { + dev_dbg(arizona->dev, "Fully powering off\n"); + + arizona->has_fully_powered_off = true; + + disable_irq(arizona->irq); + arizona_enable_reset(arizona); + regulator_bulk_disable(arizona->num_core_supplies, + arizona->core_supplies); + } + return 0; } #endif @@ -561,12 +788,23 @@ static int arizona_of_get_core_pdata(struct arizona *arizona) count++; } + count = 0; + of_property_for_each_u32(arizona->dev->of_node, "wlf,dmic-ref", prop, + cur, val) { + if (count == ARRAY_SIZE(arizona->pdata.dmic_ref)) + break; + + arizona->pdata.dmic_ref[count] = val; + count++; + } + return 0; } const struct of_device_id arizona_of_match[] = { { .compatible = "wlf,wm5102", .data = (void *)WM5102 }, { .compatible = "wlf,wm5110", .data = (void *)WM5110 }, + { .compatible = "wlf,wm8280", .data = (void *)WM8280 }, { .compatible = "wlf,wm8997", .data = (void *)WM8997 }, {}, }; @@ -671,6 +909,7 @@ int arizona_dev_init(struct arizona *arizona) switch (arizona->type) { case WM5102: case WM5110: + case WM8280: case WM8997: for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++) arizona->core_supplies[i].supply @@ -716,9 +955,9 @@ int arizona_dev_init(struct arizona *arizona) if (arizona->pdata.reset) { /* Start out with /RESET low to put the chip into reset */ - ret = gpio_request_one(arizona->pdata.reset, - GPIOF_DIR_OUT | GPIOF_INIT_LOW, - "arizona /RESET"); + ret = devm_gpio_request_one(arizona->dev, arizona->pdata.reset, + GPIOF_DIR_OUT | GPIOF_INIT_LOW, + "arizona /RESET"); if (ret != 0) { dev_err(dev, "Failed to request /RESET: %d\n", ret); goto err_dcvdd; @@ -739,10 +978,7 @@ int arizona_dev_init(struct arizona *arizona) goto err_enable; } - if (arizona->pdata.reset) { - gpio_set_value_cansleep(arizona->pdata.reset, 1); - msleep(1); - } + arizona_disable_reset(arizona); regcache_cache_only(arizona->regmap, false); @@ -765,8 +1001,6 @@ int arizona_dev_init(struct arizona *arizona) /* If we have a /RESET GPIO we'll already be reset */ if (!arizona->pdata.reset) { - regcache_mark_dirty(arizona->regmap); - ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0); if (ret != 0) { dev_err(dev, "Failed to reset device: %d\n", ret); @@ -774,12 +1008,6 @@ int arizona_dev_init(struct arizona *arizona) } msleep(1); - - ret = regcache_sync(arizona->regmap); - if (ret != 0) { - dev_err(dev, "Failed to sync device: %d\n", ret); - goto err_reset; - } } /* Ensure device startup is complete */ @@ -787,21 +1015,24 @@ int arizona_dev_init(struct arizona *arizona) case WM5102: ret = regmap_read(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_3, &val); - if (ret != 0) + if (ret) { dev_err(dev, "Failed to check write sequencer state: %d\n", ret); - else if (val & 0x01) - break; - /* Fall through */ - default: - ret = arizona_wait_for_boot(arizona); - if (ret != 0) { - dev_err(arizona->dev, - "Device failed initial boot: %d\n", ret); - goto err_reset; + } else if (val & 0x01) { + ret = wm5102_clear_write_sequencer(arizona); + if (ret) + return ret; } break; + default: + break; + } + + ret = arizona_wait_for_boot(arizona); + if (ret) { + dev_err(arizona->dev, "Device failed initial boot: %d\n", ret); + goto err_reset; } /* Read the device ID information & do device specific stuff */ @@ -834,11 +1065,19 @@ int arizona_dev_init(struct arizona *arizona) #endif #ifdef CONFIG_MFD_WM5110 case 0x5110: - type_name = "WM5110"; - if (arizona->type != WM5110) { + switch (arizona->type) { + case WM5110: + type_name = "WM5110"; + break; + case WM8280: + type_name = "WM8280"; + break; + default: + type_name = "WM5110"; dev_err(arizona->dev, "WM5110 registered as %d\n", arizona->type); arizona->type = WM5110; + break; } apply_patch = wm5110_patch; break; @@ -871,14 +1110,24 @@ int arizona_dev_init(struct arizona *arizona) switch (arizona->type) { case WM5102: - ret = arizona_apply_hardware_patch(arizona); - if (ret != 0) { + ret = wm5102_apply_hardware_patch(arizona); + if (ret) { dev_err(arizona->dev, "Failed to apply hardware patch: %d\n", ret); goto err_reset; } break; + case WM5110: + case WM8280: + ret = wm5110_apply_sleep_patch(arizona); + if (ret) { + dev_err(arizona->dev, + "Failed to apply sleep patch: %d\n", + ret); + goto err_reset; + } + break; default: break; } @@ -957,12 +1206,16 @@ int arizona_dev_init(struct arizona *arizona) /* Default for both is 0 so noop with defaults */ val = arizona->pdata.dmic_ref[i] << ARIZONA_IN1_DMIC_SUP_SHIFT; - val |= arizona->pdata.inmode[i] << ARIZONA_IN1_MODE_SHIFT; + if (arizona->pdata.inmode[i] & ARIZONA_INMODE_DMIC) + val |= 1 << ARIZONA_IN1_MODE_SHIFT; + if (arizona->pdata.inmode[i] & ARIZONA_INMODE_SE) + val |= 1 << ARIZONA_IN1_SINGLE_ENDED_SHIFT; regmap_update_bits(arizona->regmap, ARIZONA_IN1L_CONTROL + (i * 8), ARIZONA_IN1_DMIC_SUP_MASK | - ARIZONA_IN1_MODE_MASK, val); + ARIZONA_IN1_MODE_MASK | + ARIZONA_IN1_SINGLE_ENDED_MASK, val); } for (i = 0; i < ARIZONA_MAX_OUTPUT; i++) { @@ -1010,6 +1263,7 @@ int arizona_dev_init(struct arizona *arizona) ARRAY_SIZE(wm5102_devs), NULL, 0, NULL); break; case WM5110: + case WM8280: ret = mfd_add_devices(arizona->dev, -1, wm5110_devs, ARRAY_SIZE(wm5110_devs), NULL, 0, NULL); break; @@ -1033,10 +1287,7 @@ int arizona_dev_init(struct arizona *arizona) err_irq: arizona_irq_exit(arizona); err_reset: - if (arizona->pdata.reset) { - gpio_set_value_cansleep(arizona->pdata.reset, 0); - gpio_free(arizona->pdata.reset); - } + arizona_enable_reset(arizona); regulator_disable(arizona->dcvdd); err_enable: regulator_bulk_disable(arizona->num_core_supplies, @@ -1061,8 +1312,7 @@ int arizona_dev_exit(struct arizona *arizona) arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona); arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona); arizona_irq_exit(arizona); - if (arizona->pdata.reset) - gpio_set_value_cansleep(arizona->pdata.reset, 0); + arizona_enable_reset(arizona); regulator_bulk_disable(arizona->num_core_supplies, arizona->core_supplies); diff --git a/drivers/mfd/arizona-i2c.c b/drivers/mfd/arizona-i2c.c index 9d4156fb082a..ff782a5de235 100644 --- a/drivers/mfd/arizona-i2c.c +++ b/drivers/mfd/arizona-i2c.c @@ -44,6 +44,7 @@ static int arizona_i2c_probe(struct i2c_client *i2c, #endif #ifdef CONFIG_MFD_WM5110 case WM5110: + case WM8280: regmap_config = &wm5110_i2c_regmap; break; #endif @@ -87,6 +88,7 @@ static int arizona_i2c_remove(struct i2c_client *i2c) static const struct i2c_device_id arizona_i2c_id[] = { { "wm5102", WM5102 }, { "wm5110", WM5110 }, + { "wm8280", WM8280 }, { "wm8997", WM8997 }, { } }; diff --git a/drivers/mfd/arizona-irq.c b/drivers/mfd/arizona-irq.c index 3a3fe7cc6d61..2b9965d53e4e 100644 --- a/drivers/mfd/arizona-irq.c +++ b/drivers/mfd/arizona-irq.c @@ -186,7 +186,7 @@ static int arizona_irq_map(struct irq_domain *h, unsigned int virq, return 0; } -static struct irq_domain_ops arizona_domain_ops = { +static const struct irq_domain_ops arizona_domain_ops = { .map = arizona_irq_map, .xlate = irq_domain_xlate_twocell, }; @@ -211,6 +211,7 @@ int arizona_irq_init(struct arizona *arizona) #endif #ifdef CONFIG_MFD_WM5110 case WM5110: + case WM8280: aod = &wm5110_aod; switch (arizona->rev) { diff --git a/drivers/mfd/arizona-spi.c b/drivers/mfd/arizona-spi.c index 8ef58bcff193..1e845f6d407b 100644 --- a/drivers/mfd/arizona-spi.c +++ b/drivers/mfd/arizona-spi.c @@ -44,6 +44,7 @@ static int arizona_spi_probe(struct spi_device *spi) #endif #ifdef CONFIG_MFD_WM5110 case WM5110: + case WM8280: regmap_config = &wm5110_spi_regmap; break; #endif @@ -84,6 +85,7 @@ static int arizona_spi_remove(struct spi_device *spi) static const struct spi_device_id arizona_spi_ids[] = { { "wm5102", WM5102 }, { "wm5110", WM5110 }, + { "wm8280", WM8280 }, { }, }; MODULE_DEVICE_TABLE(spi, arizona_spi_ids); diff --git a/drivers/mfd/asic3.c b/drivers/mfd/asic3.c index 977bd3a3eed0..120df5c08741 100644 --- a/drivers/mfd/asic3.c +++ b/drivers/mfd/asic3.c @@ -417,9 +417,8 @@ static int __init asic3_irq_probe(struct platform_device *pdev) asic3_write_register(asic, ASIC3_OFFSET(INTR, INT_MASK), ASIC3_INTMASK_GINTMASK); - irq_set_chained_handler(asic->irq_nr, asic3_irq_demux); + irq_set_chained_handler_and_data(asic->irq_nr, asic3_irq_demux, asic); irq_set_irq_type(asic->irq_nr, IRQ_TYPE_EDGE_RISING); - irq_set_handler_data(asic->irq_nr, asic); return 0; } diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c index b1b580a88654..6df91556faf3 100644 --- a/drivers/mfd/axp20x.c +++ b/drivers/mfd/axp20x.c @@ -29,9 +29,10 @@ #define AXP20X_OFF 0x80 -static const char const *axp20x_model_names[] = { +static const char * const axp20x_model_names[] = { "AXP202", "AXP209", + "AXP221", "AXP288", }; @@ -54,6 +55,25 @@ static const struct regmap_access_table axp20x_volatile_table = { .n_yes_ranges = ARRAY_SIZE(axp20x_volatile_ranges), }; +static const struct regmap_range axp22x_writeable_ranges[] = { + regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE), + regmap_reg_range(AXP20X_DCDC_MODE, AXP22X_BATLOW_THRES1), +}; + +static const struct regmap_range axp22x_volatile_ranges[] = { + regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE), +}; + +static const struct regmap_access_table axp22x_writeable_table = { + .yes_ranges = axp22x_writeable_ranges, + .n_yes_ranges = ARRAY_SIZE(axp22x_writeable_ranges), +}; + +static const struct regmap_access_table axp22x_volatile_table = { + .yes_ranges = axp22x_volatile_ranges, + .n_yes_ranges = ARRAY_SIZE(axp22x_volatile_ranges), +}; + static const struct regmap_range axp288_writeable_ranges[] = { regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ6_STATE), regmap_reg_range(AXP20X_DCDC_MODE, AXP288_FG_TUNE5), @@ -87,7 +107,21 @@ static struct resource axp20x_pek_resources[] = { }, }; -static struct resource axp288_battery_resources[] = { +static struct resource axp22x_pek_resources[] = { + { + .name = "PEK_DBR", + .start = AXP22X_IRQ_PEK_RIS_EDGE, + .end = AXP22X_IRQ_PEK_RIS_EDGE, + .flags = IORESOURCE_IRQ, + }, { + .name = "PEK_DBF", + .start = AXP22X_IRQ_PEK_FAL_EDGE, + .end = AXP22X_IRQ_PEK_FAL_EDGE, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct resource axp288_fuel_gauge_resources[] = { { .start = AXP288_IRQ_QWBTU, .end = AXP288_IRQ_QWBTU, @@ -129,6 +163,15 @@ static const struct regmap_config axp20x_regmap_config = { .cache_type = REGCACHE_RBTREE, }; +static const struct regmap_config axp22x_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .wr_table = &axp22x_writeable_table, + .volatile_table = &axp22x_volatile_table, + .max_register = AXP22X_BATLOW_THRES1, + .cache_type = REGCACHE_RBTREE, +}; + static const struct regmap_config axp288_regmap_config = { .reg_bits = 8, .val_bits = 8, @@ -181,6 +224,34 @@ static const struct regmap_irq axp20x_regmap_irqs[] = { INIT_REGMAP_IRQ(AXP20X, GPIO0_INPUT, 4, 0), }; +static const struct regmap_irq axp22x_regmap_irqs[] = { + INIT_REGMAP_IRQ(AXP22X, ACIN_OVER_V, 0, 7), + INIT_REGMAP_IRQ(AXP22X, ACIN_PLUGIN, 0, 6), + INIT_REGMAP_IRQ(AXP22X, ACIN_REMOVAL, 0, 5), + INIT_REGMAP_IRQ(AXP22X, VBUS_OVER_V, 0, 4), + INIT_REGMAP_IRQ(AXP22X, VBUS_PLUGIN, 0, 3), + INIT_REGMAP_IRQ(AXP22X, VBUS_REMOVAL, 0, 2), + INIT_REGMAP_IRQ(AXP22X, VBUS_V_LOW, 0, 1), + INIT_REGMAP_IRQ(AXP22X, BATT_PLUGIN, 1, 7), + INIT_REGMAP_IRQ(AXP22X, BATT_REMOVAL, 1, 6), + INIT_REGMAP_IRQ(AXP22X, BATT_ENT_ACT_MODE, 1, 5), + INIT_REGMAP_IRQ(AXP22X, BATT_EXIT_ACT_MODE, 1, 4), + INIT_REGMAP_IRQ(AXP22X, CHARG, 1, 3), + INIT_REGMAP_IRQ(AXP22X, CHARG_DONE, 1, 2), + INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_HIGH, 1, 1), + INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_LOW, 1, 0), + INIT_REGMAP_IRQ(AXP22X, DIE_TEMP_HIGH, 2, 7), + INIT_REGMAP_IRQ(AXP22X, PEK_SHORT, 2, 1), + INIT_REGMAP_IRQ(AXP22X, PEK_LONG, 2, 0), + INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL1, 3, 1), + INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL2, 3, 0), + INIT_REGMAP_IRQ(AXP22X, TIMER, 4, 7), + INIT_REGMAP_IRQ(AXP22X, PEK_RIS_EDGE, 4, 6), + INIT_REGMAP_IRQ(AXP22X, PEK_FAL_EDGE, 4, 5), + INIT_REGMAP_IRQ(AXP22X, GPIO1_INPUT, 4, 1), + INIT_REGMAP_IRQ(AXP22X, GPIO0_INPUT, 4, 0), +}; + /* some IRQs are compatible with axp20x models */ static const struct regmap_irq axp288_regmap_irqs[] = { INIT_REGMAP_IRQ(AXP288, VBUS_FALL, 0, 2), @@ -224,6 +295,7 @@ static const struct regmap_irq axp288_regmap_irqs[] = { static const struct of_device_id axp20x_of_match[] = { { .compatible = "x-powers,axp202", .data = (void *) AXP202_ID }, { .compatible = "x-powers,axp209", .data = (void *) AXP209_ID }, + { .compatible = "x-powers,axp221", .data = (void *) AXP221_ID }, { }, }; MODULE_DEVICE_TABLE(of, axp20x_of_match); @@ -258,6 +330,18 @@ static const struct regmap_irq_chip axp20x_regmap_irq_chip = { }; +static const struct regmap_irq_chip axp22x_regmap_irq_chip = { + .name = "axp22x_irq_chip", + .status_base = AXP20X_IRQ1_STATE, + .ack_base = AXP20X_IRQ1_STATE, + .mask_base = AXP20X_IRQ1_EN, + .mask_invert = true, + .init_ack_masked = true, + .irqs = axp22x_regmap_irqs, + .num_irqs = ARRAY_SIZE(axp22x_regmap_irqs), + .num_regs = 5, +}; + static const struct regmap_irq_chip axp288_regmap_irq_chip = { .name = "axp288_irq_chip", .status_base = AXP20X_IRQ1_STATE, @@ -281,6 +365,16 @@ static struct mfd_cell axp20x_cells[] = { }, }; +static struct mfd_cell axp22x_cells[] = { + { + .name = "axp20x-pek", + .num_resources = ARRAY_SIZE(axp22x_pek_resources), + .resources = axp22x_pek_resources, + }, { + .name = "axp20x-regulator", + }, +}; + static struct resource axp288_adc_resources[] = { { .name = "GPADC", @@ -290,6 +384,29 @@ static struct resource axp288_adc_resources[] = { }, }; +static struct resource axp288_extcon_resources[] = { + { + .start = AXP288_IRQ_VBUS_FALL, + .end = AXP288_IRQ_VBUS_FALL, + .flags = IORESOURCE_IRQ, + }, + { + .start = AXP288_IRQ_VBUS_RISE, + .end = AXP288_IRQ_VBUS_RISE, + .flags = IORESOURCE_IRQ, + }, + { + .start = AXP288_IRQ_MV_CHNG, + .end = AXP288_IRQ_MV_CHNG, + .flags = IORESOURCE_IRQ, + }, + { + .start = AXP288_IRQ_BC_USB_CHNG, + .end = AXP288_IRQ_BC_USB_CHNG, + .flags = IORESOURCE_IRQ, + }, +}; + static struct resource axp288_charger_resources[] = { { .start = AXP288_IRQ_OV, @@ -345,14 +462,19 @@ static struct mfd_cell axp288_cells[] = { .resources = axp288_adc_resources, }, { + .name = "axp288_extcon", + .num_resources = ARRAY_SIZE(axp288_extcon_resources), + .resources = axp288_extcon_resources, + }, + { .name = "axp288_charger", .num_resources = ARRAY_SIZE(axp288_charger_resources), .resources = axp288_charger_resources, }, { - .name = "axp288_battery", - .num_resources = ARRAY_SIZE(axp288_battery_resources), - .resources = axp288_battery_resources, + .name = "axp288_fuel_gauge", + .num_resources = ARRAY_SIZE(axp288_fuel_gauge_resources), + .resources = axp288_fuel_gauge_resources, }, { .name = "axp288_pmic_acpi", @@ -398,6 +520,12 @@ static int axp20x_match_device(struct axp20x_dev *axp20x, struct device *dev) axp20x->regmap_cfg = &axp20x_regmap_config; axp20x->regmap_irq_chip = &axp20x_regmap_irq_chip; break; + case AXP221_ID: + axp20x->nr_cells = ARRAY_SIZE(axp22x_cells); + axp20x->cells = axp22x_cells; + axp20x->regmap_cfg = &axp22x_regmap_config; + axp20x->regmap_irq_chip = &axp22x_regmap_irq_chip; + break; case AXP288_ID: axp20x->cells = axp288_cells; axp20x->nr_cells = ARRAY_SIZE(axp288_cells); diff --git a/drivers/mfd/cros_ec.c b/drivers/mfd/cros_ec.c index fc0c81ef04ff..0eee63542038 100644 --- a/drivers/mfd/cros_ec.c +++ b/drivers/mfd/cros_ec.c @@ -17,108 +17,36 @@ * battery charging and regulator control, firmware update. */ +#include <linux/of_platform.h> #include <linux/interrupt.h> #include <linux/slab.h> #include <linux/module.h> #include <linux/mfd/core.h> #include <linux/mfd/cros_ec.h> -#include <linux/mfd/cros_ec_commands.h> -#include <linux/delay.h> -#define EC_COMMAND_RETRIES 50 +#define CROS_EC_DEV_EC_INDEX 0 +#define CROS_EC_DEV_PD_INDEX 1 -int cros_ec_prepare_tx(struct cros_ec_device *ec_dev, - struct cros_ec_command *msg) -{ - uint8_t *out; - int csum, i; - - BUG_ON(msg->outsize > EC_PROTO2_MAX_PARAM_SIZE); - out = ec_dev->dout; - out[0] = EC_CMD_VERSION0 + msg->version; - out[1] = msg->command; - out[2] = msg->outsize; - csum = out[0] + out[1] + out[2]; - for (i = 0; i < msg->outsize; i++) - csum += out[EC_MSG_TX_HEADER_BYTES + i] = msg->outdata[i]; - out[EC_MSG_TX_HEADER_BYTES + msg->outsize] = (uint8_t)(csum & 0xff); - - return EC_MSG_TX_PROTO_BYTES + msg->outsize; -} -EXPORT_SYMBOL(cros_ec_prepare_tx); - -int cros_ec_check_result(struct cros_ec_device *ec_dev, - struct cros_ec_command *msg) -{ - switch (msg->result) { - case EC_RES_SUCCESS: - return 0; - case EC_RES_IN_PROGRESS: - dev_dbg(ec_dev->dev, "command 0x%02x in progress\n", - msg->command); - return -EAGAIN; - default: - dev_dbg(ec_dev->dev, "command 0x%02x returned %d\n", - msg->command, msg->result); - return 0; - } -} -EXPORT_SYMBOL(cros_ec_check_result); +static struct cros_ec_platform ec_p = { + .ec_name = CROS_EC_DEV_NAME, + .cmd_offset = EC_CMD_PASSTHRU_OFFSET(CROS_EC_DEV_EC_INDEX), +}; -int cros_ec_cmd_xfer(struct cros_ec_device *ec_dev, - struct cros_ec_command *msg) -{ - int ret; - - mutex_lock(&ec_dev->lock); - ret = ec_dev->cmd_xfer(ec_dev, msg); - if (msg->result == EC_RES_IN_PROGRESS) { - int i; - struct cros_ec_command status_msg; - struct ec_response_get_comms_status status; - - status_msg.version = 0; - status_msg.command = EC_CMD_GET_COMMS_STATUS; - status_msg.outdata = NULL; - status_msg.outsize = 0; - status_msg.indata = (uint8_t *)&status; - status_msg.insize = sizeof(status); +static struct cros_ec_platform pd_p = { + .ec_name = CROS_EC_DEV_PD_NAME, + .cmd_offset = EC_CMD_PASSTHRU_OFFSET(CROS_EC_DEV_PD_INDEX), +}; - /* - * Query the EC's status until it's no longer busy or - * we encounter an error. - */ - for (i = 0; i < EC_COMMAND_RETRIES; i++) { - usleep_range(10000, 11000); - - ret = ec_dev->cmd_xfer(ec_dev, &status_msg); - if (ret < 0) - break; - - msg->result = status_msg.result; - if (status_msg.result != EC_RES_SUCCESS) - break; - if (!(status.flags & EC_COMMS_STATUS_PROCESSING)) - break; - } - } - mutex_unlock(&ec_dev->lock); +static const struct mfd_cell ec_cell = { + .name = "cros-ec-ctl", + .platform_data = &ec_p, + .pdata_size = sizeof(ec_p), +}; - return ret; -} -EXPORT_SYMBOL(cros_ec_cmd_xfer); - -static const struct mfd_cell cros_devs[] = { - { - .name = "cros-ec-keyb", - .id = 1, - .of_compatible = "google,cros-ec-keyb", - }, - { - .name = "cros-ec-i2c-tunnel", - .id = 2, - .of_compatible = "google,cros-ec-i2c-tunnel", - }, +static const struct mfd_cell ec_pd_cell = { + .name = "cros-ec-ctl", + .platform_data = &pd_p, + .pdata_size = sizeof(pd_p), }; int cros_ec_register(struct cros_ec_device *ec_dev) @@ -126,27 +54,59 @@ int cros_ec_register(struct cros_ec_device *ec_dev) struct device *dev = ec_dev->dev; int err = 0; - if (ec_dev->din_size) { - ec_dev->din = devm_kzalloc(dev, ec_dev->din_size, GFP_KERNEL); - if (!ec_dev->din) - return -ENOMEM; - } - if (ec_dev->dout_size) { - ec_dev->dout = devm_kzalloc(dev, ec_dev->dout_size, GFP_KERNEL); - if (!ec_dev->dout) - return -ENOMEM; - } + ec_dev->max_request = sizeof(struct ec_params_hello); + ec_dev->max_response = sizeof(struct ec_response_get_protocol_info); + ec_dev->max_passthru = 0; + + ec_dev->din = devm_kzalloc(dev, ec_dev->din_size, GFP_KERNEL); + if (!ec_dev->din) + return -ENOMEM; + + ec_dev->dout = devm_kzalloc(dev, ec_dev->dout_size, GFP_KERNEL); + if (!ec_dev->dout) + return -ENOMEM; mutex_init(&ec_dev->lock); - err = mfd_add_devices(dev, 0, cros_devs, - ARRAY_SIZE(cros_devs), + cros_ec_query_all(ec_dev); + + err = mfd_add_devices(ec_dev->dev, PLATFORM_DEVID_AUTO, &ec_cell, 1, NULL, ec_dev->irq, NULL); if (err) { - dev_err(dev, "failed to add mfd devices\n"); + dev_err(dev, + "Failed to register Embedded Controller subdevice %d\n", + err); return err; } + if (ec_dev->max_passthru) { + /* + * Register a PD device as well on top of this device. + * We make the following assumptions: + * - behind an EC, we have a pd + * - only one device added. + * - the EC is responsive at init time (it is not true for a + * sensor hub. + */ + err = mfd_add_devices(ec_dev->dev, PLATFORM_DEVID_AUTO, + &ec_pd_cell, 1, NULL, ec_dev->irq, NULL); + if (err) { + dev_err(dev, + "Failed to register Power Delivery subdevice %d\n", + err); + return err; + } + } + + if (IS_ENABLED(CONFIG_OF) && dev->of_node) { + err = of_platform_populate(dev->of_node, NULL, NULL, dev); + if (err) { + mfd_remove_devices(dev); + dev_err(dev, "Failed to register sub-devices\n"); + return err; + } + } + dev_info(dev, "Chrome EC device registered\n"); return 0; diff --git a/drivers/mfd/cros_ec_i2c.c b/drivers/mfd/cros_ec_i2c.c index c0c30f4f946f..b9a0963ca5c3 100644 --- a/drivers/mfd/cros_ec_i2c.c +++ b/drivers/mfd/cros_ec_i2c.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */ +#include <linux/delay.h> #include <linux/kernel.h> #include <linux/module.h> #include <linux/i2c.h> @@ -22,6 +23,32 @@ #include <linux/platform_device.h> #include <linux/slab.h> +/** + * Request format for protocol v3 + * byte 0 0xda (EC_COMMAND_PROTOCOL_3) + * byte 1-8 struct ec_host_request + * byte 10- response data + */ +struct ec_host_request_i2c { + /* Always 0xda to backward compatible with v2 struct */ + uint8_t command_protocol; + struct ec_host_request ec_request; +} __packed; + + +/* + * Response format for protocol v3 + * byte 0 result code + * byte 1 packet_length + * byte 2-9 struct ec_host_response + * byte 10- response data + */ +struct ec_host_response_i2c { + uint8_t result; + uint8_t packet_length; + struct ec_host_response ec_response; +} __packed; + static inline struct cros_ec_device *to_ec_dev(struct device *dev) { struct i2c_client *client = to_i2c_client(dev); @@ -29,6 +56,134 @@ static inline struct cros_ec_device *to_ec_dev(struct device *dev) return i2c_get_clientdata(client); } +static int cros_ec_pkt_xfer_i2c(struct cros_ec_device *ec_dev, + struct cros_ec_command *msg) +{ + struct i2c_client *client = ec_dev->priv; + int ret = -ENOMEM; + int i; + int packet_len; + u8 *out_buf = NULL; + u8 *in_buf = NULL; + u8 sum; + struct i2c_msg i2c_msg[2]; + struct ec_host_response *ec_response; + struct ec_host_request_i2c *ec_request_i2c; + struct ec_host_response_i2c *ec_response_i2c; + int request_header_size = sizeof(struct ec_host_request_i2c); + int response_header_size = sizeof(struct ec_host_response_i2c); + + i2c_msg[0].addr = client->addr; + i2c_msg[0].flags = 0; + i2c_msg[1].addr = client->addr; + i2c_msg[1].flags = I2C_M_RD; + + packet_len = msg->insize + response_header_size; + BUG_ON(packet_len > ec_dev->din_size); + in_buf = ec_dev->din; + i2c_msg[1].len = packet_len; + i2c_msg[1].buf = (char *) in_buf; + + packet_len = msg->outsize + request_header_size; + BUG_ON(packet_len > ec_dev->dout_size); + out_buf = ec_dev->dout; + i2c_msg[0].len = packet_len; + i2c_msg[0].buf = (char *) out_buf; + + /* create request data */ + ec_request_i2c = (struct ec_host_request_i2c *) out_buf; + ec_request_i2c->command_protocol = EC_COMMAND_PROTOCOL_3; + + ec_dev->dout++; + ret = cros_ec_prepare_tx(ec_dev, msg); + ec_dev->dout--; + + /* send command to EC and read answer */ + ret = i2c_transfer(client->adapter, i2c_msg, 2); + if (ret < 0) { + dev_dbg(ec_dev->dev, "i2c transfer failed: %d\n", ret); + goto done; + } else if (ret != 2) { + dev_err(ec_dev->dev, "failed to get response: %d\n", ret); + ret = -EIO; + goto done; + } + + ec_response_i2c = (struct ec_host_response_i2c *) in_buf; + msg->result = ec_response_i2c->result; + ec_response = &ec_response_i2c->ec_response; + + switch (msg->result) { + case EC_RES_SUCCESS: + break; + case EC_RES_IN_PROGRESS: + ret = -EAGAIN; + dev_dbg(ec_dev->dev, "command 0x%02x in progress\n", + msg->command); + goto done; + + default: + dev_dbg(ec_dev->dev, "command 0x%02x returned %d\n", + msg->command, msg->result); + /* + * When we send v3 request to v2 ec, ec won't recognize the + * 0xda (EC_COMMAND_PROTOCOL_3) and will return with status + * EC_RES_INVALID_COMMAND with zero data length. + * + * In case of invalid command for v3 protocol the data length + * will be at least sizeof(struct ec_host_response) + */ + if (ec_response_i2c->result == EC_RES_INVALID_COMMAND && + ec_response_i2c->packet_length == 0) { + ret = -EPROTONOSUPPORT; + goto done; + } + } + + if (ec_response_i2c->packet_length < sizeof(struct ec_host_response)) { + dev_err(ec_dev->dev, + "response of %u bytes too short; not a full header\n", + ec_response_i2c->packet_length); + ret = -EBADMSG; + goto done; + } + + if (msg->insize < ec_response->data_len) { + dev_err(ec_dev->dev, + "response data size is too large: expected %u, got %u\n", + msg->insize, + ec_response->data_len); + ret = -EMSGSIZE; + goto done; + } + + /* copy response packet payload and compute checksum */ + sum = 0; + for (i = 0; i < sizeof(struct ec_host_response); i++) + sum += ((u8 *)ec_response)[i]; + + memcpy(msg->data, + in_buf + response_header_size, + ec_response->data_len); + for (i = 0; i < ec_response->data_len; i++) + sum += msg->data[i]; + + /* All bytes should sum to zero */ + if (sum) { + dev_err(ec_dev->dev, "bad packet checksum\n"); + ret = -EBADMSG; + goto done; + } + + ret = ec_response->data_len; + +done: + if (msg->command == EC_CMD_REBOOT_EC) + msleep(EC_REBOOT_DELAY_MS); + + return ret; +} + static int cros_ec_cmd_xfer_i2c(struct cros_ec_device *ec_dev, struct cros_ec_command *msg) { @@ -76,7 +231,7 @@ static int cros_ec_cmd_xfer_i2c(struct cros_ec_device *ec_dev, /* copy message payload and compute checksum */ sum = out_buf[0] + out_buf[1] + out_buf[2]; for (i = 0; i < msg->outsize; i++) { - out_buf[3 + i] = msg->outdata[i]; + out_buf[3 + i] = msg->data[i]; sum += out_buf[3 + i]; } out_buf[3 + msg->outsize] = sum; @@ -109,7 +264,7 @@ static int cros_ec_cmd_xfer_i2c(struct cros_ec_device *ec_dev, /* copy response packet payload and compute checksum */ sum = in_buf[0] + in_buf[1]; for (i = 0; i < len; i++) { - msg->indata[i] = in_buf[2 + i]; + msg->data[i] = in_buf[2 + i]; sum += in_buf[2 + i]; } dev_dbg(ec_dev->dev, "packet: %*ph, sum = %02x\n", @@ -121,9 +276,12 @@ static int cros_ec_cmd_xfer_i2c(struct cros_ec_device *ec_dev, } ret = len; - done: +done: kfree(in_buf); kfree(out_buf); + if (msg->command == EC_CMD_REBOOT_EC) + msleep(EC_REBOOT_DELAY_MS); + return ret; } @@ -143,9 +301,11 @@ static int cros_ec_i2c_probe(struct i2c_client *client, ec_dev->priv = client; ec_dev->irq = client->irq; ec_dev->cmd_xfer = cros_ec_cmd_xfer_i2c; - ec_dev->ec_name = client->name; + ec_dev->pkt_xfer = cros_ec_pkt_xfer_i2c; ec_dev->phys_name = client->adapter->name; - ec_dev->parent = &client->dev; + ec_dev->din_size = sizeof(struct ec_host_response_i2c) + + sizeof(struct ec_response_get_protocol_info); + ec_dev->dout_size = sizeof(struct ec_host_request_i2c); err = cros_ec_register(ec_dev); if (err) { diff --git a/drivers/mfd/cros_ec_spi.c b/drivers/mfd/cros_ec_spi.c index bf6e08e8013e..16f228dc243f 100644 --- a/drivers/mfd/cros_ec_spi.c +++ b/drivers/mfd/cros_ec_spi.c @@ -65,29 +65,26 @@ */ #define EC_SPI_RECOVERY_TIME_NS (200 * 1000) -/* - * The EC is unresponsive for a time after a reboot command. Add a - * simple delay to make sure that the bus stays locked. - */ -#define EC_REBOOT_DELAY_MS 50 - /** * struct cros_ec_spi - information about a SPI-connected EC * * @spi: SPI device we are connected to * @last_transfer_ns: time that we last finished a transfer, or 0 if there * if no record + * @start_of_msg_delay: used to set the delay_usecs on the spi_transfer that + * is sent when we want to turn on CS at the start of a transaction. * @end_of_msg_delay: used to set the delay_usecs on the spi_transfer that * is sent when we want to turn off CS at the end of a transaction. */ struct cros_ec_spi { struct spi_device *spi; s64 last_transfer_ns; + unsigned int start_of_msg_delay; unsigned int end_of_msg_delay; }; static void debug_packet(struct device *dev, const char *name, u8 *ptr, - int len) + int len) { #ifdef DEBUG int i; @@ -100,6 +97,172 @@ static void debug_packet(struct device *dev, const char *name, u8 *ptr, #endif } +static int terminate_request(struct cros_ec_device *ec_dev) +{ + struct cros_ec_spi *ec_spi = ec_dev->priv; + struct spi_message msg; + struct spi_transfer trans; + int ret; + + /* + * Turn off CS, possibly adding a delay to ensure the rising edge + * doesn't come too soon after the end of the data. + */ + spi_message_init(&msg); + memset(&trans, 0, sizeof(trans)); + trans.delay_usecs = ec_spi->end_of_msg_delay; + spi_message_add_tail(&trans, &msg); + + ret = spi_sync(ec_spi->spi, &msg); + + /* Reset end-of-response timer */ + ec_spi->last_transfer_ns = ktime_get_ns(); + if (ret < 0) { + dev_err(ec_dev->dev, + "cs-deassert spi transfer failed: %d\n", + ret); + } + + return ret; +} + +/** + * receive_n_bytes - receive n bytes from the EC. + * + * Assumes buf is a pointer into the ec_dev->din buffer + */ +static int receive_n_bytes(struct cros_ec_device *ec_dev, u8 *buf, int n) +{ + struct cros_ec_spi *ec_spi = ec_dev->priv; + struct spi_transfer trans; + struct spi_message msg; + int ret; + + BUG_ON(buf - ec_dev->din + n > ec_dev->din_size); + + memset(&trans, 0, sizeof(trans)); + trans.cs_change = 1; + trans.rx_buf = buf; + trans.len = n; + + spi_message_init(&msg); + spi_message_add_tail(&trans, &msg); + ret = spi_sync(ec_spi->spi, &msg); + if (ret < 0) + dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret); + + return ret; +} + +/** + * cros_ec_spi_receive_packet - Receive a packet from the EC. + * + * This function has two phases: reading the preamble bytes (since if we read + * data from the EC before it is ready to send, we just get preamble) and + * reading the actual message. + * + * The received data is placed into ec_dev->din. + * + * @ec_dev: ChromeOS EC device + * @need_len: Number of message bytes we need to read + */ +static int cros_ec_spi_receive_packet(struct cros_ec_device *ec_dev, + int need_len) +{ + struct ec_host_response *response; + u8 *ptr, *end; + int ret; + unsigned long deadline; + int todo; + + BUG_ON(EC_MSG_PREAMBLE_COUNT > ec_dev->din_size); + + /* Receive data until we see the header byte */ + deadline = jiffies + msecs_to_jiffies(EC_MSG_DEADLINE_MS); + while (true) { + unsigned long start_jiffies = jiffies; + + ret = receive_n_bytes(ec_dev, + ec_dev->din, + EC_MSG_PREAMBLE_COUNT); + if (ret < 0) + return ret; + + ptr = ec_dev->din; + for (end = ptr + EC_MSG_PREAMBLE_COUNT; ptr != end; ptr++) { + if (*ptr == EC_SPI_FRAME_START) { + dev_dbg(ec_dev->dev, "msg found at %zd\n", + ptr - ec_dev->din); + break; + } + } + if (ptr != end) + break; + + /* + * Use the time at the start of the loop as a timeout. This + * gives us one last shot at getting the transfer and is useful + * in case we got context switched out for a while. + */ + if (time_after(start_jiffies, deadline)) { + dev_warn(ec_dev->dev, "EC failed to respond in time\n"); + return -ETIMEDOUT; + } + } + + /* + * ptr now points to the header byte. Copy any valid data to the + * start of our buffer + */ + todo = end - ++ptr; + BUG_ON(todo < 0 || todo > ec_dev->din_size); + todo = min(todo, need_len); + memmove(ec_dev->din, ptr, todo); + ptr = ec_dev->din + todo; + dev_dbg(ec_dev->dev, "need %d, got %d bytes from preamble\n", + need_len, todo); + need_len -= todo; + + /* If the entire response struct wasn't read, get the rest of it. */ + if (todo < sizeof(*response)) { + ret = receive_n_bytes(ec_dev, ptr, sizeof(*response) - todo); + if (ret < 0) + return -EBADMSG; + ptr += (sizeof(*response) - todo); + todo = sizeof(*response); + } + + response = (struct ec_host_response *)ec_dev->din; + + /* Abort if data_len is too large. */ + if (response->data_len > ec_dev->din_size) + return -EMSGSIZE; + + /* Receive data until we have it all */ + while (need_len > 0) { + /* + * We can't support transfers larger than the SPI FIFO size + * unless we have DMA. We don't have DMA on the ISP SPI ports + * for Exynos. We need a way of asking SPI driver for + * maximum-supported transfer size. + */ + todo = min(need_len, 256); + dev_dbg(ec_dev->dev, "loop, todo=%d, need_len=%d, ptr=%zd\n", + todo, need_len, ptr - ec_dev->din); + + ret = receive_n_bytes(ec_dev, ptr, todo); + if (ret < 0) + return ret; + + ptr += todo; + need_len -= todo; + } + + dev_dbg(ec_dev->dev, "loop done, ptr=%zd\n", ptr - ec_dev->din); + + return 0; +} + /** * cros_ec_spi_receive_response - Receive a response from the EC. * @@ -115,34 +278,27 @@ static void debug_packet(struct device *dev, const char *name, u8 *ptr, static int cros_ec_spi_receive_response(struct cros_ec_device *ec_dev, int need_len) { - struct cros_ec_spi *ec_spi = ec_dev->priv; - struct spi_transfer trans; - struct spi_message msg; u8 *ptr, *end; int ret; unsigned long deadline; int todo; + BUG_ON(EC_MSG_PREAMBLE_COUNT > ec_dev->din_size); + /* Receive data until we see the header byte */ deadline = jiffies + msecs_to_jiffies(EC_MSG_DEADLINE_MS); while (true) { unsigned long start_jiffies = jiffies; - memset(&trans, 0, sizeof(trans)); - trans.cs_change = 1; - trans.rx_buf = ptr = ec_dev->din; - trans.len = EC_MSG_PREAMBLE_COUNT; - - spi_message_init(&msg); - spi_message_add_tail(&trans, &msg); - ret = spi_sync(ec_spi->spi, &msg); - if (ret < 0) { - dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret); + ret = receive_n_bytes(ec_dev, + ec_dev->din, + EC_MSG_PREAMBLE_COUNT); + if (ret < 0) return ret; - } + ptr = ec_dev->din; for (end = ptr + EC_MSG_PREAMBLE_COUNT; ptr != end; ptr++) { - if (*ptr == EC_MSG_HEADER) { + if (*ptr == EC_SPI_FRAME_START) { dev_dbg(ec_dev->dev, "msg found at %zd\n", ptr - ec_dev->din); break; @@ -187,21 +343,9 @@ static int cros_ec_spi_receive_response(struct cros_ec_device *ec_dev, dev_dbg(ec_dev->dev, "loop, todo=%d, need_len=%d, ptr=%zd\n", todo, need_len, ptr - ec_dev->din); - memset(&trans, 0, sizeof(trans)); - trans.cs_change = 1; - trans.rx_buf = ptr; - trans.len = todo; - spi_message_init(&msg); - spi_message_add_tail(&trans, &msg); - - /* send command to EC and read answer */ - BUG_ON((u8 *)trans.rx_buf - ec_dev->din + todo > - ec_dev->din_size); - ret = spi_sync(ec_spi->spi, &msg); - if (ret < 0) { - dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret); + ret = receive_n_bytes(ec_dev, ptr, todo); + if (ret < 0) return ret; - } debug_packet(ec_dev->dev, "interim", ptr, todo); ptr += todo; @@ -214,6 +358,138 @@ static int cros_ec_spi_receive_response(struct cros_ec_device *ec_dev, } /** + * cros_ec_pkt_xfer_spi - Transfer a packet over SPI and receive the reply + * + * @ec_dev: ChromeOS EC device + * @ec_msg: Message to transfer + */ +static int cros_ec_pkt_xfer_spi(struct cros_ec_device *ec_dev, + struct cros_ec_command *ec_msg) +{ + struct ec_host_request *request; + struct ec_host_response *response; + struct cros_ec_spi *ec_spi = ec_dev->priv; + struct spi_transfer trans, trans_delay; + struct spi_message msg; + int i, len; + u8 *ptr; + u8 *rx_buf; + u8 sum; + int ret = 0, final_ret; + + len = cros_ec_prepare_tx(ec_dev, ec_msg); + request = (struct ec_host_request *)ec_dev->dout; + dev_dbg(ec_dev->dev, "prepared, len=%d\n", len); + + /* If it's too soon to do another transaction, wait */ + if (ec_spi->last_transfer_ns) { + unsigned long delay; /* The delay completed so far */ + + delay = ktime_get_ns() - ec_spi->last_transfer_ns; + if (delay < EC_SPI_RECOVERY_TIME_NS) + ndelay(EC_SPI_RECOVERY_TIME_NS - delay); + } + + rx_buf = kzalloc(len, GFP_KERNEL); + if (!rx_buf) { + ret = -ENOMEM; + goto exit; + } + + /* + * Leave a gap between CS assertion and clocking of data to allow the + * EC time to wakeup. + */ + spi_message_init(&msg); + if (ec_spi->start_of_msg_delay) { + memset(&trans_delay, 0, sizeof(trans_delay)); + trans_delay.delay_usecs = ec_spi->start_of_msg_delay; + spi_message_add_tail(&trans_delay, &msg); + } + + /* Transmit phase - send our message */ + memset(&trans, 0, sizeof(trans)); + trans.tx_buf = ec_dev->dout; + trans.rx_buf = rx_buf; + trans.len = len; + trans.cs_change = 1; + spi_message_add_tail(&trans, &msg); + ret = spi_sync(ec_spi->spi, &msg); + + /* Get the response */ + if (!ret) { + /* Verify that EC can process command */ + for (i = 0; i < len; i++) { + switch (rx_buf[i]) { + case EC_SPI_PAST_END: + case EC_SPI_RX_BAD_DATA: + case EC_SPI_NOT_READY: + ret = -EAGAIN; + ec_msg->result = EC_RES_IN_PROGRESS; + default: + break; + } + if (ret) + break; + } + if (!ret) + ret = cros_ec_spi_receive_packet(ec_dev, + ec_msg->insize + sizeof(*response)); + } else { + dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret); + } + + final_ret = terminate_request(ec_dev); + if (!ret) + ret = final_ret; + if (ret < 0) + goto exit; + + ptr = ec_dev->din; + + /* check response error code */ + response = (struct ec_host_response *)ptr; + ec_msg->result = response->result; + + ret = cros_ec_check_result(ec_dev, ec_msg); + if (ret) + goto exit; + + len = response->data_len; + sum = 0; + if (len > ec_msg->insize) { + dev_err(ec_dev->dev, "packet too long (%d bytes, expected %d)", + len, ec_msg->insize); + ret = -EMSGSIZE; + goto exit; + } + + for (i = 0; i < sizeof(*response); i++) + sum += ptr[i]; + + /* copy response packet payload and compute checksum */ + memcpy(ec_msg->data, ptr + sizeof(*response), len); + for (i = 0; i < len; i++) + sum += ec_msg->data[i]; + + if (sum) { + dev_err(ec_dev->dev, + "bad packet checksum, calculated %x\n", + sum); + ret = -EBADMSG; + goto exit; + } + + ret = len; +exit: + kfree(rx_buf); + if (ec_msg->command == EC_CMD_REBOOT_EC) + msleep(EC_REBOOT_DELAY_MS); + + return ret; +} + +/** * cros_ec_cmd_xfer_spi - Transfer a message over SPI and receive the reply * * @ec_dev: ChromeOS EC device @@ -227,6 +503,7 @@ static int cros_ec_cmd_xfer_spi(struct cros_ec_device *ec_dev, struct spi_message msg; int i, len; u8 *ptr; + u8 *rx_buf; int sum; int ret = 0, final_ret; @@ -242,10 +519,17 @@ static int cros_ec_cmd_xfer_spi(struct cros_ec_device *ec_dev, ndelay(EC_SPI_RECOVERY_TIME_NS - delay); } + rx_buf = kzalloc(len, GFP_KERNEL); + if (!rx_buf) { + ret = -ENOMEM; + goto exit; + } + /* Transmit phase - send our message */ debug_packet(ec_dev->dev, "out", ec_dev->dout, len); memset(&trans, 0, sizeof(trans)); trans.tx_buf = ec_dev->dout; + trans.rx_buf = rx_buf; trans.len = len; trans.cs_change = 1; spi_message_init(&msg); @@ -254,29 +538,32 @@ static int cros_ec_cmd_xfer_spi(struct cros_ec_device *ec_dev, /* Get the response */ if (!ret) { - ret = cros_ec_spi_receive_response(ec_dev, - ec_msg->insize + EC_MSG_TX_PROTO_BYTES); + /* Verify that EC can process command */ + for (i = 0; i < len; i++) { + switch (rx_buf[i]) { + case EC_SPI_PAST_END: + case EC_SPI_RX_BAD_DATA: + case EC_SPI_NOT_READY: + ret = -EAGAIN; + ec_msg->result = EC_RES_IN_PROGRESS; + default: + break; + } + if (ret) + break; + } + if (!ret) + ret = cros_ec_spi_receive_response(ec_dev, + ec_msg->insize + EC_MSG_TX_PROTO_BYTES); } else { dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret); } - /* - * Turn off CS, possibly adding a delay to ensure the rising edge - * doesn't come too soon after the end of the data. - */ - spi_message_init(&msg); - memset(&trans, 0, sizeof(trans)); - trans.delay_usecs = ec_spi->end_of_msg_delay; - spi_message_add_tail(&trans, &msg); - - final_ret = spi_sync(ec_spi->spi, &msg); - ec_spi->last_transfer_ns = ktime_get_ns(); + final_ret = terminate_request(ec_dev); if (!ret) ret = final_ret; - if (ret < 0) { - dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret); + if (ret < 0) goto exit; - } ptr = ec_dev->din; @@ -299,7 +586,7 @@ static int cros_ec_cmd_xfer_spi(struct cros_ec_device *ec_dev, for (i = 0; i < len; i++) { sum += ptr[i + 2]; if (ec_msg->insize) - ec_msg->indata[i] = ptr[i + 2]; + ec_msg->data[i] = ptr[i + 2]; } sum &= 0xff; @@ -315,6 +602,7 @@ static int cros_ec_cmd_xfer_spi(struct cros_ec_device *ec_dev, ret = len; exit: + kfree(rx_buf); if (ec_msg->command == EC_CMD_REBOOT_EC) msleep(EC_REBOOT_DELAY_MS); @@ -327,6 +615,10 @@ static void cros_ec_spi_dt_probe(struct cros_ec_spi *ec_spi, struct device *dev) u32 val; int ret; + ret = of_property_read_u32(np, "google,cros-ec-spi-pre-delay", &val); + if (!ret) + ec_spi->start_of_msg_delay = val; + ret = of_property_read_u32(np, "google,cros-ec-spi-msg-delay", &val); if (!ret) ec_spi->end_of_msg_delay = val; @@ -361,11 +653,13 @@ static int cros_ec_spi_probe(struct spi_device *spi) ec_dev->priv = ec_spi; ec_dev->irq = spi->irq; ec_dev->cmd_xfer = cros_ec_cmd_xfer_spi; - ec_dev->ec_name = ec_spi->spi->modalias; + ec_dev->pkt_xfer = cros_ec_pkt_xfer_spi; ec_dev->phys_name = dev_name(&ec_spi->spi->dev); - ec_dev->parent = &ec_spi->spi->dev; - ec_dev->din_size = EC_MSG_BYTES + EC_MSG_PREAMBLE_COUNT; - ec_dev->dout_size = EC_MSG_BYTES; + ec_dev->din_size = EC_MSG_PREAMBLE_COUNT + + sizeof(struct ec_host_response) + + sizeof(struct ec_response_get_protocol_info); + ec_dev->dout_size = sizeof(struct ec_host_request); + err = cros_ec_register(ec_dev); if (err) { diff --git a/drivers/mfd/da9052-core.c b/drivers/mfd/da9052-core.c index ae498b53ee40..46e3840c7a37 100644 --- a/drivers/mfd/da9052-core.c +++ b/drivers/mfd/da9052-core.c @@ -433,6 +433,10 @@ EXPORT_SYMBOL_GPL(da9052_adc_read_temp); static const struct mfd_cell da9052_subdev_info[] = { { .name = "da9052-regulator", + .id = 0, + }, + { + .name = "da9052-regulator", .id = 1, }, { @@ -484,10 +488,6 @@ static const struct mfd_cell da9052_subdev_info[] = { .id = 13, }, { - .name = "da9052-regulator", - .id = 14, - }, - { .name = "da9052-onkey", }, { diff --git a/drivers/mfd/da9052-irq.c b/drivers/mfd/da9052-irq.c index 57ae7841f536..f4cb4613140b 100644 --- a/drivers/mfd/da9052-irq.c +++ b/drivers/mfd/da9052-irq.c @@ -35,7 +35,7 @@ #define DA9052_IRQ_MASK_POS_7 0x40 #define DA9052_IRQ_MASK_POS_8 0x80 -static struct regmap_irq da9052_irqs[] = { +static const struct regmap_irq da9052_irqs[] = { [DA9052_IRQ_DCIN] = { .reg_offset = 0, .mask = DA9052_IRQ_MASK_POS_1, @@ -166,7 +166,7 @@ static struct regmap_irq da9052_irqs[] = { }, }; -static struct regmap_irq_chip da9052_regmap_irq_chip = { +static const struct regmap_irq_chip da9052_regmap_irq_chip = { .name = "da9052_irq", .status_base = DA9052_EVENT_A_REG, .mask_base = DA9052_IRQ_MASK_A_REG, @@ -262,6 +262,8 @@ int da9052_irq_init(struct da9052 *da9052) goto regmap_err; } + enable_irq_wake(da9052->chip_irq); + ret = da9052_request_irq(da9052, DA9052_IRQ_ADC_EOM, "adc-irq", da9052_auxadc_irq, da9052); diff --git a/drivers/mfd/da9052-spi.c b/drivers/mfd/da9052-spi.c index 45ae0b7d13ef..b5de8a6856c0 100644 --- a/drivers/mfd/da9052-spi.c +++ b/drivers/mfd/da9052-spi.c @@ -32,7 +32,7 @@ static int da9052_spi_probe(struct spi_device *spi) if (!da9052) return -ENOMEM; - spi->mode = SPI_MODE_0 | SPI_CPOL; + spi->mode = SPI_MODE_0; spi->bits_per_word = 8; spi_setup(spi); @@ -43,6 +43,10 @@ static int da9052_spi_probe(struct spi_device *spi) config = da9052_regmap_config; config.read_flag_mask = 1; + config.reg_bits = 7; + config.pad_bits = 1; + config.val_bits = 8; + config.use_single_rw = 1; da9052->regmap = devm_regmap_init_spi(spi, &config); if (IS_ERR(da9052->regmap)) { diff --git a/drivers/mfd/da9055-core.c b/drivers/mfd/da9055-core.c index b4d920c1ead1..177e65a12c12 100644 --- a/drivers/mfd/da9055-core.c +++ b/drivers/mfd/da9055-core.c @@ -222,7 +222,7 @@ static bool da9055_register_volatile(struct device *dev, unsigned int reg) } } -static struct regmap_irq da9055_irqs[] = { +static const struct regmap_irq da9055_irqs[] = { [DA9055_IRQ_NONKEY] = { .reg_offset = 0, .mask = DA9055_IRQ_NONKEY_MASK, @@ -245,7 +245,7 @@ static struct regmap_irq da9055_irqs[] = { }, }; -struct regmap_config da9055_regmap_config = { +const struct regmap_config da9055_regmap_config = { .reg_bits = 8, .val_bits = 8, @@ -367,7 +367,7 @@ static const struct mfd_cell da9055_devs[] = { }, }; -static struct regmap_irq_chip da9055_regmap_irq_chip = { +static const struct regmap_irq_chip da9055_regmap_irq_chip = { .name = "da9055_irq", .status_base = DA9055_REG_EVENT_A, .mask_base = DA9055_REG_IRQ_MASK_A, diff --git a/drivers/mfd/da9063-core.c b/drivers/mfd/da9063-core.c index facd3610ac77..af841c165787 100644 --- a/drivers/mfd/da9063-core.c +++ b/drivers/mfd/da9063-core.c @@ -60,6 +60,7 @@ static struct resource da9063_rtc_resources[] = { static struct resource da9063_onkey_resources[] = { { + .name = "ONKEY", .start = DA9063_IRQ_ONKEY, .end = DA9063_IRQ_ONKEY, .flags = IORESOURCE_IRQ, @@ -97,6 +98,7 @@ static const struct mfd_cell da9063_devs[] = { .name = DA9063_DRVNAME_ONKEY, .num_resources = ARRAY_SIZE(da9063_onkey_resources), .resources = da9063_onkey_resources, + .of_compatible = "dlg,da9063-onkey", }, { .name = DA9063_DRVNAME_RTC, @@ -109,12 +111,64 @@ static const struct mfd_cell da9063_devs[] = { }, }; +static int da9063_clear_fault_log(struct da9063 *da9063) +{ + int ret = 0; + int fault_log = 0; + + ret = regmap_read(da9063->regmap, DA9063_REG_FAULT_LOG, &fault_log); + if (ret < 0) { + dev_err(da9063->dev, "Cannot read FAULT_LOG.\n"); + return -EIO; + } + + if (fault_log) { + if (fault_log & DA9063_TWD_ERROR) + dev_dbg(da9063->dev, + "Fault log entry detected: DA9063_TWD_ERROR\n"); + if (fault_log & DA9063_POR) + dev_dbg(da9063->dev, + "Fault log entry detected: DA9063_POR\n"); + if (fault_log & DA9063_VDD_FAULT) + dev_dbg(da9063->dev, + "Fault log entry detected: DA9063_VDD_FAULT\n"); + if (fault_log & DA9063_VDD_START) + dev_dbg(da9063->dev, + "Fault log entry detected: DA9063_VDD_START\n"); + if (fault_log & DA9063_TEMP_CRIT) + dev_dbg(da9063->dev, + "Fault log entry detected: DA9063_TEMP_CRIT\n"); + if (fault_log & DA9063_KEY_RESET) + dev_dbg(da9063->dev, + "Fault log entry detected: DA9063_KEY_RESET\n"); + if (fault_log & DA9063_NSHUTDOWN) + dev_dbg(da9063->dev, + "Fault log entry detected: DA9063_NSHUTDOWN\n"); + if (fault_log & DA9063_WAIT_SHUT) + dev_dbg(da9063->dev, + "Fault log entry detected: DA9063_WAIT_SHUT\n"); + } + + ret = regmap_write(da9063->regmap, + DA9063_REG_FAULT_LOG, + fault_log); + if (ret < 0) + dev_err(da9063->dev, + "Cannot reset FAULT_LOG values %d\n", ret); + + return ret; +} + int da9063_device_init(struct da9063 *da9063, unsigned int irq) { struct da9063_pdata *pdata = da9063->dev->platform_data; int model, variant_id, variant_code; int ret; + ret = da9063_clear_fault_log(da9063); + if (ret < 0) + dev_err(da9063->dev, "Cannot clear fault log\n"); + if (pdata) { da9063->flags = pdata->flags; da9063->irq_base = pdata->irq_base; diff --git a/drivers/mfd/da9063-irq.c b/drivers/mfd/da9063-irq.c index 822922602ce9..eaf1ec9208b2 100644 --- a/drivers/mfd/da9063-irq.c +++ b/drivers/mfd/da9063-irq.c @@ -34,7 +34,7 @@ struct da9063_irq_data { u8 mask; }; -static struct regmap_irq da9063_irqs[] = { +static const struct regmap_irq da9063_irqs[] = { /* DA9063 event A register */ [DA9063_IRQ_ONKEY] = { .reg_offset = DA9063_REG_EVENT_A_OFFSET, @@ -153,7 +153,7 @@ static struct regmap_irq da9063_irqs[] = { }, }; -static struct regmap_irq_chip da9063_irq_chip = { +static const struct regmap_irq_chip da9063_irq_chip = { .name = "da9063-irq", .irqs = da9063_irqs, .num_irqs = DA9063_NUM_IRQ, diff --git a/drivers/mfd/da9150-core.c b/drivers/mfd/da9150-core.c index 4d757b97ef9a..94b9bbd1a69b 100644 --- a/drivers/mfd/da9150-core.c +++ b/drivers/mfd/da9150-core.c @@ -95,7 +95,7 @@ static const struct regmap_range_cfg da9150_range_cfg[] = { }, }; -static struct regmap_config da9150_regmap_config = { +static const struct regmap_config da9150_regmap_config = { .reg_bits = 8, .val_bits = 8, .ranges = da9150_range_cfg, @@ -164,7 +164,7 @@ void da9150_bulk_write(struct da9150 *da9150, u16 reg, int count, const u8 *buf) } EXPORT_SYMBOL_GPL(da9150_bulk_write); -static struct regmap_irq da9150_irqs[] = { +static const struct regmap_irq da9150_irqs[] = { [DA9150_IRQ_VBUS] = { .reg_offset = 0, .mask = DA9150_E_VBUS_MASK, @@ -251,7 +251,7 @@ static struct regmap_irq da9150_irqs[] = { }, }; -static struct regmap_irq_chip da9150_regmap_irq_chip = { +static const struct regmap_irq_chip da9150_regmap_irq_chip = { .name = "da9150_irq", .status_base = DA9150_EVENT_E, .mask_base = DA9150_IRQ_MASK_E, diff --git a/drivers/mfd/db8500-prcmu.c b/drivers/mfd/db8500-prcmu.c index cc1a404328c2..8b14740f9fca 100644 --- a/drivers/mfd/db8500-prcmu.c +++ b/drivers/mfd/db8500-prcmu.c @@ -2659,7 +2659,7 @@ static int db8500_irq_map(struct irq_domain *d, unsigned int virq, return 0; } -static struct irq_domain_ops db8500_irq_ops = { +static const struct irq_domain_ops db8500_irq_ops = { .map = db8500_irq_map, .xlate = irq_domain_xlate_twocell, }; diff --git a/drivers/mfd/dln2.c b/drivers/mfd/dln2.c index 1be9bd1c046d..704e189ca162 100644 --- a/drivers/mfd/dln2.c +++ b/drivers/mfd/dln2.c @@ -435,7 +435,7 @@ static int _dln2_transfer(struct dln2_dev *dln2, u16 handle, u16 cmd, struct dln2_response *rsp; struct dln2_rx_context *rxc; struct device *dev = &dln2->interface->dev; - const unsigned long timeout = DLN2_USB_TIMEOUT * HZ / 1000; + const unsigned long timeout = msecs_to_jiffies(DLN2_USB_TIMEOUT); struct dln2_mod_rx_slots *rxs = &dln2->mod_rx_slots[handle]; int size; diff --git a/drivers/mfd/hi6421-pmic-core.c b/drivers/mfd/hi6421-pmic-core.c index 7210ae28bf81..95b2ff8f223a 100644 --- a/drivers/mfd/hi6421-pmic-core.c +++ b/drivers/mfd/hi6421-pmic-core.c @@ -93,7 +93,7 @@ static int hi6421_pmic_remove(struct platform_device *pdev) return 0; } -static struct of_device_id of_hi6421_pmic_match_tbl[] = { +static const struct of_device_id of_hi6421_pmic_match_tbl[] = { { .compatible = "hisilicon,hi6421-pmic", }, { }, }; diff --git a/drivers/mfd/htc-i2cpld.c b/drivers/mfd/htc-i2cpld.c index ebb9cf19e347..b54baad30164 100644 --- a/drivers/mfd/htc-i2cpld.c +++ b/drivers/mfd/htc-i2cpld.c @@ -564,7 +564,8 @@ static int htcpld_core_probe(struct platform_device *pdev) htcpld->chained_irq = res->start; /* Setup the chained interrupt handler */ - flags = IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING; + flags = IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING | + IRQF_ONESHOT; ret = request_threaded_irq(htcpld->chained_irq, NULL, htcpld_handler, flags, pdev->name, htcpld); diff --git a/drivers/mfd/intel_quark_i2c_gpio.c b/drivers/mfd/intel_quark_i2c_gpio.c new file mode 100644 index 000000000000..1ce16037d043 --- /dev/null +++ b/drivers/mfd/intel_quark_i2c_gpio.c @@ -0,0 +1,282 @@ +/* + * Intel Quark MFD PCI driver for I2C & GPIO + * + * Copyright(c) 2014 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * Intel Quark PCI device for I2C and GPIO controller sharing the same + * PCI function. This PCI driver will split the 2 devices into their + * respective drivers. + */ + +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/pci.h> +#include <linux/mfd/core.h> +#include <linux/clkdev.h> +#include <linux/clk-provider.h> +#include <linux/dmi.h> +#include <linux/platform_data/gpio-dwapb.h> +#include <linux/platform_data/i2c-designware.h> + +/* PCI BAR for register base address */ +#define MFD_I2C_BAR 0 +#define MFD_GPIO_BAR 1 + +/* The base GPIO number under GPIOLIB framework */ +#define INTEL_QUARK_MFD_GPIO_BASE 8 + +/* The default number of South-Cluster GPIO on Quark. */ +#define INTEL_QUARK_MFD_NGPIO 8 + +/* The DesignWare GPIO ports on Quark. */ +#define INTEL_QUARK_GPIO_NPORTS 1 + +#define INTEL_QUARK_IORES_MEM 0 +#define INTEL_QUARK_IORES_IRQ 1 + +#define INTEL_QUARK_I2C_CONTROLLER_CLK "i2c_designware.0" + +/* The Quark I2C controller source clock */ +#define INTEL_QUARK_I2C_CLK_HZ 33000000 + +#define INTEL_QUARK_I2C_NCLK 1 + +struct intel_quark_mfd { + struct pci_dev *pdev; + struct clk *i2c_clk; + struct clk_lookup *i2c_clk_lookup; +}; + +struct i2c_mode_info { + const char *name; + unsigned int i2c_scl_freq; +}; + +static const struct i2c_mode_info platform_i2c_mode_info[] = { + { + .name = "Galileo", + .i2c_scl_freq = 100000, + }, + { + .name = "GalileoGen2", + .i2c_scl_freq = 400000, + }, + {} +}; + +static struct resource intel_quark_i2c_res[] = { + [INTEL_QUARK_IORES_MEM] = { + .flags = IORESOURCE_MEM, + }, + [INTEL_QUARK_IORES_IRQ] = { + .flags = IORESOURCE_IRQ, + }, +}; + +static struct resource intel_quark_gpio_res[] = { + [INTEL_QUARK_IORES_MEM] = { + .flags = IORESOURCE_MEM, + }, +}; + +static struct mfd_cell intel_quark_mfd_cells[] = { + { + .id = MFD_I2C_BAR, + .name = "i2c_designware", + .num_resources = ARRAY_SIZE(intel_quark_i2c_res), + .resources = intel_quark_i2c_res, + .ignore_resource_conflicts = true, + }, + { + .id = MFD_GPIO_BAR, + .name = "gpio-dwapb", + .num_resources = ARRAY_SIZE(intel_quark_gpio_res), + .resources = intel_quark_gpio_res, + .ignore_resource_conflicts = true, + }, +}; + +static const struct pci_device_id intel_quark_mfd_ids[] = { + { PCI_VDEVICE(INTEL, 0x0934), }, + {}, +}; +MODULE_DEVICE_TABLE(pci, intel_quark_mfd_ids); + +static int intel_quark_register_i2c_clk(struct intel_quark_mfd *quark_mfd) +{ + struct pci_dev *pdev = quark_mfd->pdev; + struct clk_lookup *i2c_clk_lookup; + struct clk *i2c_clk; + int ret; + + i2c_clk_lookup = devm_kcalloc(&pdev->dev, INTEL_QUARK_I2C_NCLK, + sizeof(*i2c_clk_lookup), GFP_KERNEL); + if (!i2c_clk_lookup) + return -ENOMEM; + + i2c_clk_lookup[0].dev_id = INTEL_QUARK_I2C_CONTROLLER_CLK; + + i2c_clk = clk_register_fixed_rate(&pdev->dev, + INTEL_QUARK_I2C_CONTROLLER_CLK, NULL, + CLK_IS_ROOT, INTEL_QUARK_I2C_CLK_HZ); + + quark_mfd->i2c_clk_lookup = i2c_clk_lookup; + quark_mfd->i2c_clk = i2c_clk; + + ret = clk_register_clkdevs(i2c_clk, i2c_clk_lookup, + INTEL_QUARK_I2C_NCLK); + if (ret) + dev_err(&pdev->dev, "Fixed clk register failed: %d\n", ret); + + return ret; +} + +static void intel_quark_unregister_i2c_clk(struct pci_dev *pdev) +{ + struct intel_quark_mfd *quark_mfd = dev_get_drvdata(&pdev->dev); + + if (!quark_mfd->i2c_clk || !quark_mfd->i2c_clk_lookup) + return; + + clkdev_drop(quark_mfd->i2c_clk_lookup); + clk_unregister(quark_mfd->i2c_clk); +} + +static int intel_quark_i2c_setup(struct pci_dev *pdev, struct mfd_cell *cell) +{ + const char *board_name = dmi_get_system_info(DMI_BOARD_NAME); + const struct i2c_mode_info *info; + struct dw_i2c_platform_data *pdata; + struct resource *res = (struct resource *)cell->resources; + struct device *dev = &pdev->dev; + + res[INTEL_QUARK_IORES_MEM].start = + pci_resource_start(pdev, MFD_I2C_BAR); + res[INTEL_QUARK_IORES_MEM].end = + pci_resource_end(pdev, MFD_I2C_BAR); + + res[INTEL_QUARK_IORES_IRQ].start = pdev->irq; + res[INTEL_QUARK_IORES_IRQ].end = pdev->irq; + + pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); + if (!pdata) + return -ENOMEM; + + /* Normal mode by default */ + pdata->i2c_scl_freq = 100000; + + if (board_name) { + for (info = platform_i2c_mode_info; info->name; info++) { + if (!strcmp(board_name, info->name)) { + pdata->i2c_scl_freq = info->i2c_scl_freq; + break; + } + } + } + + cell->platform_data = pdata; + cell->pdata_size = sizeof(*pdata); + + return 0; +} + +static int intel_quark_gpio_setup(struct pci_dev *pdev, struct mfd_cell *cell) +{ + struct dwapb_platform_data *pdata; + struct resource *res = (struct resource *)cell->resources; + struct device *dev = &pdev->dev; + + res[INTEL_QUARK_IORES_MEM].start = + pci_resource_start(pdev, MFD_GPIO_BAR); + res[INTEL_QUARK_IORES_MEM].end = + pci_resource_end(pdev, MFD_GPIO_BAR); + + pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); + if (!pdata) + return -ENOMEM; + + /* For intel quark x1000, it has only one port: portA */ + pdata->nports = INTEL_QUARK_GPIO_NPORTS; + pdata->properties = devm_kcalloc(dev, pdata->nports, + sizeof(*pdata->properties), + GFP_KERNEL); + if (!pdata->properties) + return -ENOMEM; + + /* Set the properties for portA */ + pdata->properties->node = NULL; + pdata->properties->name = "intel-quark-x1000-gpio-portA"; + pdata->properties->idx = 0; + pdata->properties->ngpio = INTEL_QUARK_MFD_NGPIO; + pdata->properties->gpio_base = INTEL_QUARK_MFD_GPIO_BASE; + pdata->properties->irq = pdev->irq; + pdata->properties->irq_shared = true; + + cell->platform_data = pdata; + cell->pdata_size = sizeof(*pdata); + + return 0; +} + +static int intel_quark_mfd_probe(struct pci_dev *pdev, + const struct pci_device_id *id) +{ + struct intel_quark_mfd *quark_mfd; + int ret; + + ret = pcim_enable_device(pdev); + if (ret) + return ret; + + quark_mfd = devm_kzalloc(&pdev->dev, sizeof(*quark_mfd), GFP_KERNEL); + if (!quark_mfd) + return -ENOMEM; + quark_mfd->pdev = pdev; + + ret = intel_quark_register_i2c_clk(quark_mfd); + if (ret) + return ret; + + dev_set_drvdata(&pdev->dev, quark_mfd); + + ret = intel_quark_i2c_setup(pdev, &intel_quark_mfd_cells[MFD_I2C_BAR]); + if (ret) + return ret; + + ret = intel_quark_gpio_setup(pdev, + &intel_quark_mfd_cells[MFD_GPIO_BAR]); + if (ret) + return ret; + + return mfd_add_devices(&pdev->dev, 0, intel_quark_mfd_cells, + ARRAY_SIZE(intel_quark_mfd_cells), NULL, 0, + NULL); +} + +static void intel_quark_mfd_remove(struct pci_dev *pdev) +{ + intel_quark_unregister_i2c_clk(pdev); + mfd_remove_devices(&pdev->dev); +} + +static struct pci_driver intel_quark_mfd_driver = { + .name = "intel_quark_mfd_i2c_gpio", + .id_table = intel_quark_mfd_ids, + .probe = intel_quark_mfd_probe, + .remove = intel_quark_mfd_remove, +}; + +module_pci_driver(intel_quark_mfd_driver); + +MODULE_AUTHOR("Raymond Tan <raymond.tan@intel.com>"); +MODULE_DESCRIPTION("Intel Quark MFD PCI driver for I2C & GPIO"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/mfd/intel_soc_pmic_core.c b/drivers/mfd/intel_soc_pmic_core.c index 80cef048b904..7b50b6b208a5 100644 --- a/drivers/mfd/intel_soc_pmic_core.c +++ b/drivers/mfd/intel_soc_pmic_core.c @@ -26,19 +26,14 @@ #include <linux/mfd/intel_soc_pmic.h> #include "intel_soc_pmic_core.h" -/* - * On some boards the PMIC interrupt may come from a GPIO line. - * Try to lookup the ACPI table and see if such connection exists. If not, - * return -ENOENT and use the IRQ provided by I2C. - */ static int intel_soc_pmic_find_gpio_irq(struct device *dev) { struct gpio_desc *desc; int irq; - desc = devm_gpiod_get_index(dev, "intel_soc_pmic", 0); + desc = devm_gpiod_get_index(dev, "intel_soc_pmic", 0, GPIOD_IN); if (IS_ERR(desc)) - return -ENOENT; + return PTR_ERR(desc); irq = gpiod_to_irq(desc); if (irq < 0) @@ -71,6 +66,11 @@ static int intel_soc_pmic_i2c_probe(struct i2c_client *i2c, pmic->regmap = devm_regmap_init_i2c(i2c, config->regmap_config); + /* + * On some boards the PMIC interrupt may come from a GPIO line. Try to + * lookup the ACPI table for a such connection and setup a GPIO + * interrupt if it exists. Otherwise use the IRQ provided by I2C + */ irq = intel_soc_pmic_find_gpio_irq(dev); pmic->irq = (irq < 0) ? i2c->irq : irq; diff --git a/drivers/mfd/intel_soc_pmic_core.h b/drivers/mfd/intel_soc_pmic_core.h index 9498d6719847..ff2464bc172f 100644 --- a/drivers/mfd/intel_soc_pmic_core.h +++ b/drivers/mfd/intel_soc_pmic_core.h @@ -24,7 +24,7 @@ struct intel_soc_pmic_config { struct mfd_cell *cell_dev; int n_cell_devs; const struct regmap_config *regmap_config; - struct regmap_irq_chip *irq_chip; + const struct regmap_irq_chip *irq_chip; }; extern struct intel_soc_pmic_config intel_soc_pmic_config_crc; diff --git a/drivers/mfd/intel_soc_pmic_crc.c b/drivers/mfd/intel_soc_pmic_crc.c index 4cc1b324e971..7436075e8983 100644 --- a/drivers/mfd/intel_soc_pmic_crc.c +++ b/drivers/mfd/intel_soc_pmic_crc.c @@ -143,7 +143,7 @@ static const struct regmap_irq crystal_cove_irqs[] = { }, }; -static struct regmap_irq_chip crystal_cove_irq_chip = { +static const struct regmap_irq_chip crystal_cove_irq_chip = { .name = "Crystal Cove", .irqs = crystal_cove_irqs, .num_irqs = ARRAY_SIZE(crystal_cove_irqs), diff --git a/drivers/mfd/janz-cmodio.c b/drivers/mfd/janz-cmodio.c index 433f823037dd..ec1f46a6be3a 100644 --- a/drivers/mfd/janz-cmodio.c +++ b/drivers/mfd/janz-cmodio.c @@ -267,6 +267,10 @@ static void cmodio_pci_remove(struct pci_dev *dev) static const struct pci_device_id cmodio_pci_ids[] = { { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9030, PCI_VENDOR_ID_JANZ, 0x0101 }, { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, PCI_VENDOR_ID_JANZ, 0x0100 }, + { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9030, PCI_VENDOR_ID_JANZ, 0x0201 }, + { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9030, PCI_VENDOR_ID_JANZ, 0x0202 }, + { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, PCI_VENDOR_ID_JANZ, 0x0201 }, + { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, PCI_VENDOR_ID_JANZ, 0x0202 }, { 0, } }; MODULE_DEVICE_TABLE(pci, cmodio_pci_ids); diff --git a/drivers/mfd/kempld-core.c b/drivers/mfd/kempld-core.c index 5615522f8d62..8057849d51ac 100644 --- a/drivers/mfd/kempld-core.c +++ b/drivers/mfd/kempld-core.c @@ -508,8 +508,15 @@ static struct dmi_system_id kempld_dmi_table[] __initdata = { }, .driver_data = (void *)&kempld_platform_data_generic, .callback = kempld_create_platform_device, - }, - { + }, { + .ident = "CBL6", + .matches = { + DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"), + DMI_MATCH(DMI_BOARD_NAME, "COMe-cBL6"), + }, + .driver_data = (void *)&kempld_platform_data_generic, + .callback = kempld_create_platform_device, + }, { .ident = "CCR2", .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"), diff --git a/drivers/mfd/lp8788-irq.c b/drivers/mfd/lp8788-irq.c index 23982dbf014d..a87f2b548f71 100644 --- a/drivers/mfd/lp8788-irq.c +++ b/drivers/mfd/lp8788-irq.c @@ -151,7 +151,7 @@ static int lp8788_irq_map(struct irq_domain *d, unsigned int virq, return 0; } -static struct irq_domain_ops lp8788_domain_ops = { +static const struct irq_domain_ops lp8788_domain_ops = { .map = lp8788_irq_map, }; diff --git a/drivers/mfd/lpc_ich.c b/drivers/mfd/lpc_ich.c index f35d4280b2f7..8de34398abc0 100644 --- a/drivers/mfd/lpc_ich.c +++ b/drivers/mfd/lpc_ich.c @@ -539,72 +539,7 @@ static struct lpc_ich_info lpc_chipset_info[] = { * functions that probably will be registered by other drivers. */ static const struct pci_device_id lpc_ich_ids[] = { - { PCI_VDEVICE(INTEL, 0x2410), LPC_ICH}, - { PCI_VDEVICE(INTEL, 0x2420), LPC_ICH0}, - { PCI_VDEVICE(INTEL, 0x2440), LPC_ICH2}, - { PCI_VDEVICE(INTEL, 0x244c), LPC_ICH2M}, - { PCI_VDEVICE(INTEL, 0x2480), LPC_ICH3}, - { PCI_VDEVICE(INTEL, 0x248c), LPC_ICH3M}, - { PCI_VDEVICE(INTEL, 0x24c0), LPC_ICH4}, - { PCI_VDEVICE(INTEL, 0x24cc), LPC_ICH4M}, - { PCI_VDEVICE(INTEL, 0x2450), LPC_CICH}, - { PCI_VDEVICE(INTEL, 0x24d0), LPC_ICH5}, - { PCI_VDEVICE(INTEL, 0x25a1), LPC_6300ESB}, - { PCI_VDEVICE(INTEL, 0x2640), LPC_ICH6}, - { PCI_VDEVICE(INTEL, 0x2641), LPC_ICH6M}, - { PCI_VDEVICE(INTEL, 0x2642), LPC_ICH6W}, - { PCI_VDEVICE(INTEL, 0x2670), LPC_631XESB}, - { PCI_VDEVICE(INTEL, 0x2671), LPC_631XESB}, - { PCI_VDEVICE(INTEL, 0x2672), LPC_631XESB}, - { PCI_VDEVICE(INTEL, 0x2673), LPC_631XESB}, - { PCI_VDEVICE(INTEL, 0x2674), LPC_631XESB}, - { PCI_VDEVICE(INTEL, 0x2675), LPC_631XESB}, - { PCI_VDEVICE(INTEL, 0x2676), LPC_631XESB}, - { PCI_VDEVICE(INTEL, 0x2677), LPC_631XESB}, - { PCI_VDEVICE(INTEL, 0x2678), LPC_631XESB}, - { PCI_VDEVICE(INTEL, 0x2679), LPC_631XESB}, - { PCI_VDEVICE(INTEL, 0x267a), LPC_631XESB}, - { PCI_VDEVICE(INTEL, 0x267b), LPC_631XESB}, - { PCI_VDEVICE(INTEL, 0x267c), LPC_631XESB}, - { PCI_VDEVICE(INTEL, 0x267d), LPC_631XESB}, - { PCI_VDEVICE(INTEL, 0x267e), LPC_631XESB}, - { PCI_VDEVICE(INTEL, 0x267f), LPC_631XESB}, - { PCI_VDEVICE(INTEL, 0x27b8), LPC_ICH7}, - { PCI_VDEVICE(INTEL, 0x27b0), LPC_ICH7DH}, - { PCI_VDEVICE(INTEL, 0x27b9), LPC_ICH7M}, - { PCI_VDEVICE(INTEL, 0x27bd), LPC_ICH7MDH}, - { PCI_VDEVICE(INTEL, 0x27bc), LPC_NM10}, - { PCI_VDEVICE(INTEL, 0x2810), LPC_ICH8}, - { PCI_VDEVICE(INTEL, 0x2812), LPC_ICH8DH}, - { PCI_VDEVICE(INTEL, 0x2814), LPC_ICH8DO}, - { PCI_VDEVICE(INTEL, 0x2815), LPC_ICH8M}, - { PCI_VDEVICE(INTEL, 0x2811), LPC_ICH8ME}, - { PCI_VDEVICE(INTEL, 0x2918), LPC_ICH9}, - { PCI_VDEVICE(INTEL, 0x2916), LPC_ICH9R}, - { PCI_VDEVICE(INTEL, 0x2912), LPC_ICH9DH}, - { PCI_VDEVICE(INTEL, 0x2914), LPC_ICH9DO}, - { PCI_VDEVICE(INTEL, 0x2919), LPC_ICH9M}, - { PCI_VDEVICE(INTEL, 0x2917), LPC_ICH9ME}, - { PCI_VDEVICE(INTEL, 0x3a18), LPC_ICH10}, - { PCI_VDEVICE(INTEL, 0x3a16), LPC_ICH10R}, - { PCI_VDEVICE(INTEL, 0x3a1a), LPC_ICH10D}, - { PCI_VDEVICE(INTEL, 0x3a14), LPC_ICH10DO}, - { PCI_VDEVICE(INTEL, 0x3b00), LPC_PCH}, - { PCI_VDEVICE(INTEL, 0x3b01), LPC_PCHM}, - { PCI_VDEVICE(INTEL, 0x3b02), LPC_P55}, - { PCI_VDEVICE(INTEL, 0x3b03), LPC_PM55}, - { PCI_VDEVICE(INTEL, 0x3b06), LPC_H55}, - { PCI_VDEVICE(INTEL, 0x3b07), LPC_QM57}, - { PCI_VDEVICE(INTEL, 0x3b08), LPC_H57}, - { PCI_VDEVICE(INTEL, 0x3b09), LPC_HM55}, - { PCI_VDEVICE(INTEL, 0x3b0a), LPC_Q57}, - { PCI_VDEVICE(INTEL, 0x3b0b), LPC_HM57}, - { PCI_VDEVICE(INTEL, 0x3b0d), LPC_PCHMSFF}, - { PCI_VDEVICE(INTEL, 0x3b0f), LPC_QS57}, - { PCI_VDEVICE(INTEL, 0x3b12), LPC_3400}, - { PCI_VDEVICE(INTEL, 0x3b14), LPC_3420}, - { PCI_VDEVICE(INTEL, 0x3b16), LPC_3450}, - { PCI_VDEVICE(INTEL, 0x5031), LPC_EP80579}, + { PCI_VDEVICE(INTEL, 0x0f1c), LPC_BAYTRAIL}, { PCI_VDEVICE(INTEL, 0x1c41), LPC_CPT}, { PCI_VDEVICE(INTEL, 0x1c42), LPC_CPTD}, { PCI_VDEVICE(INTEL, 0x1c43), LPC_CPTM}, @@ -638,7 +573,6 @@ static const struct pci_device_id lpc_ich_ids[] = { { PCI_VDEVICE(INTEL, 0x1c5f), LPC_CPT}, { PCI_VDEVICE(INTEL, 0x1d40), LPC_PBG}, { PCI_VDEVICE(INTEL, 0x1d41), LPC_PBG}, - { PCI_VDEVICE(INTEL, 0x2310), LPC_DH89XXCC}, { PCI_VDEVICE(INTEL, 0x1e40), LPC_PPT}, { PCI_VDEVICE(INTEL, 0x1e41), LPC_PPT}, { PCI_VDEVICE(INTEL, 0x1e42), LPC_PPT}, @@ -671,6 +605,79 @@ static const struct pci_device_id lpc_ich_ids[] = { { PCI_VDEVICE(INTEL, 0x1e5d), LPC_PPT}, { PCI_VDEVICE(INTEL, 0x1e5e), LPC_PPT}, { PCI_VDEVICE(INTEL, 0x1e5f), LPC_PPT}, + { PCI_VDEVICE(INTEL, 0x1f38), LPC_AVN}, + { PCI_VDEVICE(INTEL, 0x1f39), LPC_AVN}, + { PCI_VDEVICE(INTEL, 0x1f3a), LPC_AVN}, + { PCI_VDEVICE(INTEL, 0x1f3b), LPC_AVN}, + { PCI_VDEVICE(INTEL, 0x229c), LPC_BRASWELL}, + { PCI_VDEVICE(INTEL, 0x2310), LPC_DH89XXCC}, + { PCI_VDEVICE(INTEL, 0x2390), LPC_COLETO}, + { PCI_VDEVICE(INTEL, 0x2410), LPC_ICH}, + { PCI_VDEVICE(INTEL, 0x2420), LPC_ICH0}, + { PCI_VDEVICE(INTEL, 0x2440), LPC_ICH2}, + { PCI_VDEVICE(INTEL, 0x244c), LPC_ICH2M}, + { PCI_VDEVICE(INTEL, 0x2450), LPC_CICH}, + { PCI_VDEVICE(INTEL, 0x2480), LPC_ICH3}, + { PCI_VDEVICE(INTEL, 0x248c), LPC_ICH3M}, + { PCI_VDEVICE(INTEL, 0x24c0), LPC_ICH4}, + { PCI_VDEVICE(INTEL, 0x24cc), LPC_ICH4M}, + { PCI_VDEVICE(INTEL, 0x24d0), LPC_ICH5}, + { PCI_VDEVICE(INTEL, 0x25a1), LPC_6300ESB}, + { PCI_VDEVICE(INTEL, 0x2640), LPC_ICH6}, + { PCI_VDEVICE(INTEL, 0x2641), LPC_ICH6M}, + { PCI_VDEVICE(INTEL, 0x2642), LPC_ICH6W}, + { PCI_VDEVICE(INTEL, 0x2670), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x2671), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x2672), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x2673), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x2674), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x2675), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x2676), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x2677), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x2678), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x2679), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x267a), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x267b), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x267c), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x267d), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x267e), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x267f), LPC_631XESB}, + { PCI_VDEVICE(INTEL, 0x27b0), LPC_ICH7DH}, + { PCI_VDEVICE(INTEL, 0x27b8), LPC_ICH7}, + { PCI_VDEVICE(INTEL, 0x27b9), LPC_ICH7M}, + { PCI_VDEVICE(INTEL, 0x27bc), LPC_NM10}, + { PCI_VDEVICE(INTEL, 0x27bd), LPC_ICH7MDH}, + { PCI_VDEVICE(INTEL, 0x2810), LPC_ICH8}, + { PCI_VDEVICE(INTEL, 0x2811), LPC_ICH8ME}, + { PCI_VDEVICE(INTEL, 0x2812), LPC_ICH8DH}, + { PCI_VDEVICE(INTEL, 0x2814), LPC_ICH8DO}, + { PCI_VDEVICE(INTEL, 0x2815), LPC_ICH8M}, + { PCI_VDEVICE(INTEL, 0x2912), LPC_ICH9DH}, + { PCI_VDEVICE(INTEL, 0x2914), LPC_ICH9DO}, + { PCI_VDEVICE(INTEL, 0x2916), LPC_ICH9R}, + { PCI_VDEVICE(INTEL, 0x2917), LPC_ICH9ME}, + { PCI_VDEVICE(INTEL, 0x2918), LPC_ICH9}, + { PCI_VDEVICE(INTEL, 0x2919), LPC_ICH9M}, + { PCI_VDEVICE(INTEL, 0x3a14), LPC_ICH10DO}, + { PCI_VDEVICE(INTEL, 0x3a16), LPC_ICH10R}, + { PCI_VDEVICE(INTEL, 0x3a18), LPC_ICH10}, + { PCI_VDEVICE(INTEL, 0x3a1a), LPC_ICH10D}, + { PCI_VDEVICE(INTEL, 0x3b00), LPC_PCH}, + { PCI_VDEVICE(INTEL, 0x3b01), LPC_PCHM}, + { PCI_VDEVICE(INTEL, 0x3b02), LPC_P55}, + { PCI_VDEVICE(INTEL, 0x3b03), LPC_PM55}, + { PCI_VDEVICE(INTEL, 0x3b06), LPC_H55}, + { PCI_VDEVICE(INTEL, 0x3b07), LPC_QM57}, + { PCI_VDEVICE(INTEL, 0x3b08), LPC_H57}, + { PCI_VDEVICE(INTEL, 0x3b09), LPC_HM55}, + { PCI_VDEVICE(INTEL, 0x3b0a), LPC_Q57}, + { PCI_VDEVICE(INTEL, 0x3b0b), LPC_HM57}, + { PCI_VDEVICE(INTEL, 0x3b0d), LPC_PCHMSFF}, + { PCI_VDEVICE(INTEL, 0x3b0f), LPC_QS57}, + { PCI_VDEVICE(INTEL, 0x3b12), LPC_3400}, + { PCI_VDEVICE(INTEL, 0x3b14), LPC_3420}, + { PCI_VDEVICE(INTEL, 0x3b16), LPC_3450}, + { PCI_VDEVICE(INTEL, 0x5031), LPC_EP80579}, { PCI_VDEVICE(INTEL, 0x8c40), LPC_LPT}, { PCI_VDEVICE(INTEL, 0x8c41), LPC_LPT}, { PCI_VDEVICE(INTEL, 0x8c42), LPC_LPT}, @@ -703,14 +710,11 @@ static const struct pci_device_id lpc_ich_ids[] = { { PCI_VDEVICE(INTEL, 0x8c5d), LPC_LPT}, { PCI_VDEVICE(INTEL, 0x8c5e), LPC_LPT}, { PCI_VDEVICE(INTEL, 0x8c5f), LPC_LPT}, - { PCI_VDEVICE(INTEL, 0x9c40), LPC_LPT_LP}, - { PCI_VDEVICE(INTEL, 0x9c41), LPC_LPT_LP}, - { PCI_VDEVICE(INTEL, 0x9c42), LPC_LPT_LP}, - { PCI_VDEVICE(INTEL, 0x9c43), LPC_LPT_LP}, - { PCI_VDEVICE(INTEL, 0x9c44), LPC_LPT_LP}, - { PCI_VDEVICE(INTEL, 0x9c45), LPC_LPT_LP}, - { PCI_VDEVICE(INTEL, 0x9c46), LPC_LPT_LP}, - { PCI_VDEVICE(INTEL, 0x9c47), LPC_LPT_LP}, + { PCI_VDEVICE(INTEL, 0x8cc1), LPC_9S}, + { PCI_VDEVICE(INTEL, 0x8cc2), LPC_9S}, + { PCI_VDEVICE(INTEL, 0x8cc3), LPC_9S}, + { PCI_VDEVICE(INTEL, 0x8cc4), LPC_9S}, + { PCI_VDEVICE(INTEL, 0x8cc6), LPC_9S}, { PCI_VDEVICE(INTEL, 0x8d40), LPC_WBG}, { PCI_VDEVICE(INTEL, 0x8d41), LPC_WBG}, { PCI_VDEVICE(INTEL, 0x8d42), LPC_WBG}, @@ -743,12 +747,14 @@ static const struct pci_device_id lpc_ich_ids[] = { { PCI_VDEVICE(INTEL, 0x8d5d), LPC_WBG}, { PCI_VDEVICE(INTEL, 0x8d5e), LPC_WBG}, { PCI_VDEVICE(INTEL, 0x8d5f), LPC_WBG}, - { PCI_VDEVICE(INTEL, 0x1f38), LPC_AVN}, - { PCI_VDEVICE(INTEL, 0x1f39), LPC_AVN}, - { PCI_VDEVICE(INTEL, 0x1f3a), LPC_AVN}, - { PCI_VDEVICE(INTEL, 0x1f3b), LPC_AVN}, - { PCI_VDEVICE(INTEL, 0x0f1c), LPC_BAYTRAIL}, - { PCI_VDEVICE(INTEL, 0x2390), LPC_COLETO}, + { PCI_VDEVICE(INTEL, 0x9c40), LPC_LPT_LP}, + { PCI_VDEVICE(INTEL, 0x9c41), LPC_LPT_LP}, + { PCI_VDEVICE(INTEL, 0x9c42), LPC_LPT_LP}, + { PCI_VDEVICE(INTEL, 0x9c43), LPC_LPT_LP}, + { PCI_VDEVICE(INTEL, 0x9c44), LPC_LPT_LP}, + { PCI_VDEVICE(INTEL, 0x9c45), LPC_LPT_LP}, + { PCI_VDEVICE(INTEL, 0x9c46), LPC_LPT_LP}, + { PCI_VDEVICE(INTEL, 0x9c47), LPC_LPT_LP}, { PCI_VDEVICE(INTEL, 0x9cc1), LPC_WPT_LP}, { PCI_VDEVICE(INTEL, 0x9cc2), LPC_WPT_LP}, { PCI_VDEVICE(INTEL, 0x9cc3), LPC_WPT_LP}, @@ -756,12 +762,6 @@ static const struct pci_device_id lpc_ich_ids[] = { { PCI_VDEVICE(INTEL, 0x9cc6), LPC_WPT_LP}, { PCI_VDEVICE(INTEL, 0x9cc7), LPC_WPT_LP}, { PCI_VDEVICE(INTEL, 0x9cc9), LPC_WPT_LP}, - { PCI_VDEVICE(INTEL, 0x229c), LPC_BRASWELL}, - { PCI_VDEVICE(INTEL, 0x8cc1), LPC_9S}, - { PCI_VDEVICE(INTEL, 0x8cc2), LPC_9S}, - { PCI_VDEVICE(INTEL, 0x8cc3), LPC_9S}, - { PCI_VDEVICE(INTEL, 0x8cc4), LPC_9S}, - { PCI_VDEVICE(INTEL, 0x8cc6), LPC_9S}, { 0, }, /* End of list */ }; MODULE_DEVICE_TABLE(pci, lpc_ich_ids); @@ -934,8 +934,8 @@ gpe0_done: lpc_ich_enable_gpio_space(dev); lpc_ich_finalize_cell(dev, &lpc_ich_cells[LPC_GPIO]); - ret = mfd_add_devices(&dev->dev, -1, &lpc_ich_cells[LPC_GPIO], - 1, NULL, 0, NULL); + ret = mfd_add_devices(&dev->dev, PLATFORM_DEVID_AUTO, + &lpc_ich_cells[LPC_GPIO], 1, NULL, 0, NULL); gpio_done: if (acpi_conflict) @@ -1008,8 +1008,8 @@ static int lpc_ich_init_wdt(struct pci_dev *dev) } lpc_ich_finalize_cell(dev, &lpc_ich_cells[LPC_WDT]); - ret = mfd_add_devices(&dev->dev, -1, &lpc_ich_cells[LPC_WDT], - 1, NULL, 0, NULL); + ret = mfd_add_devices(&dev->dev, PLATFORM_DEVID_AUTO, + &lpc_ich_cells[LPC_WDT], 1, NULL, 0, NULL); wdt_done: return ret; diff --git a/drivers/mfd/max77693.c b/drivers/mfd/max77693.c index a159593e27a0..cb14afa97e6f 100644 --- a/drivers/mfd/max77693.c +++ b/drivers/mfd/max77693.c @@ -53,8 +53,8 @@ static const struct mfd_cell max77693_devs[] = { .of_compatible = "maxim,max77693-haptic", }, { - .name = "max77693-flash", - .of_compatible = "maxim,max77693-flash", + .name = "max77693-led", + .of_compatible = "maxim,max77693-led", }, }; diff --git a/drivers/mfd/max77843.c b/drivers/mfd/max77843.c new file mode 100644 index 000000000000..a354ac677ec7 --- /dev/null +++ b/drivers/mfd/max77843.c @@ -0,0 +1,243 @@ +/* + * MFD core driver for the Maxim MAX77843 + * + * Copyright (C) 2015 Samsung Electronics + * Author: Jaewon Kim <jaewon02.kim@samsung.com> + * Author: Beomho Seo <beomho.seo@samsung.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include <linux/err.h> +#include <linux/i2c.h> +#include <linux/init.h> +#include <linux/interrupt.h> +#include <linux/module.h> +#include <linux/mfd/core.h> +#include <linux/mfd/max77843-private.h> +#include <linux/of_device.h> +#include <linux/platform_device.h> + +static const struct mfd_cell max77843_devs[] = { + { + .name = "max77843-muic", + .of_compatible = "maxim,max77843-muic", + }, { + .name = "max77843-regulator", + .of_compatible = "maxim,max77843-regulator", + }, { + .name = "max77843-charger", + .of_compatible = "maxim,max77843-charger" + }, { + .name = "max77843-fuelgauge", + .of_compatible = "maxim,max77843-fuelgauge", + }, { + .name = "max77843-haptic", + .of_compatible = "maxim,max77843-haptic", + }, +}; + +static const struct regmap_config max77843_charger_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = MAX77843_CHG_REG_END, +}; + +static const struct regmap_config max77843_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = MAX77843_SYS_REG_END, +}; + +static const struct regmap_irq max77843_irqs[] = { + /* TOPSYS interrupts */ + { .reg_offset = 0, .mask = MAX77843_SYS_IRQ_SYSUVLO_INT, }, + { .reg_offset = 0, .mask = MAX77843_SYS_IRQ_SYSOVLO_INT, }, + { .reg_offset = 0, .mask = MAX77843_SYS_IRQ_TSHDN_INT, }, + { .reg_offset = 0, .mask = MAX77843_SYS_IRQ_TM_INT, }, +}; + +static const struct regmap_irq_chip max77843_irq_chip = { + .name = "max77843", + .status_base = MAX77843_SYS_REG_SYSINTSRC, + .mask_base = MAX77843_SYS_REG_SYSINTMASK, + .mask_invert = false, + .num_regs = 1, + .irqs = max77843_irqs, + .num_irqs = ARRAY_SIZE(max77843_irqs), +}; + +/* Charger and Charger regulator use same regmap. */ +static int max77843_chg_init(struct max77843 *max77843) +{ + int ret; + + max77843->i2c_chg = i2c_new_dummy(max77843->i2c->adapter, I2C_ADDR_CHG); + if (!max77843->i2c_chg) { + dev_err(&max77843->i2c->dev, + "Cannot allocate I2C device for Charger\n"); + return PTR_ERR(max77843->i2c_chg); + } + i2c_set_clientdata(max77843->i2c_chg, max77843); + + max77843->regmap_chg = devm_regmap_init_i2c(max77843->i2c_chg, + &max77843_charger_regmap_config); + if (IS_ERR(max77843->regmap_chg)) { + ret = PTR_ERR(max77843->regmap_chg); + goto err_chg_i2c; + } + + return 0; + +err_chg_i2c: + i2c_unregister_device(max77843->i2c_chg); + + return ret; +} + +static int max77843_probe(struct i2c_client *i2c, + const struct i2c_device_id *id) +{ + struct max77843 *max77843; + unsigned int reg_data; + int ret; + + max77843 = devm_kzalloc(&i2c->dev, sizeof(*max77843), GFP_KERNEL); + if (!max77843) + return -ENOMEM; + + i2c_set_clientdata(i2c, max77843); + max77843->dev = &i2c->dev; + max77843->i2c = i2c; + max77843->irq = i2c->irq; + + max77843->regmap = devm_regmap_init_i2c(i2c, + &max77843_regmap_config); + if (IS_ERR(max77843->regmap)) { + dev_err(&i2c->dev, "Failed to allocate topsys register map\n"); + return PTR_ERR(max77843->regmap); + } + + ret = regmap_add_irq_chip(max77843->regmap, max77843->irq, + IRQF_TRIGGER_LOW | IRQF_ONESHOT | IRQF_SHARED, + 0, &max77843_irq_chip, &max77843->irq_data); + if (ret) { + dev_err(&i2c->dev, "Failed to add TOPSYS IRQ chip\n"); + return ret; + } + + ret = regmap_read(max77843->regmap, + MAX77843_SYS_REG_PMICID, ®_data); + if (ret < 0) { + dev_err(&i2c->dev, "Failed to read PMIC ID\n"); + goto err_pmic_id; + } + dev_info(&i2c->dev, "device ID: 0x%x\n", reg_data); + + ret = max77843_chg_init(max77843); + if (ret) { + dev_err(&i2c->dev, "Failed to init Charger\n"); + goto err_pmic_id; + } + + ret = regmap_update_bits(max77843->regmap, + MAX77843_SYS_REG_INTSRCMASK, + MAX77843_INTSRC_MASK_MASK, + (unsigned int)~MAX77843_INTSRC_MASK_MASK); + if (ret < 0) { + dev_err(&i2c->dev, "Failed to unmask interrupt source\n"); + goto err_pmic_id; + } + + ret = mfd_add_devices(max77843->dev, -1, max77843_devs, + ARRAY_SIZE(max77843_devs), NULL, 0, NULL); + if (ret < 0) { + dev_err(&i2c->dev, "Failed to add mfd device\n"); + goto err_pmic_id; + } + + device_init_wakeup(max77843->dev, true); + + return 0; + +err_pmic_id: + regmap_del_irq_chip(max77843->irq, max77843->irq_data); + + return ret; +} + +static int max77843_remove(struct i2c_client *i2c) +{ + struct max77843 *max77843 = i2c_get_clientdata(i2c); + + mfd_remove_devices(max77843->dev); + + regmap_del_irq_chip(max77843->irq, max77843->irq_data); + + i2c_unregister_device(max77843->i2c_chg); + + return 0; +} + +static const struct of_device_id max77843_dt_match[] = { + { .compatible = "maxim,max77843", }, + { }, +}; + +static const struct i2c_device_id max77843_id[] = { + { "max77843", }, + { }, +}; +MODULE_DEVICE_TABLE(i2c, max77843_id); + +static int __maybe_unused max77843_suspend(struct device *dev) +{ + struct i2c_client *i2c = container_of(dev, struct i2c_client, dev); + struct max77843 *max77843 = i2c_get_clientdata(i2c); + + disable_irq(max77843->irq); + if (device_may_wakeup(dev)) + enable_irq_wake(max77843->irq); + + return 0; +} + +static int __maybe_unused max77843_resume(struct device *dev) +{ + struct i2c_client *i2c = container_of(dev, struct i2c_client, dev); + struct max77843 *max77843 = i2c_get_clientdata(i2c); + + if (device_may_wakeup(dev)) + disable_irq_wake(max77843->irq); + enable_irq(max77843->irq); + + return 0; +} + +static SIMPLE_DEV_PM_OPS(max77843_pm, max77843_suspend, max77843_resume); + +static struct i2c_driver max77843_i2c_driver = { + .driver = { + .name = "max77843", + .pm = &max77843_pm, + .of_match_table = max77843_dt_match, + }, + .probe = max77843_probe, + .remove = max77843_remove, + .id_table = max77843_id, +}; + +static int __init max77843_i2c_init(void) +{ + return i2c_add_driver(&max77843_i2c_driver); +} +subsys_initcall(max77843_i2c_init); + +static void __exit max77843_i2c_exit(void) +{ + i2c_del_driver(&max77843_i2c_driver); +} +module_exit(max77843_i2c_exit); diff --git a/drivers/mfd/max8925-core.c b/drivers/mfd/max8925-core.c index 97a787ab3d51..8520bd68c1ff 100644 --- a/drivers/mfd/max8925-core.c +++ b/drivers/mfd/max8925-core.c @@ -658,7 +658,7 @@ static int max8925_irq_domain_map(struct irq_domain *d, unsigned int virq, return 0; } -static struct irq_domain_ops max8925_irq_domain_ops = { +static const struct irq_domain_ops max8925_irq_domain_ops = { .map = max8925_irq_domain_map, .xlate = irq_domain_xlate_onetwocell, }; diff --git a/drivers/mfd/max8997-irq.c b/drivers/mfd/max8997-irq.c index 43fa61413e93..d3025be57f39 100644 --- a/drivers/mfd/max8997-irq.c +++ b/drivers/mfd/max8997-irq.c @@ -303,7 +303,7 @@ static int max8997_irq_domain_map(struct irq_domain *d, unsigned int irq, return 0; } -static struct irq_domain_ops max8997_irq_domain_ops = { +static const struct irq_domain_ops max8997_irq_domain_ops = { .map = max8997_irq_domain_map, }; diff --git a/drivers/mfd/max8998-irq.c b/drivers/mfd/max8998-irq.c index c469477eb778..3702056628a8 100644 --- a/drivers/mfd/max8998-irq.c +++ b/drivers/mfd/max8998-irq.c @@ -214,7 +214,7 @@ static int max8998_irq_domain_map(struct irq_domain *d, unsigned int irq, return 0; } -static struct irq_domain_ops max8998_irq_domain_ops = { +static const struct irq_domain_ops max8998_irq_domain_ops = { .map = max8998_irq_domain_map, }; diff --git a/drivers/mfd/mc13xxx-core.c b/drivers/mfd/mc13xxx-core.c index 64dde5d24b32..3f9f4c874d2a 100644 --- a/drivers/mfd/mc13xxx-core.c +++ b/drivers/mfd/mc13xxx-core.c @@ -51,19 +51,19 @@ void mc13xxx_lock(struct mc13xxx *mc13xxx) { if (!mutex_trylock(&mc13xxx->lock)) { - dev_dbg(mc13xxx->dev, "wait for %s from %pf\n", + dev_dbg(mc13xxx->dev, "wait for %s from %ps\n", __func__, __builtin_return_address(0)); mutex_lock(&mc13xxx->lock); } - dev_dbg(mc13xxx->dev, "%s from %pf\n", + dev_dbg(mc13xxx->dev, "%s from %ps\n", __func__, __builtin_return_address(0)); } EXPORT_SYMBOL(mc13xxx_lock); void mc13xxx_unlock(struct mc13xxx *mc13xxx) { - dev_dbg(mc13xxx->dev, "%s from %pf\n", + dev_dbg(mc13xxx->dev, "%s from %ps\n", __func__, __builtin_return_address(0)); mutex_unlock(&mc13xxx->lock); } @@ -163,7 +163,7 @@ int mc13xxx_irq_request(struct mc13xxx *mc13xxx, int irq, int virq = regmap_irq_get_virq(mc13xxx->irq_data, irq); return devm_request_threaded_irq(mc13xxx->dev, virq, NULL, handler, - 0, name, dev); + IRQF_ONESHOT, name, dev); } EXPORT_SYMBOL(mc13xxx_irq_request); diff --git a/drivers/mfd/menelaus.c b/drivers/mfd/menelaus.c index 9f01aef539dd..3ac36f5ccd3e 100644 --- a/drivers/mfd/menelaus.c +++ b/drivers/mfd/menelaus.c @@ -532,29 +532,6 @@ static const struct menelaus_vtg_value vcore_values[] = { { 1450, 18 }, }; -int menelaus_set_vcore_sw(unsigned int mV) -{ - int val, ret; - struct i2c_client *c = the_menelaus->client; - - val = menelaus_get_vtg_value(mV, vcore_values, - ARRAY_SIZE(vcore_values)); - if (val < 0) - return -EINVAL; - - dev_dbg(&c->dev, "Setting VCORE to %d mV (val 0x%02x)\n", mV, val); - - /* Set SW mode and the voltage in one go. */ - mutex_lock(&the_menelaus->lock); - ret = menelaus_write_reg(MENELAUS_VCORE_CTRL1, val); - if (ret == 0) - the_menelaus->vcore_hw_mode = 0; - mutex_unlock(&the_menelaus->lock); - msleep(1); - - return ret; -} - int menelaus_set_vcore_hw(unsigned int roof_mV, unsigned int floor_mV) { int fval, rval, val, ret; @@ -1239,7 +1216,7 @@ static int menelaus_probe(struct i2c_client *client, err = menelaus_read_reg(MENELAUS_VCORE_CTRL1); if (err < 0) goto fail; - if (err & BIT(7)) + if (err & VCORE_CTRL1_HW_NSW) menelaus->vcore_hw_mode = 1; else menelaus->vcore_hw_mode = 0; @@ -1259,7 +1236,7 @@ fail: return err; } -static int __exit menelaus_remove(struct i2c_client *client) +static int menelaus_remove(struct i2c_client *client) { struct menelaus_chip *menelaus = i2c_get_clientdata(client); @@ -1280,7 +1257,7 @@ static struct i2c_driver menelaus_i2c_driver = { .name = DRIVER_NAME, }, .probe = menelaus_probe, - .remove = __exit_p(menelaus_remove), + .remove = menelaus_remove, .id_table = menelaus_id, }; diff --git a/drivers/mfd/mfd-core.c b/drivers/mfd/mfd-core.c index 2a87f69be53d..14fd5cbcf0f2 100644 --- a/drivers/mfd/mfd-core.c +++ b/drivers/mfd/mfd-core.c @@ -128,7 +128,7 @@ static int mfd_add_device(struct device *parent, int id, int platform_id; int r; - if (id < 0) + if (id == PLATFORM_DEVID_AUTO) platform_id = id; else platform_id = id + cell->id; @@ -207,9 +207,11 @@ static int mfd_add_device(struct device *parent, int id, } if (!cell->ignore_resource_conflicts) { - ret = acpi_check_resource_conflict(&res[r]); - if (ret) - goto fail_alias; + if (has_acpi_companion(&pdev->dev)) { + ret = acpi_check_resource_conflict(&res[r]); + if (ret) + goto fail_alias; + } } } diff --git a/drivers/mfd/mt6397-core.c b/drivers/mfd/mt6397-core.c new file mode 100644 index 000000000000..03929a6c6fc4 --- /dev/null +++ b/drivers/mfd/mt6397-core.c @@ -0,0 +1,248 @@ +/* + * Copyright (c) 2014 MediaTek Inc. + * Author: Flora Fu, MediaTek + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <linux/interrupt.h> +#include <linux/module.h> +#include <linux/of_device.h> +#include <linux/of_irq.h> +#include <linux/regmap.h> +#include <linux/mfd/core.h> +#include <linux/mfd/mt6397/core.h> +#include <linux/mfd/mt6397/registers.h> + +#define MT6397_RTC_BASE 0xe000 +#define MT6397_RTC_SIZE 0x3e + +static const struct resource mt6397_rtc_resources[] = { + { + .start = MT6397_RTC_BASE, + .end = MT6397_RTC_BASE + MT6397_RTC_SIZE, + .flags = IORESOURCE_MEM, + }, + { + .start = MT6397_IRQ_RTC, + .end = MT6397_IRQ_RTC, + .flags = IORESOURCE_IRQ, + }, +}; + +static const struct mfd_cell mt6397_devs[] = { + { + .name = "mt6397-rtc", + .num_resources = ARRAY_SIZE(mt6397_rtc_resources), + .resources = mt6397_rtc_resources, + .of_compatible = "mediatek,mt6397-rtc", + }, { + .name = "mt6397-regulator", + .of_compatible = "mediatek,mt6397-regulator", + }, { + .name = "mt6397-codec", + .of_compatible = "mediatek,mt6397-codec", + }, { + .name = "mt6397-clk", + .of_compatible = "mediatek,mt6397-clk", + }, { + .name = "mt6397-pinctrl", + .of_compatible = "mediatek,mt6397-pinctrl", + }, +}; + +static void mt6397_irq_lock(struct irq_data *data) +{ + struct mt6397_chip *mt6397 = irq_get_chip_data(data->irq); + + mutex_lock(&mt6397->irqlock); +} + +static void mt6397_irq_sync_unlock(struct irq_data *data) +{ + struct mt6397_chip *mt6397 = irq_get_chip_data(data->irq); + + regmap_write(mt6397->regmap, MT6397_INT_CON0, mt6397->irq_masks_cur[0]); + regmap_write(mt6397->regmap, MT6397_INT_CON1, mt6397->irq_masks_cur[1]); + + mutex_unlock(&mt6397->irqlock); +} + +static void mt6397_irq_disable(struct irq_data *data) +{ + struct mt6397_chip *mt6397 = irq_get_chip_data(data->irq); + int shift = data->hwirq & 0xf; + int reg = data->hwirq >> 4; + + mt6397->irq_masks_cur[reg] &= ~BIT(shift); +} + +static void mt6397_irq_enable(struct irq_data *data) +{ + struct mt6397_chip *mt6397 = irq_get_chip_data(data->irq); + int shift = data->hwirq & 0xf; + int reg = data->hwirq >> 4; + + mt6397->irq_masks_cur[reg] |= BIT(shift); +} + +static struct irq_chip mt6397_irq_chip = { + .name = "mt6397-irq", + .irq_bus_lock = mt6397_irq_lock, + .irq_bus_sync_unlock = mt6397_irq_sync_unlock, + .irq_enable = mt6397_irq_enable, + .irq_disable = mt6397_irq_disable, +}; + +static void mt6397_irq_handle_reg(struct mt6397_chip *mt6397, int reg, + int irqbase) +{ + unsigned int status; + int i, irq, ret; + + ret = regmap_read(mt6397->regmap, reg, &status); + if (ret) { + dev_err(mt6397->dev, "Failed to read irq status: %d\n", ret); + return; + } + + for (i = 0; i < 16; i++) { + if (status & BIT(i)) { + irq = irq_find_mapping(mt6397->irq_domain, irqbase + i); + if (irq) + handle_nested_irq(irq); + } + } + + regmap_write(mt6397->regmap, reg, status); +} + +static irqreturn_t mt6397_irq_thread(int irq, void *data) +{ + struct mt6397_chip *mt6397 = data; + + mt6397_irq_handle_reg(mt6397, MT6397_INT_STATUS0, 0); + mt6397_irq_handle_reg(mt6397, MT6397_INT_STATUS1, 16); + + return IRQ_HANDLED; +} + +static int mt6397_irq_domain_map(struct irq_domain *d, unsigned int irq, + irq_hw_number_t hw) +{ + struct mt6397_chip *mt6397 = d->host_data; + + irq_set_chip_data(irq, mt6397); + irq_set_chip_and_handler(irq, &mt6397_irq_chip, handle_level_irq); + irq_set_nested_thread(irq, 1); +#ifdef CONFIG_ARM + set_irq_flags(irq, IRQF_VALID); +#else + irq_set_noprobe(irq); +#endif + + return 0; +} + +static const struct irq_domain_ops mt6397_irq_domain_ops = { + .map = mt6397_irq_domain_map, +}; + +static int mt6397_irq_init(struct mt6397_chip *mt6397) +{ + int ret; + + mutex_init(&mt6397->irqlock); + + /* Mask all interrupt sources */ + regmap_write(mt6397->regmap, MT6397_INT_CON0, 0x0); + regmap_write(mt6397->regmap, MT6397_INT_CON1, 0x0); + + mt6397->irq_domain = irq_domain_add_linear(mt6397->dev->of_node, + MT6397_IRQ_NR, &mt6397_irq_domain_ops, mt6397); + if (!mt6397->irq_domain) { + dev_err(mt6397->dev, "could not create irq domain\n"); + return -ENOMEM; + } + + ret = devm_request_threaded_irq(mt6397->dev, mt6397->irq, NULL, + mt6397_irq_thread, IRQF_ONESHOT, "mt6397-pmic", mt6397); + if (ret) { + dev_err(mt6397->dev, "failed to register irq=%d; err: %d\n", + mt6397->irq, ret); + return ret; + } + + return 0; +} + +static int mt6397_probe(struct platform_device *pdev) +{ + int ret; + struct mt6397_chip *mt6397; + + mt6397 = devm_kzalloc(&pdev->dev, sizeof(*mt6397), GFP_KERNEL); + if (!mt6397) + return -ENOMEM; + + mt6397->dev = &pdev->dev; + /* + * mt6397 MFD is child device of soc pmic wrapper. + * Regmap is set from its parent. + */ + mt6397->regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!mt6397->regmap) + return -ENODEV; + + platform_set_drvdata(pdev, mt6397); + + mt6397->irq = platform_get_irq(pdev, 0); + if (mt6397->irq > 0) { + ret = mt6397_irq_init(mt6397); + if (ret) + return ret; + } + + ret = mfd_add_devices(&pdev->dev, -1, mt6397_devs, + ARRAY_SIZE(mt6397_devs), NULL, 0, NULL); + if (ret) + dev_err(&pdev->dev, "failed to add child devices: %d\n", ret); + + return ret; +} + +static int mt6397_remove(struct platform_device *pdev) +{ + mfd_remove_devices(&pdev->dev); + + return 0; +} + +static const struct of_device_id mt6397_of_match[] = { + { .compatible = "mediatek,mt6397" }, + { } +}; +MODULE_DEVICE_TABLE(of, mt6397_of_match); + +static struct platform_driver mt6397_driver = { + .probe = mt6397_probe, + .remove = mt6397_remove, + .driver = { + .name = "mt6397", + .of_match_table = of_match_ptr(mt6397_of_match), + }, +}; + +module_platform_driver(mt6397_driver); + +MODULE_AUTHOR("Flora Fu, MediaTek"); +MODULE_DESCRIPTION("Driver for MediaTek MT6397 PMIC"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:mt6397"); diff --git a/drivers/mfd/qcom-spmi-pmic.c b/drivers/mfd/qcom-spmi-pmic.c index 4b8beb2a1579..af6ac1c4b45c 100644 --- a/drivers/mfd/qcom-spmi-pmic.c +++ b/drivers/mfd/qcom-spmi-pmic.c @@ -17,6 +17,100 @@ #include <linux/regmap.h> #include <linux/of_platform.h> +#define PMIC_REV2 0x101 +#define PMIC_REV3 0x102 +#define PMIC_REV4 0x103 +#define PMIC_TYPE 0x104 +#define PMIC_SUBTYPE 0x105 + +#define PMIC_TYPE_VALUE 0x51 + +#define COMMON_SUBTYPE 0x00 +#define PM8941_SUBTYPE 0x01 +#define PM8841_SUBTYPE 0x02 +#define PM8019_SUBTYPE 0x03 +#define PM8226_SUBTYPE 0x04 +#define PM8110_SUBTYPE 0x05 +#define PMA8084_SUBTYPE 0x06 +#define PMI8962_SUBTYPE 0x07 +#define PMD9635_SUBTYPE 0x08 +#define PM8994_SUBTYPE 0x09 +#define PMI8994_SUBTYPE 0x0a +#define PM8916_SUBTYPE 0x0b +#define PM8004_SUBTYPE 0x0c +#define PM8909_SUBTYPE 0x0d + +static const struct of_device_id pmic_spmi_id_table[] = { + { .compatible = "qcom,spmi-pmic", .data = (void *)COMMON_SUBTYPE }, + { .compatible = "qcom,pm8941", .data = (void *)PM8941_SUBTYPE }, + { .compatible = "qcom,pm8841", .data = (void *)PM8841_SUBTYPE }, + { .compatible = "qcom,pm8019", .data = (void *)PM8019_SUBTYPE }, + { .compatible = "qcom,pm8226", .data = (void *)PM8226_SUBTYPE }, + { .compatible = "qcom,pm8110", .data = (void *)PM8110_SUBTYPE }, + { .compatible = "qcom,pma8084", .data = (void *)PMA8084_SUBTYPE }, + { .compatible = "qcom,pmi8962", .data = (void *)PMI8962_SUBTYPE }, + { .compatible = "qcom,pmd9635", .data = (void *)PMD9635_SUBTYPE }, + { .compatible = "qcom,pm8994", .data = (void *)PM8994_SUBTYPE }, + { .compatible = "qcom,pmi8994", .data = (void *)PMI8994_SUBTYPE }, + { .compatible = "qcom,pm8916", .data = (void *)PM8916_SUBTYPE }, + { .compatible = "qcom,pm8004", .data = (void *)PM8004_SUBTYPE }, + { .compatible = "qcom,pm8909", .data = (void *)PM8909_SUBTYPE }, + { } +}; + +static void pmic_spmi_show_revid(struct regmap *map, struct device *dev) +{ + unsigned int rev2, minor, major, type, subtype; + const char *name = "unknown"; + int ret, i; + + ret = regmap_read(map, PMIC_TYPE, &type); + if (ret < 0) + return; + + if (type != PMIC_TYPE_VALUE) + return; + + ret = regmap_read(map, PMIC_SUBTYPE, &subtype); + if (ret < 0) + return; + + for (i = 0; i < ARRAY_SIZE(pmic_spmi_id_table); i++) { + if (subtype == (unsigned long)pmic_spmi_id_table[i].data) + break; + } + + if (i != ARRAY_SIZE(pmic_spmi_id_table)) + name = pmic_spmi_id_table[i].compatible; + + ret = regmap_read(map, PMIC_REV2, &rev2); + if (ret < 0) + return; + + ret = regmap_read(map, PMIC_REV3, &minor); + if (ret < 0) + return; + + ret = regmap_read(map, PMIC_REV4, &major); + if (ret < 0) + return; + + /* + * In early versions of PM8941 and PM8226, the major revision number + * started incrementing from 0 (eg 0 = v1.0, 1 = v2.0). + * Increment the major revision number here if the chip is an early + * version of PM8941 or PM8226. + */ + if ((subtype == PM8941_SUBTYPE || subtype == PM8226_SUBTYPE) && + major < 0x02) + major++; + + if (subtype == PM8110_SUBTYPE) + minor = rev2; + + dev_dbg(dev, "%x: %s v%d.%d\n", subtype, name, major, minor); +} + static const struct regmap_config spmi_regmap_config = { .reg_bits = 16, .val_bits = 8, @@ -33,6 +127,8 @@ static int pmic_spmi_probe(struct spmi_device *sdev) if (IS_ERR(regmap)) return PTR_ERR(regmap); + pmic_spmi_show_revid(regmap, &sdev->dev); + return of_platform_populate(root, NULL, NULL, &sdev->dev); } @@ -41,13 +137,6 @@ static void pmic_spmi_remove(struct spmi_device *sdev) of_platform_depopulate(&sdev->dev); } -static const struct of_device_id pmic_spmi_id_table[] = { - { .compatible = "qcom,spmi-pmic" }, - { .compatible = "qcom,pm8941" }, - { .compatible = "qcom,pm8841" }, - { .compatible = "qcom,pma8084" }, - { } -}; MODULE_DEVICE_TABLE(of, pmic_spmi_id_table); static struct spmi_driver pmic_spmi_driver = { diff --git a/drivers/mfd/qcom_rpm.c b/drivers/mfd/qcom_rpm.c index f696328c2933..12e324319573 100644 --- a/drivers/mfd/qcom_rpm.c +++ b/drivers/mfd/qcom_rpm.c @@ -323,10 +323,51 @@ static const struct qcom_rpm_data msm8960_template = { .n_resources = ARRAY_SIZE(msm8960_rpm_resource_table), }; +static const struct qcom_rpm_resource ipq806x_rpm_resource_table[] = { + [QCOM_RPM_CXO_CLK] = { 25, 9, 5, 1 }, + [QCOM_RPM_PXO_CLK] = { 26, 10, 6, 1 }, + [QCOM_RPM_APPS_FABRIC_CLK] = { 27, 11, 8, 1 }, + [QCOM_RPM_SYS_FABRIC_CLK] = { 28, 12, 9, 1 }, + [QCOM_RPM_NSS_FABRIC_0_CLK] = { 29, 13, 10, 1 }, + [QCOM_RPM_DAYTONA_FABRIC_CLK] = { 30, 14, 11, 1 }, + [QCOM_RPM_SFPB_CLK] = { 31, 15, 12, 1 }, + [QCOM_RPM_CFPB_CLK] = { 32, 16, 13, 1 }, + [QCOM_RPM_NSS_FABRIC_1_CLK] = { 33, 17, 14, 1 }, + [QCOM_RPM_EBI1_CLK] = { 34, 18, 16, 1 }, + [QCOM_RPM_APPS_FABRIC_HALT] = { 35, 19, 18, 2 }, + [QCOM_RPM_APPS_FABRIC_MODE] = { 37, 20, 19, 3 }, + [QCOM_RPM_APPS_FABRIC_IOCTL] = { 40, 21, 20, 1 }, + [QCOM_RPM_APPS_FABRIC_ARB] = { 41, 22, 21, 12 }, + [QCOM_RPM_SYS_FABRIC_HALT] = { 53, 23, 22, 2 }, + [QCOM_RPM_SYS_FABRIC_MODE] = { 55, 24, 23, 3 }, + [QCOM_RPM_SYS_FABRIC_IOCTL] = { 58, 25, 24, 1 }, + [QCOM_RPM_SYS_FABRIC_ARB] = { 59, 26, 25, 30 }, + [QCOM_RPM_MM_FABRIC_HALT] = { 89, 27, 26, 2 }, + [QCOM_RPM_MM_FABRIC_MODE] = { 91, 28, 27, 3 }, + [QCOM_RPM_MM_FABRIC_IOCTL] = { 94, 29, 28, 1 }, + [QCOM_RPM_MM_FABRIC_ARB] = { 95, 30, 29, 2 }, + [QCOM_RPM_CXO_BUFFERS] = { 209, 33, 31, 1 }, + [QCOM_RPM_USB_OTG_SWITCH] = { 210, 34, 32, 1 }, + [QCOM_RPM_HDMI_SWITCH] = { 211, 35, 33, 1 }, + [QCOM_RPM_DDR_DMM] = { 212, 36, 34, 2 }, + [QCOM_RPM_VDDMIN_GPIO] = { 215, 40, 39, 1 }, + [QCOM_RPM_SMB208_S1a] = { 216, 41, 90, 2 }, + [QCOM_RPM_SMB208_S1b] = { 218, 43, 91, 2 }, + [QCOM_RPM_SMB208_S2a] = { 220, 45, 92, 2 }, + [QCOM_RPM_SMB208_S2b] = { 222, 47, 93, 2 }, +}; + +static const struct qcom_rpm_data ipq806x_template = { + .version = 3, + .resource_table = ipq806x_rpm_resource_table, + .n_resources = ARRAY_SIZE(ipq806x_rpm_resource_table), +}; + static const struct of_device_id qcom_rpm_of_match[] = { { .compatible = "qcom,rpm-apq8064", .data = &apq8064_template }, { .compatible = "qcom,rpm-msm8660", .data = &msm8660_template }, { .compatible = "qcom,rpm-msm8960", .data = &msm8960_template }, + { .compatible = "qcom,rpm-ipq8064", .data = &ipq806x_template }, { } }; MODULE_DEVICE_TABLE(of, qcom_rpm_of_match); diff --git a/drivers/mfd/rk808.c b/drivers/mfd/rk808.c index bd0215069875..4b1e4399754b 100644 --- a/drivers/mfd/rk808.c +++ b/drivers/mfd/rk808.c @@ -89,6 +89,7 @@ static const struct rk808_reg_data pre_init_reg[] = { { RK808_BOOST_CONFIG_REG, BOOST_ILMIN_MASK, BOOST_ILMIN_100MA }, { RK808_BUCK1_CONFIG_REG, BUCK1_RATE_MASK, BUCK_ILMIN_200MA }, { RK808_BUCK2_CONFIG_REG, BUCK2_RATE_MASK, BUCK_ILMIN_200MA }, + { RK808_DCDC_UV_ACT_REG, BUCK_UV_ACT_MASK, BUCK_UV_ACT_DISABLE}, { RK808_VB_MON_REG, MASK_ALL, VB_LO_ACT | VB_LO_SEL_3500MV }, }; @@ -245,7 +246,7 @@ static int rk808_remove(struct i2c_client *client) return 0; } -static struct of_device_id rk808_of_match[] = { +static const struct of_device_id rk808_of_match[] = { { .compatible = "rockchip,rk808" }, { }, }; diff --git a/drivers/mfd/rtl8411.c b/drivers/mfd/rtl8411.c index fdd34c883d86..b3ae6592014a 100644 --- a/drivers/mfd/rtl8411.c +++ b/drivers/mfd/rtl8411.c @@ -53,7 +53,7 @@ static void rtl8411_fetch_vendor_settings(struct rtsx_pcr *pcr) u8 reg3 = 0; rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, ®1); - dev_dbg(&(pcr->pci->dev), "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg1); + pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg1); if (!rtsx_vendor_setting_valid(reg1)) return; @@ -65,7 +65,7 @@ static void rtl8411_fetch_vendor_settings(struct rtsx_pcr *pcr) pcr->card_drive_sel |= rtsx_reg_to_card_drive_sel(reg1); rtsx_pci_read_config_byte(pcr, PCR_SETTING_REG3, ®3); - dev_dbg(&(pcr->pci->dev), "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG3, reg3); + pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG3, reg3); pcr->sd30_drive_sel_3v3 = rtl8411_reg_to_sd30_drive_sel_3v3(reg3); } @@ -74,7 +74,7 @@ static void rtl8411b_fetch_vendor_settings(struct rtsx_pcr *pcr) u32 reg = 0; rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, ®); - dev_dbg(&(pcr->pci->dev), "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg); + pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg); if (!rtsx_vendor_setting_valid(reg)) return; @@ -260,9 +260,8 @@ static unsigned int rtl8411_cd_deglitch(struct rtsx_pcr *pcr) rtsx_pci_write_register(pcr, CARD_PWR_CTL, BPP_POWER_MASK, BPP_POWER_OFF); - dev_dbg(&(pcr->pci->dev), - "After CD deglitch, card_exist = 0x%x\n", - card_exist); + pcr_dbg(pcr, "After CD deglitch, card_exist = 0x%x\n", + card_exist); } if (card_exist & MS_EXIST) { diff --git a/drivers/mfd/rts5209.c b/drivers/mfd/rts5209.c index cb04174a8924..373e253c33df 100644 --- a/drivers/mfd/rts5209.c +++ b/drivers/mfd/rts5209.c @@ -38,7 +38,7 @@ static void rts5209_fetch_vendor_settings(struct rtsx_pcr *pcr) u32 reg; rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, ®); - dev_dbg(&(pcr->pci->dev), "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg); + pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg); if (rts5209_vendor_setting1_valid(reg)) { if (rts5209_reg_check_ms_pmos(reg)) @@ -47,7 +47,7 @@ static void rts5209_fetch_vendor_settings(struct rtsx_pcr *pcr) } rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG2, ®); - dev_dbg(&(pcr->pci->dev), "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg); + pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg); if (rts5209_vendor_setting2_valid(reg)) { pcr->sd30_drive_sel_1v8 = diff --git a/drivers/mfd/rts5227.c b/drivers/mfd/rts5227.c index 32407404d838..ce012d78ce2a 100644 --- a/drivers/mfd/rts5227.c +++ b/drivers/mfd/rts5227.c @@ -63,7 +63,7 @@ static void rts5227_fetch_vendor_settings(struct rtsx_pcr *pcr) u32 reg; rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, ®); - dev_dbg(&(pcr->pci->dev), "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg); + pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg); if (!rtsx_vendor_setting_valid(reg)) return; @@ -74,7 +74,7 @@ static void rts5227_fetch_vendor_settings(struct rtsx_pcr *pcr) pcr->card_drive_sel |= rtsx_reg_to_card_drive_sel(reg); rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG2, ®); - dev_dbg(&(pcr->pci->dev), "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg); + pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg); pcr->sd30_drive_sel_3v3 = rtsx_reg_to_sd30_drive_sel_3v3(reg); if (rtsx_reg_check_reverse_socket(reg)) pcr->flags |= PCR_REVERSE_SOCKET; @@ -118,11 +118,9 @@ static int rts5227_extra_init_hw(struct rtsx_pcr *pcr) rts5227_fill_driving(pcr, OUTPUT_3V3); /* Configure force_clock_req */ if (pcr->flags & PCR_REVERSE_SOCKET) - rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, - AUTOLOAD_CFG_BASE + 3, 0xB8, 0xB8); + rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0xB8, 0xB8); else - rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, - AUTOLOAD_CFG_BASE + 3, 0xB8, 0x88); + rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0xB8, 0x88); rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PM_CTRL3, 0x10, 0x00); return rtsx_pci_send_cmd(pcr, 100); @@ -132,7 +130,7 @@ static int rts5227_optimize_phy(struct rtsx_pcr *pcr) { int err; - err = rtsx_gops_pm_reset(pcr); + err = rtsx_pci_write_register(pcr, PM_CTRL3, D3_DELINK_MODE_EN, 0x00); if (err < 0) return err; diff --git a/drivers/mfd/rts5229.c b/drivers/mfd/rts5229.c index 6353f5df087a..ace45384ec8b 100644 --- a/drivers/mfd/rts5229.c +++ b/drivers/mfd/rts5229.c @@ -38,7 +38,7 @@ static void rts5229_fetch_vendor_settings(struct rtsx_pcr *pcr) u32 reg; rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, ®); - dev_dbg(&(pcr->pci->dev), "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg); + pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg); if (!rtsx_vendor_setting_valid(reg)) return; @@ -50,7 +50,7 @@ static void rts5229_fetch_vendor_settings(struct rtsx_pcr *pcr) pcr->card_drive_sel |= rtsx_reg_to_card_drive_sel(reg); rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG2, ®); - dev_dbg(&(pcr->pci->dev), "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg); + pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg); pcr->sd30_drive_sel_3v3 = map_sd_drive(rtsx_reg_to_sd30_drive_sel_3v3(reg)); } diff --git a/drivers/mfd/rts5249.c b/drivers/mfd/rts5249.c index cf425cc959d5..eb2d5866f719 100644 --- a/drivers/mfd/rts5249.c +++ b/drivers/mfd/rts5249.c @@ -36,16 +36,16 @@ static u8 rts5249_get_ic_version(struct rtsx_pcr *pcr) static void rts5249_fill_driving(struct rtsx_pcr *pcr, u8 voltage) { u8 driving_3v3[4][3] = { - {0x11, 0x11, 0x11}, + {0x11, 0x11, 0x18}, {0x55, 0x55, 0x5C}, - {0x99, 0x99, 0x92}, - {0x99, 0x99, 0x92}, + {0xFF, 0xFF, 0xFF}, + {0x96, 0x96, 0x96}, }; u8 driving_1v8[4][3] = { + {0xC4, 0xC4, 0xC4}, {0x3C, 0x3C, 0x3C}, - {0xB3, 0xB3, 0xB3}, {0xFE, 0xFE, 0xFE}, - {0xC4, 0xC4, 0xC4}, + {0xB3, 0xB3, 0xB3}, }; u8 (*driving)[3], drive_sel; @@ -65,15 +65,17 @@ static void rts5249_fill_driving(struct rtsx_pcr *pcr, u8 voltage) 0xFF, driving[drive_sel][2]); } -static void rts5249_fetch_vendor_settings(struct rtsx_pcr *pcr) +static void rtsx_base_fetch_vendor_settings(struct rtsx_pcr *pcr) { u32 reg; rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, ®); - dev_dbg(&(pcr->pci->dev), "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg); + pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg); - if (!rtsx_vendor_setting_valid(reg)) + if (!rtsx_vendor_setting_valid(reg)) { + pcr_dbg(pcr, "skip fetch vendor setting\n"); return; + } pcr->aspm_en = rtsx_reg_to_aspm(reg); pcr->sd30_drive_sel_1v8 = rtsx_reg_to_sd30_drive_sel_1v8(reg); @@ -81,13 +83,13 @@ static void rts5249_fetch_vendor_settings(struct rtsx_pcr *pcr) pcr->card_drive_sel |= rtsx_reg_to_card_drive_sel(reg); rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG2, ®); - dev_dbg(&(pcr->pci->dev), "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg); + pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg); pcr->sd30_drive_sel_3v3 = rtsx_reg_to_sd30_drive_sel_3v3(reg); if (rtsx_reg_check_reverse_socket(reg)) pcr->flags |= PCR_REVERSE_SOCKET; } -static void rts5249_force_power_down(struct rtsx_pcr *pcr, u8 pm_state) +static void rtsx_base_force_power_down(struct rtsx_pcr *pcr, u8 pm_state) { /* Set relink_time to 0 */ rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 1, 0xFF, 0); @@ -95,7 +97,8 @@ static void rts5249_force_power_down(struct rtsx_pcr *pcr, u8 pm_state) rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 3, 0x01, 0); if (pm_state == HOST_ENTER_S3) - rtsx_pci_write_register(pcr, PM_CTRL3, 0x10, 0x10); + rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3, + D3_DELINK_MODE_EN, D3_DELINK_MODE_EN); rtsx_pci_write_register(pcr, FPDCTL, 0x03, 0x03); } @@ -104,6 +107,8 @@ static int rts5249_extra_init_hw(struct rtsx_pcr *pcr) { rtsx_pci_init_cmd(pcr); + /* Rest L1SUB Config */ + rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, L1SUB_CONFIG3, 0xFF, 0x00); /* Configure GPIO as output */ rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, GPIO_CTL, 0x02, 0x02); /* Reset ASPM state to default value */ @@ -116,12 +121,9 @@ static int rts5249_extra_init_hw(struct rtsx_pcr *pcr) /* Configure driving */ rts5249_fill_driving(pcr, OUTPUT_3V3); if (pcr->flags & PCR_REVERSE_SOCKET) - rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, - AUTOLOAD_CFG_BASE + 3, 0xB0, 0xB0); + rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0xB0, 0xB0); else - rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, - AUTOLOAD_CFG_BASE + 3, 0xB0, 0x80); - rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PM_CTRL3, 0x10, 0x00); + rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0xB0, 0x80); return rtsx_pci_send_cmd(pcr, 100); } @@ -130,15 +132,16 @@ static int rts5249_optimize_phy(struct rtsx_pcr *pcr) { int err; - err = rtsx_gops_pm_reset(pcr); + err = rtsx_pci_write_register(pcr, PM_CTRL3, D3_DELINK_MODE_EN, 0x00); if (err < 0) return err; - err = rtsx_pci_write_phy_register(pcr, PHY_REG_REV, - PHY_REG_REV_RESV | PHY_REG_REV_RXIDLE_LATCHED | - PHY_REG_REV_P1_EN | PHY_REG_REV_RXIDLE_EN | - PHY_REG_REV_RX_PWST | PHY_REG_REV_CLKREQ_DLY_TIMER_1_0 | - PHY_REG_REV_STOP_CLKRD | PHY_REG_REV_STOP_CLKWR); + err = rtsx_pci_write_phy_register(pcr, PHY_REV, + PHY_REV_RESV | PHY_REV_RXIDLE_LATCHED | + PHY_REV_P1_EN | PHY_REV_RXIDLE_EN | + PHY_REV_CLKREQ_TX_EN | PHY_REV_RX_PWST | + PHY_REV_CLKREQ_DT_1_0 | PHY_REV_STOP_CLKRD | + PHY_REV_STOP_CLKWR); if (err < 0) return err; @@ -149,19 +152,21 @@ static int rts5249_optimize_phy(struct rtsx_pcr *pcr) PHY_BPCR_IB_FILTER | PHY_BPCR_CMIRROR_EN); if (err < 0) return err; + err = rtsx_pci_write_phy_register(pcr, PHY_PCR, PHY_PCR_FORCE_CODE | PHY_PCR_OOBS_CALI_50 | PHY_PCR_OOBS_VCM_08 | PHY_PCR_OOBS_SEN_90 | - PHY_PCR_RSSI_EN); + PHY_PCR_RSSI_EN | PHY_PCR_RX10K); if (err < 0) return err; + err = rtsx_pci_write_phy_register(pcr, PHY_RCR2, PHY_RCR2_EMPHASE_EN | PHY_RCR2_NADJR | - PHY_RCR2_CDR_CP_10 | PHY_RCR2_CDR_SR_2 | - PHY_RCR2_FREQSEL_12 | PHY_RCR2_CPADJEN | - PHY_RCR2_CDR_SC_8 | PHY_RCR2_CALIB_LATE); + PHY_RCR2_CDR_SR_2 | PHY_RCR2_FREQSEL_12 | + PHY_RCR2_CDR_SC_12P | PHY_RCR2_CALIB_LATE); if (err < 0) return err; + err = rtsx_pci_write_phy_register(pcr, PHY_FLD4, PHY_FLD4_FLDEN_SEL | PHY_FLD4_REQ_REF | PHY_FLD4_RXAMP_OFF | PHY_FLD4_REQ_ADDA | @@ -169,11 +174,12 @@ static int rts5249_optimize_phy(struct rtsx_pcr *pcr) PHY_FLD4_BER_CHK_EN); if (err < 0) return err; - err = rtsx_pci_write_phy_register(pcr, PHY_RDR, PHY_RDR_RXDSEL_1_9); + err = rtsx_pci_write_phy_register(pcr, PHY_RDR, + PHY_RDR_RXDSEL_1_9 | PHY_SSC_AUTO_PWD); if (err < 0) return err; err = rtsx_pci_write_phy_register(pcr, PHY_RCR1, - PHY_RCR1_ADP_TIME | PHY_RCR1_VCO_COARSE); + PHY_RCR1_ADP_TIME_4 | PHY_RCR1_VCO_COARSE); if (err < 0) return err; err = rtsx_pci_write_phy_register(pcr, PHY_FLD3, @@ -181,33 +187,34 @@ static int rts5249_optimize_phy(struct rtsx_pcr *pcr) PHY_FLD3_RXDELINK); if (err < 0) return err; + return rtsx_pci_write_phy_register(pcr, PHY_TUNE, PHY_TUNE_TUNEREF_1_0 | PHY_TUNE_VBGSEL_1252 | PHY_TUNE_SDBUS_33 | PHY_TUNE_TUNED18 | - PHY_TUNE_TUNED12); + PHY_TUNE_TUNED12 | PHY_TUNE_TUNEA12); } -static int rts5249_turn_on_led(struct rtsx_pcr *pcr) +static int rtsx_base_turn_on_led(struct rtsx_pcr *pcr) { return rtsx_pci_write_register(pcr, GPIO_CTL, 0x02, 0x02); } -static int rts5249_turn_off_led(struct rtsx_pcr *pcr) +static int rtsx_base_turn_off_led(struct rtsx_pcr *pcr) { return rtsx_pci_write_register(pcr, GPIO_CTL, 0x02, 0x00); } -static int rts5249_enable_auto_blink(struct rtsx_pcr *pcr) +static int rtsx_base_enable_auto_blink(struct rtsx_pcr *pcr) { return rtsx_pci_write_register(pcr, OLT_LED_CTL, 0x08, 0x08); } -static int rts5249_disable_auto_blink(struct rtsx_pcr *pcr) +static int rtsx_base_disable_auto_blink(struct rtsx_pcr *pcr) { return rtsx_pci_write_register(pcr, OLT_LED_CTL, 0x08, 0x00); } -static int rts5249_card_power_on(struct rtsx_pcr *pcr, int card) +static int rtsx_base_card_power_on(struct rtsx_pcr *pcr, int card) { int err; @@ -234,7 +241,7 @@ static int rts5249_card_power_on(struct rtsx_pcr *pcr, int card) return 0; } -static int rts5249_card_power_off(struct rtsx_pcr *pcr, int card) +static int rtsx_base_card_power_off(struct rtsx_pcr *pcr, int card) { rtsx_pci_init_cmd(pcr); rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL, @@ -244,22 +251,35 @@ static int rts5249_card_power_off(struct rtsx_pcr *pcr, int card) return rtsx_pci_send_cmd(pcr, 100); } -static int rts5249_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage) +static int rtsx_base_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage) { int err; + u16 append; - if (voltage == OUTPUT_3V3) { - err = rtsx_pci_write_phy_register(pcr, PHY_TUNE, 0x4FC0 | 0x24); + switch (voltage) { + case OUTPUT_3V3: + err = rtsx_pci_update_phy(pcr, PHY_TUNE, PHY_TUNE_VOLTAGE_MASK, + PHY_TUNE_VOLTAGE_3V3); if (err < 0) return err; - } else if (voltage == OUTPUT_1V8) { - err = rtsx_pci_write_phy_register(pcr, PHY_BACR, 0x3C02); + break; + case OUTPUT_1V8: + append = PHY_TUNE_D18_1V8; + if (CHK_PCI_PID(pcr, 0x5249)) { + err = rtsx_pci_update_phy(pcr, PHY_BACR, + PHY_BACR_BASIC_MASK, 0); + if (err < 0) + return err; + append = PHY_TUNE_D18_1V7; + } + + err = rtsx_pci_update_phy(pcr, PHY_TUNE, PHY_TUNE_VOLTAGE_MASK, + append); if (err < 0) return err; - err = rtsx_pci_write_phy_register(pcr, PHY_TUNE, 0x4C40 | 0x24); - if (err < 0) - return err; - } else { + break; + default: + pcr_dbg(pcr, "unknown output voltage %d\n", voltage); return -EINVAL; } @@ -270,17 +290,17 @@ static int rts5249_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage) } static const struct pcr_ops rts5249_pcr_ops = { - .fetch_vendor_settings = rts5249_fetch_vendor_settings, + .fetch_vendor_settings = rtsx_base_fetch_vendor_settings, .extra_init_hw = rts5249_extra_init_hw, .optimize_phy = rts5249_optimize_phy, - .turn_on_led = rts5249_turn_on_led, - .turn_off_led = rts5249_turn_off_led, - .enable_auto_blink = rts5249_enable_auto_blink, - .disable_auto_blink = rts5249_disable_auto_blink, - .card_power_on = rts5249_card_power_on, - .card_power_off = rts5249_card_power_off, - .switch_output_voltage = rts5249_switch_output_voltage, - .force_power_down = rts5249_force_power_down, + .turn_on_led = rtsx_base_turn_on_led, + .turn_off_led = rtsx_base_turn_off_led, + .enable_auto_blink = rtsx_base_enable_auto_blink, + .disable_auto_blink = rtsx_base_disable_auto_blink, + .card_power_on = rtsx_base_card_power_on, + .card_power_off = rtsx_base_card_power_off, + .switch_output_voltage = rtsx_base_switch_output_voltage, + .force_power_down = rtsx_base_force_power_down, }; /* SD Pull Control Enable: @@ -343,7 +363,7 @@ void rts5249_init_params(struct rtsx_pcr *pcr) pcr->flags = 0; pcr->card_drive_sel = RTSX_CARD_DRIVE_DEFAULT; - pcr->sd30_drive_sel_1v8 = CFG_DRIVER_TYPE_C; + pcr->sd30_drive_sel_1v8 = CFG_DRIVER_TYPE_B; pcr->sd30_drive_sel_3v3 = CFG_DRIVER_TYPE_B; pcr->aspm_en = ASPM_L1_EN; pcr->tx_initial_phase = SET_CLOCK_PHASE(1, 29, 16); @@ -354,4 +374,219 @@ void rts5249_init_params(struct rtsx_pcr *pcr) pcr->sd_pull_ctl_disable_tbl = rts5249_sd_pull_ctl_disable_tbl; pcr->ms_pull_ctl_enable_tbl = rts5249_ms_pull_ctl_enable_tbl; pcr->ms_pull_ctl_disable_tbl = rts5249_ms_pull_ctl_disable_tbl; + + pcr->reg_pm_ctrl3 = PM_CTRL3; +} + +static int rts524a_write_phy(struct rtsx_pcr *pcr, u8 addr, u16 val) +{ + addr = addr & 0x80 ? (addr & 0x7F) | 0x40 : addr; + + return __rtsx_pci_write_phy_register(pcr, addr, val); +} + +static int rts524a_read_phy(struct rtsx_pcr *pcr, u8 addr, u16 *val) +{ + addr = addr & 0x80 ? (addr & 0x7F) | 0x40 : addr; + + return __rtsx_pci_read_phy_register(pcr, addr, val); } + +static int rts524a_optimize_phy(struct rtsx_pcr *pcr) +{ + int err; + + err = rtsx_pci_write_register(pcr, RTS524A_PM_CTRL3, + D3_DELINK_MODE_EN, 0x00); + if (err < 0) + return err; + + rtsx_pci_write_phy_register(pcr, PHY_PCR, + PHY_PCR_FORCE_CODE | PHY_PCR_OOBS_CALI_50 | + PHY_PCR_OOBS_VCM_08 | PHY_PCR_OOBS_SEN_90 | PHY_PCR_RSSI_EN); + rtsx_pci_write_phy_register(pcr, PHY_SSCCR3, + PHY_SSCCR3_STEP_IN | PHY_SSCCR3_CHECK_DELAY); + + if (is_version(pcr, 0x524A, IC_VER_A)) { + rtsx_pci_write_phy_register(pcr, PHY_SSCCR3, + PHY_SSCCR3_STEP_IN | PHY_SSCCR3_CHECK_DELAY); + rtsx_pci_write_phy_register(pcr, PHY_SSCCR2, + PHY_SSCCR2_PLL_NCODE | PHY_SSCCR2_TIME0 | + PHY_SSCCR2_TIME2_WIDTH); + rtsx_pci_write_phy_register(pcr, PHY_ANA1A, + PHY_ANA1A_TXR_LOOPBACK | PHY_ANA1A_RXT_BIST | + PHY_ANA1A_TXR_BIST | PHY_ANA1A_REV); + rtsx_pci_write_phy_register(pcr, PHY_ANA1D, + PHY_ANA1D_DEBUG_ADDR); + rtsx_pci_write_phy_register(pcr, PHY_DIG1E, + PHY_DIG1E_REV | PHY_DIG1E_D0_X_D1 | + PHY_DIG1E_RX_ON_HOST | PHY_DIG1E_RCLK_REF_HOST | + PHY_DIG1E_RCLK_TX_EN_KEEP | + PHY_DIG1E_RCLK_TX_TERM_KEEP | + PHY_DIG1E_RCLK_RX_EIDLE_ON | PHY_DIG1E_TX_TERM_KEEP | + PHY_DIG1E_RX_TERM_KEEP | PHY_DIG1E_TX_EN_KEEP | + PHY_DIG1E_RX_EN_KEEP); + } + + rtsx_pci_write_phy_register(pcr, PHY_ANA08, + PHY_ANA08_RX_EQ_DCGAIN | PHY_ANA08_SEL_RX_EN | + PHY_ANA08_RX_EQ_VAL | PHY_ANA08_SCP | PHY_ANA08_SEL_IPI); + + return 0; +} + +static int rts524a_extra_init_hw(struct rtsx_pcr *pcr) +{ + rts5249_extra_init_hw(pcr); + + rtsx_pci_write_register(pcr, FUNC_FORCE_CTL, + FORCE_ASPM_L1_EN, FORCE_ASPM_L1_EN); + rtsx_pci_write_register(pcr, PM_EVENT_DEBUG, PME_DEBUG_0, PME_DEBUG_0); + rtsx_pci_write_register(pcr, LDO_VCC_CFG1, LDO_VCC_LMT_EN, + LDO_VCC_LMT_EN); + rtsx_pci_write_register(pcr, PCLK_CTL, PCLK_MODE_SEL, PCLK_MODE_SEL); + if (is_version(pcr, 0x524A, IC_VER_A)) { + rtsx_pci_write_register(pcr, LDO_DV18_CFG, + LDO_DV18_SR_MASK, LDO_DV18_SR_DF); + rtsx_pci_write_register(pcr, LDO_VCC_CFG1, + LDO_VCC_REF_TUNE_MASK, LDO_VCC_REF_1V2); + rtsx_pci_write_register(pcr, LDO_VIO_CFG, + LDO_VIO_REF_TUNE_MASK, LDO_VIO_REF_1V2); + rtsx_pci_write_register(pcr, LDO_VIO_CFG, + LDO_VIO_SR_MASK, LDO_VIO_SR_DF); + rtsx_pci_write_register(pcr, LDO_DV12S_CFG, + LDO_REF12_TUNE_MASK, LDO_REF12_TUNE_DF); + rtsx_pci_write_register(pcr, SD40_LDO_CTL1, + SD40_VIO_TUNE_MASK, SD40_VIO_TUNE_1V7); + } + + return 0; +} + +static const struct pcr_ops rts524a_pcr_ops = { + .write_phy = rts524a_write_phy, + .read_phy = rts524a_read_phy, + .fetch_vendor_settings = rtsx_base_fetch_vendor_settings, + .extra_init_hw = rts524a_extra_init_hw, + .optimize_phy = rts524a_optimize_phy, + .turn_on_led = rtsx_base_turn_on_led, + .turn_off_led = rtsx_base_turn_off_led, + .enable_auto_blink = rtsx_base_enable_auto_blink, + .disable_auto_blink = rtsx_base_disable_auto_blink, + .card_power_on = rtsx_base_card_power_on, + .card_power_off = rtsx_base_card_power_off, + .switch_output_voltage = rtsx_base_switch_output_voltage, + .force_power_down = rtsx_base_force_power_down, +}; + +void rts524a_init_params(struct rtsx_pcr *pcr) +{ + rts5249_init_params(pcr); + + pcr->reg_pm_ctrl3 = RTS524A_PM_CTRL3; + pcr->ops = &rts524a_pcr_ops; +} + +static int rts525a_card_power_on(struct rtsx_pcr *pcr, int card) +{ + rtsx_pci_write_register(pcr, LDO_VCC_CFG1, + LDO_VCC_TUNE_MASK, LDO_VCC_3V3); + return rtsx_base_card_power_on(pcr, card); +} + +static int rts525a_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage) +{ + switch (voltage) { + case OUTPUT_3V3: + rtsx_pci_write_register(pcr, LDO_CONFIG2, + LDO_D3318_MASK, LDO_D3318_33V); + rtsx_pci_write_register(pcr, SD_PAD_CTL, SD_IO_USING_1V8, 0); + break; + case OUTPUT_1V8: + rtsx_pci_write_register(pcr, LDO_CONFIG2, + LDO_D3318_MASK, LDO_D3318_18V); + rtsx_pci_write_register(pcr, SD_PAD_CTL, SD_IO_USING_1V8, + SD_IO_USING_1V8); + break; + default: + return -EINVAL; + } + + rtsx_pci_init_cmd(pcr); + rts5249_fill_driving(pcr, voltage); + return rtsx_pci_send_cmd(pcr, 100); +} + +static int rts525a_optimize_phy(struct rtsx_pcr *pcr) +{ + int err; + + err = rtsx_pci_write_register(pcr, RTS524A_PM_CTRL3, + D3_DELINK_MODE_EN, 0x00); + if (err < 0) + return err; + + rtsx_pci_write_phy_register(pcr, _PHY_FLD0, + _PHY_FLD0_CLK_REQ_20C | _PHY_FLD0_RX_IDLE_EN | + _PHY_FLD0_BIT_ERR_RSTN | _PHY_FLD0_BER_COUNT | + _PHY_FLD0_BER_TIMER | _PHY_FLD0_CHECK_EN); + + rtsx_pci_write_phy_register(pcr, _PHY_ANA03, + _PHY_ANA03_TIMER_MAX | _PHY_ANA03_OOBS_DEB_EN | + _PHY_CMU_DEBUG_EN); + + if (is_version(pcr, 0x525A, IC_VER_A)) + rtsx_pci_write_phy_register(pcr, _PHY_REV0, + _PHY_REV0_FILTER_OUT | _PHY_REV0_CDR_BYPASS_PFD | + _PHY_REV0_CDR_RX_IDLE_BYPASS); + + return 0; +} + +static int rts525a_extra_init_hw(struct rtsx_pcr *pcr) +{ + rts5249_extra_init_hw(pcr); + + rtsx_pci_write_register(pcr, PCLK_CTL, PCLK_MODE_SEL, PCLK_MODE_SEL); + if (is_version(pcr, 0x525A, IC_VER_A)) { + rtsx_pci_write_register(pcr, L1SUB_CONFIG2, + L1SUB_AUTO_CFG, L1SUB_AUTO_CFG); + rtsx_pci_write_register(pcr, RREF_CFG, + RREF_VBGSEL_MASK, RREF_VBGSEL_1V25); + rtsx_pci_write_register(pcr, LDO_VIO_CFG, + LDO_VIO_TUNE_MASK, LDO_VIO_1V7); + rtsx_pci_write_register(pcr, LDO_DV12S_CFG, + LDO_D12_TUNE_MASK, LDO_D12_TUNE_DF); + rtsx_pci_write_register(pcr, LDO_AV12S_CFG, + LDO_AV12S_TUNE_MASK, LDO_AV12S_TUNE_DF); + rtsx_pci_write_register(pcr, LDO_VCC_CFG0, + LDO_VCC_LMTVTH_MASK, LDO_VCC_LMTVTH_2A); + rtsx_pci_write_register(pcr, OOBS_CONFIG, + OOBS_AUTOK_DIS | OOBS_VAL_MASK, 0x89); + } + + return 0; +} + +static const struct pcr_ops rts525a_pcr_ops = { + .fetch_vendor_settings = rtsx_base_fetch_vendor_settings, + .extra_init_hw = rts525a_extra_init_hw, + .optimize_phy = rts525a_optimize_phy, + .turn_on_led = rtsx_base_turn_on_led, + .turn_off_led = rtsx_base_turn_off_led, + .enable_auto_blink = rtsx_base_enable_auto_blink, + .disable_auto_blink = rtsx_base_disable_auto_blink, + .card_power_on = rts525a_card_power_on, + .card_power_off = rtsx_base_card_power_off, + .switch_output_voltage = rts525a_switch_output_voltage, + .force_power_down = rtsx_base_force_power_down, +}; + +void rts525a_init_params(struct rtsx_pcr *pcr) +{ + rts5249_init_params(pcr); + + pcr->reg_pm_ctrl3 = RTS524A_PM_CTRL3; + pcr->ops = &rts525a_pcr_ops; +} + diff --git a/drivers/mfd/rtsx_gops.c b/drivers/mfd/rtsx_gops.c deleted file mode 100644 index b1a98c678593..000000000000 --- a/drivers/mfd/rtsx_gops.c +++ /dev/null @@ -1,37 +0,0 @@ -/* Driver for Realtek PCI-Express card reader - * - * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2, or (at your option) any - * later version. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, see <http://www.gnu.org/licenses/>. - * - * Author: - * Micky Ching <micky_ching@realsil.com.cn> - */ - -#include <linux/mfd/rtsx_pci.h> -#include "rtsx_pcr.h" - -int rtsx_gops_pm_reset(struct rtsx_pcr *pcr) -{ - int err; - - /* init aspm */ - rtsx_pci_write_register(pcr, ASPM_FORCE_CTL, 0xFF, 0x00); - err = rtsx_pci_update_cfg_byte(pcr, LCTLR, ~LCTLR_ASPM_CTL_MASK, 0x00); - if (err < 0) - return err; - - /* reset PM_CTRL3 before send buffer cmd */ - return rtsx_pci_write_register(pcr, PM_CTRL3, D3_DELINK_MODE_EN, 0x00); -} diff --git a/drivers/mfd/rtsx_pcr.c b/drivers/mfd/rtsx_pcr.c index 30f7ca89a0e6..a66540a49079 100644 --- a/drivers/mfd/rtsx_pcr.c +++ b/drivers/mfd/rtsx_pcr.c @@ -58,11 +58,25 @@ static const struct pci_device_id rtsx_pci_ids[] = { { PCI_DEVICE(0x10EC, 0x5249), PCI_CLASS_OTHERS << 16, 0xFF0000 }, { PCI_DEVICE(0x10EC, 0x5287), PCI_CLASS_OTHERS << 16, 0xFF0000 }, { PCI_DEVICE(0x10EC, 0x5286), PCI_CLASS_OTHERS << 16, 0xFF0000 }, + { PCI_DEVICE(0x10EC, 0x524A), PCI_CLASS_OTHERS << 16, 0xFF0000 }, + { PCI_DEVICE(0x10EC, 0x525A), PCI_CLASS_OTHERS << 16, 0xFF0000 }, { 0, } }; MODULE_DEVICE_TABLE(pci, rtsx_pci_ids); +static inline void rtsx_pci_enable_aspm(struct rtsx_pcr *pcr) +{ + rtsx_pci_update_cfg_byte(pcr, pcr->pcie_cap + PCI_EXP_LNKCTL, + 0xFC, pcr->aspm_en); +} + +static inline void rtsx_pci_disable_aspm(struct rtsx_pcr *pcr) +{ + rtsx_pci_update_cfg_byte(pcr, pcr->pcie_cap + PCI_EXP_LNKCTL, + 0xFC, 0); +} + void rtsx_pci_start_run(struct rtsx_pcr *pcr) { /* If pci device removed, don't queue idle work any more */ @@ -75,7 +89,7 @@ void rtsx_pci_start_run(struct rtsx_pcr *pcr) pcr->ops->enable_auto_blink(pcr); if (pcr->aspm_en) - rtsx_pci_write_config_byte(pcr, LCTLR, 0); + rtsx_pci_disable_aspm(pcr); } mod_delayed_work(system_wq, &pcr->idle_work, msecs_to_jiffies(200)); @@ -130,7 +144,7 @@ int rtsx_pci_read_register(struct rtsx_pcr *pcr, u16 addr, u8 *data) } EXPORT_SYMBOL_GPL(rtsx_pci_read_register); -int rtsx_pci_write_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 val) +int __rtsx_pci_write_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 val) { int err, i, finished = 0; u8 tmp; @@ -162,9 +176,17 @@ int rtsx_pci_write_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 val) return 0; } + +int rtsx_pci_write_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 val) +{ + if (pcr->ops->write_phy) + return pcr->ops->write_phy(pcr, addr, val); + + return __rtsx_pci_write_phy_register(pcr, addr, val); +} EXPORT_SYMBOL_GPL(rtsx_pci_write_phy_register); -int rtsx_pci_read_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 *val) +int __rtsx_pci_read_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 *val) { int err, i, finished = 0; u16 data; @@ -210,6 +232,14 @@ int rtsx_pci_read_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 *val) return 0; } + +int rtsx_pci_read_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 *val) +{ + if (pcr->ops->read_phy) + return pcr->ops->read_phy(pcr, addr, val); + + return __rtsx_pci_read_phy_register(pcr, addr, val); +} EXPORT_SYMBOL_GPL(rtsx_pci_read_phy_register); void rtsx_pci_stop_cmd(struct rtsx_pcr *pcr) @@ -286,8 +316,7 @@ int rtsx_pci_send_cmd(struct rtsx_pcr *pcr, int timeout) timeleft = wait_for_completion_interruptible_timeout( &trans_done, msecs_to_jiffies(timeout)); if (timeleft <= 0) { - dev_dbg(&(pcr->pci->dev), "Timeout (%s %d)\n", - __func__, __LINE__); + pcr_dbg(pcr, "Timeout (%s %d)\n", __func__, __LINE__); err = -ETIMEDOUT; goto finish_send_cmd; } @@ -323,8 +352,7 @@ static void rtsx_pci_add_sg_tbl(struct rtsx_pcr *pcr, u64 val; u8 option = SG_VALID | SG_TRANS_DATA; - dev_dbg(&(pcr->pci->dev), "DMA addr: 0x%x, Len: 0x%x\n", - (unsigned int)addr, len); + pcr_dbg(pcr, "DMA addr: 0x%x, Len: 0x%x\n", (unsigned int)addr, len); if (end) option |= SG_END; @@ -339,11 +367,11 @@ int rtsx_pci_transfer_data(struct rtsx_pcr *pcr, struct scatterlist *sglist, { int err = 0, count; - dev_dbg(&(pcr->pci->dev), "--> %s: num_sg = %d\n", __func__, num_sg); + pcr_dbg(pcr, "--> %s: num_sg = %d\n", __func__, num_sg); count = rtsx_pci_dma_map_sg(pcr, sglist, num_sg, read); if (count < 1) return -EINVAL; - dev_dbg(&(pcr->pci->dev), "DMA mapping count: %d\n", count); + pcr_dbg(pcr, "DMA mapping count: %d\n", count); err = rtsx_pci_dma_transfer(pcr, sglist, count, read, timeout); @@ -417,8 +445,7 @@ int rtsx_pci_dma_transfer(struct rtsx_pcr *pcr, struct scatterlist *sglist, timeleft = wait_for_completion_interruptible_timeout( &trans_done, msecs_to_jiffies(timeout)); if (timeleft <= 0) { - dev_dbg(&(pcr->pci->dev), "Timeout (%s %d)\n", - __func__, __LINE__); + pcr_dbg(pcr, "Timeout (%s %d)\n", __func__, __LINE__); err = -ETIMEDOUT; goto out; } @@ -592,7 +619,7 @@ static void rtsx_pci_enable_bus_int(struct rtsx_pcr *pcr) /* Enable Bus Interrupt */ rtsx_pci_writel(pcr, RTSX_BIER, pcr->bier); - dev_dbg(&(pcr->pci->dev), "RTSX_BIER: 0x%08x\n", pcr->bier); + pcr_dbg(pcr, "RTSX_BIER: 0x%08x\n", pcr->bier); } static inline u8 double_ssc_depth(u8 depth) @@ -638,14 +665,13 @@ int rtsx_pci_switch_clock(struct rtsx_pcr *pcr, unsigned int card_clock, return err; card_clock /= 1000000; - dev_dbg(&(pcr->pci->dev), "Switch card clock to %dMHz\n", card_clock); + pcr_dbg(pcr, "Switch card clock to %dMHz\n", card_clock); clk = card_clock; if (!initial_mode && double_clk) clk = card_clock * 2; - dev_dbg(&(pcr->pci->dev), - "Internal SSC clock: %dMHz (cur_clock = %d)\n", - clk, pcr->cur_clock); + pcr_dbg(pcr, "Internal SSC clock: %dMHz (cur_clock = %d)\n", + clk, pcr->cur_clock); if (clk == pcr->cur_clock) return 0; @@ -674,14 +700,14 @@ int rtsx_pci_switch_clock(struct rtsx_pcr *pcr, unsigned int card_clock, } div++; } - dev_dbg(&(pcr->pci->dev), "n = %d, div = %d\n", n, div); + pcr_dbg(pcr, "n = %d, div = %d\n", n, div); ssc_depth = depth[ssc_depth]; if (double_clk) ssc_depth = double_ssc_depth(ssc_depth); ssc_depth = revise_ssc_depth(ssc_depth, div); - dev_dbg(&(pcr->pci->dev), "ssc_depth = %d\n", ssc_depth); + pcr_dbg(pcr, "ssc_depth = %d\n", ssc_depth); rtsx_pci_init_cmd(pcr); rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, @@ -803,13 +829,13 @@ static void rtsx_pci_card_detect(struct work_struct *work) dwork = to_delayed_work(work); pcr = container_of(dwork, struct rtsx_pcr, carddet_work); - dev_dbg(&(pcr->pci->dev), "--> %s\n", __func__); + pcr_dbg(pcr, "--> %s\n", __func__); mutex_lock(&pcr->pcr_mutex); spin_lock_irqsave(&pcr->lock, flags); irq_status = rtsx_pci_readl(pcr, RTSX_BIPR); - dev_dbg(&(pcr->pci->dev), "irq_status: 0x%08x\n", irq_status); + pcr_dbg(pcr, "irq_status: 0x%08x\n", irq_status); irq_status &= CARD_EXIST; card_inserted = pcr->card_inserted & irq_status; @@ -820,9 +846,8 @@ static void rtsx_pci_card_detect(struct work_struct *work) spin_unlock_irqrestore(&pcr->lock, flags); if (card_inserted || card_removed) { - dev_dbg(&(pcr->pci->dev), - "card_inserted: 0x%x, card_removed: 0x%x\n", - card_inserted, card_removed); + pcr_dbg(pcr, "card_inserted: 0x%x, card_removed: 0x%x\n", + card_inserted, card_removed); if (pcr->ops->cd_deglitch) card_inserted = pcr->ops->cd_deglitch(pcr); @@ -930,7 +955,7 @@ static void rtsx_pci_idle_work(struct work_struct *work) struct delayed_work *dwork = to_delayed_work(work); struct rtsx_pcr *pcr = container_of(dwork, struct rtsx_pcr, idle_work); - dev_dbg(&(pcr->pci->dev), "--> %s\n", __func__); + pcr_dbg(pcr, "--> %s\n", __func__); mutex_lock(&pcr->pcr_mutex); @@ -942,7 +967,7 @@ static void rtsx_pci_idle_work(struct work_struct *work) pcr->ops->turn_off_led(pcr); if (pcr->aspm_en) - rtsx_pci_write_config_byte(pcr, LCTLR, pcr->aspm_en); + rtsx_pci_enable_aspm(pcr); mutex_unlock(&pcr->pcr_mutex); } @@ -968,6 +993,7 @@ static int rtsx_pci_init_hw(struct rtsx_pcr *pcr) { int err; + pcr->pcie_cap = pci_find_capability(pcr->pci, PCI_CAP_ID_EXP); rtsx_pci_writel(pcr, RTSX_HCBAR, pcr->host_cmds_addr); rtsx_pci_enable_bus_int(pcr); @@ -980,6 +1006,7 @@ static int rtsx_pci_init_hw(struct rtsx_pcr *pcr) /* Wait SSC power stable */ udelay(200); + rtsx_pci_disable_aspm(pcr); if (pcr->ops->optimize_phy) { err = pcr->ops->optimize_phy(pcr); if (err < 0) @@ -1028,10 +1055,8 @@ static int rtsx_pci_init_hw(struct rtsx_pcr *pcr) if (err < 0) return err; - rtsx_pci_write_config_byte(pcr, LCTLR, 0); - /* Enable clk_request_n to enable clock power management */ - rtsx_pci_write_config_byte(pcr, 0x81, 1); + rtsx_pci_write_config_byte(pcr, pcr->pcie_cap + PCI_EXP_LNKCTL + 1, 1); /* Enter L1 when host tx idle */ rtsx_pci_write_config_byte(pcr, 0x70F, 0x5B); @@ -1081,6 +1106,14 @@ static int rtsx_pci_init_chip(struct rtsx_pcr *pcr) rts5249_init_params(pcr); break; + case 0x524A: + rts524a_init_params(pcr); + break; + + case 0x525A: + rts525a_init_params(pcr); + break; + case 0x5287: rtl8411b_init_params(pcr); break; @@ -1090,7 +1123,7 @@ static int rtsx_pci_init_chip(struct rtsx_pcr *pcr) break; } - dev_dbg(&(pcr->pci->dev), "PID: 0x%04x, IC version: 0x%02x\n", + pcr_dbg(pcr, "PID: 0x%04x, IC version: 0x%02x\n", PCI_PID(pcr), pcr->ic_version); pcr->slots = kcalloc(pcr->num_slots, sizeof(struct rtsx_slot), @@ -1101,14 +1134,14 @@ static int rtsx_pci_init_chip(struct rtsx_pcr *pcr) if (pcr->ops->fetch_vendor_settings) pcr->ops->fetch_vendor_settings(pcr); - dev_dbg(&(pcr->pci->dev), "pcr->aspm_en = 0x%x\n", pcr->aspm_en); - dev_dbg(&(pcr->pci->dev), "pcr->sd30_drive_sel_1v8 = 0x%x\n", + pcr_dbg(pcr, "pcr->aspm_en = 0x%x\n", pcr->aspm_en); + pcr_dbg(pcr, "pcr->sd30_drive_sel_1v8 = 0x%x\n", pcr->sd30_drive_sel_1v8); - dev_dbg(&(pcr->pci->dev), "pcr->sd30_drive_sel_3v3 = 0x%x\n", + pcr_dbg(pcr, "pcr->sd30_drive_sel_3v3 = 0x%x\n", pcr->sd30_drive_sel_3v3); - dev_dbg(&(pcr->pci->dev), "pcr->card_drive_sel = 0x%x\n", + pcr_dbg(pcr, "pcr->card_drive_sel = 0x%x\n", pcr->card_drive_sel); - dev_dbg(&(pcr->pci->dev), "pcr->flags = 0x%x\n", pcr->flags); + pcr_dbg(pcr, "pcr->flags = 0x%x\n", pcr->flags); pcr->state = PDEV_STAT_IDLE; err = rtsx_pci_init_hw(pcr); @@ -1126,7 +1159,7 @@ static int rtsx_pci_probe(struct pci_dev *pcidev, struct rtsx_pcr *pcr; struct pcr_handle *handle; u32 base, len; - int ret, i; + int ret, i, bar = 0; dev_dbg(&(pcidev->dev), ": Realtek PCI-E Card Reader found at %s [%04x:%04x] (rev %x)\n", @@ -1171,8 +1204,10 @@ static int rtsx_pci_probe(struct pci_dev *pcidev, pcr->pci = pcidev; dev_set_drvdata(&pcidev->dev, handle); - len = pci_resource_len(pcidev, 0); - base = pci_resource_start(pcidev, 0); + if (CHK_PCI_PID(pcr, 0x525A)) + bar = 1; + len = pci_resource_len(pcidev, bar); + base = pci_resource_start(pcidev, bar); pcr->remap_addr = ioremap_nocache(base, len); if (!pcr->remap_addr) { ret = -ENOMEM; diff --git a/drivers/mfd/rtsx_pcr.h b/drivers/mfd/rtsx_pcr.h index fe2bbb67defc..ce48842570d7 100644 --- a/drivers/mfd/rtsx_pcr.h +++ b/drivers/mfd/rtsx_pcr.h @@ -27,12 +27,20 @@ #define MIN_DIV_N_PCR 80 #define MAX_DIV_N_PCR 208 +#define RTS524A_PME_FORCE_CTL 0xFF78 +#define RTS524A_PM_CTRL3 0xFF7E + +int __rtsx_pci_write_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 val); +int __rtsx_pci_read_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 *val); + void rts5209_init_params(struct rtsx_pcr *pcr); void rts5229_init_params(struct rtsx_pcr *pcr); void rtl8411_init_params(struct rtsx_pcr *pcr); void rtl8402_init_params(struct rtsx_pcr *pcr); void rts5227_init_params(struct rtsx_pcr *pcr); void rts5249_init_params(struct rtsx_pcr *pcr); +void rts524a_init_params(struct rtsx_pcr *pcr); +void rts525a_init_params(struct rtsx_pcr *pcr); void rtl8411b_init_params(struct rtsx_pcr *pcr); static inline u8 map_sd_drive(int idx) diff --git a/drivers/mfd/sec-core.c b/drivers/mfd/sec-core.c index 0a7bc43db4e4..4a69afb425ad 100644 --- a/drivers/mfd/sec-core.c +++ b/drivers/mfd/sec-core.c @@ -69,6 +69,8 @@ static const struct mfd_cell s2mps11_devs[] = { { .name = "s2mps11-pmic", }, { + .name = "s2mps14-rtc", + }, { .name = "s2mps11-clk", .of_compatible = "samsung,s2mps11-clk", } @@ -267,10 +269,8 @@ static struct sec_platform_data *sec_pmic_i2c_parse_dt_pdata( struct sec_platform_data *pd; pd = devm_kzalloc(dev, sizeof(*pd), GFP_KERNEL); - if (!pd) { - dev_err(dev, "could not allocate memory for pdata\n"); + if (!pd) return ERR_PTR(-ENOMEM); - } /* * ToDo: the 'wakeup' member in the platform data is more of a linux @@ -333,7 +333,6 @@ static int sec_pmic_probe(struct i2c_client *i2c, } if (pdata) { sec_pmic->device_type = pdata->device_type; - sec_pmic->ono = pdata->ono; sec_pmic->irq_base = pdata->irq_base; sec_pmic->wakeup = pdata->wakeup; sec_pmic->pdata = pdata; diff --git a/drivers/mfd/sec-irq.c b/drivers/mfd/sec-irq.c index ba86a918c2da..806fa8dbb22d 100644 --- a/drivers/mfd/sec-irq.c +++ b/drivers/mfd/sec-irq.c @@ -61,14 +61,14 @@ static const struct regmap_irq s2mps11_irqs[] = { .reg_offset = 1, .mask = S2MPS11_IRQ_RTC60S_MASK, }, - [S2MPS11_IRQ_RTCA0] = { - .reg_offset = 1, - .mask = S2MPS11_IRQ_RTCA0_MASK, - }, [S2MPS11_IRQ_RTCA1] = { .reg_offset = 1, .mask = S2MPS11_IRQ_RTCA1_MASK, }, + [S2MPS11_IRQ_RTCA0] = { + .reg_offset = 1, + .mask = S2MPS11_IRQ_RTCA0_MASK, + }, [S2MPS11_IRQ_SMPL] = { .reg_offset = 1, .mask = S2MPS11_IRQ_SMPL_MASK, @@ -484,6 +484,12 @@ int sec_irq_init(struct sec_pmic_dev *sec_pmic) return ret; } + /* + * The rtc-s5m driver requests S2MPS14_IRQ_RTCA0 also for S2MPS11 + * so the interrupt number must be consistent. + */ + BUILD_BUG_ON(((enum s2mps14_irq)S2MPS11_IRQ_RTCA0) != S2MPS14_IRQ_RTCA0); + return 0; } diff --git a/drivers/mfd/si476x-i2c.c b/drivers/mfd/si476x-i2c.c index 0e4a76daf187..e3deb466628b 100644 --- a/drivers/mfd/si476x-i2c.c +++ b/drivers/mfd/si476x-i2c.c @@ -766,7 +766,7 @@ static int si476x_core_probe(struct i2c_client *client, sizeof(struct v4l2_rds_data), GFP_KERNEL); if (rval) { - dev_err(&client->dev, "Could not alloate the FIFO\n"); + dev_err(&client->dev, "Could not allocate the FIFO\n"); goto free_gpio; } mutex_init(&core->rds_drainer_status_lock); @@ -777,7 +777,8 @@ static int si476x_core_probe(struct i2c_client *client, rval = devm_request_threaded_irq(&client->dev, client->irq, NULL, si476x_core_interrupt, - IRQF_TRIGGER_FALLING, + IRQF_TRIGGER_FALLING | + IRQF_ONESHOT, client->name, core); if (rval < 0) { dev_err(&client->dev, "Could not request IRQ %d\n", diff --git a/drivers/mfd/sky81452.c b/drivers/mfd/sky81452.c new file mode 100644 index 000000000000..b0c9b0415650 --- /dev/null +++ b/drivers/mfd/sky81452.c @@ -0,0 +1,108 @@ +/* + * sky81452.c SKY81452 MFD driver + * + * Copyright 2014 Skyworks Solutions Inc. + * Author : Gyungoh Yoo <jack.yoo@skyworksinc.com> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, see <http://www.gnu.org/licenses/>. + */ + +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/init.h> +#include <linux/err.h> +#include <linux/slab.h> +#include <linux/i2c.h> +#include <linux/regmap.h> +#include <linux/mfd/core.h> +#include <linux/mfd/sky81452.h> + +static const struct regmap_config sky81452_config = { + .reg_bits = 8, + .val_bits = 8, +}; + +static int sky81452_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct device *dev = &client->dev; + const struct sky81452_platform_data *pdata = dev_get_platdata(dev); + struct mfd_cell cells[2]; + struct regmap *regmap; + int ret; + + if (!pdata) { + pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); + if (!pdata) + return -ENOMEM; + } + + regmap = devm_regmap_init_i2c(client, &sky81452_config); + if (IS_ERR(regmap)) { + dev_err(dev, "failed to initialize.err=%ld\n", PTR_ERR(regmap)); + return PTR_ERR(regmap); + } + + i2c_set_clientdata(client, regmap); + + memset(cells, 0, sizeof(cells)); + cells[0].name = "sky81452-backlight"; + cells[0].of_compatible = "skyworks,sky81452-backlight"; + cells[0].platform_data = pdata->bl_pdata; + cells[0].pdata_size = sizeof(*pdata->bl_pdata); + cells[1].name = "sky81452-regulator"; + cells[1].platform_data = pdata->regulator_init_data; + cells[1].pdata_size = sizeof(*pdata->regulator_init_data); + + ret = mfd_add_devices(dev, -1, cells, ARRAY_SIZE(cells), NULL, 0, NULL); + if (ret) + dev_err(dev, "failed to add child devices. err=%d\n", ret); + + return ret; +} + +static int sky81452_remove(struct i2c_client *client) +{ + mfd_remove_devices(&client->dev); + return 0; +} + +static const struct i2c_device_id sky81452_ids[] = { + { "sky81452" }, + { } +}; +MODULE_DEVICE_TABLE(i2c, sky81452_ids); + +#ifdef CONFIG_OF +static const struct of_device_id sky81452_of_match[] = { + { .compatible = "skyworks,sky81452", }, + { } +}; +MODULE_DEVICE_TABLE(of, sky81452_of_match); +#endif + +static struct i2c_driver sky81452_driver = { + .driver = { + .name = "sky81452", + .of_match_table = of_match_ptr(sky81452_of_match), + }, + .probe = sky81452_probe, + .remove = sky81452_remove, + .id_table = sky81452_ids, +}; + +module_i2c_driver(sky81452_driver); + +MODULE_DESCRIPTION("Skyworks SKY81452 MFD driver"); +MODULE_AUTHOR("Gyungoh Yoo <jack.yoo@skyworksinc.com>"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/mfd/stmpe-i2c.c b/drivers/mfd/stmpe-i2c.c index 5c054031c3f8..e14c8c9d189b 100644 --- a/drivers/mfd/stmpe-i2c.c +++ b/drivers/mfd/stmpe-i2c.c @@ -6,7 +6,7 @@ * * License Terms: GNU General Public License, version 2 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson - * Author: Viresh Kumar <viresh.linux@gmail.com> for ST Microelectronics + * Author: Viresh Kumar <vireshk@kernel.org> for ST Microelectronics */ #include <linux/i2c.h> diff --git a/drivers/mfd/stmpe-spi.c b/drivers/mfd/stmpe-spi.c index a81badbaa917..6fdb30e84a2b 100644 --- a/drivers/mfd/stmpe-spi.c +++ b/drivers/mfd/stmpe-spi.c @@ -4,7 +4,7 @@ * Copyright (C) ST Microelectronics SA 2011 * * License Terms: GNU General Public License, version 2 - * Author: Viresh Kumar <viresh.linux@gmail.com> for ST Microelectronics + * Author: Viresh Kumar <vireshk@kernel.org> for ST Microelectronics */ #include <linux/spi/spi.h> @@ -146,4 +146,4 @@ module_exit(stmpe_exit); MODULE_LICENSE("GPL v2"); MODULE_DESCRIPTION("STMPE MFD SPI Interface Driver"); -MODULE_AUTHOR("Viresh Kumar <viresh.linux@gmail.com>"); +MODULE_AUTHOR("Viresh Kumar <vireshk@kernel.org>"); diff --git a/drivers/mfd/stmpe.c b/drivers/mfd/stmpe.c index 2d7fae94c861..18c4d72d1d2a 100644 --- a/drivers/mfd/stmpe.c +++ b/drivers/mfd/stmpe.c @@ -989,7 +989,7 @@ static void stmpe_irq_unmap(struct irq_domain *d, unsigned int virq) irq_set_chip_data(virq, NULL); } -static struct irq_domain_ops stmpe_irq_ops = { +static const struct irq_domain_ops stmpe_irq_ops = { .map = stmpe_irq_map, .unmap = stmpe_irq_unmap, .xlate = irq_domain_xlate_twocell, diff --git a/drivers/mfd/tc3589x.c b/drivers/mfd/tc3589x.c index cf356395c9e9..96d420dfc15d 100644 --- a/drivers/mfd/tc3589x.c +++ b/drivers/mfd/tc3589x.c @@ -233,7 +233,7 @@ static void tc3589x_irq_unmap(struct irq_domain *d, unsigned int virq) irq_set_chip_data(virq, NULL); } -static struct irq_domain_ops tc3589x_irq_ops = { +static const struct irq_domain_ops tc3589x_irq_ops = { .map = tc3589x_irq_map, .unmap = tc3589x_irq_unmap, .xlate = irq_domain_xlate_onecell, diff --git a/drivers/mfd/ti_am335x_tscadc.c b/drivers/mfd/ti_am335x_tscadc.c index 467c80e1c4ae..e4e4b22eebc9 100644 --- a/drivers/mfd/ti_am335x_tscadc.c +++ b/drivers/mfd/ti_am335x_tscadc.c @@ -68,12 +68,6 @@ static void am335x_tscadc_need_adc(struct ti_tscadc_dev *tsadc) DEFINE_WAIT(wait); u32 reg; - /* - * disable TSC steps so it does not run while the ADC is using it. If - * write 0 while it is running (it just started or was already running) - * then it completes all steps that were enabled and stops then. - */ - tscadc_writel(tsadc, REG_SE, 0); reg = tscadc_readl(tsadc, REG_ADCFSM); if (reg & SEQ_STATUS) { tsadc->adc_waiting = true; @@ -86,8 +80,12 @@ static void am335x_tscadc_need_adc(struct ti_tscadc_dev *tsadc) spin_lock_irq(&tsadc->reg_lock); finish_wait(&tsadc->reg_se_wait, &wait); + /* + * Sequencer should either be idle or + * busy applying the charge step. + */ reg = tscadc_readl(tsadc, REG_ADCFSM); - WARN_ON(reg & SEQ_STATUS); + WARN_ON((reg & SEQ_STATUS) && !(reg & CHARGE_STEP)); tsadc->adc_waiting = false; } tsadc->adc_in_use = true; @@ -96,7 +94,6 @@ static void am335x_tscadc_need_adc(struct ti_tscadc_dev *tsadc) void am335x_tsc_se_set_once(struct ti_tscadc_dev *tsadc, u32 val) { spin_lock_irq(&tsadc->reg_lock); - tsadc->reg_se_cache |= val; am335x_tscadc_need_adc(tsadc); tscadc_writel(tsadc, REG_SE, val); diff --git a/drivers/mfd/tps65010.c b/drivers/mfd/tps65010.c index 743fb524fc8a..448f0a182dc4 100644 --- a/drivers/mfd/tps65010.c +++ b/drivers/mfd/tps65010.c @@ -515,7 +515,7 @@ static int tps65010_gpio_get(struct gpio_chip *chip, unsigned offset) static struct tps65010 *the_tps; -static int __exit tps65010_remove(struct i2c_client *client) +static int tps65010_remove(struct i2c_client *client) { struct tps65010 *tps = i2c_get_clientdata(client); struct tps65010_board *board = dev_get_platdata(&client->dev); @@ -684,7 +684,7 @@ static struct i2c_driver tps65010_driver = { .name = "tps65010", }, .probe = tps65010_probe, - .remove = __exit_p(tps65010_remove), + .remove = tps65010_remove, .id_table = tps65010_id, }; diff --git a/drivers/mfd/tps6586x.c b/drivers/mfd/tps6586x.c index 8e1dbc469580..e0a2583916ce 100644 --- a/drivers/mfd/tps6586x.c +++ b/drivers/mfd/tps6586x.c @@ -311,7 +311,7 @@ static int tps6586x_irq_map(struct irq_domain *h, unsigned int virq, return 0; } -static struct irq_domain_ops tps6586x_domain_ops = { +static const struct irq_domain_ops tps6586x_domain_ops = { .map = tps6586x_irq_map, .xlate = irq_domain_xlate_twocell, }; diff --git a/drivers/mfd/twl4030-irq.c b/drivers/mfd/twl4030-irq.c index 1b772ef761cb..a3fa7f4f1fb4 100644 --- a/drivers/mfd/twl4030-irq.c +++ b/drivers/mfd/twl4030-irq.c @@ -674,7 +674,7 @@ int twl4030_sih_setup(struct device *dev, int module, int irq_base) irq_set_handler_data(irq, agent); agent->irq_name = kasprintf(GFP_KERNEL, "twl4030_%s", sih->name); status = request_threaded_irq(irq, NULL, handle_twl4030_sih, - IRQF_EARLY_RESUME, + IRQF_EARLY_RESUME | IRQF_ONESHOT, agent->irq_name ?: sih->name, NULL); dev_info(dev, "%s (irq %d) chaining IRQs %d..%d\n", sih->name, diff --git a/drivers/mfd/twl4030-power.c b/drivers/mfd/twl4030-power.c index 393509246037..04b539850e72 100644 --- a/drivers/mfd/twl4030-power.c +++ b/drivers/mfd/twl4030-power.c @@ -264,7 +264,9 @@ out: return err; } -static int twl4030_config_wakeup12_sequence(u8 address) +static int +twl4030_config_wakeup12_sequence(const struct twl4030_power_data *pdata, + u8 address) { int err = 0; u8 data; @@ -293,13 +295,14 @@ static int twl4030_config_wakeup12_sequence(u8 address) if (err) goto out; - if (machine_is_omap_3430sdp() || machine_is_omap_ldp()) { + if (pdata->ac_charger_quirk || machine_is_omap_3430sdp() || + machine_is_omap_ldp()) { /* Disabling AC charger effect on sleep-active transitions */ err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &data, R_CFG_P1_TRANSITION); if (err) goto out; - data &= ~(1<<1); + data &= ~STARTON_CHG; err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, data, R_CFG_P1_TRANSITION); if (err) @@ -459,8 +462,9 @@ static int twl4030_configure_resource(struct twl4030_resconfig *rconfig) return 0; } -static int load_twl4030_script(struct twl4030_script *tscript, - u8 address) +static int load_twl4030_script(const struct twl4030_power_data *pdata, + struct twl4030_script *tscript, + u8 address) { int err; static int order; @@ -487,7 +491,7 @@ static int load_twl4030_script(struct twl4030_script *tscript, if (err) goto out; - err = twl4030_config_wakeup12_sequence(address); + err = twl4030_config_wakeup12_sequence(pdata, address); if (err) goto out; order = 1; @@ -567,7 +571,7 @@ twl4030_power_configure_scripts(const struct twl4030_power_data *pdata) u8 address = twl4030_start_script_address; for (i = 0; i < pdata->num; i++) { - err = load_twl4030_script(pdata->scripts[i], address); + err = load_twl4030_script(pdata, pdata->scripts[i], address); if (err) return err; address += pdata->scripts[i]->size; @@ -829,7 +833,22 @@ static struct twl4030_power_data osc_off_idle = { .board_config = osc_off_rconfig, }; -static struct of_device_id twl4030_power_of_match[] = { +static struct twl4030_power_data omap3_idle_ac_quirk = { + .scripts = omap3_idle_scripts, + .num = ARRAY_SIZE(omap3_idle_scripts), + .resource_config = omap3_idle_rconfig, + .ac_charger_quirk = true, +}; + +static struct twl4030_power_data omap3_idle_ac_quirk_osc_off = { + .scripts = omap3_idle_scripts, + .num = ARRAY_SIZE(omap3_idle_scripts), + .resource_config = omap3_idle_rconfig, + .board_config = osc_off_rconfig, + .ac_charger_quirk = true, +}; + +static const struct of_device_id twl4030_power_of_match[] = { { .compatible = "ti,twl4030-power", }, @@ -845,6 +864,18 @@ static struct of_device_id twl4030_power_of_match[] = { .compatible = "ti,twl4030-power-idle-osc-off", .data = &osc_off_idle, }, + { + .compatible = "ti,twl4030-power-omap3-sdp", + .data = &omap3_idle_ac_quirk, + }, + { + .compatible = "ti,twl4030-power-omap3-ldp", + .data = &omap3_idle_ac_quirk_osc_off, + }, + { + .compatible = "ti,twl4030-power-omap3-evm", + .data = &omap3_idle_ac_quirk, + }, { }, }; MODULE_DEVICE_TABLE(of, twl4030_power_of_match); diff --git a/drivers/mfd/twl6030-irq.c b/drivers/mfd/twl6030-irq.c index 2807e1a95663..20fb58179ada 100644 --- a/drivers/mfd/twl6030-irq.c +++ b/drivers/mfd/twl6030-irq.c @@ -376,7 +376,7 @@ static void twl6030_irq_unmap(struct irq_domain *d, unsigned int virq) irq_set_chip_data(virq, NULL); } -static struct irq_domain_ops twl6030_irq_domain_ops = { +static const struct irq_domain_ops twl6030_irq_domain_ops = { .map = twl6030_irq_map, .unmap = twl6030_irq_unmap, .xlate = irq_domain_xlate_onetwocell, diff --git a/drivers/mfd/twl6040.c b/drivers/mfd/twl6040.c index f71ee3dbc2a2..c5265c1262c5 100644 --- a/drivers/mfd/twl6040.c +++ b/drivers/mfd/twl6040.c @@ -814,4 +814,3 @@ MODULE_DESCRIPTION("TWL6040 MFD"); MODULE_AUTHOR("Misael Lopez Cruz <misael.lopez@ti.com>"); MODULE_AUTHOR("Jorge Eduardo Candelaria <jorge.candelaria@ti.com>"); MODULE_LICENSE("GPL"); -MODULE_ALIAS("platform:twl6040"); diff --git a/drivers/mfd/ucb1x00-core.c b/drivers/mfd/ucb1x00-core.c index 58ea9fdd3a15..3591550598ad 100644 --- a/drivers/mfd/ucb1x00-core.c +++ b/drivers/mfd/ucb1x00-core.c @@ -566,8 +566,7 @@ static int ucb1x00_probe(struct mcp *mcp) } irq_set_irq_type(ucb->irq, IRQ_TYPE_EDGE_RISING); - irq_set_handler_data(ucb->irq, ucb); - irq_set_chained_handler(ucb->irq, ucb1x00_irq); + irq_set_chained_handler_and_data(ucb->irq, ucb1x00_irq, ucb); if (pdata && pdata->gpio_base) { ucb->gpio.label = dev_name(&ucb->dev); diff --git a/drivers/mfd/vexpress-sysreg.c b/drivers/mfd/vexpress-sysreg.c index 8f43ab8fd2d6..3e628df9280c 100644 --- a/drivers/mfd/vexpress-sysreg.c +++ b/drivers/mfd/vexpress-sysreg.c @@ -47,71 +47,26 @@ #define SYS_HBI_MASK 0xfff #define SYS_PROCIDx_HBI_SHIFT 0 -#define SYS_MCI_CARDIN (1 << 0) -#define SYS_MCI_WPROT (1 << 1) - #define SYS_MISC_MASTERSITE (1 << 14) - -static void __iomem *__vexpress_sysreg_base; - -static void __iomem *vexpress_sysreg_base(void) +void vexpress_flags_set(u32 data) { - if (!__vexpress_sysreg_base) { + static void __iomem *base; + + if (!base) { struct device_node *node = of_find_compatible_node(NULL, NULL, "arm,vexpress-sysreg"); - __vexpress_sysreg_base = of_iomap(node, 0); + base = of_iomap(node, 0); } - WARN_ON(!__vexpress_sysreg_base); - - return __vexpress_sysreg_base; -} - - -static int vexpress_sysreg_get_master(void) -{ - if (readl(vexpress_sysreg_base() + SYS_MISC) & SYS_MISC_MASTERSITE) - return VEXPRESS_SITE_DB2; - - return VEXPRESS_SITE_DB1; -} - -void vexpress_flags_set(u32 data) -{ - writel(~0, vexpress_sysreg_base() + SYS_FLAGSCLR); - writel(data, vexpress_sysreg_base() + SYS_FLAGSSET); -} - -unsigned int vexpress_get_mci_cardin(struct device *dev) -{ - return readl(vexpress_sysreg_base() + SYS_MCI) & SYS_MCI_CARDIN; -} - -u32 vexpress_get_procid(int site) -{ - if (site == VEXPRESS_SITE_MASTER) - site = vexpress_sysreg_get_master(); + if (WARN_ON(!base)) + return; - return readl(vexpress_sysreg_base() + (site == VEXPRESS_SITE_DB1 ? - SYS_PROCID0 : SYS_PROCID1)); + writel(~0, base + SYS_FLAGSCLR); + writel(data, base + SYS_FLAGSSET); } -void __iomem *vexpress_get_24mhz_clock_base(void) -{ - return vexpress_sysreg_base() + SYS_24MHZ; -} - - -void __init vexpress_sysreg_early_init(void __iomem *base) -{ - __vexpress_sysreg_base = base; - - vexpress_config_set_master(vexpress_sysreg_get_master()); -} - - /* The sysreg block is just a random collection of various functions... */ static struct syscon_platform_data vexpress_sysreg_sys_id_pdata = { @@ -210,6 +165,7 @@ static int vexpress_sysreg_probe(struct platform_device *pdev) struct resource *mem; void __iomem *base; struct bgpio_chip *mmc_gpio_chip; + int master; u32 dt_hbi; mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); @@ -220,11 +176,14 @@ static int vexpress_sysreg_probe(struct platform_device *pdev) if (!base) return -ENOMEM; - vexpress_config_set_master(vexpress_sysreg_get_master()); + master = readl(base + SYS_MISC) & SYS_MISC_MASTERSITE ? + VEXPRESS_SITE_DB2 : VEXPRESS_SITE_DB1; + vexpress_config_set_master(master); /* Confirm board type against DT property, if available */ if (of_property_read_u32(of_root, "arm,hbi", &dt_hbi) == 0) { - u32 id = vexpress_get_procid(VEXPRESS_SITE_MASTER); + u32 id = readl(base + (master == VEXPRESS_SITE_DB1 ? + SYS_PROCID0 : SYS_PROCID1)); u32 hbi = (id >> SYS_PROCIDx_HBI_SHIFT) & SYS_HBI_MASK; if (WARN_ON(dt_hbi != hbi)) diff --git a/drivers/mfd/wm5102-tables.c b/drivers/mfd/wm5102-tables.c index b326a82017ee..aeae6ec123b3 100644 --- a/drivers/mfd/wm5102-tables.c +++ b/drivers/mfd/wm5102-tables.c @@ -1172,9 +1172,6 @@ static bool wm5102_readable_register(struct device *dev, unsigned int reg) case ARIZONA_DAC_DIGITAL_VOLUME_3L: case ARIZONA_DAC_VOLUME_LIMIT_3L: case ARIZONA_NOISE_GATE_SELECT_3L: - case ARIZONA_OUTPUT_PATH_CONFIG_3R: - case ARIZONA_DAC_DIGITAL_VOLUME_3R: - case ARIZONA_DAC_VOLUME_LIMIT_3R: case ARIZONA_OUTPUT_PATH_CONFIG_4L: case ARIZONA_DAC_DIGITAL_VOLUME_4L: case ARIZONA_OUT_VOLUME_4L: diff --git a/drivers/mfd/wm831x-auxadc.c b/drivers/mfd/wm831x-auxadc.c index 6ee3018d8653..fd789d2eb0f5 100644 --- a/drivers/mfd/wm831x-auxadc.c +++ b/drivers/mfd/wm831x-auxadc.c @@ -285,7 +285,8 @@ void wm831x_auxadc_init(struct wm831x *wm831x) ret = request_threaded_irq(wm831x_irq(wm831x, WM831X_IRQ_AUXADC_DATA), - NULL, wm831x_auxadc_irq, 0, + NULL, wm831x_auxadc_irq, + IRQF_ONESHOT, "auxadc", wm831x); if (ret < 0) { dev_err(wm831x->dev, "AUXADC IRQ request failed: %d\n", diff --git a/drivers/mfd/wm831x-irq.c b/drivers/mfd/wm831x-irq.c index 64e512eadf17..3da81263c764 100644 --- a/drivers/mfd/wm831x-irq.c +++ b/drivers/mfd/wm831x-irq.c @@ -564,7 +564,7 @@ static int wm831x_irq_map(struct irq_domain *h, unsigned int virq, return 0; } -static struct irq_domain_ops wm831x_irq_domain_ops = { +static const struct irq_domain_ops wm831x_irq_domain_ops = { .map = wm831x_irq_map, .xlate = irq_domain_xlate_twocell, }; diff --git a/drivers/mfd/wm8350-core.c b/drivers/mfd/wm8350-core.c index f5124a8acad8..8a07c5634aee 100644 --- a/drivers/mfd/wm8350-core.c +++ b/drivers/mfd/wm8350-core.c @@ -404,7 +404,8 @@ int wm8350_device_init(struct wm8350 *wm8350, int irq, if (wm8350->irq_base) { ret = request_threaded_irq(wm8350->irq_base + WM8350_IRQ_AUXADC_DATARDY, - NULL, wm8350_auxadc_irq, 0, + NULL, wm8350_auxadc_irq, + IRQF_ONESHOT, "auxadc", wm8350); if (ret < 0) dev_warn(wm8350->dev, diff --git a/drivers/mfd/wm8994-irq.c b/drivers/mfd/wm8994-irq.c index a14407edbd89..55c380a67686 100644 --- a/drivers/mfd/wm8994-irq.c +++ b/drivers/mfd/wm8994-irq.c @@ -28,7 +28,7 @@ #include <linux/delay.h> -static struct regmap_irq wm8994_irqs[] = { +static const struct regmap_irq wm8994_irqs[] = { [WM8994_IRQ_TEMP_SHUT] = { .reg_offset = 1, .mask = WM8994_TEMP_SHUT_EINT, @@ -128,7 +128,7 @@ static struct regmap_irq wm8994_irqs[] = { }, }; -static struct regmap_irq_chip wm8994_irq_chip = { +static const struct regmap_irq_chip wm8994_irq_chip = { .name = "wm8994", .irqs = wm8994_irqs, .num_irqs = ARRAY_SIZE(wm8994_irqs), @@ -184,7 +184,7 @@ static int wm8994_edge_irq_map(struct irq_domain *h, unsigned int virq, return 0; } -static struct irq_domain_ops wm8994_edge_irq_ops = { +static const struct irq_domain_ops wm8994_edge_irq_ops = { .map = wm8994_edge_irq_map, .xlate = irq_domain_xlate_twocell, }; |