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-rw-r--r--drivers/memory/brcmstb_dpfe.c2
-rw-r--r--drivers/memory/fsl_ifc.c9
-rw-r--r--drivers/memory/mtk-smi.c3
-rw-r--r--drivers/memory/of_memory.c29
4 files changed, 30 insertions, 13 deletions
diff --git a/drivers/memory/brcmstb_dpfe.c b/drivers/memory/brcmstb_dpfe.c
index f43ba69fbb3e..14412002775d 100644
--- a/drivers/memory/brcmstb_dpfe.c
+++ b/drivers/memory/brcmstb_dpfe.c
@@ -424,7 +424,7 @@ static void __finalize_command(struct brcmstb_dpfe_priv *priv)
/*
* It depends on the API version which MBOX register we have to write to
- * to signal we are done.
+ * signal we are done.
*/
release_mbox = (priv->dpfe_api->version < 2)
? REG_TO_HOST_MBOX : REG_TO_DCPU_MBOX;
diff --git a/drivers/memory/fsl_ifc.c b/drivers/memory/fsl_ifc.c
index 75a8c38df939..2f6939da21cd 100644
--- a/drivers/memory/fsl_ifc.c
+++ b/drivers/memory/fsl_ifc.c
@@ -88,6 +88,7 @@ static int fsl_ifc_ctrl_remove(struct platform_device *dev)
{
struct fsl_ifc_ctrl *ctrl = dev_get_drvdata(&dev->dev);
+ of_platform_depopulate(&dev->dev);
free_irq(ctrl->nand_irq, ctrl);
free_irq(ctrl->irq, ctrl);
@@ -285,8 +286,16 @@ static int fsl_ifc_ctrl_probe(struct platform_device *dev)
}
}
+ /* legacy dts may still use "simple-bus" compatible */
+ ret = of_platform_populate(dev->dev.of_node, NULL, NULL,
+ &dev->dev);
+ if (ret)
+ goto err_free_nandirq;
+
return 0;
+err_free_nandirq:
+ free_irq(fsl_ifc_ctrl_dev->nand_irq, fsl_ifc_ctrl_dev);
err_free_irq:
free_irq(fsl_ifc_ctrl_dev->irq, fsl_ifc_ctrl_dev);
err_unmap_nandirq:
diff --git a/drivers/memory/mtk-smi.c b/drivers/memory/mtk-smi.c
index 903c2202c3b7..7d8a083df44a 100644
--- a/drivers/memory/mtk-smi.c
+++ b/drivers/memory/mtk-smi.c
@@ -100,8 +100,6 @@ enum mtk_smi_type {
MTK_SMI_GEN2_SUB_COMM, /* gen2 smi sub common */
};
-#define MTK_SMI_CLK_NR_MAX 4
-
/* larbs: Require apb/smi clocks while gals is optional. */
static const char * const mtk_smi_larb_clks[] = {"apb", "smi", "gals"};
#define MTK_SMI_LARB_REQ_CLK_NR 2
@@ -112,6 +110,7 @@ static const char * const mtk_smi_larb_clks[] = {"apb", "smi", "gals"};
* sub common: Require apb/smi/gals0 clocks in has_gals case. Otherwise, only apb/smi are required.
*/
static const char * const mtk_smi_common_clks[] = {"apb", "smi", "gals0", "gals1"};
+#define MTK_SMI_CLK_NR_MAX ARRAY_SIZE(mtk_smi_common_clks)
#define MTK_SMI_COM_REQ_CLK_NR 2
#define MTK_SMI_COM_GALS_REQ_CLK_NR MTK_SMI_CLK_NR_MAX
#define MTK_SMI_SUB_COM_GALS_REQ_CLK_NR 3
diff --git a/drivers/memory/of_memory.c b/drivers/memory/of_memory.c
index b94408954d85..dbdf87bc0b78 100644
--- a/drivers/memory/of_memory.c
+++ b/drivers/memory/of_memory.c
@@ -212,8 +212,10 @@ static int of_lpddr3_do_get_timings(struct device_node *np,
{
int ret;
- /* The 'reg' param required since DT has changed, used as 'max-freq' */
- ret = of_property_read_u32(np, "reg", &tim->max_freq);
+ ret = of_property_read_u32(np, "max-freq", &tim->max_freq);
+ if (ret)
+ /* Deprecated way of passing max-freq as 'reg' */
+ ret = of_property_read_u32(np, "reg", &tim->max_freq);
ret |= of_property_read_u32(np, "min-freq", &tim->min_freq);
ret |= of_property_read_u32(np, "tRFC", &tim->tRFC);
ret |= of_property_read_u32(np, "tRRD", &tim->tRRD);
@@ -316,14 +318,21 @@ const struct lpddr2_info
struct property *prop;
const char *cp;
int err;
-
- err = of_property_read_u32(np, "revision-id1", &info.revision_id1);
- if (err)
- info.revision_id1 = -ENOENT;
-
- err = of_property_read_u32(np, "revision-id2", &info.revision_id2);
- if (err)
- info.revision_id2 = -ENOENT;
+ u32 revision_id[2];
+
+ err = of_property_read_u32_array(np, "revision-id", revision_id, 2);
+ if (!err) {
+ info.revision_id1 = revision_id[0];
+ info.revision_id2 = revision_id[1];
+ } else {
+ err = of_property_read_u32(np, "revision-id1", &info.revision_id1);
+ if (err)
+ info.revision_id1 = -ENOENT;
+
+ err = of_property_read_u32(np, "revision-id2", &info.revision_id2);
+ if (err)
+ info.revision_id2 = -ENOENT;
+ }
err = of_property_read_u32(np, "io-width", &info.io_width);
if (err)