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path: root/drivers/media/i2c/imx290.c
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Diffstat (limited to 'drivers/media/i2c/imx290.c')
-rw-r--r--drivers/media/i2c/imx290.c404
1 files changed, 343 insertions, 61 deletions
diff --git a/drivers/media/i2c/imx290.c b/drivers/media/i2c/imx290.c
index f7678e5a5d87..adcddf3204f7 100644
--- a/drivers/media/i2c/imx290.c
+++ b/drivers/media/i2c/imx290.c
@@ -25,9 +25,19 @@
#define IMX290_STANDBY 0x3000
#define IMX290_REGHOLD 0x3001
#define IMX290_XMSTA 0x3002
+#define IMX290_FR_FDG_SEL 0x3009
+#define IMX290_BLKLEVEL_LOW 0x300a
+#define IMX290_BLKLEVEL_HIGH 0x300b
#define IMX290_GAIN 0x3014
+#define IMX290_HMAX_LOW 0x301c
+#define IMX290_HMAX_HIGH 0x301d
+#define IMX290_PGCTRL 0x308c
+#define IMX290_PHY_LANE_NUM 0x3407
+#define IMX290_CSI_LANE_MODE 0x3443
-#define IMX290_DEFAULT_LINK_FREQ 445500000
+#define IMX290_PGCTRL_REGEN BIT(0)
+#define IMX290_PGCTRL_THRU BIT(1)
+#define IMX290_PGCTRL_MODE(n) ((n) << 4)
static const char * const imx290_supply_name[] = {
"vdda",
@@ -45,8 +55,8 @@ struct imx290_regval {
struct imx290_mode {
u32 width;
u32 height;
- u32 pixel_rate;
- u32 link_freq_index;
+ u32 hmax;
+ u8 link_freq_index;
const struct imx290_regval *data;
u32 data_size;
@@ -56,9 +66,10 @@ struct imx290 {
struct device *dev;
struct clk *xclk;
struct regmap *regmap;
+ u8 nlanes;
+ u8 bpp;
struct v4l2_subdev sd;
- struct v4l2_fwnode_endpoint ep;
struct media_pad pad;
struct v4l2_mbus_framefmt current_format;
const struct imx290_mode *current_mode;
@@ -75,10 +86,12 @@ struct imx290 {
struct imx290_pixfmt {
u32 code;
+ u8 bpp;
};
static const struct imx290_pixfmt imx290_formats[] = {
- { MEDIA_BUS_FMT_SRGGB10_1X10 },
+ { MEDIA_BUS_FMT_SRGGB10_1X10, 10 },
+ { MEDIA_BUS_FMT_SRGGB12_1X12, 12 },
};
static const struct regmap_config imx290_regmap_config = {
@@ -87,16 +100,24 @@ static const struct regmap_config imx290_regmap_config = {
.cache_type = REGCACHE_RBTREE,
};
+static const char * const imx290_test_pattern_menu[] = {
+ "Disabled",
+ "Sequence Pattern 1",
+ "Horizontal Color-bar Chart",
+ "Vertical Color-bar Chart",
+ "Sequence Pattern 2",
+ "Gradation Pattern 1",
+ "Gradation Pattern 2",
+ "000/555h Toggle Pattern",
+};
+
static const struct imx290_regval imx290_global_init_settings[] = {
{ 0x3007, 0x00 },
- { 0x3009, 0x00 },
{ 0x3018, 0x65 },
{ 0x3019, 0x04 },
{ 0x301a, 0x00 },
- { 0x3443, 0x03 },
{ 0x3444, 0x20 },
{ 0x3445, 0x25 },
- { 0x3407, 0x03 },
{ 0x303a, 0x0c },
{ 0x3040, 0x00 },
{ 0x3041, 0x00 },
@@ -169,7 +190,6 @@ static const struct imx290_regval imx290_1080p_settings[] = {
{ 0x3164, 0x1a },
{ 0x3480, 0x49 },
/* data rate settings */
- { 0x3009, 0x01 },
{ 0x3405, 0x10 },
{ 0x3446, 0x57 },
{ 0x3447, 0x00 },
@@ -187,8 +207,6 @@ static const struct imx290_regval imx290_1080p_settings[] = {
{ 0x3453, 0x00 },
{ 0x3454, 0x17 },
{ 0x3455, 0x00 },
- { 0x301c, 0x98 },
- { 0x301d, 0x08 },
};
static const struct imx290_regval imx290_720p_settings[] = {
@@ -210,7 +228,6 @@ static const struct imx290_regval imx290_720p_settings[] = {
{ 0x3164, 0x1a },
{ 0x3480, 0x49 },
/* data rate settings */
- { 0x3009, 0x01 },
{ 0x3405, 0x10 },
{ 0x3446, 0x4f },
{ 0x3447, 0x00 },
@@ -228,8 +245,6 @@ static const struct imx290_regval imx290_720p_settings[] = {
{ 0x3453, 0x00 },
{ 0x3454, 0x17 },
{ 0x3455, 0x00 },
- { 0x301c, 0xe4 },
- { 0x301d, 0x0c },
};
static const struct imx290_regval imx290_10bit_settings[] = {
@@ -244,31 +259,105 @@ static const struct imx290_regval imx290_10bit_settings[] = {
{ 0x300b, 0x00},
};
+static const struct imx290_regval imx290_12bit_settings[] = {
+ { 0x3005, 0x01 },
+ { 0x3046, 0x01 },
+ { 0x3129, 0x00 },
+ { 0x317c, 0x00 },
+ { 0x31ec, 0x0e },
+ { 0x3441, 0x0c },
+ { 0x3442, 0x0c },
+ { 0x300a, 0xf0 },
+ { 0x300b, 0x00 },
+};
+
/* supported link frequencies */
-static const s64 imx290_link_freq[] = {
- IMX290_DEFAULT_LINK_FREQ,
+#define FREQ_INDEX_1080P 0
+#define FREQ_INDEX_720P 1
+static const s64 imx290_link_freq_2lanes[] = {
+ [FREQ_INDEX_1080P] = 445500000,
+ [FREQ_INDEX_720P] = 297000000,
};
+static const s64 imx290_link_freq_4lanes[] = {
+ [FREQ_INDEX_1080P] = 222750000,
+ [FREQ_INDEX_720P] = 148500000,
+};
+
+/*
+ * In this function and in the similar ones below We rely on imx290_probe()
+ * to ensure that nlanes is either 2 or 4.
+ */
+static inline const s64 *imx290_link_freqs_ptr(const struct imx290 *imx290)
+{
+ if (imx290->nlanes == 2)
+ return imx290_link_freq_2lanes;
+ else
+ return imx290_link_freq_4lanes;
+}
+
+static inline int imx290_link_freqs_num(const struct imx290 *imx290)
+{
+ if (imx290->nlanes == 2)
+ return ARRAY_SIZE(imx290_link_freq_2lanes);
+ else
+ return ARRAY_SIZE(imx290_link_freq_4lanes);
+}
/* Mode configs */
-static const struct imx290_mode imx290_modes[] = {
+static const struct imx290_mode imx290_modes_2lanes[] = {
+ {
+ .width = 1920,
+ .height = 1080,
+ .hmax = 0x1130,
+ .link_freq_index = FREQ_INDEX_1080P,
+ .data = imx290_1080p_settings,
+ .data_size = ARRAY_SIZE(imx290_1080p_settings),
+ },
+ {
+ .width = 1280,
+ .height = 720,
+ .hmax = 0x19c8,
+ .link_freq_index = FREQ_INDEX_720P,
+ .data = imx290_720p_settings,
+ .data_size = ARRAY_SIZE(imx290_720p_settings),
+ },
+};
+
+static const struct imx290_mode imx290_modes_4lanes[] = {
{
.width = 1920,
.height = 1080,
+ .hmax = 0x0898,
+ .link_freq_index = FREQ_INDEX_1080P,
.data = imx290_1080p_settings,
.data_size = ARRAY_SIZE(imx290_1080p_settings),
- .pixel_rate = 178200000,
- .link_freq_index = 0,
},
{
.width = 1280,
.height = 720,
+ .hmax = 0x0ce4,
+ .link_freq_index = FREQ_INDEX_720P,
.data = imx290_720p_settings,
.data_size = ARRAY_SIZE(imx290_720p_settings),
- .pixel_rate = 178200000,
- .link_freq_index = 0,
},
};
+static inline const struct imx290_mode *imx290_modes_ptr(const struct imx290 *imx290)
+{
+ if (imx290->nlanes == 2)
+ return imx290_modes_2lanes;
+ else
+ return imx290_modes_4lanes;
+}
+
+static inline int imx290_modes_num(const struct imx290 *imx290)
+{
+ if (imx290->nlanes == 2)
+ return ARRAY_SIZE(imx290_modes_2lanes);
+ else
+ return ARRAY_SIZE(imx290_modes_4lanes);
+}
+
static inline struct imx290 *to_imx290(struct v4l2_subdev *_sd)
{
return container_of(_sd, struct imx290, sd);
@@ -314,11 +403,11 @@ static int imx290_set_register_array(struct imx290 *imx290,
ret = imx290_write_reg(imx290, settings->reg, settings->val);
if (ret < 0)
return ret;
-
- /* Settle time is 10ms for all registers */
- msleep(10);
}
+ /* Provide 10ms settle time */
+ usleep_range(10000, 11000);
+
return 0;
}
@@ -391,6 +480,27 @@ static int imx290_set_ctrl(struct v4l2_ctrl *ctrl)
case V4L2_CID_GAIN:
ret = imx290_set_gain(imx290, ctrl->val);
break;
+ case V4L2_CID_TEST_PATTERN:
+ if (ctrl->val) {
+ imx290_write_reg(imx290, IMX290_BLKLEVEL_LOW, 0x00);
+ imx290_write_reg(imx290, IMX290_BLKLEVEL_HIGH, 0x00);
+ usleep_range(10000, 11000);
+ imx290_write_reg(imx290, IMX290_PGCTRL,
+ (u8)(IMX290_PGCTRL_REGEN |
+ IMX290_PGCTRL_THRU |
+ IMX290_PGCTRL_MODE(ctrl->val)));
+ } else {
+ imx290_write_reg(imx290, IMX290_PGCTRL, 0x00);
+ usleep_range(10000, 11000);
+ if (imx290->bpp == 10)
+ imx290_write_reg(imx290, IMX290_BLKLEVEL_LOW,
+ 0x3c);
+ else /* 12 bits per pixel */
+ imx290_write_reg(imx290, IMX290_BLKLEVEL_LOW,
+ 0xf0);
+ imx290_write_reg(imx290, IMX290_BLKLEVEL_HIGH, 0x00);
+ }
+ break;
default:
ret = -EINVAL;
break;
@@ -417,6 +527,28 @@ static int imx290_enum_mbus_code(struct v4l2_subdev *sd,
return 0;
}
+static int imx290_enum_frame_size(struct v4l2_subdev *sd,
+ struct v4l2_subdev_pad_config *cfg,
+ struct v4l2_subdev_frame_size_enum *fse)
+{
+ const struct imx290 *imx290 = to_imx290(sd);
+ const struct imx290_mode *imx290_modes = imx290_modes_ptr(imx290);
+
+ if ((fse->code != imx290_formats[0].code) &&
+ (fse->code != imx290_formats[1].code))
+ return -EINVAL;
+
+ if (fse->index >= imx290_modes_num(imx290))
+ return -EINVAL;
+
+ fse->min_width = imx290_modes[fse->index].width;
+ fse->max_width = imx290_modes[fse->index].width;
+ fse->min_height = imx290_modes[fse->index].height;
+ fse->max_height = imx290_modes[fse->index].height;
+
+ return 0;
+}
+
static int imx290_get_fmt(struct v4l2_subdev *sd,
struct v4l2_subdev_pad_config *cfg,
struct v4l2_subdev_format *fmt)
@@ -439,6 +571,30 @@ static int imx290_get_fmt(struct v4l2_subdev *sd,
return 0;
}
+static inline u8 imx290_get_link_freq_index(struct imx290 *imx290)
+{
+ return imx290->current_mode->link_freq_index;
+}
+
+static s64 imx290_get_link_freq(struct imx290 *imx290)
+{
+ u8 index = imx290_get_link_freq_index(imx290);
+
+ return *(imx290_link_freqs_ptr(imx290) + index);
+}
+
+static u64 imx290_calc_pixel_rate(struct imx290 *imx290)
+{
+ s64 link_freq = imx290_get_link_freq(imx290);
+ u8 nlanes = imx290->nlanes;
+ u64 pixel_rate;
+
+ /* pixel rate = link_freq * 2 * nr_of_lanes / bits_per_sample */
+ pixel_rate = link_freq * 2 * nlanes;
+ do_div(pixel_rate, imx290->bpp);
+ return pixel_rate;
+}
+
static int imx290_set_fmt(struct v4l2_subdev *sd,
struct v4l2_subdev_pad_config *cfg,
struct v4l2_subdev_format *fmt)
@@ -450,9 +606,8 @@ static int imx290_set_fmt(struct v4l2_subdev *sd,
mutex_lock(&imx290->lock);
- mode = v4l2_find_nearest_size(imx290_modes,
- ARRAY_SIZE(imx290_modes),
- width, height,
+ mode = v4l2_find_nearest_size(imx290_modes_ptr(imx290),
+ imx290_modes_num(imx290), width, height,
fmt->format.width, fmt->format.height);
fmt->format.width = mode->width;
@@ -472,10 +627,15 @@ static int imx290_set_fmt(struct v4l2_subdev *sd,
format = v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
} else {
format = &imx290->current_format;
- __v4l2_ctrl_s_ctrl(imx290->link_freq, mode->link_freq_index);
- __v4l2_ctrl_s_ctrl_int64(imx290->pixel_rate, mode->pixel_rate);
-
imx290->current_mode = mode;
+ imx290->bpp = imx290_formats[i].bpp;
+
+ if (imx290->link_freq)
+ __v4l2_ctrl_s_ctrl(imx290->link_freq,
+ imx290_get_link_freq_index(imx290));
+ if (imx290->pixel_rate)
+ __v4l2_ctrl_s_ctrl_int64(imx290->pixel_rate,
+ imx290_calc_pixel_rate(imx290));
}
*format = fmt->format;
@@ -499,12 +659,11 @@ static int imx290_entity_init_cfg(struct v4l2_subdev *subdev,
return 0;
}
-static int imx290_write_current_format(struct imx290 *imx290,
- struct v4l2_mbus_framefmt *format)
+static int imx290_write_current_format(struct imx290 *imx290)
{
int ret;
- switch (format->code) {
+ switch (imx290->current_format.code) {
case MEDIA_BUS_FMT_SRGGB10_1X10:
ret = imx290_set_register_array(imx290, imx290_10bit_settings,
ARRAY_SIZE(
@@ -514,6 +673,15 @@ static int imx290_write_current_format(struct imx290 *imx290,
return ret;
}
break;
+ case MEDIA_BUS_FMT_SRGGB12_1X12:
+ ret = imx290_set_register_array(imx290, imx290_12bit_settings,
+ ARRAY_SIZE(
+ imx290_12bit_settings));
+ if (ret < 0) {
+ dev_err(imx290->dev, "Could not set format registers\n");
+ return ret;
+ }
+ break;
default:
dev_err(imx290->dev, "Unknown pixel format\n");
return -EINVAL;
@@ -522,6 +690,25 @@ static int imx290_write_current_format(struct imx290 *imx290,
return 0;
}
+static int imx290_set_hmax(struct imx290 *imx290, u32 val)
+{
+ int ret;
+
+ ret = imx290_write_reg(imx290, IMX290_HMAX_LOW, (val & 0xff));
+ if (ret) {
+ dev_err(imx290->dev, "Error setting HMAX register\n");
+ return ret;
+ }
+
+ ret = imx290_write_reg(imx290, IMX290_HMAX_HIGH, ((val >> 8) & 0xff));
+ if (ret) {
+ dev_err(imx290->dev, "Error setting HMAX register\n");
+ return ret;
+ }
+
+ return 0;
+}
+
/* Start streaming */
static int imx290_start_streaming(struct imx290 *imx290)
{
@@ -536,8 +723,8 @@ static int imx290_start_streaming(struct imx290 *imx290)
return ret;
}
- /* Set current frame format */
- ret = imx290_write_current_format(imx290, &imx290->current_format);
+ /* Apply the register values related to current frame format */
+ ret = imx290_write_current_format(imx290);
if (ret < 0) {
dev_err(imx290->dev, "Could not set frame format\n");
return ret;
@@ -550,6 +737,9 @@ static int imx290_start_streaming(struct imx290 *imx290)
dev_err(imx290->dev, "Could not set current mode\n");
return ret;
}
+ ret = imx290_set_hmax(imx290, imx290->current_mode->hmax);
+ if (ret < 0)
+ return ret;
/* Apply customized values from user */
ret = v4l2_ctrl_handler_setup(imx290->sd.ctrl_handler);
@@ -607,6 +797,49 @@ static int imx290_get_regulators(struct device *dev, struct imx290 *imx290)
imx290->supplies);
}
+static int imx290_set_data_lanes(struct imx290 *imx290)
+{
+ int ret = 0, laneval, frsel;
+
+ switch (imx290->nlanes) {
+ case 2:
+ laneval = 0x01;
+ frsel = 0x02;
+ break;
+ case 4:
+ laneval = 0x03;
+ frsel = 0x01;
+ break;
+ default:
+ /*
+ * We should never hit this since the data lane count is
+ * validated in probe itself
+ */
+ dev_err(imx290->dev, "Lane configuration not supported\n");
+ ret = -EINVAL;
+ goto exit;
+ }
+
+ ret = imx290_write_reg(imx290, IMX290_PHY_LANE_NUM, laneval);
+ if (ret) {
+ dev_err(imx290->dev, "Error setting Physical Lane number register\n");
+ goto exit;
+ }
+
+ ret = imx290_write_reg(imx290, IMX290_CSI_LANE_MODE, laneval);
+ if (ret) {
+ dev_err(imx290->dev, "Error setting CSI Lane mode register\n");
+ goto exit;
+ }
+
+ ret = imx290_write_reg(imx290, IMX290_FR_FDG_SEL, frsel);
+ if (ret)
+ dev_err(imx290->dev, "Error setting FR/FDG SEL register\n");
+
+exit:
+ return ret;
+}
+
static int imx290_power_on(struct device *dev)
{
struct i2c_client *client = to_i2c_client(dev);
@@ -628,9 +861,12 @@ static int imx290_power_on(struct device *dev)
}
usleep_range(1, 2);
- gpiod_set_value_cansleep(imx290->rst_gpio, 1);
+ gpiod_set_value_cansleep(imx290->rst_gpio, 0);
usleep_range(30000, 31000);
+ /* Set data lane count */
+ imx290_set_data_lanes(imx290);
+
return 0;
}
@@ -641,14 +877,14 @@ static int imx290_power_off(struct device *dev)
struct imx290 *imx290 = to_imx290(sd);
clk_disable_unprepare(imx290->xclk);
- gpiod_set_value_cansleep(imx290->rst_gpio, 0);
+ gpiod_set_value_cansleep(imx290->rst_gpio, 1);
regulator_bulk_disable(IMX290_NUM_SUPPLIES, imx290->supplies);
return 0;
}
static const struct dev_pm_ops imx290_pm_ops = {
- SET_RUNTIME_PM_OPS(imx290_power_on, imx290_power_off, NULL)
+ SET_RUNTIME_PM_OPS(imx290_power_off, imx290_power_on, NULL)
};
static const struct v4l2_subdev_video_ops imx290_video_ops = {
@@ -658,6 +894,7 @@ static const struct v4l2_subdev_video_ops imx290_video_ops = {
static const struct v4l2_subdev_pad_ops imx290_pad_ops = {
.init_cfg = imx290_entity_init_cfg,
.enum_mbus_code = imx290_enum_mbus_code,
+ .enum_frame_size = imx290_enum_frame_size,
.get_fmt = imx290_get_fmt,
.set_fmt = imx290_set_fmt,
};
@@ -671,12 +908,39 @@ static const struct media_entity_operations imx290_subdev_entity_ops = {
.link_validate = v4l2_subdev_link_validate,
};
+/*
+ * Returns 0 if all link frequencies used by the driver for the given number
+ * of MIPI data lanes are mentioned in the device tree, or the value of the
+ * first missing frequency otherwise.
+ */
+static s64 imx290_check_link_freqs(const struct imx290 *imx290,
+ const struct v4l2_fwnode_endpoint *ep)
+{
+ int i, j;
+ const s64 *freqs = imx290_link_freqs_ptr(imx290);
+ int freqs_count = imx290_link_freqs_num(imx290);
+
+ for (i = 0; i < freqs_count; i++) {
+ for (j = 0; j < ep->nr_of_link_frequencies; j++)
+ if (freqs[i] == ep->link_frequencies[j])
+ break;
+ if (j == ep->nr_of_link_frequencies)
+ return freqs[i];
+ }
+ return 0;
+}
+
static int imx290_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct fwnode_handle *endpoint;
+ /* Only CSI2 is supported for now: */
+ struct v4l2_fwnode_endpoint ep = {
+ .bus_type = V4L2_MBUS_CSI2_DPHY
+ };
struct imx290 *imx290;
u32 xclk_freq;
+ s64 fq;
int ret;
imx290 = devm_kzalloc(dev, sizeof(*imx290), GFP_KERNEL);
@@ -696,35 +960,40 @@ static int imx290_probe(struct i2c_client *client)
return -EINVAL;
}
- ret = v4l2_fwnode_endpoint_alloc_parse(endpoint, &imx290->ep);
+ ret = v4l2_fwnode_endpoint_alloc_parse(endpoint, &ep);
fwnode_handle_put(endpoint);
- if (ret) {
+ if (ret == -ENXIO) {
+ dev_err(dev, "Unsupported bus type, should be CSI2\n");
+ goto free_err;
+ } else if (ret) {
dev_err(dev, "Parsing endpoint node failed\n");
goto free_err;
}
- if (!imx290->ep.nr_of_link_frequencies) {
- dev_err(dev, "link-frequency property not found in DT\n");
+ /* Get number of data lanes */
+ imx290->nlanes = ep.bus.mipi_csi2.num_data_lanes;
+ if (imx290->nlanes != 2 && imx290->nlanes != 4) {
+ dev_err(dev, "Invalid data lanes: %d\n", imx290->nlanes);
ret = -EINVAL;
goto free_err;
}
- if (imx290->ep.link_frequencies[0] != IMX290_DEFAULT_LINK_FREQ) {
- dev_err(dev, "Unsupported link frequency\n");
+ dev_dbg(dev, "Using %u data lanes\n", imx290->nlanes);
+
+ if (!ep.nr_of_link_frequencies) {
+ dev_err(dev, "link-frequency property not found in DT\n");
ret = -EINVAL;
goto free_err;
}
- /* Only CSI2 is supported for now */
- if (imx290->ep.bus_type != V4L2_MBUS_CSI2_DPHY) {
- dev_err(dev, "Unsupported bus type, should be CSI2\n");
+ /* Check that link frequences for all the modes are in device tree */
+ fq = imx290_check_link_freqs(imx290, &ep);
+ if (fq) {
+ dev_err(dev, "Link frequency of %lld is not supported\n", fq);
ret = -EINVAL;
goto free_err;
}
- /* Set default mode to max resolution */
- imx290->current_mode = &imx290_modes[0];
-
/* get system clock (xclk) */
imx290->xclk = devm_clk_get(dev, "xclk");
if (IS_ERR(imx290->xclk)) {
@@ -760,7 +1029,8 @@ static int imx290_probe(struct i2c_client *client)
goto free_err;
}
- imx290->rst_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_ASIS);
+ imx290->rst_gpio = devm_gpiod_get_optional(dev, "reset",
+ GPIOD_OUT_HIGH);
if (IS_ERR(imx290->rst_gpio)) {
dev_err(dev, "Cannot get reset gpio\n");
ret = PTR_ERR(imx290->rst_gpio);
@@ -769,23 +1039,35 @@ static int imx290_probe(struct i2c_client *client)
mutex_init(&imx290->lock);
- v4l2_ctrl_handler_init(&imx290->ctrls, 3);
+ /*
+ * Initialize the frame format. In particular, imx290->current_mode
+ * and imx290->bpp are set to defaults: imx290_calc_pixel_rate() call
+ * below relies on these fields.
+ */
+ imx290_entity_init_cfg(&imx290->sd, NULL);
+
+ v4l2_ctrl_handler_init(&imx290->ctrls, 4);
v4l2_ctrl_new_std(&imx290->ctrls, &imx290_ctrl_ops,
V4L2_CID_GAIN, 0, 72, 1, 0);
+
imx290->link_freq =
- v4l2_ctrl_new_int_menu(&imx290->ctrls,
- &imx290_ctrl_ops,
+ v4l2_ctrl_new_int_menu(&imx290->ctrls, &imx290_ctrl_ops,
V4L2_CID_LINK_FREQ,
- ARRAY_SIZE(imx290_link_freq) - 1,
- 0, imx290_link_freq);
+ imx290_link_freqs_num(imx290) - 1, 0,
+ imx290_link_freqs_ptr(imx290));
if (imx290->link_freq)
imx290->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
imx290->pixel_rate = v4l2_ctrl_new_std(&imx290->ctrls, &imx290_ctrl_ops,
- V4L2_CID_PIXEL_RATE, 1,
- INT_MAX, 1,
- imx290_modes[0].pixel_rate);
+ V4L2_CID_PIXEL_RATE,
+ 1, INT_MAX, 1,
+ imx290_calc_pixel_rate(imx290));
+
+ v4l2_ctrl_new_std_menu_items(&imx290->ctrls, &imx290_ctrl_ops,
+ V4L2_CID_TEST_PATTERN,
+ ARRAY_SIZE(imx290_test_pattern_menu) - 1,
+ 0, 0, imx290_test_pattern_menu);
imx290->sd.ctrl_handler = &imx290->ctrls;
@@ -826,7 +1108,7 @@ static int imx290_probe(struct i2c_client *client)
pm_runtime_enable(dev);
pm_runtime_idle(dev);
- v4l2_fwnode_endpoint_free(&imx290->ep);
+ v4l2_fwnode_endpoint_free(&ep);
return 0;
@@ -836,7 +1118,7 @@ free_ctrl:
v4l2_ctrl_handler_free(&imx290->ctrls);
mutex_destroy(&imx290->lock);
free_err:
- v4l2_fwnode_endpoint_free(&imx290->ep);
+ v4l2_fwnode_endpoint_free(&ep);
return ret;
}
generated by cgit v1.2.3 (git 2.39.0) at 2024-12-20 20:39:54 +0300