diff options
Diffstat (limited to 'drivers/gpio')
47 files changed, 1196 insertions, 837 deletions
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 5f3429f0bf46..d00e7b67be9a 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -33,7 +33,6 @@ config ARCH_REQUIRE_GPIOLIB menuconfig GPIOLIB bool "GPIO Support" - depends on ARCH_WANT_OPTIONAL_GPIOLIB || ARCH_REQUIRE_GPIOLIB help This enables GPIO support through the generic GPIO library. You only need to enable this, if you also want to enable @@ -49,7 +48,7 @@ config GPIO_DEVRES config OF_GPIO def_bool y - depends on OF + depends on OF || COMPILE_TEST config GPIO_ACPI def_bool y @@ -122,6 +121,7 @@ config GPIO_ALTERA config GPIO_AMDPT tristate "AMD Promontory GPIO support" depends on ACPI + select GPIO_GENERIC help driver for GPIO functionality on Promontory IOHub Require ACPI ASL code to enumerate as a platform device. @@ -303,6 +303,7 @@ config GPIO_MPC8XXX FSL_SOC_BOOKE || PPC_86xx || ARCH_LAYERSCAPE || ARM || \ COMPILE_TEST select GPIO_GENERIC + select IRQ_DOMAIN help Say Y here if you're going to use hardware that connects to the MPC512x/831x/834x/837x/8572/8610/QorIQ GPIOs. @@ -399,6 +400,11 @@ config GPIO_TB10X select GENERIC_IRQ_CHIP select OF_GPIO +config GPIO_TEGRA + bool + default y + depends on ARCH_TEGRA || COMPILE_TEST + config GPIO_TS4800 tristate "TS-4800 DIO blocks and compatibles" depends on OF_GPIO @@ -473,7 +479,7 @@ config GPIO_XILINX config GPIO_XLP tristate "Netlogic XLP GPIO support" - depends on CPU_XLP && OF_GPIO + depends on OF_GPIO && (CPU_XLP || ARCH_VULCAN || COMPILE_TEST) select GPIOLIB_IRQCHIP help This driver provides support for GPIO interface on Netlogic XLP MIPS64 @@ -510,6 +516,13 @@ config GPIO_ZX help Say yes here to support the GPIO device on ZTE ZX SoCs. +config GPIO_LOONGSON1 + tristate "Loongson1 GPIO support" + depends on MACH_LOONGSON32 + select GPIO_GENERIC + help + Say Y or M here to support GPIO on Loongson1 SoCs. + endmenu menu "Port-mapped I/O GPIO drivers" @@ -557,7 +570,7 @@ config GPIO_IT87 Say yes here to support GPIO functionality of IT87xx Super I/O chips. This driver is tested with ITE IT8728 and IT8732 Super I/O chips, and - supports the IT8761E Super I/O chip as well. + supports the IT8761E, IT8620E and IT8628E Super I/O chip as well. To compile this driver as a module, choose M here: the module will be called gpio_it87 @@ -1091,6 +1104,7 @@ menu "SPI or I2C GPIO expanders" config GPIO_MCP23S08 tristate "Microchip MCP23xxx I/O expander" + select GPIOLIB_IRQCHIP help SPI/I2C driver for Microchip MCP23S08/MCP23S17/MCP23008/MCP23017 I/O expanders. diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 1e0b74f3b1ed..991598ea3fba 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -12,6 +12,9 @@ obj-$(CONFIG_GPIO_ACPI) += gpiolib-acpi.o # Device drivers. Generally keep list sorted alphabetically obj-$(CONFIG_GPIO_GENERIC) += gpio-generic.o +# directly supported by gpio-generic +gpio-generic-$(CONFIG_GPIO_GENERIC) += gpio-mmio.o + obj-$(CONFIG_GPIO_104_DIO_48E) += gpio-104-dio-48e.o obj-$(CONFIG_GPIO_104_IDIO_16) += gpio-104-idio-16.o obj-$(CONFIG_GPIO_104_IDI_48) += gpio-104-idi-48.o @@ -95,7 +98,7 @@ obj-$(CONFIG_GPIO_SX150X) += gpio-sx150x.o obj-$(CONFIG_GPIO_SYSCON) += gpio-syscon.o obj-$(CONFIG_GPIO_TB10X) += gpio-tb10x.o obj-$(CONFIG_GPIO_TC3589X) += gpio-tc3589x.o -obj-$(CONFIG_ARCH_TEGRA) += gpio-tegra.o +obj-$(CONFIG_GPIO_TEGRA) += gpio-tegra.o obj-$(CONFIG_GPIO_TIMBERDALE) += gpio-timberdale.o obj-$(CONFIG_GPIO_PALMAS) += gpio-palmas.o obj-$(CONFIG_GPIO_TPIC2810) += gpio-tpic2810.o @@ -127,3 +130,4 @@ obj-$(CONFIG_GPIO_XTENSA) += gpio-xtensa.o obj-$(CONFIG_GPIO_ZEVIO) += gpio-zevio.o obj-$(CONFIG_GPIO_ZYNQ) += gpio-zynq.o obj-$(CONFIG_GPIO_ZX) += gpio-zx.o +obj-$(CONFIG_GPIO_LOONGSON1) += gpio-loongson1.o diff --git a/drivers/gpio/gpio-74x164.c b/drivers/gpio/gpio-74x164.c index c81224ff2dca..80f9ddf13343 100644 --- a/drivers/gpio/gpio-74x164.c +++ b/drivers/gpio/gpio-74x164.c @@ -75,6 +75,29 @@ static void gen_74x164_set_value(struct gpio_chip *gc, mutex_unlock(&chip->lock); } +static void gen_74x164_set_multiple(struct gpio_chip *gc, unsigned long *mask, + unsigned long *bits) +{ + struct gen_74x164_chip *chip = gpiochip_get_data(gc); + unsigned int i, idx, shift; + u8 bank, bankmask; + + mutex_lock(&chip->lock); + for (i = 0, bank = chip->registers - 1; i < chip->registers; + i++, bank--) { + idx = i / sizeof(*mask); + shift = i % sizeof(*mask) * BITS_PER_BYTE; + bankmask = mask[idx] >> shift; + if (!bankmask) + continue; + + chip->buffer[bank] &= ~bankmask; + chip->buffer[bank] |= bankmask & (bits[idx] >> shift); + } + __gen_74x164_write_config(chip); + mutex_unlock(&chip->lock); +} + static int gen_74x164_direction_output(struct gpio_chip *gc, unsigned offset, int val) { @@ -114,6 +137,7 @@ static int gen_74x164_probe(struct spi_device *spi) chip->gpio_chip.direction_output = gen_74x164_direction_output; chip->gpio_chip.get = gen_74x164_get_value; chip->gpio_chip.set = gen_74x164_set_value; + chip->gpio_chip.set_multiple = gen_74x164_set_multiple; chip->gpio_chip.base = -1; chip->registers = nregs; @@ -153,6 +177,7 @@ static int gen_74x164_remove(struct spi_device *spi) static const struct of_device_id gen_74x164_dt_ids[] = { { .compatible = "fairchild,74hc595" }, + { .compatible = "nxp,74lvc594" }, {}, }; MODULE_DEVICE_TABLE(of, gen_74x164_dt_ids); diff --git a/drivers/gpio/gpio-amdpt.c b/drivers/gpio/gpio-amdpt.c index c2484046e8e9..9b78dc837603 100644 --- a/drivers/gpio/gpio-amdpt.c +++ b/drivers/gpio/gpio-amdpt.c @@ -28,7 +28,6 @@ struct pt_gpio_chip { struct gpio_chip gc; void __iomem *reg_base; - spinlock_t lock; }; static int pt_gpio_request(struct gpio_chip *gc, unsigned offset) @@ -39,19 +38,19 @@ static int pt_gpio_request(struct gpio_chip *gc, unsigned offset) dev_dbg(gc->parent, "pt_gpio_request offset=%x\n", offset); - spin_lock_irqsave(&pt_gpio->lock, flags); + spin_lock_irqsave(&gc->bgpio_lock, flags); using_pins = readl(pt_gpio->reg_base + PT_SYNC_REG); if (using_pins & BIT(offset)) { dev_warn(gc->parent, "PT GPIO pin %x reconfigured\n", offset); - spin_unlock_irqrestore(&pt_gpio->lock, flags); + spin_unlock_irqrestore(&gc->bgpio_lock, flags); return -EINVAL; } writel(using_pins | BIT(offset), pt_gpio->reg_base + PT_SYNC_REG); - spin_unlock_irqrestore(&pt_gpio->lock, flags); + spin_unlock_irqrestore(&gc->bgpio_lock, flags); return 0; } @@ -62,111 +61,17 @@ static void pt_gpio_free(struct gpio_chip *gc, unsigned offset) unsigned long flags; u32 using_pins; - spin_lock_irqsave(&pt_gpio->lock, flags); + spin_lock_irqsave(&gc->bgpio_lock, flags); using_pins = readl(pt_gpio->reg_base + PT_SYNC_REG); using_pins &= ~BIT(offset); writel(using_pins, pt_gpio->reg_base + PT_SYNC_REG); - spin_unlock_irqrestore(&pt_gpio->lock, flags); + spin_unlock_irqrestore(&gc->bgpio_lock, flags); dev_dbg(gc->parent, "pt_gpio_free offset=%x\n", offset); } -static void pt_gpio_set_value(struct gpio_chip *gc, unsigned offset, int value) -{ - struct pt_gpio_chip *pt_gpio = gpiochip_get_data(gc); - unsigned long flags; - u32 data; - - dev_dbg(gc->parent, "pt_gpio_set_value offset=%x, value=%x\n", - offset, value); - - spin_lock_irqsave(&pt_gpio->lock, flags); - - data = readl(pt_gpio->reg_base + PT_OUTPUTDATA_REG); - data &= ~BIT(offset); - if (value) - data |= BIT(offset); - writel(data, pt_gpio->reg_base + PT_OUTPUTDATA_REG); - - spin_unlock_irqrestore(&pt_gpio->lock, flags); -} - -static int pt_gpio_get_value(struct gpio_chip *gc, unsigned offset) -{ - struct pt_gpio_chip *pt_gpio = gpiochip_get_data(gc); - unsigned long flags; - u32 data; - - spin_lock_irqsave(&pt_gpio->lock, flags); - - data = readl(pt_gpio->reg_base + PT_DIRECTION_REG); - - /* configure as output */ - if (data & BIT(offset)) - data = readl(pt_gpio->reg_base + PT_OUTPUTDATA_REG); - else /* configure as input */ - data = readl(pt_gpio->reg_base + PT_INPUTDATA_REG); - - spin_unlock_irqrestore(&pt_gpio->lock, flags); - - data >>= offset; - data &= 1; - - dev_dbg(gc->parent, "pt_gpio_get_value offset=%x, value=%x\n", - offset, data); - - return data; -} - -static int pt_gpio_direction_input(struct gpio_chip *gc, unsigned offset) -{ - struct pt_gpio_chip *pt_gpio = gpiochip_get_data(gc); - unsigned long flags; - u32 data; - - dev_dbg(gc->parent, "pt_gpio_dirction_input offset=%x\n", offset); - - spin_lock_irqsave(&pt_gpio->lock, flags); - - data = readl(pt_gpio->reg_base + PT_DIRECTION_REG); - data &= ~BIT(offset); - writel(data, pt_gpio->reg_base + PT_DIRECTION_REG); - - spin_unlock_irqrestore(&pt_gpio->lock, flags); - - return 0; -} - -static int pt_gpio_direction_output(struct gpio_chip *gc, - unsigned offset, int value) -{ - struct pt_gpio_chip *pt_gpio = gpiochip_get_data(gc); - unsigned long flags; - u32 data; - - dev_dbg(gc->parent, "pt_gpio_direction_output offset=%x, value=%x\n", - offset, value); - - spin_lock_irqsave(&pt_gpio->lock, flags); - - data = readl(pt_gpio->reg_base + PT_OUTPUTDATA_REG); - if (value) - data |= BIT(offset); - else - data &= ~BIT(offset); - writel(data, pt_gpio->reg_base + PT_OUTPUTDATA_REG); - - data = readl(pt_gpio->reg_base + PT_DIRECTION_REG); - data |= BIT(offset); - writel(data, pt_gpio->reg_base + PT_DIRECTION_REG); - - spin_unlock_irqrestore(&pt_gpio->lock, flags); - - return 0; -} - static int pt_gpio_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -196,18 +101,19 @@ static int pt_gpio_probe(struct platform_device *pdev) return PTR_ERR(pt_gpio->reg_base); } - spin_lock_init(&pt_gpio->lock); + ret = bgpio_init(&pt_gpio->gc, dev, 4, + pt_gpio->reg_base + PT_INPUTDATA_REG, + pt_gpio->reg_base + PT_OUTPUTDATA_REG, NULL, + pt_gpio->reg_base + PT_DIRECTION_REG, NULL, + BGPIOF_READ_OUTPUT_REG_SET); + if (ret) { + dev_err(&pdev->dev, "bgpio_init failed\n"); + return ret; + } - pt_gpio->gc.label = pdev->name; pt_gpio->gc.owner = THIS_MODULE; - pt_gpio->gc.parent = dev; pt_gpio->gc.request = pt_gpio_request; pt_gpio->gc.free = pt_gpio_free; - pt_gpio->gc.direction_input = pt_gpio_direction_input; - pt_gpio->gc.direction_output = pt_gpio_direction_output; - pt_gpio->gc.get = pt_gpio_get_value; - pt_gpio->gc.set = pt_gpio_set_value; - pt_gpio->gc.base = -1; pt_gpio->gc.ngpio = PT_TOTAL_GPIO; #if defined(CONFIG_OF_GPIO) pt_gpio->gc.of_node = pdev->dev.of_node; @@ -239,6 +145,7 @@ static int pt_gpio_remove(struct platform_device *pdev) static const struct acpi_device_id pt_gpio_acpi_match[] = { { "AMDF030", 0 }, + { "AMDIF030", 0 }, { }, }; MODULE_DEVICE_TABLE(acpi, pt_gpio_acpi_match); diff --git a/drivers/gpio/gpio-bcm-kona.c b/drivers/gpio/gpio-bcm-kona.c index 2fd38d598f3d..9aabc48ff5de 100644 --- a/drivers/gpio/gpio-bcm-kona.c +++ b/drivers/gpio/gpio-bcm-kona.c @@ -1,4 +1,7 @@ /* + * Broadcom Kona GPIO Driver + * + * Author: Broadcom Corporation <bcm-kernel-feedback-list@broadcom.com> * Copyright (C) 2012-2014 Broadcom Corporation * * This program is free software; you can redistribute it and/or @@ -17,7 +20,7 @@ #include <linux/gpio.h> #include <linux/of_device.h> #include <linux/of_irq.h> -#include <linux/module.h> +#include <linux/init.h> #include <linux/irqdomain.h> #include <linux/irqchip/chained_irq.h> @@ -502,8 +505,6 @@ static struct of_device_id const bcm_kona_gpio_of_match[] = { {} }; -MODULE_DEVICE_TABLE(of, bcm_kona_gpio_of_match); - /* * This lock class tells lockdep that GPIO irqs are in a different * category than their parents, so it won't report false recursion. @@ -659,9 +660,4 @@ static struct platform_driver bcm_kona_gpio_driver = { }, .probe = bcm_kona_gpio_probe, }; - -module_platform_driver(bcm_kona_gpio_driver); - -MODULE_AUTHOR("Broadcom Corporation <bcm-kernel-feedback-list@broadcom.com>"); -MODULE_DESCRIPTION("Broadcom Kona GPIO Driver"); -MODULE_LICENSE("GPL v2"); +builtin_platform_driver(bcm_kona_gpio_driver); diff --git a/drivers/gpio/gpio-brcmstb.c b/drivers/gpio/gpio-brcmstb.c index 42d51c59ed50..e6489143721a 100644 --- a/drivers/gpio/gpio-brcmstb.c +++ b/drivers/gpio/gpio-brcmstb.c @@ -461,6 +461,7 @@ static int brcmstb_gpio_probe(struct platform_device *pdev) bank->id = num_banks; if (bank_width <= 0 || bank_width > MAX_GPIO_PER_BANK) { dev_err(dev, "Invalid bank width %d\n", bank_width); + err = -EINVAL; goto fail; } else { bank->width = bank_width; diff --git a/drivers/gpio/gpio-dwapb.c b/drivers/gpio/gpio-dwapb.c index 597de1ef497b..34779bb375de 100644 --- a/drivers/gpio/gpio-dwapb.c +++ b/drivers/gpio/gpio-dwapb.c @@ -7,6 +7,7 @@ * * All enquiries to support@picochip.com */ +#include <linux/acpi.h> #include <linux/gpio/driver.h> /* FIXME: for gpio_get_value(), replace this with direct register read */ #include <linux/gpio.h> @@ -22,10 +23,13 @@ #include <linux/of_address.h> #include <linux/of_irq.h> #include <linux/platform_device.h> +#include <linux/property.h> #include <linux/spinlock.h> #include <linux/platform_data/gpio-dwapb.h> #include <linux/slab.h> +#include "gpiolib.h" + #define GPIO_SWPORTA_DR 0x00 #define GPIO_SWPORTA_DDR 0x04 #define GPIO_SWPORTB_DR 0x0c @@ -290,14 +294,14 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio, struct dwapb_port_property *pp) { struct gpio_chip *gc = &port->gc; - struct device_node *node = pp->node; + struct fwnode_handle *fwnode = pp->fwnode; struct irq_chip_generic *irq_gc = NULL; unsigned int hwirq, ngpio = gc->ngpio; struct irq_chip_type *ct; int err, i; - gpio->domain = irq_domain_add_linear(node, ngpio, - &irq_generic_chip_ops, gpio); + gpio->domain = irq_domain_create_linear(fwnode, ngpio, + &irq_generic_chip_ops, gpio); if (!gpio->domain) return; @@ -409,13 +413,13 @@ static int dwapb_gpio_add_port(struct dwapb_gpio *gpio, err = bgpio_init(&port->gc, gpio->dev, 4, dat, set, NULL, dirout, NULL, false); if (err) { - dev_err(gpio->dev, "failed to init gpio chip for %s\n", - pp->name); + dev_err(gpio->dev, "failed to init gpio chip for port%d\n", + port->idx); return err; } #ifdef CONFIG_OF_GPIO - port->gc.of_node = pp->node; + port->gc.of_node = to_of_node(pp->fwnode); #endif port->gc.ngpio = pp->ngpio; port->gc.base = pp->gpio_base; @@ -429,11 +433,15 @@ static int dwapb_gpio_add_port(struct dwapb_gpio *gpio, err = gpiochip_add_data(&port->gc, port); if (err) - dev_err(gpio->dev, "failed to register gpiochip for %s\n", - pp->name); + dev_err(gpio->dev, "failed to register gpiochip for port%d\n", + port->idx); else port->is_registered = true; + /* Add GPIO-signaled ACPI event support */ + if (pp->irq) + acpi_gpiochip_request_interrupts(&port->gc); + return err; } @@ -447,19 +455,15 @@ static void dwapb_gpio_unregister(struct dwapb_gpio *gpio) } static struct dwapb_platform_data * -dwapb_gpio_get_pdata_of(struct device *dev) +dwapb_gpio_get_pdata(struct device *dev) { - struct device_node *node, *port_np; + struct fwnode_handle *fwnode; struct dwapb_platform_data *pdata; struct dwapb_port_property *pp; int nports; int i; - node = dev->of_node; - if (!IS_ENABLED(CONFIG_OF_GPIO) || !node) - return ERR_PTR(-ENODEV); - - nports = of_get_child_count(node); + nports = device_get_child_node_count(dev); if (nports == 0) return ERR_PTR(-ENODEV); @@ -474,21 +478,22 @@ dwapb_gpio_get_pdata_of(struct device *dev) pdata->nports = nports; i = 0; - for_each_child_of_node(node, port_np) { + device_for_each_child_node(dev, fwnode) { pp = &pdata->properties[i++]; - pp->node = port_np; + pp->fwnode = fwnode; - if (of_property_read_u32(port_np, "reg", &pp->idx) || + if (fwnode_property_read_u32(fwnode, "reg", &pp->idx) || pp->idx >= DWAPB_MAX_PORTS) { - dev_err(dev, "missing/invalid port index for %s\n", - port_np->full_name); + dev_err(dev, + "missing/invalid port index for port%d\n", i); return ERR_PTR(-EINVAL); } - if (of_property_read_u32(port_np, "snps,nr-gpios", + if (fwnode_property_read_u32(fwnode, "snps,nr-gpios", &pp->ngpio)) { - dev_info(dev, "failed to get number of gpios for %s\n", - port_np->full_name); + dev_info(dev, + "failed to get number of gpios for port%d\n", + i); pp->ngpio = 32; } @@ -496,18 +501,19 @@ dwapb_gpio_get_pdata_of(struct device *dev) * Only port A can provide interrupts in all configurations of * the IP. */ - if (pp->idx == 0 && - of_property_read_bool(port_np, "interrupt-controller")) { - pp->irq = irq_of_parse_and_map(port_np, 0); - if (!pp->irq) { - dev_warn(dev, "no irq for bank %s\n", - port_np->full_name); - } + if (dev->of_node && pp->idx == 0 && + fwnode_property_read_bool(fwnode, + "interrupt-controller")) { + pp->irq = irq_of_parse_and_map(to_of_node(fwnode), 0); + if (!pp->irq) + dev_warn(dev, "no irq for port%d\n", pp->idx); } + if (has_acpi_companion(dev) && pp->idx == 0) + pp->irq = platform_get_irq(to_platform_device(dev), 0); + pp->irq_shared = false; pp->gpio_base = -1; - pp->name = port_np->full_name; } return pdata; @@ -523,7 +529,7 @@ static int dwapb_gpio_probe(struct platform_device *pdev) struct dwapb_platform_data *pdata = dev_get_platdata(dev); if (!pdata) { - pdata = dwapb_gpio_get_pdata_of(dev); + pdata = dwapb_gpio_get_pdata(dev); if (IS_ERR(pdata)) return PTR_ERR(pdata); } @@ -580,6 +586,13 @@ static const struct of_device_id dwapb_of_match[] = { }; MODULE_DEVICE_TABLE(of, dwapb_of_match); +static const struct acpi_device_id dwapb_acpi_match[] = { + {"HISI0181", 0}, + {"APMC0D07", 0}, + { } +}; +MODULE_DEVICE_TABLE(acpi, dwapb_acpi_match); + #ifdef CONFIG_PM_SLEEP static int dwapb_gpio_suspend(struct device *dev) { @@ -674,6 +687,7 @@ static struct platform_driver dwapb_gpio_driver = { .name = "gpio-dwapb", .pm = &dwapb_gpio_pm_ops, .of_match_table = of_match_ptr(dwapb_of_match), + .acpi_match_table = ACPI_PTR(dwapb_acpi_match), }, .probe = dwapb_gpio_probe, .remove = dwapb_gpio_remove, diff --git a/drivers/gpio/gpio-f7188x.c b/drivers/gpio/gpio-f7188x.c index daac2d480db1..05aa538c3767 100644 --- a/drivers/gpio/gpio-f7188x.c +++ b/drivers/gpio/gpio-f7188x.c @@ -15,7 +15,8 @@ #include <linux/init.h> #include <linux/platform_device.h> #include <linux/io.h> -#include <linux/gpio.h> +#include <linux/gpio/driver.h> +#include <linux/bitops.h> #define DRVNAME "gpio-f7188x" @@ -129,6 +130,9 @@ static int f7188x_gpio_get(struct gpio_chip *chip, unsigned offset); static int f7188x_gpio_direction_out(struct gpio_chip *chip, unsigned offset, int value); static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value); +static int f7188x_gpio_set_single_ended(struct gpio_chip *gc, + unsigned offset, + enum single_ended_mode mode); #define F7188X_GPIO_BANK(_base, _ngpio, _regbase) \ { \ @@ -139,6 +143,7 @@ static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value); .get = f7188x_gpio_get, \ .direction_output = f7188x_gpio_direction_out, \ .set = f7188x_gpio_set, \ + .set_single_ended = f7188x_gpio_set_single_ended, \ .base = _base, \ .ngpio = _ngpio, \ .can_sleep = true, \ @@ -217,7 +222,7 @@ static int f7188x_gpio_direction_in(struct gpio_chip *chip, unsigned offset) superio_select(sio->addr, SIO_LD_GPIO); dir = superio_inb(sio->addr, gpio_dir(bank->regbase)); - dir &= ~(1 << offset); + dir &= ~BIT(offset); superio_outb(sio->addr, gpio_dir(bank->regbase), dir); superio_exit(sio->addr); @@ -238,7 +243,7 @@ static int f7188x_gpio_get(struct gpio_chip *chip, unsigned offset) superio_select(sio->addr, SIO_LD_GPIO); dir = superio_inb(sio->addr, gpio_dir(bank->regbase)); - dir = !!(dir & (1 << offset)); + dir = !!(dir & BIT(offset)); if (dir) data = superio_inb(sio->addr, gpio_data_out(bank->regbase)); else @@ -246,7 +251,7 @@ static int f7188x_gpio_get(struct gpio_chip *chip, unsigned offset) superio_exit(sio->addr); - return !!(data & 1 << offset); + return !!(data & BIT(offset)); } static int f7188x_gpio_direction_out(struct gpio_chip *chip, @@ -264,13 +269,13 @@ static int f7188x_gpio_direction_out(struct gpio_chip *chip, data_out = superio_inb(sio->addr, gpio_data_out(bank->regbase)); if (value) - data_out |= (1 << offset); + data_out |= BIT(offset); else - data_out &= ~(1 << offset); + data_out &= ~BIT(offset); superio_outb(sio->addr, gpio_data_out(bank->regbase), data_out); dir = superio_inb(sio->addr, gpio_dir(bank->regbase)); - dir |= (1 << offset); + dir |= BIT(offset); superio_outb(sio->addr, gpio_dir(bank->regbase), dir); superio_exit(sio->addr); @@ -292,14 +297,43 @@ static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value) data_out = superio_inb(sio->addr, gpio_data_out(bank->regbase)); if (value) - data_out |= (1 << offset); + data_out |= BIT(offset); else - data_out &= ~(1 << offset); + data_out &= ~BIT(offset); superio_outb(sio->addr, gpio_data_out(bank->regbase), data_out); superio_exit(sio->addr); } +static int f7188x_gpio_set_single_ended(struct gpio_chip *chip, + unsigned offset, + enum single_ended_mode mode) +{ + int err; + struct f7188x_gpio_bank *bank = gpiochip_get_data(chip); + struct f7188x_sio *sio = bank->data->sio; + u8 data; + + if (mode != LINE_MODE_OPEN_DRAIN && + mode != LINE_MODE_PUSH_PULL) + return -ENOTSUPP; + + err = superio_enter(sio->addr); + if (err) + return err; + superio_select(sio->addr, SIO_LD_GPIO); + + data = superio_inb(sio->addr, gpio_out_mode(bank->regbase)); + if (mode == LINE_MODE_OPEN_DRAIN) + data &= ~BIT(offset); + else + data |= BIT(offset); + superio_outb(sio->addr, gpio_out_mode(bank->regbase), data); + + superio_exit(sio->addr); + return 0; +} + /* * Platform device and driver. */ diff --git a/drivers/gpio/gpio-it87.c b/drivers/gpio/gpio-it87.c index b219c82414bf..63a962d18cd6 100644 --- a/drivers/gpio/gpio-it87.c +++ b/drivers/gpio/gpio-it87.c @@ -34,6 +34,8 @@ /* Chip Id numbers */ #define NO_DEV_ID 0xffff +#define IT8620_ID 0x8620 +#define IT8628_ID 0x8628 #define IT8728_ID 0x8728 #define IT8732_ID 0x8732 #define IT8761_ID 0x8761 @@ -302,6 +304,14 @@ static int __init it87_gpio_init(void) it87_gpio->chip = it87_template_chip; switch (chip_type) { + case IT8620_ID: + case IT8628_ID: + gpio_ba_reg = 0x62; + it87_gpio->io_size = 11; + it87_gpio->output_base = 0xc8; + it87_gpio->simple_size = 0; + it87_gpio->chip.ngpio = 64; + break; case IT8728_ID: case IT8732_ID: gpio_ba_reg = 0x62; diff --git a/drivers/gpio/gpio-loongson1.c b/drivers/gpio/gpio-loongson1.c new file mode 100644 index 000000000000..10c09bdd8514 --- /dev/null +++ b/drivers/gpio/gpio-loongson1.c @@ -0,0 +1,102 @@ +/* + * GPIO Driver for Loongson 1 SoC + * + * Copyright (C) 2015-2016 Zhang, Keguang <keguang.zhang@gmail.com> + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include <linux/gpio/driver.h> +#include <linux/platform_device.h> + +/* Loongson 1 GPIO Register Definitions */ +#define GPIO_CFG 0x0 +#define GPIO_DIR 0x10 +#define GPIO_DATA 0x20 +#define GPIO_OUTPUT 0x30 + +static void __iomem *gpio_reg_base; + +static int ls1x_gpio_request(struct gpio_chip *gc, unsigned int offset) +{ + unsigned long pinmask = gc->pin2mask(gc, offset); + unsigned long flags; + + spin_lock_irqsave(&gc->bgpio_lock, flags); + __raw_writel(__raw_readl(gpio_reg_base + GPIO_CFG) | pinmask, + gpio_reg_base + GPIO_CFG); + spin_unlock_irqrestore(&gc->bgpio_lock, flags); + + return 0; +} + +static void ls1x_gpio_free(struct gpio_chip *gc, unsigned int offset) +{ + unsigned long pinmask = gc->pin2mask(gc, offset); + unsigned long flags; + + spin_lock_irqsave(&gc->bgpio_lock, flags); + __raw_writel(__raw_readl(gpio_reg_base + GPIO_CFG) & ~pinmask, + gpio_reg_base + GPIO_CFG); + spin_unlock_irqrestore(&gc->bgpio_lock, flags); +} + +static int ls1x_gpio_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct gpio_chip *gc; + struct resource *res; + int ret; + + gc = devm_kzalloc(dev, sizeof(*gc), GFP_KERNEL); + if (!gc) + return -ENOMEM; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) { + dev_err(dev, "failed to get I/O memory\n"); + return -EINVAL; + } + + gpio_reg_base = devm_ioremap_resource(dev, res); + if (IS_ERR(gpio_reg_base)) + return PTR_ERR(gpio_reg_base); + + ret = bgpio_init(gc, dev, 4, gpio_reg_base + GPIO_DATA, + gpio_reg_base + GPIO_OUTPUT, NULL, + NULL, gpio_reg_base + GPIO_DIR, 0); + if (ret) + goto err; + + gc->owner = THIS_MODULE; + gc->request = ls1x_gpio_request; + gc->free = ls1x_gpio_free; + gc->base = pdev->id * 32; + + ret = devm_gpiochip_add_data(dev, gc, NULL); + if (ret) + goto err; + + platform_set_drvdata(pdev, gc); + dev_info(dev, "Loongson1 GPIO driver registered\n"); + + return 0; +err: + dev_err(dev, "failed to register GPIO device\n"); + return ret; +} + +static struct platform_driver ls1x_gpio_driver = { + .probe = ls1x_gpio_probe, + .driver = { + .name = "ls1x-gpio", + }, +}; + +module_platform_driver(ls1x_gpio_driver); + +MODULE_AUTHOR("Kelvin Cheung <keguang.zhang@gmail.com>"); +MODULE_DESCRIPTION("Loongson1 GPIO driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/gpio/gpio-mb86s7x.c b/drivers/gpio/gpio-mb86s7x.c index 7fffc1d6c055..d55af50e7034 100644 --- a/drivers/gpio/gpio-mb86s7x.c +++ b/drivers/gpio/gpio-mb86s7x.c @@ -17,7 +17,6 @@ #include <linux/io.h> #include <linux/init.h> #include <linux/clk.h> -#include <linux/module.h> #include <linux/err.h> #include <linux/errno.h> #include <linux/ioport.h> @@ -185,8 +184,6 @@ static int mb86s70_gpio_probe(struct platform_device *pdev) gchip->gc.parent = &pdev->dev; gchip->gc.base = -1; - platform_set_drvdata(pdev, gchip); - ret = gpiochip_add_data(&gchip->gc, gchip); if (ret) { dev_err(&pdev->dev, "couldn't register gpio driver\n"); @@ -210,7 +207,6 @@ static const struct of_device_id mb86s70_gpio_dt_ids[] = { { .compatible = "fujitsu,mb86s70-gpio" }, { /* sentinel */ } }; -MODULE_DEVICE_TABLE(of, mb86s70_gpio_dt_ids); static struct platform_driver mb86s70_gpio_driver = { .driver = { @@ -225,8 +221,4 @@ static int __init mb86s70_gpio_init(void) { return platform_driver_register(&mb86s70_gpio_driver); } -module_init(mb86s70_gpio_init); - -MODULE_DESCRIPTION("MB86S7x GPIO Driver"); -MODULE_ALIAS("platform:mb86s70-gpio"); -MODULE_LICENSE("GPL"); +device_initcall(mb86s70_gpio_init); diff --git a/drivers/gpio/gpio-mc9s08dz60.c b/drivers/gpio/gpio-mc9s08dz60.c index 14f252f9eb29..2fcad5b9cca5 100644 --- a/drivers/gpio/gpio-mc9s08dz60.c +++ b/drivers/gpio/gpio-mc9s08dz60.c @@ -15,7 +15,7 @@ */ #include <linux/kernel.h> -#include <linux/module.h> +#include <linux/init.h> #include <linux/slab.h> #include <linux/i2c.h> #include <linux/gpio.h> @@ -111,8 +111,6 @@ static const struct i2c_device_id mc9s08dz60_id[] = { {}, }; -MODULE_DEVICE_TABLE(i2c, mc9s08dz60_id); - static struct i2c_driver mc9s08dz60_i2c_driver = { .driver = { .name = "mc9s08dz60", @@ -120,10 +118,4 @@ static struct i2c_driver mc9s08dz60_i2c_driver = { .probe = mc9s08dz60_probe, .id_table = mc9s08dz60_id, }; - -module_i2c_driver(mc9s08dz60_i2c_driver); - -MODULE_AUTHOR("Freescale Semiconductor, Inc. " - "Wu Guoxing <b39297@freescale.com>"); -MODULE_DESCRIPTION("mc9s08dz60 gpio function on mx35 3ds board"); -MODULE_LICENSE("GPL v2"); +builtin_i2c_driver(mc9s08dz60_i2c_driver); diff --git a/drivers/gpio/gpio-mcp23s08.c b/drivers/gpio/gpio-mcp23s08.c index 47e486910aab..ac22efc1840e 100644 --- a/drivers/gpio/gpio-mcp23s08.c +++ b/drivers/gpio/gpio-mcp23s08.c @@ -77,7 +77,6 @@ struct mcp23s08 { /* lock protects the cached values */ struct mutex lock; struct mutex irq_lock; - struct irq_domain *irq_domain; struct gpio_chip chip; @@ -96,11 +95,6 @@ struct mcp23s08_driver_data { struct mcp23s08 chip[]; }; -/* This lock class tells lockdep that GPIO irqs are in a different - * category than their parents, so it won't report false recursion. - */ -static struct lock_class_key gpio_lock_class; - /*----------------------------------------------------------------------*/ #if IS_ENABLED(CONFIG_I2C) @@ -368,8 +362,9 @@ static irqreturn_t mcp23s08_irq(int irq, void *data) for (i = 0; i < mcp->chip.ngpio; i++) { if ((BIT(i) & mcp->cache[MCP_INTF]) && ((BIT(i) & intcap & mcp->irq_rise) || - (mcp->irq_fall & ~intcap & BIT(i)))) { - child_irq = irq_find_mapping(mcp->irq_domain, i); + (mcp->irq_fall & ~intcap & BIT(i)) || + (BIT(i) & mcp->cache[MCP_INTCON]))) { + child_irq = irq_find_mapping(mcp->chip.irqdomain, i); handle_nested_irq(child_irq); } } @@ -377,16 +372,10 @@ static irqreturn_t mcp23s08_irq(int irq, void *data) return IRQ_HANDLED; } -static int mcp23s08_gpio_to_irq(struct gpio_chip *chip, unsigned offset) -{ - struct mcp23s08 *mcp = gpiochip_get_data(chip); - - return irq_find_mapping(mcp->irq_domain, offset); -} - static void mcp23s08_irq_mask(struct irq_data *data) { - struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data); + struct gpio_chip *gc = irq_data_get_irq_chip_data(data); + struct mcp23s08 *mcp = gpiochip_get_data(gc); unsigned int pos = data->hwirq; mcp->cache[MCP_GPINTEN] &= ~BIT(pos); @@ -394,7 +383,8 @@ static void mcp23s08_irq_mask(struct irq_data *data) static void mcp23s08_irq_unmask(struct irq_data *data) { - struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data); + struct gpio_chip *gc = irq_data_get_irq_chip_data(data); + struct mcp23s08 *mcp = gpiochip_get_data(gc); unsigned int pos = data->hwirq; mcp->cache[MCP_GPINTEN] |= BIT(pos); @@ -402,7 +392,8 @@ static void mcp23s08_irq_unmask(struct irq_data *data) static int mcp23s08_irq_set_type(struct irq_data *data, unsigned int type) { - struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data); + struct gpio_chip *gc = irq_data_get_irq_chip_data(data); + struct mcp23s08 *mcp = gpiochip_get_data(gc); unsigned int pos = data->hwirq; int status = 0; @@ -418,6 +409,12 @@ static int mcp23s08_irq_set_type(struct irq_data *data, unsigned int type) mcp->cache[MCP_INTCON] &= ~BIT(pos); mcp->irq_rise &= ~BIT(pos); mcp->irq_fall |= BIT(pos); + } else if (type & IRQ_TYPE_LEVEL_HIGH) { + mcp->cache[MCP_INTCON] |= BIT(pos); + mcp->cache[MCP_DEFVAL] &= ~BIT(pos); + } else if (type & IRQ_TYPE_LEVEL_LOW) { + mcp->cache[MCP_INTCON] |= BIT(pos); + mcp->cache[MCP_DEFVAL] |= BIT(pos); } else return -EINVAL; @@ -426,14 +423,16 @@ static int mcp23s08_irq_set_type(struct irq_data *data, unsigned int type) static void mcp23s08_irq_bus_lock(struct irq_data *data) { - struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data); + struct gpio_chip *gc = irq_data_get_irq_chip_data(data); + struct mcp23s08 *mcp = gpiochip_get_data(gc); mutex_lock(&mcp->irq_lock); } static void mcp23s08_irq_bus_unlock(struct irq_data *data) { - struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data); + struct gpio_chip *gc = irq_data_get_irq_chip_data(data); + struct mcp23s08 *mcp = gpiochip_get_data(gc); mutex_lock(&mcp->lock); mcp->ops->write(mcp, MCP_GPINTEN, mcp->cache[MCP_GPINTEN]); @@ -443,27 +442,6 @@ static void mcp23s08_irq_bus_unlock(struct irq_data *data) mutex_unlock(&mcp->irq_lock); } -static int mcp23s08_irq_reqres(struct irq_data *data) -{ - struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data); - - if (gpiochip_lock_as_irq(&mcp->chip, data->hwirq)) { - dev_err(mcp->chip.parent, - "unable to lock HW IRQ %lu for IRQ usage\n", - data->hwirq); - return -EINVAL; - } - - return 0; -} - -static void mcp23s08_irq_relres(struct irq_data *data) -{ - struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data); - - gpiochip_unlock_as_irq(&mcp->chip, data->hwirq); -} - static struct irq_chip mcp23s08_irq_chip = { .name = "gpio-mcp23xxx", .irq_mask = mcp23s08_irq_mask, @@ -471,24 +449,16 @@ static struct irq_chip mcp23s08_irq_chip = { .irq_set_type = mcp23s08_irq_set_type, .irq_bus_lock = mcp23s08_irq_bus_lock, .irq_bus_sync_unlock = mcp23s08_irq_bus_unlock, - .irq_request_resources = mcp23s08_irq_reqres, - .irq_release_resources = mcp23s08_irq_relres, }; static int mcp23s08_irq_setup(struct mcp23s08 *mcp) { struct gpio_chip *chip = &mcp->chip; - int err, irq, j; + int err; unsigned long irqflags = IRQF_ONESHOT | IRQF_SHARED; mutex_init(&mcp->irq_lock); - mcp->irq_domain = irq_domain_add_linear(chip->parent->of_node, - chip->ngpio, - &irq_domain_simple_ops, mcp); - if (!mcp->irq_domain) - return -ENODEV; - if (mcp->irq_active_high) irqflags |= IRQF_TRIGGER_HIGH; else @@ -503,30 +473,23 @@ static int mcp23s08_irq_setup(struct mcp23s08 *mcp) return err; } - chip->to_irq = mcp23s08_gpio_to_irq; - - for (j = 0; j < mcp->chip.ngpio; j++) { - irq = irq_create_mapping(mcp->irq_domain, j); - irq_set_lockdep_class(irq, &gpio_lock_class); - irq_set_chip_data(irq, mcp); - irq_set_chip(irq, &mcp23s08_irq_chip); - irq_set_nested_thread(irq, true); - irq_set_noprobe(irq); + err = gpiochip_irqchip_add(chip, + &mcp23s08_irq_chip, + 0, + handle_simple_irq, + IRQ_TYPE_NONE); + if (err) { + dev_err(chip->parent, + "could not connect irqchip to gpiochip: %d\n", err); + return err; } - return 0; -} -static void mcp23s08_irq_teardown(struct mcp23s08 *mcp) -{ - unsigned int irq, i; + gpiochip_set_chained_irqchip(chip, + &mcp23s08_irq_chip, + mcp->irq, + NULL); - for (i = 0; i < mcp->chip.ngpio; i++) { - irq = irq_find_mapping(mcp->irq_domain, i); - if (irq > 0) - irq_dispose_mapping(irq); - } - - irq_domain_remove(mcp->irq_domain); + return 0; } /*----------------------------------------------------------------------*/ @@ -721,7 +684,6 @@ static int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev, if (mcp->irq && mcp->irq_controller) { status = mcp23s08_irq_setup(mcp); if (status) { - mcp23s08_irq_teardown(mcp); goto fail; } } @@ -847,9 +809,6 @@ static int mcp230xx_remove(struct i2c_client *client) { struct mcp23s08 *mcp = i2c_get_clientdata(client); - if (client->irq && mcp->irq_controller) - mcp23s08_irq_teardown(mcp); - gpiochip_remove(&mcp->chip); kfree(mcp); @@ -1017,8 +976,6 @@ static int mcp23s08_remove(struct spi_device *spi) if (!data->mcp[addr]) continue; - if (spi->irq && data->mcp[addr]->irq_controller) - mcp23s08_irq_teardown(data->mcp[addr]); gpiochip_remove(&data->mcp[addr]->chip); } diff --git a/drivers/gpio/gpio-menz127.c b/drivers/gpio/gpio-menz127.c index c5c9599a3a71..cc103aff45e4 100644 --- a/drivers/gpio/gpio-menz127.c +++ b/drivers/gpio/gpio-menz127.c @@ -35,7 +35,6 @@ struct men_z127_gpio { struct gpio_chip gc; void __iomem *reg_base; - struct mcb_device *mdev; struct resource *mem; }; @@ -43,7 +42,7 @@ static int men_z127_debounce(struct gpio_chip *gc, unsigned gpio, unsigned debounce) { struct men_z127_gpio *priv = gpiochip_get_data(gc); - struct device *dev = &priv->mdev->dev; + struct device *dev = gc->parent; unsigned int rnd; u32 db_en, db_cnt; @@ -88,21 +87,25 @@ static int men_z127_debounce(struct gpio_chip *gc, unsigned gpio, return 0; } -static int men_z127_request(struct gpio_chip *gc, unsigned gpio_pin) +static int men_z127_set_single_ended(struct gpio_chip *gc, + unsigned offset, + enum single_ended_mode mode) { struct men_z127_gpio *priv = gpiochip_get_data(gc); u32 od_en; - if (gpio_pin >= gc->ngpio) - return -EINVAL; + if (mode != LINE_MODE_OPEN_DRAIN && + mode != LINE_MODE_PUSH_PULL) + return -ENOTSUPP; spin_lock(&gc->bgpio_lock); od_en = readl(priv->reg_base + MEN_Z127_ODER); - if (gpiochip_line_is_open_drain(gc, gpio_pin)) - od_en |= BIT(gpio_pin); + if (mode == LINE_MODE_OPEN_DRAIN) + od_en |= BIT(offset); else - od_en &= ~BIT(gpio_pin); + /* Implicitly LINE_MODE_PUSH_PULL */ + od_en &= ~BIT(offset); writel(od_en, priv->reg_base + MEN_Z127_ODER); spin_unlock(&gc->bgpio_lock); @@ -135,7 +138,6 @@ static int men_z127_probe(struct mcb_device *mdev, goto err_release; } - men_z127_gpio->mdev = mdev; mcb_set_drvdata(mdev, men_z127_gpio); ret = bgpio_init(&men_z127_gpio->gc, &mdev->dev, 4, @@ -148,7 +150,7 @@ static int men_z127_probe(struct mcb_device *mdev, goto err_unmap; men_z127_gpio->gc.set_debounce = men_z127_debounce; - men_z127_gpio->gc.request = men_z127_request; + men_z127_gpio->gc.set_single_ended = men_z127_set_single_ended; ret = gpiochip_add_data(&men_z127_gpio->gc, men_z127_gpio); if (ret) { diff --git a/drivers/gpio/gpio-generic.c b/drivers/gpio/gpio-mmio.c index 54cddfa98f50..6c1cb3b8c02c 100644 --- a/drivers/gpio/gpio-generic.c +++ b/drivers/gpio/gpio-mmio.c @@ -549,7 +549,7 @@ int bgpio_init(struct gpio_chip *gc, struct device *dev, } EXPORT_SYMBOL_GPL(bgpio_init); -#ifdef CONFIG_GPIO_GENERIC_PLATFORM +#if IS_ENABLED(CONFIG_GPIO_GENERIC_PLATFORM) static void __iomem *bgpio_map(struct platform_device *pdev, const char *name, diff --git a/drivers/gpio/gpio-moxart.c b/drivers/gpio/gpio-moxart.c index f02d0b490978..d58d38906ba6 100644 --- a/drivers/gpio/gpio-moxart.c +++ b/drivers/gpio/gpio-moxart.c @@ -15,7 +15,6 @@ #include <linux/irq.h> #include <linux/io.h> #include <linux/platform_device.h> -#include <linux/module.h> #include <linux/of_address.h> #include <linux/of_gpio.h> #include <linux/pinctrl/consumer.h> @@ -82,8 +81,4 @@ static struct platform_driver moxart_gpio_driver = { }, .probe = moxart_gpio_probe, }; -module_platform_driver(moxart_gpio_driver); - -MODULE_DESCRIPTION("MOXART GPIO chip driver"); -MODULE_LICENSE("GPL"); -MODULE_AUTHOR("Jonas Jensen <jonas.jensen@gmail.com>"); +builtin_platform_driver(moxart_gpio_driver); diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c index 11c6582ef0a6..cd5dc27320a2 100644 --- a/drivers/gpio/gpio-mvebu.c +++ b/drivers/gpio/gpio-mvebu.c @@ -34,7 +34,7 @@ */ #include <linux/err.h> -#include <linux/module.h> +#include <linux/init.h> #include <linux/gpio.h> #include <linux/irq.h> #include <linux/slab.h> @@ -557,7 +557,6 @@ static const struct of_device_id mvebu_gpio_of_match[] = { /* sentinel */ }, }; -MODULE_DEVICE_TABLE(of, mvebu_gpio_of_match); static int mvebu_gpio_suspend(struct platform_device *pdev, pm_message_t state) { @@ -838,4 +837,4 @@ static struct platform_driver mvebu_gpio_driver = { .suspend = mvebu_gpio_suspend, .resume = mvebu_gpio_resume, }; -module_platform_driver(mvebu_gpio_driver); +builtin_platform_driver(mvebu_gpio_driver); diff --git a/drivers/gpio/gpio-octeon.c b/drivers/gpio/gpio-octeon.c index 47aead1ed1cc..96a8a8cb2729 100644 --- a/drivers/gpio/gpio-octeon.c +++ b/drivers/gpio/gpio-octeon.c @@ -83,6 +83,7 @@ static int octeon_gpio_probe(struct platform_device *pdev) struct octeon_gpio *gpio; struct gpio_chip *chip; struct resource *res_mem; + void __iomem *reg_base; int err = 0; gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL); @@ -91,21 +92,11 @@ static int octeon_gpio_probe(struct platform_device *pdev) chip = &gpio->chip; res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (res_mem == NULL) { - dev_err(&pdev->dev, "found no memory resource\n"); - err = -ENXIO; - goto out; - } - if (!devm_request_mem_region(&pdev->dev, res_mem->start, - resource_size(res_mem), - res_mem->name)) { - dev_err(&pdev->dev, "request_mem_region failed\n"); - err = -ENXIO; - goto out; - } - gpio->register_base = (u64)devm_ioremap(&pdev->dev, res_mem->start, - resource_size(res_mem)); + reg_base = devm_ioremap_resource(&pdev->dev, res_mem); + if (IS_ERR(reg_base)) + return PTR_ERR(reg_base); + gpio->register_base = (u64)reg_base; pdev->dev.platform_data = chip; chip->label = "octeon-gpio"; chip->parent = &pdev->dev; @@ -119,14 +110,13 @@ static int octeon_gpio_probe(struct platform_device *pdev) chip->set = octeon_gpio_set; err = devm_gpiochip_add_data(&pdev->dev, chip, gpio); if (err) - goto out; + return err; dev_info(&pdev->dev, "OCTEON GPIO driver probed.\n"); -out: - return err; + return 0; } -static struct of_device_id octeon_gpio_match[] = { +static const struct of_device_id octeon_gpio_match[] = { { .compatible = "cavium,octeon-3860-gpio", }, diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index 551dfa9d97ab..b98ede78c9d8 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c @@ -611,51 +611,12 @@ static inline void omap_set_gpio_irqenable(struct gpio_bank *bank, omap_disable_gpio_irqbank(bank, BIT(offset)); } -/* - * Note that ENAWAKEUP needs to be enabled in GPIO_SYSCONFIG register. - * 1510 does not seem to have a wake-up register. If JTAG is connected - * to the target, system will wake up always on GPIO events. While - * system is running all registered GPIO interrupts need to have wake-up - * enabled. When system is suspended, only selected GPIO interrupts need - * to have wake-up enabled. - */ -static int omap_set_gpio_wakeup(struct gpio_bank *bank, unsigned offset, - int enable) -{ - u32 gpio_bit = BIT(offset); - unsigned long flags; - - if (bank->non_wakeup_gpios & gpio_bit) { - dev_err(bank->chip.parent, - "Unable to modify wakeup on non-wakeup GPIO%d\n", - offset); - return -EINVAL; - } - - raw_spin_lock_irqsave(&bank->lock, flags); - if (enable) - bank->context.wake_en |= gpio_bit; - else - bank->context.wake_en &= ~gpio_bit; - - writel_relaxed(bank->context.wake_en, bank->base + bank->regs->wkup_en); - raw_spin_unlock_irqrestore(&bank->lock, flags); - - return 0; -} - /* Use disable_irq_wake() and enable_irq_wake() functions from drivers */ static int omap_gpio_wake_enable(struct irq_data *d, unsigned int enable) { struct gpio_bank *bank = omap_irq_data_get_bank(d); - unsigned offset = d->hwirq; - int ret; - ret = omap_set_gpio_wakeup(bank, offset, enable); - if (!ret) - ret = irq_set_irq_wake(bank->irq, enable); - - return ret; + return irq_set_irq_wake(bank->irq, enable); } static int omap_gpio_request(struct gpio_chip *chip, unsigned offset) @@ -1187,6 +1148,7 @@ static int omap_gpio_probe(struct platform_device *pdev) irqc->irq_bus_lock = omap_gpio_irq_bus_lock, irqc->irq_bus_sync_unlock = gpio_irq_bus_sync_unlock, irqc->name = dev_name(&pdev->dev); + irqc->flags = IRQCHIP_MASK_ON_SUSPEND; bank->irq = platform_get_irq(pdev, 0); if (bank->irq <= 0) { diff --git a/drivers/gpio/gpio-palmas.c b/drivers/gpio/gpio-palmas.c index 6f27b3d94d53..e248707ca39e 100644 --- a/drivers/gpio/gpio-palmas.c +++ b/drivers/gpio/gpio-palmas.c @@ -20,7 +20,7 @@ #include <linux/gpio.h> #include <linux/kernel.h> -#include <linux/module.h> +#include <linux/init.h> #include <linux/mfd/palmas.h> #include <linux/of.h> #include <linux/of_device.h> @@ -218,14 +218,3 @@ static int __init palmas_gpio_init(void) return platform_driver_register(&palmas_gpio_driver); } subsys_initcall(palmas_gpio_init); - -static void __exit palmas_gpio_exit(void) -{ - platform_driver_unregister(&palmas_gpio_driver); -} -module_exit(palmas_gpio_exit); - -MODULE_ALIAS("platform:palmas-gpio"); -MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>"); -MODULE_DESCRIPTION("GPIO driver for TI Palmas series PMICs"); -MODULE_LICENSE("GPL v2"); diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index e66084c295fb..5e3be32ebb8d 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -38,8 +38,13 @@ #define PCA957X_MSK 6 #define PCA957X_INTS 7 +#define PCAL953X_IN_LATCH 34 +#define PCAL953X_INT_MASK 37 +#define PCAL953X_INT_STAT 38 + #define PCA_GPIO_MASK 0x00FF #define PCA_INT 0x0100 +#define PCA_PCAL 0x0200 #define PCA953X_TYPE 0x1000 #define PCA957X_TYPE 0x2000 #define PCA_TYPE_MASK 0xF000 @@ -77,7 +82,7 @@ static const struct i2c_device_id pca953x_id[] = { MODULE_DEVICE_TABLE(i2c, pca953x_id); static const struct acpi_device_id pca953x_acpi_ids[] = { - { "INT3491", 16 | PCA953X_TYPE | PCA_INT, }, + { "INT3491", 16 | PCA953X_TYPE | PCA_INT | PCA_PCAL, }, { } }; MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids); @@ -437,6 +442,18 @@ static void pca953x_irq_bus_sync_unlock(struct irq_data *d) struct pca953x_chip *chip = gpiochip_get_data(gc); u8 new_irqs; int level, i; + u8 invert_irq_mask[MAX_BANK]; + + if (chip->driver_data & PCA_PCAL) { + /* Enable latch on interrupt-enabled inputs */ + pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask); + + for (i = 0; i < NBANK(chip); i++) + invert_irq_mask[i] = ~chip->irq_mask[i]; + + /* Unmask enabled interrupts */ + pca953x_write_regs(chip, PCAL953X_INT_MASK, invert_irq_mask); + } /* Look for any newly setup interrupt */ for (i = 0; i < NBANK(chip); i++) { @@ -498,6 +515,29 @@ static bool pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending) u8 trigger[MAX_BANK]; int ret, i, offset = 0; + if (chip->driver_data & PCA_PCAL) { + /* Read the current interrupt status from the device */ + ret = pca953x_read_regs(chip, PCAL953X_INT_STAT, trigger); + if (ret) + return false; + + /* Check latched inputs and clear interrupt status */ + ret = pca953x_read_regs(chip, PCA953X_INPUT, cur_stat); + if (ret) + return false; + + for (i = 0; i < NBANK(chip); i++) { + /* Apply filter for rising/falling edge selection */ + pending[i] = (~cur_stat[i] & chip->irq_trig_fall[i]) | + (cur_stat[i] & chip->irq_trig_raise[i]); + pending[i] &= trigger[i]; + if (pending[i]) + pending_seen = true; + } + + return pending_seen; + } + switch (chip->chip_type) { case PCA953X_TYPE: offset = PCA953X_INPUT; diff --git a/drivers/gpio/gpio-pl061.c b/drivers/gpio/gpio-pl061.c index 5cb38212bbc0..6e3c1430616f 100644 --- a/drivers/gpio/gpio-pl061.c +++ b/drivers/gpio/gpio-pl061.c @@ -1,6 +1,8 @@ /* * Copyright (C) 2008, 2009 Provigent Ltd. * + * Author: Baruch Siach <baruch@tkos.co.il> + * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. @@ -11,7 +13,7 @@ */ #include <linux/spinlock.h> #include <linux/errno.h> -#include <linux/module.h> +#include <linux/init.h> #include <linux/io.h> #include <linux/ioport.h> #include <linux/interrupt.h> @@ -59,15 +61,19 @@ struct pl061_gpio { #endif }; +static int pl061_get_direction(struct gpio_chip *gc, unsigned offset) +{ + struct pl061_gpio *chip = gpiochip_get_data(gc); + + return !(readb(chip->base + GPIODIR) & BIT(offset)); +} + static int pl061_direction_input(struct gpio_chip *gc, unsigned offset) { struct pl061_gpio *chip = gpiochip_get_data(gc); unsigned long flags; unsigned char gpiodir; - if (offset >= gc->ngpio) - return -EINVAL; - spin_lock_irqsave(&chip->lock, flags); gpiodir = readb(chip->base + GPIODIR); gpiodir &= ~(BIT(offset)); @@ -84,9 +90,6 @@ static int pl061_direction_output(struct gpio_chip *gc, unsigned offset, unsigned long flags; unsigned char gpiodir; - if (offset >= gc->ngpio) - return -EINVAL; - spin_lock_irqsave(&chip->lock, flags); writeb(!!value << offset, chip->base + (BIT(offset + 2))); gpiodir = readb(chip->base + GPIODIR); @@ -319,6 +322,7 @@ static int pl061_probe(struct amba_device *adev, const struct amba_id *id) chip->gc.free = gpiochip_generic_free; } + chip->gc.get_direction = pl061_get_direction; chip->gc.direction_input = pl061_direction_input; chip->gc.direction_output = pl061_direction_output; chip->gc.get = pl061_get_value; @@ -429,8 +433,6 @@ static struct amba_id pl061_ids[] = { { 0, 0 }, }; -MODULE_DEVICE_TABLE(amba, pl061_ids); - static struct amba_driver pl061_gpio_driver = { .drv = { .name = "pl061_gpio", @@ -446,8 +448,4 @@ static int __init pl061_gpio_init(void) { return amba_driver_register(&pl061_gpio_driver); } -module_init(pl061_gpio_init); - -MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>"); -MODULE_DESCRIPTION("PL061 GPIO driver"); -MODULE_LICENSE("GPL"); +device_initcall(pl061_gpio_init); diff --git a/drivers/gpio/gpio-rc5t583.c b/drivers/gpio/gpio-rc5t583.c index 1d6100fa312a..3b4dc1a9a68d 100644 --- a/drivers/gpio/gpio-rc5t583.c +++ b/drivers/gpio/gpio-rc5t583.c @@ -23,7 +23,6 @@ #include <linux/init.h> #include <linux/kernel.h> #include <linux/slab.h> -#include <linux/module.h> #include <linux/platform_device.h> #include <linux/device.h> #include <linux/gpio.h> @@ -152,14 +151,3 @@ static int __init rc5t583_gpio_init(void) return platform_driver_register(&rc5t583_gpio_driver); } subsys_initcall(rc5t583_gpio_init); - -static void __exit rc5t583_gpio_exit(void) -{ - platform_driver_unregister(&rc5t583_gpio_driver); -} -module_exit(rc5t583_gpio_exit); - -MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>"); -MODULE_DESCRIPTION("GPIO interface for RC5T583"); -MODULE_LICENSE("GPL v2"); -MODULE_ALIAS("platform:rc5t583-gpio"); diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c index 4d9a315cfd43..681c93fb9e70 100644 --- a/drivers/gpio/gpio-rcar.c +++ b/drivers/gpio/gpio-rcar.c @@ -284,6 +284,25 @@ static void gpio_rcar_set(struct gpio_chip *chip, unsigned offset, int value) spin_unlock_irqrestore(&p->lock, flags); } +static void gpio_rcar_set_multiple(struct gpio_chip *chip, unsigned long *mask, + unsigned long *bits) +{ + struct gpio_rcar_priv *p = gpiochip_get_data(chip); + unsigned long flags; + u32 val, bankmask; + + bankmask = mask[0] & GENMASK(chip->ngpio - 1, 0); + if (!bankmask) + return; + + spin_lock_irqsave(&p->lock, flags); + val = gpio_rcar_read(p, OUTDT); + val &= ~bankmask; + val |= (bankmask & bits[0]); + gpio_rcar_write(p, OUTDT, val); + spin_unlock_irqrestore(&p->lock, flags); +} + static int gpio_rcar_direction_output(struct gpio_chip *chip, unsigned offset, int value) { @@ -425,6 +444,7 @@ static int gpio_rcar_probe(struct platform_device *pdev) gpio_chip->get = gpio_rcar_get; gpio_chip->direction_output = gpio_rcar_direction_output; gpio_chip->set = gpio_rcar_set; + gpio_chip->set_multiple = gpio_rcar_set_multiple; gpio_chip->label = name; gpio_chip->parent = dev; gpio_chip->owner = THIS_MODULE; diff --git a/drivers/gpio/gpio-sodaville.c b/drivers/gpio/gpio-sodaville.c index e3cb6772f6ec..7da9e6c4546a 100644 --- a/drivers/gpio/gpio-sodaville.c +++ b/drivers/gpio/gpio-sodaville.c @@ -3,6 +3,8 @@ * * Copyright (c) 2010, 2011 Intel Corporation * + * Author: Hans J. Koch <hjk@linutronix.de> + * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License 2 as published * by the Free Software Foundation. @@ -15,7 +17,6 @@ #include <linux/irq.h> #include <linux/interrupt.h> #include <linux/kernel.h> -#include <linux/module.h> #include <linux/pci.h> #include <linux/platform_device.h> #include <linux/of_irq.h> @@ -257,34 +258,17 @@ done: return ret; } -static void sdv_gpio_remove(struct pci_dev *pdev) -{ - struct sdv_gpio_chip_data *sd = pci_get_drvdata(pdev); - - free_irq(pdev->irq, sd); - irq_free_descs(sd->irq_base, SDV_NUM_PUB_GPIOS); - - gpiochip_remove(&sd->chip); - pci_release_region(pdev, GPIO_BAR); - iounmap(sd->gpio_pub_base); - pci_disable_device(pdev); - kfree(sd); -} - static const struct pci_device_id sdv_gpio_pci_ids[] = { { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_SDV_GPIO) }, { 0, }, }; static struct pci_driver sdv_gpio_driver = { + .driver = { + .suppress_bind_attrs = true, + }, .name = DRV_NAME, .id_table = sdv_gpio_pci_ids, .probe = sdv_gpio_probe, - .remove = sdv_gpio_remove, }; - -module_pci_driver(sdv_gpio_driver); - -MODULE_AUTHOR("Hans J. Koch <hjk@linutronix.de>"); -MODULE_DESCRIPTION("GPIO interface for Intel Sodaville SoCs"); -MODULE_LICENSE("GPL v2"); +builtin_pci_driver(sdv_gpio_driver); diff --git a/drivers/gpio/gpio-sta2x11.c b/drivers/gpio/gpio-sta2x11.c index 0d5b8c525dd9..853ca23cad88 100644 --- a/drivers/gpio/gpio-sta2x11.c +++ b/drivers/gpio/gpio-sta2x11.c @@ -20,7 +20,7 @@ * */ -#include <linux/module.h> +#include <linux/init.h> #include <linux/kernel.h> #include <linux/slab.h> #include <linux/gpio.h> @@ -432,8 +432,4 @@ static struct platform_driver sta2x11_gpio_platform_driver = { }, .probe = gsta_probe, }; - -module_platform_driver(sta2x11_gpio_platform_driver); - -MODULE_LICENSE("GPL v2"); -MODULE_DESCRIPTION("sta2x11_gpio GPIO driver"); +builtin_platform_driver(sta2x11_gpio_platform_driver); diff --git a/drivers/gpio/gpio-stmpe.c b/drivers/gpio/gpio-stmpe.c index 5197edf1acfd..6f7af28b8966 100644 --- a/drivers/gpio/gpio-stmpe.c +++ b/drivers/gpio/gpio-stmpe.c @@ -5,7 +5,6 @@ * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson */ -#include <linux/module.h> #include <linux/init.h> #include <linux/platform_device.h> #include <linux/slab.h> @@ -413,23 +412,13 @@ out_free: return ret; } -static int stmpe_gpio_remove(struct platform_device *pdev) -{ - struct stmpe_gpio *stmpe_gpio = platform_get_drvdata(pdev); - struct stmpe *stmpe = stmpe_gpio->stmpe; - - gpiochip_remove(&stmpe_gpio->chip); - stmpe_disable(stmpe, STMPE_BLOCK_GPIO); - kfree(stmpe_gpio); - - return 0; -} - static struct platform_driver stmpe_gpio_driver = { - .driver.name = "stmpe-gpio", - .driver.owner = THIS_MODULE, + .driver = { + .suppress_bind_attrs = true, + .name = "stmpe-gpio", + .owner = THIS_MODULE, + }, .probe = stmpe_gpio_probe, - .remove = stmpe_gpio_remove, }; static int __init stmpe_gpio_init(void) @@ -437,13 +426,3 @@ static int __init stmpe_gpio_init(void) return platform_driver_register(&stmpe_gpio_driver); } subsys_initcall(stmpe_gpio_init); - -static void __exit stmpe_gpio_exit(void) -{ - platform_driver_unregister(&stmpe_gpio_driver); -} -module_exit(stmpe_gpio_exit); - -MODULE_LICENSE("GPL v2"); -MODULE_DESCRIPTION("STMPExxxx GPIO driver"); -MODULE_AUTHOR("Rabin Vincent <rabin.vincent@stericsson.com>"); diff --git a/drivers/gpio/gpio-sx150x.c b/drivers/gpio/gpio-sx150x.c index d387eb524bf3..a177ebd921d5 100644 --- a/drivers/gpio/gpio-sx150x.c +++ b/drivers/gpio/gpio-sx150x.c @@ -1,5 +1,9 @@ /* Copyright (c) 2010, Code Aurora Forum. All rights reserved. * + * Driver for Semtech SX150X I2C GPIO Expanders + * + * Author: Gregory Bean <gbean@codeaurora.org> + * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and * only version 2 as published by the Free Software Foundation. @@ -19,10 +23,8 @@ #include <linux/init.h> #include <linux/interrupt.h> #include <linux/irq.h> -#include <linux/module.h> #include <linux/mutex.h> #include <linux/slab.h> -#include <linux/i2c/sx150x.h> #include <linux/of.h> #include <linux/of_address.h> #include <linux/of_irq.h> @@ -82,6 +84,57 @@ struct sx150x_device_data { } pri; }; +/** + * struct sx150x_platform_data - config data for SX150x driver + * @gpio_base: The index number of the first GPIO assigned to this + * GPIO expander. The expander will create a block of + * consecutively numbered gpios beginning at the given base, + * with the size of the block depending on the model of the + * expander chip. + * @oscio_is_gpo: If set to true, the driver will configure OSCIO as a GPO + * instead of as an oscillator, increasing the size of the + * GP(I)O pool created by this expander by one. The + * output-only GPO pin will be added at the end of the block. + * @io_pullup_ena: A bit-mask which enables or disables the pull-up resistor + * for each IO line in the expander. Setting the bit at + * position n will enable the pull-up for the IO at + * the corresponding offset. For chips with fewer than + * 16 IO pins, high-end bits are ignored. + * @io_pulldn_ena: A bit-mask which enables-or disables the pull-down + * resistor for each IO line in the expander. Setting the + * bit at position n will enable the pull-down for the IO at + * the corresponding offset. For chips with fewer than + * 16 IO pins, high-end bits are ignored. + * @io_polarity: A bit-mask which enables polarity inversion for each IO line + * in the expander. Setting the bit at position n inverts + * the polarity of that IO line, while clearing it results + * in normal polarity. For chips with fewer than 16 IO pins, + * high-end bits are ignored. + * @irq_summary: The 'summary IRQ' line to which the GPIO expander's INT line + * is connected, via which it reports interrupt events + * across all GPIO lines. This must be a real, + * pre-existing IRQ line. + * Setting this value < 0 disables the irq_chip functionality + * of the driver. + * @irq_base: The first 'virtual IRQ' line at which our block of GPIO-based + * IRQ lines will appear. Similarly to gpio_base, the expander + * will create a block of irqs beginning at this number. + * This value is ignored if irq_summary is < 0. + * @reset_during_probe: If set to true, the driver will trigger a full + * reset of the chip at the beginning of the probe + * in order to place it in a known state. + */ +struct sx150x_platform_data { + unsigned gpio_base; + bool oscio_is_gpo; + u16 io_pullup_ena; + u16 io_pulldn_ena; + u16 io_polarity; + int irq_summary; + unsigned irq_base; + bool reset_during_probe; +}; + struct sx150x_chip { struct gpio_chip gpio_chip; struct i2c_client *client; @@ -354,6 +407,32 @@ static void sx150x_gpio_set(struct gpio_chip *gc, unsigned offset, int val) mutex_unlock(&chip->lock); } +static int sx150x_gpio_set_single_ended(struct gpio_chip *gc, + unsigned offset, + enum single_ended_mode mode) +{ + struct sx150x_chip *chip = gpiochip_get_data(gc); + + /* On the SX160X 789 we can set open drain */ + if (chip->dev_cfg->model != SX150X_789) + return -ENOTSUPP; + + if (mode == LINE_MODE_PUSH_PULL) + return sx150x_write_cfg(chip, + offset, + 1, + chip->dev_cfg->pri.x789.reg_drain, + 0); + + if (mode == LINE_MODE_OPEN_DRAIN) + return sx150x_write_cfg(chip, + offset, + 1, + chip->dev_cfg->pri.x789.reg_drain, + 1); + return -ENOTSUPP; +} + static int sx150x_gpio_direction_input(struct gpio_chip *gc, unsigned offset) { struct sx150x_chip *chip = gpiochip_get_data(gc); @@ -508,6 +587,7 @@ static void sx150x_init_chip(struct sx150x_chip *chip, chip->gpio_chip.direction_output = sx150x_gpio_direction_output; chip->gpio_chip.get = sx150x_gpio_get; chip->gpio_chip.set = sx150x_gpio_set; + chip->gpio_chip.set_single_ended = sx150x_gpio_set_single_ended; chip->gpio_chip.base = pdata->gpio_base; chip->gpio_chip.can_sleep = true; chip->gpio_chip.ngpio = chip->dev_cfg->ngpios; @@ -597,12 +677,6 @@ static int sx150x_init_hw(struct sx150x_chip *chip, if (chip->dev_cfg->model == SX150X_789) { err = sx150x_init_io(chip, - chip->dev_cfg->pri.x789.reg_drain, - pdata->io_open_drain_ena); - if (err < 0) - return err; - - err = sx150x_init_io(chip, chip->dev_cfg->pri.x789.reg_polarity, pdata->io_polarity); if (err < 0) @@ -718,13 +792,3 @@ static int __init sx150x_init(void) return i2c_add_driver(&sx150x_driver); } subsys_initcall(sx150x_init); - -static void __exit sx150x_exit(void) -{ - return i2c_del_driver(&sx150x_driver); -} -module_exit(sx150x_exit); - -MODULE_AUTHOR("Gregory Bean <gbean@codeaurora.org>"); -MODULE_DESCRIPTION("Driver for Semtech SX150X I2C GPIO Expanders"); -MODULE_LICENSE("GPL v2"); diff --git a/drivers/gpio/gpio-tc3589x.c b/drivers/gpio/gpio-tc3589x.c index 4f566e6b81f1..2e35ed3abbcf 100644 --- a/drivers/gpio/gpio-tc3589x.c +++ b/drivers/gpio/gpio-tc3589x.c @@ -6,14 +6,14 @@ * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson */ -#include <linux/module.h> #include <linux/init.h> #include <linux/platform_device.h> #include <linux/slab.h> -#include <linux/gpio.h> +#include <linux/gpio/driver.h> #include <linux/of.h> #include <linux/interrupt.h> #include <linux/mfd/tc3589x.h> +#include <linux/bitops.h> /* * These registers are modified under the irq bus lock and cached to avoid @@ -39,7 +39,7 @@ static int tc3589x_gpio_get(struct gpio_chip *chip, unsigned offset) struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(chip); struct tc3589x *tc3589x = tc3589x_gpio->tc3589x; u8 reg = TC3589x_GPIODATA0 + (offset / 8) * 2; - u8 mask = 1 << (offset % 8); + u8 mask = BIT(offset % 8); int ret; ret = tc3589x_reg_read(tc3589x, reg); @@ -55,7 +55,7 @@ static void tc3589x_gpio_set(struct gpio_chip *chip, unsigned offset, int val) struct tc3589x *tc3589x = tc3589x_gpio->tc3589x; u8 reg = TC3589x_GPIODATA0 + (offset / 8) * 2; unsigned pos = offset % 8; - u8 data[] = {!!val << pos, 1 << pos}; + u8 data[] = {val ? BIT(pos) : 0, BIT(pos)}; tc3589x_block_write(tc3589x, reg, ARRAY_SIZE(data), data); } @@ -70,7 +70,7 @@ static int tc3589x_gpio_direction_output(struct gpio_chip *chip, tc3589x_gpio_set(chip, offset, val); - return tc3589x_set_bits(tc3589x, reg, 1 << pos, 1 << pos); + return tc3589x_set_bits(tc3589x, reg, BIT(pos), BIT(pos)); } static int tc3589x_gpio_direction_input(struct gpio_chip *chip, @@ -81,7 +81,47 @@ static int tc3589x_gpio_direction_input(struct gpio_chip *chip, u8 reg = TC3589x_GPIODIR0 + offset / 8; unsigned pos = offset % 8; - return tc3589x_set_bits(tc3589x, reg, 1 << pos, 0); + return tc3589x_set_bits(tc3589x, reg, BIT(pos), 0); +} + +static int tc3589x_gpio_single_ended(struct gpio_chip *chip, + unsigned offset, + enum single_ended_mode mode) +{ + struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(chip); + struct tc3589x *tc3589x = tc3589x_gpio->tc3589x; + /* + * These registers are alterated at each second address + * ODM bit 0 = drive to GND or Hi-Z (open drain) + * ODM bit 1 = drive to VDD or Hi-Z (open source) + */ + u8 odmreg = TC3589x_GPIOODM0 + (offset / 8) * 2; + u8 odereg = TC3589x_GPIOODE0 + (offset / 8) * 2; + unsigned pos = offset % 8; + int ret; + + switch(mode) { + case LINE_MODE_OPEN_DRAIN: + /* Set open drain mode */ + ret = tc3589x_set_bits(tc3589x, odmreg, BIT(pos), 0); + if (ret) + return ret; + /* Enable open drain/source mode */ + return tc3589x_set_bits(tc3589x, odereg, BIT(pos), BIT(pos)); + case LINE_MODE_OPEN_SOURCE: + /* Set open source mode */ + ret = tc3589x_set_bits(tc3589x, odmreg, BIT(pos), BIT(pos)); + if (ret) + return ret; + /* Enable open drain/source mode */ + return tc3589x_set_bits(tc3589x, odereg, BIT(pos), BIT(pos)); + case LINE_MODE_PUSH_PULL: + /* Disable open drain/source mode */ + return tc3589x_set_bits(tc3589x, odereg, BIT(pos), 0); + default: + break; + } + return -ENOTSUPP; } static struct gpio_chip template_chip = { @@ -91,6 +131,7 @@ static struct gpio_chip template_chip = { .get = tc3589x_gpio_get, .direction_output = tc3589x_gpio_direction_output, .set = tc3589x_gpio_set, + .set_single_ended = tc3589x_gpio_single_ended, .can_sleep = true, }; @@ -100,7 +141,7 @@ static int tc3589x_gpio_irq_set_type(struct irq_data *d, unsigned int type) struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(gc); int offset = d->hwirq; int regoffset = offset / 8; - int mask = 1 << (offset % 8); + int mask = BIT(offset % 8); if (type == IRQ_TYPE_EDGE_BOTH) { tc3589x_gpio->regs[REG_IBE][regoffset] |= mask; @@ -165,7 +206,7 @@ static void tc3589x_gpio_irq_mask(struct irq_data *d) struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(gc); int offset = d->hwirq; int regoffset = offset / 8; - int mask = 1 << (offset % 8); + int mask = BIT(offset % 8); tc3589x_gpio->regs[REG_IE][regoffset] &= ~mask; } @@ -176,7 +217,7 @@ static void tc3589x_gpio_irq_unmask(struct irq_data *d) struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(gc); int offset = d->hwirq; int regoffset = offset / 8; - int mask = 1 << (offset % 8); + int mask = BIT(offset % 8); tc3589x_gpio->regs[REG_IE][regoffset] |= mask; } @@ -311,13 +352,3 @@ static int __init tc3589x_gpio_init(void) return platform_driver_register(&tc3589x_gpio_driver); } subsys_initcall(tc3589x_gpio_init); - -static void __exit tc3589x_gpio_exit(void) -{ - platform_driver_unregister(&tc3589x_gpio_driver); -} -module_exit(tc3589x_gpio_exit); - -MODULE_LICENSE("GPL v2"); -MODULE_DESCRIPTION("TC3589x GPIO driver"); -MODULE_AUTHOR("Hanumath Prasad, Rabin Vincent"); diff --git a/drivers/gpio/gpio-tegra.c b/drivers/gpio/gpio-tegra.c index 790bb111b2cb..ec891a27952f 100644 --- a/drivers/gpio/gpio-tegra.c +++ b/drivers/gpio/gpio-tegra.c @@ -35,24 +35,27 @@ #define GPIO_PORT(x) (((x) >> 3) & 0x3) #define GPIO_BIT(x) ((x) & 0x7) -#define GPIO_REG(x) (GPIO_BANK(x) * tegra_gpio_bank_stride + \ +#define GPIO_REG(tgi, x) (GPIO_BANK(x) * tgi->soc->bank_stride + \ GPIO_PORT(x) * 4) -#define GPIO_CNF(x) (GPIO_REG(x) + 0x00) -#define GPIO_OE(x) (GPIO_REG(x) + 0x10) -#define GPIO_OUT(x) (GPIO_REG(x) + 0X20) -#define GPIO_IN(x) (GPIO_REG(x) + 0x30) -#define GPIO_INT_STA(x) (GPIO_REG(x) + 0x40) -#define GPIO_INT_ENB(x) (GPIO_REG(x) + 0x50) -#define GPIO_INT_LVL(x) (GPIO_REG(x) + 0x60) -#define GPIO_INT_CLR(x) (GPIO_REG(x) + 0x70) - -#define GPIO_MSK_CNF(x) (GPIO_REG(x) + tegra_gpio_upper_offset + 0x00) -#define GPIO_MSK_OE(x) (GPIO_REG(x) + tegra_gpio_upper_offset + 0x10) -#define GPIO_MSK_OUT(x) (GPIO_REG(x) + tegra_gpio_upper_offset + 0X20) -#define GPIO_MSK_INT_STA(x) (GPIO_REG(x) + tegra_gpio_upper_offset + 0x40) -#define GPIO_MSK_INT_ENB(x) (GPIO_REG(x) + tegra_gpio_upper_offset + 0x50) -#define GPIO_MSK_INT_LVL(x) (GPIO_REG(x) + tegra_gpio_upper_offset + 0x60) +#define GPIO_CNF(t, x) (GPIO_REG(t, x) + 0x00) +#define GPIO_OE(t, x) (GPIO_REG(t, x) + 0x10) +#define GPIO_OUT(t, x) (GPIO_REG(t, x) + 0X20) +#define GPIO_IN(t, x) (GPIO_REG(t, x) + 0x30) +#define GPIO_INT_STA(t, x) (GPIO_REG(t, x) + 0x40) +#define GPIO_INT_ENB(t, x) (GPIO_REG(t, x) + 0x50) +#define GPIO_INT_LVL(t, x) (GPIO_REG(t, x) + 0x60) +#define GPIO_INT_CLR(t, x) (GPIO_REG(t, x) + 0x70) +#define GPIO_DBC_CNT(t, x) (GPIO_REG(t, x) + 0xF0) + + +#define GPIO_MSK_CNF(t, x) (GPIO_REG(t, x) + t->soc->upper_offset + 0x00) +#define GPIO_MSK_OE(t, x) (GPIO_REG(t, x) + t->soc->upper_offset + 0x10) +#define GPIO_MSK_OUT(t, x) (GPIO_REG(t, x) + t->soc->upper_offset + 0X20) +#define GPIO_MSK_DBC_EN(t, x) (GPIO_REG(t, x) + t->soc->upper_offset + 0x30) +#define GPIO_MSK_INT_STA(t, x) (GPIO_REG(t, x) + t->soc->upper_offset + 0x40) +#define GPIO_MSK_INT_ENB(t, x) (GPIO_REG(t, x) + t->soc->upper_offset + 0x50) +#define GPIO_MSK_INT_LVL(t, x) (GPIO_REG(t, x) + t->soc->upper_offset + 0x60) #define GPIO_INT_LVL_MASK 0x010101 #define GPIO_INT_LVL_EDGE_RISING 0x000101 @@ -61,10 +64,13 @@ #define GPIO_INT_LVL_LEVEL_HIGH 0x000001 #define GPIO_INT_LVL_LEVEL_LOW 0x000000 +struct tegra_gpio_info; + struct tegra_gpio_bank { int bank; int irq; spinlock_t lvl_lock[4]; + spinlock_t dbc_lock[4]; /* Lock for updating debounce count register */ #ifdef CONFIG_PM_SLEEP u32 cnf[4]; u32 out[4]; @@ -72,25 +78,39 @@ struct tegra_gpio_bank { u32 int_enb[4]; u32 int_lvl[4]; u32 wake_enb[4]; + u32 dbc_enb[4]; #endif + u32 dbc_cnt[4]; + struct tegra_gpio_info *tgi; }; -static struct device *dev; -static struct irq_domain *irq_domain; -static void __iomem *regs; -static u32 tegra_gpio_bank_count; -static u32 tegra_gpio_bank_stride; -static u32 tegra_gpio_upper_offset; -static struct tegra_gpio_bank *tegra_gpio_banks; +struct tegra_gpio_soc_config { + bool debounce_supported; + u32 bank_stride; + u32 upper_offset; +}; + +struct tegra_gpio_info { + struct device *dev; + void __iomem *regs; + struct irq_domain *irq_domain; + struct tegra_gpio_bank *bank_info; + const struct tegra_gpio_soc_config *soc; + struct gpio_chip gc; + struct irq_chip ic; + struct lock_class_key lock_class; + u32 bank_count; +}; -static inline void tegra_gpio_writel(u32 val, u32 reg) +static inline void tegra_gpio_writel(struct tegra_gpio_info *tgi, + u32 val, u32 reg) { - __raw_writel(val, regs + reg); + __raw_writel(val, tgi->regs + reg); } -static inline u32 tegra_gpio_readl(u32 reg) +static inline u32 tegra_gpio_readl(struct tegra_gpio_info *tgi, u32 reg) { - return __raw_readl(regs + reg); + return __raw_readl(tgi->regs + reg); } static int tegra_gpio_compose(int bank, int port, int bit) @@ -98,24 +118,25 @@ static int tegra_gpio_compose(int bank, int port, int bit) return (bank << 5) | ((port & 0x3) << 3) | (bit & 0x7); } -static void tegra_gpio_mask_write(u32 reg, int gpio, int value) +static void tegra_gpio_mask_write(struct tegra_gpio_info *tgi, u32 reg, + int gpio, int value) { u32 val; val = 0x100 << GPIO_BIT(gpio); if (value) val |= 1 << GPIO_BIT(gpio); - tegra_gpio_writel(val, reg); + tegra_gpio_writel(tgi, val, reg); } -static void tegra_gpio_enable(int gpio) +static void tegra_gpio_enable(struct tegra_gpio_info *tgi, int gpio) { - tegra_gpio_mask_write(GPIO_MSK_CNF(gpio), gpio, 1); + tegra_gpio_mask_write(tgi, GPIO_MSK_CNF(tgi, gpio), gpio, 1); } -static void tegra_gpio_disable(int gpio) +static void tegra_gpio_disable(struct tegra_gpio_info *tgi, int gpio) { - tegra_gpio_mask_write(GPIO_MSK_CNF(gpio), gpio, 0); + tegra_gpio_mask_write(tgi, GPIO_MSK_CNF(tgi, gpio), gpio, 0); } static int tegra_gpio_request(struct gpio_chip *chip, unsigned offset) @@ -125,83 +146,138 @@ static int tegra_gpio_request(struct gpio_chip *chip, unsigned offset) static void tegra_gpio_free(struct gpio_chip *chip, unsigned offset) { + struct tegra_gpio_info *tgi = gpiochip_get_data(chip); + pinctrl_free_gpio(offset); - tegra_gpio_disable(offset); + tegra_gpio_disable(tgi, offset); } static void tegra_gpio_set(struct gpio_chip *chip, unsigned offset, int value) { - tegra_gpio_mask_write(GPIO_MSK_OUT(offset), offset, value); + struct tegra_gpio_info *tgi = gpiochip_get_data(chip); + + tegra_gpio_mask_write(tgi, GPIO_MSK_OUT(tgi, offset), offset, value); } static int tegra_gpio_get(struct gpio_chip *chip, unsigned offset) { + struct tegra_gpio_info *tgi = gpiochip_get_data(chip); + int bval = BIT(GPIO_BIT(offset)); + /* If gpio is in output mode then read from the out value */ - if ((tegra_gpio_readl(GPIO_OE(offset)) >> GPIO_BIT(offset)) & 1) - return (tegra_gpio_readl(GPIO_OUT(offset)) >> - GPIO_BIT(offset)) & 0x1; + if (tegra_gpio_readl(tgi, GPIO_OE(tgi, offset)) & bval) + return !!(tegra_gpio_readl(tgi, GPIO_OUT(tgi, offset)) & bval); - return (tegra_gpio_readl(GPIO_IN(offset)) >> GPIO_BIT(offset)) & 0x1; + return !!(tegra_gpio_readl(tgi, GPIO_IN(tgi, offset)) & bval); } static int tegra_gpio_direction_input(struct gpio_chip *chip, unsigned offset) { - tegra_gpio_mask_write(GPIO_MSK_OE(offset), offset, 0); - tegra_gpio_enable(offset); + struct tegra_gpio_info *tgi = gpiochip_get_data(chip); + + tegra_gpio_mask_write(tgi, GPIO_MSK_OE(tgi, offset), offset, 0); + tegra_gpio_enable(tgi, offset); return 0; } static int tegra_gpio_direction_output(struct gpio_chip *chip, unsigned offset, int value) { + struct tegra_gpio_info *tgi = gpiochip_get_data(chip); + tegra_gpio_set(chip, offset, value); - tegra_gpio_mask_write(GPIO_MSK_OE(offset), offset, 1); - tegra_gpio_enable(offset); + tegra_gpio_mask_write(tgi, GPIO_MSK_OE(tgi, offset), offset, 1); + tegra_gpio_enable(tgi, offset); return 0; } -static int tegra_gpio_to_irq(struct gpio_chip *chip, unsigned offset) +static int tegra_gpio_get_direction(struct gpio_chip *chip, unsigned offset) { - return irq_find_mapping(irq_domain, offset); + struct tegra_gpio_info *tgi = gpiochip_get_data(chip); + u32 pin_mask = BIT(GPIO_BIT(offset)); + u32 cnf, oe; + + cnf = tegra_gpio_readl(tgi, GPIO_CNF(tgi, offset)); + if (!(cnf & pin_mask)) + return -EINVAL; + + oe = tegra_gpio_readl(tgi, GPIO_OE(tgi, offset)); + + return (oe & pin_mask) ? GPIOF_DIR_OUT : GPIOF_DIR_IN; } -static struct gpio_chip tegra_gpio_chip = { - .label = "tegra-gpio", - .request = tegra_gpio_request, - .free = tegra_gpio_free, - .direction_input = tegra_gpio_direction_input, - .get = tegra_gpio_get, - .direction_output = tegra_gpio_direction_output, - .set = tegra_gpio_set, - .to_irq = tegra_gpio_to_irq, - .base = 0, -}; +static int tegra_gpio_set_debounce(struct gpio_chip *chip, unsigned int offset, + unsigned int debounce) +{ + struct tegra_gpio_info *tgi = gpiochip_get_data(chip); + struct tegra_gpio_bank *bank = &tgi->bank_info[GPIO_BANK(offset)]; + unsigned int debounce_ms = DIV_ROUND_UP(debounce, 1000); + unsigned long flags; + int port; + + if (!debounce_ms) { + tegra_gpio_mask_write(tgi, GPIO_MSK_DBC_EN(tgi, offset), + offset, 0); + return 0; + } + + debounce_ms = min(debounce_ms, 255U); + port = GPIO_PORT(offset); + + /* There is only one debounce count register per port and hence + * set the maximum of current and requested debounce time. + */ + spin_lock_irqsave(&bank->dbc_lock[port], flags); + if (bank->dbc_cnt[port] < debounce_ms) { + tegra_gpio_writel(tgi, debounce_ms, GPIO_DBC_CNT(tgi, offset)); + bank->dbc_cnt[port] = debounce_ms; + } + spin_unlock_irqrestore(&bank->dbc_lock[port], flags); + + tegra_gpio_mask_write(tgi, GPIO_MSK_DBC_EN(tgi, offset), offset, 1); + + return 0; +} + +static int tegra_gpio_to_irq(struct gpio_chip *chip, unsigned offset) +{ + struct tegra_gpio_info *tgi = gpiochip_get_data(chip); + + return irq_find_mapping(tgi->irq_domain, offset); +} static void tegra_gpio_irq_ack(struct irq_data *d) { + struct tegra_gpio_bank *bank = irq_data_get_irq_chip_data(d); + struct tegra_gpio_info *tgi = bank->tgi; int gpio = d->hwirq; - tegra_gpio_writel(1 << GPIO_BIT(gpio), GPIO_INT_CLR(gpio)); + tegra_gpio_writel(tgi, 1 << GPIO_BIT(gpio), GPIO_INT_CLR(tgi, gpio)); } static void tegra_gpio_irq_mask(struct irq_data *d) { + struct tegra_gpio_bank *bank = irq_data_get_irq_chip_data(d); + struct tegra_gpio_info *tgi = bank->tgi; int gpio = d->hwirq; - tegra_gpio_mask_write(GPIO_MSK_INT_ENB(gpio), gpio, 0); + tegra_gpio_mask_write(tgi, GPIO_MSK_INT_ENB(tgi, gpio), gpio, 0); } static void tegra_gpio_irq_unmask(struct irq_data *d) { + struct tegra_gpio_bank *bank = irq_data_get_irq_chip_data(d); + struct tegra_gpio_info *tgi = bank->tgi; int gpio = d->hwirq; - tegra_gpio_mask_write(GPIO_MSK_INT_ENB(gpio), gpio, 1); + tegra_gpio_mask_write(tgi, GPIO_MSK_INT_ENB(tgi, gpio), gpio, 1); } static int tegra_gpio_irq_set_type(struct irq_data *d, unsigned int type) { int gpio = d->hwirq; struct tegra_gpio_bank *bank = irq_data_get_irq_chip_data(d); + struct tegra_gpio_info *tgi = bank->tgi; int port = GPIO_PORT(gpio); int lvl_type; int val; @@ -233,23 +309,24 @@ static int tegra_gpio_irq_set_type(struct irq_data *d, unsigned int type) return -EINVAL; } - ret = gpiochip_lock_as_irq(&tegra_gpio_chip, gpio); + ret = gpiochip_lock_as_irq(&tgi->gc, gpio); if (ret) { - dev_err(dev, "unable to lock Tegra GPIO %d as IRQ\n", gpio); + dev_err(tgi->dev, + "unable to lock Tegra GPIO %d as IRQ\n", gpio); return ret; } spin_lock_irqsave(&bank->lvl_lock[port], flags); - val = tegra_gpio_readl(GPIO_INT_LVL(gpio)); + val = tegra_gpio_readl(tgi, GPIO_INT_LVL(tgi, gpio)); val &= ~(GPIO_INT_LVL_MASK << GPIO_BIT(gpio)); val |= lvl_type << GPIO_BIT(gpio); - tegra_gpio_writel(val, GPIO_INT_LVL(gpio)); + tegra_gpio_writel(tgi, val, GPIO_INT_LVL(tgi, gpio)); spin_unlock_irqrestore(&bank->lvl_lock[port], flags); - tegra_gpio_mask_write(GPIO_MSK_OE(gpio), gpio, 0); - tegra_gpio_enable(gpio); + tegra_gpio_mask_write(tgi, GPIO_MSK_OE(tgi, gpio), gpio, 0); + tegra_gpio_enable(tgi, gpio); if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) irq_set_handler_locked(d, handle_level_irq); @@ -261,9 +338,11 @@ static int tegra_gpio_irq_set_type(struct irq_data *d, unsigned int type) static void tegra_gpio_irq_shutdown(struct irq_data *d) { + struct tegra_gpio_bank *bank = irq_data_get_irq_chip_data(d); + struct tegra_gpio_info *tgi = bank->tgi; int gpio = d->hwirq; - gpiochip_unlock_as_irq(&tegra_gpio_chip, gpio); + gpiochip_unlock_as_irq(&tgi->gc, gpio); } static void tegra_gpio_irq_handler(struct irq_desc *desc) @@ -271,19 +350,24 @@ static void tegra_gpio_irq_handler(struct irq_desc *desc) int port; int pin; int unmasked = 0; + int gpio; + u32 lvl; + unsigned long sta; struct irq_chip *chip = irq_desc_get_chip(desc); struct tegra_gpio_bank *bank = irq_desc_get_handler_data(desc); + struct tegra_gpio_info *tgi = bank->tgi; chained_irq_enter(chip, desc); for (port = 0; port < 4; port++) { - int gpio = tegra_gpio_compose(bank->bank, port, 0); - unsigned long sta = tegra_gpio_readl(GPIO_INT_STA(gpio)) & - tegra_gpio_readl(GPIO_INT_ENB(gpio)); - u32 lvl = tegra_gpio_readl(GPIO_INT_LVL(gpio)); + gpio = tegra_gpio_compose(bank->bank, port, 0); + sta = tegra_gpio_readl(tgi, GPIO_INT_STA(tgi, gpio)) & + tegra_gpio_readl(tgi, GPIO_INT_ENB(tgi, gpio)); + lvl = tegra_gpio_readl(tgi, GPIO_INT_LVL(tgi, gpio)); for_each_set_bit(pin, &sta, 8) { - tegra_gpio_writel(1 << pin, GPIO_INT_CLR(gpio)); + tegra_gpio_writel(tgi, 1 << pin, + GPIO_INT_CLR(tgi, gpio)); /* if gpio is edge triggered, clear condition * before executing the handler so that we don't @@ -306,22 +390,37 @@ static void tegra_gpio_irq_handler(struct irq_desc *desc) #ifdef CONFIG_PM_SLEEP static int tegra_gpio_resume(struct device *dev) { + struct platform_device *pdev = to_platform_device(dev); + struct tegra_gpio_info *tgi = platform_get_drvdata(pdev); unsigned long flags; int b; int p; local_irq_save(flags); - for (b = 0; b < tegra_gpio_bank_count; b++) { - struct tegra_gpio_bank *bank = &tegra_gpio_banks[b]; + for (b = 0; b < tgi->bank_count; b++) { + struct tegra_gpio_bank *bank = &tgi->bank_info[b]; for (p = 0; p < ARRAY_SIZE(bank->oe); p++) { unsigned int gpio = (b<<5) | (p<<3); - tegra_gpio_writel(bank->cnf[p], GPIO_CNF(gpio)); - tegra_gpio_writel(bank->out[p], GPIO_OUT(gpio)); - tegra_gpio_writel(bank->oe[p], GPIO_OE(gpio)); - tegra_gpio_writel(bank->int_lvl[p], GPIO_INT_LVL(gpio)); - tegra_gpio_writel(bank->int_enb[p], GPIO_INT_ENB(gpio)); + tegra_gpio_writel(tgi, bank->cnf[p], + GPIO_CNF(tgi, gpio)); + + if (tgi->soc->debounce_supported) { + tegra_gpio_writel(tgi, bank->dbc_cnt[p], + GPIO_DBC_CNT(tgi, gpio)); + tegra_gpio_writel(tgi, bank->dbc_enb[p], + GPIO_MSK_DBC_EN(tgi, gpio)); + } + + tegra_gpio_writel(tgi, bank->out[p], + GPIO_OUT(tgi, gpio)); + tegra_gpio_writel(tgi, bank->oe[p], + GPIO_OE(tgi, gpio)); + tegra_gpio_writel(tgi, bank->int_lvl[p], + GPIO_INT_LVL(tgi, gpio)); + tegra_gpio_writel(tgi, bank->int_enb[p], + GPIO_INT_ENB(tgi, gpio)); } } @@ -331,25 +430,39 @@ static int tegra_gpio_resume(struct device *dev) static int tegra_gpio_suspend(struct device *dev) { + struct platform_device *pdev = to_platform_device(dev); + struct tegra_gpio_info *tgi = platform_get_drvdata(pdev); unsigned long flags; int b; int p; local_irq_save(flags); - for (b = 0; b < tegra_gpio_bank_count; b++) { - struct tegra_gpio_bank *bank = &tegra_gpio_banks[b]; + for (b = 0; b < tgi->bank_count; b++) { + struct tegra_gpio_bank *bank = &tgi->bank_info[b]; for (p = 0; p < ARRAY_SIZE(bank->oe); p++) { unsigned int gpio = (b<<5) | (p<<3); - bank->cnf[p] = tegra_gpio_readl(GPIO_CNF(gpio)); - bank->out[p] = tegra_gpio_readl(GPIO_OUT(gpio)); - bank->oe[p] = tegra_gpio_readl(GPIO_OE(gpio)); - bank->int_enb[p] = tegra_gpio_readl(GPIO_INT_ENB(gpio)); - bank->int_lvl[p] = tegra_gpio_readl(GPIO_INT_LVL(gpio)); + bank->cnf[p] = tegra_gpio_readl(tgi, + GPIO_CNF(tgi, gpio)); + bank->out[p] = tegra_gpio_readl(tgi, + GPIO_OUT(tgi, gpio)); + bank->oe[p] = tegra_gpio_readl(tgi, + GPIO_OE(tgi, gpio)); + if (tgi->soc->debounce_supported) { + bank->dbc_enb[p] = tegra_gpio_readl(tgi, + GPIO_MSK_DBC_EN(tgi, gpio)); + bank->dbc_enb[p] = (bank->dbc_enb[p] << 8) | + bank->dbc_enb[p]; + } + + bank->int_enb[p] = tegra_gpio_readl(tgi, + GPIO_INT_ENB(tgi, gpio)); + bank->int_lvl[p] = tegra_gpio_readl(tgi, + GPIO_INT_LVL(tgi, gpio)); /* Enable gpio irq for wake up source */ - tegra_gpio_writel(bank->wake_enb[p], - GPIO_INT_ENB(gpio)); + tegra_gpio_writel(tgi, bank->wake_enb[p], + GPIO_INT_ENB(tgi, gpio)); } } local_irq_restore(flags); @@ -382,22 +495,23 @@ static int tegra_gpio_irq_set_wake(struct irq_data *d, unsigned int enable) static int dbg_gpio_show(struct seq_file *s, void *unused) { + struct tegra_gpio_info *tgi = s->private; int i; int j; - for (i = 0; i < tegra_gpio_bank_count; i++) { + for (i = 0; i < tgi->bank_count; i++) { for (j = 0; j < 4; j++) { int gpio = tegra_gpio_compose(i, j, 0); seq_printf(s, "%d:%d %02x %02x %02x %02x %02x %02x %06x\n", i, j, - tegra_gpio_readl(GPIO_CNF(gpio)), - tegra_gpio_readl(GPIO_OE(gpio)), - tegra_gpio_readl(GPIO_OUT(gpio)), - tegra_gpio_readl(GPIO_IN(gpio)), - tegra_gpio_readl(GPIO_INT_STA(gpio)), - tegra_gpio_readl(GPIO_INT_ENB(gpio)), - tegra_gpio_readl(GPIO_INT_LVL(gpio))); + tegra_gpio_readl(tgi, GPIO_CNF(tgi, gpio)), + tegra_gpio_readl(tgi, GPIO_OE(tgi, gpio)), + tegra_gpio_readl(tgi, GPIO_OUT(tgi, gpio)), + tegra_gpio_readl(tgi, GPIO_IN(tgi, gpio)), + tegra_gpio_readl(tgi, GPIO_INT_STA(tgi, gpio)), + tegra_gpio_readl(tgi, GPIO_INT_ENB(tgi, gpio)), + tegra_gpio_readl(tgi, GPIO_INT_LVL(tgi, gpio))); } } return 0; @@ -405,7 +519,7 @@ static int dbg_gpio_show(struct seq_file *s, void *unused) static int dbg_gpio_open(struct inode *inode, struct file *file) { - return single_open(file, dbg_gpio_show, &inode->i_private); + return single_open(file, dbg_gpio_show, inode->i_private); } static const struct file_operations debug_fops = { @@ -415,66 +529,28 @@ static const struct file_operations debug_fops = { .release = single_release, }; -static void tegra_gpio_debuginit(void) +static void tegra_gpio_debuginit(struct tegra_gpio_info *tgi) { (void) debugfs_create_file("tegra_gpio", S_IRUGO, - NULL, NULL, &debug_fops); + NULL, tgi, &debug_fops); } #else -static inline void tegra_gpio_debuginit(void) +static inline void tegra_gpio_debuginit(struct tegra_gpio_info *tgi) { } #endif -static struct irq_chip tegra_gpio_irq_chip = { - .name = "GPIO", - .irq_ack = tegra_gpio_irq_ack, - .irq_mask = tegra_gpio_irq_mask, - .irq_unmask = tegra_gpio_irq_unmask, - .irq_set_type = tegra_gpio_irq_set_type, - .irq_shutdown = tegra_gpio_irq_shutdown, -#ifdef CONFIG_PM_SLEEP - .irq_set_wake = tegra_gpio_irq_set_wake, -#endif -}; - static const struct dev_pm_ops tegra_gpio_pm_ops = { SET_SYSTEM_SLEEP_PM_OPS(tegra_gpio_suspend, tegra_gpio_resume) }; -struct tegra_gpio_soc_config { - u32 bank_stride; - u32 upper_offset; -}; - -static struct tegra_gpio_soc_config tegra20_gpio_config = { - .bank_stride = 0x80, - .upper_offset = 0x800, -}; - -static struct tegra_gpio_soc_config tegra30_gpio_config = { - .bank_stride = 0x100, - .upper_offset = 0x80, -}; - -static const struct of_device_id tegra_gpio_of_match[] = { - { .compatible = "nvidia,tegra30-gpio", .data = &tegra30_gpio_config }, - { .compatible = "nvidia,tegra20-gpio", .data = &tegra20_gpio_config }, - { }, -}; - -/* This lock class tells lockdep that GPIO irqs are in a different - * category than their parents, so it won't report false recursion. - */ -static struct lock_class_key gpio_lock_class; - static int tegra_gpio_probe(struct platform_device *pdev) { - const struct of_device_id *match; - struct tegra_gpio_soc_config *config; + const struct tegra_gpio_soc_config *config; + struct tegra_gpio_info *tgi; struct resource *res; struct tegra_gpio_bank *bank; int ret; @@ -482,102 +558,153 @@ static int tegra_gpio_probe(struct platform_device *pdev) int i; int j; - dev = &pdev->dev; - - match = of_match_device(tegra_gpio_of_match, &pdev->dev); - if (!match) { + config = of_device_get_match_data(&pdev->dev); + if (!config) { dev_err(&pdev->dev, "Error: No device match found\n"); return -ENODEV; } - config = (struct tegra_gpio_soc_config *)match->data; - tegra_gpio_bank_stride = config->bank_stride; - tegra_gpio_upper_offset = config->upper_offset; + tgi = devm_kzalloc(&pdev->dev, sizeof(*tgi), GFP_KERNEL); + if (!tgi) + return -ENODEV; + + tgi->soc = config; + tgi->dev = &pdev->dev; for (;;) { - res = platform_get_resource(pdev, IORESOURCE_IRQ, tegra_gpio_bank_count); + res = platform_get_resource(pdev, IORESOURCE_IRQ, + tgi->bank_count); if (!res) break; - tegra_gpio_bank_count++; + tgi->bank_count++; } - if (!tegra_gpio_bank_count) { + if (!tgi->bank_count) { dev_err(&pdev->dev, "Missing IRQ resource\n"); return -ENODEV; } - tegra_gpio_chip.ngpio = tegra_gpio_bank_count * 32; + tgi->gc.label = "tegra-gpio"; + tgi->gc.request = tegra_gpio_request; + tgi->gc.free = tegra_gpio_free; + tgi->gc.direction_input = tegra_gpio_direction_input; + tgi->gc.get = tegra_gpio_get; + tgi->gc.direction_output = tegra_gpio_direction_output; + tgi->gc.set = tegra_gpio_set; + tgi->gc.get_direction = tegra_gpio_get_direction; + tgi->gc.to_irq = tegra_gpio_to_irq; + tgi->gc.base = 0; + tgi->gc.ngpio = tgi->bank_count * 32; + tgi->gc.parent = &pdev->dev; + tgi->gc.of_node = pdev->dev.of_node; + + tgi->ic.name = "GPIO"; + tgi->ic.irq_ack = tegra_gpio_irq_ack; + tgi->ic.irq_mask = tegra_gpio_irq_mask; + tgi->ic.irq_unmask = tegra_gpio_irq_unmask; + tgi->ic.irq_set_type = tegra_gpio_irq_set_type; + tgi->ic.irq_shutdown = tegra_gpio_irq_shutdown; +#ifdef CONFIG_PM_SLEEP + tgi->ic.irq_set_wake = tegra_gpio_irq_set_wake; +#endif + + platform_set_drvdata(pdev, tgi); + + if (config->debounce_supported) + tgi->gc.set_debounce = tegra_gpio_set_debounce; - tegra_gpio_banks = devm_kzalloc(&pdev->dev, - tegra_gpio_bank_count * sizeof(*tegra_gpio_banks), - GFP_KERNEL); - if (!tegra_gpio_banks) + tgi->bank_info = devm_kzalloc(&pdev->dev, tgi->bank_count * + sizeof(*tgi->bank_info), GFP_KERNEL); + if (!tgi->bank_info) return -ENODEV; - irq_domain = irq_domain_add_linear(pdev->dev.of_node, - tegra_gpio_chip.ngpio, - &irq_domain_simple_ops, NULL); - if (!irq_domain) + tgi->irq_domain = irq_domain_add_linear(pdev->dev.of_node, + tgi->gc.ngpio, + &irq_domain_simple_ops, NULL); + if (!tgi->irq_domain) return -ENODEV; - for (i = 0; i < tegra_gpio_bank_count; i++) { + for (i = 0; i < tgi->bank_count; i++) { res = platform_get_resource(pdev, IORESOURCE_IRQ, i); if (!res) { dev_err(&pdev->dev, "Missing IRQ resource\n"); return -ENODEV; } - bank = &tegra_gpio_banks[i]; + bank = &tgi->bank_info[i]; bank->bank = i; bank->irq = res->start; + bank->tgi = tgi; } res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - regs = devm_ioremap_resource(&pdev->dev, res); - if (IS_ERR(regs)) - return PTR_ERR(regs); + tgi->regs = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(tgi->regs)) + return PTR_ERR(tgi->regs); - for (i = 0; i < tegra_gpio_bank_count; i++) { + for (i = 0; i < tgi->bank_count; i++) { for (j = 0; j < 4; j++) { int gpio = tegra_gpio_compose(i, j, 0); - tegra_gpio_writel(0x00, GPIO_INT_ENB(gpio)); + tegra_gpio_writel(tgi, 0x00, GPIO_INT_ENB(tgi, gpio)); } } - tegra_gpio_chip.of_node = pdev->dev.of_node; - - ret = devm_gpiochip_add_data(&pdev->dev, &tegra_gpio_chip, NULL); + ret = devm_gpiochip_add_data(&pdev->dev, &tgi->gc, tgi); if (ret < 0) { - irq_domain_remove(irq_domain); + irq_domain_remove(tgi->irq_domain); return ret; } - for (gpio = 0; gpio < tegra_gpio_chip.ngpio; gpio++) { - int irq = irq_create_mapping(irq_domain, gpio); + for (gpio = 0; gpio < tgi->gc.ngpio; gpio++) { + int irq = irq_create_mapping(tgi->irq_domain, gpio); /* No validity check; all Tegra GPIOs are valid IRQs */ - bank = &tegra_gpio_banks[GPIO_BANK(gpio)]; + bank = &tgi->bank_info[GPIO_BANK(gpio)]; - irq_set_lockdep_class(irq, &gpio_lock_class); + irq_set_lockdep_class(irq, &tgi->lock_class); irq_set_chip_data(irq, bank); - irq_set_chip_and_handler(irq, &tegra_gpio_irq_chip, - handle_simple_irq); + irq_set_chip_and_handler(irq, &tgi->ic, handle_simple_irq); } - for (i = 0; i < tegra_gpio_bank_count; i++) { - bank = &tegra_gpio_banks[i]; + for (i = 0; i < tgi->bank_count; i++) { + bank = &tgi->bank_info[i]; irq_set_chained_handler_and_data(bank->irq, tegra_gpio_irq_handler, bank); - for (j = 0; j < 4; j++) + for (j = 0; j < 4; j++) { spin_lock_init(&bank->lvl_lock[j]); + spin_lock_init(&bank->dbc_lock[j]); + } } - tegra_gpio_debuginit(); + tegra_gpio_debuginit(tgi); return 0; } +static const struct tegra_gpio_soc_config tegra20_gpio_config = { + .bank_stride = 0x80, + .upper_offset = 0x800, +}; + +static const struct tegra_gpio_soc_config tegra30_gpio_config = { + .bank_stride = 0x100, + .upper_offset = 0x80, +}; + +static const struct tegra_gpio_soc_config tegra210_gpio_config = { + .debounce_supported = true, + .bank_stride = 0x100, + .upper_offset = 0x80, +}; + +static const struct of_device_id tegra_gpio_of_match[] = { + { .compatible = "nvidia,tegra210-gpio", .data = &tegra210_gpio_config }, + { .compatible = "nvidia,tegra30-gpio", .data = &tegra30_gpio_config }, + { .compatible = "nvidia,tegra20-gpio", .data = &tegra20_gpio_config }, + { }, +}; + static struct platform_driver tegra_gpio_driver = { .driver = { .name = "tegra-gpio", diff --git a/drivers/gpio/gpio-timberdale.c b/drivers/gpio/gpio-timberdale.c index 85ed608c2b27..181f86ce00cd 100644 --- a/drivers/gpio/gpio-timberdale.c +++ b/drivers/gpio/gpio-timberdale.c @@ -1,5 +1,6 @@ /* * Timberdale FPGA GPIO driver + * Author: Mocean Laboratories * Copyright (c) 2009 Intel Corporation * * This program is free software; you can redistribute it and/or modify @@ -20,7 +21,7 @@ * Timberdale FPGA GPIO */ -#include <linux/module.h> +#include <linux/init.h> #include <linux/gpio.h> #include <linux/platform_device.h> #include <linux/irq.h> @@ -290,40 +291,14 @@ static int timbgpio_probe(struct platform_device *pdev) return 0; } -static int timbgpio_remove(struct platform_device *pdev) -{ - struct timbgpio_platform_data *pdata = dev_get_platdata(&pdev->dev); - struct timbgpio *tgpio = platform_get_drvdata(pdev); - int irq = platform_get_irq(pdev, 0); - - if (irq >= 0 && tgpio->irq_base > 0) { - int i; - for (i = 0; i < pdata->nr_pins; i++) { - irq_set_chip(tgpio->irq_base + i, NULL); - irq_set_chip_data(tgpio->irq_base + i, NULL); - } - - irq_set_handler(irq, NULL); - irq_set_handler_data(irq, NULL); - } - - return 0; -} - static struct platform_driver timbgpio_platform_driver = { .driver = { - .name = DRIVER_NAME, + .name = DRIVER_NAME, + .suppress_bind_attrs = true, }, .probe = timbgpio_probe, - .remove = timbgpio_remove, }; /*--------------------------------------------------------------------------*/ -module_platform_driver(timbgpio_platform_driver); - -MODULE_DESCRIPTION("Timberdale GPIO driver"); -MODULE_LICENSE("GPL v2"); -MODULE_AUTHOR("Mocean Laboratories"); -MODULE_ALIAS("platform:"DRIVER_NAME); - +builtin_platform_driver(timbgpio_platform_driver); diff --git a/drivers/gpio/gpio-tpic2810.c b/drivers/gpio/gpio-tpic2810.c index 9f020aa4b067..cace79c1b70a 100644 --- a/drivers/gpio/gpio-tpic2810.c +++ b/drivers/gpio/gpio-tpic2810.c @@ -57,39 +57,34 @@ static int tpic2810_direction_output(struct gpio_chip *chip, return 0; } -static void tpic2810_set(struct gpio_chip *chip, unsigned offset, int value) +static void tpic2810_set_mask_bits(struct gpio_chip *chip, u8 mask, u8 bits) { struct tpic2810 *gpio = gpiochip_get_data(chip); + u8 buffer; + int err; mutex_lock(&gpio->lock); - if (value) - gpio->buffer |= BIT(offset); - else - gpio->buffer &= ~BIT(offset); + buffer = gpio->buffer & ~mask; + buffer |= (mask & bits); - i2c_smbus_write_byte_data(gpio->client, TPIC2810_WS_COMMAND, - gpio->buffer); + err = i2c_smbus_write_byte_data(gpio->client, TPIC2810_WS_COMMAND, + buffer); + if (!err) + gpio->buffer = buffer; mutex_unlock(&gpio->lock); } +static void tpic2810_set(struct gpio_chip *chip, unsigned offset, int value) +{ + tpic2810_set_mask_bits(chip, BIT(offset), value ? BIT(offset) : 0); +} + static void tpic2810_set_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { - struct tpic2810 *gpio = gpiochip_get_data(chip); - - mutex_lock(&gpio->lock); - - /* clear bits under mask */ - gpio->buffer &= ~(*mask); - /* set bits under mask */ - gpio->buffer |= ((*mask) & (*bits)); - - i2c_smbus_write_byte_data(gpio->client, TPIC2810_WS_COMMAND, - gpio->buffer); - - mutex_unlock(&gpio->lock); + tpic2810_set_mask_bits(chip, *mask, *bits); } static struct gpio_chip template_chip = { diff --git a/drivers/gpio/gpio-tps65218.c b/drivers/gpio/gpio-tps65218.c index 313c0e484607..0eaeac8de9de 100644 --- a/drivers/gpio/gpio-tps65218.c +++ b/drivers/gpio/gpio-tps65218.c @@ -101,16 +101,6 @@ static int tps65218_gpio_request(struct gpio_chip *gc, unsigned offset) break; case 1: - /* GP02 is push-pull by default, can be set as open drain. */ - if (gpiochip_line_is_open_drain(gc, offset)) { - ret = tps65218_clear_bits(tps65218, - TPS65218_REG_CONFIG1, - TPS65218_CONFIG1_GPO2_BUF, - TPS65218_PROTECT_L1); - if (ret) - return ret; - } - /* Setup GPO2 */ ret = tps65218_clear_bits(tps65218, TPS65218_REG_CONFIG1, TPS65218_CONFIG1_IO1_SEL, @@ -148,6 +138,40 @@ static int tps65218_gpio_request(struct gpio_chip *gc, unsigned offset) return 0; } +static int tps65218_gpio_set_single_ended(struct gpio_chip *gc, + unsigned offset, + enum single_ended_mode mode) +{ + struct tps65218_gpio *tps65218_gpio = gpiochip_get_data(gc); + struct tps65218 *tps65218 = tps65218_gpio->tps65218; + + switch (offset) { + case 0: + case 2: + /* GPO1 is hardwired to be open drain */ + if (mode == LINE_MODE_OPEN_DRAIN) + return 0; + return -ENOTSUPP; + case 1: + /* GPO2 is push-pull by default, can be set as open drain. */ + if (mode == LINE_MODE_OPEN_DRAIN) + return tps65218_clear_bits(tps65218, + TPS65218_REG_CONFIG1, + TPS65218_CONFIG1_GPO2_BUF, + TPS65218_PROTECT_L1); + if (mode == LINE_MODE_PUSH_PULL) + return tps65218_set_bits(tps65218, + TPS65218_REG_CONFIG1, + TPS65218_CONFIG1_GPO2_BUF, + TPS65218_CONFIG1_GPO2_BUF, + TPS65218_PROTECT_L1); + return -ENOTSUPP; + default: + break; + } + return -ENOTSUPP; +} + static struct gpio_chip template_chip = { .label = "gpio-tps65218", .owner = THIS_MODULE, @@ -156,6 +180,7 @@ static struct gpio_chip template_chip = { .direction_input = tps65218_gpio_input, .get = tps65218_gpio_get, .set = tps65218_gpio_set, + .set_single_ended = tps65218_gpio_set_single_ended, .can_sleep = true, .ngpio = 3, .base = -1, diff --git a/drivers/gpio/gpio-tps6586x.c b/drivers/gpio/gpio-tps6586x.c index c88bdc8ee2c9..6b15e68a314f 100644 --- a/drivers/gpio/gpio-tps6586x.c +++ b/drivers/gpio/gpio-tps6586x.c @@ -24,7 +24,7 @@ #include <linux/errno.h> #include <linux/gpio.h> #include <linux/kernel.h> -#include <linux/module.h> +#include <linux/init.h> #include <linux/mfd/tps6586x.h> #include <linux/of_device.h> #include <linux/platform_device.h> @@ -140,14 +140,3 @@ static int __init tps6586x_gpio_init(void) return platform_driver_register(&tps6586x_gpio_driver); } subsys_initcall(tps6586x_gpio_init); - -static void __exit tps6586x_gpio_exit(void) -{ - platform_driver_unregister(&tps6586x_gpio_driver); -} -module_exit(tps6586x_gpio_exit); - -MODULE_ALIAS("platform:tps6586x-gpio"); -MODULE_DESCRIPTION("GPIO interface for TPS6586X PMIC"); -MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>"); -MODULE_LICENSE("GPL"); diff --git a/drivers/gpio/gpio-tps65910.c b/drivers/gpio/gpio-tps65910.c index cdbd7c740043..0ae6a5a54ea8 100644 --- a/drivers/gpio/gpio-tps65910.c +++ b/drivers/gpio/gpio-tps65910.c @@ -4,7 +4,7 @@ * Copyright 2010 Texas Instruments Inc. * * Author: Graeme Gregory <gg@slimlogic.co.uk> - * Author: Jorge Eduardo Candelaria jedu@slimlogic.co.uk> + * Author: Jorge Eduardo Candelaria <jedu@slimlogic.co.uk> * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -14,7 +14,7 @@ */ #include <linux/kernel.h> -#include <linux/module.h> +#include <linux/init.h> #include <linux/errno.h> #include <linux/gpio.h> #include <linux/i2c.h> @@ -193,15 +193,3 @@ static int __init tps65910_gpio_init(void) return platform_driver_register(&tps65910_gpio_driver); } subsys_initcall(tps65910_gpio_init); - -static void __exit tps65910_gpio_exit(void) -{ - platform_driver_unregister(&tps65910_gpio_driver); -} -module_exit(tps65910_gpio_exit); - -MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>"); -MODULE_AUTHOR("Jorge Eduardo Candelaria jedu@slimlogic.co.uk>"); -MODULE_DESCRIPTION("GPIO interface for TPS65910/TPS6511 PMICs"); -MODULE_LICENSE("GPL v2"); -MODULE_ALIAS("platform:tps65910-gpio"); diff --git a/drivers/gpio/gpio-vx855.c b/drivers/gpio/gpio-vx855.c index 8cdb9f7ec7e0..4e450121129b 100644 --- a/drivers/gpio/gpio-vx855.c +++ b/drivers/gpio/gpio-vx855.c @@ -186,6 +186,28 @@ static int vx855gpio_direction_output(struct gpio_chip *gpio, return 0; } +static int vx855gpio_set_single_ended(struct gpio_chip *gpio, + unsigned int nr, + enum single_ended_mode mode) +{ + /* The GPI cannot be single-ended */ + if (nr < NR_VX855_GPI) + return -EINVAL; + + /* The GPO's are push-pull */ + if (nr < NR_VX855_GPInO) { + if (mode != LINE_MODE_PUSH_PULL) + return -ENOTSUPP; + return 0; + } + + /* The GPIO's are open drain */ + if (mode != LINE_MODE_OPEN_DRAIN) + return -ENOTSUPP; + + return 0; +} + static const char *vx855gpio_names[NR_VX855_GP] = { "VX855_GPI0", "VX855_GPI1", "VX855_GPI2", "VX855_GPI3", "VX855_GPI4", "VX855_GPI5", "VX855_GPI6", "VX855_GPI7", "VX855_GPI8", "VX855_GPI9", @@ -209,6 +231,7 @@ static void vx855gpio_gpio_setup(struct vx855_gpio *vg) c->direction_output = vx855gpio_direction_output; c->get = vx855gpio_get; c->set = vx855gpio_set; + c->set_single_ended = vx855gpio_set_single_ended; c->dbg_show = NULL; c->base = 0; c->ngpio = NR_VX855_GP; diff --git a/drivers/gpio/gpio-wm831x.c b/drivers/gpio/gpio-wm831x.c index 18cb0f534b91..41ec7834059a 100644 --- a/drivers/gpio/gpio-wm831x.c +++ b/drivers/gpio/gpio-wm831x.c @@ -132,6 +132,28 @@ static int wm831x_gpio_set_debounce(struct gpio_chip *chip, unsigned offset, return wm831x_set_bits(wm831x, reg, WM831X_GPN_FN_MASK, fn); } +static int wm831x_set_single_ended(struct gpio_chip *chip, + unsigned int offset, + enum single_ended_mode mode) +{ + struct wm831x_gpio *wm831x_gpio = gpiochip_get_data(chip); + struct wm831x *wm831x = wm831x_gpio->wm831x; + int reg = WM831X_GPIO1_CONTROL + offset; + + switch (mode) { + case LINE_MODE_OPEN_DRAIN: + return wm831x_set_bits(wm831x, reg, + WM831X_GPN_OD_MASK, WM831X_GPN_OD); + case LINE_MODE_PUSH_PULL: + return wm831x_set_bits(wm831x, reg, + WM831X_GPN_OD_MASK, 0); + default: + break; + } + + return -ENOTSUPP; +} + #ifdef CONFIG_DEBUG_FS static void wm831x_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) { @@ -216,7 +238,7 @@ static void wm831x_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) pull, powerdomain, reg & WM831X_GPN_POL ? "" : " inverted", - reg & WM831X_GPN_OD ? "open-drain" : "CMOS", + reg & WM831X_GPN_OD ? "open-drain" : "push-pull", tristated ? " tristated" : "", reg); } @@ -234,6 +256,7 @@ static struct gpio_chip template_chip = { .set = wm831x_gpio_set, .to_irq = wm831x_gpio_to_irq, .set_debounce = wm831x_gpio_set_debounce, + .set_single_ended = wm831x_set_single_ended, .dbg_show = wm831x_gpio_dbg_show, .can_sleep = true, }; diff --git a/drivers/gpio/gpio-wm8994.c b/drivers/gpio/gpio-wm8994.c index b089df99a0d0..744af388c949 100644 --- a/drivers/gpio/gpio-wm8994.c +++ b/drivers/gpio/gpio-wm8994.c @@ -103,6 +103,28 @@ static void wm8994_gpio_set(struct gpio_chip *chip, unsigned offset, int value) wm8994_set_bits(wm8994, WM8994_GPIO_1 + offset, WM8994_GPN_LVL, value); } +static int wm8994_gpio_set_single_ended(struct gpio_chip *chip, + unsigned int offset, + enum single_ended_mode mode) +{ + struct wm8994_gpio *wm8994_gpio = gpiochip_get_data(chip); + struct wm8994 *wm8994 = wm8994_gpio->wm8994; + + switch (mode) { + case LINE_MODE_OPEN_DRAIN: + return wm8994_set_bits(wm8994, WM8994_GPIO_1 + offset, + WM8994_GPN_OP_CFG_MASK, + WM8994_GPN_OP_CFG); + case LINE_MODE_PUSH_PULL: + return wm8994_set_bits(wm8994, WM8994_GPIO_1 + offset, + WM8994_GPN_OP_CFG_MASK, 0); + default: + break; + } + + return -ENOTSUPP; +} + static int wm8994_gpio_to_irq(struct gpio_chip *chip, unsigned offset) { struct wm8994_gpio *wm8994_gpio = gpiochip_get_data(chip); @@ -217,7 +239,7 @@ static void wm8994_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) if (reg & WM8994_GPN_OP_CFG) seq_printf(s, "open drain "); else - seq_printf(s, "CMOS "); + seq_printf(s, "push-pull "); seq_printf(s, "%s (%x)\n", wm8994_gpio_fn(reg & WM8994_GPN_FN_MASK), reg); @@ -235,6 +257,7 @@ static struct gpio_chip template_chip = { .get = wm8994_gpio_get, .direction_output = wm8994_gpio_direction_out, .set = wm8994_gpio_set, + .set_single_ended = wm8994_gpio_set_single_ended, .to_irq = wm8994_gpio_to_irq, .dbg_show = wm8994_gpio_dbg_show, .can_sleep = true, diff --git a/drivers/gpio/gpio-xgene-sb.c b/drivers/gpio/gpio-xgene-sb.c index 31cbcb84cfaf..033258634b8c 100644 --- a/drivers/gpio/gpio-xgene-sb.c +++ b/drivers/gpio/gpio-xgene-sb.c @@ -216,23 +216,10 @@ static int xgene_gpio_sb_domain_alloc(struct irq_domain *domain, &parent_fwspec); } -static void xgene_gpio_sb_domain_free(struct irq_domain *domain, - unsigned int virq, - unsigned int nr_irqs) -{ - struct irq_data *d; - unsigned int i; - - for (i = 0; i < nr_irqs; i++) { - d = irq_domain_get_irq_data(domain, virq + i); - irq_domain_reset_irq_data(d); - } -} - static const struct irq_domain_ops xgene_gpio_sb_domain_ops = { .translate = xgene_gpio_sb_domain_translate, .alloc = xgene_gpio_sb_domain_alloc, - .free = xgene_gpio_sb_domain_free, + .free = irq_domain_free_irqs_common, .activate = xgene_gpio_sb_domain_activate, .deactivate = xgene_gpio_sb_domain_deactivate, }; diff --git a/drivers/gpio/gpio-xgene.c b/drivers/gpio/gpio-xgene.c index 0dc916191689..40a8881c2ce8 100644 --- a/drivers/gpio/gpio-xgene.c +++ b/drivers/gpio/gpio-xgene.c @@ -17,7 +17,7 @@ * along with this program. If not, see <http://www.gnu.org/licenses/>. */ -#include <linux/module.h> +#include <linux/acpi.h> #include <linux/kernel.h> #include <linux/init.h> #include <linux/io.h> @@ -85,6 +85,17 @@ static void xgene_gpio_set(struct gpio_chip *gc, unsigned int offset, int val) spin_unlock_irqrestore(&chip->lock, flags); } +static int xgene_gpio_get_direction(struct gpio_chip *gc, unsigned int offset) +{ + struct xgene_gpio *chip = gpiochip_get_data(gc); + unsigned long bank_offset, bit_offset; + + bank_offset = GPIO_SET_DR_OFFSET + GPIO_BANK_OFFSET(offset); + bit_offset = GPIO_BIT_OFFSET(offset); + + return !!(ioread32(chip->base + bank_offset) & BIT(bit_offset)); +} + static int xgene_gpio_dir_in(struct gpio_chip *gc, unsigned int offset) { struct xgene_gpio *chip = gpiochip_get_data(gc); @@ -189,6 +200,7 @@ static int xgene_gpio_probe(struct platform_device *pdev) spin_lock_init(&gpio->lock); gpio->chip.parent = &pdev->dev; + gpio->chip.get_direction = xgene_gpio_get_direction; gpio->chip.direction_input = xgene_gpio_dir_in; gpio->chip.direction_output = xgene_gpio_dir_out; gpio->chip.get = xgene_gpio_get; @@ -216,19 +228,21 @@ static const struct of_device_id xgene_gpio_of_match[] = { { .compatible = "apm,xgene-gpio", }, {}, }; -MODULE_DEVICE_TABLE(of, xgene_gpio_of_match); + +#ifdef CONFIG_ACPI +static const struct acpi_device_id xgene_gpio_acpi_match[] = { + { "APMC0D14", 0 }, + { }, +}; +#endif static struct platform_driver xgene_gpio_driver = { .driver = { .name = "xgene-gpio", .of_match_table = xgene_gpio_of_match, + .acpi_match_table = ACPI_PTR(xgene_gpio_acpi_match), .pm = XGENE_GPIO_PM_OPS, }, .probe = xgene_gpio_probe, }; - -module_platform_driver(xgene_gpio_driver); - -MODULE_AUTHOR("Feng Kan <fkan@apm.com>"); -MODULE_DESCRIPTION("APM X-Gene GPIO driver"); -MODULE_LICENSE("GPL"); +builtin_platform_driver(xgene_gpio_driver); diff --git a/drivers/gpio/gpio-xlp.c b/drivers/gpio/gpio-xlp.c index aa5813d2deb1..08897dc11915 100644 --- a/drivers/gpio/gpio-xlp.c +++ b/drivers/gpio/gpio-xlp.c @@ -85,7 +85,8 @@ enum { XLP_GPIO_VARIANT_XLP316, XLP_GPIO_VARIANT_XLP208, XLP_GPIO_VARIANT_XLP980, - XLP_GPIO_VARIANT_XLP532 + XLP_GPIO_VARIANT_XLP532, + GPIO_VARIANT_VULCAN }; struct xlp_gpio_priv { @@ -285,6 +286,10 @@ static const struct of_device_id xlp_gpio_of_ids[] = { .compatible = "netlogic,xlp532-gpio", .data = (void *)XLP_GPIO_VARIANT_XLP532, }, + { + .compatible = "brcm,vulcan-gpio", + .data = (void *)GPIO_VARIANT_VULCAN, + }, { /* sentinel */ }, }; MODULE_DEVICE_TABLE(of, xlp_gpio_of_ids); @@ -347,6 +352,7 @@ static int xlp_gpio_probe(struct platform_device *pdev) break; case XLP_GPIO_VARIANT_XLP980: case XLP_GPIO_VARIANT_XLP532: + case GPIO_VARIANT_VULCAN: priv->gpio_out_en = gpio_base + GPIO_9XX_OUTPUT_EN; priv->gpio_paddrv = gpio_base + GPIO_9XX_PADDRV; priv->gpio_intr_stat = gpio_base + GPIO_9XX_INT_STAT; @@ -354,7 +360,12 @@ static int xlp_gpio_probe(struct platform_device *pdev) priv->gpio_intr_pol = gpio_base + GPIO_9XX_INT_POL; priv->gpio_intr_en = gpio_base + GPIO_9XX_INT_EN00; - ngpio = (soc_type == XLP_GPIO_VARIANT_XLP980) ? 66 : 67; + if (soc_type == XLP_GPIO_VARIANT_XLP980) + ngpio = 66; + else if (soc_type == XLP_GPIO_VARIANT_XLP532) + ngpio = 67; + else + ngpio = 70; break; default: dev_err(&pdev->dev, "Unknown Processor type!\n"); @@ -377,10 +388,14 @@ static int xlp_gpio_probe(struct platform_device *pdev) gc->get = xlp_gpio_get; spin_lock_init(&priv->lock); - irq_base = irq_alloc_descs(-1, XLP_GPIO_IRQ_BASE, gc->ngpio, 0); - if (irq_base < 0) { + /* XLP has fixed IRQ range for GPIO interrupts */ + if (soc_type == GPIO_VARIANT_VULCAN) + irq_base = irq_alloc_descs(-1, 0, gc->ngpio, 0); + else + irq_base = irq_alloc_descs(-1, XLP_GPIO_IRQ_BASE, gc->ngpio, 0); + if (IS_ERR_VALUE(irq_base)) { dev_err(&pdev->dev, "Failed to allocate IRQ numbers\n"); - return -ENODEV; + return irq_base; } err = gpiochip_add_data(gc, priv); diff --git a/drivers/gpio/gpio-zevio.c b/drivers/gpio/gpio-zevio.c index cda6d922be98..e23ef7b9451d 100644 --- a/drivers/gpio/gpio-zevio.c +++ b/drivers/gpio/gpio-zevio.c @@ -10,7 +10,7 @@ #include <linux/spinlock.h> #include <linux/errno.h> -#include <linux/module.h> +#include <linux/init.h> #include <linux/bitops.h> #include <linux/io.h> #include <linux/of_device.h> @@ -203,32 +203,17 @@ static int zevio_gpio_probe(struct platform_device *pdev) return 0; } -static int zevio_gpio_remove(struct platform_device *pdev) -{ - struct zevio_gpio *controller = platform_get_drvdata(pdev); - - of_mm_gpiochip_remove(&controller->chip); - - return 0; -} - static const struct of_device_id zevio_gpio_of_match[] = { { .compatible = "lsi,zevio-gpio", }, { }, }; -MODULE_DEVICE_TABLE(of, zevio_gpio_of_match); - static struct platform_driver zevio_gpio_driver = { .driver = { .name = "gpio-zevio", .of_match_table = zevio_gpio_of_match, + .suppress_bind_attrs = true, }, .probe = zevio_gpio_probe, - .remove = zevio_gpio_remove, }; -module_platform_driver(zevio_gpio_driver); - -MODULE_LICENSE("GPL"); -MODULE_AUTHOR("Fabian Vogt <fabian@ritter-vogt.de>"); -MODULE_DESCRIPTION("LSI ZEVIO SoC GPIO driver"); +builtin_platform_driver(zevio_gpio_driver); diff --git a/drivers/gpio/gpio-zx.c b/drivers/gpio/gpio-zx.c index 47c79fa65670..93de8be0d885 100644 --- a/drivers/gpio/gpio-zx.c +++ b/drivers/gpio/gpio-zx.c @@ -1,4 +1,8 @@ /* + * ZTE ZX296702 GPIO driver + * + * Author: Jun Nie <jun.nie@linaro.org> + * * Copyright (C) 2015 Linaro Ltd. * * This program is free software; you can redistribute it and/or modify @@ -10,7 +14,7 @@ #include <linux/errno.h> #include <linux/gpio/driver.h> #include <linux/irqchip/chained_irq.h> -#include <linux/module.h> +#include <linux/init.h> #include <linux/of.h> #include <linux/pinctrl/consumer.h> #include <linux/platform_device.h> @@ -282,7 +286,6 @@ static const struct of_device_id zx_gpio_match[] = { }, { }, }; -MODULE_DEVICE_TABLE(of, zx_gpio_match); static struct platform_driver zx_gpio_driver = { .probe = zx_gpio_probe, @@ -291,9 +294,4 @@ static struct platform_driver zx_gpio_driver = { .of_match_table = of_match_ptr(zx_gpio_match), }, }; - -module_platform_driver(zx_gpio_driver) - -MODULE_AUTHOR("Jun Nie <jun.nie@linaro.org>"); -MODULE_DESCRIPTION("ZTE ZX296702 GPIO driver"); -MODULE_LICENSE("GPL"); +builtin_platform_driver(zx_gpio_driver) diff --git a/drivers/gpio/gpio-zynq.c b/drivers/gpio/gpio-zynq.c index 66d3d247d76d..75c6355b018d 100644 --- a/drivers/gpio/gpio-zynq.c +++ b/drivers/gpio/gpio-zynq.c @@ -713,7 +713,7 @@ static int zynq_gpio_probe(struct platform_device *pdev) pm_runtime_enable(&pdev->dev); ret = pm_runtime_get_sync(&pdev->dev); if (ret < 0) - return ret; + goto err_pm_dis; /* report a bug if gpio chip registration fails */ ret = gpiochip_add_data(chip, gpio); @@ -745,6 +745,8 @@ err_rm_gpiochip: gpiochip_remove(chip); err_pm_put: pm_runtime_put(&pdev->dev); +err_pm_dis: + pm_runtime_disable(&pdev->dev); return ret; } diff --git a/drivers/gpio/gpiolib-of.c b/drivers/gpio/gpiolib-of.c index 42a4bb7cf49a..d22dcc38179d 100644 --- a/drivers/gpio/gpiolib-of.c +++ b/drivers/gpio/gpiolib-of.c @@ -196,21 +196,68 @@ static struct gpio_desc *of_parse_own_gpio(struct device_node *np, } /** + * of_gpiochip_set_names() - set up the names of the lines + * @chip: GPIO chip whose lines should be named, if possible + */ +static void of_gpiochip_set_names(struct gpio_chip *gc) +{ + struct gpio_device *gdev = gc->gpiodev; + struct device_node *np = gc->of_node; + int i; + int nstrings; + + nstrings = of_property_count_strings(np, "gpio-line-names"); + if (nstrings <= 0) + /* Lines names not present */ + return; + + /* This is normally not what you want */ + if (gdev->ngpio != nstrings) + dev_info(&gdev->dev, "gpio-line-names specifies %d line " + "names but there are %d lines on the chip\n", + nstrings, gdev->ngpio); + + /* + * Make sure to not index beyond the end of the number of descriptors + * of the GPIO device. + */ + for (i = 0; i < gdev->ngpio; i++) { + const char *name; + int ret; + + ret = of_property_read_string_index(np, + "gpio-line-names", + i, + &name); + if (ret) { + if (ret != -ENODATA) + dev_err(&gdev->dev, + "unable to name line %d: %d\n", + i, ret); + break; + } + gdev->descs[i].name = name; + } +} + +/** * of_gpiochip_scan_gpios - Scan gpio-controller for gpio definitions * @chip: gpio chip to act on * * This is only used by of_gpiochip_add to request/set GPIO initial * configuration. + * It retures error if it fails otherwise 0 on success. */ -static void of_gpiochip_scan_gpios(struct gpio_chip *chip) +static int of_gpiochip_scan_gpios(struct gpio_chip *chip) { struct gpio_desc *desc = NULL; struct device_node *np; const char *name; enum gpio_lookup_flags lflags; enum gpiod_flags dflags; + int ret; - for_each_child_of_node(chip->of_node, np) { + for_each_available_child_of_node(chip->of_node, np) { if (!of_property_read_bool(np, "gpio-hog")) continue; @@ -218,9 +265,12 @@ static void of_gpiochip_scan_gpios(struct gpio_chip *chip) if (IS_ERR(desc)) continue; - if (gpiod_hog(desc, name, lflags, dflags)) - continue; + ret = gpiod_hog(desc, name, lflags, dflags); + if (ret < 0) + return ret; } + + return 0; } /** @@ -440,11 +490,13 @@ int of_gpiochip_add(struct gpio_chip *chip) if (status) return status; - of_node_get(chip->of_node); + /* If the chip defines names itself, these take precedence */ + if (!chip->names) + of_gpiochip_set_names(chip); - of_gpiochip_scan_gpios(chip); + of_node_get(chip->of_node); - return 0; + return of_gpiochip_scan_gpios(chip); } void of_gpiochip_remove(struct gpio_chip *chip) diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c index b747c76fd2b1..d407f904a31c 100644 --- a/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c @@ -622,14 +622,31 @@ int gpiochip_add_data(struct gpio_chip *chip, void *data) struct gpio_desc *desc = &gdev->descs[i]; desc->gdev = gdev; - - /* REVISIT: most hardware initializes GPIOs as inputs (often - * with pullups enabled) so power usage is minimized. Linux - * code should set the gpio direction first thing; but until - * it does, and in case chip->get_direction is not set, we may - * expose the wrong direction in sysfs. + /* + * REVISIT: most hardware initializes GPIOs as inputs + * (often with pullups enabled) so power usage is + * minimized. Linux code should set the gpio direction + * first thing; but until it does, and in case + * chip->get_direction is not set, we may expose the + * wrong direction in sysfs. */ - desc->flags = !chip->direction_input ? (1 << FLAG_IS_OUT) : 0; + + if (chip->get_direction) { + /* + * If we have .get_direction, set up the initial + * direction flag from the hardware. + */ + int dir = chip->get_direction(chip, i); + + if (!dir) + set_bit(FLAG_IS_OUT, &desc->flags); + } else if (!chip->direction_input) { + /* + * If the chip lacks the .direction_input callback + * we logically assume all lines are outputs. + */ + set_bit(FLAG_IS_OUT, &desc->flags); + } } spin_unlock_irqrestore(&gpio_lock, flags); @@ -1547,8 +1564,8 @@ EXPORT_SYMBOL_GPL(gpiod_direction_input); static int _gpiod_direction_output_raw(struct gpio_desc *desc, int value) { - struct gpio_chip *chip; - int status = -EINVAL; + struct gpio_chip *gc = desc->gdev->chip; + int ret; /* GPIOs used for IRQs shall not be set as output */ if (test_bit(FLAG_USED_AS_IRQ, &desc->flags)) { @@ -1558,28 +1575,50 @@ static int _gpiod_direction_output_raw(struct gpio_desc *desc, int value) return -EIO; } - /* Open drain pin should not be driven to 1 */ - if (value && test_bit(FLAG_OPEN_DRAIN, &desc->flags)) - return gpiod_direction_input(desc); - - /* Open source pin should not be driven to 0 */ - if (!value && test_bit(FLAG_OPEN_SOURCE, &desc->flags)) - return gpiod_direction_input(desc); + if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) { + /* First see if we can enable open drain in hardware */ + if (gc->set_single_ended) { + ret = gc->set_single_ended(gc, gpio_chip_hwgpio(desc), + LINE_MODE_OPEN_DRAIN); + if (!ret) + goto set_output_value; + } + /* Emulate open drain by not actively driving the line high */ + if (value) + return gpiod_direction_input(desc); + } + else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) { + if (gc->set_single_ended) { + ret = gc->set_single_ended(gc, gpio_chip_hwgpio(desc), + LINE_MODE_OPEN_SOURCE); + if (!ret) + goto set_output_value; + } + /* Emulate open source by not actively driving the line low */ + if (!value) + return gpiod_direction_input(desc); + } else { + /* Make sure to disable open drain/source hardware, if any */ + if (gc->set_single_ended) + gc->set_single_ended(gc, + gpio_chip_hwgpio(desc), + LINE_MODE_PUSH_PULL); + } - chip = desc->gdev->chip; - if (!chip->set || !chip->direction_output) { +set_output_value: + if (!gc->set || !gc->direction_output) { gpiod_warn(desc, "%s: missing set() or direction_output() operations\n", __func__); return -EIO; } - status = chip->direction_output(chip, gpio_chip_hwgpio(desc), value); - if (status == 0) + ret = gc->direction_output(gc, gpio_chip_hwgpio(desc), value); + if (!ret) set_bit(FLAG_IS_OUT, &desc->flags); trace_gpio_value(desc_to_gpio(desc), 0, value); - trace_gpio_direction(desc_to_gpio(desc), 0, status); - return status; + trace_gpio_direction(desc_to_gpio(desc), 0, ret); + return ret; } /** @@ -1841,10 +1880,10 @@ static void gpio_chip_set_multiple(struct gpio_chip *chip, } } -static void gpiod_set_array_value_priv(bool raw, bool can_sleep, - unsigned int array_size, - struct gpio_desc **desc_array, - int *value_array) +void gpiod_set_array_value_complex(bool raw, bool can_sleep, + unsigned int array_size, + struct gpio_desc **desc_array, + int *value_array) { int i = 0; @@ -1950,8 +1989,8 @@ void gpiod_set_raw_array_value(unsigned int array_size, { if (!desc_array) return; - gpiod_set_array_value_priv(true, false, array_size, desc_array, - value_array); + gpiod_set_array_value_complex(true, false, array_size, desc_array, + value_array); } EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value); @@ -1972,8 +2011,8 @@ void gpiod_set_array_value(unsigned int array_size, { if (!desc_array) return; - gpiod_set_array_value_priv(false, false, array_size, desc_array, - value_array); + gpiod_set_array_value_complex(false, false, array_size, desc_array, + value_array); } EXPORT_SYMBOL_GPL(gpiod_set_array_value); @@ -1998,13 +2037,22 @@ EXPORT_SYMBOL_GPL(gpiod_cansleep); */ int gpiod_to_irq(const struct gpio_desc *desc) { - struct gpio_chip *chip; - int offset; + struct gpio_chip *chip; + int offset; VALIDATE_DESC(desc); chip = desc->gdev->chip; offset = gpio_chip_hwgpio(desc); - return chip->to_irq ? chip->to_irq(chip, offset) : -ENXIO; + if (chip->to_irq) { + int retirq = chip->to_irq(chip, offset); + + /* Zero means NO_IRQ */ + if (!retirq) + return -ENXIO; + + return retirq; + } + return -ENXIO; } EXPORT_SYMBOL_GPL(gpiod_to_irq); @@ -2176,8 +2224,8 @@ void gpiod_set_raw_array_value_cansleep(unsigned int array_size, might_sleep_if(extra_checks); if (!desc_array) return; - gpiod_set_array_value_priv(true, true, array_size, desc_array, - value_array); + gpiod_set_array_value_complex(true, true, array_size, desc_array, + value_array); } EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value_cansleep); @@ -2199,8 +2247,8 @@ void gpiod_set_array_value_cansleep(unsigned int array_size, might_sleep_if(extra_checks); if (!desc_array) return; - gpiod_set_array_value_priv(false, true, array_size, desc_array, - value_array); + gpiod_set_array_value_complex(false, true, array_size, desc_array, + value_array); } EXPORT_SYMBOL_GPL(gpiod_set_array_value_cansleep); @@ -2726,15 +2774,16 @@ int gpiod_hog(struct gpio_desc *desc, const char *name, local_desc = gpiochip_request_own_desc(chip, hwnum, name); if (IS_ERR(local_desc)) { - pr_err("requesting hog GPIO %s (chip %s, offset %d) failed\n", - name, chip->label, hwnum); - return PTR_ERR(local_desc); + status = PTR_ERR(local_desc); + pr_err("requesting hog GPIO %s (chip %s, offset %d) failed, %d\n", + name, chip->label, hwnum, status); + return status; } status = gpiod_configure_flags(desc, name, dflags); if (status < 0) { - pr_err("setup of hog GPIO %s (chip %s, offset %d) failed\n", - name, chip->label, hwnum); + pr_err("setup of hog GPIO %s (chip %s, offset %d) failed, %d\n", + name, chip->label, hwnum, status); gpiochip_free_own_desc(desc); return status; } diff --git a/drivers/gpio/gpiolib.h b/drivers/gpio/gpiolib.h index e30e5fdb1214..2d9ea5e0cab3 100644 --- a/drivers/gpio/gpiolib.h +++ b/drivers/gpio/gpiolib.h @@ -141,6 +141,10 @@ struct gpio_desc *of_get_named_gpiod_flags(struct device_node *np, const char *list_name, int index, enum of_gpio_flags *flags); struct gpio_desc *gpiochip_get_desc(struct gpio_chip *chip, u16 hwnum); +void gpiod_set_array_value_complex(bool raw, bool can_sleep, + unsigned int array_size, + struct gpio_desc **desc_array, + int *value_array); extern struct spinlock gpio_lock; extern struct list_head gpio_devices; |