diff options
Diffstat (limited to 'drivers/edac/Kconfig')
| -rw-r--r-- | drivers/edac/Kconfig | 35 |
1 files changed, 32 insertions, 3 deletions
diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig index bb82d6be793c..66719925970f 100644 --- a/drivers/edac/Kconfig +++ b/drivers/edac/Kconfig @@ -4,10 +4,13 @@ # Licensed and distributed under the GPL # +config EDAC_SUPPORT + bool + menuconfig EDAC bool "EDAC (Error Detection And Correction) reporting" depends on HAS_IOMEM - depends on X86 || PPC || TILE || ARM + depends on X86 || PPC || TILE || ARM || EDAC_SUPPORT help EDAC is designed to report errors in the core system. These are low-level errors that are reported in the CPU or @@ -29,8 +32,6 @@ menuconfig EDAC if EDAC -comment "Reporting subsystems" - config EDAC_LEGACY_SYSFS bool "EDAC legacy sysfs" default y @@ -316,4 +317,32 @@ config EDAC_HIGHBANK_L2 Support for error detection and correction on the Calxeda Highbank memory controller. +config EDAC_OCTEON_PC + tristate "Cavium Octeon Primary Caches" + depends on EDAC_MM_EDAC && CPU_CAVIUM_OCTEON + help + Support for error detection and correction on the primary caches of + the cnMIPS cores of Cavium Octeon family SOCs. + +config EDAC_OCTEON_L2C + tristate "Cavium Octeon Secondary Caches (L2C)" + depends on EDAC_MM_EDAC && CPU_CAVIUM_OCTEON + help + Support for error detection and correction on the + Cavium Octeon family of SOCs. + +config EDAC_OCTEON_LMC + tristate "Cavium Octeon DRAM Memory Controller (LMC)" + depends on EDAC_MM_EDAC && CPU_CAVIUM_OCTEON + help + Support for error detection and correction on the + Cavium Octeon family of SOCs. + +config EDAC_OCTEON_PCI + tristate "Cavium Octeon PCI Controller" + depends on EDAC_MM_EDAC && PCI && CPU_CAVIUM_OCTEON + help + Support for error detection and correction on the + Cavium Octeon family of SOCs. + endif # EDAC |