diff options
Diffstat (limited to 'drivers/clocksource/timer-tegra20.c')
| -rw-r--r-- | drivers/clocksource/timer-tegra20.c | 43 |
1 files changed, 24 insertions, 19 deletions
diff --git a/drivers/clocksource/timer-tegra20.c b/drivers/clocksource/timer-tegra20.c index e2ef6b8211a5..6a3704142f31 100644 --- a/drivers/clocksource/timer-tegra20.c +++ b/drivers/clocksource/timer-tegra20.c @@ -6,6 +6,8 @@ * Colin Cross <ccross@google.com> */ +#define pr_fmt(fmt) "tegra-timer: " fmt + #include <linux/clk.h> #include <linux/clockchips.h> #include <linux/cpu.h> @@ -21,13 +23,13 @@ #include "timer-of.h" -#define RTC_SECONDS 0x08 -#define RTC_SHADOW_SECONDS 0x0c -#define RTC_MILLISECONDS 0x10 +#define RTC_SECONDS 0x08 +#define RTC_SHADOW_SECONDS 0x0c +#define RTC_MILLISECONDS 0x10 -#define TIMERUS_CNTR_1US 0x10 -#define TIMERUS_USEC_CFG 0x14 -#define TIMERUS_CNTR_FREEZE 0x4c +#define TIMERUS_CNTR_1US 0x10 +#define TIMERUS_USEC_CFG 0x14 +#define TIMERUS_CNTR_FREEZE 0x4c #define TIMER_PTV 0x0 #define TIMER_PTV_EN BIT(31) @@ -48,7 +50,7 @@ static u32 usec_config; static void __iomem *timer_reg_base; static int tegra_timer_set_next_event(unsigned long cycles, - struct clock_event_device *evt) + struct clock_event_device *evt) { void __iomem *reg_base = timer_of_base(to_timer_of(evt)); @@ -169,15 +171,17 @@ static struct timer_of suspend_rtc_to = { /* * tegra_rtc_read - Reads the Tegra RTC registers - * Care must be taken that this funciton is not called while the + * Care must be taken that this function is not called while the * tegra_rtc driver could be executing to avoid race conditions * on the RTC shadow register */ static u64 tegra_rtc_read_ms(struct clocksource *cs) { void __iomem *reg_base = timer_of_base(&suspend_rtc_to); + u32 ms = readl_relaxed(reg_base + RTC_MILLISECONDS); u32 s = readl_relaxed(reg_base + RTC_SHADOW_SECONDS); + return (u64)s * MSEC_PER_SEC + ms; } @@ -222,7 +226,7 @@ static int __init tegra_init_timer(struct device_node *np, bool tegra20) to = this_cpu_ptr(&tegra_to); ret = timer_of_init(np, to); - if (ret < 0) + if (ret) goto out; timer_reg_base = timer_of_base(to); @@ -281,8 +285,7 @@ static int __init tegra_init_timer(struct device_node *np, bool tegra20) cpu_to->clkevt.cpumask = cpumask_of(cpu); cpu_to->clkevt.irq = irq_of_parse_and_map(np, idx); if (!cpu_to->clkevt.irq) { - pr_err("%s: can't map IRQ for CPU%d\n", - __func__, cpu); + pr_err("failed to map irq for cpu%d\n", cpu); ret = -EINVAL; goto out_irq; } @@ -292,8 +295,8 @@ static int __init tegra_init_timer(struct device_node *np, bool tegra20) IRQF_TIMER | IRQF_NOBALANCING, cpu_to->clkevt.name, &cpu_to->clkevt); if (ret) { - pr_err("%s: cannot setup irq %d for CPU%d\n", - __func__, cpu_to->clkevt.irq, cpu); + pr_err("failed to set up irq for cpu%d: %d\n", + cpu, ret); irq_dispose_mapping(cpu_to->clkevt.irq); cpu_to->clkevt.irq = 0; goto out_irq; @@ -312,11 +315,14 @@ static int __init tegra_init_timer(struct device_node *np, bool tegra20) register_current_timer_delay(&tegra_delay_timer); #endif - cpuhp_setup_state(CPUHP_AP_TEGRA_TIMER_STARTING, - "AP_TEGRA_TIMER_STARTING", tegra_timer_setup, - tegra_timer_stop); + ret = cpuhp_setup_state(CPUHP_AP_TEGRA_TIMER_STARTING, + "AP_TEGRA_TIMER_STARTING", tegra_timer_setup, + tegra_timer_stop); + if (ret) + pr_err("failed to set up cpu hp state: %d\n", ret); return ret; + out_irq: for_each_possible_cpu(cpu) { struct timer_of *cpu_to; @@ -329,6 +335,7 @@ out_irq: } out: timer_of_cleanup(to); + return ret; } @@ -352,8 +359,6 @@ static int __init tegra20_init_rtc(struct device_node *np) if (ret) return ret; - clocksource_register_hz(&suspend_rtc_clocksource, 1000); - - return 0; + return clocksource_register_hz(&suspend_rtc_clocksource, 1000); } TIMER_OF_DECLARE(tegra20_rtc, "nvidia,tegra20-rtc", tegra20_init_rtc); |