diff options
Diffstat (limited to 'arch')
304 files changed, 4088 insertions, 10304 deletions
diff --git a/arch/alpha/include/asm/thread_info.h b/arch/alpha/include/asm/thread_info.h index 4554ecbff7c6..1f8c72959fb6 100644 --- a/arch/alpha/include/asm/thread_info.h +++ b/arch/alpha/include/asm/thread_info.h @@ -7,6 +7,7 @@ #include <asm/processor.h> #include <asm/types.h> #include <asm/hwrpb.h> +#include <asm/sysinfo.h> #endif #ifndef __ASSEMBLY__ @@ -21,6 +22,7 @@ struct thread_info { mm_segment_t addr_limit; /* thread address space */ unsigned cpu; /* current CPU */ int preempt_count; /* 0 => preemptable, <0 => BUG */ + unsigned int status; /* thread-synchronous flags */ int bpt_nsaved; unsigned long bpt_addr[2]; /* breakpoint handling */ @@ -63,8 +65,6 @@ register struct thread_info *__current_thread_info __asm__("$8"); * - these are process state flags and used from assembly * - pending work-to-be-done flags come first and must be assigned to be * within bits 0 to 7 to fit in and immediate operand. - * - ALPHA_UAC_SHIFT below must be kept consistent with the unaligned - * control flags. * * TIF_SYSCALL_TRACE is known to be 0 via blbs. */ @@ -72,18 +72,12 @@ register struct thread_info *__current_thread_info __asm__("$8"); #define TIF_NOTIFY_RESUME 1 /* callback before returning to user */ #define TIF_SIGPENDING 2 /* signal pending */ #define TIF_NEED_RESCHED 3 /* rescheduling necessary */ -#define TIF_POLLING_NRFLAG 8 /* poll_idle is polling NEED_RESCHED */ #define TIF_DIE_IF_KERNEL 9 /* dik recursion lock */ -#define TIF_UAC_NOPRINT 10 /* ! Preserve sequence of following */ -#define TIF_UAC_NOFIX 11 /* ! flags as they match */ -#define TIF_UAC_SIGBUS 12 /* ! userspace part of 'osf_sysinfo' */ #define TIF_MEMDIE 13 /* is terminating due to OOM killer */ -#define TIF_RESTORE_SIGMASK 14 /* restore signal mask in do_signal */ #define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) #define _TIF_SIGPENDING (1<<TIF_SIGPENDING) #define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED) -#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) #define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME) /* Work to do on interrupt/exception return. */ @@ -94,29 +88,63 @@ register struct thread_info *__current_thread_info __asm__("$8"); #define _TIF_ALLWORK_MASK (_TIF_WORK_MASK \ | _TIF_SYSCALL_TRACE) -#define ALPHA_UAC_SHIFT TIF_UAC_NOPRINT -#define ALPHA_UAC_MASK (1 << TIF_UAC_NOPRINT | 1 << TIF_UAC_NOFIX | \ - 1 << TIF_UAC_SIGBUS) +#define TS_UAC_NOPRINT 0x0001 /* ! Preserve the following three */ +#define TS_UAC_NOFIX 0x0002 /* ! flags as they match */ +#define TS_UAC_SIGBUS 0x0004 /* ! userspace part of 'osf_sysinfo' */ +#define TS_RESTORE_SIGMASK 0x0008 /* restore signal mask in do_signal() */ +#define TS_POLLING 0x0010 /* idle task polling need_resched, + skip sending interrupt */ -#define SET_UNALIGN_CTL(task,value) ({ \ - task_thread_info(task)->flags = ((task_thread_info(task)->flags & \ - ~ALPHA_UAC_MASK) \ - | (((value) << ALPHA_UAC_SHIFT) & (1<<TIF_UAC_NOPRINT))\ - | (((value) << (ALPHA_UAC_SHIFT + 1)) & (1<<TIF_UAC_SIGBUS)) \ - | (((value) << (ALPHA_UAC_SHIFT - 1)) & (1<<TIF_UAC_NOFIX)));\ +#define tsk_is_polling(t) (task_thread_info(t)->status & TS_POLLING) + +#ifndef __ASSEMBLY__ +#define HAVE_SET_RESTORE_SIGMASK 1 +static inline void set_restore_sigmask(void) +{ + struct thread_info *ti = current_thread_info(); + ti->status |= TS_RESTORE_SIGMASK; + WARN_ON(!test_bit(TIF_SIGPENDING, (unsigned long *)&ti->flags)); +} +static inline void clear_restore_sigmask(void) +{ + current_thread_info()->status &= ~TS_RESTORE_SIGMASK; +} +static inline bool test_restore_sigmask(void) +{ + return current_thread_info()->status & TS_RESTORE_SIGMASK; +} +static inline bool test_and_clear_restore_sigmask(void) +{ + struct thread_info *ti = current_thread_info(); + if (!(ti->status & TS_RESTORE_SIGMASK)) + return false; + ti->status &= ~TS_RESTORE_SIGMASK; + return true; +} +#endif + +#define SET_UNALIGN_CTL(task,value) ({ \ + __u32 status = task_thread_info(task)->status & ~UAC_BITMASK; \ + if (value & PR_UNALIGN_NOPRINT) \ + status |= TS_UAC_NOPRINT; \ + if (value & PR_UNALIGN_SIGBUS) \ + status |= TS_UAC_SIGBUS; \ + if (value & 4) /* alpha-specific */ \ + status |= TS_UAC_NOFIX; \ + task_thread_info(task)->status = status; \ 0; }) #define GET_UNALIGN_CTL(task,value) ({ \ - put_user((task_thread_info(task)->flags & (1 << TIF_UAC_NOPRINT))\ - >> ALPHA_UAC_SHIFT \ - | (task_thread_info(task)->flags & (1 << TIF_UAC_SIGBUS))\ - >> (ALPHA_UAC_SHIFT + 1) \ - | (task_thread_info(task)->flags & (1 << TIF_UAC_NOFIX))\ - >> (ALPHA_UAC_SHIFT - 1), \ - (int __user *)(value)); \ + __u32 status = task_thread_info(task)->status & ~UAC_BITMASK; \ + __u32 res = 0; \ + if (status & TS_UAC_NOPRINT) \ + res |= PR_UNALIGN_NOPRINT; \ + if (status & TS_UAC_SIGBUS) \ + res |= PR_UNALIGN_SIGBUS; \ + if (status & TS_UAC_NOFIX) \ + res |= 4; \ + put_user(res, (int __user *)(value)); \ }) -#define tsk_is_polling(t) test_tsk_thread_flag(t, TIF_POLLING_NRFLAG) - #endif /* __KERNEL__ */ #endif /* _ALPHA_THREAD_INFO_H */ diff --git a/arch/alpha/kernel/osf_sys.c b/arch/alpha/kernel/osf_sys.c index 9eb090582cf1..1e6956a90608 100644 --- a/arch/alpha/kernel/osf_sys.c +++ b/arch/alpha/kernel/osf_sys.c @@ -793,8 +793,7 @@ SYSCALL_DEFINE5(osf_getsysinfo, unsigned long, op, void __user *, buffer, case GSI_UACPROC: if (nbytes < sizeof(unsigned int)) return -EINVAL; - w = (current_thread_info()->flags >> ALPHA_UAC_SHIFT) & - UAC_BITMASK; + w = current_thread_info()->status & UAC_BITMASK; if (put_user(w, (unsigned int __user *)buffer)) return -EFAULT; return 1; @@ -904,24 +903,20 @@ SYSCALL_DEFINE5(osf_setsysinfo, unsigned long, op, void __user *, buffer, break; case SSI_NVPAIRS: { - unsigned long v, w, i; - unsigned int old, new; + unsigned __user *p = buffer; + unsigned i; - for (i = 0; i < nbytes; ++i) { + for (i = 0, p = buffer; i < nbytes; ++i, p += 2) { + unsigned v, w, status; - if (get_user(v, 2*i + (unsigned int __user *)buffer)) - return -EFAULT; - if (get_user(w, 2*i + 1 + (unsigned int __user *)buffer)) + if (get_user(v, p) || get_user(w, p + 1)) return -EFAULT; switch (v) { case SSIN_UACPROC: - again: - old = current_thread_info()->flags; - new = old & ~(UAC_BITMASK << ALPHA_UAC_SHIFT); - new = new | (w & UAC_BITMASK) << ALPHA_UAC_SHIFT; - if (cmpxchg(¤t_thread_info()->flags, - old, new) != old) - goto again; + w &= UAC_BITMASK; + status = current_thread_info()->status; + status = (status & ~UAC_BITMASK) | w; + current_thread_info()->status = status; break; default: diff --git a/arch/alpha/kernel/process.c b/arch/alpha/kernel/process.c index 4054e0ffe2b2..51987dcf79b8 100644 --- a/arch/alpha/kernel/process.c +++ b/arch/alpha/kernel/process.c @@ -49,7 +49,7 @@ EXPORT_SYMBOL(pm_power_off); void cpu_idle(void) { - set_thread_flag(TIF_POLLING_NRFLAG); + current_thread_info()->status |= TS_POLLING; while (1) { /* FIXME -- EV6 and LCA45 know how to power down diff --git a/arch/alpha/kernel/traps.c b/arch/alpha/kernel/traps.c index 80d987c0e9aa..272666d006df 100644 --- a/arch/alpha/kernel/traps.c +++ b/arch/alpha/kernel/traps.c @@ -780,17 +780,17 @@ do_entUnaUser(void __user * va, unsigned long opcode, /* Check the UAC bits to decide what the user wants us to do with the unaliged access. */ - if (!test_thread_flag (TIF_UAC_NOPRINT)) { + if (!(current_thread_info()->status & TS_UAC_NOPRINT)) { if (__ratelimit(&ratelimit)) { printk("%s(%d): unaligned trap at %016lx: %p %lx %ld\n", current->comm, task_pid_nr(current), regs->pc - 4, va, opcode, reg); } } - if (test_thread_flag (TIF_UAC_SIGBUS)) + if ((current_thread_info()->status & TS_UAC_SIGBUS)) goto give_sigbus; /* Not sure why you'd want to use this, but... */ - if (test_thread_flag (TIF_UAC_NOFIX)) + if ((current_thread_info()->status & TS_UAC_NOFIX)) return; /* Don't bother reading ds in the access check since we already diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 73067efd4845..ade7e924bef5 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1603,8 +1603,8 @@ config NR_CPUS default "4" config HOTPLUG_CPU - bool "Support for hot-pluggable CPUs (EXPERIMENTAL)" - depends on SMP && HOTPLUG && EXPERIMENTAL + bool "Support for hot-pluggable CPUs" + depends on SMP && HOTPLUG help Say Y here to experiment with turning CPUs off and on. CPUs can be controlled through /sys/devices/system/cpu. @@ -1645,8 +1645,8 @@ config HZ default 100 config THUMB2_KERNEL - bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)" - depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL + bool "Compile the kernel in Thumb-2 mode" + depends on CPU_V7 && !CPU_V6 && !CPU_V6K select AEABI select ARM_ASM_UNIFIED select ARM_UNWIND @@ -1850,6 +1850,7 @@ config XEN_DOM0 config XEN bool "Xen guest support on ARM (EXPERIMENTAL)" depends on EXPERIMENTAL && ARM && OF + depends on CPU_V7 && !CPU_V6 help Say Y if you want to run Linux in a Virtual Machine on Xen on ARM. diff --git a/arch/arm/Makefile b/arch/arm/Makefile index f023e3acdfbd..5f914fca911b 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -21,8 +21,6 @@ endif OBJCOPYFLAGS :=-O binary -R .comment -S GZFLAGS :=-9 #KBUILD_CFLAGS +=-pipe -# Explicitly specifiy 32-bit ARM ISA since toolchain default can be -mthumb: -KBUILD_CFLAGS +=$(call cc-option,-marm,) # Never generate .eh_frame KBUILD_CFLAGS += $(call cc-option,-fno-dwarf2-cfi-asm) @@ -105,17 +103,20 @@ endif ifeq ($(CONFIG_THUMB2_KERNEL),y) AFLAGS_AUTOIT :=$(call as-option,-Wa$(comma)-mimplicit-it=always,-Wa$(comma)-mauto-it) AFLAGS_NOWARN :=$(call as-option,-Wa$(comma)-mno-warn-deprecated,-Wa$(comma)-W) -CFLAGS_THUMB2 :=-mthumb $(AFLAGS_AUTOIT) $(AFLAGS_NOWARN) -AFLAGS_THUMB2 :=$(CFLAGS_THUMB2) -Wa$(comma)-mthumb +CFLAGS_ISA :=-mthumb $(AFLAGS_AUTOIT) $(AFLAGS_NOWARN) +AFLAGS_ISA :=$(CFLAGS_ISA) -Wa$(comma)-mthumb # Work around buggy relocation from gas if requested: ifeq ($(CONFIG_THUMB2_AVOID_R_ARM_THM_JUMP11),y) CFLAGS_MODULE +=-fno-optimize-sibling-calls endif +else +CFLAGS_ISA :=$(call cc-option,-marm,) +AFLAGS_ISA :=$(CFLAGS_ISA) endif # Need -Uarm for gcc < 3.x -KBUILD_CFLAGS +=$(CFLAGS_ABI) $(CFLAGS_THUMB2) $(arch-y) $(tune-y) $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) -msoft-float -Uarm -KBUILD_AFLAGS +=$(CFLAGS_ABI) $(AFLAGS_THUMB2) $(arch-y) $(tune-y) -include asm/unified.h -msoft-float +KBUILD_CFLAGS +=$(CFLAGS_ABI) $(CFLAGS_ISA) $(arch-y) $(tune-y) $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) -msoft-float -Uarm +KBUILD_AFLAGS +=$(CFLAGS_ABI) $(AFLAGS_ISA) $(arch-y) $(tune-y) -include asm/unified.h -msoft-float CHECKFLAGS += -D__arm__ diff --git a/arch/arm/boot/Makefile b/arch/arm/boot/Makefile index 3fdab016aa5c..f2aa09eb658e 100644 --- a/arch/arm/boot/Makefile +++ b/arch/arm/boot/Makefile @@ -33,7 +33,7 @@ ifeq ($(CONFIG_XIP_KERNEL),y) $(obj)/xipImage: vmlinux FORCE $(call if_changed,objcopy) - @echo ' Kernel: $@ is ready (physical address: $(CONFIG_XIP_PHYS_ADDR))' + $(kecho) ' Kernel: $@ is ready (physical address: $(CONFIG_XIP_PHYS_ADDR))' $(obj)/Image $(obj)/zImage: FORCE @echo 'Kernel configured for XIP (CONFIG_XIP_KERNEL=y)' @@ -48,14 +48,14 @@ $(obj)/xipImage: FORCE $(obj)/Image: vmlinux FORCE $(call if_changed,objcopy) - @echo ' Kernel: $@ is ready' + $(kecho) ' Kernel: $@ is ready' $(obj)/compressed/vmlinux: $(obj)/Image FORCE $(Q)$(MAKE) $(build)=$(obj)/compressed $@ $(obj)/zImage: $(obj)/compressed/vmlinux FORCE $(call if_changed,objcopy) - @echo ' Kernel: $@ is ready' + $(kecho) ' Kernel: $@ is ready' endif @@ -90,7 +90,7 @@ fi $(obj)/uImage: $(obj)/zImage FORCE @$(check_for_multiple_loadaddr) $(call if_changed,uimage) - @echo ' Image $@ is ready' + $(kecho) ' Image $@ is ready' $(obj)/bootp/bootp: $(obj)/zImage initrd FORCE $(Q)$(MAKE) $(build)=$(obj)/bootp $@ @@ -98,7 +98,7 @@ $(obj)/bootp/bootp: $(obj)/zImage initrd FORCE $(obj)/bootpImage: $(obj)/bootp/bootp FORCE $(call if_changed,objcopy) - @echo ' Kernel: $@ is ready' + $(kecho) ' Kernel: $@ is ready' PHONY += initrd FORCE initrd: diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index f37cf9fa5fa0..b994045802b0 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -24,7 +24,8 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \ exynos4210-smdkv310.dtb \ exynos4210-trats.dtb \ exynos5250-smdk5250.dtb -dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb +dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb \ + ecx-2000.dtb dtb-$(CONFIG_ARCH_INTEGRATOR) += integratorap.dtb \ integratorcp.dtb dtb-$(CONFIG_ARCH_LPC32XX) += ea3250.dtb phy3250.dtb @@ -77,7 +78,8 @@ dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb dtb-$(CONFIG_ARCH_U8500) += snowball.dtb dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \ r8a7740-armadillo800eva.dtb \ - sh73a0-kzm9g.dtb + sh73a0-kzm9g.dtb \ + sh7372-mackerel.dtb dtb-$(CONFIG_ARCH_SPEAR13XX) += spear1310-evb.dtb \ spear1340-evb.dtb dtb-$(CONFIG_ARCH_SPEAR3XX)+= spear300-evb.dtb \ diff --git a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi index b06c0db273b1..e6391a4e6649 100644 --- a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi +++ b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi @@ -126,14 +126,14 @@ #size-cells = <0>; btn3 { - label = "Buttin 3"; + label = "Button 3"; gpios = <&pioA 30 1>; linux,code = <0x103>; gpio-key,wakeup; }; btn4 { - label = "Buttin 4"; + label = "Button 4"; gpios = <&pioA 31 1>; linux,code = <0x104>; gpio-key,wakeup; diff --git a/arch/arm/boot/dts/dbx5x0.dtsi b/arch/arm/boot/dts/dbx5x0.dtsi index 748ba7aa746c..4b0e0ca08f40 100644 --- a/arch/arm/boot/dts/dbx5x0.dtsi +++ b/arch/arm/boot/dts/dbx5x0.dtsi @@ -483,6 +483,8 @@ compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell"; reg = <0x80004000 0x1000>; interrupts = <0 21 0x4>; + arm,primecell-periphid = <0x180024>; + #address-cells = <1>; #size-cells = <0>; v-i2c-supply = <&db8500_vape_reg>; @@ -494,6 +496,8 @@ compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell"; reg = <0x80122000 0x1000>; interrupts = <0 22 0x4>; + arm,primecell-periphid = <0x180024>; + #address-cells = <1>; #size-cells = <0>; v-i2c-supply = <&db8500_vape_reg>; @@ -505,6 +509,8 @@ compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell"; reg = <0x80128000 0x1000>; interrupts = <0 55 0x4>; + arm,primecell-periphid = <0x180024>; + #address-cells = <1>; #size-cells = <0>; v-i2c-supply = <&db8500_vape_reg>; @@ -516,6 +522,8 @@ compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell"; reg = <0x80110000 0x1000>; interrupts = <0 12 0x4>; + arm,primecell-periphid = <0x180024>; + #address-cells = <1>; #size-cells = <0>; v-i2c-supply = <&db8500_vape_reg>; @@ -527,6 +535,8 @@ compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell"; reg = <0x8012a000 0x1000>; interrupts = <0 51 0x4>; + arm,primecell-periphid = <0x180024>; + #address-cells = <1>; #size-cells = <0>; v-i2c-supply = <&db8500_vape_reg>; @@ -573,33 +583,38 @@ interrupts = <0 60 0x4>; status = "disabled"; }; + sdi@80118000 { compatible = "arm,pl18x", "arm,primecell"; reg = <0x80118000 0x1000>; interrupts = <0 50 0x4>; status = "disabled"; }; + sdi@80005000 { compatible = "arm,pl18x", "arm,primecell"; reg = <0x80005000 0x1000>; interrupts = <0 41 0x4>; status = "disabled"; }; + sdi@80119000 { compatible = "arm,pl18x", "arm,primecell"; reg = <0x80119000 0x1000>; interrupts = <0 59 0x4>; status = "disabled"; }; + sdi@80114000 { compatible = "arm,pl18x", "arm,primecell"; reg = <0x80114000 0x1000>; interrupts = <0 99 0x4>; status = "disabled"; }; + sdi@80008000 { compatible = "arm,pl18x", "arm,primecell"; - reg = <0x80114000 0x1000>; + reg = <0x80008000 0x1000>; interrupts = <0 100 0x4>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/ecx-2000.dts b/arch/arm/boot/dts/ecx-2000.dts new file mode 100644 index 000000000000..46477ac1de99 --- /dev/null +++ b/arch/arm/boot/dts/ecx-2000.dts @@ -0,0 +1,104 @@ +/* + * Copyright 2011-2012 Calxeda, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see <http://www.gnu.org/licenses/>. + */ + +/dts-v1/; + +/* First 4KB has pen for secondary cores. */ +/memreserve/ 0x00000000 0x0001000; + +/ { + model = "Calxeda ECX-2000"; + compatible = "calxeda,ecx-2000"; + #address-cells = <2>; + #size-cells = <2>; + clock-ranges; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + compatible = "arm,cortex-a15"; + reg = <0>; + clocks = <&a9pll>; + clock-names = "cpu"; + }; + + cpu@1 { + compatible = "arm,cortex-a15"; + reg = <1>; + clocks = <&a9pll>; + clock-names = "cpu"; + }; + + cpu@2 { + compatible = "arm,cortex-a15"; + reg = <2>; + clocks = <&a9pll>; + clock-names = "cpu"; + }; + + cpu@3 { + compatible = "arm,cortex-a15"; + reg = <3>; + clocks = <&a9pll>; + clock-names = "cpu"; + }; + }; + + memory@0 { + name = "memory"; + device_type = "memory"; + reg = <0x00000000 0x00000000 0x00000000 0xff800000>; + }; + + memory@200000000 { + name = "memory"; + device_type = "memory"; + reg = <0x00000002 0x00000000 0x00000003 0x00000000>; + }; + + soc { + ranges = <0x00000000 0x00000000 0x00000000 0xffffffff>; + + timer { + compatible = "arm,cortex-a15-timer", "arm,armv7-timer"; interrupts = <1 13 0xf08>, + <1 14 0xf08>, + <1 11 0xf08>, + <1 10 0xf08>; + }; + + intc: interrupt-controller@fff11000 { + compatible = "arm,cortex-a15-gic"; + #interrupt-cells = <3>; + #size-cells = <0>; + #address-cells = <1>; + interrupt-controller; + interrupts = <1 9 0xf04>; + reg = <0xfff11000 0x1000>, + <0xfff12000 0x1000>, + <0xfff14000 0x2000>, + <0xfff16000 0x2000>; + }; + + pmu { + compatible = "arm,cortex-a9-pmu"; + interrupts = <0 76 4 0 75 4 0 74 4 0 73 4>; + }; + }; +}; + +/include/ "ecx-common.dtsi" diff --git a/arch/arm/boot/dts/ecx-common.dtsi b/arch/arm/boot/dts/ecx-common.dtsi new file mode 100644 index 000000000000..d61b535f682a --- /dev/null +++ b/arch/arm/boot/dts/ecx-common.dtsi @@ -0,0 +1,237 @@ +/* + * Copyright 2011-2012 Calxeda, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see <http://www.gnu.org/licenses/>. + */ + +/ { + chosen { + bootargs = "console=ttyAMA0"; + }; + + soc { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + interrupt-parent = <&intc>; + + sata@ffe08000 { + compatible = "calxeda,hb-ahci"; + reg = <0xffe08000 0x10000>; + interrupts = <0 83 4>; + dma-coherent; + calxeda,port-phys = <&combophy5 0 &combophy0 0 + &combophy0 1 &combophy0 2 + &combophy0 3>; + }; + + sdhci@ffe0e000 { + compatible = "calxeda,hb-sdhci"; + reg = <0xffe0e000 0x1000>; + interrupts = <0 90 4>; + clocks = <&eclk>; + status = "disabled"; + }; + + memory-controller@fff00000 { + compatible = "calxeda,hb-ddr-ctrl"; + reg = <0xfff00000 0x1000>; + interrupts = <0 91 4>; + }; + + ipc@fff20000 { + compatible = "arm,pl320", "arm,primecell"; + reg = <0xfff20000 0x1000>; + interrupts = <0 7 4>; + clocks = <&pclk>; + clock-names = "apb_pclk"; + }; + + gpioe: gpio@fff30000 { + #gpio-cells = <2>; + compatible = "arm,pl061", "arm,primecell"; + gpio-controller; + reg = <0xfff30000 0x1000>; + interrupts = <0 14 4>; + clocks = <&pclk>; + clock-names = "apb_pclk"; + status = "disabled"; + }; + + gpiof: gpio@fff31000 { + #gpio-cells = <2>; + compatible = "arm,pl061", "arm,primecell"; + gpio-controller; + reg = <0xfff31000 0x1000>; + interrupts = <0 15 4>; + clocks = <&pclk>; + clock-names = "apb_pclk"; + status = "disabled"; + }; + + gpiog: gpio@fff32000 { + #gpio-cells = <2>; + compatible = "arm,pl061", "arm,primecell"; + gpio-controller; + reg = <0xfff32000 0x1000>; + interrupts = <0 16 4>; + clocks = <&pclk>; + clock-names = "apb_pclk"; + status = "disabled"; + }; + + gpioh: gpio@fff33000 { + #gpio-cells = <2>; + compatible = "arm,pl061", "arm,primecell"; + gpio-controller; + reg = <0xfff33000 0x1000>; + interrupts = <0 17 4>; + clocks = <&pclk>; + clock-names = "apb_pclk"; + status = "disabled"; + }; + + timer@fff34000 { + compatible = "arm,sp804", "arm,primecell"; + reg = <0xfff34000 0x1000>; + interrupts = <0 18 4>; + clocks = <&pclk>; + clock-names = "apb_pclk"; + }; + + rtc@fff35000 { + compatible = "arm,pl031", "arm,primecell"; + reg = <0xfff35000 0x1000>; + interrupts = <0 19 4>; + clocks = <&pclk>; + clock-names = "apb_pclk"; + }; + + serial@fff36000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0xfff36000 0x1000>; + interrupts = <0 20 4>; + clocks = <&pclk>; + clock-names = "apb_pclk"; + }; + + smic@fff3a000 { + compatible = "ipmi-smic"; + device_type = "ipmi"; + reg = <0xfff3a000 0x1000>; + interrupts = <0 24 4>; + reg-size = <4>; + reg-spacing = <4>; + }; + + sregs@fff3c000 { + compatible = "calxeda,hb-sregs"; + reg = <0xfff3c000 0x1000>; + + clocks { + #address-cells = <1>; + #size-cells = <0>; + + osc: oscillator { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <33333000>; + }; + + ddrpll: ddrpll { + #clock-cells = <0>; + compatible = "calxeda,hb-pll-clock"; + clocks = <&osc>; + reg = <0x108>; + }; + + a9pll: a9pll { + #clock-cells = <0>; + compatible = "calxeda,hb-pll-clock"; + clocks = <&osc>; + reg = <0x100>; + }; + + a9periphclk: a9periphclk { + #clock-cells = <0>; + compatible = "calxeda,hb-a9periph-clock"; + clocks = <&a9pll>; + reg = <0x104>; + }; + + a9bclk: a9bclk { + #clock-cells = <0>; + compatible = "calxeda,hb-a9bus-clock"; + clocks = <&a9pll>; + reg = <0x104>; + }; + + emmcpll: emmcpll { + #clock-cells = <0>; + compatible = "calxeda,hb-pll-clock"; + clocks = <&osc>; + reg = <0x10C>; + }; + + eclk: eclk { + #clock-cells = <0>; + compatible = "calxeda,hb-emmc-clock"; + clocks = <&emmcpll>; + reg = <0x114>; + }; + + pclk: pclk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <150000000>; + }; + }; + }; + + dma@fff3d000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0xfff3d000 0x1000>; + interrupts = <0 92 4>; + clocks = <&pclk>; + clock-names = "apb_pclk"; + }; + + ethernet@fff50000 { + compatible = "calxeda,hb-xgmac"; + reg = <0xfff50000 0x1000>; + interrupts = <0 77 4 0 78 4 0 79 4>; + dma-coherent; + }; + + ethernet@fff51000 { + compatible = "calxeda,hb-xgmac"; + reg = <0xfff51000 0x1000>; + interrupts = <0 80 4 0 81 4 0 82 4>; + dma-coherent; + }; + + combophy0: combo-phy@fff58000 { + compatible = "calxeda,hb-combophy"; + #phy-cells = <1>; + reg = <0xfff58000 0x1000>; + phydev = <5>; + }; + + combophy5: combo-phy@fff5d000 { + compatible = "calxeda,hb-combophy"; + #phy-cells = <1>; + reg = <0xfff5d000 0x1000>; + phydev = <31>; + }; + }; +}; diff --git a/arch/arm/boot/dts/exynos4210-trats.dts b/arch/arm/boot/dts/exynos4210-trats.dts index 73567b843e72..a21511c14071 100644 --- a/arch/arm/boot/dts/exynos4210-trats.dts +++ b/arch/arm/boot/dts/exynos4210-trats.dts @@ -20,8 +20,10 @@ compatible = "samsung,trats", "samsung,exynos4210"; memory { - reg = <0x40000000 0x20000000 - 0x60000000 0x20000000>; + reg = <0x40000000 0x10000000 + 0x50000000 0x10000000 + 0x60000000 0x10000000 + 0x70000000 0x10000000>; }; chosen { diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts index a352df403b7a..7212d538086d 100644 --- a/arch/arm/boot/dts/exynos5250-smdk5250.dts +++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts @@ -56,7 +56,15 @@ }; i2c@12C80000 { - status = "disabled"; + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <66000>; + gpios = <&gpa0 6 3 3 0>, + <&gpa0 7 3 3 0>; + + hdmiddc@50 { + compatible = "samsung,exynos5-hdmiddc"; + reg = <0x50>; + }; }; i2c@12C90000 { @@ -79,6 +87,16 @@ status = "disabled"; }; + i2c@12CE0000 { + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <66000>; + + hdmiphy@38 { + compatible = "samsung,exynos5-hdmiphy"; + reg = <0x38>; + }; + }; + dwmmc_0: dwmmc0@12200000 { num-slots = <1>; supports-highspeed; @@ -166,4 +184,8 @@ spi_2: spi@12d40000 { status = "disabled"; }; + + hdmi { + hpd-gpio = <&gpx3 7 0xf 1 3>; + }; }; diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index dddfd6e444dc..04d93ecd1484 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -31,6 +31,15 @@ gsc1 = &gsc_1; gsc2 = &gsc_2; gsc3 = &gsc_3; + i2c0 = &i2c_0; + i2c1 = &i2c_1; + i2c2 = &i2c_2; + i2c3 = &i2c_3; + i2c4 = &i2c_4; + i2c5 = &i2c_5; + i2c6 = &i2c_6; + i2c7 = &i2c_7; + i2c8 = &i2c_8; }; gic:interrupt-controller@10481000 { @@ -92,7 +101,7 @@ interrupts = <0 54 0>; }; - i2c@12C60000 { + i2c_0: i2c@12C60000 { compatible = "samsung,s3c2440-i2c"; reg = <0x12C60000 0x100>; interrupts = <0 56 0>; @@ -100,7 +109,7 @@ #size-cells = <0>; }; - i2c@12C70000 { + i2c_1: i2c@12C70000 { compatible = "samsung,s3c2440-i2c"; reg = <0x12C70000 0x100>; interrupts = <0 57 0>; @@ -108,7 +117,7 @@ #size-cells = <0>; }; - i2c@12C80000 { + i2c_2: i2c@12C80000 { compatible = "samsung,s3c2440-i2c"; reg = <0x12C80000 0x100>; interrupts = <0 58 0>; @@ -116,7 +125,7 @@ #size-cells = <0>; }; - i2c@12C90000 { + i2c_3: i2c@12C90000 { compatible = "samsung,s3c2440-i2c"; reg = <0x12C90000 0x100>; interrupts = <0 59 0>; @@ -124,7 +133,7 @@ #size-cells = <0>; }; - i2c@12CA0000 { + i2c_4: i2c@12CA0000 { compatible = "samsung,s3c2440-i2c"; reg = <0x12CA0000 0x100>; interrupts = <0 60 0>; @@ -132,7 +141,7 @@ #size-cells = <0>; }; - i2c@12CB0000 { + i2c_5: i2c@12CB0000 { compatible = "samsung,s3c2440-i2c"; reg = <0x12CB0000 0x100>; interrupts = <0 61 0>; @@ -140,7 +149,7 @@ #size-cells = <0>; }; - i2c@12CC0000 { + i2c_6: i2c@12CC0000 { compatible = "samsung,s3c2440-i2c"; reg = <0x12CC0000 0x100>; interrupts = <0 62 0>; @@ -148,7 +157,7 @@ #size-cells = <0>; }; - i2c@12CD0000 { + i2c_7: i2c@12CD0000 { compatible = "samsung,s3c2440-i2c"; reg = <0x12CD0000 0x100>; interrupts = <0 63 0>; @@ -156,6 +165,14 @@ #size-cells = <0>; }; + i2c_8: i2c@12CE0000 { + compatible = "samsung,s3c2440-hdmiphy-i2c"; + reg = <0x12CE0000 0x1000>; + interrupts = <0 64 0>; + #address-cells = <1>; + #size-cells = <0>; + }; + spi_0: spi@12d20000 { compatible = "samsung,exynos4210-spi"; reg = <0x12d20000 0x100>; @@ -520,4 +537,16 @@ reg = <0x13e30000 0x1000>; interrupts = <0 88 0>; }; + + hdmi { + compatible = "samsung,exynos5-hdmi"; + reg = <0x14530000 0x100000>; + interrupts = <0 95 0>; + }; + + mixer { + compatible = "samsung,exynos5-mixer"; + reg = <0x14450000 0x10000>; + interrupts = <0 94 0>; + }; }; diff --git a/arch/arm/boot/dts/highbank.dts b/arch/arm/boot/dts/highbank.dts index 0c6fc34821f9..a9ae5d32e80d 100644 --- a/arch/arm/boot/dts/highbank.dts +++ b/arch/arm/boot/dts/highbank.dts @@ -69,16 +69,8 @@ reg = <0x00000000 0xff900000>; }; - chosen { - bootargs = "console=ttyAMA0"; - }; - soc { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - interrupt-parent = <&intc>; - ranges; + ranges = <0x00000000 0x00000000 0xffffffff>; timer@fff10600 { compatible = "arm,cortex-a9-twd-timer"; @@ -117,173 +109,6 @@ interrupts = <0 76 4 0 75 4 0 74 4 0 73 4>; }; - sata@ffe08000 { - compatible = "calxeda,hb-ahci"; - reg = <0xffe08000 0x10000>; - interrupts = <0 83 4>; - calxeda,port-phys = <&combophy5 0 &combophy0 0 - &combophy0 1 &combophy0 2 - &combophy0 3>; - dma-coherent; - }; - - sdhci@ffe0e000 { - compatible = "calxeda,hb-sdhci"; - reg = <0xffe0e000 0x1000>; - interrupts = <0 90 4>; - clocks = <&eclk>; - }; - - memory-controller@fff00000 { - compatible = "calxeda,hb-ddr-ctrl"; - reg = <0xfff00000 0x1000>; - interrupts = <0 91 4>; - }; - - ipc@fff20000 { - compatible = "arm,pl320", "arm,primecell"; - reg = <0xfff20000 0x1000>; - interrupts = <0 7 4>; - clocks = <&pclk>; - clock-names = "apb_pclk"; - }; - - gpioe: gpio@fff30000 { - #gpio-cells = <2>; - compatible = "arm,pl061", "arm,primecell"; - gpio-controller; - reg = <0xfff30000 0x1000>; - interrupts = <0 14 4>; - clocks = <&pclk>; - clock-names = "apb_pclk"; - }; - - gpiof: gpio@fff31000 { - #gpio-cells = <2>; - compatible = "arm,pl061", "arm,primecell"; - gpio-controller; - reg = <0xfff31000 0x1000>; - interrupts = <0 15 4>; - clocks = <&pclk>; - clock-names = "apb_pclk"; - }; - - gpiog: gpio@fff32000 { - #gpio-cells = <2>; - compatible = "arm,pl061", "arm,primecell"; - gpio-controller; - reg = <0xfff32000 0x1000>; - interrupts = <0 16 4>; - clocks = <&pclk>; - clock-names = "apb_pclk"; - }; - - gpioh: gpio@fff33000 { - #gpio-cells = <2>; - compatible = "arm,pl061", "arm,primecell"; - gpio-controller; - reg = <0xfff33000 0x1000>; - interrupts = <0 17 4>; - clocks = <&pclk>; - clock-names = "apb_pclk"; - }; - - timer { - compatible = "arm,sp804", "arm,primecell"; - reg = <0xfff34000 0x1000>; - interrupts = <0 18 4>; - clocks = <&pclk>; - clock-names = "apb_pclk"; - }; - - rtc@fff35000 { - compatible = "arm,pl031", "arm,primecell"; - reg = <0xfff35000 0x1000>; - interrupts = <0 19 4>; - clocks = <&pclk>; - clock-names = "apb_pclk"; - }; - - serial@fff36000 { - compatible = "arm,pl011", "arm,primecell"; - reg = <0xfff36000 0x1000>; - interrupts = <0 20 4>; - clocks = <&pclk>; - clock-names = "apb_pclk"; - }; - - smic@fff3a000 { - compatible = "ipmi-smic"; - device_type = "ipmi"; - reg = <0xfff3a000 0x1000>; - interrupts = <0 24 4>; - reg-size = <4>; - reg-spacing = <4>; - }; - - sregs@fff3c000 { - compatible = "calxeda,hb-sregs"; - reg = <0xfff3c000 0x1000>; - - clocks { - #address-cells = <1>; - #size-cells = <0>; - - osc: oscillator { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <33333000>; - }; - - ddrpll: ddrpll { - #clock-cells = <0>; - compatible = "calxeda,hb-pll-clock"; - clocks = <&osc>; - reg = <0x108>; - }; - - a9pll: a9pll { - #clock-cells = <0>; - compatible = "calxeda,hb-pll-clock"; - clocks = <&osc>; - reg = <0x100>; - }; - - a9periphclk: a9periphclk { - #clock-cells = <0>; - compatible = "calxeda,hb-a9periph-clock"; - clocks = <&a9pll>; - reg = <0x104>; - }; - - a9bclk: a9bclk { - #clock-cells = <0>; - compatible = "calxeda,hb-a9bus-clock"; - clocks = <&a9pll>; - reg = <0x104>; - }; - - emmcpll: emmcpll { - #clock-cells = <0>; - compatible = "calxeda,hb-pll-clock"; - clocks = <&osc>; - reg = <0x10C>; - }; - - eclk: eclk { - #clock-cells = <0>; - compatible = "calxeda,hb-emmc-clock"; - clocks = <&emmcpll>; - reg = <0x114>; - }; - - pclk: pclk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <150000000>; - }; - }; - }; sregs@fff3c200 { compatible = "calxeda,hb-sregs-l2-ecc"; @@ -291,38 +116,7 @@ interrupts = <0 71 4 0 72 4>; }; - dma@fff3d000 { - compatible = "arm,pl330", "arm,primecell"; - reg = <0xfff3d000 0x1000>; - interrupts = <0 92 4>; - clocks = <&pclk>; - clock-names = "apb_pclk"; - }; - - ethernet@fff50000 { - compatible = "calxeda,hb-xgmac"; - reg = <0xfff50000 0x1000>; - interrupts = <0 77 4 0 78 4 0 79 4>; - }; - - ethernet@fff51000 { - compatible = "calxeda,hb-xgmac"; - reg = <0xfff51000 0x1000>; - interrupts = <0 80 4 0 81 4 0 82 4>; - }; - - combophy0: combo-phy@fff58000 { - compatible = "calxeda,hb-combophy"; - #phy-cells = <1>; - reg = <0xfff58000 0x1000>; - phydev = <5>; - }; - - combophy5: combo-phy@fff5d000 { - compatible = "calxeda,hb-combophy"; - #phy-cells = <1>; - reg = <0xfff5d000 0x1000>; - phydev = <31>; - }; }; }; + +/include/ "ecx-common.dtsi" diff --git a/arch/arm/boot/dts/imx23.dtsi b/arch/arm/boot/dts/imx23.dtsi index 9ca4ca70c1bc..6d31aa383460 100644 --- a/arch/arm/boot/dts/imx23.dtsi +++ b/arch/arm/boot/dts/imx23.dtsi @@ -69,6 +69,7 @@ interrupts = <13>, <56>; interrupt-names = "gpmi-dma", "bch"; clocks = <&clks 34>; + clock-names = "gpmi_io"; fsl,gpmi-dma-channel = <4>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi index e16d63155480..55c57ea6169e 100644 --- a/arch/arm/boot/dts/imx28.dtsi +++ b/arch/arm/boot/dts/imx28.dtsi @@ -85,6 +85,7 @@ interrupts = <88>, <41>; interrupt-names = "gpmi-dma", "bch"; clocks = <&clks 50>; + clock-names = "gpmi_io"; fsl,gpmi-dma-channel = <4>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi index f38ea8771b44..696e929d0304 100644 --- a/arch/arm/boot/dts/omap3.dtsi +++ b/arch/arm/boot/dts/omap3.dtsi @@ -257,7 +257,7 @@ interrupt-names = "common", "tx", "rx", "sidetone"; interrupt-parent = <&intc>; ti,buffer-size = <1280>; - ti,hwmods = "mcbsp2"; + ti,hwmods = "mcbsp2", "mcbsp2_sidetone"; }; mcbsp3: mcbsp@49024000 { @@ -272,7 +272,7 @@ interrupt-names = "common", "tx", "rx", "sidetone"; interrupt-parent = <&intc>; ti,buffer-size = <128>; - ti,hwmods = "mcbsp3"; + ti,hwmods = "mcbsp3", "mcbsp3_sidetone"; }; mcbsp4: mcbsp@49026000 { diff --git a/arch/arm/boot/dts/sh7377.dtsi b/arch/arm/boot/dts/sh7372-mackerel.dts index 767ee0796daa..286f0caef013 100644 --- a/arch/arm/boot/dts/sh7377.dtsi +++ b/arch/arm/boot/dts/sh7372-mackerel.dts @@ -1,5 +1,5 @@ /* - * Device Tree Source for the sh7377 SoC + * Device Tree Source for the mackerel board * * Copyright (C) 2012 Renesas Solutions Corp. * @@ -8,14 +8,15 @@ * kind, whether express or implied. */ +/dts-v1/; /include/ "skeleton.dtsi" / { - compatible = "renesas,sh7377"; + model = "Mackerel (AP4 EVM 2nd)"; + compatible = "renesas,mackerel"; - cpus { - cpu@0 { - compatible = "arm,cortex-a8"; - }; + memory { + device_type = "memory"; + reg = <0x40000000 0x10000000>; }; }; diff --git a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi index d8a827bd2bf3..ac870fb3fa0d 100644 --- a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi +++ b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi @@ -17,17 +17,16 @@ * CHANGES TO vexpress-v2m.dtsi! */ -/ { - aliases { - arm,v2m_timer = &v2m_timer01; - }; - motherboard { - compatible = "simple-bus"; + model = "V2M-P1"; + arm,hbi = <0x190>; + arm,vexpress,site = <0>; arm,v2m-memory-map = "rs1"; + compatible = "arm,vexpress,v2m-p1", "simple-bus"; #address-cells = <2>; /* SMB chipselect number and offset */ #size-cells = <1>; #interrupt-cells = <1>; + ranges; flash@0,00000000 { compatible = "arm,vexpress-flash", "cfi-flash"; @@ -72,14 +71,20 @@ #size-cells = <1>; ranges = <0 3 0 0x200000>; - sysreg@010000 { + v2m_sysreg: sysreg@010000 { compatible = "arm,vexpress-sysreg"; reg = <0x010000 0x1000>; + gpio-controller; + #gpio-cells = <2>; }; - sysctl@020000 { + v2m_sysctl: sysctl@020000 { compatible = "arm,sp810", "arm,primecell"; reg = <0x020000 0x1000>; + clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&smbclk>; + clock-names = "refclk", "timclk", "apb_pclk"; + #clock-cells = <1>; + clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3"; }; /* PCI-E I2C bus */ @@ -100,66 +105,92 @@ compatible = "arm,pl041", "arm,primecell"; reg = <0x040000 0x1000>; interrupts = <11>; + clocks = <&smbclk>; + clock-names = "apb_pclk"; }; mmci@050000 { compatible = "arm,pl180", "arm,primecell"; reg = <0x050000 0x1000>; interrupts = <9 10>; + cd-gpios = <&v2m_sysreg 0 0>; + wp-gpios = <&v2m_sysreg 1 0>; + max-frequency = <12000000>; + vmmc-supply = <&v2m_fixed_3v3>; + clocks = <&v2m_clk24mhz>, <&smbclk>; + clock-names = "mclk", "apb_pclk"; }; kmi@060000 { compatible = "arm,pl050", "arm,primecell"; reg = <0x060000 0x1000>; interrupts = <12>; + clocks = <&v2m_clk24mhz>, <&smbclk>; + clock-names = "KMIREFCLK", "apb_pclk"; }; kmi@070000 { compatible = "arm,pl050", "arm,primecell"; reg = <0x070000 0x1000>; interrupts = <13>; + clocks = <&v2m_clk24mhz>, <&smbclk>; + clock-names = "KMIREFCLK", "apb_pclk"; }; v2m_serial0: uart@090000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x090000 0x1000>; interrupts = <5>; + clocks = <&v2m_oscclk2>, <&smbclk>; + clock-names = "uartclk", "apb_pclk"; }; v2m_serial1: uart@0a0000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0a0000 0x1000>; interrupts = <6>; + clocks = <&v2m_oscclk2>, <&smbclk>; + clock-names = "uartclk", "apb_pclk"; }; v2m_serial2: uart@0b0000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0b0000 0x1000>; interrupts = <7>; + clocks = <&v2m_oscclk2>, <&smbclk>; + clock-names = "uartclk", "apb_pclk"; }; v2m_serial3: uart@0c0000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0c0000 0x1000>; interrupts = <8>; + clocks = <&v2m_oscclk2>, <&smbclk>; + clock-names = "uartclk", "apb_pclk"; }; wdt@0f0000 { compatible = "arm,sp805", "arm,primecell"; reg = <0x0f0000 0x1000>; interrupts = <0>; + clocks = <&v2m_refclk32khz>, <&smbclk>; + clock-names = "wdogclk", "apb_pclk"; }; v2m_timer01: timer@110000 { compatible = "arm,sp804", "arm,primecell"; reg = <0x110000 0x1000>; interrupts = <2>; + clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&smbclk>; + clock-names = "timclken1", "timclken2", "apb_pclk"; }; v2m_timer23: timer@120000 { compatible = "arm,sp804", "arm,primecell"; reg = <0x120000 0x1000>; interrupts = <3>; + clocks = <&v2m_sysctl 2>, <&v2m_sysctl 3>, <&smbclk>; + clock-names = "timclken1", "timclken2", "apb_pclk"; }; /* DVI I2C bus */ @@ -185,6 +216,8 @@ compatible = "arm,pl031", "arm,primecell"; reg = <0x170000 0x1000>; interrupts = <4>; + clocks = <&smbclk>; + clock-names = "apb_pclk"; }; compact-flash@1a0000 { @@ -198,6 +231,8 @@ compatible = "arm,pl111", "arm,primecell"; reg = <0x1f0000 0x1000>; interrupts = <14>; + clocks = <&v2m_oscclk1>, <&smbclk>; + clock-names = "clcdclk", "apb_pclk"; }; }; @@ -208,5 +243,98 @@ regulator-max-microvolt = <3300000>; regulator-always-on; }; + + v2m_clk24mhz: clk24mhz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24000000>; + clock-output-names = "v2m:clk24mhz"; + }; + + v2m_refclk1mhz: refclk1mhz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <1000000>; + clock-output-names = "v2m:refclk1mhz"; + }; + + v2m_refclk32khz: refclk32khz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + clock-output-names = "v2m:refclk32khz"; + }; + + mcc { + compatible = "arm,vexpress,config-bus"; + arm,vexpress,config-bridge = <&v2m_sysreg>; + + osc@0 { + /* MCC static memory clock */ + compatible = "arm,vexpress-osc"; + arm,vexpress-sysreg,func = <1 0>; + freq-range = <25000000 60000000>; + #clock-cells = <0>; + clock-output-names = "v2m:oscclk0"; + }; + + v2m_oscclk1: osc@1 { + /* CLCD clock */ + compatible = "arm,vexpress-osc"; + arm,vexpress-sysreg,func = <1 1>; + freq-range = <23750000 63500000>; + #clock-cells = <0>; + clock-output-names = "v2m:oscclk1"; + }; + + v2m_oscclk2: osc@2 { + /* IO FPGA peripheral clock */ + compatible = "arm,vexpress-osc"; + arm,vexpress-sysreg,func = <1 2>; + freq-range = <24000000 24000000>; + #clock-cells = <0>; + clock-output-names = "v2m:oscclk2"; + }; + + volt@0 { + /* Logic level voltage */ + compatible = "arm,vexpress-volt"; + arm,vexpress-sysreg,func = <2 0>; + regulator-name = "VIO"; + regulator-always-on; + label = "VIO"; + }; + + temp@0 { + /* MCC internal operating temperature */ + compatible = "arm,vexpress-temp"; + arm,vexpress-sysreg,func = <4 0>; + label = "MCC"; + }; + + reset@0 { + compatible = "arm,vexpress-reset"; + arm,vexpress-sysreg,func = <5 0>; + }; + + muxfpga@0 { + compatible = "arm,vexpress-muxfpga"; + arm,vexpress-sysreg,func = <7 0>; + }; + + shutdown@0 { + compatible = "arm,vexpress-shutdown"; + arm,vexpress-sysreg,func = <8 0>; + }; + + reboot@0 { + compatible = "arm,vexpress-reboot"; + arm,vexpress-sysreg,func = <9 0>; + }; + + dvimode@0 { + compatible = "arm,vexpress-dvimode"; + arm,vexpress-sysreg,func = <11 0>; + }; + }; }; -}; diff --git a/arch/arm/boot/dts/vexpress-v2m.dtsi b/arch/arm/boot/dts/vexpress-v2m.dtsi index dba53fd026bb..f1420368355b 100644 --- a/arch/arm/boot/dts/vexpress-v2m.dtsi +++ b/arch/arm/boot/dts/vexpress-v2m.dtsi @@ -17,16 +17,15 @@ * CHANGES TO vexpress-v2m-rs1.dtsi! */ -/ { - aliases { - arm,v2m_timer = &v2m_timer01; - }; - motherboard { - compatible = "simple-bus"; + model = "V2M-P1"; + arm,hbi = <0x190>; + arm,vexpress,site = <0>; + compatible = "arm,vexpress,v2m-p1", "simple-bus"; #address-cells = <2>; /* SMB chipselect number and offset */ #size-cells = <1>; #interrupt-cells = <1>; + ranges; flash@0,00000000 { compatible = "arm,vexpress-flash", "cfi-flash"; @@ -71,14 +70,20 @@ #size-cells = <1>; ranges = <0 7 0 0x20000>; - sysreg@00000 { + v2m_sysreg: sysreg@00000 { compatible = "arm,vexpress-sysreg"; reg = <0x00000 0x1000>; + gpio-controller; + #gpio-cells = <2>; }; - sysctl@01000 { + v2m_sysctl: sysctl@01000 { compatible = "arm,sp810", "arm,primecell"; reg = <0x01000 0x1000>; + clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&smbclk>; + clock-names = "refclk", "timclk", "apb_pclk"; + #clock-cells = <1>; + clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3"; }; /* PCI-E I2C bus */ @@ -99,66 +104,92 @@ compatible = "arm,pl041", "arm,primecell"; reg = <0x04000 0x1000>; interrupts = <11>; + clocks = <&smbclk>; + clock-names = "apb_pclk"; }; mmci@05000 { compatible = "arm,pl180", "arm,primecell"; reg = <0x05000 0x1000>; interrupts = <9 10>; + cd-gpios = <&v2m_sysreg 0 0>; + wp-gpios = <&v2m_sysreg 1 0>; + max-frequency = <12000000>; + vmmc-supply = <&v2m_fixed_3v3>; + clocks = <&v2m_clk24mhz>, <&smbclk>; + clock-names = "mclk", "apb_pclk"; }; kmi@06000 { compatible = "arm,pl050", "arm,primecell"; reg = <0x06000 0x1000>; interrupts = <12>; + clocks = <&v2m_clk24mhz>, <&smbclk>; + clock-names = "KMIREFCLK", "apb_pclk"; }; kmi@07000 { compatible = "arm,pl050", "arm,primecell"; reg = <0x07000 0x1000>; interrupts = <13>; + clocks = <&v2m_clk24mhz>, <&smbclk>; + clock-names = "KMIREFCLK", "apb_pclk"; }; v2m_serial0: uart@09000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x09000 0x1000>; interrupts = <5>; + clocks = <&v2m_oscclk2>, <&smbclk>; + clock-names = "uartclk", "apb_pclk"; }; v2m_serial1: uart@0a000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0a000 0x1000>; interrupts = <6>; + clocks = <&v2m_oscclk2>, <&smbclk>; + clock-names = "uartclk", "apb_pclk"; }; v2m_serial2: uart@0b000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0b000 0x1000>; interrupts = <7>; + clocks = <&v2m_oscclk2>, <&smbclk>; + clock-names = "uartclk", "apb_pclk"; }; v2m_serial3: uart@0c000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0c000 0x1000>; interrupts = <8>; + clocks = <&v2m_oscclk2>, <&smbclk>; + clock-names = "uartclk", "apb_pclk"; }; wdt@0f000 { compatible = "arm,sp805", "arm,primecell"; reg = <0x0f000 0x1000>; interrupts = <0>; + clocks = <&v2m_refclk32khz>, <&smbclk>; + clock-names = "wdogclk", "apb_pclk"; }; v2m_timer01: timer@11000 { compatible = "arm,sp804", "arm,primecell"; reg = <0x11000 0x1000>; interrupts = <2>; + clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&smbclk>; + clock-names = "timclken1", "timclken2", "apb_pclk"; }; v2m_timer23: timer@12000 { compatible = "arm,sp804", "arm,primecell"; reg = <0x12000 0x1000>; interrupts = <3>; + clocks = <&v2m_sysctl 2>, <&v2m_sysctl 3>, <&smbclk>; + clock-names = "timclken1", "timclken2", "apb_pclk"; }; /* DVI I2C bus */ @@ -184,6 +215,8 @@ compatible = "arm,pl031", "arm,primecell"; reg = <0x17000 0x1000>; interrupts = <4>; + clocks = <&smbclk>; + clock-names = "apb_pclk"; }; compact-flash@1a000 { @@ -197,6 +230,8 @@ compatible = "arm,pl111", "arm,primecell"; reg = <0x1f000 0x1000>; interrupts = <14>; + clocks = <&v2m_oscclk1>, <&smbclk>; + clock-names = "clcdclk", "apb_pclk"; }; }; @@ -207,5 +242,98 @@ regulator-max-microvolt = <3300000>; regulator-always-on; }; + + v2m_clk24mhz: clk24mhz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24000000>; + clock-output-names = "v2m:clk24mhz"; + }; + + v2m_refclk1mhz: refclk1mhz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <1000000>; + clock-output-names = "v2m:refclk1mhz"; + }; + + v2m_refclk32khz: refclk32khz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + clock-output-names = "v2m:refclk32khz"; + }; + + mcc { + compatible = "arm,vexpress,config-bus"; + arm,vexpress,config-bridge = <&v2m_sysreg>; + + osc@0 { + /* MCC static memory clock */ + compatible = "arm,vexpress-osc"; + arm,vexpress-sysreg,func = <1 0>; + freq-range = <25000000 60000000>; + #clock-cells = <0>; + clock-output-names = "v2m:oscclk0"; + }; + + v2m_oscclk1: osc@1 { + /* CLCD clock */ + compatible = "arm,vexpress-osc"; + arm,vexpress-sysreg,func = <1 1>; + freq-range = <23750000 63500000>; + #clock-cells = <0>; + clock-output-names = "v2m:oscclk1"; + }; + + v2m_oscclk2: osc@2 { + /* IO FPGA peripheral clock */ + compatible = "arm,vexpress-osc"; + arm,vexpress-sysreg,func = <1 2>; + freq-range = <24000000 24000000>; + #clock-cells = <0>; + clock-output-names = "v2m:oscclk2"; + }; + + volt@0 { + /* Logic level voltage */ + compatible = "arm,vexpress-volt"; + arm,vexpress-sysreg,func = <2 0>; + regulator-name = "VIO"; + regulator-always-on; + label = "VIO"; + }; + + temp@0 { + /* MCC internal operating temperature */ + compatible = "arm,vexpress-temp"; + arm,vexpress-sysreg,func = <4 0>; + label = "MCC"; + }; + + reset@0 { + compatible = "arm,vexpress-reset"; + arm,vexpress-sysreg,func = <5 0>; + }; + + muxfpga@0 { + compatible = "arm,vexpress-muxfpga"; + arm,vexpress-sysreg,func = <7 0>; + }; + + shutdown@0 { + compatible = "arm,vexpress-shutdown"; + arm,vexpress-sysreg,func = <8 0>; + }; + + reboot@0 { + compatible = "arm,vexpress-reboot"; + arm,vexpress-sysreg,func = <9 0>; + }; + + dvimode@0 { + compatible = "arm,vexpress-dvimode"; + arm,vexpress-sysreg,func = <11 0>; + }; + }; }; -}; diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts b/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts index d12b34ca0568..a3d37ec2655d 100644 --- a/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts +++ b/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts @@ -12,6 +12,7 @@ / { model = "V2P-CA15"; arm,hbi = <0x237>; + arm,vexpress,site = <0xf>; compatible = "arm,vexpress,v2p-ca15,tc1", "arm,vexpress,v2p-ca15", "arm,vexpress"; interrupt-parent = <&gic>; #address-cells = <2>; @@ -54,17 +55,24 @@ compatible = "arm,hdlcd"; reg = <0 0x2b000000 0 0x1000>; interrupts = <0 85 4>; + clocks = <&oscclk5>; + clock-names = "pxlclk"; }; memory-controller@2b0a0000 { compatible = "arm,pl341", "arm,primecell"; reg = <0 0x2b0a0000 0 0x1000>; + clocks = <&oscclk7>; + clock-names = "apb_pclk"; }; wdt@2b060000 { compatible = "arm,sp805", "arm,primecell"; + status = "disabled"; reg = <0 0x2b060000 0 0x1000>; interrupts = <98>; + clocks = <&oscclk7>; + clock-names = "apb_pclk"; }; gic: interrupt-controller@2c001000 { @@ -84,6 +92,8 @@ reg = <0 0x7ffd0000 0 0x1000>; interrupts = <0 86 4>, <0 87 4>; + clocks = <&oscclk7>; + clock-names = "apb_pclk"; }; dma@7ffb0000 { @@ -94,6 +104,8 @@ <0 89 4>, <0 90 4>, <0 91 4>; + clocks = <&oscclk7>; + clock-names = "apb_pclk"; }; timer { @@ -110,7 +122,109 @@ <0 69 4>; }; - motherboard { + dcc { + compatible = "arm,vexpress,config-bus"; + arm,vexpress,config-bridge = <&v2m_sysreg>; + + osc@0 { + /* CPU PLL reference clock */ + compatible = "arm,vexpress-osc"; + arm,vexpress-sysreg,func = <1 0>; + freq-range = <50000000 60000000>; + #clock-cells = <0>; + clock-output-names = "oscclk0"; + }; + + osc@4 { + /* Multiplexed AXI master clock */ + compatible = "arm,vexpress-osc"; + arm,vexpress-sysreg,func = <1 4>; + freq-range = <20000000 40000000>; + #clock-cells = <0>; + clock-output-names = "oscclk4"; + }; + + oscclk5: osc@5 { + /* HDLCD PLL reference clock */ + compatible = "arm,vexpress-osc"; + arm,vexpress-sysreg,func = <1 5>; + freq-range = <23750000 165000000>; + #clock-cells = <0>; + clock-output-names = "oscclk5"; + }; + + smbclk: osc@6 { + /* SMB clock */ + compatible = "arm,vexpress-osc"; + arm,vexpress-sysreg,func = <1 6>; + freq-range = <20000000 50000000>; + #clock-cells = <0>; + clock-output-names = "oscclk6"; + }; + + oscclk7: osc@7 { + /* SYS PLL reference clock */ + compatible = "arm,vexpress-osc"; + arm,vexpress-sysreg,func = <1 7>; + freq-range = <20000000 60000000>; + #clock-cells = <0>; + clock-output-names = "oscclk7"; + }; + + osc@8 { + /* DDR2 PLL reference clock */ + compatible = "arm,vexpress-osc"; + arm,vexpress-sysreg,func = <1 8>; + freq-range = <40000000 40000000>; + #clock-cells = <0>; + clock-output-names = "oscclk8"; + }; + + volt@0 { + /* CPU core voltage */ + compatible = "arm,vexpress-volt"; + arm,vexpress-sysreg,func = <2 0>; + regulator-name = "Cores"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1050000>; + regulator-always-on; + label = "Cores"; + }; + + amp@0 { + /* Total current for the two cores */ + compatible = "arm,vexpress-amp"; + arm,vexpress-sysreg,func = <3 0>; + label = "Cores"; + }; + + temp@0 { + /* DCC internal temperature */ + compatible = "arm,vexpress-temp"; + arm,vexpress-sysreg,func = <4 0>; + label = "DCC"; + }; + + power@0 { + /* Total power */ + compatible = "arm,vexpress-power"; + arm,vexpress-sysreg,func = <12 0>; + label = "Cores"; + }; + + energy@0 { + /* Total energy */ + compatible = "arm,vexpress-energy"; + arm,vexpress-sysreg,func = <13 0>; + label = "Cores"; + }; + }; + + smb { + compatible = "simple-bus"; + + #address-cells = <2>; + #size-cells = <1>; ranges = <0 0 0 0x08000000 0x04000000>, <1 0 0 0x14000000 0x04000000>, <2 0 0 0x18000000 0x04000000>, @@ -118,6 +232,7 @@ <4 0 0 0x0c000000 0x04000000>, <5 0 0 0x10000000 0x04000000>; + #interrupt-cells = <1>; interrupt-map-mask = <0 0 63>; interrupt-map = <0 0 0 &gic 0 0 4>, <0 0 1 &gic 0 1 4>, @@ -162,7 +277,7 @@ <0 0 40 &gic 0 40 4>, <0 0 41 &gic 0 41 4>, <0 0 42 &gic 0 42 4>; + + /include/ "vexpress-v2m-rs1.dtsi" }; }; - -/include/ "vexpress-v2m-rs1.dtsi" diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts index 4890a81c5467..1fc405a9ecfb 100644 --- a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts +++ b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts @@ -12,6 +12,7 @@ / { model = "V2P-CA15_CA7"; arm,hbi = <0x249>; + arm,vexpress,site = <0xf>; compatible = "arm,vexpress,v2p-ca15_a7", "arm,vexpress"; interrupt-parent = <&gic>; #address-cells = <2>; @@ -74,17 +75,23 @@ compatible = "arm,sp805", "arm,primecell"; reg = <0 0x2a490000 0 0x1000>; interrupts = <98>; + clocks = <&oscclk6a>, <&oscclk6a>; + clock-names = "wdogclk", "apb_pclk"; }; hdlcd@2b000000 { compatible = "arm,hdlcd"; reg = <0 0x2b000000 0 0x1000>; interrupts = <0 85 4>; + clocks = <&oscclk5>; + clock-names = "pxlclk"; }; memory-controller@2b0a0000 { compatible = "arm,pl341", "arm,primecell"; reg = <0 0x2b0a0000 0 0x1000>; + clocks = <&oscclk6a>; + clock-names = "apb_pclk"; }; gic: interrupt-controller@2c001000 { @@ -104,6 +111,8 @@ reg = <0 0x7ffd0000 0 0x1000>; interrupts = <0 86 4>, <0 87 4>; + clocks = <&oscclk6a>; + clock-names = "apb_pclk"; }; dma@7ff00000 { @@ -114,6 +123,8 @@ <0 89 4>, <0 90 4>, <0 91 4>; + clocks = <&oscclk6a>; + clock-names = "apb_pclk"; }; timer { @@ -130,7 +141,175 @@ <0 69 4>; }; - motherboard { + oscclk6a: oscclk6a { + /* Reference 24MHz clock */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24000000>; + clock-output-names = "oscclk6a"; + }; + + dcc { + compatible = "arm,vexpress,config-bus"; + arm,vexpress,config-bridge = <&v2m_sysreg>; + + osc@0 { + /* A15 PLL 0 reference clock */ + compatible = "arm,vexpress-osc"; + arm,vexpress-sysreg,func = <1 0>; + freq-range = <17000000 50000000>; + #clock-cells = <0>; + clock-output-names = "oscclk0"; + }; + + osc@1 { + /* A15 PLL 1 reference clock */ + compatible = "arm,vexpress-osc"; + arm,vexpress-sysreg,func = <1 1>; + freq-range = <17000000 50000000>; + #clock-cells = <0>; + clock-output-names = "oscclk1"; + }; + + osc@2 { + /* A7 PLL 0 reference clock */ + compatible = "arm,vexpress-osc"; + arm,vexpress-sysreg,func = <1 2>; + freq-range = <17000000 50000000>; + #clock-cells = <0>; + clock-output-names = "oscclk2"; + }; + + osc@3 { + /* A7 PLL 1 reference clock */ + compatible = "arm,vexpress-osc"; + arm,vexpress-sysreg,func = <1 3>; + freq-range = <17000000 50000000>; + #clock-cells = <0>; + clock-output-names = "oscclk3"; + }; + + osc@4 { + /* External AXI master clock */ + compatible = "arm,vexpress-osc"; + arm,vexpress-sysreg,func = <1 4>; + freq-range = <20000000 40000000>; + #clock-cells = <0>; + clock-output-names = "oscclk4"; + }; + + oscclk5: osc@5 { + /* HDLCD PLL reference clock */ + compatible = "arm,vexpress-osc"; + arm,vexpress-sysreg,func = <1 5>; + freq-range = <23750000 165000000>; + #clock-cells = <0>; + clock-output-names = "oscclk5"; + }; + + smbclk: osc@6 { + /* Static memory controller clock */ + compatible = "arm,vexpress-osc"; + arm,vexpress-sysreg,func = <1 6>; + freq-range = <20000000 40000000>; + #clock-cells = <0>; + clock-output-names = "oscclk6"; + }; + + osc@7 { + /* SYS PLL reference clock */ + compatible = "arm,vexpress-osc"; + arm,vexpress-sysreg,func = <1 7>; + freq-range = <17000000 50000000>; + #clock-cells = <0>; + clock-output-names = "oscclk7"; + }; + + osc@8 { + /* DDR2 PLL reference clock */ + compatible = "arm,vexpress-osc"; + arm,vexpress-sysreg,func = <1 8>; + freq-range = <20000000 50000000>; + #clock-cells = <0>; + clock-output-names = "oscclk8"; + }; + + volt@0 { + /* A15 CPU core voltage */ + compatible = "arm,vexpress-volt"; + arm,vexpress-sysreg,func = <2 0>; + regulator-name = "A15 Vcore"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1050000>; + regulator-always-on; + label = "A15 Vcore"; + }; + + volt@1 { + /* A7 CPU core voltage */ + compatible = "arm,vexpress-volt"; + arm,vexpress-sysreg,func = <2 1>; + regulator-name = "A7 Vcore"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1050000>; + regulator-always-on; + label = "A7 Vcore"; + }; + + amp@0 { + /* Total current for the two A15 cores */ + compatible = "arm,vexpress-amp"; + arm,vexpress-sysreg,func = <3 0>; + label = "A15 Icore"; + }; + + amp@1 { + /* Total current for the three A7 cores */ + compatible = "arm,vexpress-amp"; + arm,vexpress-sysreg,func = <3 1>; + label = "A7 Icore"; + }; + + temp@0 { + /* DCC internal temperature */ + compatible = "arm,vexpress-temp"; + arm,vexpress-sysreg,func = <4 0>; + label = "DCC"; + }; + + power@0 { + /* Total power for the two A15 cores */ + compatible = "arm,vexpress-power"; + arm,vexpress-sysreg,func = <12 0>; + label = "A15 Pcore"; + }; + power@1 { + /* Total power for the three A7 cores */ + compatible = "arm,vexpress-power"; + arm,vexpress-sysreg,func = <12 1>; + label = "A7 Pcore"; + }; + + energy@0 { + /* Total energy for the two A15 cores */ + compatible = "arm,vexpress-energy"; + arm,vexpress-sysreg,func = <13 0>; + label = "A15 Jcore"; + }; + + energy@2 { + /* Total energy for the three A7 cores */ + compatible = "arm,vexpress-energy"; + arm,vexpress-sysreg,func = <13 2>; + label = "A7 Jcore"; + }; + }; + + smb { + compatible = "simple-bus"; + + #address-cells = <2>; + #size-cells = <1>; ranges = <0 0 0 0x08000000 0x04000000>, <1 0 0 0x14000000 0x04000000>, <2 0 0 0x18000000 0x04000000>, @@ -138,6 +317,7 @@ <4 0 0 0x0c000000 0x04000000>, <5 0 0 0x10000000 0x04000000>; + #interrupt-cells = <1>; interrupt-map-mask = <0 0 63>; interrupt-map = <0 0 0 &gic 0 0 4>, <0 0 1 &gic 0 1 4>, @@ -182,7 +362,7 @@ <0 0 40 &gic 0 40 4>, <0 0 41 &gic 0 41 4>, <0 0 42 &gic 0 42 4>; + + /include/ "vexpress-v2m-rs1.dtsi" }; }; - -/include/ "vexpress-v2m-rs1.dtsi" diff --git a/arch/arm/boot/dts/vexpress-v2p-ca5s.dts b/arch/arm/boot/dts/vexpress-v2p-ca5s.dts index 18917a0f8604..6328cbc71d30 100644 --- a/arch/arm/boot/dts/vexpress-v2p-ca5s.dts +++ b/arch/arm/boot/dts/vexpress-v2p-ca5s.dts @@ -12,6 +12,7 @@ / { model = "V2P-CA5s"; arm,hbi = <0x225>; + arm,vexpress,site = <0xf>; compatible = "arm,vexpress,v2p-ca5s", "arm,vexpress"; interrupt-parent = <&gic>; #address-cells = <1>; @@ -56,11 +57,15 @@ compatible = "arm,hdlcd"; reg = <0x2a110000 0x1000>; interrupts = <0 85 4>; + clocks = <&oscclk3>; + clock-names = "pxlclk"; }; memory-controller@2a150000 { compatible = "arm,pl341", "arm,primecell"; reg = <0x2a150000 0x1000>; + clocks = <&oscclk1>; + clock-names = "apb_pclk"; }; memory-controller@2a190000 { @@ -68,6 +73,8 @@ reg = <0x2a190000 0x1000>; interrupts = <0 86 4>, <0 87 4>; + clocks = <&oscclk1>; + clock-names = "apb_pclk"; }; scu@2c000000 { @@ -109,7 +116,77 @@ <0 69 4>; }; - motherboard { + dcc { + compatible = "arm,vexpress,config-bus"; + arm,vexpress,config-bridge = <&v2m_sysreg>; + + osc@0 { + /* CPU and internal AXI reference clock */ + compatible = "arm,vexpress-osc"; + arm,vexpress-sysreg,func = <1 0>; + freq-range = <50000000 100000000>; + #clock-cells = <0>; + clock-output-names = "oscclk0"; + }; + + oscclk1: osc@1 { + /* Multiplexed AXI master clock */ + compatible = "arm,vexpress-osc"; + arm,vexpress-sysreg,func = <1 1>; + freq-range = <5000000 50000000>; + #clock-cells = <0>; + clock-output-names = "oscclk1"; + }; + + osc@2 { + /* DDR2 */ + compatible = "arm,vexpress-osc"; + arm,vexpress-sysreg,func = <1 2>; + freq-range = <80000000 120000000>; + #clock-cells = <0>; + clock-output-names = "oscclk2"; + }; + + oscclk3: osc@3 { + /* HDLCD */ + compatible = "arm,vexpress-osc"; + arm,vexpress-sysreg,func = <1 3>; + freq-range = <23750000 165000000>; + #clock-cells = <0>; + clock-output-names = "oscclk3"; + }; + + osc@4 { + /* Test chip gate configuration */ + compatible = "arm,vexpress-osc"; + arm,vexpress-sysreg,func = <1 4>; + freq-range = <80000000 80000000>; + #clock-cells = <0>; + clock-output-names = "oscclk4"; + }; + + smbclk: osc@5 { + /* SMB clock */ + compatible = "arm,vexpress-osc"; + arm,vexpress-sysreg,func = <1 5>; + freq-range = <25000000 60000000>; + #clock-cells = <0>; + clock-output-names = "oscclk5"; + }; + + temp@0 { + /* DCC internal operating temperature */ + compatible = "arm,vexpress-temp"; + arm,vexpress-sysreg,func = <4 0>; + label = "DCC"; + }; + }; + + smb { + compatible = "simple-bus"; + + #address-cells = <2>; + #size-cells = <1>; ranges = <0 0 0x08000000 0x04000000>, <1 0 0x14000000 0x04000000>, <2 0 0x18000000 0x04000000>, @@ -117,6 +194,7 @@ <4 0 0x0c000000 0x04000000>, <5 0 0x10000000 0x04000000>; + #interrupt-cells = <1>; interrupt-map-mask = <0 0 63>; interrupt-map = <0 0 0 &gic 0 0 4>, <0 0 1 &gic 0 1 4>, @@ -161,7 +239,7 @@ <0 0 40 &gic 0 40 4>, <0 0 41 &gic 0 41 4>, <0 0 42 &gic 0 42 4>; + + /include/ "vexpress-v2m-rs1.dtsi" }; }; - -/include/ "vexpress-v2m-rs1.dtsi" diff --git a/arch/arm/boot/dts/vexpress-v2p-ca9.dts b/arch/arm/boot/dts/vexpress-v2p-ca9.dts index 3f0c736d31d6..1420bb14d95c 100644 --- a/arch/arm/boot/dts/vexpress-v2p-ca9.dts +++ b/arch/arm/boot/dts/vexpress-v2p-ca9.dts @@ -12,6 +12,7 @@ / { model = "V2P-CA9"; arm,hbi = <0x191>; + arm,vexpress,site = <0xf>; compatible = "arm,vexpress,v2p-ca9", "arm,vexpress"; interrupt-parent = <&gic>; #address-cells = <1>; @@ -70,11 +71,15 @@ compatible = "arm,pl111", "arm,primecell"; reg = <0x10020000 0x1000>; interrupts = <0 44 4>; + clocks = <&oscclk1>, <&oscclk2>; + clock-names = "clcdclk", "apb_pclk"; }; memory-controller@100e0000 { compatible = "arm,pl341", "arm,primecell"; reg = <0x100e0000 0x1000>; + clocks = <&oscclk2>; + clock-names = "apb_pclk"; }; memory-controller@100e1000 { @@ -82,6 +87,8 @@ reg = <0x100e1000 0x1000>; interrupts = <0 45 4>, <0 46 4>; + clocks = <&oscclk2>; + clock-names = "apb_pclk"; }; timer@100e4000 { @@ -89,12 +96,16 @@ reg = <0x100e4000 0x1000>; interrupts = <0 48 4>, <0 49 4>; + clocks = <&oscclk2>, <&oscclk2>; + clock-names = "timclk", "apb_pclk"; }; watchdog@100e5000 { compatible = "arm,sp805", "arm,primecell"; reg = <0x100e5000 0x1000>; interrupts = <0 51 4>; + clocks = <&oscclk2>, <&oscclk2>; + clock-names = "wdogclk", "apb_pclk"; }; scu@1e000000 { @@ -140,13 +151,132 @@ <0 63 4>; }; - motherboard { + dcc { + compatible = "arm,vexpress,config-bus"; + arm,vexpress,config-bridge = <&v2m_sysreg>; + + osc@0 { + /* ACLK clock to the AXI master port on the test chip */ + compatible = "arm,vexpress-osc"; + arm,vexpress-sysreg,func = <1 0>; + freq-range = <30000000 50000000>; + #clock-cells = <0>; + clock-output-names = "extsaxiclk"; + }; + + oscclk1: osc@1 { + /* Reference clock for the CLCD */ + compatible = "arm,vexpress-osc"; + arm,vexpress-sysreg,func = <1 1>; + freq-range = <10000000 80000000>; + #clock-cells = <0>; + clock-output-names = "clcdclk"; + }; + + smbclk: oscclk2: osc@2 { + /* Reference clock for the test chip internal PLLs */ + compatible = "arm,vexpress-osc"; + arm,vexpress-sysreg,func = <1 2>; + freq-range = <33000000 100000000>; + #clock-cells = <0>; + clock-output-names = "tcrefclk"; + }; + + volt@0 { + /* Test Chip internal logic voltage */ + compatible = "arm,vexpress-volt"; + arm,vexpress-sysreg,func = <2 0>; + regulator-name = "VD10"; + regulator-always-on; + label = "VD10"; + }; + + volt@1 { + /* PL310, L2 cache, RAM cell supply (not PL310 logic) */ + compatible = "arm,vexpress-volt"; + arm,vexpress-sysreg,func = <2 1>; + regulator-name = "VD10_S2"; + regulator-always-on; + label = "VD10_S2"; + }; + + volt@2 { + /* Cortex-A9 system supply, Cores, MPEs, SCU and PL310 logic */ + compatible = "arm,vexpress-volt"; + arm,vexpress-sysreg,func = <2 2>; + regulator-name = "VD10_S3"; + regulator-always-on; + label = "VD10_S3"; + }; + + volt@3 { + /* DDR2 SDRAM and Test Chip DDR2 I/O supply */ + compatible = "arm,vexpress-volt"; + arm,vexpress-sysreg,func = <2 3>; + regulator-name = "VCC1V8"; + regulator-always-on; + label = "VCC1V8"; + }; + + volt@4 { + /* DDR2 SDRAM VTT termination voltage */ + compatible = "arm,vexpress-volt"; + arm,vexpress-sysreg,func = <2 4>; + regulator-name = "DDR2VTT"; + regulator-always-on; + label = "DDR2VTT"; + }; + + volt@5 { + /* Local board supply for miscellaneous logic external to the Test Chip */ + arm,vexpress-sysreg,func = <2 5>; + compatible = "arm,vexpress-volt"; + regulator-name = "VCC3V3"; + regulator-always-on; + label = "VCC3V3"; + }; + + amp@0 { + /* PL310, L2 cache, RAM cell supply (not PL310 logic) */ + compatible = "arm,vexpress-amp"; + arm,vexpress-sysreg,func = <3 0>; + label = "VD10_S2"; + }; + + amp@1 { + /* Cortex-A9 system supply, Cores, MPEs, SCU and PL310 logic */ + compatible = "arm,vexpress-amp"; + arm,vexpress-sysreg,func = <3 1>; + label = "VD10_S3"; + }; + + power@0 { + /* PL310, L2 cache, RAM cell supply (not PL310 logic) */ + compatible = "arm,vexpress-power"; + arm,vexpress-sysreg,func = <12 0>; + label = "PVD10_S2"; + }; + + power@1 { + /* Cortex-A9 system supply, Cores, MPEs, SCU and PL310 logic */ + compatible = "arm,vexpress-power"; + arm,vexpress-sysreg,func = <12 1>; + label = "PVD10_S3"; + }; + }; + + smb { + compatible = "simple-bus"; + + #address-cells = <2>; + #size-cells = <1>; ranges = <0 0 0x40000000 0x04000000>, <1 0 0x44000000 0x04000000>, <2 0 0x48000000 0x04000000>, <3 0 0x4c000000 0x04000000>, <7 0 0x10000000 0x00020000>; + #interrupt-cells = <1>; interrupt-map-mask = <0 0 63>; interrupt-map = <0 0 0 &gic 0 0 4>, <0 0 1 &gic 0 1 4>, @@ -191,7 +321,7 @@ <0 0 40 &gic 0 40 4>, <0 0 41 &gic 0 41 4>, <0 0 42 &gic 0 42 4>; + + /include/ "vexpress-v2m.dtsi" }; }; - -/include/ "vexpress-v2m.dtsi" diff --git a/arch/arm/configs/armadillo800eva_defconfig b/arch/arm/configs/armadillo800eva_defconfig index f78d259f8d23..3d764072dd54 100644 --- a/arch/arm/configs/armadillo800eva_defconfig +++ b/arch/arm/configs/armadillo800eva_defconfig @@ -7,6 +7,7 @@ CONFIG_LOG_BUF_SHIFT=16 # CONFIG_IPC_NS is not set # CONFIG_PID_NS is not set CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_PERF_EVENTS=y CONFIG_SLAB=y CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y diff --git a/arch/arm/configs/g3evm_defconfig b/arch/arm/configs/g3evm_defconfig deleted file mode 100644 index 4a336ab5a0c0..000000000000 --- a/arch/arm/configs/g3evm_defconfig +++ /dev/null @@ -1,57 +0,0 @@ -CONFIG_EXPERIMENTAL=y -CONFIG_SYSVIPC=y -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=16 -CONFIG_BLK_DEV_INITRD=y -CONFIG_SLAB=y -# CONFIG_BLK_DEV_BSG is not set -# CONFIG_IOSCHED_DEADLINE is not set -# CONFIG_IOSCHED_CFQ is not set -CONFIG_ARCH_SHMOBILE=y -CONFIG_ARCH_SH7367=y -CONFIG_MACH_G3EVM=y -CONFIG_AEABI=y -# CONFIG_OABI_COMPAT is not set -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE="console=ttySC1,115200 earlyprintk=sh-sci.1,115200" -CONFIG_KEXEC=y -CONFIG_PM=y -# CONFIG_SUSPEND is not set -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -# CONFIG_FIRMWARE_IN_KERNEL is not set -CONFIG_MTD=y -CONFIG_MTD_CONCAT=y -CONFIG_MTD_PARTITIONS=y -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_CFI=y -CONFIG_MTD_CFI_INTELEXT=y -CONFIG_MTD_PHYSMAP=y -CONFIG_MTD_NAND=y -# CONFIG_BLK_DEV is not set -# CONFIG_MISC_DEVICES is not set -# CONFIG_INPUT_MOUSEDEV_PSAUX is not set -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_SERIO is not set -CONFIG_SERIAL_SH_SCI=y -CONFIG_SERIAL_SH_SCI_NR_UARTS=8 -CONFIG_SERIAL_SH_SCI_CONSOLE=y -# CONFIG_LEGACY_PTYS is not set -# CONFIG_HW_RANDOM is not set -# CONFIG_HWMON is not set -# CONFIG_VGA_CONSOLE is not set -# CONFIG_HID_SUPPORT is not set -# CONFIG_USB_SUPPORT is not set -# CONFIG_DNOTIFY is not set -# CONFIG_INOTIFY_USER is not set -CONFIG_TMPFS=y -# CONFIG_MISC_FILESYSTEMS is not set -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_KERNEL=y -# CONFIG_DETECT_SOFTLOCKUP is not set -# CONFIG_RCU_CPU_STALL_DETECTOR is not set -# CONFIG_FTRACE is not set -# CONFIG_CRC32 is not set diff --git a/arch/arm/configs/g4evm_defconfig b/arch/arm/configs/g4evm_defconfig deleted file mode 100644 index 21c6d0307bc3..000000000000 --- a/arch/arm/configs/g4evm_defconfig +++ /dev/null @@ -1,57 +0,0 @@ -CONFIG_EXPERIMENTAL=y -CONFIG_SYSVIPC=y -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=16 -CONFIG_BLK_DEV_INITRD=y -CONFIG_SLAB=y -# CONFIG_BLK_DEV_BSG is not set -# CONFIG_IOSCHED_DEADLINE is not set -# CONFIG_IOSCHED_CFQ is not set -CONFIG_ARCH_SHMOBILE=y -CONFIG_ARCH_SH7377=y -CONFIG_MACH_G4EVM=y -CONFIG_AEABI=y -# CONFIG_OABI_COMPAT is not set -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE="console=ttySC4,115200 earlyprintk=sh-sci.4,115200" -CONFIG_KEXEC=y -CONFIG_PM=y -# CONFIG_SUSPEND is not set -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -# CONFIG_FIRMWARE_IN_KERNEL is not set -CONFIG_MTD=y -CONFIG_MTD_CONCAT=y -CONFIG_MTD_PARTITIONS=y -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_CFI=y -CONFIG_MTD_CFI_INTELEXT=y -CONFIG_MTD_PHYSMAP=y -CONFIG_MTD_NAND=y -# CONFIG_BLK_DEV is not set -# CONFIG_MISC_DEVICES is not set -# CONFIG_INPUT_MOUSEDEV_PSAUX is not set -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_SERIO is not set -CONFIG_SERIAL_SH_SCI=y -CONFIG_SERIAL_SH_SCI_NR_UARTS=8 -CONFIG_SERIAL_SH_SCI_CONSOLE=y -# CONFIG_LEGACY_PTYS is not set -# CONFIG_HW_RANDOM is not set -# CONFIG_HWMON is not set -# CONFIG_VGA_CONSOLE is not set -# CONFIG_HID_SUPPORT is not set -# CONFIG_USB_SUPPORT is not set -# CONFIG_DNOTIFY is not set -# CONFIG_INOTIFY_USER is not set -CONFIG_TMPFS=y -# CONFIG_MISC_FILESYSTEMS is not set -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_KERNEL=y -# CONFIG_DETECT_SOFTLOCKUP is not set -# CONFIG_RCU_CPU_STALL_DETECTOR is not set -# CONFIG_FTRACE is not set -# CONFIG_CRC32 is not set diff --git a/arch/arm/configs/imx_v6_v7_defconfig b/arch/arm/configs/imx_v6_v7_defconfig index 66aa7a6db884..394ded624e37 100644 --- a/arch/arm/configs/imx_v6_v7_defconfig +++ b/arch/arm/configs/imx_v6_v7_defconfig @@ -139,6 +139,7 @@ CONFIG_I2C_IMX=y CONFIG_SPI=y CONFIG_SPI_IMX=y CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_MC9S08DZ60=y # CONFIG_HWMON is not set CONFIG_WATCHDOG=y CONFIG_IMX2_WDT=y @@ -155,6 +156,7 @@ CONFIG_SOC_CAMERA=y CONFIG_SOC_CAMERA_OV2640=y CONFIG_VIDEO_MX3=y CONFIG_FB=y +CONFIG_LCD_PLATFORM=y CONFIG_BACKLIGHT_LCD_SUPPORT=y CONFIG_LCD_CLASS_DEVICE=y CONFIG_LCD_L4F00242T03=y diff --git a/arch/arm/configs/kzm9g_defconfig b/arch/arm/configs/kzm9g_defconfig index c88b57886e79..ce99e3e00efa 100644 --- a/arch/arm/configs/kzm9g_defconfig +++ b/arch/arm/configs/kzm9g_defconfig @@ -74,6 +74,8 @@ CONFIG_KEYBOARD_GPIO=y # CONFIG_INPUT_MOUSE is not set CONFIG_INPUT_TOUCHSCREEN=y CONFIG_TOUCHSCREEN_ST1232=y +CONFIG_INPUT_MISC=y +CONFIG_INPUT_ADXL34X=y # CONFIG_LEGACY_PTYS is not set CONFIG_SERIAL_SH_SCI=y CONFIG_SERIAL_SH_SCI_NR_UARTS=9 @@ -119,6 +121,8 @@ CONFIG_DMADEVICES=y CONFIG_SH_DMAE=y CONFIG_ASYNC_TX_DMA=y CONFIG_STAGING=y +CONFIG_SENSORS_AK8975=y +CONFIG_IIO=y # CONFIG_DNOTIFY is not set CONFIG_INOTIFY_USER=y CONFIG_VFAT_FS=y diff --git a/arch/arm/configs/marzen_defconfig b/arch/arm/configs/marzen_defconfig index 53382b6c8bb4..728a43c446f8 100644 --- a/arch/arm/configs/marzen_defconfig +++ b/arch/arm/configs/marzen_defconfig @@ -47,6 +47,8 @@ CONFIG_DEVTMPFS_MOUNT=y # CONFIG_STANDALONE is not set # CONFIG_PREVENT_FIRMWARE_BUILD is not set # CONFIG_FW_LOADER is not set +CONFIG_SCSI=y +CONFIG_BLK_DEV_SD=y CONFIG_NETDEVICES=y # CONFIG_NET_VENDOR_BROADCOM is not set # CONFIG_NET_VENDOR_FARADAY is not set @@ -59,9 +61,8 @@ CONFIG_SMSC911X=y # CONFIG_NET_VENDOR_STMICRO is not set # CONFIG_WLAN is not set # CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_KEYBOARD is not set +CONFIG_INPUT_EVDEV=y # CONFIG_INPUT_MOUSE is not set -# CONFIG_SERIO is not set # CONFIG_VT is not set # CONFIG_LEGACY_PTYS is not set # CONFIG_DEVKMEM is not set @@ -69,14 +70,25 @@ CONFIG_SERIAL_SH_SCI=y CONFIG_SERIAL_SH_SCI_NR_UARTS=6 CONFIG_SERIAL_SH_SCI_CONSOLE=y # CONFIG_HW_RANDOM is not set +CONFIG_I2C=y +CONFIG_I2C_RCAR=y +CONFIG_SPI=y +CONFIG_SPI_SH_HSPI=y CONFIG_GPIO_SYSFS=y # CONFIG_HWMON is not set CONFIG_THERMAL=y CONFIG_RCAR_THERMAL=y CONFIG_SSB=y -# CONFIG_USB_SUPPORT is not set +CONFIG_USB=y +CONFIG_USB_RCAR_PHY=y CONFIG_MMC=y CONFIG_MMC_SDHI=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_HCD_PLATFORM=y +CONFIG_USB_EHCI_HCD_PLATFORM=y +CONFIG_USB_STORAGE=y CONFIG_UIO=y CONFIG_UIO_PDRV_GENIRQ=y # CONFIG_IOMMU_SUPPORT is not set diff --git a/arch/arm/configs/mvebu_defconfig b/arch/arm/configs/mvebu_defconfig index 7bcf850eddcd..3458752c4bb2 100644 --- a/arch/arm/configs/mvebu_defconfig +++ b/arch/arm/configs/mvebu_defconfig @@ -1,6 +1,6 @@ CONFIG_EXPERIMENTAL=y CONFIG_SYSVIPC=y -CONFIG_NO_HZ=y +CONFIG_IRQ_DOMAIN_DEBUG=y CONFIG_HIGH_RES_TIMERS=y CONFIG_LOG_BUF_SHIFT=14 CONFIG_BLK_DEV_INITRD=y @@ -9,10 +9,12 @@ CONFIG_SLAB=y CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y CONFIG_ARCH_MVEBU=y -CONFIG_MACH_ARMADA_370_XP=y +CONFIG_MACH_ARMADA_370=y +CONFIG_MACH_ARMADA_XP=y +# CONFIG_CACHE_L2X0 is not set CONFIG_AEABI=y CONFIG_HIGHMEM=y -CONFIG_USE_OF=y +# CONFIG_COMPACTION is not set CONFIG_ZBOOT_ROM_TEXT=0x0 CONFIG_ZBOOT_ROM_BSS=0x0 CONFIG_ARM_APPENDED_DTB=y @@ -23,6 +25,8 @@ CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_OF_PLATFORM=y CONFIG_GPIOLIB=y CONFIG_GPIO_SYSFS=y +# CONFIG_USB_SUPPORT is not set +# CONFIG_IOMMU_SUPPORT is not set CONFIG_EXT2_FS=y CONFIG_EXT3_FS=y # CONFIG_EXT3_FS_XATTR is not set diff --git a/arch/arm/configs/versatile_defconfig b/arch/arm/configs/versatile_defconfig index cdd4d2bd3962..2ba9e63d0f17 100644 --- a/arch/arm/configs/versatile_defconfig +++ b/arch/arm/configs/versatile_defconfig @@ -1,3 +1,4 @@ +CONFIG_ARCH_VERSATILE=y CONFIG_EXPERIMENTAL=y # CONFIG_LOCALVERSION_AUTO is not set CONFIG_SYSVIPC=y diff --git a/arch/arm/include/asm/flat.h b/arch/arm/include/asm/flat.h index 59426a4595c9..e847d23351ed 100644 --- a/arch/arm/include/asm/flat.h +++ b/arch/arm/include/asm/flat.h @@ -8,7 +8,7 @@ #define flat_argvp_envp_on_stack() 1 #define flat_old_ram_flag(flags) (flags) #define flat_reloc_valid(reloc, size) ((reloc) <= (size)) -#define flat_get_addr_from_rp(rp, relval, flags, persistent) get_unaligned(rp) +#define flat_get_addr_from_rp(rp, relval, flags, persistent) ((void)persistent,get_unaligned(rp)) #define flat_put_addr_at_rp(rp, val, relval) put_unaligned(val,rp) #define flat_get_relocate_addr(rel) (rel) #define flat_set_persistent(relval, p) 0 diff --git a/arch/arm/include/asm/hardware/sp810.h b/arch/arm/include/asm/hardware/sp810.h index 6b9b077d86b3..6636430dd0e6 100644 --- a/arch/arm/include/asm/hardware/sp810.h +++ b/arch/arm/include/asm/hardware/sp810.h @@ -50,11 +50,7 @@ #define SCPCELLID2 0xFF8 #define SCPCELLID3 0xFFC -#define SCCTRL_TIMEREN0SEL_REFCLK (0 << 15) -#define SCCTRL_TIMEREN0SEL_TIMCLK (1 << 15) - -#define SCCTRL_TIMEREN1SEL_REFCLK (0 << 17) -#define SCCTRL_TIMEREN1SEL_TIMCLK (1 << 17) +#define SCCTRL_TIMERENnSEL_SHIFT(n) (15 + ((n) * 2)) static inline void sysctl_soft_reset(void __iomem *base) { diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h index 35c1ed89b936..42f042ee4ada 100644 --- a/arch/arm/include/asm/io.h +++ b/arch/arm/include/asm/io.h @@ -64,7 +64,7 @@ extern void __raw_readsl(const void __iomem *addr, void *data, int longlen); static inline void __raw_writew(u16 val, volatile void __iomem *addr) { asm volatile("strh %1, %0" - : "+Qo" (*(volatile u16 __force *)addr) + : "+Q" (*(volatile u16 __force *)addr) : "r" (val)); } @@ -72,7 +72,7 @@ static inline u16 __raw_readw(const volatile void __iomem *addr) { u16 val; asm volatile("ldrh %1, %0" - : "+Qo" (*(volatile u16 __force *)addr), + : "+Q" (*(volatile u16 __force *)addr), "=r" (val)); return val; } diff --git a/arch/arm/include/asm/mach/map.h b/arch/arm/include/asm/mach/map.h index 195ac2f9d3d3..2fe141fcc8d6 100644 --- a/arch/arm/include/asm/mach/map.h +++ b/arch/arm/include/asm/mach/map.h @@ -40,6 +40,13 @@ extern void iotable_init(struct map_desc *, int); extern void vm_reserve_area_early(unsigned long addr, unsigned long size, void *caller); +#ifdef CONFIG_DEBUG_LL +extern void debug_ll_addr(unsigned long *paddr, unsigned long *vaddr); +extern void debug_ll_io_init(void); +#else +static inline void debug_ll_io_init(void) {} +#endif + struct mem_type; extern const struct mem_type *get_mem_type(unsigned int type); /* diff --git a/arch/arm/include/asm/sched_clock.h b/arch/arm/include/asm/sched_clock.h index 05b8e82ec9f5..e3f757263438 100644 --- a/arch/arm/include/asm/sched_clock.h +++ b/arch/arm/include/asm/sched_clock.h @@ -10,7 +10,5 @@ extern void sched_clock_postinit(void); extern void setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate); -extern void setup_sched_clock_needs_suspend(u32 (*read)(void), int bits, - unsigned long rate); #endif diff --git a/arch/arm/include/asm/uaccess.h b/arch/arm/include/asm/uaccess.h index 77bd79f2ffdb..7e1f76027f66 100644 --- a/arch/arm/include/asm/uaccess.h +++ b/arch/arm/include/asm/uaccess.h @@ -200,8 +200,8 @@ extern int __put_user_8(void *, unsigned long long); #define USER_DS KERNEL_DS #define segment_eq(a,b) (1) -#define __addr_ok(addr) (1) -#define __range_ok(addr,size) (0) +#define __addr_ok(addr) ((void)(addr),1) +#define __range_ok(addr,size) ((void)(addr),0) #define get_fs() (KERNEL_DS) static inline void set_fs(mm_segment_t fs) diff --git a/arch/arm/include/asm/vfpmacros.h b/arch/arm/include/asm/vfpmacros.h index 6a6f1e485f41..301c1db3e99b 100644 --- a/arch/arm/include/asm/vfpmacros.h +++ b/arch/arm/include/asm/vfpmacros.h @@ -27,9 +27,9 @@ #if __LINUX_ARM_ARCH__ <= 6 ldr \tmp, =elf_hwcap @ may not have MVFR regs ldr \tmp, [\tmp, #0] - tst \tmp, #HWCAP_VFPv3D16 - ldceql p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31} - addne \base, \base, #32*4 @ step over unused register space + tst \tmp, #HWCAP_VFPD32 + ldcnel p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31} + addeq \base, \base, #32*4 @ step over unused register space #else VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0 and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field @@ -51,9 +51,9 @@ #if __LINUX_ARM_ARCH__ <= 6 ldr \tmp, =elf_hwcap @ may not have MVFR regs ldr \tmp, [\tmp, #0] - tst \tmp, #HWCAP_VFPv3D16 - stceql p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31} - addne \base, \base, #32*4 @ step over unused register space + tst \tmp, #HWCAP_VFPD32 + stcnel p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31} + addeq \base, \base, #32*4 @ step over unused register space #else VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0 and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field diff --git a/arch/arm/include/asm/xen/interface.h b/arch/arm/include/asm/xen/interface.h index ae05e56dd17d..5000397134b4 100644 --- a/arch/arm/include/asm/xen/interface.h +++ b/arch/arm/include/asm/xen/interface.h @@ -29,16 +29,22 @@ #ifndef __ASSEMBLY__ /* Explicitly size integers that represent pfns in the interface with - * Xen so that we can have one ABI that works for 32 and 64 bit guests. */ + * Xen so that we can have one ABI that works for 32 and 64 bit guests. + * Note that this means that the xen_pfn_t type may be capable of + * representing pfn's which the guest cannot represent in its own pfn + * type. However since pfn space is controlled by the guest this is + * fine since it simply wouldn't be able to create any sure pfns in + * the first place. + */ typedef uint64_t xen_pfn_t; +#define PRI_xen_pfn "llx" typedef uint64_t xen_ulong_t; +#define PRI_xen_ulong "llx" /* Guest handles for primitive C types. */ __DEFINE_GUEST_HANDLE(uchar, unsigned char); __DEFINE_GUEST_HANDLE(uint, unsigned int); -__DEFINE_GUEST_HANDLE(ulong, unsigned long); DEFINE_GUEST_HANDLE(char); DEFINE_GUEST_HANDLE(int); -DEFINE_GUEST_HANDLE(long); DEFINE_GUEST_HANDLE(void); DEFINE_GUEST_HANDLE(uint64_t); DEFINE_GUEST_HANDLE(uint32_t); diff --git a/arch/arm/include/asm/xen/page.h b/arch/arm/include/asm/xen/page.h index 174202318dff..c6b9096cef95 100644 --- a/arch/arm/include/asm/xen/page.h +++ b/arch/arm/include/asm/xen/page.h @@ -10,7 +10,7 @@ #include <xen/interface/grant_table.h> #define pfn_to_mfn(pfn) (pfn) -#define phys_to_machine_mapping_valid (1) +#define phys_to_machine_mapping_valid(pfn) (1) #define mfn_to_pfn(mfn) (mfn) #define mfn_to_virt(m) (__va(mfn_to_pfn(m) << PAGE_SHIFT)) @@ -30,6 +30,8 @@ typedef struct xpaddr { #define XMADDR(x) ((xmaddr_t) { .maddr = (x) }) #define XPADDR(x) ((xpaddr_t) { .paddr = (x) }) +#define INVALID_P2M_ENTRY (~0UL) + static inline xmaddr_t phys_to_machine(xpaddr_t phys) { unsigned offset = phys.paddr & ~PAGE_MASK; @@ -74,9 +76,14 @@ static inline int m2p_remove_override(struct page *page, bool clear_pte) return 0; } +static inline bool __set_phys_to_machine(unsigned long pfn, unsigned long mfn) +{ + BUG_ON(pfn != mfn && mfn != INVALID_P2M_ENTRY); + return true; +} + static inline bool set_phys_to_machine(unsigned long pfn, unsigned long mfn) { - BUG(); - return false; + return __set_phys_to_machine(pfn, mfn); } #endif /* _ASM_ARM_XEN_PAGE_H */ diff --git a/arch/arm/include/debug/8250_32.S b/arch/arm/include/debug/8250_32.S new file mode 100644 index 000000000000..8db01eeabbb4 --- /dev/null +++ b/arch/arm/include/debug/8250_32.S @@ -0,0 +1,27 @@ +/* + * Copyright (c) 2011 Picochip Ltd., Jamie Iles + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Derived from arch/arm/mach-davinci/include/mach/debug-macro.S to use 32-bit + * accesses to the 8250. + */ + +#include <linux/serial_reg.h> + + .macro senduart,rd,rx + str \rd, [\rx, #UART_TX << UART_SHIFT] + .endm + + .macro busyuart,rd,rx +1002: ldr \rd, [\rx, #UART_LSR << UART_SHIFT] + and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE + teq \rd, #UART_LSR_TEMT | UART_LSR_THRE + bne 1002b + .endm + + /* The UART's don't have any flow control IO's wired up. */ + .macro waituart,rd,rx + .endm diff --git a/arch/arm/include/debug/picoxcell.S b/arch/arm/include/debug/picoxcell.S index 7419deb1b948..bc1f07c49cd4 100644 --- a/arch/arm/include/debug/picoxcell.S +++ b/arch/arm/include/debug/picoxcell.S @@ -5,10 +5,7 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. * - * Derived from arch/arm/mach-davinci/include/mach/debug-macro.S to use 32-bit - * accesses to the 8250. */ -#include <linux/serial_reg.h> #define UART_SHIFT 2 #define PICOXCELL_UART1_BASE 0x80230000 @@ -19,17 +16,4 @@ ldr \rp, =PICOXCELL_UART1_BASE .endm - .macro senduart,rd,rx - str \rd, [\rx, #UART_TX << UART_SHIFT] - .endm - - .macro busyuart,rd,rx -1002: ldr \rd, [\rx, #UART_LSR << UART_SHIFT] - and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE - teq \rd, #UART_LSR_TEMT | UART_LSR_THRE - bne 1002b - .endm - - /* The UART's don't have any flow control IO's wired up. */ - .macro waituart,rd,rx - .endm +#include "8250_32.S" diff --git a/arch/arm/include/debug/socfpga.S b/arch/arm/include/debug/socfpga.S index d6f26d23374f..966b2f994946 100644 --- a/arch/arm/include/debug/socfpga.S +++ b/arch/arm/include/debug/socfpga.S @@ -7,6 +7,9 @@ * published by the Free Software Foundation. */ +#define UART_SHIFT 2 +#define DEBUG_LL_UART_OFFSET 0x00002000 + .macro addruart, rp, rv, tmp mov \rp, #DEBUG_LL_UART_OFFSET orr \rp, \rp, #0x00c00000 @@ -14,3 +17,5 @@ orr \rp, \rp, #0xff000000 @ physical base .endm +#include "8250_32.S" + diff --git a/arch/arm/include/uapi/asm/hwcap.h b/arch/arm/include/uapi/asm/hwcap.h index f254f6503cce..3688fd15a32d 100644 --- a/arch/arm/include/uapi/asm/hwcap.h +++ b/arch/arm/include/uapi/asm/hwcap.h @@ -18,11 +18,12 @@ #define HWCAP_THUMBEE (1 << 11) #define HWCAP_NEON (1 << 12) #define HWCAP_VFPv3 (1 << 13) -#define HWCAP_VFPv3D16 (1 << 14) +#define HWCAP_VFPv3D16 (1 << 14) /* also set for VFPv4-D16 */ #define HWCAP_TLS (1 << 15) #define HWCAP_VFPv4 (1 << 16) #define HWCAP_IDIVA (1 << 17) #define HWCAP_IDIVT (1 << 18) +#define HWCAP_VFPD32 (1 << 19) /* set if VFP has 32 regs (not 16) */ #define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT) diff --git a/arch/arm/kernel/debug.S b/arch/arm/kernel/debug.S index 66f711b2e0e8..6809200c31fb 100644 --- a/arch/arm/kernel/debug.S +++ b/arch/arm/kernel/debug.S @@ -100,6 +100,13 @@ ENTRY(printch) b 1b ENDPROC(printch) +ENTRY(debug_ll_addr) + addruart r2, r3, ip + str r2, [r0] + str r3, [r1] + mov pc, lr +ENDPROC(debug_ll_addr) + #else ENTRY(printascii) @@ -119,4 +126,11 @@ ENTRY(printch) mov pc, lr ENDPROC(printch) +ENTRY(debug_ll_addr) + mov r2, #0 + str r2, [r0] + str r2, [r1] + mov pc, lr +ENDPROC(debug_ll_addr) + #endif diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c index 16cedb42c0c3..896165096d6a 100644 --- a/arch/arm/kernel/irq.c +++ b/arch/arm/kernel/irq.c @@ -34,6 +34,7 @@ #include <linux/list.h> #include <linux/kallsyms.h> #include <linux/proc_fs.h> +#include <linux/export.h> #include <asm/exception.h> #include <asm/mach/arch.h> @@ -109,6 +110,7 @@ void set_irq_flags(unsigned int irq, unsigned int iflags) /* Order is clear bits in "clr" then set bits in "set" */ irq_modify_status(irq, clr, set & ~clr); } +EXPORT_SYMBOL_GPL(set_irq_flags); void __init init_IRQ(void) { diff --git a/arch/arm/kernel/kprobes-test-arm.c b/arch/arm/kernel/kprobes-test-arm.c index 38c1a3b103a0..839312905067 100644 --- a/arch/arm/kernel/kprobes-test-arm.c +++ b/arch/arm/kernel/kprobes-test-arm.c @@ -366,7 +366,9 @@ void kprobe_arm_test_cases(void) TEST_UNSUPPORTED(".word 0xe04f0392 @ umaal r0, pc, r2, r3") TEST_UNSUPPORTED(".word 0xe0500090 @ undef") TEST_UNSUPPORTED(".word 0xe05fff9f @ undef") +#endif +#if __LINUX_ARM_ARCH__ >= 7 TEST_RRR( "mls r0, r",1, VAL1,", r",2, VAL2,", r",3, VAL3,"") TEST_RRR( "mlshi r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"") TEST_RR( "mls lr, r",1, VAL2,", r",2, VAL3,", r13") @@ -456,6 +458,8 @@ void kprobe_arm_test_cases(void) TEST_UNSUPPORTED(".word 0xe1700090") /* Unallocated space */ #if __LINUX_ARM_ARCH__ >= 6 TEST_UNSUPPORTED("ldrex r2, [sp]") +#endif +#if (__LINUX_ARM_ARCH__ >= 7) || defined(CONFIG_CPU_32v6K) TEST_UNSUPPORTED("strexd r0, r2, r3, [sp]") TEST_UNSUPPORTED("ldrexd r2, r3, [sp]") TEST_UNSUPPORTED("strexb r0, r2, [sp]") diff --git a/arch/arm/kernel/machine_kexec.c b/arch/arm/kernel/machine_kexec.c index e29c3337ca81..8ef8c9337809 100644 --- a/arch/arm/kernel/machine_kexec.c +++ b/arch/arm/kernel/machine_kexec.c @@ -45,10 +45,9 @@ int machine_kexec_prepare(struct kimage *image) for (i = 0; i < image->nr_segments; i++) { current_segment = &image->segment[i]; - err = memblock_is_region_memory(current_segment->mem, - current_segment->memsz); - if (err) - return - EINVAL; + if (!memblock_is_region_memory(current_segment->mem, + current_segment->memsz)) + return -EINVAL; err = get_user(header, (__be32*)current_segment->buf); if (err) diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c index 93971b1a4f0b..53c0304b734a 100644 --- a/arch/arm/kernel/perf_event.c +++ b/arch/arm/kernel/perf_event.c @@ -96,6 +96,10 @@ armpmu_event_set_period(struct perf_event *event, s64 period = hwc->sample_period; int ret = 0; + /* The period may have been changed by PERF_EVENT_IOC_PERIOD */ + if (unlikely(period != hwc->last_period)) + left = period - (hwc->last_period - left); + if (unlikely(left <= -period)) { left = period; local64_set(&hwc->period_left, left); diff --git a/arch/arm/kernel/sched_clock.c b/arch/arm/kernel/sched_clock.c index e21bac20d90d..fc6692e2b603 100644 --- a/arch/arm/kernel/sched_clock.c +++ b/arch/arm/kernel/sched_clock.c @@ -107,13 +107,6 @@ static void sched_clock_poll(unsigned long wrap_ticks) update_sched_clock(); } -void __init setup_sched_clock_needs_suspend(u32 (*read)(void), int bits, - unsigned long rate) -{ - setup_sched_clock(read, bits, rate); - cd.needs_suspend = true; -} - void __init setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate) { unsigned long r, w; @@ -189,18 +182,15 @@ void __init sched_clock_postinit(void) static int sched_clock_suspend(void) { sched_clock_poll(sched_clock_timer.data); - if (cd.needs_suspend) - cd.suspended = true; + cd.suspended = true; return 0; } static void sched_clock_resume(void) { - if (cd.needs_suspend) { - cd.epoch_cyc = read_sched_clock(); - cd.epoch_cyc_copy = cd.epoch_cyc; - cd.suspended = false; - } + cd.epoch_cyc = read_sched_clock(); + cd.epoch_cyc_copy = cd.epoch_cyc; + cd.suspended = false; } static struct syscore_ops sched_clock_ops = { diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index 8e20754dd31d..fbc8b2623d82 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c @@ -294,18 +294,24 @@ static void percpu_timer_setup(void); asmlinkage void __cpuinit secondary_start_kernel(void) { struct mm_struct *mm = &init_mm; - unsigned int cpu = smp_processor_id(); + unsigned int cpu; + + /* + * The identity mapping is uncached (strongly ordered), so + * switch away from it before attempting any exclusive accesses. + */ + cpu_switch_mm(mm->pgd, mm); + enter_lazy_tlb(mm, current); + local_flush_tlb_all(); /* * All kernel threads share the same mm context; grab a * reference and switch to it. */ + cpu = smp_processor_id(); atomic_inc(&mm->mm_count); current->active_mm = mm; cpumask_set_cpu(cpu, mm_cpumask(mm)); - cpu_switch_mm(mm->pgd, mm); - enter_lazy_tlb(mm, current); - local_flush_tlb_all(); printk("CPU%u: Booted secondary processor\n", cpu); diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c index e1f906989bb8..6ec73f91a1d6 100644 --- a/arch/arm/kernel/smp_twd.c +++ b/arch/arm/kernel/smp_twd.c @@ -42,10 +42,10 @@ static void twd_set_mode(enum clock_event_mode mode, switch (mode) { case CLOCK_EVT_MODE_PERIODIC: - /* timer load already set up */ ctrl = TWD_TIMER_CONTROL_ENABLE | TWD_TIMER_CONTROL_IT_ENABLE | TWD_TIMER_CONTROL_PERIODIC; - __raw_writel(twd_timer_rate / HZ, twd_base + TWD_TIMER_LOAD); + __raw_writel(DIV_ROUND_CLOSEST(twd_timer_rate, HZ), + twd_base + TWD_TIMER_LOAD); break; case CLOCK_EVT_MODE_ONESHOT: /* period set, and timer enabled in 'next_event' hook */ @@ -366,10 +366,8 @@ void __init twd_local_timer_of_register(void) int err; np = of_find_matching_node(NULL, twd_of_match); - if (!np) { - err = -ENODEV; - goto out; - } + if (!np) + return -ENODEV; twd_ppi = irq_of_parse_and_map(np, 0); if (!twd_ppi) { diff --git a/arch/arm/lib/delay.c b/arch/arm/lib/delay.c index 9d0a30032d7f..0dc53854a5d8 100644 --- a/arch/arm/lib/delay.c +++ b/arch/arm/lib/delay.c @@ -45,6 +45,7 @@ int read_current_timer(unsigned long *timer_val) *timer_val = delay_timer->read_current_timer(); return 0; } +EXPORT_SYMBOL_GPL(read_current_timer); static void __timer_delay(unsigned long cycles) { diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index b14207101938..043624219b55 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -21,19 +21,13 @@ config SOC_AT91SAM9 bool select CPU_ARM926T select GENERIC_CLOCKEVENTS + select MULTI_IRQ_HANDLER + select SPARSE_IRQ menu "Atmel AT91 System-on-Chip" comment "Atmel AT91 Processor" -config SOC_AT91SAM9 - bool - select AT91_SAM9_SMC - select AT91_SAM9_TIME - select CPU_ARM926T - select MULTI_IRQ_HANDLER - select SPARSE_IRQ - config SOC_AT91RM9200 bool "AT91RM9200" select CPU_ARM920T diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c index b4f0565aff63..5269825194a8 100644 --- a/arch/arm/mach-at91/at91rm9200.c +++ b/arch/arm/mach-at91/at91rm9200.c @@ -187,7 +187,7 @@ static struct clk_lookup periph_clocks_lookups[] = { CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk), CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk), - CLKDEV_CON_DEV_ID(NULL, "i2c-at91rm9200", &twi_clk), + CLKDEV_CON_DEV_ID(NULL, "i2c-at91rm9200.0", &twi_clk), /* fake hclk clock */ CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), CLKDEV_CON_ID("pioA", &pioA_clk), diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c index a563189cdfc3..1e122bcd7845 100644 --- a/arch/arm/mach-at91/at91rm9200_devices.c +++ b/arch/arm/mach-at91/at91rm9200_devices.c @@ -479,7 +479,7 @@ static struct i2c_gpio_platform_data pdata = { static struct platform_device at91rm9200_twi_device = { .name = "i2c-gpio", - .id = -1, + .id = 0, .dev.platform_data = &pdata, }; @@ -512,7 +512,7 @@ static struct resource twi_resources[] = { static struct platform_device at91rm9200_twi_device = { .name = "i2c-at91rm9200", - .id = -1, + .id = 0, .resource = twi_resources, .num_resources = ARRAY_SIZE(twi_resources), }; diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c index ad29f93f20ca..f8202615f4a8 100644 --- a/arch/arm/mach-at91/at91sam9260.c +++ b/arch/arm/mach-at91/at91sam9260.c @@ -211,8 +211,8 @@ static struct clk_lookup periph_clocks_lookups[] = { CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.1", &tc4_clk), CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.1", &tc5_clk), CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc_clk), - CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9260", &twi_clk), - CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9g20", &twi_clk), + CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9260.0", &twi_clk), + CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9g20.0", &twi_clk), /* more usart lookup table for DT entries */ CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck), CLKDEV_CON_DEV_ID("usart", "fffb0000.serial", &usart0_clk), diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c index a76b8684f52d..aa1e58729885 100644 --- a/arch/arm/mach-at91/at91sam9260_devices.c +++ b/arch/arm/mach-at91/at91sam9260_devices.c @@ -389,7 +389,7 @@ static struct i2c_gpio_platform_data pdata = { static struct platform_device at91sam9260_twi_device = { .name = "i2c-gpio", - .id = -1, + .id = 0, .dev.platform_data = &pdata, }; @@ -421,7 +421,7 @@ static struct resource twi_resources[] = { }; static struct platform_device at91sam9260_twi_device = { - .id = -1, + .id = 0, .resource = twi_resources, .num_resources = ARRAY_SIZE(twi_resources), }; diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c index 8d999eb1a137..04295c04b3e0 100644 --- a/arch/arm/mach-at91/at91sam9261.c +++ b/arch/arm/mach-at91/at91sam9261.c @@ -178,8 +178,8 @@ static struct clk_lookup periph_clocks_lookups[] = { CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk), CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &hck0), - CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9261", &twi_clk), - CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9g10", &twi_clk), + CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9261.0", &twi_clk), + CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9g10.0", &twi_clk), CLKDEV_CON_ID("pioA", &pioA_clk), CLKDEV_CON_ID("pioB", &pioB_clk), CLKDEV_CON_ID("pioC", &pioC_clk), diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c index 9752f17efba9..b9487696b7be 100644 --- a/arch/arm/mach-at91/at91sam9261_devices.c +++ b/arch/arm/mach-at91/at91sam9261_devices.c @@ -285,7 +285,7 @@ static struct i2c_gpio_platform_data pdata = { static struct platform_device at91sam9261_twi_device = { .name = "i2c-gpio", - .id = -1, + .id = 0, .dev.platform_data = &pdata, }; @@ -317,7 +317,7 @@ static struct resource twi_resources[] = { }; static struct platform_device at91sam9261_twi_device = { - .id = -1, + .id = 0, .resource = twi_resources, .num_resources = ARRAY_SIZE(twi_resources), }; diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c index 6a01d0360dfb..d6f9c23927c4 100644 --- a/arch/arm/mach-at91/at91sam9263.c +++ b/arch/arm/mach-at91/at91sam9263.c @@ -193,7 +193,7 @@ static struct clk_lookup periph_clocks_lookups[] = { CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk), CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk), CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk), - CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9260", &twi_clk), + CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9260.0", &twi_clk), /* fake hclk clock */ CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), CLKDEV_CON_ID("pioA", &pioA_clk), diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c index 8dde220b42b6..cb85da2eccea 100644 --- a/arch/arm/mach-at91/at91sam9263_devices.c +++ b/arch/arm/mach-at91/at91sam9263_devices.c @@ -567,7 +567,7 @@ static struct i2c_gpio_platform_data pdata = { static struct platform_device at91sam9263_twi_device = { .name = "i2c-gpio", - .id = -1, + .id = 0, .dev.platform_data = &pdata, }; @@ -600,7 +600,7 @@ static struct resource twi_resources[] = { static struct platform_device at91sam9263_twi_device = { .name = "i2c-at91sam9260", - .id = -1, + .id = 0, .resource = twi_resources, .num_resources = ARRAY_SIZE(twi_resources), }; diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c index d6ca0543ce8d..5047bdc92adf 100644 --- a/arch/arm/mach-at91/at91sam9rl_devices.c +++ b/arch/arm/mach-at91/at91sam9rl_devices.c @@ -314,7 +314,7 @@ static struct i2c_gpio_platform_data pdata = { static struct platform_device at91sam9rl_twi_device = { .name = "i2c-gpio", - .id = -1, + .id = 0, .dev.platform_data = &pdata, }; @@ -347,7 +347,7 @@ static struct resource twi_resources[] = { static struct platform_device at91sam9rl_twi_device = { .name = "i2c-at91sam9g20", - .id = -1, + .id = 0, .resource = twi_resources, .num_resources = ARRAY_SIZE(twi_resources), }; diff --git a/arch/arm/mach-at91/at91x40.c b/arch/arm/mach-at91/at91x40.c index 6bd7300a2bc5..bb7f54474b92 100644 --- a/arch/arm/mach-at91/at91x40.c +++ b/arch/arm/mach-at91/at91x40.c @@ -88,6 +88,6 @@ void __init at91x40_init_interrupts(unsigned int priority[NR_AIC_IRQS]) if (!priority) priority = at91x40_default_irq_priority; - at91_aic_init(priority); + at91_aic_init(priority, at91_extern_irq); } diff --git a/arch/arm/mach-at91/board-neocore926.c b/arch/arm/mach-at91/board-neocore926.c index 9cda3fd346ae..6960778af4c2 100644 --- a/arch/arm/mach-at91/board-neocore926.c +++ b/arch/arm/mach-at91/board-neocore926.c @@ -129,7 +129,7 @@ static struct spi_board_info neocore926_spi_devices[] = { .max_speed_hz = 125000 * 16, .bus_num = 0, .platform_data = &ads_info, - .irq = AT91SAM9263_ID_IRQ1, + .irq = NR_IRQS_LEGACY + AT91SAM9263_ID_IRQ1, }, #endif }; diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c index 27b3af1a3047..a9167dd45f96 100644 --- a/arch/arm/mach-at91/board-sam9261ek.c +++ b/arch/arm/mach-at91/board-sam9261ek.c @@ -309,7 +309,7 @@ static struct spi_board_info ek_spi_devices[] = { .max_speed_hz = 125000 * 26, /* (max sample rate @ 3V) * (cmd + data + overhead) */ .bus_num = 0, .platform_data = &ads_info, - .irq = AT91SAM9261_ID_IRQ0, + .irq = NR_IRQS_LEGACY + AT91SAM9261_ID_IRQ0, .controller_data = (void *) AT91_PIN_PA28, /* CS pin */ }, #endif diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c index 073e17403d98..b87dbe2be0d6 100644 --- a/arch/arm/mach-at91/board-sam9263ek.c +++ b/arch/arm/mach-at91/board-sam9263ek.c @@ -132,7 +132,7 @@ static struct spi_board_info ek_spi_devices[] = { .max_speed_hz = 125000 * 26, /* (max sample rate @ 3V) * (cmd + data + overhead) */ .bus_num = 0, .platform_data = &ads_info, - .irq = AT91SAM9263_ID_IRQ1, + .irq = NR_IRQS_LEGACY + AT91SAM9263_ID_IRQ1, }, #endif }; diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h index f49650677653..b62f560e6c75 100644 --- a/arch/arm/mach-at91/generic.h +++ b/arch/arm/mach-at91/generic.h @@ -26,7 +26,8 @@ extern void __init at91_dt_initialize(void); extern void __init at91_init_irq_default(void); extern void __init at91_init_interrupts(unsigned int priority[]); extern void __init at91x40_init_interrupts(unsigned int priority[]); -extern void __init at91_aic_init(unsigned int priority[]); +extern void __init at91_aic_init(unsigned int priority[], + unsigned int ext_irq_mask); extern int __init at91_aic_of_init(struct device_node *node, struct device_node *parent); extern int __init at91_aic5_of_init(struct device_node *node, diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c index 1e02c0e49dcc..febc2ee901a5 100644 --- a/arch/arm/mach-at91/irq.c +++ b/arch/arm/mach-at91/irq.c @@ -502,14 +502,19 @@ int __init at91_aic5_of_init(struct device_node *node, /* * Initialize the AIC interrupt controller. */ -void __init at91_aic_init(unsigned int *priority) +void __init at91_aic_init(unsigned int *priority, unsigned int ext_irq_mask) { unsigned int i; int irq_base; - if (at91_aic_pm_init()) + at91_extern_irq = kzalloc(BITS_TO_LONGS(n_irqs) + * sizeof(*at91_extern_irq), GFP_KERNEL); + + if (at91_aic_pm_init() || at91_extern_irq == NULL) panic("Unable to allocate bit maps\n"); + *at91_extern_irq = ext_irq_mask; + at91_aic_base = ioremap(AT91_AIC, 512); if (!at91_aic_base) panic("Unable to ioremap AIC registers\n"); diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c index da9881b161e1..0b32c81730a5 100644 --- a/arch/arm/mach-at91/setup.c +++ b/arch/arm/mach-at91/setup.c @@ -47,7 +47,7 @@ void __init at91_init_irq_default(void) void __init at91_init_interrupts(unsigned int *priority) { /* Initialize the AIC interrupt controller */ - at91_aic_init(priority); + at91_aic_init(priority, at91_extern_irq); /* Enable GPIO interrupts */ at91_gpio_irq_setup(); @@ -151,7 +151,7 @@ static void __init soc_detect(u32 dbgu_base) } /* at91sam9g10 */ - if ((cidr & ~AT91_CIDR_EXT) == ARCH_ID_AT91SAM9G10) { + if ((socid & ~AT91_CIDR_EXT) == ARCH_ID_AT91SAM9G10) { at91_soc_initdata.type = AT91_SOC_SAM9G10; at91_boot_soc = at91sam9261_soc; } diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile index 9b58024f7d43..1797dee88a0d 100644 --- a/arch/arm/mach-exynos/Makefile +++ b/arch/arm/mach-exynos/Makefile @@ -53,7 +53,6 @@ obj-$(CONFIG_EXYNOS4_DEV_AHCI) += dev-ahci.o obj-$(CONFIG_EXYNOS4_DEV_DWMCI) += dev-dwmci.o obj-$(CONFIG_EXYNOS_DEV_DMA) += dma.o obj-$(CONFIG_EXYNOS4_DEV_USB_OHCI) += dev-ohci.o -obj-$(CONFIG_EXYNOS_DEV_DRM) += dev-drm.o obj-$(CONFIG_EXYNOS_DEV_SYSMMU) += dev-sysmmu.o obj-$(CONFIG_ARCH_EXYNOS) += setup-i2c0.o diff --git a/arch/arm/mach-exynos/clock-exynos5.c b/arch/arm/mach-exynos/clock-exynos5.c index c44ca1ee1b8d..0d0c93f6595c 100644 --- a/arch/arm/mach-exynos/clock-exynos5.c +++ b/arch/arm/mach-exynos/clock-exynos5.c @@ -80,6 +80,8 @@ static struct sleep_save exynos5_clock_save[] = { SAVE_ITEM(EXYNOS5_VPLL_CON0), SAVE_ITEM(EXYNOS5_VPLL_CON1), SAVE_ITEM(EXYNOS5_VPLL_CON2), + SAVE_ITEM(EXYNOS5_PWR_CTRL1), + SAVE_ITEM(EXYNOS5_PWR_CTRL2), }; #endif @@ -196,6 +198,11 @@ static int exynos5_clk_ip_isp1_ctrl(struct clk *clk, int enable) return s5p_gatectrl(EXYNOS5_CLKGATE_IP_ISP1, clk, enable); } +static int exynos5_clk_hdmiphy_ctrl(struct clk *clk, int enable) +{ + return s5p_gatectrl(S5P_HDMI_PHY_CONTROL, clk, enable); +} + /* Core list of CMU_CPU side */ static struct clksrc_clk exynos5_clk_mout_apll = { @@ -651,15 +658,20 @@ static struct clk exynos5_init_clocks_off[] = { .ctrlbit = (1 << 15), }, { .name = "sata", - .devname = "ahci", + .devname = "exynos5-sata", + .parent = &exynos5_clk_aclk_200.clk, .enable = exynos5_clk_ip_fsys_ctrl, .ctrlbit = (1 << 6), }, { - .name = "sata_phy", + .name = "sata-phy", + .devname = "exynos5-sata-phy", + .parent = &exynos5_clk_aclk_200.clk, .enable = exynos5_clk_ip_fsys_ctrl, .ctrlbit = (1 << 24), }, { - .name = "sata_phy_i2c", + .name = "i2c", + .devname = "exynos5-sata-phy-i2c", + .parent = &exynos5_clk_aclk_200.clk, .enable = exynos5_clk_ip_fsys_ctrl, .ctrlbit = (1 << 25), }, { @@ -669,15 +681,25 @@ static struct clk exynos5_init_clocks_off[] = { .ctrlbit = (1 << 0), }, { .name = "hdmi", - .devname = "exynos4-hdmi", + .devname = "exynos5-hdmi", .enable = exynos5_clk_ip_disp1_ctrl, .ctrlbit = (1 << 6), }, { + .name = "hdmiphy", + .devname = "exynos5-hdmi", + .enable = exynos5_clk_hdmiphy_ctrl, + .ctrlbit = (1 << 0), + }, { .name = "mixer", - .devname = "s5p-mixer", + .devname = "exynos5-mixer", .enable = exynos5_clk_ip_disp1_ctrl, .ctrlbit = (1 << 5), }, { + .name = "dp", + .devname = "exynos-dp", + .enable = exynos5_clk_ip_disp1_ctrl, + .ctrlbit = (1 << 4), + }, { .name = "jpeg", .enable = exynos5_clk_ip_gen_ctrl, .ctrlbit = (1 << 2), @@ -1226,6 +1248,16 @@ static struct clksrc_clk exynos5_clksrcs[] = { .reg_div = { .reg = EXYNOS5_CLKDIV_TOP0, .shift = 24, .size = 3 }, }, { .clk = { + .name = "sclk_sata", + .devname = "exynos5-sata", + .enable = exynos5_clksrc_mask_fsys_ctrl, + .ctrlbit = (1 << 24), + }, + .sources = &exynos5_clkset_aclk, + .reg_src = { .reg = EXYNOS5_CLKSRC_FSYS, .shift = 24, .size = 1 }, + .reg_div = { .reg = EXYNOS5_CLKDIV_FSYS0, .shift = 20, .size = 4 }, + }, { + .clk = { .name = "sclk_gscl_wrap", .devname = "s5p-mipi-csis.0", .enable = exynos5_clksrc_mask_gscl_ctrl, diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c index 715b690e5009..1947be8e5f5b 100644 --- a/arch/arm/mach-exynos/common.c +++ b/arch/arm/mach-exynos/common.c @@ -47,6 +47,7 @@ #include <plat/fimc-core.h> #include <plat/iic-core.h> #include <plat/tv-core.h> +#include <plat/spi-core.h> #include <plat/regs-serial.h> #include "common.h" @@ -346,6 +347,8 @@ static void __init exynos4_map_io(void) s5p_fb_setname(0, "exynos4-fb"); s5p_hdmi_setname("exynos4-hdmi"); + + s3c64xx_spi_setname("exynos4210-spi"); } static void __init exynos5_map_io(void) @@ -366,6 +369,8 @@ static void __init exynos5_map_io(void) s3c_i2c0_setname("s3c2440-i2c"); s3c_i2c1_setname("s3c2440-i2c"); s3c_i2c2_setname("s3c2440-i2c"); + + s3c64xx_spi_setname("exynos4210-spi"); } static void __init exynos4_init_clocks(int xtal) diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c index cff0595d0d35..4ddda9122ecc 100644 --- a/arch/arm/mach-exynos/cpuidle.c +++ b/arch/arm/mach-exynos/cpuidle.c @@ -21,6 +21,7 @@ #include <asm/suspend.h> #include <asm/unified.h> #include <asm/cpuidle.h> +#include <mach/regs-clock.h> #include <mach/regs-pmu.h> #include <mach/pmu.h> @@ -156,12 +157,47 @@ static int exynos4_enter_lowpower(struct cpuidle_device *dev, return exynos4_enter_core0_aftr(dev, drv, new_index); } +static void __init exynos5_core_down_clk(void) +{ + unsigned int tmp; + + /* + * Enable arm clock down (in idle) and set arm divider + * ratios in WFI/WFE state. + */ + tmp = PWR_CTRL1_CORE2_DOWN_RATIO | \ + PWR_CTRL1_CORE1_DOWN_RATIO | \ + PWR_CTRL1_DIV2_DOWN_EN | \ + PWR_CTRL1_DIV1_DOWN_EN | \ + PWR_CTRL1_USE_CORE1_WFE | \ + PWR_CTRL1_USE_CORE0_WFE | \ + PWR_CTRL1_USE_CORE1_WFI | \ + PWR_CTRL1_USE_CORE0_WFI; + __raw_writel(tmp, EXYNOS5_PWR_CTRL1); + + /* + * Enable arm clock up (on exiting idle). Set arm divider + * ratios when not in idle along with the standby duration + * ratios. + */ + tmp = PWR_CTRL2_DIV2_UP_EN | \ + PWR_CTRL2_DIV1_UP_EN | \ + PWR_CTRL2_DUR_STANDBY2_VAL | \ + PWR_CTRL2_DUR_STANDBY1_VAL | \ + PWR_CTRL2_CORE2_UP_RATIO | \ + PWR_CTRL2_CORE1_UP_RATIO; + __raw_writel(tmp, EXYNOS5_PWR_CTRL2); +} + static int __init exynos4_init_cpuidle(void) { int i, max_cpuidle_state, cpu_id; struct cpuidle_device *device; struct cpuidle_driver *drv = &exynos4_idle_driver; + if (soc_is_exynos5250()) + exynos5_core_down_clk(); + /* Setup cpuidle driver */ drv->state_count = (sizeof(exynos4_cpuidle_set) / sizeof(struct cpuidle_state)); diff --git a/arch/arm/mach-exynos/dev-drm.c b/arch/arm/mach-exynos/dev-drm.c deleted file mode 100644 index 17c9c6ecc2e0..000000000000 --- a/arch/arm/mach-exynos/dev-drm.c +++ /dev/null @@ -1,29 +0,0 @@ -/* - * linux/arch/arm/mach-exynos/dev-drm.c - * - * Copyright (c) 2012 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * EXYNOS - core DRM device - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#include <linux/kernel.h> -#include <linux/dma-mapping.h> -#include <linux/platform_device.h> - -#include <plat/devs.h> - -static u64 exynos_drm_dma_mask = DMA_BIT_MASK(32); - -struct platform_device exynos_device_drm = { - .name = "exynos-drm", - .dev = { - .dma_mask = &exynos_drm_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - } -}; diff --git a/arch/arm/mach-exynos/include/mach/regs-clock.h b/arch/arm/mach-exynos/include/mach/regs-clock.h index 8c9b38c9c504..d36ad76ad6a4 100644 --- a/arch/arm/mach-exynos/include/mach/regs-clock.h +++ b/arch/arm/mach-exynos/include/mach/regs-clock.h @@ -267,6 +267,9 @@ #define EXYNOS5_CLKDIV_STATCPU0 EXYNOS_CLKREG(0x00600) #define EXYNOS5_CLKDIV_STATCPU1 EXYNOS_CLKREG(0x00604) +#define EXYNOS5_PWR_CTRL1 EXYNOS_CLKREG(0x01020) +#define EXYNOS5_PWR_CTRL2 EXYNOS_CLKREG(0x01024) + #define EXYNOS5_MPLL_CON0 EXYNOS_CLKREG(0x04100) #define EXYNOS5_CLKSRC_CORE1 EXYNOS_CLKREG(0x04204) @@ -344,6 +347,22 @@ #define EXYNOS5_EPLLCON0_LOCKED_SHIFT (29) +#define PWR_CTRL1_CORE2_DOWN_RATIO (7 << 28) +#define PWR_CTRL1_CORE1_DOWN_RATIO (7 << 16) +#define PWR_CTRL1_DIV2_DOWN_EN (1 << 9) +#define PWR_CTRL1_DIV1_DOWN_EN (1 << 8) +#define PWR_CTRL1_USE_CORE1_WFE (1 << 5) +#define PWR_CTRL1_USE_CORE0_WFE (1 << 4) +#define PWR_CTRL1_USE_CORE1_WFI (1 << 1) +#define PWR_CTRL1_USE_CORE0_WFI (1 << 0) + +#define PWR_CTRL2_DIV2_UP_EN (1 << 25) +#define PWR_CTRL2_DIV1_UP_EN (1 << 24) +#define PWR_CTRL2_DUR_STANDBY2_VAL (1 << 16) +#define PWR_CTRL2_DUR_STANDBY1_VAL (1 << 8) +#define PWR_CTRL2_CORE2_UP_RATIO (1 << 4) +#define PWR_CTRL2_CORE1_UP_RATIO (1 << 0) + /* Compatibility defines and inclusion */ #include <mach/regs-pmu.h> diff --git a/arch/arm/mach-exynos/include/mach/regs-pmu.h b/arch/arm/mach-exynos/include/mach/regs-pmu.h index d4e392b811a3..684625ad3f39 100644 --- a/arch/arm/mach-exynos/include/mach/regs-pmu.h +++ b/arch/arm/mach-exynos/include/mach/regs-pmu.h @@ -15,6 +15,7 @@ #include <mach/map.h> #define S5P_PMUREG(x) (S5P_VA_PMU + (x)) +#define S5P_SYSREG(x) (S3C_VA_SYS + (x)) #define S5P_CENTRAL_SEQ_CONFIGURATION S5P_PMUREG(0x0200) @@ -230,6 +231,7 @@ /* For EXYNOS5 */ +#define EXYNOS5_SYS_I2C_CFG S5P_SYSREG(0x0234) #define EXYNOS5_USB_CFG S5P_PMUREG(0x0230) #define EXYNOS5_AUTO_WDTRESET_DISABLE S5P_PMUREG(0x0408) diff --git a/arch/arm/mach-exynos/mach-exynos4-dt.c b/arch/arm/mach-exynos/mach-exynos4-dt.c index e58d786faf78..eadf4b59e7d2 100644 --- a/arch/arm/mach-exynos/mach-exynos4-dt.c +++ b/arch/arm/mach-exynos/mach-exynos4-dt.c @@ -99,6 +99,7 @@ static char const *exynos4_dt_compat[] __initdata = { DT_MACHINE_START(EXYNOS4210_DT, "Samsung Exynos4 (Flattened Device Tree)") /* Maintainer: Thomas Abraham <thomas.abraham@linaro.org> */ + .smp = smp_ops(exynos_smp_ops), .init_irq = exynos4_init_irq, .map_io = exynos4_dt_map_io, .handle_irq = gic_handle_irq, diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c b/arch/arm/mach-exynos/mach-exynos5-dt.c index db1cd8eacf28..f906f599a141 100644 --- a/arch/arm/mach-exynos/mach-exynos5-dt.c +++ b/arch/arm/mach-exynos/mach-exynos5-dt.c @@ -11,10 +11,12 @@ #include <linux/of_platform.h> #include <linux/serial_core.h> +#include <linux/io.h> #include <asm/mach/arch.h> #include <asm/hardware/gic.h> #include <mach/map.h> +#include <mach/regs-pmu.h> #include <plat/cpu.h> #include <plat/regs-serial.h> @@ -47,6 +49,10 @@ static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = { "s3c2440-i2c.0", NULL), OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(1), "s3c2440-i2c.1", NULL), + OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(2), + "s3c2440-i2c.2", NULL), + OF_DEV_AUXDATA("samsung,s3c2440-hdmiphy-i2c", EXYNOS5_PA_IIC(8), + "s3c2440-hdmiphy-i2c", NULL), OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI0, "dw_mmc.0", NULL), OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI1, @@ -72,6 +78,10 @@ static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = { "exynos-gsc.2", NULL), OF_DEV_AUXDATA("samsung,exynos5-gsc", EXYNOS5_PA_GSC3, "exynos-gsc.3", NULL), + OF_DEV_AUXDATA("samsung,exynos5-hdmi", 0x14530000, + "exynos5-hdmi", NULL), + OF_DEV_AUXDATA("samsung,exynos5-mixer", 0x14450000, + "exynos5-mixer", NULL), {}, }; @@ -83,6 +93,28 @@ static void __init exynos5250_dt_map_io(void) static void __init exynos5250_dt_machine_init(void) { + struct device_node *i2c_np; + const char *i2c_compat = "samsung,s3c2440-i2c"; + unsigned int tmp; + + /* + * Exynos5's legacy i2c controller and new high speed i2c + * controller have muxed interrupt sources. By default the + * interrupts for 4-channel HS-I2C controller are enabled. + * If node for first four channels of legacy i2c controller + * are available then re-configure the interrupts via the + * system register. + */ + for_each_compatible_node(i2c_np, NULL, i2c_compat) { + if (of_device_is_available(i2c_np)) { + if (of_alias_get_id(i2c_np, "i2c") < 4) { + tmp = readl(EXYNOS5_SYS_I2C_CFG); + writel(tmp & ~(0x1 << of_alias_get_id(i2c_np, "i2c")), + EXYNOS5_SYS_I2C_CFG); + } + } + } + of_platform_populate(NULL, of_default_bus_match_table, exynos5250_auxdata_lookup, NULL); } diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c index c05d7aa84031..94970602df61 100644 --- a/arch/arm/mach-exynos/mach-nuri.c +++ b/arch/arm/mach-exynos/mach-nuri.c @@ -1327,9 +1327,6 @@ static struct platform_device *nuri_devices[] __initdata = { &cam_vdda_fixed_rdev, &cam_8m_12v_fixed_rdev, &exynos4_bus_devfreq, -#ifdef CONFIG_DRM_EXYNOS - &exynos_device_drm, -#endif }; static void __init nuri_map_io(void) diff --git a/arch/arm/mach-exynos/mach-origen.c b/arch/arm/mach-exynos/mach-origen.c index 9adf491674ea..d8dc6d7f0c00 100644 --- a/arch/arm/mach-exynos/mach-origen.c +++ b/arch/arm/mach-exynos/mach-origen.c @@ -709,9 +709,6 @@ static struct platform_device *origen_devices[] __initdata = { &s5p_device_mfc_l, &s5p_device_mfc_r, &s5p_device_mixer, -#ifdef CONFIG_DRM_EXYNOS - &exynos_device_drm, -#endif &exynos4_device_ohci, &origen_device_gpiokeys, &origen_lcd_hv070wsa, diff --git a/arch/arm/mach-exynos/mach-smdk4x12.c b/arch/arm/mach-exynos/mach-smdk4x12.c index 730f1ac65928..17b9ca48722e 100644 --- a/arch/arm/mach-exynos/mach-smdk4x12.c +++ b/arch/arm/mach-exynos/mach-smdk4x12.c @@ -317,9 +317,6 @@ static struct platform_device *smdk4x12_devices[] __initdata = { &s5p_device_mfc, &s5p_device_mfc_l, &s5p_device_mfc_r, -#ifdef CONFIG_DRM_EXYNOS - &exynos_device_drm, -#endif &samsung_device_keypad, }; diff --git a/arch/arm/mach-exynos/mach-smdkv310.c b/arch/arm/mach-exynos/mach-smdkv310.c index ee4fb1a9cb72..4f0ac5397ba3 100644 --- a/arch/arm/mach-exynos/mach-smdkv310.c +++ b/arch/arm/mach-exynos/mach-smdkv310.c @@ -300,9 +300,6 @@ static struct platform_device *smdkv310_devices[] __initdata = { &s5p_device_fimc_md, &s5p_device_g2d, &s5p_device_jpeg, -#ifdef CONFIG_DRM_EXYNOS - &exynos_device_drm, -#endif &exynos4_device_ac97, &exynos4_device_i2s0, &exynos4_device_ohci, diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c index ebc9dd339a38..cfdf876a8626 100644 --- a/arch/arm/mach-exynos/mach-universal_c210.c +++ b/arch/arm/mach-exynos/mach-universal_c210.c @@ -1081,9 +1081,6 @@ static struct platform_device *universal_devices[] __initdata = { &s5p_device_onenand, &s5p_device_fimd0, &s5p_device_jpeg, -#ifdef CONFIG_DRM_EXYNOS - &exynos_device_drm, -#endif &s3c_device_usb_hsotg, &s5p_device_mfc, &s5p_device_mfc_l, diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c index c06c992943a1..8306c5276d1c 100644 --- a/arch/arm/mach-exynos/pm.c +++ b/arch/arm/mach-exynos/pm.c @@ -62,6 +62,10 @@ static struct sleep_save exynos4_vpll_save[] = { SAVE_ITEM(EXYNOS4_VPLL_CON1), }; +static struct sleep_save exynos5_sys_save[] = { + SAVE_ITEM(EXYNOS5_SYS_I2C_CFG), +}; + static struct sleep_save exynos_core_save[] = { /* SROM side */ SAVE_ITEM(S5P_SROM_BW), @@ -98,6 +102,7 @@ static void exynos_pm_prepare(void) s3c_pm_do_save(exynos4_epll_save, ARRAY_SIZE(exynos4_epll_save)); s3c_pm_do_save(exynos4_vpll_save, ARRAY_SIZE(exynos4_vpll_save)); } else { + s3c_pm_do_save(exynos5_sys_save, ARRAY_SIZE(exynos5_sys_save)); /* Disable USE_RETENTION of JPEG_MEM_OPTION */ tmp = __raw_readl(EXYNOS5_JPEG_MEM_OPTION); tmp &= ~EXYNOS5_OPTION_USE_RETENTION; @@ -301,6 +306,10 @@ static void exynos_pm_resume(void) __raw_writel((1 << 28), S5P_PAD_RET_EBIA_OPTION); __raw_writel((1 << 28), S5P_PAD_RET_EBIB_OPTION); + if (soc_is_exynos5250()) + s3c_pm_do_restore(exynos5_sys_save, + ARRAY_SIZE(exynos5_sys_save)); + s3c_pm_do_restore_core(exynos_core_save, ARRAY_SIZE(exynos_core_save)); if (!soc_is_exynos5250()) { diff --git a/arch/arm/mach-highbank/Kconfig b/arch/arm/mach-highbank/Kconfig index 0e1d0a42a3ea..551c97e87a78 100644 --- a/arch/arm/mach-highbank/Kconfig +++ b/arch/arm/mach-highbank/Kconfig @@ -1,5 +1,5 @@ config ARCH_HIGHBANK - bool "Calxeda ECX-1000 (Highbank)" if ARCH_MULTI_V7 + bool "Calxeda ECX-1000/2000 (Highbank/Midway)" if ARCH_MULTI_V7 select ARCH_WANT_OPTIONAL_GPIOLIB select ARM_AMBA select ARM_GIC diff --git a/arch/arm/mach-highbank/Makefile b/arch/arm/mach-highbank/Makefile index 3ec8bdd25d09..8a1ef576d79f 100644 --- a/arch/arm/mach-highbank/Makefile +++ b/arch/arm/mach-highbank/Makefile @@ -3,7 +3,6 @@ obj-y := highbank.o system.o smc.o plus_sec := $(call as-instr,.arch_extension sec,+sec) AFLAGS_smc.o :=-Wa,-march=armv7-a$(plus_sec) -obj-$(CONFIG_DEBUG_HIGHBANK_UART) += lluart.o obj-$(CONFIG_SMP) += platsmp.o obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o obj-$(CONFIG_PM_SLEEP) += pm.o diff --git a/arch/arm/mach-highbank/core.h b/arch/arm/mach-highbank/core.h index 286ec82a4f63..603b536234a2 100644 --- a/arch/arm/mach-highbank/core.h +++ b/arch/arm/mach-highbank/core.h @@ -2,11 +2,6 @@ extern void highbank_set_cpu_jump(int cpu, void *jump_addr); extern void highbank_clocks_init(void); extern void highbank_restart(char, const char *); extern void __iomem *scu_base_addr; -#ifdef CONFIG_DEBUG_HIGHBANK_UART -extern void highbank_lluart_map_io(void); -#else -static inline void highbank_lluart_map_io(void) {} -#endif #ifdef CONFIG_PM_SLEEP extern void highbank_pm_init(void); diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c index 40e36a50304c..dc248167d206 100644 --- a/arch/arm/mach-highbank/highbank.c +++ b/arch/arm/mach-highbank/highbank.c @@ -26,9 +26,9 @@ #include <linux/smp.h> #include <linux/amba/bus.h> +#include <asm/arch_timer.h> #include <asm/cacheflush.h> #include <asm/smp_plat.h> -#include <asm/smp_scu.h> #include <asm/smp_twd.h> #include <asm/hardware/arm_timer.h> #include <asm/hardware/timer-sp.h> @@ -42,16 +42,7 @@ #include "sysregs.h" void __iomem *sregs_base; - -#define HB_SCU_VIRT_BASE 0xfee00000 -void __iomem *scu_base_addr = ((void __iomem *)(HB_SCU_VIRT_BASE)); - -static struct map_desc scu_io_desc __initdata = { - .virtual = HB_SCU_VIRT_BASE, - .pfn = 0, /* run-time */ - .length = SZ_4K, - .type = MT_DEVICE, -}; +void __iomem *scu_base_addr; static void __init highbank_scu_map_io(void) { @@ -60,14 +51,7 @@ static void __init highbank_scu_map_io(void) /* Get SCU base */ asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base)); - scu_io_desc.pfn = __phys_to_pfn(base); - iotable_init(&scu_io_desc, 1); -} - -static void __init highbank_map_io(void) -{ - highbank_scu_map_io(); - highbank_lluart_map_io(); + scu_base_addr = ioremap(base, SZ_4K); } #define HB_JUMP_TABLE_PHYS(cpu) (0x40 + (0x10 * (cpu))) @@ -83,6 +67,7 @@ void highbank_set_cpu_jump(int cpu, void *jump_addr) } const static struct of_device_id irq_match[] = { + { .compatible = "arm,cortex-a15-gic", .data = gic_of_init, }, { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, }, {} }; @@ -99,6 +84,9 @@ static void __init highbank_init_irq(void) { of_irq_init(irq_match); + if (of_find_compatible_node(NULL, NULL, "arm,cortex-a9")) + highbank_scu_map_io(); + #ifdef CONFIG_CACHE_L2X0 /* Enable PL310 L2 Cache controller */ highbank_smc1(0x102, 0x1); @@ -136,6 +124,9 @@ static void __init highbank_timer_init(void) sp804_clockevents_init(timer_base, irq, "timer0"); twd_local_timer_of_register(); + + arch_timer_of_register(); + arch_timer_sched_clock_init(); } static struct sys_timer highbank_timer = { @@ -145,7 +136,6 @@ static struct sys_timer highbank_timer = { static void highbank_power_off(void) { hignbank_set_pwr_shutdown(); - scu_power_mode(scu_base_addr, SCU_PM_POWEROFF); while (1) cpu_do_idle(); @@ -211,12 +201,13 @@ static void __init highbank_init(void) static const char *highbank_match[] __initconst = { "calxeda,highbank", + "calxeda,ecx-2000", NULL, }; DT_MACHINE_START(HIGHBANK, "Highbank") .smp = smp_ops(highbank_smp_ops), - .map_io = highbank_map_io, + .map_io = debug_ll_io_init, .init_irq = highbank_init_irq, .timer = &highbank_timer, .handle_irq = gic_handle_irq, diff --git a/arch/arm/mach-highbank/hotplug.c b/arch/arm/mach-highbank/hotplug.c index 2c1b8c3c8e45..7b60faccd551 100644 --- a/arch/arm/mach-highbank/hotplug.c +++ b/arch/arm/mach-highbank/hotplug.c @@ -14,13 +14,11 @@ * this program. If not, see <http://www.gnu.org/licenses/>. */ #include <linux/kernel.h> -#include <linux/errno.h> -#include <linux/smp.h> -#include <asm/smp_scu.h> #include <asm/cacheflush.h> #include "core.h" +#include "sysregs.h" extern void secondary_startup(void); @@ -33,7 +31,7 @@ void __ref highbank_cpu_die(unsigned int cpu) flush_cache_all(); highbank_set_cpu_jump(cpu, secondary_startup); - scu_power_mode(scu_base_addr, SCU_PM_POWEROFF); + highbank_set_core_pwr(); cpu_do_idle(); diff --git a/arch/arm/mach-highbank/lluart.c b/arch/arm/mach-highbank/lluart.c deleted file mode 100644 index 371575019f33..000000000000 --- a/arch/arm/mach-highbank/lluart.c +++ /dev/null @@ -1,34 +0,0 @@ -/* - * Copyright 2011 Calxeda, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see <http://www.gnu.org/licenses/>. - */ -#include <linux/init.h> -#include <asm/page.h> -#include <asm/sizes.h> -#include <asm/mach/map.h> - -#define HB_DEBUG_LL_PHYS_BASE 0xfff36000 -#define HB_DEBUG_LL_VIRT_BASE 0xfee36000 - -static struct map_desc lluart_io_desc __initdata = { - .virtual = HB_DEBUG_LL_VIRT_BASE, - .pfn = __phys_to_pfn(HB_DEBUG_LL_PHYS_BASE), - .length = SZ_4K, - .type = MT_DEVICE, -}; - -void __init highbank_lluart_map_io(void) -{ - iotable_init(&lluart_io_desc, 1); -} diff --git a/arch/arm/mach-highbank/platsmp.c b/arch/arm/mach-highbank/platsmp.c index fa9560ec6e70..1129957f6c1d 100644 --- a/arch/arm/mach-highbank/platsmp.c +++ b/arch/arm/mach-highbank/platsmp.c @@ -42,9 +42,7 @@ static int __cpuinit highbank_boot_secondary(unsigned int cpu, struct task_struc */ static void __init highbank_smp_init_cpus(void) { - unsigned int i, ncores; - - ncores = scu_get_core_count(scu_base_addr); + unsigned int i, ncores = 4; /* sanity check */ if (ncores > NR_CPUS) { @@ -65,7 +63,8 @@ static void __init highbank_smp_prepare_cpus(unsigned int max_cpus) { int i; - scu_enable(scu_base_addr); + if (scu_base_addr) + scu_enable(scu_base_addr); /* * Write the address of secondary startup into the jump table diff --git a/arch/arm/mach-highbank/pm.c b/arch/arm/mach-highbank/pm.c index de866f21331f..74aa135966f0 100644 --- a/arch/arm/mach-highbank/pm.c +++ b/arch/arm/mach-highbank/pm.c @@ -19,7 +19,6 @@ #include <linux/suspend.h> #include <asm/proc-fns.h> -#include <asm/smp_scu.h> #include <asm/suspend.h> #include "core.h" @@ -35,8 +34,6 @@ static int highbank_pm_enter(suspend_state_t state) { hignbank_set_pwr_suspend(); highbank_set_cpu_jump(0, cpu_resume); - - scu_power_mode(scu_base_addr, SCU_PM_POWEROFF); cpu_suspend(0, highbank_suspend_finish); return 0; diff --git a/arch/arm/mach-highbank/sysregs.h b/arch/arm/mach-highbank/sysregs.h index 0e913389f445..e13e8ea7c6cb 100644 --- a/arch/arm/mach-highbank/sysregs.h +++ b/arch/arm/mach-highbank/sysregs.h @@ -17,6 +17,10 @@ #define _MACH_HIGHBANK__SYSREGS_H_ #include <linux/io.h> +#include <linux/smp.h> +#include <asm/smp_plat.h> +#include <asm/smp_scu.h> +#include "core.h" extern void __iomem *sregs_base; @@ -29,24 +33,39 @@ extern void __iomem *sregs_base; #define HB_PWR_HARD_RESET 2 #define HB_PWR_SHUTDOWN 3 +#define SREG_CPU_PWR_CTRL(c) (0x200 + ((c) * 4)) + +static inline void highbank_set_core_pwr(void) +{ + int cpu = cpu_logical_map(smp_processor_id()); + if (scu_base_addr) + scu_power_mode(scu_base_addr, SCU_PM_POWEROFF); + else + writel_relaxed(1, sregs_base + SREG_CPU_PWR_CTRL(cpu)); +} + static inline void hignbank_set_pwr_suspend(void) { writel(HB_PWR_SUSPEND, sregs_base + HB_SREG_A9_PWR_REQ); + highbank_set_core_pwr(); } static inline void hignbank_set_pwr_shutdown(void) { writel(HB_PWR_SHUTDOWN, sregs_base + HB_SREG_A9_PWR_REQ); + highbank_set_core_pwr(); } static inline void hignbank_set_pwr_soft_reset(void) { writel(HB_PWR_SOFT_RESET, sregs_base + HB_SREG_A9_PWR_REQ); + highbank_set_core_pwr(); } static inline void hignbank_set_pwr_hard_reset(void) { writel(HB_PWR_HARD_RESET, sregs_base + HB_SREG_A9_PWR_REQ); + highbank_set_core_pwr(); } #endif diff --git a/arch/arm/mach-highbank/system.c b/arch/arm/mach-highbank/system.c index 82c27230d4a9..194a5bbb7363 100644 --- a/arch/arm/mach-highbank/system.c +++ b/arch/arm/mach-highbank/system.c @@ -14,7 +14,6 @@ * this program. If not, see <http://www.gnu.org/licenses/>. */ #include <linux/io.h> -#include <asm/smp_scu.h> #include <asm/proc-fns.h> #include "core.h" @@ -27,7 +26,6 @@ void highbank_restart(char mode, const char *cmd) else hignbank_set_pwr_soft_reset(); - scu_power_mode(scu_base_addr, SCU_PM_POWEROFF); cpu_do_idle(); } diff --git a/arch/arm/mach-imx/clk-busy.c b/arch/arm/mach-imx/clk-busy.c index 1a7a8dd045a1..1ab91b5209e6 100644 --- a/arch/arm/mach-imx/clk-busy.c +++ b/arch/arm/mach-imx/clk-busy.c @@ -108,7 +108,7 @@ struct clk *imx_clk_busy_divider(const char *name, const char *parent_name, busy->div.hw.init = &init; clk = clk_register(NULL, &busy->div.hw); - if (!clk) + if (IS_ERR(clk)) kfree(busy); return clk; diff --git a/arch/arm/mach-imx/clk-imx25.c b/arch/arm/mach-imx/clk-imx25.c index d20d4795f4ea..01e2f843bf2e 100644 --- a/arch/arm/mach-imx/clk-imx25.c +++ b/arch/arm/mach-imx/clk-imx25.c @@ -127,8 +127,8 @@ int __init mx25_clocks_init(void) clk[esdhc2_ipg_per] = imx_clk_gate("esdhc2_ipg_per", "per4", ccm(CCM_CGCR0), 4); clk[gpt_ipg_per] = imx_clk_gate("gpt_ipg_per", "per5", ccm(CCM_CGCR0), 5); clk[i2c_ipg_per] = imx_clk_gate("i2c_ipg_per", "per6", ccm(CCM_CGCR0), 6); - clk[lcdc_ipg_per] = imx_clk_gate("lcdc_ipg_per", "per8", ccm(CCM_CGCR0), 7); - clk[nfc_ipg_per] = imx_clk_gate("nfc_ipg_per", "ipg_per", ccm(CCM_CGCR0), 8); + clk[lcdc_ipg_per] = imx_clk_gate("lcdc_ipg_per", "per7", ccm(CCM_CGCR0), 7); + clk[nfc_ipg_per] = imx_clk_gate("nfc_ipg_per", "per8", ccm(CCM_CGCR0), 8); clk[ssi1_ipg_per] = imx_clk_gate("ssi1_ipg_per", "per13", ccm(CCM_CGCR0), 13); clk[ssi2_ipg_per] = imx_clk_gate("ssi2_ipg_per", "per14", ccm(CCM_CGCR0), 14); clk[uart_ipg_per] = imx_clk_gate("uart_ipg_per", "per15", ccm(CCM_CGCR0), 15); diff --git a/arch/arm/mach-imx/clk-imx27.c b/arch/arm/mach-imx/clk-imx27.c index 3b6b640eed24..366e5d59d886 100644 --- a/arch/arm/mach-imx/clk-imx27.c +++ b/arch/arm/mach-imx/clk-imx27.c @@ -109,7 +109,7 @@ int __init mx27_clocks_init(unsigned long fref) clk[per3_div] = imx_clk_divider("per3_div", "mpll_main2", CCM_PCDR1, 16, 6); clk[per4_div] = imx_clk_divider("per4_div", "mpll_main2", CCM_PCDR1, 24, 6); clk[vpu_sel] = imx_clk_mux("vpu_sel", CCM_CSCR, 21, 1, vpu_sel_clks, ARRAY_SIZE(vpu_sel_clks)); - clk[vpu_div] = imx_clk_divider("vpu_div", "vpu_sel", CCM_PCDR0, 10, 3); + clk[vpu_div] = imx_clk_divider("vpu_div", "vpu_sel", CCM_PCDR0, 10, 6); clk[usb_div] = imx_clk_divider("usb_div", "spll", CCM_CSCR, 28, 3); clk[cpu_sel] = imx_clk_mux("cpu_sel", CCM_CSCR, 15, 1, cpu_sel_clks, ARRAY_SIZE(cpu_sel_clks)); clk[clko_sel] = imx_clk_mux("clko_sel", CCM_CCSR, 0, 5, clko_sel_clks, ARRAY_SIZE(clko_sel_clks)); @@ -121,7 +121,7 @@ int __init mx27_clocks_init(unsigned long fref) clk[ssi1_sel] = imx_clk_mux("ssi1_sel", CCM_CSCR, 22, 1, ssi_sel_clks, ARRAY_SIZE(ssi_sel_clks)); clk[ssi2_sel] = imx_clk_mux("ssi2_sel", CCM_CSCR, 23, 1, ssi_sel_clks, ARRAY_SIZE(ssi_sel_clks)); clk[ssi1_div] = imx_clk_divider("ssi1_div", "ssi1_sel", CCM_PCDR0, 16, 6); - clk[ssi2_div] = imx_clk_divider("ssi2_div", "ssi2_sel", CCM_PCDR0, 26, 3); + clk[ssi2_div] = imx_clk_divider("ssi2_div", "ssi2_sel", CCM_PCDR0, 26, 6); clk[clko_en] = imx_clk_gate("clko_en", "clko_div", CCM_PCCR0, 0); clk[ssi2_ipg_gate] = imx_clk_gate("ssi2_ipg_gate", "ipg", CCM_PCCR0, 0); clk[ssi1_ipg_gate] = imx_clk_gate("ssi1_ipg_gate", "ipg", CCM_PCCR0, 1); diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c index 9d2c843bde02..b5deb0554552 100644 --- a/arch/arm/mach-imx/mm-imx3.c +++ b/arch/arm/mach-imx/mm-imx3.c @@ -108,9 +108,8 @@ void __init imx3_init_l2x0(void) } l2x0_base = ioremap(MX3x_L2CC_BASE_ADDR, 4096); - if (IS_ERR(l2x0_base)) { - printk(KERN_ERR "remapping L2 cache area failed with %ld\n", - PTR_ERR(l2x0_base)); + if (!l2x0_base) { + printk(KERN_ERR "remapping L2 cache area failed\n"); return; } diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 2a1a898c7f90..d669e227e00c 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -11,7 +11,6 @@ config ARCH_OMAP2PLUS_TYPICAL select I2C_OMAP select MENELAUS if ARCH_OMAP2 select NEON if ARCH_OMAP3 || ARCH_OMAP4 || SOC_OMAP5 - select PINCTRL select PM_RUNTIME select REGULATOR select SERIAL_OMAP diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c index 388c431c745a..d41ab98890ff 100644 --- a/arch/arm/mach-omap2/board-omap3beagle.c +++ b/arch/arm/mach-omap2/board-omap3beagle.c @@ -24,6 +24,7 @@ #include <linux/input.h> #include <linux/gpio_keys.h> #include <linux/opp.h> +#include <linux/cpu.h> #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h> @@ -444,27 +445,31 @@ static struct omap_board_mux board_mux[] __initdata = { }; #endif -static void __init beagle_opp_init(void) +static int __init beagle_opp_init(void) { int r = 0; - /* Initialize the omap3 opp table */ - if (omap3_opp_init()) { + if (!machine_is_omap3_beagle()) + return 0; + + /* Initialize the omap3 opp table if not already created. */ + r = omap3_opp_init(); + if (IS_ERR_VALUE(r) && (r != -EEXIST)) { pr_err("%s: opp default init failed\n", __func__); - return; + return r; } /* Custom OPP enabled for all xM versions */ if (cpu_is_omap3630()) { struct device *mpu_dev, *iva_dev; - mpu_dev = omap_device_get_by_hwmod_name("mpu"); + mpu_dev = get_cpu_device(0); iva_dev = omap_device_get_by_hwmod_name("iva"); if (IS_ERR(mpu_dev) || IS_ERR(iva_dev)) { pr_err("%s: Aiee.. no mpu/dsp devices? %p %p\n", __func__, mpu_dev, iva_dev); - return; + return -ENODEV; } /* Enable MPU 1GHz and lower opps */ r = opp_enable(mpu_dev, 800000000); @@ -484,8 +489,9 @@ static void __init beagle_opp_init(void) opp_disable(iva_dev, 660000000); } } - return; + return 0; } +device_initcall(beagle_opp_init); static void __init omap3_beagle_init(void) { @@ -522,8 +528,6 @@ static void __init omap3_beagle_init(void) /* Ensure SDRC pins are mux'd for self-refresh */ omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT); omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT); - - beagle_opp_init(); } MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board") diff --git a/arch/arm/mach-omap2/clock33xx_data.c b/arch/arm/mach-omap2/clock33xx_data.c index 114ab4b8e0e3..1a45d6bd2539 100644 --- a/arch/arm/mach-omap2/clock33xx_data.c +++ b/arch/arm/mach-omap2/clock33xx_data.c @@ -1073,6 +1073,8 @@ static struct omap_clk am33xx_clks[] = { CLK(NULL, "gfx_fck_div_ck", &gfx_fck_div_ck, CK_AM33XX), CLK(NULL, "sysclkout_pre_ck", &sysclkout_pre_ck, CK_AM33XX), CLK(NULL, "clkout2_ck", &clkout2_ck, CK_AM33XX), + CLK(NULL, "timer_32k_ck", &clkdiv32k_ick, CK_AM33XX), + CLK(NULL, "timer_sys_ck", &sys_clkin_ck, CK_AM33XX), }; int __init am33xx_clk_init(void) diff --git a/arch/arm/mach-omap2/mux34xx.c b/arch/arm/mach-omap2/mux34xx.c index 17f80e4ab162..c47140bbbec4 100644 --- a/arch/arm/mach-omap2/mux34xx.c +++ b/arch/arm/mach-omap2/mux34xx.c @@ -614,16 +614,16 @@ static struct omap_mux __initdata omap3_muxmodes[] = { "sys_off_mode", NULL, NULL, NULL, "gpio_9", NULL, NULL, "safe_mode"), _OMAP3_MUXENTRY(UART1_CTS, 150, - "uart1_cts", NULL, NULL, NULL, + "uart1_cts", "ssi1_rdy_tx", NULL, NULL, "gpio_150", "hsusb3_tll_clk", NULL, "safe_mode"), _OMAP3_MUXENTRY(UART1_RTS, 149, - "uart1_rts", NULL, NULL, NULL, + "uart1_rts", "ssi1_flag_tx", NULL, NULL, "gpio_149", NULL, NULL, "safe_mode"), _OMAP3_MUXENTRY(UART1_RX, 151, - "uart1_rx", NULL, "mcbsp1_clkr", "mcspi4_clk", + "uart1_rx", "ss1_wake_tx", "mcbsp1_clkr", "mcspi4_clk", "gpio_151", NULL, NULL, "safe_mode"), _OMAP3_MUXENTRY(UART1_TX, 148, - "uart1_tx", NULL, NULL, NULL, + "uart1_tx", "ssi1_dat_tx", NULL, NULL, "gpio_148", NULL, NULL, "safe_mode"), _OMAP3_MUXENTRY(UART2_CTS, 144, "uart2_cts", "mcbsp3_dx", "gpt9_pwm_evt", NULL, diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h index 686137d164da..67d66131cfa7 100644 --- a/arch/arm/mach-omap2/pm.h +++ b/arch/arm/mach-omap2/pm.h @@ -91,6 +91,7 @@ extern void omap3_save_scratchpad_contents(void); #define PM_RTA_ERRATUM_i608 (1 << 0) #define PM_SDRC_WAKEUP_ERRATUM_i583 (1 << 1) +#define PM_PER_MEMORIES_ERRATUM_i582 (1 << 2) #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) extern u16 pm34xx_errata; diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index ba670db1fd37..3a904de4313e 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -652,14 +652,17 @@ static void __init pm_errata_configure(void) /* Enable the l2 cache toggling in sleep logic */ enable_omap3630_toggle_l2_on_restore(); if (omap_rev() < OMAP3630_REV_ES1_2) - pm34xx_errata |= PM_SDRC_WAKEUP_ERRATUM_i583; + pm34xx_errata |= (PM_SDRC_WAKEUP_ERRATUM_i583 | + PM_PER_MEMORIES_ERRATUM_i582); + } else if (cpu_is_omap34xx()) { + pm34xx_errata |= PM_PER_MEMORIES_ERRATUM_i582; } } int __init omap3_pm_init(void) { struct power_state *pwrst, *tmp; - struct clockdomain *neon_clkdm, *mpu_clkdm; + struct clockdomain *neon_clkdm, *mpu_clkdm, *per_clkdm, *wkup_clkdm; int ret; if (!omap3_has_io_chain_ctrl()) @@ -711,6 +714,8 @@ int __init omap3_pm_init(void) neon_clkdm = clkdm_lookup("neon_clkdm"); mpu_clkdm = clkdm_lookup("mpu_clkdm"); + per_clkdm = clkdm_lookup("per_clkdm"); + wkup_clkdm = clkdm_lookup("wkup_clkdm"); #ifdef CONFIG_SUSPEND omap_pm_suspend = omap3_pm_suspend; @@ -727,6 +732,27 @@ int __init omap3_pm_init(void) if (IS_PM34XX_ERRATUM(PM_RTA_ERRATUM_i608)) omap3630_ctrl_disable_rta(); + /* + * The UART3/4 FIFO and the sidetone memory in McBSP2/3 are + * not correctly reset when the PER powerdomain comes back + * from OFF or OSWR when the CORE powerdomain is kept active. + * See OMAP36xx Erratum i582 "PER Domain reset issue after + * Domain-OFF/OSWR Wakeup". This wakeup dependency is not a + * complete workaround. The kernel must also prevent the PER + * powerdomain from going to OSWR/OFF while the CORE + * powerdomain is not going to OSWR/OFF. And if PER last + * power state was off while CORE last power state was ON, the + * UART3/4 and McBSP2/3 SIDETONE devices need to run a + * self-test using their loopback tests; if that fails, those + * devices are unusable until the PER/CORE can complete a transition + * from ON to OSWR/OFF and then back to ON. + * + * XXX Technically this workaround is only needed if off-mode + * or OSWR is enabled. + */ + if (IS_PM34XX_ERRATUM(PM_PER_MEMORIES_ERRATUM_i582)) + clkdm_add_wkdep(per_clkdm, wkup_clkdm); + clkdm_add_wkdep(neon_clkdm, mpu_clkdm); if (omap_type() != OMAP2_DEVICE_TYPE_GP) { omap3_secure_ram_storage = diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index 0405c8190803..a507cd6cf4f1 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c @@ -329,6 +329,11 @@ void __init omap_serial_init_port(struct omap_board_data *bdata, oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt); + if (console_uart_id == bdata->id) { + omap_device_enable(pdev); + pm_runtime_set_active(&pdev->dev); + } + oh->dev_attr = uart; if (((cpu_is_omap34xx() || cpu_is_omap44xx()) && bdata->pads) diff --git a/arch/arm/mach-s3c24xx/s3c2416.c b/arch/arm/mach-s3c24xx/s3c2416.c index ed5a95ece9eb..77ee0b732237 100644 --- a/arch/arm/mach-s3c24xx/s3c2416.c +++ b/arch/arm/mach-s3c24xx/s3c2416.c @@ -61,6 +61,7 @@ #include <plat/nand-core.h> #include <plat/adc-core.h> #include <plat/rtc-core.h> +#include <plat/spi-core.h> static struct map_desc s3c2416_iodesc[] __initdata = { IODESC_ENT(WATCHDOG), @@ -132,6 +133,7 @@ void __init s3c2416_map_io(void) /* initialize device information early */ s3c2416_default_sdhci0(); s3c2416_default_sdhci1(); + s3c64xx_spi_setname("s3c2443-spi"); iotable_init(s3c2416_iodesc, ARRAY_SIZE(s3c2416_iodesc)); } diff --git a/arch/arm/mach-s3c24xx/s3c2443.c b/arch/arm/mach-s3c24xx/s3c2443.c index ab648ad8fa50..165b6a6b3daa 100644 --- a/arch/arm/mach-s3c24xx/s3c2443.c +++ b/arch/arm/mach-s3c24xx/s3c2443.c @@ -43,6 +43,7 @@ #include <plat/nand-core.h> #include <plat/adc-core.h> #include <plat/rtc-core.h> +#include <plat/spi-core.h> static struct map_desc s3c2443_iodesc[] __initdata = { IODESC_ENT(WATCHDOG), @@ -100,6 +101,9 @@ void __init s3c2443_map_io(void) s3c24xx_gpiocfg_default.set_pull = s3c2443_gpio_setpull; s3c24xx_gpiocfg_default.get_pull = s3c2443_gpio_getpull; + /* initialize device information early */ + s3c64xx_spi_setname("s3c2443-spi"); + iotable_init(s3c2443_iodesc, ARRAY_SIZE(s3c2443_iodesc)); } diff --git a/arch/arm/mach-s5p64x0/common.c b/arch/arm/mach-s5p64x0/common.c index 6e6a0a9d6778..111e404a81fd 100644 --- a/arch/arm/mach-s5p64x0/common.c +++ b/arch/arm/mach-s5p64x0/common.c @@ -44,6 +44,7 @@ #include <plat/sdhci.h> #include <plat/adc-core.h> #include <plat/fb-core.h> +#include <plat/spi-core.h> #include <plat/gpio-cfg.h> #include <plat/regs-irqtype.h> #include <plat/regs-serial.h> @@ -179,6 +180,7 @@ void __init s5p6440_map_io(void) /* initialize any device information early */ s3c_adc_setname("s3c64xx-adc"); s3c_fb_setname("s5p64x0-fb"); + s3c64xx_spi_setname("s5p64x0-spi"); s5p64x0_default_sdhci0(); s5p64x0_default_sdhci1(); @@ -193,6 +195,7 @@ void __init s5p6450_map_io(void) /* initialize any device information early */ s3c_adc_setname("s3c64xx-adc"); s3c_fb_setname("s5p64x0-fb"); + s3c64xx_spi_setname("s5p64x0-spi"); s5p64x0_default_sdhci0(); s5p64x0_default_sdhci1(); diff --git a/arch/arm/mach-s5pc100/common.c b/arch/arm/mach-s5pc100/common.c index 621908658861..cc6e561c9958 100644 --- a/arch/arm/mach-s5pc100/common.c +++ b/arch/arm/mach-s5pc100/common.c @@ -45,6 +45,7 @@ #include <plat/fb-core.h> #include <plat/iic-core.h> #include <plat/onenand-core.h> +#include <plat/spi-core.h> #include <plat/regs-serial.h> #include <plat/watchdog-reset.h> @@ -165,6 +166,8 @@ void __init s5pc100_map_io(void) s3c_onenand_setname("s5pc100-onenand"); s3c_fb_setname("s5pc100-fb"); s3c_cfcon_setname("s5pc100-pata"); + + s3c64xx_spi_setname("s5pc100-spi"); } void __init s5pc100_init_clocks(int xtal) diff --git a/arch/arm/mach-s5pv210/common.c b/arch/arm/mach-s5pv210/common.c index 4c9e9027df9a..a0c50efe8145 100644 --- a/arch/arm/mach-s5pv210/common.c +++ b/arch/arm/mach-s5pv210/common.c @@ -43,6 +43,7 @@ #include <plat/iic-core.h> #include <plat/keypad-core.h> #include <plat/tv-core.h> +#include <plat/spi-core.h> #include <plat/regs-serial.h> #include "common.h" @@ -196,6 +197,8 @@ void __init s5pv210_map_io(void) /* setup TV devices */ s5p_hdmi_setname("s5pv210-hdmi"); + + s3c64xx_spi_setname("s5pv210-spi"); } void __init s5pv210_init_clocks(int xtal) diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig index 8ae100cc655c..9255546e7bf6 100644 --- a/arch/arm/mach-shmobile/Kconfig +++ b/arch/arm/mach-shmobile/Kconfig @@ -2,18 +2,6 @@ if ARCH_SHMOBILE comment "SH-Mobile System Type" -config ARCH_SH7367 - bool "SH-Mobile G3 (SH7367)" - select ARCH_WANT_OPTIONAL_GPIOLIB - select CPU_V6 - select SH_CLK_CPG - -config ARCH_SH7377 - bool "SH-Mobile G4 (SH7377)" - select ARCH_WANT_OPTIONAL_GPIOLIB - select CPU_V7 - select SH_CLK_CPG - config ARCH_SH7372 bool "SH-Mobile AP4 (SH7372)" select ARCH_WANT_OPTIONAL_GPIOLIB @@ -41,6 +29,8 @@ config ARCH_R8A7779 select ARM_GIC select CPU_V7 select SH_CLK_CPG + select USB_ARCH_HAS_EHCI + select USB_ARCH_HAS_OHCI config ARCH_EMEV2 bool "Emma Mobile EV2" @@ -50,17 +40,6 @@ config ARCH_EMEV2 comment "SH-Mobile Board Type" -config MACH_G3EVM - bool "G3EVM board" - depends on ARCH_SH7367 - select ARCH_REQUIRE_GPIOLIB - -config MACH_G4EVM - bool "G4EVM board" - depends on ARCH_SH7377 - select ARCH_REQUIRE_GPIOLIB - select REGULATOR_FIXED_VOLTAGE if REGULATOR - config MACH_AP4EVB bool "AP4EVB board" depends on ARCH_SH7372 @@ -95,6 +74,7 @@ config MACH_MACKEREL select ARCH_REQUIRE_GPIOLIB select REGULATOR_FIXED_VOLTAGE if REGULATOR select SND_SOC_AK4642 if SND_SIMPLE_CARD + select USE_OF config MACH_KOTA2 bool "KOTA2 board" @@ -146,8 +126,7 @@ menu "Memory configuration" config MEMORY_START hex "Physical memory start address" - default "0x50000000" if MACH_G3EVM - default "0x40000000" if MACH_G4EVM || MACH_AP4EVB || MACH_AG5EVM || \ + default "0x40000000" if MACH_AP4EVB || MACH_AG5EVM || \ MACH_MACKEREL || MACH_BONITO || \ MACH_ARMADILLO800EVA default "0x41000000" if MACH_KOTA2 @@ -159,8 +138,6 @@ config MEMORY_START config MEMORY_SIZE hex "Physical memory size" - default "0x08000000" if MACH_G3EVM - default "0x08000000" if MACH_G4EVM default "0x20000000" if MACH_AG5EVM || MACH_BONITO || \ MACH_ARMADILLO800EVA default "0x1e000000" if MACH_KOTA2 diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile index fe2c97c179d1..0b7147928aa3 100644 --- a/arch/arm/mach-shmobile/Makefile +++ b/arch/arm/mach-shmobile/Makefile @@ -6,8 +6,6 @@ obj-y := timer.o console.o clock.o # CPU objects -obj-$(CONFIG_ARCH_SH7367) += setup-sh7367.o clock-sh7367.o intc-sh7367.o -obj-$(CONFIG_ARCH_SH7377) += setup-sh7377.o clock-sh7377.o intc-sh7377.o obj-$(CONFIG_ARCH_SH7372) += setup-sh7372.o clock-sh7372.o intc-sh7372.o obj-$(CONFIG_ARCH_SH73A0) += setup-sh73a0.o clock-sh73a0.o intc-sh73a0.o obj-$(CONFIG_ARCH_R8A7740) += setup-r8a7740.o clock-r8a7740.o intc-r8a7740.o @@ -23,16 +21,12 @@ smp-$(CONFIG_ARCH_EMEV2) += smp-emev2.o # Pinmux setup pfc-y := -pfc-$(CONFIG_ARCH_SH7367) += pfc-sh7367.o -pfc-$(CONFIG_ARCH_SH7377) += pfc-sh7377.o pfc-$(CONFIG_ARCH_SH7372) += pfc-sh7372.o pfc-$(CONFIG_ARCH_SH73A0) += pfc-sh73a0.o pfc-$(CONFIG_ARCH_R8A7740) += pfc-r8a7740.o pfc-$(CONFIG_ARCH_R8A7779) += pfc-r8a7779.o # IRQ objects -obj-$(CONFIG_ARCH_SH7367) += entry-intc.o -obj-$(CONFIG_ARCH_SH7377) += entry-intc.o obj-$(CONFIG_ARCH_SH7372) += entry-intc.o obj-$(CONFIG_ARCH_R8A7740) += entry-intc.o @@ -45,8 +39,6 @@ obj-$(CONFIG_ARCH_R8A7740) += pm-r8a7740.o obj-$(CONFIG_ARCH_R8A7779) += pm-r8a7779.o # Board objects -obj-$(CONFIG_MACH_G3EVM) += board-g3evm.o -obj-$(CONFIG_MACH_G4EVM) += board-g4evm.o obj-$(CONFIG_MACH_AP4EVB) += board-ap4evb.o obj-$(CONFIG_MACH_AG5EVM) += board-ag5evm.o obj-$(CONFIG_MACH_MACKEREL) += board-mackerel.o diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c index 790dc68c4312..40657854e3ad 100644 --- a/arch/arm/mach-shmobile/board-ap4evb.c +++ b/arch/arm/mach-shmobile/board-ap4evb.c @@ -658,133 +658,16 @@ static struct platform_device lcdc_device = { /* FSI */ #define IRQ_FSI evt2irq(0x1840) -static int __fsi_set_rate(struct clk *clk, long rate, int enable) -{ - int ret = 0; - - if (rate <= 0) - return ret; - - if (enable) { - ret = clk_set_rate(clk, rate); - if (0 == ret) - ret = clk_enable(clk); - } else { - clk_disable(clk); - } - - return ret; -} - -static int __fsi_set_round_rate(struct clk *clk, long rate, int enable) -{ - return __fsi_set_rate(clk, clk_round_rate(clk, rate), enable); -} - -static int fsi_ak4642_set_rate(struct device *dev, int rate, int enable) -{ - struct clk *fsia_ick; - struct clk *fsiack; - int ret = -EIO; - - fsia_ick = clk_get(dev, "icka"); - if (IS_ERR(fsia_ick)) - return PTR_ERR(fsia_ick); - - /* - * FSIACK is connected to AK4642, - * and use external clock pin from it. - * it is parent of fsia_ick now. - */ - fsiack = clk_get_parent(fsia_ick); - if (!fsiack) - goto fsia_ick_out; - - /* - * we get 1/1 divided clock by setting same rate to fsiack and fsia_ick - * - ** FIXME ** - * Because the freq_table of external clk (fsiack) are all 0, - * the return value of clk_round_rate became 0. - * So, it use __fsi_set_rate here. - */ - ret = __fsi_set_rate(fsiack, rate, enable); - if (ret < 0) - goto fsiack_out; - - ret = __fsi_set_round_rate(fsia_ick, rate, enable); - if ((ret < 0) && enable) - __fsi_set_round_rate(fsiack, rate, 0); /* disable FSI ACK */ - -fsiack_out: - clk_put(fsiack); - -fsia_ick_out: - clk_put(fsia_ick); - - return 0; -} - -static int fsi_hdmi_set_rate(struct device *dev, int rate, int enable) -{ - struct clk *fsib_clk; - struct clk *fdiv_clk = &sh7372_fsidivb_clk; - long fsib_rate = 0; - long fdiv_rate = 0; - int ackmd_bpfmd; - int ret; - - switch (rate) { - case 44100: - fsib_rate = rate * 256; - ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64; - break; - case 48000: - fsib_rate = 85428000; /* around 48kHz x 256 x 7 */ - fdiv_rate = rate * 256; - ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64; - break; - default: - pr_err("unsupported rate in FSI2 port B\n"); - return -EINVAL; - } - - /* FSI B setting */ - fsib_clk = clk_get(dev, "ickb"); - if (IS_ERR(fsib_clk)) - return -EIO; - - ret = __fsi_set_round_rate(fsib_clk, fsib_rate, enable); - if (ret < 0) - goto fsi_set_rate_end; - - /* FSI DIV setting */ - ret = __fsi_set_round_rate(fdiv_clk, fdiv_rate, enable); - if (ret < 0) { - /* disable FSI B */ - if (enable) - __fsi_set_round_rate(fsib_clk, fsib_rate, 0); - goto fsi_set_rate_end; - } - - ret = ackmd_bpfmd; - -fsi_set_rate_end: - clk_put(fsib_clk); - return ret; -} - static struct sh_fsi_platform_info fsi_info = { .port_a = { .flags = SH_FSI_BRS_INV, - .set_rate = fsi_ak4642_set_rate, }, .port_b = { .flags = SH_FSI_BRS_INV | SH_FSI_BRM_INV | SH_FSI_LRS_INV | + SH_FSI_CLK_CPG | SH_FSI_FMT_SPDIF, - .set_rate = fsi_hdmi_set_rate, }, }; @@ -1144,25 +1027,6 @@ out: clk_put(hdmi_ick); } -static void __init fsi_init_pm_clock(void) -{ - struct clk *fsia_ick; - int ret; - - fsia_ick = clk_get(&fsi_device.dev, "icka"); - if (IS_ERR(fsia_ick)) { - ret = PTR_ERR(fsia_ick); - pr_err("Cannot get FSI ICK: %d\n", ret); - return; - } - - ret = clk_set_parent(fsia_ick, &sh7372_fsiack_clk); - if (ret < 0) - pr_err("Cannot set FSI-A parent: %d\n", ret); - - clk_put(fsia_ick); -} - /* TouchScreen */ #ifdef CONFIG_AP4EVB_QHD # define GPIO_TSC_IRQ GPIO_FN_IRQ28_123 @@ -1476,7 +1340,6 @@ static void __init ap4evb_init(void) ARRAY_SIZE(domain_devices)); hdmi_init_pm_clock(); - fsi_init_pm_clock(); sh7372_pm_init(); pm_clk_add(&fsi_device.dev, "spu2"); pm_clk_add(&lcdc1_device.dev, "hdmi"); diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c index 3cc8b1c21da9..5353adf6b828 100644 --- a/arch/arm/mach-shmobile/board-armadillo800eva.c +++ b/arch/arm/mach-shmobile/board-armadillo800eva.c @@ -768,32 +768,6 @@ static struct platform_device ceu0_device = { }; /* FSI */ -static int fsi_hdmi_set_rate(struct device *dev, int rate, int enable) -{ - struct clk *fsib; - int ret; - - /* it support 48KHz only */ - if (48000 != rate) - return -EINVAL; - - fsib = clk_get(dev, "ickb"); - if (IS_ERR(fsib)) - return -EINVAL; - - if (enable) { - ret = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64; - clk_enable(fsib); - } else { - ret = 0; - clk_disable(fsib); - } - - clk_put(fsib); - - return ret; -} - static struct sh_fsi_platform_info fsi_info = { /* FSI-WM8978 */ .port_a = { @@ -802,8 +776,8 @@ static struct sh_fsi_platform_info fsi_info = { /* FSI-HDMI */ .port_b = { .flags = SH_FSI_FMT_SPDIF | - SH_FSI_ENABLE_STREAM_MODE, - .set_rate = fsi_hdmi_set_rate, + SH_FSI_ENABLE_STREAM_MODE | + SH_FSI_CLK_CPG, .tx_id = SHDMA_SLAVE_FSIB_TX, } }; @@ -938,13 +912,11 @@ static void __init eva_clock_init(void) struct clk *xtal1 = clk_get(NULL, "extal1"); struct clk *usb24s = clk_get(NULL, "usb24s"); struct clk *fsibck = clk_get(NULL, "fsibck"); - struct clk *fsib = clk_get(&fsi_device.dev, "ickb"); if (IS_ERR(system) || IS_ERR(xtal1) || IS_ERR(usb24s) || - IS_ERR(fsibck) || - IS_ERR(fsib)) { + IS_ERR(fsibck)) { pr_err("armadillo800eva board clock init failed\n"); goto clock_error; } @@ -956,9 +928,7 @@ static void __init eva_clock_init(void) clk_set_parent(usb24s, system); /* FSIBCK is 12.288MHz, and it is parent of FSI-B */ - clk_set_parent(fsib, fsibck); clk_set_rate(fsibck, 12288000); - clk_set_rate(fsib, 12288000); clock_error: if (!IS_ERR(system)) @@ -969,8 +939,6 @@ clock_error: clk_put(usb24s); if (!IS_ERR(fsibck)) clk_put(fsibck); - if (!IS_ERR(fsib)) - clk_put(fsib); } /* @@ -1229,6 +1197,13 @@ static void __init eva_add_early_devices(void) shmobile_timer.init = eva_earlytimer_init; } +#define RESCNT2 IOMEM(0xe6188020) +static void eva_restart(char mode, const char *cmd) +{ + /* Do soft power on reset */ + writel((1 << 31), RESCNT2); +} + static const char *eva_boards_compat_dt[] __initdata = { "renesas,armadillo800eva", NULL, @@ -1243,4 +1218,5 @@ DT_MACHINE_START(ARMADILLO800EVA_DT, "armadillo800eva") .init_late = shmobile_init_late, .timer = &shmobile_timer, .dt_compat = eva_boards_compat_dt, + .restart = eva_restart, MACHINE_END diff --git a/arch/arm/mach-shmobile/board-g3evm.c b/arch/arm/mach-shmobile/board-g3evm.c deleted file mode 100644 index b179d4c213bb..000000000000 --- a/arch/arm/mach-shmobile/board-g3evm.c +++ /dev/null @@ -1,343 +0,0 @@ -/* - * G3EVM board support - * - * Copyright (C) 2010 Magnus Damm - * Copyright (C) 2008 Yoshihiro Shimoda - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/interrupt.h> -#include <linux/irq.h> -#include <linux/platform_device.h> -#include <linux/delay.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/mtd/physmap.h> -#include <linux/mtd/sh_flctl.h> -#include <linux/usb/r8a66597.h> -#include <linux/io.h> -#include <linux/gpio.h> -#include <linux/input.h> -#include <linux/input/sh_keysc.h> -#include <linux/dma-mapping.h> -#include <mach/irqs.h> -#include <mach/sh7367.h> -#include <mach/common.h> -#include <asm/mach-types.h> -#include <asm/mach/arch.h> - -/* - * IrDA - * - * S67: 5bit : ON power - * : 6bit : ON remote control - * OFF IrDA - */ - -static struct mtd_partition nor_flash_partitions[] = { - { - .name = "loader", - .offset = 0x00000000, - .size = 512 * 1024, - }, - { - .name = "bootenv", - .offset = MTDPART_OFS_APPEND, - .size = 512 * 1024, - }, - { - .name = "kernel_ro", - .offset = MTDPART_OFS_APPEND, - .size = 8 * 1024 * 1024, - .mask_flags = MTD_WRITEABLE, - }, - { - .name = "kernel", - .offset = MTDPART_OFS_APPEND, - .size = 8 * 1024 * 1024, - }, - { - .name = "data", - .offset = MTDPART_OFS_APPEND, - .size = MTDPART_SIZ_FULL, - }, -}; - -static struct physmap_flash_data nor_flash_data = { - .width = 2, - .parts = nor_flash_partitions, - .nr_parts = ARRAY_SIZE(nor_flash_partitions), -}; - -static struct resource nor_flash_resources[] = { - [0] = { - .start = 0x00000000, - .end = 0x08000000 - 1, - .flags = IORESOURCE_MEM, - } -}; - -static struct platform_device nor_flash_device = { - .name = "physmap-flash", - .dev = { - .platform_data = &nor_flash_data, - }, - .num_resources = ARRAY_SIZE(nor_flash_resources), - .resource = nor_flash_resources, -}; - -/* USBHS */ -static void usb_host_port_power(int port, int power) -{ - if (!power) /* only power-on supported for now */ - return; - - /* set VBOUT/PWEN and EXTLP0 in DVSTCTR */ - __raw_writew(__raw_readw(IOMEM(0xe6890008)) | 0x600, IOMEM(0xe6890008)); -} - -static struct r8a66597_platdata usb_host_data = { - .on_chip = 1, - .port_power = usb_host_port_power, -}; - -static struct resource usb_host_resources[] = { - [0] = { - .name = "USBHS", - .start = 0xe6890000, - .end = 0xe68900e5, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = evt2irq(0xa20), /* USBHS_USHI0 */ - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device usb_host_device = { - .name = "r8a66597_hcd", - .id = 0, - .dev = { - .platform_data = &usb_host_data, - .dma_mask = NULL, - .coherent_dma_mask = 0xffffffff, - }, - .num_resources = ARRAY_SIZE(usb_host_resources), - .resource = usb_host_resources, -}; - -/* KEYSC */ -static struct sh_keysc_info keysc_info = { - .mode = SH_KEYSC_MODE_5, - .scan_timing = 3, - .delay = 100, - .keycodes = { - KEY_A, KEY_B, KEY_C, KEY_D, KEY_E, KEY_F, KEY_G, - KEY_H, KEY_I, KEY_J, KEY_K, KEY_L, KEY_M, KEY_N, - KEY_O, KEY_P, KEY_Q, KEY_R, KEY_S, KEY_T, KEY_U, - KEY_V, KEY_W, KEY_X, KEY_Y, KEY_Z, KEY_HOME, KEY_SLEEP, - KEY_WAKEUP, KEY_COFFEE, KEY_0, KEY_1, KEY_2, KEY_3, KEY_4, - KEY_5, KEY_6, KEY_7, KEY_8, KEY_9, KEY_STOP, KEY_COMPUTER, - }, -}; - -static struct resource keysc_resources[] = { - [0] = { - .name = "KEYSC", - .start = 0xe61b0000, - .end = 0xe61b000f, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = evt2irq(0xbe0), /* KEYSC_KEY */ - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device keysc_device = { - .name = "sh_keysc", - .num_resources = ARRAY_SIZE(keysc_resources), - .resource = keysc_resources, - .dev = { - .platform_data = &keysc_info, - }, -}; - -static struct mtd_partition nand_partition_info[] = { - { - .name = "system", - .offset = 0, - .size = 64 * 1024 * 1024, - }, - { - .name = "userdata", - .offset = MTDPART_OFS_APPEND, - .size = 128 * 1024 * 1024, - }, - { - .name = "cache", - .offset = MTDPART_OFS_APPEND, - .size = 64 * 1024 * 1024, - }, -}; - -static struct resource nand_flash_resources[] = { - [0] = { - .start = 0xe6a30000, - .end = 0xe6a3009b, - .flags = IORESOURCE_MEM, - } -}; - -static struct sh_flctl_platform_data nand_flash_data = { - .parts = nand_partition_info, - .nr_parts = ARRAY_SIZE(nand_partition_info), - .flcmncr_val = QTSEL_E | FCKSEL_E | TYPESEL_SET | NANWF_E - | SHBUSSEL | SEL_16BIT, -}; - -static struct platform_device nand_flash_device = { - .name = "sh_flctl", - .resource = nand_flash_resources, - .num_resources = ARRAY_SIZE(nand_flash_resources), - .dev = { - .platform_data = &nand_flash_data, - }, -}; - -static struct resource irda_resources[] = { - [0] = { - .start = 0xE6D00000, - .end = 0xE6D01FD4 - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = evt2irq(0x480), /* IRDA */ - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device irda_device = { - .name = "sh_irda", - .id = -1, - .resource = irda_resources, - .num_resources = ARRAY_SIZE(irda_resources), -}; - -static struct platform_device *g3evm_devices[] __initdata = { - &nor_flash_device, - &usb_host_device, - &keysc_device, - &nand_flash_device, - &irda_device, -}; - -static void __init g3evm_init(void) -{ - sh7367_pinmux_init(); - - /* Lit DS4 LED */ - gpio_request(GPIO_PORT22, NULL); - gpio_direction_output(GPIO_PORT22, 1); - gpio_export(GPIO_PORT22, 0); - - /* Lit DS8 LED */ - gpio_request(GPIO_PORT23, NULL); - gpio_direction_output(GPIO_PORT23, 1); - gpio_export(GPIO_PORT23, 0); - - /* Lit DS3 LED */ - gpio_request(GPIO_PORT24, NULL); - gpio_direction_output(GPIO_PORT24, 1); - gpio_export(GPIO_PORT24, 0); - - /* SCIFA1 */ - gpio_request(GPIO_FN_SCIFA1_TXD, NULL); - gpio_request(GPIO_FN_SCIFA1_RXD, NULL); - gpio_request(GPIO_FN_SCIFA1_CTS, NULL); - gpio_request(GPIO_FN_SCIFA1_RTS, NULL); - - /* USBHS */ - gpio_request(GPIO_FN_VBUS0, NULL); - gpio_request(GPIO_FN_PWEN, NULL); - gpio_request(GPIO_FN_OVCN, NULL); - gpio_request(GPIO_FN_OVCN2, NULL); - gpio_request(GPIO_FN_EXTLP, NULL); - gpio_request(GPIO_FN_IDIN, NULL); - - /* setup USB phy */ - __raw_writew(0x0300, IOMEM(0xe605810a)); /* USBCR1 */ - __raw_writew(0x00e0, IOMEM(0xe60581c0)); /* CPFCH */ - __raw_writew(0x6010, IOMEM(0xe60581c6)); /* CGPOSR */ - __raw_writew(0x8a0a, IOMEM(0xe605810c)); /* USBCR2 */ - - /* KEYSC @ CN7 */ - gpio_request(GPIO_FN_PORT42_KEYOUT0, NULL); - gpio_request(GPIO_FN_PORT43_KEYOUT1, NULL); - gpio_request(GPIO_FN_PORT44_KEYOUT2, NULL); - gpio_request(GPIO_FN_PORT45_KEYOUT3, NULL); - gpio_request(GPIO_FN_PORT46_KEYOUT4, NULL); - gpio_request(GPIO_FN_PORT47_KEYOUT5, NULL); - gpio_request(GPIO_FN_PORT48_KEYIN0_PU, NULL); - gpio_request(GPIO_FN_PORT49_KEYIN1_PU, NULL); - gpio_request(GPIO_FN_PORT50_KEYIN2_PU, NULL); - gpio_request(GPIO_FN_PORT55_KEYIN3_PU, NULL); - gpio_request(GPIO_FN_PORT56_KEYIN4_PU, NULL); - gpio_request(GPIO_FN_PORT57_KEYIN5_PU, NULL); - gpio_request(GPIO_FN_PORT58_KEYIN6_PU, NULL); - - /* FLCTL */ - gpio_request(GPIO_FN_FCE0, NULL); - gpio_request(GPIO_FN_D0_ED0_NAF0, NULL); - gpio_request(GPIO_FN_D1_ED1_NAF1, NULL); - gpio_request(GPIO_FN_D2_ED2_NAF2, NULL); - gpio_request(GPIO_FN_D3_ED3_NAF3, NULL); - gpio_request(GPIO_FN_D4_ED4_NAF4, NULL); - gpio_request(GPIO_FN_D5_ED5_NAF5, NULL); - gpio_request(GPIO_FN_D6_ED6_NAF6, NULL); - gpio_request(GPIO_FN_D7_ED7_NAF7, NULL); - gpio_request(GPIO_FN_D8_ED8_NAF8, NULL); - gpio_request(GPIO_FN_D9_ED9_NAF9, NULL); - gpio_request(GPIO_FN_D10_ED10_NAF10, NULL); - gpio_request(GPIO_FN_D11_ED11_NAF11, NULL); - gpio_request(GPIO_FN_D12_ED12_NAF12, NULL); - gpio_request(GPIO_FN_D13_ED13_NAF13, NULL); - gpio_request(GPIO_FN_D14_ED14_NAF14, NULL); - gpio_request(GPIO_FN_D15_ED15_NAF15, NULL); - gpio_request(GPIO_FN_WE0_XWR0_FWE, NULL); - gpio_request(GPIO_FN_FRB, NULL); - /* FOE, FCDE, FSC on dedicated pins */ - __raw_writel(__raw_readl(IOMEM(0xe6158048)) & ~(1 << 15), IOMEM(0xe6158048)); - - /* IrDA */ - gpio_request(GPIO_FN_IRDA_OUT, NULL); - gpio_request(GPIO_FN_IRDA_IN, NULL); - gpio_request(GPIO_FN_IRDA_FIRSEL, NULL); - - sh7367_add_standard_devices(); - - platform_add_devices(g3evm_devices, ARRAY_SIZE(g3evm_devices)); -} - -MACHINE_START(G3EVM, "g3evm") - .map_io = sh7367_map_io, - .init_early = sh7367_add_early_devices, - .init_irq = sh7367_init_irq, - .handle_irq = shmobile_handle_irq_intc, - .init_machine = g3evm_init, - .init_late = shmobile_init_late, - .timer = &shmobile_timer, -MACHINE_END diff --git a/arch/arm/mach-shmobile/board-g4evm.c b/arch/arm/mach-shmobile/board-g4evm.c deleted file mode 100644 index 35c126caa4d8..000000000000 --- a/arch/arm/mach-shmobile/board-g4evm.c +++ /dev/null @@ -1,384 +0,0 @@ -/* - * G4EVM board support - * - * Copyright (C) 2010 Magnus Damm - * Copyright (C) 2008 Yoshihiro Shimoda - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/interrupt.h> -#include <linux/irq.h> -#include <linux/platform_device.h> -#include <linux/delay.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/mtd/physmap.h> -#include <linux/regulator/fixed.h> -#include <linux/regulator/machine.h> -#include <linux/usb/r8a66597.h> -#include <linux/io.h> -#include <linux/input.h> -#include <linux/input/sh_keysc.h> -#include <linux/mmc/host.h> -#include <linux/mmc/sh_mobile_sdhi.h> -#include <linux/gpio.h> -#include <linux/dma-mapping.h> -#include <mach/irqs.h> -#include <mach/sh7377.h> -#include <mach/common.h> -#include <asm/mach-types.h> -#include <asm/mach/arch.h> - -#include "sh-gpio.h" - -/* - * SDHI - * - * SDHI0 : card detection is possible - * SDHI1 : card detection is impossible - * - * [G4-MAIN-BOARD] - * JP74 : short # DBG_2V8A for SDHI0 - * JP75 : NC # DBG_3V3A for SDHI0 - * JP76 : NC # DBG_3V3A_SD for SDHI0 - * JP77 : NC # 3V3A_SDIO for SDHI1 - * JP78 : short # DBG_2V8A for SDHI1 - * JP79 : NC # DBG_3V3A for SDHI1 - * JP80 : NC # DBG_3V3A_SD for SDHI1 - * - * [G4-CORE-BOARD] - * S32 : all off # to dissever from G3-CORE_DBG board - * S33 : all off # to dissever from G3-CORE_DBG board - * - * [G3-CORE_DBG-BOARD] - * S1 : all off # to dissever from G3-CORE_DBG board - * S3 : all off # to dissever from G3-CORE_DBG board - * S4 : all off # to dissever from G3-CORE_DBG board - */ - -static struct mtd_partition nor_flash_partitions[] = { - { - .name = "loader", - .offset = 0x00000000, - .size = 512 * 1024, - }, - { - .name = "bootenv", - .offset = MTDPART_OFS_APPEND, - .size = 512 * 1024, - }, - { - .name = "kernel_ro", - .offset = MTDPART_OFS_APPEND, - .size = 8 * 1024 * 1024, - .mask_flags = MTD_WRITEABLE, - }, - { - .name = "kernel", - .offset = MTDPART_OFS_APPEND, - .size = 8 * 1024 * 1024, - }, - { - .name = "data", - .offset = MTDPART_OFS_APPEND, - .size = MTDPART_SIZ_FULL, - }, -}; - -static struct physmap_flash_data nor_flash_data = { - .width = 2, - .parts = nor_flash_partitions, - .nr_parts = ARRAY_SIZE(nor_flash_partitions), -}; - -static struct resource nor_flash_resources[] = { - [0] = { - .start = 0x00000000, - .end = 0x08000000 - 1, - .flags = IORESOURCE_MEM, - } -}; - -static struct platform_device nor_flash_device = { - .name = "physmap-flash", - .dev = { - .platform_data = &nor_flash_data, - }, - .num_resources = ARRAY_SIZE(nor_flash_resources), - .resource = nor_flash_resources, -}; - -/* USBHS */ -static void usb_host_port_power(int port, int power) -{ - if (!power) /* only power-on supported for now */ - return; - - /* set VBOUT/PWEN and EXTLP0 in DVSTCTR */ - __raw_writew(__raw_readw(IOMEM(0xe6890008)) | 0x600, IOMEM(0xe6890008)); -} - -static struct r8a66597_platdata usb_host_data = { - .on_chip = 1, - .port_power = usb_host_port_power, -}; - -static struct resource usb_host_resources[] = { - [0] = { - .name = "USBHS", - .start = 0xe6890000, - .end = 0xe68900e5, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = evt2irq(0x0a20), /* USBHS_USHI0 */ - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device usb_host_device = { - .name = "r8a66597_hcd", - .id = 0, - .dev = { - .platform_data = &usb_host_data, - .dma_mask = NULL, - .coherent_dma_mask = 0xffffffff, - }, - .num_resources = ARRAY_SIZE(usb_host_resources), - .resource = usb_host_resources, -}; - -/* KEYSC */ -static struct sh_keysc_info keysc_info = { - .mode = SH_KEYSC_MODE_5, - .scan_timing = 3, - .delay = 100, - .keycodes = { - KEY_A, KEY_B, KEY_C, KEY_D, KEY_E, KEY_F, - KEY_G, KEY_H, KEY_I, KEY_J, KEY_K, KEY_L, - KEY_M, KEY_N, KEY_U, KEY_P, KEY_Q, KEY_R, - KEY_S, KEY_T, KEY_U, KEY_V, KEY_W, KEY_X, - KEY_Y, KEY_Z, KEY_HOME, KEY_SLEEP, KEY_WAKEUP, KEY_COFFEE, - KEY_0, KEY_1, KEY_2, KEY_3, KEY_4, KEY_5, - KEY_6, KEY_7, KEY_8, KEY_9, KEY_STOP, KEY_COMPUTER, - }, -}; - -static struct resource keysc_resources[] = { - [0] = { - .name = "KEYSC", - .start = 0xe61b0000, - .end = 0xe61b000f, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = evt2irq(0x0be0), /* KEYSC_KEY */ - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device keysc_device = { - .name = "sh_keysc", - .id = 0, /* keysc0 clock */ - .num_resources = ARRAY_SIZE(keysc_resources), - .resource = keysc_resources, - .dev = { - .platform_data = &keysc_info, - }, -}; - -/* Fixed 3.3V regulator to be used by SDHI0 and SDHI1 */ -static struct regulator_consumer_supply fixed3v3_power_consumers[] = -{ - REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"), - REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"), - REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"), - REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"), -}; - -/* SDHI */ -static struct sh_mobile_sdhi_info sdhi0_info = { - .tmio_caps = MMC_CAP_SDIO_IRQ, -}; - -static struct resource sdhi0_resources[] = { - [0] = { - .name = "SDHI0", - .start = 0xe6d50000, - .end = 0xe6d500ff, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = evt2irq(0x0e00), /* SDHI0 */ - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device sdhi0_device = { - .name = "sh_mobile_sdhi", - .num_resources = ARRAY_SIZE(sdhi0_resources), - .resource = sdhi0_resources, - .id = 0, - .dev = { - .platform_data = &sdhi0_info, - }, -}; - -static struct sh_mobile_sdhi_info sdhi1_info = { - .tmio_caps = MMC_CAP_NONREMOVABLE | MMC_CAP_SDIO_IRQ, -}; - -static struct resource sdhi1_resources[] = { - [0] = { - .name = "SDHI1", - .start = 0xe6d60000, - .end = 0xe6d600ff, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = evt2irq(0x0e80), /* SDHI1 */ - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device sdhi1_device = { - .name = "sh_mobile_sdhi", - .num_resources = ARRAY_SIZE(sdhi1_resources), - .resource = sdhi1_resources, - .id = 1, - .dev = { - .platform_data = &sdhi1_info, - }, -}; - -static struct platform_device *g4evm_devices[] __initdata = { - &nor_flash_device, - &usb_host_device, - &keysc_device, - &sdhi0_device, - &sdhi1_device, -}; - -#define GPIO_SDHID0_D0 IOMEM(0xe60520fc) -#define GPIO_SDHID0_D1 IOMEM(0xe60520fd) -#define GPIO_SDHID0_D2 IOMEM(0xe60520fe) -#define GPIO_SDHID0_D3 IOMEM(0xe60520ff) -#define GPIO_SDHICMD0 IOMEM(0xe6052100) - -#define GPIO_SDHID1_D0 IOMEM(0xe6052103) -#define GPIO_SDHID1_D1 IOMEM(0xe6052104) -#define GPIO_SDHID1_D2 IOMEM(0xe6052105) -#define GPIO_SDHID1_D3 IOMEM(0xe6052106) -#define GPIO_SDHICMD1 IOMEM(0xe6052107) - -static void __init g4evm_init(void) -{ - regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers, - ARRAY_SIZE(fixed3v3_power_consumers), 3300000); - - sh7377_pinmux_init(); - - /* Lit DS14 LED */ - gpio_request(GPIO_PORT109, NULL); - gpio_direction_output(GPIO_PORT109, 1); - gpio_export(GPIO_PORT109, 1); - - /* Lit DS15 LED */ - gpio_request(GPIO_PORT110, NULL); - gpio_direction_output(GPIO_PORT110, 1); - gpio_export(GPIO_PORT110, 1); - - /* Lit DS16 LED */ - gpio_request(GPIO_PORT112, NULL); - gpio_direction_output(GPIO_PORT112, 1); - gpio_export(GPIO_PORT112, 1); - - /* Lit DS17 LED */ - gpio_request(GPIO_PORT113, NULL); - gpio_direction_output(GPIO_PORT113, 1); - gpio_export(GPIO_PORT113, 1); - - /* USBHS */ - gpio_request(GPIO_FN_VBUS_0, NULL); - gpio_request(GPIO_FN_PWEN, NULL); - gpio_request(GPIO_FN_OVCN, NULL); - gpio_request(GPIO_FN_OVCN2, NULL); - gpio_request(GPIO_FN_EXTLP, NULL); - gpio_request(GPIO_FN_IDIN, NULL); - - /* setup USB phy */ - __raw_writew(0x0200, IOMEM(0xe605810a)); /* USBCR1 */ - __raw_writew(0x00e0, IOMEM(0xe60581c0)); /* CPFCH */ - __raw_writew(0x6010, IOMEM(0xe60581c6)); /* CGPOSR */ - __raw_writew(0x8a0a, IOMEM(0xe605810c)); /* USBCR2 */ - - /* KEYSC @ CN31 */ - gpio_request(GPIO_FN_PORT60_KEYOUT5, NULL); - gpio_request(GPIO_FN_PORT61_KEYOUT4, NULL); - gpio_request(GPIO_FN_PORT62_KEYOUT3, NULL); - gpio_request(GPIO_FN_PORT63_KEYOUT2, NULL); - gpio_request(GPIO_FN_PORT64_KEYOUT1, NULL); - gpio_request(GPIO_FN_PORT65_KEYOUT0, NULL); - gpio_request(GPIO_FN_PORT66_KEYIN0_PU, NULL); - gpio_request(GPIO_FN_PORT67_KEYIN1_PU, NULL); - gpio_request(GPIO_FN_PORT68_KEYIN2_PU, NULL); - gpio_request(GPIO_FN_PORT69_KEYIN3_PU, NULL); - gpio_request(GPIO_FN_PORT70_KEYIN4_PU, NULL); - gpio_request(GPIO_FN_PORT71_KEYIN5_PU, NULL); - gpio_request(GPIO_FN_PORT72_KEYIN6_PU, NULL); - - /* SDHI0 */ - gpio_request(GPIO_FN_SDHICLK0, NULL); - gpio_request(GPIO_FN_SDHICD0, NULL); - gpio_request(GPIO_FN_SDHID0_0, NULL); - gpio_request(GPIO_FN_SDHID0_1, NULL); - gpio_request(GPIO_FN_SDHID0_2, NULL); - gpio_request(GPIO_FN_SDHID0_3, NULL); - gpio_request(GPIO_FN_SDHICMD0, NULL); - gpio_request(GPIO_FN_SDHIWP0, NULL); - gpio_request_pullup(GPIO_SDHID0_D0); - gpio_request_pullup(GPIO_SDHID0_D1); - gpio_request_pullup(GPIO_SDHID0_D2); - gpio_request_pullup(GPIO_SDHID0_D3); - gpio_request_pullup(GPIO_SDHICMD0); - - /* SDHI1 */ - gpio_request(GPIO_FN_SDHICLK1, NULL); - gpio_request(GPIO_FN_SDHID1_0, NULL); - gpio_request(GPIO_FN_SDHID1_1, NULL); - gpio_request(GPIO_FN_SDHID1_2, NULL); - gpio_request(GPIO_FN_SDHID1_3, NULL); - gpio_request(GPIO_FN_SDHICMD1, NULL); - gpio_request_pullup(GPIO_SDHID1_D0); - gpio_request_pullup(GPIO_SDHID1_D1); - gpio_request_pullup(GPIO_SDHID1_D2); - gpio_request_pullup(GPIO_SDHID1_D3); - gpio_request_pullup(GPIO_SDHICMD1); - - sh7377_add_standard_devices(); - - platform_add_devices(g4evm_devices, ARRAY_SIZE(g4evm_devices)); -} - -MACHINE_START(G4EVM, "g4evm") - .map_io = sh7377_map_io, - .init_early = sh7377_add_early_devices, - .init_irq = sh7377_init_irq, - .handle_irq = shmobile_handle_irq_intc, - .init_machine = g4evm_init, - .init_late = shmobile_init_late, - .timer = &shmobile_timer, -MACHINE_END diff --git a/arch/arm/mach-shmobile/board-kzm9g.c b/arch/arm/mach-shmobile/board-kzm9g.c index 0a43f3189c21..f63f2eeb0205 100644 --- a/arch/arm/mach-shmobile/board-kzm9g.c +++ b/arch/arm/mach-shmobile/board-kzm9g.c @@ -384,6 +384,8 @@ static struct regulator_consumer_supply fixed2v8_power_consumers[] = /* SDHI */ static struct sh_mobile_sdhi_info sdhi0_info = { + .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX, + .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX, .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT, .tmio_caps = MMC_CAP_SD_HIGHSPEED, .tmio_ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29, @@ -424,6 +426,8 @@ static struct platform_device sdhi0_device = { /* Micro SD */ static struct sh_mobile_sdhi_info sdhi2_info = { + .dma_slave_tx = SHDMA_SLAVE_SDHI2_TX, + .dma_slave_rx = SHDMA_SLAVE_SDHI2_RX, .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_USE_GPIO_CD | TMIO_MMC_WRPROTECT_DISABLE, @@ -557,7 +561,15 @@ static struct i2c_board_info i2c0_devices[] = { }, { I2C_BOARD_INFO("r2025sd", 0x32), - } + }, + { + I2C_BOARD_INFO("ak8975", 0x0c), + .irq = intcs_evt2irq(0x3380), /* IRQ28 */ + }, + { + I2C_BOARD_INFO("adxl34x", 0x1d), + .irq = intcs_evt2irq(0x3340), /* IRQ26 */ + }, }; static struct i2c_board_info i2c1_devices[] = { diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c index 0c27c810cf99..bf2bcb92b426 100644 --- a/arch/arm/mach-shmobile/board-mackerel.c +++ b/arch/arm/mach-shmobile/board-mackerel.c @@ -816,6 +816,8 @@ static struct platform_device usbhs1_device = { .id = 1, .dev = { .platform_data = &usbhs1_private.info, + .dma_mask = &usbhs1_device.dev.coherent_dma_mask, + .coherent_dma_mask = DMA_BIT_MASK(32), }, .num_resources = ARRAY_SIZE(usbhs1_resources), .resource = usbhs1_resources, @@ -860,76 +862,6 @@ static struct platform_device leds_device = { /* FSI */ #define IRQ_FSI evt2irq(0x1840) -static int __fsi_set_round_rate(struct clk *clk, long rate, int enable) -{ - int ret; - - if (rate <= 0) - return 0; - - if (!enable) { - clk_disable(clk); - return 0; - } - - ret = clk_set_rate(clk, clk_round_rate(clk, rate)); - if (ret < 0) - return ret; - - return clk_enable(clk); -} - -static int fsi_b_set_rate(struct device *dev, int rate, int enable) -{ - struct clk *fsib_clk; - struct clk *fdiv_clk = &sh7372_fsidivb_clk; - long fsib_rate = 0; - long fdiv_rate = 0; - int ackmd_bpfmd; - int ret; - - /* clock start */ - switch (rate) { - case 44100: - fsib_rate = rate * 256; - ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64; - break; - case 48000: - fsib_rate = 85428000; /* around 48kHz x 256 x 7 */ - fdiv_rate = rate * 256; - ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64; - break; - default: - pr_err("unsupported rate in FSI2 port B\n"); - return -EINVAL; - } - - /* FSI B setting */ - fsib_clk = clk_get(dev, "ickb"); - if (IS_ERR(fsib_clk)) - return -EIO; - - /* fsib */ - ret = __fsi_set_round_rate(fsib_clk, fsib_rate, enable); - if (ret < 0) - goto fsi_set_rate_end; - - /* FSI DIV */ - ret = __fsi_set_round_rate(fdiv_clk, fdiv_rate, enable); - if (ret < 0) { - /* disable FSI B */ - if (enable) - __fsi_set_round_rate(fsib_clk, fsib_rate, 0); - goto fsi_set_rate_end; - } - - ret = ackmd_bpfmd; - -fsi_set_rate_end: - clk_put(fsib_clk); - return ret; -} - static struct sh_fsi_platform_info fsi_info = { .port_a = { .flags = SH_FSI_BRS_INV, @@ -940,8 +872,8 @@ static struct sh_fsi_platform_info fsi_info = { .flags = SH_FSI_BRS_INV | SH_FSI_BRM_INV | SH_FSI_LRS_INV | + SH_FSI_CLK_CPG | SH_FSI_FMT_SPDIF, - .set_rate = fsi_b_set_rate, } }; @@ -1651,7 +1583,12 @@ static void __init mackerel_init(void) pm_clk_add(&hdmi_lcdc_device.dev, "hdmi"); } -MACHINE_START(MACKEREL, "mackerel") +static const char *mackerel_boards_compat_dt[] __initdata = { + "renesas,mackerel", + NULL, +}; + +DT_MACHINE_START(MACKEREL_DT, "mackerel") .map_io = sh7372_map_io, .init_early = sh7372_add_early_devices, .init_irq = sh7372_init_irq, @@ -1659,4 +1596,5 @@ MACHINE_START(MACKEREL, "mackerel") .init_machine = mackerel_init, .init_late = sh7372_pm_init_late, .timer = &shmobile_timer, + .dt_compat = mackerel_boards_compat_dt, MACHINE_END diff --git a/arch/arm/mach-shmobile/board-marzen.c b/arch/arm/mach-shmobile/board-marzen.c index b8a7525a4e2f..449f9289567d 100644 --- a/arch/arm/mach-shmobile/board-marzen.c +++ b/arch/arm/mach-shmobile/board-marzen.c @@ -30,8 +30,14 @@ #include <linux/regulator/fixed.h> #include <linux/regulator/machine.h> #include <linux/smsc911x.h> +#include <linux/spi/spi.h> +#include <linux/spi/sh_hspi.h> #include <linux/mmc/sh_mobile_sdhi.h> #include <linux/mfd/tmio.h> +#include <linux/usb/otg.h> +#include <linux/usb/ehci_pdriver.h> +#include <linux/usb/ohci_pdriver.h> +#include <linux/pm_runtime.h> #include <mach/hardware.h> #include <mach/r8a7779.h> #include <mach/common.h> @@ -126,12 +132,201 @@ static struct platform_device thermal_device = { .num_resources = ARRAY_SIZE(thermal_resources), }; +/* HSPI */ +static struct resource hspi_resources[] = { + [0] = { + .start = 0xFFFC7000, + .end = 0xFFFC7018 - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device hspi_device = { + .name = "sh-hspi", + .id = 0, + .resource = hspi_resources, + .num_resources = ARRAY_SIZE(hspi_resources), +}; + +/* USB PHY */ +static struct resource usb_phy_resources[] = { + [0] = { + .start = 0xffe70000, + .end = 0xffe70900 - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = 0xfff70000, + .end = 0xfff70900 - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device usb_phy_device = { + .name = "rcar_usb_phy", + .resource = usb_phy_resources, + .num_resources = ARRAY_SIZE(usb_phy_resources), +}; + static struct platform_device *marzen_devices[] __initdata = { ð_device, &sdhi0_device, &thermal_device, + &hspi_device, + &usb_phy_device, }; +/* USB */ +static struct usb_phy *phy; +static int usb_power_on(struct platform_device *pdev) +{ + if (!phy) + return -EIO; + + pm_runtime_enable(&pdev->dev); + pm_runtime_get_sync(&pdev->dev); + + usb_phy_init(phy); + + return 0; +} + +static void usb_power_off(struct platform_device *pdev) +{ + if (!phy) + return; + + usb_phy_shutdown(phy); + + pm_runtime_put_sync(&pdev->dev); + pm_runtime_disable(&pdev->dev); +} + +static struct usb_ehci_pdata ehcix_pdata = { + .power_on = usb_power_on, + .power_off = usb_power_off, + .power_suspend = usb_power_off, +}; + +static struct resource ehci0_resources[] = { + [0] = { + .start = 0xffe70000, + .end = 0xffe70400 - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = gic_spi(44), + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device ehci0_device = { + .name = "ehci-platform", + .id = 0, + .dev = { + .dma_mask = &ehci0_device.dev.coherent_dma_mask, + .coherent_dma_mask = 0xffffffff, + .platform_data = &ehcix_pdata, + }, + .num_resources = ARRAY_SIZE(ehci0_resources), + .resource = ehci0_resources, +}; + +static struct resource ehci1_resources[] = { + [0] = { + .start = 0xfff70000, + .end = 0xfff70400 - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = gic_spi(45), + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device ehci1_device = { + .name = "ehci-platform", + .id = 1, + .dev = { + .dma_mask = &ehci1_device.dev.coherent_dma_mask, + .coherent_dma_mask = 0xffffffff, + .platform_data = &ehcix_pdata, + }, + .num_resources = ARRAY_SIZE(ehci1_resources), + .resource = ehci1_resources, +}; + +static struct usb_ohci_pdata ohcix_pdata = { + .power_on = usb_power_on, + .power_off = usb_power_off, + .power_suspend = usb_power_off, +}; + +static struct resource ohci0_resources[] = { + [0] = { + .start = 0xffe70400, + .end = 0xffe70800 - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = gic_spi(44), + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device ohci0_device = { + .name = "ohci-platform", + .id = 0, + .dev = { + .dma_mask = &ohci0_device.dev.coherent_dma_mask, + .coherent_dma_mask = 0xffffffff, + .platform_data = &ohcix_pdata, + }, + .num_resources = ARRAY_SIZE(ohci0_resources), + .resource = ohci0_resources, +}; + +static struct resource ohci1_resources[] = { + [0] = { + .start = 0xfff70400, + .end = 0xfff70800 - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = gic_spi(45), + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device ohci1_device = { + .name = "ohci-platform", + .id = 1, + .dev = { + .dma_mask = &ohci1_device.dev.coherent_dma_mask, + .coherent_dma_mask = 0xffffffff, + .platform_data = &ohcix_pdata, + }, + .num_resources = ARRAY_SIZE(ohci1_resources), + .resource = ohci1_resources, +}; + +static struct platform_device *marzen_late_devices[] __initdata = { + &ehci0_device, + &ehci1_device, + &ohci0_device, + &ohci1_device, +}; + +void __init marzen_init_late(void) +{ + /* get usb phy */ + phy = usb_get_phy(USB_PHY_TYPE_USB2); + + shmobile_init_late(); + platform_add_devices(marzen_late_devices, + ARRAY_SIZE(marzen_late_devices)); +} + static void __init marzen_init(void) { regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers, @@ -163,6 +358,20 @@ static void __init marzen_init(void) gpio_request(GPIO_FN_SD0_CD, NULL); gpio_request(GPIO_FN_SD0_WP, NULL); + /* HSPI 0 */ + gpio_request(GPIO_FN_HSPI_CLK0, NULL); + gpio_request(GPIO_FN_HSPI_CS0, NULL); + gpio_request(GPIO_FN_HSPI_TX0, NULL); + gpio_request(GPIO_FN_HSPI_RX0, NULL); + + /* USB (CN21) */ + gpio_request(GPIO_FN_USB_OVC0, NULL); + gpio_request(GPIO_FN_USB_OVC1, NULL); + gpio_request(GPIO_FN_USB_OVC2, NULL); + + /* USB (CN22) */ + gpio_request(GPIO_FN_USB_PENC2, NULL); + r8a7779_add_standard_devices(); platform_add_devices(marzen_devices, ARRAY_SIZE(marzen_devices)); } @@ -175,6 +384,6 @@ MACHINE_START(MARZEN, "marzen") .init_irq = r8a7779_init_irq, .handle_irq = gic_handle_irq, .init_machine = marzen_init, - .init_late = shmobile_init_late, + .init_late = marzen_init_late, .timer = &shmobile_timer, MACHINE_END diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c index 6729e0032180..eac49d59782f 100644 --- a/arch/arm/mach-shmobile/clock-r8a7740.c +++ b/arch/arm/mach-shmobile/clock-r8a7740.c @@ -65,6 +65,9 @@ #define SMSTPCR3 IOMEM(0xe615013c) #define SMSTPCR4 IOMEM(0xe6150140) +#define FSIDIVA IOMEM(0xFE1F8000) +#define FSIDIVB IOMEM(0xFE1F8008) + /* Fixed 32 KHz root clock from EXTALR pin */ static struct clk extalr_clk = { .rate = 32768, @@ -188,6 +191,22 @@ static struct clk pllc1_div2_clk = { }; /* USB clock */ +/* + * USBCKCR is controlling usb24 clock + * bit[7] : parent clock + * bit[6] : clock divide rate + * And this bit[7] is used as a "usb24s" from other devices. + * (Video clock / Sub clock / SPU clock) + * You can controll this clock as a below. + * + * struct clk *usb24 = clk_get(dev, "usb24"); + * struct clk *usb24s = clk_get(NULL, "usb24s"); + * struct clk *system = clk_get(NULL, "system_clk"); + * int rate = clk_get_rate(system); + * + * clk_set_parent(usb24s, system); // for bit[7] + * clk_set_rate(usb24, rate / 2); // for bit[6] + */ static struct clk *usb24s_parents[] = { [0] = &system_clk, [1] = &extal2_clk @@ -427,6 +446,14 @@ static struct clk *late_main_clks[] = { &hdmi2_clk, }; +/* FSI DIV */ +enum { FSIDIV_A, FSIDIV_B, FSIDIV_REPARENT_NR }; + +static struct clk fsidivs[] = { + [FSIDIV_A] = SH_CLK_FSIDIV(FSIDIVA, &div6_reparent_clks[DIV6_FSIA]), + [FSIDIV_B] = SH_CLK_FSIDIV(FSIDIVB, &div6_reparent_clks[DIV6_FSIB]), +}; + /* MSTP */ enum { DIV4_I, DIV4_ZG, DIV4_B, DIV4_M1, DIV4_HP, @@ -596,6 +623,10 @@ static struct clk_lookup lookups[] = { CLKDEV_ICK_ID("icka", "sh_fsi2", &div6_reparent_clks[DIV6_FSIA]), CLKDEV_ICK_ID("ickb", "sh_fsi2", &div6_reparent_clks[DIV6_FSIB]), + CLKDEV_ICK_ID("diva", "sh_fsi2", &fsidivs[FSIDIV_A]), + CLKDEV_ICK_ID("divb", "sh_fsi2", &fsidivs[FSIDIV_B]), + CLKDEV_ICK_ID("xcka", "sh_fsi2", &fsiack_clk), + CLKDEV_ICK_ID("xckb", "sh_fsi2", &fsibck_clk), }; void __init r8a7740_clock_init(u8 md_ck) @@ -641,6 +672,9 @@ void __init r8a7740_clock_init(u8 md_ck) for (k = 0; !ret && (k < ARRAY_SIZE(late_main_clks)); k++) ret = clk_register(late_main_clks[k]); + if (!ret) + ret = sh_clk_fsidiv_register(fsidivs, FSIDIV_REPARENT_NR); + clkdev_add_table(lookups, ARRAY_SIZE(lookups)); if (!ret) diff --git a/arch/arm/mach-shmobile/clock-r8a7779.c b/arch/arm/mach-shmobile/clock-r8a7779.c index 37b2a3133b3b..c019609da660 100644 --- a/arch/arm/mach-shmobile/clock-r8a7779.c +++ b/arch/arm/mach-shmobile/clock-r8a7779.c @@ -87,8 +87,11 @@ static struct clk div4_clks[DIV4_NR] = { }; enum { MSTP323, MSTP322, MSTP321, MSTP320, - MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021, + MSTP101, MSTP100, + MSTP030, + MSTP029, MSTP028, MSTP027, MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021, MSTP016, MSTP015, MSTP014, + MSTP007, MSTP_NR }; static struct clk mstp_clks[MSTP_NR] = { @@ -96,6 +99,12 @@ static struct clk mstp_clks[MSTP_NR] = { [MSTP322] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 22, 0), /* SDHI1 */ [MSTP321] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 21, 0), /* SDHI2 */ [MSTP320] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 20, 0), /* SDHI3 */ + [MSTP101] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 1, 0), /* USB2 */ + [MSTP100] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 0, 0), /* USB0/1 */ + [MSTP030] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 30, 0), /* I2C0 */ + [MSTP029] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 29, 0), /* I2C1 */ + [MSTP028] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 28, 0), /* I2C2 */ + [MSTP027] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 27, 0), /* I2C3 */ [MSTP026] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 26, 0), /* SCIF0 */ [MSTP025] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 25, 0), /* SCIF1 */ [MSTP024] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 24, 0), /* SCIF2 */ @@ -105,6 +114,7 @@ static struct clk mstp_clks[MSTP_NR] = { [MSTP016] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 16, 0), /* TMU0 */ [MSTP015] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 15, 0), /* TMU1 */ [MSTP014] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 14, 0), /* TMU2 */ + [MSTP007] = SH_CLK_MSTP32(&div4_clks[DIV4_S], MSTPCR0, 7, 0), /* HSPI */ }; static unsigned long mul4_recalc(struct clk *clk) @@ -146,14 +156,25 @@ static struct clk_lookup lookups[] = { CLKDEV_CON_ID("peripheral_clk", &div4_clks[DIV4_P]), /* MSTP32 clocks */ + CLKDEV_DEV_ID("ehci-platform.1", &mstp_clks[MSTP101]), /* USB EHCI port2 */ + CLKDEV_DEV_ID("ohci-platform.1", &mstp_clks[MSTP101]), /* USB OHCI port2 */ + CLKDEV_DEV_ID("ehci-platform.0", &mstp_clks[MSTP100]), /* USB EHCI port0/1 */ + CLKDEV_DEV_ID("ohci-platform.0", &mstp_clks[MSTP100]), /* USB OHCI port0/1 */ CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP016]), /* TMU00 */ CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP016]), /* TMU01 */ + CLKDEV_DEV_ID("i2c-rcar.0", &mstp_clks[MSTP030]), /* I2C0 */ + CLKDEV_DEV_ID("i2c-rcar.1", &mstp_clks[MSTP029]), /* I2C1 */ + CLKDEV_DEV_ID("i2c-rcar.2", &mstp_clks[MSTP028]), /* I2C2 */ + CLKDEV_DEV_ID("i2c-rcar.3", &mstp_clks[MSTP027]), /* I2C3 */ CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP026]), /* SCIF0 */ CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP025]), /* SCIF1 */ CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP024]), /* SCIF2 */ CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP023]), /* SCIF3 */ CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP022]), /* SCIF4 */ CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP021]), /* SCIF6 */ + CLKDEV_DEV_ID("sh-hspi.0", &mstp_clks[MSTP007]), /* HSPI0 */ + CLKDEV_DEV_ID("sh-hspi.1", &mstp_clks[MSTP007]), /* HSPI1 */ + CLKDEV_DEV_ID("sh-hspi.2", &mstp_clks[MSTP007]), /* HSPI2 */ CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP323]), /* SDHI0 */ CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */ CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP321]), /* SDHI2 */ diff --git a/arch/arm/mach-shmobile/clock-sh7367.c b/arch/arm/mach-shmobile/clock-sh7367.c deleted file mode 100644 index ef0a95e592c4..000000000000 --- a/arch/arm/mach-shmobile/clock-sh7367.c +++ /dev/null @@ -1,355 +0,0 @@ -/* - * SH7367 clock framework support - * - * Copyright (C) 2010 Magnus Damm - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/io.h> -#include <linux/sh_clk.h> -#include <linux/clkdev.h> -#include <mach/common.h> - -/* SH7367 registers */ -#define RTFRQCR IOMEM(0xe6150000) -#define SYFRQCR IOMEM(0xe6150004) -#define CMFRQCR IOMEM(0xe61500E0) -#define VCLKCR1 IOMEM(0xe6150008) -#define VCLKCR2 IOMEM(0xe615000C) -#define VCLKCR3 IOMEM(0xe615001C) -#define SCLKACR IOMEM(0xe6150010) -#define SCLKBCR IOMEM(0xe6150014) -#define SUBUSBCKCR IOMEM(0xe6158080) -#define SPUCKCR IOMEM(0xe6150084) -#define MSUCKCR IOMEM(0xe6150088) -#define MVI3CKCR IOMEM(0xe6150090) -#define VOUCKCR IOMEM(0xe6150094) -#define MFCK1CR IOMEM(0xe6150098) -#define MFCK2CR IOMEM(0xe615009C) -#define PLLC1CR IOMEM(0xe6150028) -#define PLLC2CR IOMEM(0xe615002C) -#define RTMSTPCR0 IOMEM(0xe6158030) -#define RTMSTPCR2 IOMEM(0xe6158038) -#define SYMSTPCR0 IOMEM(0xe6158040) -#define SYMSTPCR2 IOMEM(0xe6158048) -#define CMMSTPCR0 IOMEM(0xe615804c) - -/* Fixed 32 KHz root clock from EXTALR pin */ -static struct clk r_clk = { - .rate = 32768, -}; - -/* - * 26MHz default rate for the EXTALB1 root input clock. - * If needed, reset this with clk_set_rate() from the platform code. - */ -struct clk sh7367_extalb1_clk = { - .rate = 26666666, -}; - -/* - * 48MHz default rate for the EXTAL2 root input clock. - * If needed, reset this with clk_set_rate() from the platform code. - */ -struct clk sh7367_extal2_clk = { - .rate = 48000000, -}; - -/* A fixed divide-by-2 block */ -static unsigned long div2_recalc(struct clk *clk) -{ - return clk->parent->rate / 2; -} - -static struct sh_clk_ops div2_clk_ops = { - .recalc = div2_recalc, -}; - -/* Divide extalb1 by two */ -static struct clk extalb1_div2_clk = { - .ops = &div2_clk_ops, - .parent = &sh7367_extalb1_clk, -}; - -/* Divide extal2 by two */ -static struct clk extal2_div2_clk = { - .ops = &div2_clk_ops, - .parent = &sh7367_extal2_clk, -}; - -/* PLLC1 */ -static unsigned long pllc1_recalc(struct clk *clk) -{ - unsigned long mult = 1; - - if (__raw_readl(PLLC1CR) & (1 << 14)) - mult = (((__raw_readl(RTFRQCR) >> 24) & 0x3f) + 1) * 2; - - return clk->parent->rate * mult; -} - -static struct sh_clk_ops pllc1_clk_ops = { - .recalc = pllc1_recalc, -}; - -static struct clk pllc1_clk = { - .ops = &pllc1_clk_ops, - .flags = CLK_ENABLE_ON_INIT, - .parent = &extalb1_div2_clk, -}; - -/* Divide PLLC1 by two */ -static struct clk pllc1_div2_clk = { - .ops = &div2_clk_ops, - .parent = &pllc1_clk, -}; - -/* PLLC2 */ -static unsigned long pllc2_recalc(struct clk *clk) -{ - unsigned long mult = 1; - - if (__raw_readl(PLLC2CR) & (1 << 31)) - mult = (((__raw_readl(PLLC2CR) >> 24) & 0x3f) + 1) * 2; - - return clk->parent->rate * mult; -} - -static struct sh_clk_ops pllc2_clk_ops = { - .recalc = pllc2_recalc, -}; - -static struct clk pllc2_clk = { - .ops = &pllc2_clk_ops, - .flags = CLK_ENABLE_ON_INIT, - .parent = &extalb1_div2_clk, -}; - -static struct clk *main_clks[] = { - &r_clk, - &sh7367_extalb1_clk, - &sh7367_extal2_clk, - &extalb1_div2_clk, - &extal2_div2_clk, - &pllc1_clk, - &pllc1_div2_clk, - &pllc2_clk, -}; - -static void div4_kick(struct clk *clk) -{ - unsigned long value; - - /* set KICK bit in SYFRQCR to update hardware setting */ - value = __raw_readl(SYFRQCR); - value |= (1 << 31); - __raw_writel(value, SYFRQCR); -} - -static int divisors[] = { 2, 3, 4, 6, 8, 12, 16, 18, - 24, 32, 36, 48, 0, 72, 0, 0 }; - -static struct clk_div_mult_table div4_div_mult_table = { - .divisors = divisors, - .nr_divisors = ARRAY_SIZE(divisors), -}; - -static struct clk_div4_table div4_table = { - .div_mult_table = &div4_div_mult_table, - .kick = div4_kick, -}; - -enum { DIV4_I, DIV4_G, DIV4_S, DIV4_B, - DIV4_ZX, DIV4_ZT, DIV4_Z, DIV4_ZD, DIV4_HP, - DIV4_ZS, DIV4_ZB, DIV4_ZB3, DIV4_CP, DIV4_NR }; - -#define DIV4(_reg, _bit, _mask, _flags) \ - SH_CLK_DIV4(&pllc1_clk, _reg, _bit, _mask, _flags) - -static struct clk div4_clks[DIV4_NR] = { - [DIV4_I] = DIV4(RTFRQCR, 20, 0x6fff, CLK_ENABLE_ON_INIT), - [DIV4_G] = DIV4(RTFRQCR, 16, 0x6fff, CLK_ENABLE_ON_INIT), - [DIV4_S] = DIV4(RTFRQCR, 12, 0x6fff, CLK_ENABLE_ON_INIT), - [DIV4_B] = DIV4(RTFRQCR, 8, 0x6fff, CLK_ENABLE_ON_INIT), - [DIV4_ZX] = DIV4(SYFRQCR, 20, 0x6fff, 0), - [DIV4_ZT] = DIV4(SYFRQCR, 16, 0x6fff, 0), - [DIV4_Z] = DIV4(SYFRQCR, 12, 0x6fff, 0), - [DIV4_ZD] = DIV4(SYFRQCR, 8, 0x6fff, 0), - [DIV4_HP] = DIV4(SYFRQCR, 4, 0x6fff, 0), - [DIV4_ZS] = DIV4(CMFRQCR, 12, 0x6fff, 0), - [DIV4_ZB] = DIV4(CMFRQCR, 8, 0x6fff, 0), - [DIV4_ZB3] = DIV4(CMFRQCR, 4, 0x6fff, 0), - [DIV4_CP] = DIV4(CMFRQCR, 0, 0x6fff, 0), -}; - -enum { DIV6_SUB, DIV6_SIUA, DIV6_SIUB, DIV6_MSU, DIV6_SPU, - DIV6_MVI3, DIV6_MF1, DIV6_MF2, - DIV6_VCK1, DIV6_VCK2, DIV6_VCK3, DIV6_VOU, - DIV6_NR }; - -static struct clk div6_clks[DIV6_NR] = { - [DIV6_SUB] = SH_CLK_DIV6(&sh7367_extal2_clk, SUBUSBCKCR, 0), - [DIV6_SIUA] = SH_CLK_DIV6(&pllc1_div2_clk, SCLKACR, 0), - [DIV6_SIUB] = SH_CLK_DIV6(&pllc1_div2_clk, SCLKBCR, 0), - [DIV6_MSU] = SH_CLK_DIV6(&pllc1_div2_clk, MSUCKCR, 0), - [DIV6_SPU] = SH_CLK_DIV6(&pllc1_div2_clk, SPUCKCR, 0), - [DIV6_MVI3] = SH_CLK_DIV6(&pllc1_div2_clk, MVI3CKCR, 0), - [DIV6_MF1] = SH_CLK_DIV6(&pllc1_div2_clk, MFCK1CR, 0), - [DIV6_MF2] = SH_CLK_DIV6(&pllc1_div2_clk, MFCK2CR, 0), - [DIV6_VCK1] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR1, 0), - [DIV6_VCK2] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR2, 0), - [DIV6_VCK3] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR3, 0), - [DIV6_VOU] = SH_CLK_DIV6(&pllc1_div2_clk, VOUCKCR, 0), -}; - -enum { RTMSTP001, - RTMSTP231, RTMSTP230, RTMSTP229, RTMSTP228, RTMSTP226, - RTMSTP216, RTMSTP206, RTMSTP205, RTMSTP201, - SYMSTP023, SYMSTP007, SYMSTP006, SYMSTP004, - SYMSTP003, SYMSTP002, SYMSTP001, SYMSTP000, - SYMSTP231, SYMSTP229, SYMSTP225, SYMSTP223, SYMSTP222, - SYMSTP215, SYMSTP214, SYMSTP213, SYMSTP211, - CMMSTP003, - MSTP_NR }; - -#define MSTP(_parent, _reg, _bit, _flags) \ - SH_CLK_MSTP32(_parent, _reg, _bit, _flags) - -static struct clk mstp_clks[MSTP_NR] = { - [RTMSTP001] = MSTP(&div6_clks[DIV6_SUB], RTMSTPCR0, 1, 0), /* IIC2 */ - [RTMSTP231] = MSTP(&div4_clks[DIV4_B], RTMSTPCR2, 31, 0), /* VEU3 */ - [RTMSTP230] = MSTP(&div4_clks[DIV4_B], RTMSTPCR2, 30, 0), /* VEU2 */ - [RTMSTP229] = MSTP(&div4_clks[DIV4_B], RTMSTPCR2, 29, 0), /* VEU1 */ - [RTMSTP228] = MSTP(&div4_clks[DIV4_B], RTMSTPCR2, 28, 0), /* VEU0 */ - [RTMSTP226] = MSTP(&div4_clks[DIV4_B], RTMSTPCR2, 26, 0), /* VEU2H */ - [RTMSTP216] = MSTP(&div6_clks[DIV6_SUB], RTMSTPCR2, 16, 0), /* IIC0 */ - [RTMSTP206] = MSTP(&div4_clks[DIV4_B], RTMSTPCR2, 6, 0), /* JPU */ - [RTMSTP205] = MSTP(&div6_clks[DIV6_VOU], RTMSTPCR2, 5, 0), /* VOU */ - [RTMSTP201] = MSTP(&div4_clks[DIV4_B], RTMSTPCR2, 1, 0), /* VPU */ - [SYMSTP023] = MSTP(&div6_clks[DIV6_SPU], SYMSTPCR0, 23, 0), /* SPU1 */ - [SYMSTP007] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR0, 7, 0), /* SCIFA5 */ - [SYMSTP006] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR0, 6, 0), /* SCIFB */ - [SYMSTP004] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR0, 4, 0), /* SCIFA0 */ - [SYMSTP003] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR0, 3, 0), /* SCIFA1 */ - [SYMSTP002] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR0, 2, 0), /* SCIFA2 */ - [SYMSTP001] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR0, 1, 0), /* SCIFA3 */ - [SYMSTP000] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR0, 0, 0), /* SCIFA4 */ - [SYMSTP231] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR2, 31, 0), /* SIU */ - [SYMSTP229] = MSTP(&r_clk, SYMSTPCR2, 29, 0), /* CMT10 */ - [SYMSTP225] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR2, 25, 0), /* IRDA */ - [SYMSTP223] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR2, 23, 0), /* IIC1 */ - [SYMSTP222] = MSTP(&div6_clks[DIV6_SUB], SYMSTPCR2, 22, 0), /* USBHS */ - [SYMSTP215] = MSTP(&div4_clks[DIV4_HP], SYMSTPCR2, 15, 0), /* FLCTL */ - [SYMSTP214] = MSTP(&div4_clks[DIV4_HP], SYMSTPCR2, 14, 0), /* SDHI0 */ - [SYMSTP213] = MSTP(&div4_clks[DIV4_HP], SYMSTPCR2, 13, 0), /* SDHI1 */ - [SYMSTP211] = MSTP(&div4_clks[DIV4_HP], SYMSTPCR2, 11, 0), /* SDHI2 */ - [CMMSTP003] = MSTP(&r_clk, CMMSTPCR0, 3, 0), /* KEYSC */ -}; - -static struct clk_lookup lookups[] = { - /* main clocks */ - CLKDEV_CON_ID("r_clk", &r_clk), - CLKDEV_CON_ID("extalb1", &sh7367_extalb1_clk), - CLKDEV_CON_ID("extal2", &sh7367_extal2_clk), - CLKDEV_CON_ID("extalb1_div2_clk", &extalb1_div2_clk), - CLKDEV_CON_ID("extal2_div2_clk", &extal2_div2_clk), - CLKDEV_CON_ID("pllc1_clk", &pllc1_clk), - CLKDEV_CON_ID("pllc1_div2_clk", &pllc1_div2_clk), - CLKDEV_CON_ID("pllc2_clk", &pllc2_clk), - - /* DIV4 clocks */ - CLKDEV_CON_ID("i_clk", &div4_clks[DIV4_I]), - CLKDEV_CON_ID("g_clk", &div4_clks[DIV4_G]), - CLKDEV_CON_ID("b_clk", &div4_clks[DIV4_B]), - CLKDEV_CON_ID("zx_clk", &div4_clks[DIV4_ZX]), - CLKDEV_CON_ID("zt_clk", &div4_clks[DIV4_ZT]), - CLKDEV_CON_ID("z_clk", &div4_clks[DIV4_Z]), - CLKDEV_CON_ID("zd_clk", &div4_clks[DIV4_ZD]), - CLKDEV_CON_ID("hp_clk", &div4_clks[DIV4_HP]), - CLKDEV_CON_ID("zs_clk", &div4_clks[DIV4_ZS]), - CLKDEV_CON_ID("zb_clk", &div4_clks[DIV4_ZB]), - CLKDEV_CON_ID("zb3_clk", &div4_clks[DIV4_ZB3]), - CLKDEV_CON_ID("cp_clk", &div4_clks[DIV4_CP]), - - /* DIV6 clocks */ - CLKDEV_CON_ID("sub_clk", &div6_clks[DIV6_SUB]), - CLKDEV_CON_ID("siua_clk", &div6_clks[DIV6_SIUA]), - CLKDEV_CON_ID("siub_clk", &div6_clks[DIV6_SIUB]), - CLKDEV_CON_ID("msu_clk", &div6_clks[DIV6_MSU]), - CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_SPU]), - CLKDEV_CON_ID("mvi3_clk", &div6_clks[DIV6_MVI3]), - CLKDEV_CON_ID("mf1_clk", &div6_clks[DIV6_MF1]), - CLKDEV_CON_ID("mf2_clk", &div6_clks[DIV6_MF2]), - CLKDEV_CON_ID("vck1_clk", &div6_clks[DIV6_VCK1]), - CLKDEV_CON_ID("vck2_clk", &div6_clks[DIV6_VCK2]), - CLKDEV_CON_ID("vck3_clk", &div6_clks[DIV6_VCK3]), - CLKDEV_CON_ID("vou_clk", &div6_clks[DIV6_VOU]), - - /* MSTP32 clocks */ - CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[RTMSTP001]), /* IIC2 */ - CLKDEV_DEV_ID("uio_pdrv_genirq.4", &mstp_clks[RTMSTP231]), /* VEU3 */ - CLKDEV_DEV_ID("uio_pdrv_genirq.3", &mstp_clks[RTMSTP230]), /* VEU2 */ - CLKDEV_DEV_ID("uio_pdrv_genirq.2", &mstp_clks[RTMSTP229]), /* VEU1 */ - CLKDEV_DEV_ID("uio_pdrv_genirq.1", &mstp_clks[RTMSTP228]), /* VEU0 */ - CLKDEV_DEV_ID("uio_pdrv_genirq.5", &mstp_clks[RTMSTP226]), /* VEU2H */ - CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[RTMSTP216]), /* IIC0 */ - CLKDEV_DEV_ID("uio_pdrv_genirq.6", &mstp_clks[RTMSTP206]), /* JPU */ - CLKDEV_DEV_ID("sh-vou", &mstp_clks[RTMSTP205]), /* VOU */ - CLKDEV_DEV_ID("uio_pdrv_genirq.0", &mstp_clks[RTMSTP201]), /* VPU */ - CLKDEV_DEV_ID("uio_pdrv_genirq.7", &mstp_clks[SYMSTP023]), /* SPU1 */ - CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[SYMSTP007]), /* SCIFA5 */ - CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[SYMSTP006]), /* SCIFB */ - CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[SYMSTP004]), /* SCIFA0 */ - CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[SYMSTP003]), /* SCIFA1 */ - CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[SYMSTP002]), /* SCIFA2 */ - CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[SYMSTP001]), /* SCIFA3 */ - CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[SYMSTP000]), /* SCIFA4 */ - CLKDEV_DEV_ID("sh_siu", &mstp_clks[SYMSTP231]), /* SIU */ - CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[SYMSTP229]), /* CMT10 */ - CLKDEV_DEV_ID("sh_irda", &mstp_clks[SYMSTP225]), /* IRDA */ - CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[SYMSTP223]), /* IIC1 */ - CLKDEV_DEV_ID("r8a66597_hcd.0", &mstp_clks[SYMSTP222]), /* USBHS */ - CLKDEV_DEV_ID("r8a66597_udc.0", &mstp_clks[SYMSTP222]), /* USBHS */ - CLKDEV_DEV_ID("sh_flctl", &mstp_clks[SYMSTP215]), /* FLCTL */ - CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[SYMSTP214]), /* SDHI0 */ - CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[SYMSTP213]), /* SDHI1 */ - CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[SYMSTP211]), /* SDHI2 */ - CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[CMMSTP003]), /* KEYSC */ -}; - -void __init sh7367_clock_init(void) -{ - int k, ret = 0; - - for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++) - ret = clk_register(main_clks[k]); - - if (!ret) - ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); - - if (!ret) - ret = sh_clk_div6_register(div6_clks, DIV6_NR); - - if (!ret) - ret = sh_clk_mstp_register(mstp_clks, MSTP_NR); - - clkdev_add_table(lookups, ARRAY_SIZE(lookups)); - - if (!ret) - shmobile_clk_init(); - else - panic("failed to setup sh7367 clocks\n"); -} diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c index 430a90ffa120..3ca6757b129a 100644 --- a/arch/arm/mach-shmobile/clock-sh7372.c +++ b/arch/arm/mach-shmobile/clock-sh7372.c @@ -295,10 +295,10 @@ struct clk sh7372_pllc2_clk = { }; /* External input clock (pin name: FSIACK/FSIBCK ) */ -struct clk sh7372_fsiack_clk = { +static struct clk fsiack_clk = { }; -struct clk sh7372_fsibck_clk = { +static struct clk fsibck_clk = { }; static struct clk *main_clks[] = { @@ -314,8 +314,8 @@ static struct clk *main_clks[] = { &pllc1_clk, &pllc1_div2_clk, &sh7372_pllc2_clk, - &sh7372_fsiack_clk, - &sh7372_fsibck_clk, + &fsiack_clk, + &fsibck_clk, }; static void div4_kick(struct clk *clk) @@ -399,14 +399,14 @@ static struct clk *hdmi_parent[] = { static struct clk *fsiackcr_parent[] = { [0] = &pllc1_div2_clk, [1] = &sh7372_pllc2_clk, - [2] = &sh7372_fsiack_clk, /* external input for FSI A */ + [2] = &fsiack_clk, /* external input for FSI A */ [3] = NULL, /* setting prohibited */ }; static struct clk *fsibckcr_parent[] = { [0] = &pllc1_div2_clk, [1] = &sh7372_pllc2_clk, - [2] = &sh7372_fsibck_clk, /* external input for FSI B */ + [2] = &fsibck_clk, /* external input for FSI B */ [3] = NULL, /* setting prohibited */ }; @@ -420,87 +420,11 @@ static struct clk div6_reparent_clks[DIV6_REPARENT_NR] = { }; /* FSI DIV */ -static unsigned long fsidiv_recalc(struct clk *clk) -{ - unsigned long value; - - value = __raw_readl(clk->mapping->base); - - value >>= 16; - if (value < 2) - return 0; - - return clk->parent->rate / value; -} - -static long fsidiv_round_rate(struct clk *clk, unsigned long rate) -{ - return clk_rate_div_range_round(clk, 2, 0xffff, rate); -} - -static void fsidiv_disable(struct clk *clk) -{ - __raw_writel(0, clk->mapping->base); -} - -static int fsidiv_enable(struct clk *clk) -{ - unsigned long value; - - value = __raw_readl(clk->mapping->base) >> 16; - if (value < 2) - return -EIO; - - __raw_writel((value << 16) | 0x3, clk->mapping->base); - - return 0; -} +enum { FSIDIV_A, FSIDIV_B, FSIDIV_REPARENT_NR }; -static int fsidiv_set_rate(struct clk *clk, unsigned long rate) -{ - int idx; - - idx = (clk->parent->rate / rate) & 0xffff; - if (idx < 2) - return -EINVAL; - - __raw_writel(idx << 16, clk->mapping->base); - return 0; -} - -static struct sh_clk_ops fsidiv_clk_ops = { - .recalc = fsidiv_recalc, - .round_rate = fsidiv_round_rate, - .set_rate = fsidiv_set_rate, - .enable = fsidiv_enable, - .disable = fsidiv_disable, -}; - -static struct clk_mapping fsidiva_clk_mapping = { - .phys = FSIDIVA, - .len = 8, -}; - -struct clk sh7372_fsidiva_clk = { - .ops = &fsidiv_clk_ops, - .parent = &div6_reparent_clks[DIV6_FSIA], /* late install */ - .mapping = &fsidiva_clk_mapping, -}; - -static struct clk_mapping fsidivb_clk_mapping = { - .phys = FSIDIVB, - .len = 8, -}; - -struct clk sh7372_fsidivb_clk = { - .ops = &fsidiv_clk_ops, - .parent = &div6_reparent_clks[DIV6_FSIB], /* late install */ - .mapping = &fsidivb_clk_mapping, -}; - -static struct clk *late_main_clks[] = { - &sh7372_fsidiva_clk, - &sh7372_fsidivb_clk, +static struct clk fsidivs[] = { + [FSIDIV_A] = SH_CLK_FSIDIV(FSIDIVA, &div6_reparent_clks[DIV6_FSIA]), + [FSIDIV_B] = SH_CLK_FSIDIV(FSIDIVB, &div6_reparent_clks[DIV6_FSIB]), }; enum { MSTP001, MSTP000, @@ -583,6 +507,8 @@ static struct clk_lookup lookups[] = { CLKDEV_CON_ID("pllc1_clk", &pllc1_clk), CLKDEV_CON_ID("pllc1_div2_clk", &pllc1_div2_clk), CLKDEV_CON_ID("pllc2_clk", &sh7372_pllc2_clk), + CLKDEV_CON_ID("fsiack", &fsiack_clk), + CLKDEV_CON_ID("fsibck", &fsibck_clk), /* DIV4 clocks */ CLKDEV_CON_ID("i_clk", &div4_clks[DIV4_I]), @@ -678,6 +604,10 @@ static struct clk_lookup lookups[] = { CLKDEV_ICK_ID("icka", "sh_fsi2", &div6_reparent_clks[DIV6_FSIA]), CLKDEV_ICK_ID("ickb", "sh_fsi2", &div6_reparent_clks[DIV6_FSIB]), CLKDEV_ICK_ID("spu2", "sh_fsi2", &mstp_clks[MSTP223]), + CLKDEV_ICK_ID("diva", "sh_fsi2", &fsidivs[FSIDIV_A]), + CLKDEV_ICK_ID("divb", "sh_fsi2", &fsidivs[FSIDIV_B]), + CLKDEV_ICK_ID("xcka", "sh_fsi2", &fsiack_clk), + CLKDEV_ICK_ID("xckb", "sh_fsi2", &fsibck_clk), }; void __init sh7372_clock_init(void) @@ -706,8 +636,8 @@ void __init sh7372_clock_init(void) if (!ret) ret = sh_clk_mstp_register(mstp_clks, MSTP_NR); - for (k = 0; !ret && (k < ARRAY_SIZE(late_main_clks)); k++) - ret = clk_register(late_main_clks[k]); + if (!ret) + ret = sh_clk_fsidiv_register(fsidivs, FSIDIV_REPARENT_NR); clkdev_add_table(lookups, ARRAY_SIZE(lookups)); diff --git a/arch/arm/mach-shmobile/clock-sh7377.c b/arch/arm/mach-shmobile/clock-sh7377.c deleted file mode 100644 index b8480d19e1c8..000000000000 --- a/arch/arm/mach-shmobile/clock-sh7377.c +++ /dev/null @@ -1,366 +0,0 @@ -/* - * SH7377 clock framework support - * - * Copyright (C) 2010 Magnus Damm - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/io.h> -#include <linux/sh_clk.h> -#include <linux/clkdev.h> -#include <mach/common.h> - -/* SH7377 registers */ -#define RTFRQCR IOMEM(0xe6150000) -#define SYFRQCR IOMEM(0xe6150004) -#define CMFRQCR IOMEM(0xe61500E0) -#define VCLKCR1 IOMEM(0xe6150008) -#define VCLKCR2 IOMEM(0xe615000C) -#define VCLKCR3 IOMEM(0xe615001C) -#define FMSICKCR IOMEM(0xe6150010) -#define FMSOCKCR IOMEM(0xe6150014) -#define FSICKCR IOMEM(0xe6150018) -#define PLLC1CR IOMEM(0xe6150028) -#define PLLC2CR IOMEM(0xe615002C) -#define SUBUSBCKCR IOMEM(0xe6150080) -#define SPUCKCR IOMEM(0xe6150084) -#define MSUCKCR IOMEM(0xe6150088) -#define MVI3CKCR IOMEM(0xe6150090) -#define HDMICKCR IOMEM(0xe6150094) -#define MFCK1CR IOMEM(0xe6150098) -#define MFCK2CR IOMEM(0xe615009C) -#define DSITCKCR IOMEM(0xe6150060) -#define DSIPCKCR IOMEM(0xe6150064) -#define SMSTPCR0 IOMEM(0xe6150130) -#define SMSTPCR1 IOMEM(0xe6150134) -#define SMSTPCR2 IOMEM(0xe6150138) -#define SMSTPCR3 IOMEM(0xe615013C) -#define SMSTPCR4 IOMEM(0xe6150140) - -/* Fixed 32 KHz root clock from EXTALR pin */ -static struct clk r_clk = { - .rate = 32768, -}; - -/* - * 26MHz default rate for the EXTALC1 root input clock. - * If needed, reset this with clk_set_rate() from the platform code. - */ -struct clk sh7377_extalc1_clk = { - .rate = 26666666, -}; - -/* - * 48MHz default rate for the EXTAL2 root input clock. - * If needed, reset this with clk_set_rate() from the platform code. - */ -struct clk sh7377_extal2_clk = { - .rate = 48000000, -}; - -/* A fixed divide-by-2 block */ -static unsigned long div2_recalc(struct clk *clk) -{ - return clk->parent->rate / 2; -} - -static struct sh_clk_ops div2_clk_ops = { - .recalc = div2_recalc, -}; - -/* Divide extalc1 by two */ -static struct clk extalc1_div2_clk = { - .ops = &div2_clk_ops, - .parent = &sh7377_extalc1_clk, -}; - -/* Divide extal2 by two */ -static struct clk extal2_div2_clk = { - .ops = &div2_clk_ops, - .parent = &sh7377_extal2_clk, -}; - -/* Divide extal2 by four */ -static struct clk extal2_div4_clk = { - .ops = &div2_clk_ops, - .parent = &extal2_div2_clk, -}; - -/* PLLC1 */ -static unsigned long pllc1_recalc(struct clk *clk) -{ - unsigned long mult = 1; - - if (__raw_readl(PLLC1CR) & (1 << 14)) - mult = (((__raw_readl(RTFRQCR) >> 24) & 0x3f) + 1) * 2; - - return clk->parent->rate * mult; -} - -static struct sh_clk_ops pllc1_clk_ops = { - .recalc = pllc1_recalc, -}; - -static struct clk pllc1_clk = { - .ops = &pllc1_clk_ops, - .flags = CLK_ENABLE_ON_INIT, - .parent = &extalc1_div2_clk, -}; - -/* Divide PLLC1 by two */ -static struct clk pllc1_div2_clk = { - .ops = &div2_clk_ops, - .parent = &pllc1_clk, -}; - -/* PLLC2 */ -static unsigned long pllc2_recalc(struct clk *clk) -{ - unsigned long mult = 1; - - if (__raw_readl(PLLC2CR) & (1 << 31)) - mult = (((__raw_readl(PLLC2CR) >> 24) & 0x3f) + 1) * 2; - - return clk->parent->rate * mult; -} - -static struct sh_clk_ops pllc2_clk_ops = { - .recalc = pllc2_recalc, -}; - -static struct clk pllc2_clk = { - .ops = &pllc2_clk_ops, - .flags = CLK_ENABLE_ON_INIT, - .parent = &extalc1_div2_clk, -}; - -static struct clk *main_clks[] = { - &r_clk, - &sh7377_extalc1_clk, - &sh7377_extal2_clk, - &extalc1_div2_clk, - &extal2_div2_clk, - &extal2_div4_clk, - &pllc1_clk, - &pllc1_div2_clk, - &pllc2_clk, -}; - -static void div4_kick(struct clk *clk) -{ - unsigned long value; - - /* set KICK bit in SYFRQCR to update hardware setting */ - value = __raw_readl(SYFRQCR); - value |= (1 << 31); - __raw_writel(value, SYFRQCR); -} - -static int divisors[] = { 2, 3, 4, 6, 8, 12, 16, 18, - 24, 32, 36, 48, 0, 72, 96, 0 }; - -static struct clk_div_mult_table div4_div_mult_table = { - .divisors = divisors, - .nr_divisors = ARRAY_SIZE(divisors), -}; - -static struct clk_div4_table div4_table = { - .div_mult_table = &div4_div_mult_table, - .kick = div4_kick, -}; - -enum { DIV4_I, DIV4_ZG, DIV4_B, DIV4_M1, DIV4_CSIR, - DIV4_ZTR, DIV4_ZT, DIV4_Z, DIV4_HP, - DIV4_ZS, DIV4_ZB, DIV4_ZB3, DIV4_CP, DIV4_NR }; - -#define DIV4(_reg, _bit, _mask, _flags) \ - SH_CLK_DIV4(&pllc1_clk, _reg, _bit, _mask, _flags) - -static struct clk div4_clks[DIV4_NR] = { - [DIV4_I] = DIV4(RTFRQCR, 20, 0x6fff, CLK_ENABLE_ON_INIT), - [DIV4_ZG] = DIV4(RTFRQCR, 16, 0x6fff, CLK_ENABLE_ON_INIT), - [DIV4_B] = DIV4(RTFRQCR, 8, 0x6fff, CLK_ENABLE_ON_INIT), - [DIV4_M1] = DIV4(RTFRQCR, 4, 0x6fff, CLK_ENABLE_ON_INIT), - [DIV4_CSIR] = DIV4(RTFRQCR, 0, 0x6fff, 0), - [DIV4_ZTR] = DIV4(SYFRQCR, 20, 0x6fff, 0), - [DIV4_ZT] = DIV4(SYFRQCR, 16, 0x6fff, 0), - [DIV4_Z] = DIV4(SYFRQCR, 12, 0x6fff, 0), - [DIV4_HP] = DIV4(SYFRQCR, 4, 0x6fff, 0), - [DIV4_ZS] = DIV4(CMFRQCR, 12, 0x6fff, 0), - [DIV4_ZB] = DIV4(CMFRQCR, 8, 0x6fff, 0), - [DIV4_ZB3] = DIV4(CMFRQCR, 4, 0x6fff, 0), - [DIV4_CP] = DIV4(CMFRQCR, 0, 0x6fff, 0), -}; - -enum { DIV6_VCK1, DIV6_VCK2, DIV6_VCK3, DIV6_FMSI, DIV6_FMSO, - DIV6_FSI, DIV6_SUB, DIV6_SPU, DIV6_MSU, DIV6_MVI3, DIV6_HDMI, - DIV6_MF1, DIV6_MF2, DIV6_DSIT, DIV6_DSIP, - DIV6_NR }; - -static struct clk div6_clks[] = { - [DIV6_VCK1] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR1, 0), - [DIV6_VCK2] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR2, 0), - [DIV6_VCK3] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR3, 0), - [DIV6_FMSI] = SH_CLK_DIV6(&pllc1_div2_clk, FMSICKCR, 0), - [DIV6_FMSO] = SH_CLK_DIV6(&pllc1_div2_clk, FMSOCKCR, 0), - [DIV6_FSI] = SH_CLK_DIV6(&pllc1_div2_clk, FSICKCR, 0), - [DIV6_SUB] = SH_CLK_DIV6(&sh7377_extal2_clk, SUBUSBCKCR, 0), - [DIV6_SPU] = SH_CLK_DIV6(&pllc1_div2_clk, SPUCKCR, 0), - [DIV6_MSU] = SH_CLK_DIV6(&pllc1_div2_clk, MSUCKCR, 0), - [DIV6_MVI3] = SH_CLK_DIV6(&pllc1_div2_clk, MVI3CKCR, 0), - [DIV6_HDMI] = SH_CLK_DIV6(&pllc1_div2_clk, HDMICKCR, 0), - [DIV6_MF1] = SH_CLK_DIV6(&pllc1_div2_clk, MFCK1CR, 0), - [DIV6_MF2] = SH_CLK_DIV6(&pllc1_div2_clk, MFCK2CR, 0), - [DIV6_DSIT] = SH_CLK_DIV6(&pllc1_div2_clk, DSITCKCR, 0), - [DIV6_DSIP] = SH_CLK_DIV6(&pllc1_div2_clk, DSIPCKCR, 0), -}; - -enum { MSTP001, - MSTP131, MSTP130, MSTP129, MSTP128, MSTP116, MSTP106, MSTP101, - MSTP223, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200, - MSTP331, MSTP329, MSTP325, MSTP323, MSTP322, - MSTP315, MSTP314, MSTP313, - MSTP403, - MSTP_NR }; - -#define MSTP(_parent, _reg, _bit, _flags) \ - SH_CLK_MSTP32(_parent, _reg, _bit, _flags) - -static struct clk mstp_clks[] = { - [MSTP001] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR0, 1, 0), /* IIC2 */ - [MSTP131] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 31, 0), /* VEU3 */ - [MSTP130] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 30, 0), /* VEU2 */ - [MSTP129] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 29, 0), /* VEU1 */ - [MSTP128] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 28, 0), /* VEU0 */ - [MSTP116] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR1, 16, 0), /* IIC0 */ - [MSTP106] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 6, 0), /* JPU */ - [MSTP101] = MSTP(&div4_clks[DIV4_M1], SMSTPCR1, 1, 0), /* VPU */ - [MSTP223] = MSTP(&div6_clks[DIV6_SPU], SMSTPCR2, 23, 0), /* SPU2 */ - [MSTP207] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 7, 0), /* SCIFA5 */ - [MSTP206] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 6, 0), /* SCIFB */ - [MSTP204] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 4, 0), /* SCIFA0 */ - [MSTP203] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 3, 0), /* SCIFA1 */ - [MSTP202] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 2, 0), /* SCIFA2 */ - [MSTP201] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 1, 0), /* SCIFA3 */ - [MSTP200] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 0, 0), /* SCIFA4 */ - [MSTP331] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 31, 0), /* SCIFA6 */ - [MSTP329] = MSTP(&r_clk, SMSTPCR3, 29, 0), /* CMT10 */ - [MSTP325] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 25, 0), /* IRDA */ - [MSTP323] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 23, 0), /* IIC1 */ - [MSTP322] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 22, 0), /* USB0 */ - [MSTP315] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 15, 0), /* FLCTL */ - [MSTP314] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 14, 0), /* SDHI0 */ - [MSTP313] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 13, 0), /* SDHI1 */ - [MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */ -}; - -static struct clk_lookup lookups[] = { - /* main clocks */ - CLKDEV_CON_ID("r_clk", &r_clk), - CLKDEV_CON_ID("extalc1", &sh7377_extalc1_clk), - CLKDEV_CON_ID("extal2", &sh7377_extal2_clk), - CLKDEV_CON_ID("extalc1_div2_clk", &extalc1_div2_clk), - CLKDEV_CON_ID("extal2_div2_clk", &extal2_div2_clk), - CLKDEV_CON_ID("extal2_div4_clk", &extal2_div4_clk), - CLKDEV_CON_ID("pllc1_clk", &pllc1_clk), - CLKDEV_CON_ID("pllc1_div2_clk", &pllc1_div2_clk), - CLKDEV_CON_ID("pllc2_clk", &pllc2_clk), - - /* DIV4 clocks */ - CLKDEV_CON_ID("i_clk", &div4_clks[DIV4_I]), - CLKDEV_CON_ID("zg_clk", &div4_clks[DIV4_ZG]), - CLKDEV_CON_ID("b_clk", &div4_clks[DIV4_B]), - CLKDEV_CON_ID("m1_clk", &div4_clks[DIV4_M1]), - CLKDEV_CON_ID("csir_clk", &div4_clks[DIV4_CSIR]), - CLKDEV_CON_ID("ztr_clk", &div4_clks[DIV4_ZTR]), - CLKDEV_CON_ID("zt_clk", &div4_clks[DIV4_ZT]), - CLKDEV_CON_ID("z_clk", &div4_clks[DIV4_Z]), - CLKDEV_CON_ID("hp_clk", &div4_clks[DIV4_HP]), - CLKDEV_CON_ID("zs_clk", &div4_clks[DIV4_ZS]), - CLKDEV_CON_ID("zb_clk", &div4_clks[DIV4_ZB]), - CLKDEV_CON_ID("zb3_clk", &div4_clks[DIV4_ZB3]), - CLKDEV_CON_ID("cp_clk", &div4_clks[DIV4_CP]), - - /* DIV6 clocks */ - CLKDEV_CON_ID("vck1_clk", &div6_clks[DIV6_VCK1]), - CLKDEV_CON_ID("vck2_clk", &div6_clks[DIV6_VCK2]), - CLKDEV_CON_ID("vck3_clk", &div6_clks[DIV6_VCK3]), - CLKDEV_CON_ID("fmsi_clk", &div6_clks[DIV6_FMSI]), - CLKDEV_CON_ID("fmso_clk", &div6_clks[DIV6_FMSO]), - CLKDEV_CON_ID("fsi_clk", &div6_clks[DIV6_FSI]), - CLKDEV_CON_ID("sub_clk", &div6_clks[DIV6_SUB]), - CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_SPU]), - CLKDEV_CON_ID("msu_clk", &div6_clks[DIV6_MSU]), - CLKDEV_CON_ID("mvi3_clk", &div6_clks[DIV6_MVI3]), - CLKDEV_CON_ID("hdmi_clk", &div6_clks[DIV6_HDMI]), - CLKDEV_CON_ID("mf1_clk", &div6_clks[DIV6_MF1]), - CLKDEV_CON_ID("mf2_clk", &div6_clks[DIV6_MF2]), - CLKDEV_CON_ID("dsit_clk", &div6_clks[DIV6_DSIT]), - CLKDEV_CON_ID("dsip_clk", &div6_clks[DIV6_DSIP]), - - /* MSTP32 clocks */ - CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* IIC2 */ - CLKDEV_DEV_ID("uio_pdrv_genirq.4", &mstp_clks[MSTP131]), /* VEU3 */ - CLKDEV_DEV_ID("uio_pdrv_genirq.3", &mstp_clks[MSTP130]), /* VEU2 */ - CLKDEV_DEV_ID("uio_pdrv_genirq.2", &mstp_clks[MSTP129]), /* VEU1 */ - CLKDEV_DEV_ID("uio_pdrv_genirq.1", &mstp_clks[MSTP128]), /* VEU0 */ - CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* IIC0 */ - CLKDEV_DEV_ID("uio_pdrv_genirq.5", &mstp_clks[MSTP106]), /* JPU */ - CLKDEV_DEV_ID("uio_pdrv_genirq.0", &mstp_clks[MSTP101]), /* VPU */ - CLKDEV_DEV_ID("uio_pdrv_genirq.6", &mstp_clks[MSTP223]), /* SPU2DSP0 */ - CLKDEV_DEV_ID("uio_pdrv_genirq.7", &mstp_clks[MSTP223]), /* SPU2DSP1 */ - CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */ - CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP206]), /* SCIFB */ - CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), /* SCIFA0 */ - CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]), /* SCIFA1 */ - CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP202]), /* SCIFA2 */ - CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP201]), /* SCIFA3 */ - CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP200]), /* SCIFA4 */ - CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP331]), /* SCIFA6 */ - CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */ - CLKDEV_DEV_ID("sh_irda", &mstp_clks[MSTP325]), /* IRDA */ - CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* IIC1 */ - CLKDEV_DEV_ID("r8a66597_hcd.0", &mstp_clks[MSTP322]), /* USBHS */ - CLKDEV_DEV_ID("r8a66597_udc.0", &mstp_clks[MSTP322]), /* USBHS */ - CLKDEV_DEV_ID("sh_flctl", &mstp_clks[MSTP315]), /* FLCTL */ - CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */ - CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */ - CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[MSTP403]), /* KEYSC */ -}; - -void __init sh7377_clock_init(void) -{ - int k, ret = 0; - - for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++) - ret = clk_register(main_clks[k]); - - if (!ret) - ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); - - if (!ret) - ret = sh_clk_div6_register(div6_clks, DIV6_NR); - - if (!ret) - ret = sh_clk_mstp_register(mstp_clks, MSTP_NR); - - clkdev_add_table(lookups, ARRAY_SIZE(lookups)); - - if (!ret) - shmobile_clk_init(); - else - panic("failed to setup sh7377 clocks\n"); -} diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h index d47e215aca87..dfeca79e9e96 100644 --- a/arch/arm/mach-shmobile/include/mach/common.h +++ b/arch/arm/mach-shmobile/include/mach/common.h @@ -18,24 +18,6 @@ extern int shmobile_enter_wfi(struct cpuidle_device *dev, struct cpuidle_driver *drv, int index); extern void shmobile_cpuidle_set_driver(struct cpuidle_driver *drv); -extern void sh7367_init_irq(void); -extern void sh7367_map_io(void); -extern void sh7367_add_early_devices(void); -extern void sh7367_add_standard_devices(void); -extern void sh7367_clock_init(void); -extern void sh7367_pinmux_init(void); -extern struct clk sh7367_extalb1_clk; -extern struct clk sh7367_extal2_clk; - -extern void sh7377_init_irq(void); -extern void sh7377_map_io(void); -extern void sh7377_add_early_devices(void); -extern void sh7377_add_standard_devices(void); -extern void sh7377_clock_init(void); -extern void sh7377_pinmux_init(void); -extern struct clk sh7377_extalc1_clk; -extern struct clk sh7377_extal2_clk; - extern void sh7372_init_irq(void); extern void sh7372_map_io(void); extern void sh7372_add_early_devices(void); diff --git a/arch/arm/mach-shmobile/include/mach/r8a7779.h b/arch/arm/mach-shmobile/include/mach/r8a7779.h index 499f52d2a4a1..8ab0cd6ad6b0 100644 --- a/arch/arm/mach-shmobile/include/mach/r8a7779.h +++ b/arch/arm/mach-shmobile/include/mach/r8a7779.h @@ -71,7 +71,7 @@ enum { GPIO_FN_A19, /* IPSR0 */ - GPIO_FN_PENC2, GPIO_FN_SCK0, GPIO_FN_PWM1, GPIO_FN_PWMFSW0, + GPIO_FN_USB_PENC2, GPIO_FN_SCK0, GPIO_FN_PWM1, GPIO_FN_PWMFSW0, GPIO_FN_SCIF_CLK, GPIO_FN_TCLK0_C, GPIO_FN_BS, GPIO_FN_SD1_DAT2, GPIO_FN_MMC0_D2, GPIO_FN_FD2, GPIO_FN_ATADIR0, GPIO_FN_SDSELF, GPIO_FN_HCTS1, GPIO_FN_TX4_C, GPIO_FN_A0, GPIO_FN_SD1_DAT3, diff --git a/arch/arm/mach-shmobile/include/mach/sh7367.h b/arch/arm/mach-shmobile/include/mach/sh7367.h deleted file mode 100644 index 52d0de686f68..000000000000 --- a/arch/arm/mach-shmobile/include/mach/sh7367.h +++ /dev/null @@ -1,332 +0,0 @@ -#ifndef __ASM_SH7367_H__ -#define __ASM_SH7367_H__ - -/* Pin Function Controller: - * GPIO_FN_xx - GPIO used to select pin function - * GPIO_PORTxx - GPIO mapped to real I/O pin on CPU - */ -enum { - /* 49-1 -> 49-6 (GPIO) */ - GPIO_PORT0, GPIO_PORT1, GPIO_PORT2, GPIO_PORT3, GPIO_PORT4, - GPIO_PORT5, GPIO_PORT6, GPIO_PORT7, GPIO_PORT8, GPIO_PORT9, - - GPIO_PORT10, GPIO_PORT11, GPIO_PORT12, GPIO_PORT13, GPIO_PORT14, - GPIO_PORT15, GPIO_PORT16, GPIO_PORT17, GPIO_PORT18, GPIO_PORT19, - - GPIO_PORT20, GPIO_PORT21, GPIO_PORT22, GPIO_PORT23, GPIO_PORT24, - GPIO_PORT25, GPIO_PORT26, GPIO_PORT27, GPIO_PORT28, GPIO_PORT29, - - GPIO_PORT30, GPIO_PORT31, GPIO_PORT32, GPIO_PORT33, GPIO_PORT34, - GPIO_PORT35, GPIO_PORT36, GPIO_PORT37, GPIO_PORT38, GPIO_PORT39, - - GPIO_PORT40, GPIO_PORT41, GPIO_PORT42, GPIO_PORT43, GPIO_PORT44, - GPIO_PORT45, GPIO_PORT46, GPIO_PORT47, GPIO_PORT48, GPIO_PORT49, - - GPIO_PORT50, GPIO_PORT51, GPIO_PORT52, GPIO_PORT53, GPIO_PORT54, - GPIO_PORT55, GPIO_PORT56, GPIO_PORT57, GPIO_PORT58, GPIO_PORT59, - - GPIO_PORT60, GPIO_PORT61, GPIO_PORT62, GPIO_PORT63, GPIO_PORT64, - GPIO_PORT65, GPIO_PORT66, GPIO_PORT67, GPIO_PORT68, GPIO_PORT69, - - GPIO_PORT70, GPIO_PORT71, GPIO_PORT72, GPIO_PORT73, GPIO_PORT74, - GPIO_PORT75, GPIO_PORT76, GPIO_PORT77, GPIO_PORT78, GPIO_PORT79, - - GPIO_PORT80, GPIO_PORT81, GPIO_PORT82, GPIO_PORT83, GPIO_PORT84, - GPIO_PORT85, GPIO_PORT86, GPIO_PORT87, GPIO_PORT88, GPIO_PORT89, - - GPIO_PORT90, GPIO_PORT91, GPIO_PORT92, GPIO_PORT93, GPIO_PORT94, - GPIO_PORT95, GPIO_PORT96, GPIO_PORT97, GPIO_PORT98, GPIO_PORT99, - - GPIO_PORT100, GPIO_PORT101, GPIO_PORT102, GPIO_PORT103, GPIO_PORT104, - GPIO_PORT105, GPIO_PORT106, GPIO_PORT107, GPIO_PORT108, GPIO_PORT109, - - GPIO_PORT110, GPIO_PORT111, GPIO_PORT112, GPIO_PORT113, GPIO_PORT114, - GPIO_PORT115, GPIO_PORT116, GPIO_PORT117, GPIO_PORT118, GPIO_PORT119, - - GPIO_PORT120, GPIO_PORT121, GPIO_PORT122, GPIO_PORT123, GPIO_PORT124, - GPIO_PORT125, GPIO_PORT126, GPIO_PORT127, GPIO_PORT128, GPIO_PORT129, - - GPIO_PORT130, GPIO_PORT131, GPIO_PORT132, GPIO_PORT133, GPIO_PORT134, - GPIO_PORT135, GPIO_PORT136, GPIO_PORT137, GPIO_PORT138, GPIO_PORT139, - - GPIO_PORT140, GPIO_PORT141, GPIO_PORT142, GPIO_PORT143, GPIO_PORT144, - GPIO_PORT145, GPIO_PORT146, GPIO_PORT147, GPIO_PORT148, GPIO_PORT149, - - GPIO_PORT150, GPIO_PORT151, GPIO_PORT152, GPIO_PORT153, GPIO_PORT154, - GPIO_PORT155, GPIO_PORT156, GPIO_PORT157, GPIO_PORT158, GPIO_PORT159, - - GPIO_PORT160, GPIO_PORT161, GPIO_PORT162, GPIO_PORT163, GPIO_PORT164, - GPIO_PORT165, GPIO_PORT166, GPIO_PORT167, GPIO_PORT168, GPIO_PORT169, - - GPIO_PORT170, GPIO_PORT171, GPIO_PORT172, GPIO_PORT173, GPIO_PORT174, - GPIO_PORT175, GPIO_PORT176, GPIO_PORT177, GPIO_PORT178, GPIO_PORT179, - - GPIO_PORT180, GPIO_PORT181, GPIO_PORT182, GPIO_PORT183, GPIO_PORT184, - GPIO_PORT185, GPIO_PORT186, GPIO_PORT187, GPIO_PORT188, GPIO_PORT189, - - GPIO_PORT190, GPIO_PORT191, GPIO_PORT192, GPIO_PORT193, GPIO_PORT194, - GPIO_PORT195, GPIO_PORT196, GPIO_PORT197, GPIO_PORT198, GPIO_PORT199, - - GPIO_PORT200, GPIO_PORT201, GPIO_PORT202, GPIO_PORT203, GPIO_PORT204, - GPIO_PORT205, GPIO_PORT206, GPIO_PORT207, GPIO_PORT208, GPIO_PORT209, - - GPIO_PORT210, GPIO_PORT211, GPIO_PORT212, GPIO_PORT213, GPIO_PORT214, - GPIO_PORT215, GPIO_PORT216, GPIO_PORT217, GPIO_PORT218, GPIO_PORT219, - - GPIO_PORT220, GPIO_PORT221, GPIO_PORT222, GPIO_PORT223, GPIO_PORT224, - GPIO_PORT225, GPIO_PORT226, GPIO_PORT227, GPIO_PORT228, GPIO_PORT229, - - GPIO_PORT230, GPIO_PORT231, GPIO_PORT232, GPIO_PORT233, GPIO_PORT234, - GPIO_PORT235, GPIO_PORT236, GPIO_PORT237, GPIO_PORT238, GPIO_PORT239, - - GPIO_PORT240, GPIO_PORT241, GPIO_PORT242, GPIO_PORT243, GPIO_PORT244, - GPIO_PORT245, GPIO_PORT246, GPIO_PORT247, GPIO_PORT248, GPIO_PORT249, - - GPIO_PORT250, GPIO_PORT251, GPIO_PORT252, GPIO_PORT253, GPIO_PORT254, - GPIO_PORT255, GPIO_PORT256, GPIO_PORT257, GPIO_PORT258, GPIO_PORT259, - - GPIO_PORT260, GPIO_PORT261, GPIO_PORT262, GPIO_PORT263, GPIO_PORT264, - GPIO_PORT265, GPIO_PORT266, GPIO_PORT267, GPIO_PORT268, GPIO_PORT269, - - GPIO_PORT270, GPIO_PORT271, GPIO_PORT272, - - /* Special Pull-up / Pull-down Functions */ - GPIO_FN_PORT48_KEYIN0_PU, GPIO_FN_PORT49_KEYIN1_PU, - GPIO_FN_PORT50_KEYIN2_PU, GPIO_FN_PORT55_KEYIN3_PU, - GPIO_FN_PORT56_KEYIN4_PU, GPIO_FN_PORT57_KEYIN5_PU, - GPIO_FN_PORT58_KEYIN6_PU, - - /* 49-1 (FN) */ - GPIO_FN_VBUS0, GPIO_FN_CPORT0, GPIO_FN_CPORT1, GPIO_FN_CPORT2, - GPIO_FN_CPORT3, GPIO_FN_CPORT4, GPIO_FN_CPORT5, GPIO_FN_CPORT6, - GPIO_FN_CPORT7, GPIO_FN_CPORT8, GPIO_FN_CPORT9, GPIO_FN_CPORT10, - GPIO_FN_CPORT11, GPIO_FN_SIN2, GPIO_FN_CPORT12, GPIO_FN_XCTS2, - GPIO_FN_CPORT13, GPIO_FN_RFSPO4, GPIO_FN_CPORT14, GPIO_FN_RFSPO5, - GPIO_FN_CPORT15, GPIO_FN_CPORT16, GPIO_FN_CPORT17, GPIO_FN_SOUT2, - GPIO_FN_CPORT18, GPIO_FN_XRTS2, GPIO_FN_CPORT19, GPIO_FN_CPORT20, - GPIO_FN_RFSPO6, GPIO_FN_CPORT21, GPIO_FN_STATUS0, GPIO_FN_CPORT22, - GPIO_FN_STATUS1, GPIO_FN_CPORT23, GPIO_FN_STATUS2, GPIO_FN_RFSPO7, - GPIO_FN_MPORT0, GPIO_FN_MPORT1, GPIO_FN_B_SYNLD1, GPIO_FN_B_SYNLD2, - GPIO_FN_XMAINPS, GPIO_FN_XDIVPS, GPIO_FN_XIDRST, GPIO_FN_IDCLK, - GPIO_FN_IDIO, GPIO_FN_SOUT1, GPIO_FN_SCIFA4_TXD, - GPIO_FN_M02_BERDAT, GPIO_FN_SIN1, GPIO_FN_SCIFA4_RXD, GPIO_FN_XWUP, - GPIO_FN_XRTS1, GPIO_FN_SCIFA4_RTS, GPIO_FN_M03_BERCLK, - GPIO_FN_XCTS1, GPIO_FN_SCIFA4_CTS, - - /* 49-2 (FN) */ - GPIO_FN_HSU_IQ_AGC6, GPIO_FN_MFG2_IN2, GPIO_FN_MSIOF2_MCK0, - GPIO_FN_HSU_IQ_AGC5, GPIO_FN_MFG2_IN1, GPIO_FN_MSIOF2_MCK1, - GPIO_FN_HSU_IQ_AGC4, GPIO_FN_MSIOF2_RSYNC, - GPIO_FN_HSU_IQ_AGC3, GPIO_FN_MFG2_OUT1, GPIO_FN_MSIOF2_RSCK, - GPIO_FN_HSU_IQ_AGC2, GPIO_FN_PORT42_KEYOUT0, - GPIO_FN_HSU_IQ_AGC1, GPIO_FN_PORT43_KEYOUT1, - GPIO_FN_HSU_IQ_AGC0, GPIO_FN_PORT44_KEYOUT2, - GPIO_FN_HSU_IQ_AGC_ST, GPIO_FN_PORT45_KEYOUT3, - GPIO_FN_HSU_IQ_PDO, GPIO_FN_PORT46_KEYOUT4, - GPIO_FN_HSU_IQ_PYO, GPIO_FN_PORT47_KEYOUT5, - GPIO_FN_HSU_EN_TXMUX_G3MO, GPIO_FN_PORT48_KEYIN0, - GPIO_FN_HSU_I_TXMUX_G3MO, GPIO_FN_PORT49_KEYIN1, - GPIO_FN_HSU_Q_TXMUX_G3MO, GPIO_FN_PORT50_KEYIN2, - GPIO_FN_HSU_SYO, GPIO_FN_PORT51_MSIOF2_TSYNC, - GPIO_FN_HSU_SDO, GPIO_FN_PORT52_MSIOF2_TSCK, - GPIO_FN_HSU_TGTTI_G3MO, GPIO_FN_PORT53_MSIOF2_TXD, - GPIO_FN_B_TIME_STAMP, GPIO_FN_PORT54_MSIOF2_RXD, - GPIO_FN_HSU_SDI, GPIO_FN_PORT55_KEYIN3, - GPIO_FN_HSU_SCO, GPIO_FN_PORT56_KEYIN4, - GPIO_FN_HSU_DREQ, GPIO_FN_PORT57_KEYIN5, - GPIO_FN_HSU_DACK, GPIO_FN_PORT58_KEYIN6, - GPIO_FN_HSU_CLK61M, GPIO_FN_PORT59_MSIOF2_SS1, - GPIO_FN_HSU_XRST, GPIO_FN_PORT60_MSIOF2_SS2, - GPIO_FN_PCMCLKO, GPIO_FN_SYNC8KO, GPIO_FN_DNPCM_A, GPIO_FN_UPPCM_A, - GPIO_FN_XTALB1L, - GPIO_FN_GPS_AGC1, GPIO_FN_SCIFA0_RTS, - GPIO_FN_GPS_AGC2, GPIO_FN_SCIFA0_SCK, - GPIO_FN_GPS_AGC3, GPIO_FN_SCIFA0_TXD, - GPIO_FN_GPS_AGC4, GPIO_FN_SCIFA0_RXD, - GPIO_FN_GPS_PWRD, GPIO_FN_SCIFA0_CTS, - GPIO_FN_GPS_IM, GPIO_FN_GPS_IS, GPIO_FN_GPS_QM, GPIO_FN_GPS_QS, - GPIO_FN_SIUBOMC, GPIO_FN_TPU2TO0, - GPIO_FN_SIUCKB, GPIO_FN_TPU2TO1, - GPIO_FN_SIUBOLR, GPIO_FN_BBIF2_TSYNC, GPIO_FN_TPU2TO2, - GPIO_FN_SIUBOBT, GPIO_FN_BBIF2_TSCK, GPIO_FN_TPU2TO3, - GPIO_FN_SIUBOSLD, GPIO_FN_BBIF2_TXD, GPIO_FN_TPU3TO0, - GPIO_FN_SIUBILR, GPIO_FN_TPU3TO1, - GPIO_FN_SIUBIBT, GPIO_FN_TPU3TO2, - GPIO_FN_SIUBISLD, GPIO_FN_TPU3TO3, - GPIO_FN_NMI, GPIO_FN_TPU4TO0, - GPIO_FN_DNPCM_M, GPIO_FN_TPU4TO1, GPIO_FN_TPU4TO2, GPIO_FN_TPU4TO3, - GPIO_FN_IRQ_TMPB, - GPIO_FN_PWEN, GPIO_FN_MFG1_OUT1, - GPIO_FN_OVCN, GPIO_FN_MFG1_IN1, - GPIO_FN_OVCN2, GPIO_FN_MFG1_IN2, - - /* 49-3 (FN) */ - GPIO_FN_RFSPO1, GPIO_FN_RFSPO2, GPIO_FN_RFSPO3, GPIO_FN_PORT93_VIO_CKO2, - GPIO_FN_USBTERM, GPIO_FN_EXTLP, GPIO_FN_IDIN, - GPIO_FN_SCIFA5_CTS, GPIO_FN_MFG0_IN1, - GPIO_FN_SCIFA5_RTS, GPIO_FN_MFG0_IN2, - GPIO_FN_SCIFA5_RXD, - GPIO_FN_SCIFA5_TXD, - GPIO_FN_SCIFA5_SCK, GPIO_FN_MFG0_OUT1, - GPIO_FN_A0_EA0, GPIO_FN_BS, - GPIO_FN_A14_EA14, GPIO_FN_PORT102_KEYOUT0, - GPIO_FN_A15_EA15, GPIO_FN_PORT103_KEYOUT1, GPIO_FN_DV_CLKOL, - GPIO_FN_A16_EA16, GPIO_FN_PORT104_KEYOUT2, - GPIO_FN_DV_VSYNCL, GPIO_FN_MSIOF0_SS1, - GPIO_FN_A17_EA17, GPIO_FN_PORT105_KEYOUT3, - GPIO_FN_DV_HSYNCL, GPIO_FN_MSIOF0_TSYNC, - GPIO_FN_A18_EA18, GPIO_FN_PORT106_KEYOUT4, - GPIO_FN_DV_DL0, GPIO_FN_MSIOF0_TSCK, - GPIO_FN_A19_EA19, GPIO_FN_PORT107_KEYOUT5, - GPIO_FN_DV_DL1, GPIO_FN_MSIOF0_TXD, - GPIO_FN_A20_EA20, GPIO_FN_PORT108_KEYIN0, - GPIO_FN_DV_DL2, GPIO_FN_MSIOF0_RSCK, - GPIO_FN_A21_EA21, GPIO_FN_PORT109_KEYIN1, - GPIO_FN_DV_DL3, GPIO_FN_MSIOF0_RSYNC, - GPIO_FN_A22_EA22, GPIO_FN_PORT110_KEYIN2, - GPIO_FN_DV_DL4, GPIO_FN_MSIOF0_MCK0, - GPIO_FN_A23_EA23, GPIO_FN_PORT111_KEYIN3, - GPIO_FN_DV_DL5, GPIO_FN_MSIOF0_MCK1, - GPIO_FN_A24_EA24, GPIO_FN_PORT112_KEYIN4, - GPIO_FN_DV_DL6, GPIO_FN_MSIOF0_RXD, - GPIO_FN_A25_EA25, GPIO_FN_PORT113_KEYIN5, - GPIO_FN_DV_DL7, GPIO_FN_MSIOF0_SS2, - GPIO_FN_A26, GPIO_FN_PORT113_KEYIN6, GPIO_FN_DV_CLKIL, - GPIO_FN_D0_ED0_NAF0, GPIO_FN_D1_ED1_NAF1, GPIO_FN_D2_ED2_NAF2, - GPIO_FN_D3_ED3_NAF3, GPIO_FN_D4_ED4_NAF4, GPIO_FN_D5_ED5_NAF5, - GPIO_FN_D6_ED6_NAF6, GPIO_FN_D7_ED7_NAF7, GPIO_FN_D8_ED8_NAF8, - GPIO_FN_D9_ED9_NAF9, GPIO_FN_D10_ED10_NAF10, GPIO_FN_D11_ED11_NAF11, - GPIO_FN_D12_ED12_NAF12, GPIO_FN_D13_ED13_NAF13, - GPIO_FN_D14_ED14_NAF14, GPIO_FN_D15_ED15_NAF15, - GPIO_FN_CS4, GPIO_FN_CS5A, GPIO_FN_CS5B, GPIO_FN_FCE1, - GPIO_FN_CS6B, GPIO_FN_XCS2, GPIO_FN_FCE0, GPIO_FN_CS6A, - GPIO_FN_DACK0, GPIO_FN_WAIT, GPIO_FN_DREQ0, GPIO_FN_RD_XRD, - GPIO_FN_A27, GPIO_FN_RDWR_XWE, GPIO_FN_WE0_XWR0_FWE, - GPIO_FN_WE1_XWR1, GPIO_FN_FRB, GPIO_FN_CKO, - GPIO_FN_NBRSTOUT, GPIO_FN_NBRST, - - /* 49-4 (FN) */ - GPIO_FN_RFSPO0, GPIO_FN_PORT146_VIO_CKO2, GPIO_FN_TSTMD, - GPIO_FN_VIO_VD, GPIO_FN_VIO_HD, - GPIO_FN_VIO_D0, GPIO_FN_VIO_D1, GPIO_FN_VIO_D2, - GPIO_FN_VIO_D3, GPIO_FN_VIO_D4, GPIO_FN_VIO_D5, - GPIO_FN_VIO_D6, GPIO_FN_VIO_D7, GPIO_FN_VIO_D8, - GPIO_FN_VIO_D9, GPIO_FN_VIO_D10, GPIO_FN_VIO_D11, - GPIO_FN_VIO_D12, GPIO_FN_VIO_D13, GPIO_FN_VIO_D14, - GPIO_FN_VIO_D15, GPIO_FN_VIO_CLK, GPIO_FN_VIO_FIELD, - GPIO_FN_VIO_CKO, - GPIO_FN_MFG3_IN1, GPIO_FN_MFG3_IN2, - GPIO_FN_M9_SLCD_A01, GPIO_FN_MFG3_OUT1, GPIO_FN_TPU0TO0, - GPIO_FN_M10_SLCD_CK1, GPIO_FN_MFG4_IN1, GPIO_FN_TPU0TO1, - GPIO_FN_M11_SLCD_SO1, GPIO_FN_MFG4_IN2, GPIO_FN_TPU0TO2, - GPIO_FN_M12_SLCD_CE1, GPIO_FN_MFG4_OUT1, GPIO_FN_TPU0TO3, - GPIO_FN_LCDD0, GPIO_FN_PORT175_KEYOUT0, GPIO_FN_DV_D0, - GPIO_FN_SIUCKA, GPIO_FN_MFG0_OUT2, - GPIO_FN_LCDD1, GPIO_FN_PORT176_KEYOUT1, GPIO_FN_DV_D1, - GPIO_FN_SIUAOLR, GPIO_FN_BBIF2_TSYNC1, - GPIO_FN_LCDD2, GPIO_FN_PORT177_KEYOUT2, GPIO_FN_DV_D2, - GPIO_FN_SIUAOBT, GPIO_FN_BBIF2_TSCK1, - GPIO_FN_LCDD3, GPIO_FN_PORT178_KEYOUT3, GPIO_FN_DV_D3, - GPIO_FN_SIUAOSLD, GPIO_FN_BBIF2_TXD1, - GPIO_FN_LCDD4, GPIO_FN_PORT179_KEYOUT4, GPIO_FN_DV_D4, - GPIO_FN_SIUAISPD, GPIO_FN_MFG1_OUT2, - GPIO_FN_LCDD5, GPIO_FN_PORT180_KEYOUT5, GPIO_FN_DV_D5, - GPIO_FN_SIUAILR, GPIO_FN_MFG2_OUT2, - GPIO_FN_LCDD6, GPIO_FN_DV_D6, - GPIO_FN_SIUAIBT, GPIO_FN_MFG3_OUT2, GPIO_FN_XWR2, - GPIO_FN_LCDD7, GPIO_FN_DV_D7, - GPIO_FN_SIUAISLD, GPIO_FN_MFG4_OUT2, GPIO_FN_XWR3, - GPIO_FN_LCDD8, GPIO_FN_DV_D8, GPIO_FN_D16, GPIO_FN_ED16, - GPIO_FN_LCDD9, GPIO_FN_DV_D9, GPIO_FN_D17, GPIO_FN_ED17, - GPIO_FN_LCDD10, GPIO_FN_DV_D10, GPIO_FN_D18, GPIO_FN_ED18, - GPIO_FN_LCDD11, GPIO_FN_DV_D11, GPIO_FN_D19, GPIO_FN_ED19, - GPIO_FN_LCDD12, GPIO_FN_DV_D12, GPIO_FN_D20, GPIO_FN_ED20, - GPIO_FN_LCDD13, GPIO_FN_DV_D13, GPIO_FN_D21, GPIO_FN_ED21, - GPIO_FN_LCDD14, GPIO_FN_DV_D14, GPIO_FN_D22, GPIO_FN_ED22, - GPIO_FN_LCDD15, GPIO_FN_DV_D15, GPIO_FN_D23, GPIO_FN_ED23, - GPIO_FN_LCDD16, GPIO_FN_DV_HSYNC, GPIO_FN_D24, GPIO_FN_ED24, - GPIO_FN_LCDD17, GPIO_FN_DV_VSYNC, GPIO_FN_D25, GPIO_FN_ED25, - GPIO_FN_LCDD18, GPIO_FN_DREQ2, GPIO_FN_MSIOF0L_TSCK, - GPIO_FN_D26, GPIO_FN_ED26, - GPIO_FN_LCDD19, GPIO_FN_MSIOF0L_TSYNC, - GPIO_FN_D27, GPIO_FN_ED27, - GPIO_FN_LCDD20, GPIO_FN_TS_SPSYNC1, GPIO_FN_MSIOF0L_MCK0, - GPIO_FN_D28, GPIO_FN_ED28, - GPIO_FN_LCDD21, GPIO_FN_TS_SDAT1, GPIO_FN_MSIOF0L_MCK1, - GPIO_FN_D29, GPIO_FN_ED29, - GPIO_FN_LCDD22, GPIO_FN_TS_SDEN1, GPIO_FN_MSIOF0L_SS1, - GPIO_FN_D30, GPIO_FN_ED30, - GPIO_FN_LCDD23, GPIO_FN_TS_SCK1, GPIO_FN_MSIOF0L_SS2, - GPIO_FN_D31, GPIO_FN_ED31, - GPIO_FN_LCDDCK, GPIO_FN_LCDWR, GPIO_FN_DV_CKO, GPIO_FN_SIUAOSPD, - GPIO_FN_LCDRD, GPIO_FN_DACK2, GPIO_FN_MSIOF0L_RSYNC, - - - /* 49-5 (FN) */ - GPIO_FN_LCDHSYN, GPIO_FN_LCDCS, GPIO_FN_LCDCS2, GPIO_FN_DACK3, - GPIO_FN_LCDDISP, GPIO_FN_LCDRS, GPIO_FN_DREQ3, GPIO_FN_MSIOF0L_RSCK, - GPIO_FN_LCDCSYN, GPIO_FN_LCDCSYN2, GPIO_FN_DV_CKI, - GPIO_FN_LCDLCLK, GPIO_FN_DREQ1, GPIO_FN_MSIOF0L_RXD, - GPIO_FN_LCDDON, GPIO_FN_LCDDON2, GPIO_FN_DACK1, GPIO_FN_MSIOF0L_TXD, - GPIO_FN_VIO_DR0, GPIO_FN_VIO_DR1, GPIO_FN_VIO_DR2, GPIO_FN_VIO_DR3, - GPIO_FN_VIO_DR4, GPIO_FN_VIO_DR5, GPIO_FN_VIO_DR6, GPIO_FN_VIO_DR7, - GPIO_FN_VIO_VDR, GPIO_FN_VIO_HDR, - GPIO_FN_VIO_CLKR, GPIO_FN_VIO_CKOR, - GPIO_FN_SCIFA1_TXD, GPIO_FN_GPS_PGFA0, - GPIO_FN_SCIFA1_SCK, GPIO_FN_GPS_PGFA1, - GPIO_FN_SCIFA1_RTS, GPIO_FN_GPS_EPPSINMON, - GPIO_FN_SCIFA1_RXD, GPIO_FN_SCIFA1_CTS, - GPIO_FN_MSIOF1_TXD, GPIO_FN_SCIFA1_TXD2, GPIO_FN_GPS_TXD, - GPIO_FN_MSIOF1_TSYNC, GPIO_FN_SCIFA1_CTS2, GPIO_FN_I2C_SDA2, - GPIO_FN_MSIOF1_TSCK, GPIO_FN_SCIFA1_SCK2, - GPIO_FN_MSIOF1_RXD, GPIO_FN_SCIFA1_RXD2, GPIO_FN_GPS_RXD, - GPIO_FN_MSIOF1_RSCK, GPIO_FN_SCIFA1_RTS2, - GPIO_FN_MSIOF1_RSYNC, GPIO_FN_I2C_SCL2, - GPIO_FN_MSIOF1_MCK0, GPIO_FN_MSIOF1_MCK1, - GPIO_FN_MSIOF1_SS1, GPIO_FN_EDBGREQ3, - GPIO_FN_MSIOF1_SS2, - GPIO_FN_PORT236_IROUT, GPIO_FN_IRDA_OUT, - GPIO_FN_IRDA_IN, GPIO_FN_IRDA_FIRSEL, - GPIO_FN_TPU1TO0, GPIO_FN_TS_SPSYNC3, - GPIO_FN_TPU1TO1, GPIO_FN_TS_SDAT3, - GPIO_FN_TPU1TO2, GPIO_FN_TS_SDEN3, GPIO_FN_PORT241_MSIOF2_SS1, - GPIO_FN_TPU1TO3, GPIO_FN_PORT242_MSIOF2_TSCK, - GPIO_FN_M13_BSW, GPIO_FN_PORT243_MSIOF2_TSYNC, - GPIO_FN_M14_GSW, GPIO_FN_PORT244_MSIOF2_TXD, - GPIO_FN_PORT245_IROUT, GPIO_FN_M15_RSW, - GPIO_FN_SOUT3, GPIO_FN_SCIFA2_TXD1, - GPIO_FN_SIN3, GPIO_FN_SCIFA2_RXD1, - GPIO_FN_XRTS3, GPIO_FN_SCIFA2_RTS1, GPIO_FN_PORT248_MSIOF2_SS2, - GPIO_FN_XCTS3, GPIO_FN_SCIFA2_CTS1, GPIO_FN_PORT249_MSIOF2_RXD, - GPIO_FN_DINT, GPIO_FN_SCIFA2_SCK1, GPIO_FN_TS_SCK3, - GPIO_FN_SDHICLK0, GPIO_FN_TCK2, - GPIO_FN_SDHICD0, - GPIO_FN_SDHID0_0, GPIO_FN_TMS2, - GPIO_FN_SDHID0_1, GPIO_FN_TDO2, - GPIO_FN_SDHID0_2, GPIO_FN_TDI2, - GPIO_FN_SDHID0_3, GPIO_FN_RTCK2, - - /* 49-6 (FN) */ - GPIO_FN_SDHICMD0, GPIO_FN_TRST2, - GPIO_FN_SDHIWP0, GPIO_FN_EDBGREQ2, - GPIO_FN_SDHICLK1, GPIO_FN_TCK3, - GPIO_FN_SDHID1_0, GPIO_FN_M11_SLCD_SO2, - GPIO_FN_TS_SPSYNC2, GPIO_FN_TMS3, - GPIO_FN_SDHID1_1, GPIO_FN_M9_SLCD_AO2, - GPIO_FN_TS_SDAT2, GPIO_FN_TDO3, - GPIO_FN_SDHID1_2, GPIO_FN_M10_SLCD_CK2, - GPIO_FN_TS_SDEN2, GPIO_FN_TDI3, - GPIO_FN_SDHID1_3, GPIO_FN_M12_SLCD_CE2, - GPIO_FN_TS_SCK2, GPIO_FN_RTCK3, - GPIO_FN_SDHICMD1, GPIO_FN_TRST3, - GPIO_FN_SDHICLK2, GPIO_FN_SCIFB_SCK, - GPIO_FN_SDHID2_0, GPIO_FN_SCIFB_TXD, - GPIO_FN_SDHID2_1, GPIO_FN_SCIFB_CTS, - GPIO_FN_SDHID2_2, GPIO_FN_SCIFB_RXD, - GPIO_FN_SDHID2_3, GPIO_FN_SCIFB_RTS, - GPIO_FN_SDHICMD2, - GPIO_FN_RESETOUTS, - GPIO_FN_DIVLOCK, -}; - -#endif /* __ASM_SH7367_H__ */ diff --git a/arch/arm/mach-shmobile/include/mach/sh7372.h b/arch/arm/mach-shmobile/include/mach/sh7372.h index eb98b45c5089..b582facc1cf6 100644 --- a/arch/arm/mach-shmobile/include/mach/sh7372.h +++ b/arch/arm/mach-shmobile/include/mach/sh7372.h @@ -452,6 +452,10 @@ enum { SHDMA_SLAVE_SCIF5_RX, SHDMA_SLAVE_SCIF6_TX, SHDMA_SLAVE_SCIF6_RX, + SHDMA_SLAVE_FLCTL0_TX, + SHDMA_SLAVE_FLCTL0_RX, + SHDMA_SLAVE_FLCTL1_TX, + SHDMA_SLAVE_FLCTL1_RX, SHDMA_SLAVE_SDHI0_RX, SHDMA_SLAVE_SDHI0_TX, SHDMA_SLAVE_SDHI1_RX, @@ -473,10 +477,6 @@ extern struct clk sh7372_extal2_clk; extern struct clk sh7372_dv_clki_clk; extern struct clk sh7372_dv_clki_div2_clk; extern struct clk sh7372_pllc2_clk; -extern struct clk sh7372_fsiack_clk; -extern struct clk sh7372_fsibck_clk; -extern struct clk sh7372_fsidiva_clk; -extern struct clk sh7372_fsidivb_clk; extern void sh7372_intcs_suspend(void); extern void sh7372_intcs_resume(void); diff --git a/arch/arm/mach-shmobile/include/mach/sh7377.h b/arch/arm/mach-shmobile/include/mach/sh7377.h deleted file mode 100644 index f580e227dd1c..000000000000 --- a/arch/arm/mach-shmobile/include/mach/sh7377.h +++ /dev/null @@ -1,360 +0,0 @@ -#ifndef __ASM_SH7377_H__ -#define __ASM_SH7377_H__ - -/* Pin Function Controller: - * GPIO_FN_xx - GPIO used to select pin function - * GPIO_PORTxx - GPIO mapped to real I/O pin on CPU - */ -enum { - /* 55-1 -> 55-5 (GPIO) */ - GPIO_PORT0, GPIO_PORT1, GPIO_PORT2, GPIO_PORT3, GPIO_PORT4, - GPIO_PORT5, GPIO_PORT6, GPIO_PORT7, GPIO_PORT8, GPIO_PORT9, - - GPIO_PORT10, GPIO_PORT11, GPIO_PORT12, GPIO_PORT13, GPIO_PORT14, - GPIO_PORT15, GPIO_PORT16, GPIO_PORT17, GPIO_PORT18, GPIO_PORT19, - - GPIO_PORT20, GPIO_PORT21, GPIO_PORT22, GPIO_PORT23, GPIO_PORT24, - GPIO_PORT25, GPIO_PORT26, GPIO_PORT27, GPIO_PORT28, GPIO_PORT29, - - GPIO_PORT30, GPIO_PORT31, GPIO_PORT32, GPIO_PORT33, GPIO_PORT34, - GPIO_PORT35, GPIO_PORT36, GPIO_PORT37, GPIO_PORT38, GPIO_PORT39, - - GPIO_PORT40, GPIO_PORT41, GPIO_PORT42, GPIO_PORT43, GPIO_PORT44, - GPIO_PORT45, GPIO_PORT46, GPIO_PORT47, GPIO_PORT48, GPIO_PORT49, - - GPIO_PORT50, GPIO_PORT51, GPIO_PORT52, GPIO_PORT53, GPIO_PORT54, - GPIO_PORT55, GPIO_PORT56, GPIO_PORT57, GPIO_PORT58, GPIO_PORT59, - - GPIO_PORT60, GPIO_PORT61, GPIO_PORT62, GPIO_PORT63, GPIO_PORT64, - GPIO_PORT65, GPIO_PORT66, GPIO_PORT67, GPIO_PORT68, GPIO_PORT69, - - GPIO_PORT70, GPIO_PORT71, GPIO_PORT72, GPIO_PORT73, GPIO_PORT74, - GPIO_PORT75, GPIO_PORT76, GPIO_PORT77, GPIO_PORT78, GPIO_PORT79, - - GPIO_PORT80, GPIO_PORT81, GPIO_PORT82, GPIO_PORT83, GPIO_PORT84, - GPIO_PORT85, GPIO_PORT86, GPIO_PORT87, GPIO_PORT88, GPIO_PORT89, - - GPIO_PORT90, GPIO_PORT91, GPIO_PORT92, GPIO_PORT93, GPIO_PORT94, - GPIO_PORT95, GPIO_PORT96, GPIO_PORT97, GPIO_PORT98, GPIO_PORT99, - - GPIO_PORT100, GPIO_PORT101, GPIO_PORT102, GPIO_PORT103, GPIO_PORT104, - GPIO_PORT105, GPIO_PORT106, GPIO_PORT107, GPIO_PORT108, GPIO_PORT109, - - GPIO_PORT110, GPIO_PORT111, GPIO_PORT112, GPIO_PORT113, GPIO_PORT114, - GPIO_PORT115, GPIO_PORT116, GPIO_PORT117, GPIO_PORT118, - - GPIO_PORT128, GPIO_PORT129, - - GPIO_PORT130, GPIO_PORT131, GPIO_PORT132, GPIO_PORT133, GPIO_PORT134, - GPIO_PORT135, GPIO_PORT136, GPIO_PORT137, GPIO_PORT138, GPIO_PORT139, - - GPIO_PORT140, GPIO_PORT141, GPIO_PORT142, GPIO_PORT143, GPIO_PORT144, - GPIO_PORT145, GPIO_PORT146, GPIO_PORT147, GPIO_PORT148, GPIO_PORT149, - - GPIO_PORT150, GPIO_PORT151, GPIO_PORT152, GPIO_PORT153, GPIO_PORT154, - GPIO_PORT155, GPIO_PORT156, GPIO_PORT157, GPIO_PORT158, GPIO_PORT159, - - GPIO_PORT160, GPIO_PORT161, GPIO_PORT162, GPIO_PORT163, GPIO_PORT164, - - GPIO_PORT192, GPIO_PORT193, GPIO_PORT194, - GPIO_PORT195, GPIO_PORT196, GPIO_PORT197, GPIO_PORT198, GPIO_PORT199, - - GPIO_PORT200, GPIO_PORT201, GPIO_PORT202, GPIO_PORT203, GPIO_PORT204, - GPIO_PORT205, GPIO_PORT206, GPIO_PORT207, GPIO_PORT208, GPIO_PORT209, - - GPIO_PORT210, GPIO_PORT211, GPIO_PORT212, GPIO_PORT213, GPIO_PORT214, - GPIO_PORT215, GPIO_PORT216, GPIO_PORT217, GPIO_PORT218, GPIO_PORT219, - - GPIO_PORT220, GPIO_PORT221, GPIO_PORT222, GPIO_PORT223, GPIO_PORT224, - GPIO_PORT225, GPIO_PORT226, GPIO_PORT227, GPIO_PORT228, GPIO_PORT229, - - GPIO_PORT230, GPIO_PORT231, GPIO_PORT232, GPIO_PORT233, GPIO_PORT234, - GPIO_PORT235, GPIO_PORT236, GPIO_PORT237, GPIO_PORT238, GPIO_PORT239, - - GPIO_PORT240, GPIO_PORT241, GPIO_PORT242, GPIO_PORT243, GPIO_PORT244, - GPIO_PORT245, GPIO_PORT246, GPIO_PORT247, GPIO_PORT248, GPIO_PORT249, - - GPIO_PORT250, GPIO_PORT251, GPIO_PORT252, GPIO_PORT253, GPIO_PORT254, - GPIO_PORT255, GPIO_PORT256, GPIO_PORT257, GPIO_PORT258, GPIO_PORT259, - - GPIO_PORT260, GPIO_PORT261, GPIO_PORT262, GPIO_PORT263, GPIO_PORT264, - - /* Special Pull-up / Pull-down Functions */ - GPIO_FN_PORT66_KEYIN0_PU, GPIO_FN_PORT67_KEYIN1_PU, - GPIO_FN_PORT68_KEYIN2_PU, GPIO_FN_PORT69_KEYIN3_PU, - GPIO_FN_PORT70_KEYIN4_PU, GPIO_FN_PORT71_KEYIN5_PU, - GPIO_FN_PORT72_KEYIN6_PU, - - /* 55-1 (FN) */ - GPIO_FN_VBUS_0, - GPIO_FN_CPORT0, - GPIO_FN_CPORT1, - GPIO_FN_CPORT2, - GPIO_FN_CPORT3, - GPIO_FN_CPORT4, - GPIO_FN_CPORT5, - GPIO_FN_CPORT6, - GPIO_FN_CPORT7, - GPIO_FN_CPORT8, - GPIO_FN_CPORT9, - GPIO_FN_CPORT10, - GPIO_FN_CPORT11, GPIO_FN_SIN2, - GPIO_FN_CPORT12, GPIO_FN_XCTS2, - GPIO_FN_CPORT13, GPIO_FN_RFSPO4, - GPIO_FN_CPORT14, GPIO_FN_RFSPO5, - GPIO_FN_CPORT15, GPIO_FN_SCIFA0_SCK, GPIO_FN_GPS_AGC2, - GPIO_FN_CPORT16, GPIO_FN_SCIFA0_TXD, GPIO_FN_GPS_AGC3, - GPIO_FN_CPORT17_IC_OE, GPIO_FN_SOUT2, - GPIO_FN_CPORT18, GPIO_FN_XRTS2, GPIO_FN_PORT19_VIO_CKO2, - GPIO_FN_CPORT19_MPORT1, - GPIO_FN_CPORT20, GPIO_FN_RFSPO6, - GPIO_FN_CPORT21, GPIO_FN_STATUS0, - GPIO_FN_CPORT22, GPIO_FN_STATUS1, - GPIO_FN_CPORT23, GPIO_FN_STATUS2, GPIO_FN_RFSPO7, - GPIO_FN_B_SYNLD1, - GPIO_FN_B_SYNLD2, GPIO_FN_SYSENMSK, - GPIO_FN_XMAINPS, - GPIO_FN_XDIVPS, - GPIO_FN_XIDRST, - GPIO_FN_IDCLK, GPIO_FN_IC_DP, - GPIO_FN_IDIO, GPIO_FN_IC_DM, - GPIO_FN_SOUT1, GPIO_FN_SCIFA4_TXD, GPIO_FN_M02_BERDAT, - GPIO_FN_SIN1, GPIO_FN_SCIFA4_RXD, GPIO_FN_XWUP, - GPIO_FN_XRTS1, GPIO_FN_SCIFA4_RTS, GPIO_FN_M03_BERCLK, - GPIO_FN_XCTS1, GPIO_FN_SCIFA4_CTS, - GPIO_FN_PCMCLKO, - GPIO_FN_SYNC8KO, - - /* 55-2 (FN) */ - GPIO_FN_DNPCM_A, - GPIO_FN_UPPCM_A, - GPIO_FN_VACK, - GPIO_FN_XTALB1L, - GPIO_FN_GPS_AGC1, GPIO_FN_SCIFA0_RTS, - GPIO_FN_GPS_AGC4, GPIO_FN_SCIFA0_RXD, - GPIO_FN_GPS_PWRDOWN, GPIO_FN_SCIFA0_CTS, - GPIO_FN_GPS_IM, - GPIO_FN_GPS_IS, - GPIO_FN_GPS_QM, - GPIO_FN_GPS_QS, - GPIO_FN_FMSOCK, GPIO_FN_PORT49_IRDA_OUT, GPIO_FN_PORT49_IROUT, - GPIO_FN_FMSOOLR, GPIO_FN_BBIF2_TSYNC2, GPIO_FN_TPU2TO2, GPIO_FN_IPORT3, - GPIO_FN_FMSIOLR, - GPIO_FN_FMSOOBT, GPIO_FN_BBIF2_TSCK2, GPIO_FN_TPU2TO3, GPIO_FN_OPORT1, - GPIO_FN_FMSIOBT, - GPIO_FN_FMSOSLD, GPIO_FN_BBIF2_TXD2, GPIO_FN_OPORT2, - GPIO_FN_FMSOILR, GPIO_FN_PORT53_IRDA_IN, GPIO_FN_TPU3TO3, - GPIO_FN_OPORT3, GPIO_FN_FMSIILR, - GPIO_FN_FMSOIBT, GPIO_FN_PORT54_IRDA_FIRSEL, GPIO_FN_TPU3TO2, - GPIO_FN_FMSIIBT, - GPIO_FN_FMSISLD, GPIO_FN_MFG0_OUT1, GPIO_FN_TPU0TO0, - GPIO_FN_A0_EA0, GPIO_FN_BS, - GPIO_FN_A12_EA12, GPIO_FN_PORT58_VIO_CKOR, GPIO_FN_TPU4TO2, - GPIO_FN_A13_EA13, GPIO_FN_PORT59_IROUT, GPIO_FN_MFG0_OUT2, - GPIO_FN_TPU0TO1, - GPIO_FN_A14_EA14, GPIO_FN_PORT60_KEYOUT5, - GPIO_FN_A15_EA15, GPIO_FN_PORT61_KEYOUT4, - GPIO_FN_A16_EA16, GPIO_FN_PORT62_KEYOUT3, GPIO_FN_MSIOF0_SS1, - GPIO_FN_A17_EA17, GPIO_FN_PORT63_KEYOUT2, GPIO_FN_MSIOF0_TSYNC, - GPIO_FN_A18_EA18, GPIO_FN_PORT64_KEYOUT1, GPIO_FN_MSIOF0_TSCK, - GPIO_FN_A19_EA19, GPIO_FN_PORT65_KEYOUT0, GPIO_FN_MSIOF0_TXD, - GPIO_FN_A20_EA20, GPIO_FN_PORT66_KEYIN0, GPIO_FN_MSIOF0_RSCK, - GPIO_FN_A21_EA21, GPIO_FN_PORT67_KEYIN1, GPIO_FN_MSIOF0_RSYNC, - GPIO_FN_A22_EA22, GPIO_FN_PORT68_KEYIN2, GPIO_FN_MSIOF0_MCK0, - GPIO_FN_A23_EA23, GPIO_FN_PORT69_KEYIN3, GPIO_FN_MSIOF0_MCK1, - GPIO_FN_A24_EA24, GPIO_FN_PORT70_KEYIN4, GPIO_FN_MSIOF0_RXD, - GPIO_FN_A25_EA25, GPIO_FN_PORT71_KEYIN5, GPIO_FN_MSIOF0_SS2, - GPIO_FN_A26, GPIO_FN_PORT72_KEYIN6, - GPIO_FN_D0_ED0_NAF0, - GPIO_FN_D1_ED1_NAF1, - GPIO_FN_D2_ED2_NAF2, - GPIO_FN_D3_ED3_NAF3, - GPIO_FN_D4_ED4_NAF4, - GPIO_FN_D5_ED5_NAF5, - GPIO_FN_D6_ED6_NAF6, - GPIO_FN_D7_ED7_NAF7, - GPIO_FN_D8_ED8_NAF8, - GPIO_FN_D9_ED9_NAF9, - GPIO_FN_D10_ED10_NAF10, - GPIO_FN_D11_ED11_NAF11, - GPIO_FN_D12_ED12_NAF12, - GPIO_FN_D13_ED13_NAF13, - GPIO_FN_D14_ED14_NAF14, - GPIO_FN_D15_ED15_NAF15, - GPIO_FN_CS4, - GPIO_FN_CS5A, GPIO_FN_FMSICK, - GPIO_FN_CS5B, GPIO_FN_FCE1, - - /* 55-3 (FN) */ - GPIO_FN_CS6B, GPIO_FN_XCS2, GPIO_FN_CS6A, GPIO_FN_DACK0, - GPIO_FN_FCE0, - GPIO_FN_WAIT, GPIO_FN_DREQ0, - GPIO_FN_RD_XRD, - GPIO_FN_WE0_XWR0_FWE, - GPIO_FN_WE1_XWR1, - GPIO_FN_FRB, - GPIO_FN_CKO, - GPIO_FN_NBRSTOUT, - GPIO_FN_NBRST, - GPIO_FN_GPS_EPPSIN, - GPIO_FN_LATCHPULSE, - GPIO_FN_LTESIGNAL, - GPIO_FN_LEGACYSTATE, - GPIO_FN_TCKON, - GPIO_FN_VIO_VD, GPIO_FN_PORT128_KEYOUT0, GPIO_FN_IPORT0, - GPIO_FN_VIO_HD, GPIO_FN_PORT129_KEYOUT1, GPIO_FN_IPORT1, - GPIO_FN_VIO_D0, GPIO_FN_PORT130_KEYOUT2, GPIO_FN_PORT130_MSIOF2_RXD, - GPIO_FN_VIO_D1, GPIO_FN_PORT131_KEYOUT3, GPIO_FN_PORT131_MSIOF2_SS1, - GPIO_FN_VIO_D2, GPIO_FN_PORT132_KEYOUT4, GPIO_FN_PORT132_MSIOF2_SS2, - GPIO_FN_VIO_D3, GPIO_FN_PORT133_KEYOUT5, GPIO_FN_PORT133_MSIOF2_TSYNC, - GPIO_FN_VIO_D4, GPIO_FN_PORT134_KEYIN0, GPIO_FN_PORT134_MSIOF2_TXD, - GPIO_FN_VIO_D5, GPIO_FN_PORT135_KEYIN1, GPIO_FN_PORT135_MSIOF2_TSCK, - GPIO_FN_VIO_D6, GPIO_FN_PORT136_KEYIN2, - GPIO_FN_VIO_D7, GPIO_FN_PORT137_KEYIN3, - GPIO_FN_VIO_D8, GPIO_FN_M9_SLCD_A01, GPIO_FN_PORT138_FSIAOMC, - GPIO_FN_VIO_D9, GPIO_FN_M10_SLCD_CK1, GPIO_FN_PORT139_FSIAOLR, - GPIO_FN_VIO_D10, GPIO_FN_M11_SLCD_SO1, GPIO_FN_TPU0TO2, - GPIO_FN_PORT140_FSIAOBT, - GPIO_FN_VIO_D11, GPIO_FN_M12_SLCD_CE1, GPIO_FN_TPU0TO3, - GPIO_FN_PORT141_FSIAOSLD, - GPIO_FN_VIO_D12, GPIO_FN_M13_BSW, GPIO_FN_PORT142_FSIACK, - GPIO_FN_VIO_D13, GPIO_FN_M14_GSW, GPIO_FN_PORT143_FSIAILR, - GPIO_FN_VIO_D14, GPIO_FN_M15_RSW, GPIO_FN_PORT144_FSIAIBT, - GPIO_FN_VIO_D15, GPIO_FN_TPU1TO3, GPIO_FN_PORT145_FSIAISLD, - GPIO_FN_VIO_CLK, GPIO_FN_PORT146_KEYIN4, GPIO_FN_IPORT2, - GPIO_FN_VIO_FIELD, GPIO_FN_PORT147_KEYIN5, - GPIO_FN_VIO_CKO, GPIO_FN_PORT148_KEYIN6, - GPIO_FN_A27, GPIO_FN_RDWR_XWE, GPIO_FN_MFG0_IN1, - GPIO_FN_MFG0_IN2, - GPIO_FN_TS_SPSYNC3, GPIO_FN_MSIOF2_RSCK, - GPIO_FN_TS_SDAT3, GPIO_FN_MSIOF2_RSYNC, - GPIO_FN_TPU1TO2, GPIO_FN_TS_SDEN3, GPIO_FN_PORT153_MSIOF2_SS1, - GPIO_FN_SOUT3, GPIO_FN_SCIFA2_TXD1, GPIO_FN_MSIOF2_MCK0, - GPIO_FN_SIN3, GPIO_FN_SCIFA2_RXD1, GPIO_FN_MSIOF2_MCK1, - GPIO_FN_XRTS3, GPIO_FN_SCIFA2_RTS1, GPIO_FN_PORT156_MSIOF2_SS2, - GPIO_FN_XCTS3, GPIO_FN_SCIFA2_CTS1, GPIO_FN_PORT157_MSIOF2_RXD, - - /* 55-4 (FN) */ - GPIO_FN_DINT, GPIO_FN_SCIFA2_SCK1, GPIO_FN_TS_SCK3, - GPIO_FN_PORT159_SCIFB_SCK, GPIO_FN_PORT159_SCIFA5_SCK, GPIO_FN_NMI, - GPIO_FN_PORT160_SCIFB_TXD, GPIO_FN_PORT160_SCIFA5_TXD, GPIO_FN_SOUT0, - GPIO_FN_PORT161_SCIFB_CTS, GPIO_FN_PORT161_SCIFA5_CTS, GPIO_FN_XCTS0, - GPIO_FN_MFG3_IN2, - GPIO_FN_PORT162_SCIFB_RXD, GPIO_FN_PORT162_SCIFA5_RXD, GPIO_FN_SIN0, - GPIO_FN_MFG3_IN1, - GPIO_FN_PORT163_SCIFB_RTS, GPIO_FN_PORT163_SCIFA5_RTS, GPIO_FN_XRTS0, - GPIO_FN_MFG3_OUT1, - GPIO_FN_TPU3TO0, - GPIO_FN_LCDD0, GPIO_FN_PORT192_KEYOUT0, GPIO_FN_EXT_CKI, - GPIO_FN_LCDD1, GPIO_FN_PORT193_KEYOUT1, GPIO_FN_PORT193_SCIFA5_CTS, - GPIO_FN_BBIF2_TSYNC1, - GPIO_FN_LCDD2, GPIO_FN_PORT194_KEYOUT2, GPIO_FN_PORT194_SCIFA5_RTS, - GPIO_FN_BBIF2_TSCK1, - GPIO_FN_LCDD3, GPIO_FN_PORT195_KEYOUT3, GPIO_FN_PORT195_SCIFA5_RXD, - GPIO_FN_BBIF2_TXD1, - GPIO_FN_LCDD4, GPIO_FN_PORT196_KEYOUT4, GPIO_FN_PORT196_SCIFA5_TXD, - GPIO_FN_LCDD5, GPIO_FN_PORT197_KEYOUT5, GPIO_FN_PORT197_SCIFA5_SCK, - GPIO_FN_MFG2_OUT2, GPIO_FN_TPU2TO1, - GPIO_FN_LCDD6, GPIO_FN_XWR2, - GPIO_FN_LCDD7, GPIO_FN_TPU4TO1, GPIO_FN_MFG4_OUT2, GPIO_FN_XWR3, - GPIO_FN_LCDD8, GPIO_FN_PORT200_KEYIN0, GPIO_FN_VIO_DR0, GPIO_FN_D16, - GPIO_FN_ED16, - GPIO_FN_LCDD9, GPIO_FN_PORT201_KEYIN1, GPIO_FN_VIO_DR1, GPIO_FN_D17, - GPIO_FN_ED17, - GPIO_FN_LCDD10, GPIO_FN_PORT202_KEYIN2, GPIO_FN_VIO_DR2, GPIO_FN_D18, - GPIO_FN_ED18, - GPIO_FN_LCDD11, GPIO_FN_PORT203_KEYIN3, GPIO_FN_VIO_DR3, GPIO_FN_D19, - GPIO_FN_ED19, - GPIO_FN_LCDD12, GPIO_FN_PORT204_KEYIN4, GPIO_FN_VIO_DR4, GPIO_FN_D20, - GPIO_FN_ED20, - GPIO_FN_LCDD13, GPIO_FN_PORT205_KEYIN5, GPIO_FN_VIO_DR5, GPIO_FN_D21, - GPIO_FN_ED21, - GPIO_FN_LCDD14, GPIO_FN_PORT206_KEYIN6, GPIO_FN_VIO_DR6, GPIO_FN_D22, - GPIO_FN_ED22, - GPIO_FN_LCDD15, GPIO_FN_PORT207_MSIOF0L_SS1, GPIO_FN_PORT207_KEYOUT0, - GPIO_FN_VIO_DR7, - GPIO_FN_D23, GPIO_FN_ED23, - GPIO_FN_LCDD16, GPIO_FN_PORT208_MSIOF0L_SS2, GPIO_FN_PORT208_KEYOUT1, - GPIO_FN_VIO_VDR, - GPIO_FN_D24, GPIO_FN_ED24, - GPIO_FN_LCDD17, GPIO_FN_PORT209_KEYOUT2, GPIO_FN_VIO_HDR, GPIO_FN_D25, - GPIO_FN_ED25, - GPIO_FN_LCDD18, GPIO_FN_DREQ2, GPIO_FN_PORT210_MSIOF0L_SS1, GPIO_FN_D26, - GPIO_FN_ED26, - GPIO_FN_LCDD19, GPIO_FN_PORT211_MSIOF0L_SS2, GPIO_FN_D27, GPIO_FN_ED27, - GPIO_FN_LCDD20, GPIO_FN_TS_SPSYNC1, GPIO_FN_MSIOF0L_MCK0, GPIO_FN_D28, - GPIO_FN_ED28, - GPIO_FN_LCDD21, GPIO_FN_TS_SDAT1, GPIO_FN_MSIOF0L_MCK1, GPIO_FN_D29, - GPIO_FN_ED29, - GPIO_FN_LCDD22, GPIO_FN_TS_SDEN1, GPIO_FN_MSIOF0L_RSCK, GPIO_FN_D30, - GPIO_FN_ED30, - GPIO_FN_LCDD23, GPIO_FN_TS_SCK1, GPIO_FN_MSIOF0L_RSYNC, GPIO_FN_D31, - GPIO_FN_ED31, - GPIO_FN_LCDDCK, GPIO_FN_LCDWR, GPIO_FN_PORT216_KEYOUT3, - GPIO_FN_VIO_CLKR, - GPIO_FN_LCDRD, GPIO_FN_DACK2, GPIO_FN_MSIOF0L_TSYNC, - GPIO_FN_LCDHSYN, GPIO_FN_LCDCS, GPIO_FN_LCDCS2, GPIO_FN_DACK3, - GPIO_FN_PORT218_VIO_CKOR, GPIO_FN_PORT218_KEYOUT4, - GPIO_FN_LCDDISP, GPIO_FN_LCDRS, GPIO_FN_DREQ3, GPIO_FN_MSIOF0L_TSCK, - GPIO_FN_LCDVSYN, GPIO_FN_LCDVSYN2, GPIO_FN_PORT220_KEYOUT5, - GPIO_FN_LCDLCLK, GPIO_FN_DREQ1, GPIO_FN_PWEN, GPIO_FN_MSIOF0L_RXD, - GPIO_FN_LCDDON, GPIO_FN_LCDDON2, GPIO_FN_DACK1, GPIO_FN_OVCN, - GPIO_FN_MSIOF0L_TXD, - GPIO_FN_SCIFA1_TXD, GPIO_FN_OVCN2, - GPIO_FN_EXTLP, GPIO_FN_SCIFA1_SCK, GPIO_FN_USBTERM, - GPIO_FN_PORT226_VIO_CKO2, - GPIO_FN_SCIFA1_RTS, GPIO_FN_IDIN, - GPIO_FN_SCIFA1_RXD, - GPIO_FN_SCIFA1_CTS, GPIO_FN_MFG1_IN1, - GPIO_FN_MSIOF1_TXD, GPIO_FN_SCIFA2_TXD2, GPIO_FN_PORT230_FSIAOMC, - GPIO_FN_MSIOF1_TSYNC, GPIO_FN_SCIFA2_CTS2, GPIO_FN_PORT231_FSIAOLR, - GPIO_FN_MSIOF1_TSCK, GPIO_FN_SCIFA2_SCK2, GPIO_FN_PORT232_FSIAOBT, - GPIO_FN_MSIOF1_RXD, GPIO_FN_SCIFA2_RXD2, GPIO_FN_GPS_VCOTRIG, - GPIO_FN_PORT233_FSIACK, - GPIO_FN_MSIOF1_RSCK, GPIO_FN_SCIFA2_RTS2, GPIO_FN_PORT234_FSIAOSLD, - GPIO_FN_MSIOF1_RSYNC, GPIO_FN_OPORT0, GPIO_FN_MFG1_IN2, - GPIO_FN_PORT235_FSIAILR, - GPIO_FN_MSIOF1_MCK0, GPIO_FN_I2C_SDA2, GPIO_FN_PORT236_FSIAIBT, - GPIO_FN_MSIOF1_MCK1, GPIO_FN_I2C_SCL2, GPIO_FN_PORT237_FSIAISLD, - GPIO_FN_MSIOF1_SS1, GPIO_FN_EDBGREQ3, - - /* 55-5 (FN) */ - GPIO_FN_MSIOF1_SS2, - GPIO_FN_SCIFA6_TXD, - GPIO_FN_PORT241_IRDA_OUT, GPIO_FN_PORT241_IROUT, GPIO_FN_MFG4_OUT1, - GPIO_FN_TPU4TO0, - GPIO_FN_PORT242_IRDA_IN, GPIO_FN_MFG4_IN2, - GPIO_FN_PORT243_IRDA_FIRSEL, GPIO_FN_PORT243_VIO_CKO2, - GPIO_FN_PORT244_SCIFA5_CTS, GPIO_FN_MFG2_IN1, GPIO_FN_PORT244_SCIFB_CTS, - GPIO_FN_PORT244_MSIOF2_RXD, - GPIO_FN_PORT245_SCIFA5_RTS, GPIO_FN_MFG2_IN2, GPIO_FN_PORT245_SCIFB_RTS, - GPIO_FN_PORT245_MSIOF2_TXD, - GPIO_FN_PORT246_SCIFA5_RXD, GPIO_FN_MFG1_OUT1, - GPIO_FN_PORT246_SCIFB_RXD, GPIO_FN_TPU1TO0, - GPIO_FN_PORT247_SCIFA5_TXD, GPIO_FN_MFG3_OUT2, - GPIO_FN_PORT247_SCIFB_TXD, GPIO_FN_TPU3TO1, - GPIO_FN_PORT248_SCIFA5_SCK, GPIO_FN_MFG2_OUT1, - GPIO_FN_PORT248_SCIFB_SCK, GPIO_FN_TPU2TO0, - GPIO_FN_PORT248_MSIOF2_TSCK, - GPIO_FN_PORT249_IROUT, GPIO_FN_MFG4_IN1, GPIO_FN_PORT249_MSIOF2_TSYNC, - GPIO_FN_SDHICLK0, GPIO_FN_TCK2_SWCLK_MC0, - GPIO_FN_SDHICD0, - GPIO_FN_SDHID0_0, GPIO_FN_TMS2_SWDIO_MC0, - GPIO_FN_SDHID0_1, GPIO_FN_TDO2_SWO0_MC0, - GPIO_FN_SDHID0_2, GPIO_FN_TDI2, - GPIO_FN_SDHID0_3, GPIO_FN_RTCK2_SWO1_MC0, - GPIO_FN_SDHICMD0, GPIO_FN_TRST2, - GPIO_FN_SDHIWP0, GPIO_FN_EDBGREQ2, - GPIO_FN_SDHICLK1, GPIO_FN_TCK3_SWCLK_MC1, - GPIO_FN_SDHID1_0, GPIO_FN_M11_SLCD_SO2, GPIO_FN_TS_SPSYNC2, - GPIO_FN_TMS3_SWDIO_MC1, - GPIO_FN_SDHID1_1, GPIO_FN_M9_SLCD_A02, GPIO_FN_TS_SDAT2, - GPIO_FN_TDO3_SWO0_MC1, - GPIO_FN_SDHID1_2, GPIO_FN_M10_SLCD_CK2, GPIO_FN_TS_SDEN2, GPIO_FN_TDI3, - GPIO_FN_SDHID1_3, GPIO_FN_M12_SLCD_CE2, GPIO_FN_TS_SCK2, - GPIO_FN_RTCK3_SWO1_MC1, - GPIO_FN_SDHICMD1, GPIO_FN_TRST3, - GPIO_FN_RESETOUTS, -}; - -#endif /* __ASM_SH7377_H__ */ diff --git a/arch/arm/mach-shmobile/intc-sh7367.c b/arch/arm/mach-shmobile/intc-sh7367.c deleted file mode 100644 index 5bf776495b75..000000000000 --- a/arch/arm/mach-shmobile/intc-sh7367.c +++ /dev/null @@ -1,413 +0,0 @@ -/* - * sh7367 processor support - INTC hardware block - * - * Copyright (C) 2010 Magnus Damm - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/interrupt.h> -#include <linux/irq.h> -#include <linux/io.h> -#include <linux/sh_intc.h> -#include <mach/intc.h> -#include <mach/irqs.h> -#include <asm/mach-types.h> -#include <asm/mach/arch.h> - -enum { - UNUSED_INTCA = 0, - ENABLED, - DISABLED, - - /* interrupt sources INTCA */ - DIRC, - CRYPT1_ERR, CRYPT2_STD, - IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1, - ARM11_IRQPMU, ARM11_COMMTX, ARM11_COMMRX, - ETM11_ACQCMP, ETM11_FULL, - MFI_MFIM, MFI_MFIS, - BBIF1, BBIF2, - USBDMAC_USHDMI, - USBHS_USHI0, USBHS_USHI1, - CMT1_CMT10, CMT1_CMT11, CMT1_CMT12, CMT1_CMT13, CMT2, CMT3, - KEYSC_KEY, - SCIFA0, SCIFA1, SCIFA2, SCIFA3, - MSIOF2, MSIOF1, - SCIFA4, SCIFA5, SCIFB, - FLCTL_FLSTEI, FLCTL_FLTENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I, - SDHI0, - SDHI1, - MSU_MSU, MSU_MSU2, - IREM, - SIU, - SPU, - IRDA, - TPU0, TPU1, TPU2, TPU3, TPU4, - LCRC, - PINT1, PINT2, - TTI20, - MISTY, - DDM, - SDHI2, - RWDT0, RWDT1, - DMAC_1_DEI0, DMAC_1_DEI1, DMAC_1_DEI2, DMAC_1_DEI3, - DMAC_2_DEI4, DMAC_2_DEI5, DMAC_2_DADERR, - DMAC2_1_DEI0, DMAC2_1_DEI1, DMAC2_1_DEI2, DMAC2_1_DEI3, - DMAC2_2_DEI4, DMAC2_2_DEI5, DMAC2_2_DADERR, - DMAC3_1_DEI0, DMAC3_1_DEI1, DMAC3_1_DEI2, DMAC3_1_DEI3, - DMAC3_2_DEI4, DMAC3_2_DEI5, DMAC3_2_DADERR, - - /* interrupt groups INTCA */ - DMAC_1, DMAC_2, DMAC2_1, DMAC2_2, DMAC3_1, DMAC3_2, - ETM11, ARM11, USBHS, FLCTL, IIC1 -}; - -static struct intc_vect intca_vectors[] __initdata = { - INTC_VECT(DIRC, 0x0560), - INTC_VECT(CRYPT1_ERR, 0x05e0), - INTC_VECT(CRYPT2_STD, 0x0700), - INTC_VECT(IIC1_ALI1, 0x0780), INTC_VECT(IIC1_TACKI1, 0x07a0), - INTC_VECT(IIC1_WAITI1, 0x07c0), INTC_VECT(IIC1_DTEI1, 0x07e0), - INTC_VECT(ARM11_IRQPMU, 0x0800), INTC_VECT(ARM11_COMMTX, 0x0840), - INTC_VECT(ARM11_COMMRX, 0x0860), - INTC_VECT(ETM11_ACQCMP, 0x0880), INTC_VECT(ETM11_FULL, 0x08a0), - INTC_VECT(MFI_MFIM, 0x0900), INTC_VECT(MFI_MFIS, 0x0920), - INTC_VECT(BBIF1, 0x0940), INTC_VECT(BBIF2, 0x0960), - INTC_VECT(USBDMAC_USHDMI, 0x0a00), - INTC_VECT(USBHS_USHI0, 0x0a20), INTC_VECT(USBHS_USHI1, 0x0a40), - INTC_VECT(CMT1_CMT10, 0x0b00), INTC_VECT(CMT1_CMT11, 0x0b20), - INTC_VECT(CMT1_CMT12, 0x0b40), INTC_VECT(CMT1_CMT13, 0x0b60), - INTC_VECT(CMT2, 0x0b80), INTC_VECT(CMT3, 0x0ba0), - INTC_VECT(KEYSC_KEY, 0x0be0), - INTC_VECT(SCIFA0, 0x0c00), INTC_VECT(SCIFA1, 0x0c20), - INTC_VECT(SCIFA2, 0x0c40), INTC_VECT(SCIFA3, 0x0c60), - INTC_VECT(MSIOF2, 0x0c80), INTC_VECT(MSIOF1, 0x0d00), - INTC_VECT(SCIFA4, 0x0d20), INTC_VECT(SCIFA5, 0x0d40), - INTC_VECT(SCIFB, 0x0d60), - INTC_VECT(FLCTL_FLSTEI, 0x0d80), INTC_VECT(FLCTL_FLTENDI, 0x0da0), - INTC_VECT(FLCTL_FLTREQ0I, 0x0dc0), INTC_VECT(FLCTL_FLTREQ1I, 0x0de0), - INTC_VECT(SDHI0, 0x0e00), INTC_VECT(SDHI0, 0x0e20), - INTC_VECT(SDHI0, 0x0e40), INTC_VECT(SDHI0, 0x0e60), - INTC_VECT(SDHI1, 0x0e80), INTC_VECT(SDHI1, 0x0ea0), - INTC_VECT(SDHI1, 0x0ec0), INTC_VECT(SDHI1, 0x0ee0), - INTC_VECT(MSU_MSU, 0x0f20), INTC_VECT(MSU_MSU2, 0x0f40), - INTC_VECT(IREM, 0x0f60), - INTC_VECT(SIU, 0x0fa0), - INTC_VECT(SPU, 0x0fc0), - INTC_VECT(IRDA, 0x0480), - INTC_VECT(TPU0, 0x04a0), INTC_VECT(TPU1, 0x04c0), - INTC_VECT(TPU2, 0x04e0), INTC_VECT(TPU3, 0x0500), - INTC_VECT(TPU4, 0x0520), - INTC_VECT(LCRC, 0x0540), - INTC_VECT(PINT1, 0x1000), INTC_VECT(PINT2, 0x1020), - INTC_VECT(TTI20, 0x1100), - INTC_VECT(MISTY, 0x1120), - INTC_VECT(DDM, 0x1140), - INTC_VECT(SDHI2, 0x1200), INTC_VECT(SDHI2, 0x1220), - INTC_VECT(SDHI2, 0x1240), INTC_VECT(SDHI2, 0x1260), - INTC_VECT(RWDT0, 0x1280), INTC_VECT(RWDT1, 0x12a0), - INTC_VECT(DMAC_1_DEI0, 0x2000), INTC_VECT(DMAC_1_DEI1, 0x2020), - INTC_VECT(DMAC_1_DEI2, 0x2040), INTC_VECT(DMAC_1_DEI3, 0x2060), - INTC_VECT(DMAC_2_DEI4, 0x2080), INTC_VECT(DMAC_2_DEI5, 0x20a0), - INTC_VECT(DMAC_2_DADERR, 0x20c0), - INTC_VECT(DMAC2_1_DEI0, 0x2100), INTC_VECT(DMAC2_1_DEI1, 0x2120), - INTC_VECT(DMAC2_1_DEI2, 0x2140), INTC_VECT(DMAC2_1_DEI3, 0x2160), - INTC_VECT(DMAC2_2_DEI4, 0x2180), INTC_VECT(DMAC2_2_DEI5, 0x21a0), - INTC_VECT(DMAC2_2_DADERR, 0x21c0), - INTC_VECT(DMAC3_1_DEI0, 0x2200), INTC_VECT(DMAC3_1_DEI1, 0x2220), - INTC_VECT(DMAC3_1_DEI2, 0x2240), INTC_VECT(DMAC3_1_DEI3, 0x2260), - INTC_VECT(DMAC3_2_DEI4, 0x2280), INTC_VECT(DMAC3_2_DEI5, 0x22a0), - INTC_VECT(DMAC3_2_DADERR, 0x22c0), -}; - -static struct intc_group intca_groups[] __initdata = { - INTC_GROUP(DMAC_1, DMAC_1_DEI0, - DMAC_1_DEI1, DMAC_1_DEI2, DMAC_1_DEI3), - INTC_GROUP(DMAC_2, DMAC_2_DEI4, - DMAC_2_DEI5, DMAC_2_DADERR), - INTC_GROUP(DMAC2_1, DMAC2_1_DEI0, - DMAC2_1_DEI1, DMAC2_1_DEI2, DMAC2_1_DEI3), - INTC_GROUP(DMAC2_2, DMAC2_2_DEI4, - DMAC2_2_DEI5, DMAC2_2_DADERR), - INTC_GROUP(DMAC3_1, DMAC3_1_DEI0, - DMAC3_1_DEI1, DMAC3_1_DEI2, DMAC3_1_DEI3), - INTC_GROUP(DMAC3_2, DMAC3_2_DEI4, - DMAC3_2_DEI5, DMAC3_2_DADERR), - INTC_GROUP(ETM11, ETM11_ACQCMP, ETM11_FULL), - INTC_GROUP(ARM11, ARM11_IRQPMU, ARM11_COMMTX, ARM11_COMMTX), - INTC_GROUP(USBHS, USBHS_USHI0, USBHS_USHI1), - INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLTENDI, - FLCTL_FLTREQ0I, FLCTL_FLTREQ1I), - INTC_GROUP(IIC1, IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1), -}; - -static struct intc_mask_reg intca_mask_registers[] __initdata = { - { 0xe6940080, 0xe69400c0, 8, /* IMR0A / IMCR0A */ - { DMAC2_1_DEI3, DMAC2_1_DEI2, DMAC2_1_DEI1, DMAC2_1_DEI0, - ARM11_IRQPMU, 0, ARM11_COMMTX, ARM11_COMMRX } }, - { 0xe6940084, 0xe69400c4, 8, /* IMR1A / IMCR1A */ - { CRYPT1_ERR, CRYPT2_STD, DIRC, 0, - DMAC_1_DEI3, DMAC_1_DEI2, DMAC_1_DEI1, DMAC_1_DEI0 } }, - { 0xe6940088, 0xe69400c8, 8, /* IMR2A / IMCR2A */ - { PINT1, PINT2, 0, 0, - BBIF1, BBIF2, MFI_MFIS, MFI_MFIM } }, - { 0xe694008c, 0xe69400cc, 8, /* IMR3A / IMCR3A */ - { DMAC3_1_DEI3, DMAC3_1_DEI2, DMAC3_1_DEI1, DMAC3_1_DEI0, - DMAC3_2_DADERR, DMAC3_2_DEI5, DMAC3_2_DEI4, IRDA } }, - { 0xe6940090, 0xe69400d0, 8, /* IMR4A / IMCR4A */ - { DDM, 0, 0, 0, - 0, 0, ETM11_FULL, ETM11_ACQCMP } }, - { 0xe6940094, 0xe69400d4, 8, /* IMR5A / IMCR5A */ - { KEYSC_KEY, DMAC_2_DADERR, DMAC_2_DEI5, DMAC_2_DEI4, - SCIFA3, SCIFA2, SCIFA1, SCIFA0 } }, - { 0xe6940098, 0xe69400d8, 8, /* IMR6A / IMCR6A */ - { SCIFB, SCIFA5, SCIFA4, MSIOF1, - 0, 0, MSIOF2, 0 } }, - { 0xe694009c, 0xe69400dc, 8, /* IMR7A / IMCR7A */ - { DISABLED, ENABLED, ENABLED, ENABLED, - FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLTENDI, FLCTL_FLSTEI } }, - { 0xe69400a0, 0xe69400e0, 8, /* IMR8A / IMCR8A */ - { DISABLED, ENABLED, ENABLED, ENABLED, - TTI20, USBDMAC_USHDMI, SPU, SIU } }, - { 0xe69400a4, 0xe69400e4, 8, /* IMR9A / IMCR9A */ - { CMT1_CMT13, CMT1_CMT12, CMT1_CMT11, CMT1_CMT10, - CMT2, USBHS_USHI1, USBHS_USHI0, 0 } }, - { 0xe69400a8, 0xe69400e8, 8, /* IMR10A / IMCR10A */ - { 0, DMAC2_2_DADERR, DMAC2_2_DEI5, DMAC2_2_DEI4, - 0, 0, 0, 0 } }, - { 0xe69400ac, 0xe69400ec, 8, /* IMR11A / IMCR11A */ - { IIC1_DTEI1, IIC1_WAITI1, IIC1_TACKI1, IIC1_ALI1, - LCRC, MSU_MSU2, IREM, MSU_MSU } }, - { 0xe69400b0, 0xe69400f0, 8, /* IMR12A / IMCR12A */ - { 0, 0, TPU0, TPU1, - TPU2, TPU3, TPU4, 0 } }, - { 0xe69400b4, 0xe69400f4, 8, /* IMR13A / IMCR13A */ - { DISABLED, ENABLED, ENABLED, ENABLED, - MISTY, CMT3, RWDT1, RWDT0 } }, -}; - -static struct intc_prio_reg intca_prio_registers[] __initdata = { - { 0xe6940000, 0, 16, 4, /* IPRAA */ { DMAC3_1, DMAC3_2, CMT2, LCRC } }, - { 0xe6940004, 0, 16, 4, /* IPRBA */ { IRDA, ETM11, BBIF1, BBIF2 } }, - { 0xe6940008, 0, 16, 4, /* IPRCA */ { CRYPT1_ERR, CRYPT2_STD, - CMT1_CMT11, ARM11 } }, - { 0xe694000c, 0, 16, 4, /* IPRDA */ { PINT1, PINT2, - CMT1_CMT12, TPU4 } }, - { 0xe6940010, 0, 16, 4, /* IPREA */ { DMAC_1, MFI_MFIS, - MFI_MFIM, USBHS } }, - { 0xe6940014, 0, 16, 4, /* IPRFA */ { KEYSC_KEY, DMAC_2, - 0, CMT1_CMT10 } }, - { 0xe6940018, 0, 16, 4, /* IPRGA */ { SCIFA0, SCIFA1, - SCIFA2, SCIFA3 } }, - { 0xe694001c, 0, 16, 4, /* IPRGH */ { MSIOF2, USBDMAC_USHDMI, - FLCTL, SDHI0 } }, - { 0xe6940020, 0, 16, 4, /* IPRIA */ { MSIOF1, SCIFA4, MSU_MSU, IIC1 } }, - { 0xe6940024, 0, 16, 4, /* IPRJA */ { DMAC2_1, DMAC2_2, SIU, TTI20 } }, - { 0xe6940028, 0, 16, 4, /* IPRKA */ { 0, CMT1_CMT13, IREM, SDHI1 } }, - { 0xe694002c, 0, 16, 4, /* IPRLA */ { TPU0, TPU1, TPU2, TPU3 } }, - { 0xe6940030, 0, 16, 4, /* IPRMA */ { MISTY, CMT3, RWDT1, RWDT0 } }, - { 0xe6940034, 0, 16, 4, /* IPRNA */ { SCIFB, SCIFA5, SPU, DDM } }, - { 0xe6940038, 0, 16, 4, /* IPROA */ { 0, 0, DIRC, SDHI2 } }, -}; - -static struct intc_desc intca_desc __initdata = { - .name = "sh7367-intca", - .force_enable = ENABLED, - .force_disable = DISABLED, - .hw = INTC_HW_DESC(intca_vectors, intca_groups, - intca_mask_registers, intca_prio_registers, - NULL, NULL), -}; - -INTC_IRQ_PINS_16(intca_irq_pins, 0xe6900000, - INTC_VECT, "sh7367-intca-irq-pins"); - -enum { - UNUSED_INTCS = 0, - - INTCS, - - /* interrupt sources INTCS */ - VIO2_VEU0, VIO2_VEU1, VIO2_VEU2, VIO2_VEU3, - VIO3_VOU, - RTDMAC_1_DEI0, RTDMAC_1_DEI1, RTDMAC_1_DEI2, RTDMAC_1_DEI3, - VIO1_CEU, VIO1_BEU0, VIO1_BEU1, VIO1_BEU2, - VPU, - SGX530, - _2DDMAC_2DDM0, _2DDMAC_2DDM1, _2DDMAC_2DDM2, _2DDMAC_2DDM3, - IIC2_ALI2, IIC2_TACKI2, IIC2_WAITI2, IIC2_DTEI2, - IPMMU_IPMMUB, IPMMU_IPMMUS, - RTDMAC_2_DEI4, RTDMAC_2_DEI5, RTDMAC_2_DADERR, - MSIOF, - IIC0_ALI0, IIC0_TACKI0, IIC0_WAITI0, IIC0_DTEI0, - TMU_TUNI0, TMU_TUNI1, TMU_TUNI2, - CMT, - TSIF, - IPMMUI, - MVI3, - ICB, - PEP, - ASA, - BEM, - VE2HO, - HQE, - JPEG, - LCDC, - - /* interrupt groups INTCS */ - _2DDMAC, RTDMAC_1, RTDMAC_2, VEU, BEU, IIC0, IPMMU, IIC2, -}; - -static struct intc_vect intcs_vectors[] = { - INTCS_VECT(VIO2_VEU0, 0x700), INTCS_VECT(VIO2_VEU1, 0x720), - INTCS_VECT(VIO2_VEU2, 0x740), INTCS_VECT(VIO2_VEU3, 0x760), - INTCS_VECT(VIO3_VOU, 0x780), - INTCS_VECT(RTDMAC_1_DEI0, 0x800), INTCS_VECT(RTDMAC_1_DEI1, 0x820), - INTCS_VECT(RTDMAC_1_DEI2, 0x840), INTCS_VECT(RTDMAC_1_DEI3, 0x860), - INTCS_VECT(VIO1_CEU, 0x880), INTCS_VECT(VIO1_BEU0, 0x8a0), - INTCS_VECT(VIO1_BEU1, 0x8c0), INTCS_VECT(VIO1_BEU2, 0x8e0), - INTCS_VECT(VPU, 0x980), - INTCS_VECT(SGX530, 0x9e0), - INTCS_VECT(_2DDMAC_2DDM0, 0xa00), INTCS_VECT(_2DDMAC_2DDM1, 0xa20), - INTCS_VECT(_2DDMAC_2DDM2, 0xa40), INTCS_VECT(_2DDMAC_2DDM3, 0xa60), - INTCS_VECT(IIC2_ALI2, 0xa80), INTCS_VECT(IIC2_TACKI2, 0xaa0), - INTCS_VECT(IIC2_WAITI2, 0xac0), INTCS_VECT(IIC2_DTEI2, 0xae0), - INTCS_VECT(IPMMU_IPMMUB, 0xb20), INTCS_VECT(IPMMU_IPMMUS, 0xb60), - INTCS_VECT(RTDMAC_2_DEI4, 0xb80), INTCS_VECT(RTDMAC_2_DEI5, 0xba0), - INTCS_VECT(RTDMAC_2_DADERR, 0xbc0), - INTCS_VECT(MSIOF, 0xd20), - INTCS_VECT(IIC0_ALI0, 0xe00), INTCS_VECT(IIC0_TACKI0, 0xe20), - INTCS_VECT(IIC0_WAITI0, 0xe40), INTCS_VECT(IIC0_DTEI0, 0xe60), - INTCS_VECT(TMU_TUNI0, 0xe80), INTCS_VECT(TMU_TUNI1, 0xea0), - INTCS_VECT(TMU_TUNI2, 0xec0), - INTCS_VECT(CMT, 0xf00), - INTCS_VECT(TSIF, 0xf20), - INTCS_VECT(IPMMUI, 0xf60), - INTCS_VECT(MVI3, 0x420), - INTCS_VECT(ICB, 0x480), - INTCS_VECT(PEP, 0x4a0), - INTCS_VECT(ASA, 0x4c0), - INTCS_VECT(BEM, 0x4e0), - INTCS_VECT(VE2HO, 0x520), - INTCS_VECT(HQE, 0x540), - INTCS_VECT(JPEG, 0x560), - INTCS_VECT(LCDC, 0x580), - - INTC_VECT(INTCS, 0xf80), -}; - -static struct intc_group intcs_groups[] __initdata = { - INTC_GROUP(_2DDMAC, _2DDMAC_2DDM0, _2DDMAC_2DDM1, - _2DDMAC_2DDM2, _2DDMAC_2DDM3), - INTC_GROUP(RTDMAC_1, RTDMAC_1_DEI0, RTDMAC_1_DEI1, - RTDMAC_1_DEI2, RTDMAC_1_DEI3), - INTC_GROUP(RTDMAC_2, RTDMAC_2_DEI4, RTDMAC_2_DEI5, RTDMAC_2_DADERR), - INTC_GROUP(VEU, VIO2_VEU0, VIO2_VEU1, VIO2_VEU2, VIO2_VEU3), - INTC_GROUP(BEU, VIO1_BEU0, VIO1_BEU1, VIO1_BEU2), - INTC_GROUP(IIC0, IIC0_ALI0, IIC0_TACKI0, IIC0_WAITI0, IIC0_DTEI0), - INTC_GROUP(IPMMU, IPMMU_IPMMUS, IPMMU_IPMMUB), - INTC_GROUP(IIC2, IIC2_ALI2, IIC2_TACKI2, IIC2_WAITI2, IIC2_DTEI2), -}; - -static struct intc_mask_reg intcs_mask_registers[] = { - { 0xffd20184, 0xffd201c4, 8, /* IMR1SA / IMCR1SA */ - { VIO1_BEU2, VIO1_BEU1, VIO1_BEU0, VIO1_CEU, - VIO2_VEU3, VIO2_VEU2, VIO2_VEU1, VIO2_VEU0 } }, - { 0xffd20188, 0xffd201c8, 8, /* IMR2SA / IMCR2SA */ - { VIO3_VOU, 0, VE2HO, VPU, - 0, 0, 0, 0 } }, - { 0xffd2018c, 0xffd201cc, 8, /* IMR3SA / IMCR3SA */ - { _2DDMAC_2DDM3, _2DDMAC_2DDM2, _2DDMAC_2DDM1, _2DDMAC_2DDM0, - BEM, ASA, PEP, ICB } }, - { 0xffd20190, 0xffd201d0, 8, /* IMR4SA / IMCR4SA */ - { 0, 0, MVI3, 0, - JPEG, HQE, 0, LCDC } }, - { 0xffd20194, 0xffd201d4, 8, /* IMR5SA / IMCR5SA */ - { 0, RTDMAC_2_DADERR, RTDMAC_2_DEI5, RTDMAC_2_DEI4, - RTDMAC_1_DEI3, RTDMAC_1_DEI2, RTDMAC_1_DEI1, RTDMAC_1_DEI0 } }, - { 0xffd20198, 0xffd201d8, 8, /* IMR6SA / IMCR6SA */ - { 0, 0, MSIOF, 0, - SGX530, 0, 0, 0 } }, - { 0xffd2019c, 0xffd201dc, 8, /* IMR7SA / IMCR7SA */ - { 0, TMU_TUNI2, TMU_TUNI1, TMU_TUNI0, - 0, 0, 0, 0 } }, - { 0xffd201a4, 0xffd201e4, 8, /* IMR9SA / IMCR9SA */ - { 0, 0, 0, CMT, - IIC2_DTEI2, IIC2_WAITI2, IIC2_TACKI2, IIC2_ALI2 } }, - { 0xffd201a8, 0xffd201e8, 8, /* IMR10SA / IMCR10SA */ - { IPMMU_IPMMUS, 0, IPMMU_IPMMUB, 0, - 0, 0, 0, 0 } }, - { 0xffd201ac, 0xffd201ec, 8, /* IMR11SA / IMCR11SA */ - { IIC0_DTEI0, IIC0_WAITI0, IIC0_TACKI0, IIC0_ALI0, - 0, 0, IPMMUI, TSIF } }, - { 0xffd20104, 0, 16, /* INTAMASK */ - { 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, INTCS } }, -}; - -/* Priority is needed for INTCA to receive the INTCS interrupt */ -static struct intc_prio_reg intcs_prio_registers[] = { - { 0xffd20000, 0, 16, 4, /* IPRAS */ { 0, MVI3, _2DDMAC, ICB } }, - { 0xffd20004, 0, 16, 4, /* IPRBS */ { JPEG, LCDC, 0, 0 } }, - { 0xffd20008, 0, 16, 4, /* IPRCS */ { BBIF2, 0, 0, 0 } }, - { 0xffd20010, 0, 16, 4, /* IPRES */ { RTDMAC_1, VIO1_CEU, 0, VPU } }, - { 0xffd20014, 0, 16, 4, /* IPRFS */ { 0, RTDMAC_2, 0, CMT } }, - { 0xffd20018, 0, 16, 4, /* IPRGS */ { TMU_TUNI0, TMU_TUNI1, - TMU_TUNI2, 0 } }, - { 0xffd2001c, 0, 16, 4, /* IPRHS */ { 0, VIO3_VOU, VEU, BEU } }, - { 0xffd20020, 0, 16, 4, /* IPRIS */ { 0, MSIOF, TSIF, IIC0 } }, - { 0xffd20024, 0, 16, 4, /* IPRJS */ { 0, SGX530, 0, 0 } }, - { 0xffd20028, 0, 16, 4, /* IPRKS */ { BEM, ASA, IPMMUI, PEP } }, - { 0xffd2002c, 0, 16, 4, /* IPRLS */ { IPMMU, 0, VE2HO, HQE } }, - { 0xffd20030, 0, 16, 4, /* IPRMS */ { IIC2, 0, 0, 0 } }, -}; - -static struct resource intcs_resources[] __initdata = { - [0] = { - .start = 0xffd20000, - .end = 0xffd2ffff, - .flags = IORESOURCE_MEM, - } -}; - -static struct intc_desc intcs_desc __initdata = { - .name = "sh7367-intcs", - .resource = intcs_resources, - .num_resources = ARRAY_SIZE(intcs_resources), - .hw = INTC_HW_DESC(intcs_vectors, intcs_groups, intcs_mask_registers, - intcs_prio_registers, NULL, NULL), -}; - -static void intcs_demux(unsigned int irq, struct irq_desc *desc) -{ - void __iomem *reg = (void *)irq_get_handler_data(irq); - unsigned int evtcodeas = ioread32(reg); - - generic_handle_irq(intcs_evt2irq(evtcodeas)); -} - -void __init sh7367_init_irq(void) -{ - void __iomem *intevtsa = ioremap_nocache(0xffd20100, PAGE_SIZE); - - register_intc_controller(&intca_desc); - register_intc_controller(&intca_irq_pins_desc); - register_intc_controller(&intcs_desc); - - /* demux using INTEVTSA */ - irq_set_handler_data(evt2irq(0xf80), (void *)intevtsa); - irq_set_chained_handler(evt2irq(0xf80), intcs_demux); -} diff --git a/arch/arm/mach-shmobile/intc-sh7377.c b/arch/arm/mach-shmobile/intc-sh7377.c deleted file mode 100644 index b84a460a3405..000000000000 --- a/arch/arm/mach-shmobile/intc-sh7377.c +++ /dev/null @@ -1,592 +0,0 @@ -/* - * sh7377 processor support - INTC hardware block - * - * Copyright (C) 2010 Magnus Damm - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/interrupt.h> -#include <linux/irq.h> -#include <linux/io.h> -#include <linux/sh_intc.h> -#include <mach/intc.h> -#include <mach/irqs.h> -#include <asm/mach-types.h> -#include <asm/mach/arch.h> - -enum { - UNUSED_INTCA = 0, - ENABLED, - DISABLED, - - /* interrupt sources INTCA */ - DIRC, - _2DG, - CRYPT_STD, - IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1, - AP_ARM_IRQPMU, AP_ARM_COMMTX, AP_ARM_COMMRX, - MFI_MFIM, MFI_MFIS, - BBIF1, BBIF2, - USBDMAC_USHDMI, - USBHS_USHI0, USBHS_USHI1, - _3DG_SGX540, - CMT1_CMT10, CMT1_CMT11, CMT1_CMT12, CMT1_CMT13, CMT2, CMT3, - KEYSC_KEY, - SCIFA0, SCIFA1, SCIFA2, SCIFA3, - MSIOF2, MSIOF1, - SCIFA4, SCIFA5, SCIFB, - FLCTL_FLSTEI, FLCTL_FLTENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I, - SDHI0, - SDHI1, - MSU_MSU, MSU_MSU2, - IRREM, - MSUG, - IRDA, - TPU0, TPU1, TPU2, TPU3, TPU4, - LCRC, - PINTCA_PINT1, PINTCA_PINT2, - TTI20, - MISTY, - DDM, - RWDT0, RWDT1, - DMAC_1_DEI0, DMAC_1_DEI1, DMAC_1_DEI2, DMAC_1_DEI3, - DMAC_2_DEI4, DMAC_2_DEI5, DMAC_2_DADERR, - DMAC2_1_DEI0, DMAC2_1_DEI1, DMAC2_1_DEI2, DMAC2_1_DEI3, - DMAC2_2_DEI4, DMAC2_2_DEI5, DMAC2_2_DADERR, - DMAC3_1_DEI0, DMAC3_1_DEI1, DMAC3_1_DEI2, DMAC3_1_DEI3, - DMAC3_2_DEI4, DMAC3_2_DEI5, DMAC3_2_DADERR, - SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM, - ICUSB_ICUSB0, ICUSB_ICUSB1, - ICUDMC_ICUDMC1, ICUDMC_ICUDMC2, - SPU2_SPU0, SPU2_SPU1, - FSI, - FMSI, - SCUV, - IPMMU_IPMMUB, - AP_ARM_CTIIRQ, AP_ARM_DMAEXTERRIRQ, AP_ARM_DMAIRQ, AP_ARM_DMASIRQ, - MFIS2, - CPORTR2S, - CMT14, CMT15, - SCIFA6, - - /* interrupt groups INTCA */ - DMAC_1, DMAC_2, DMAC2_1, DMAC2_2, DMAC3_1, DMAC3_2, SHWYSTAT, - AP_ARM1, AP_ARM2, USBHS, SPU2, FLCTL, IIC1, - ICUSB, ICUDMC -}; - -static struct intc_vect intca_vectors[] __initdata = { - INTC_VECT(DIRC, 0x0560), - INTC_VECT(_2DG, 0x05e0), - INTC_VECT(CRYPT_STD, 0x0700), - INTC_VECT(IIC1_ALI1, 0x0780), INTC_VECT(IIC1_TACKI1, 0x07a0), - INTC_VECT(IIC1_WAITI1, 0x07c0), INTC_VECT(IIC1_DTEI1, 0x07e0), - INTC_VECT(AP_ARM_IRQPMU, 0x0800), INTC_VECT(AP_ARM_COMMTX, 0x0840), - INTC_VECT(AP_ARM_COMMRX, 0x0860), - INTC_VECT(MFI_MFIM, 0x0900), INTC_VECT(MFI_MFIS, 0x0920), - INTC_VECT(BBIF1, 0x0940), INTC_VECT(BBIF2, 0x0960), - INTC_VECT(USBDMAC_USHDMI, 0x0a00), - INTC_VECT(USBHS_USHI0, 0x0a20), INTC_VECT(USBHS_USHI1, 0x0a40), - INTC_VECT(_3DG_SGX540, 0x0a60), - INTC_VECT(CMT1_CMT10, 0x0b00), INTC_VECT(CMT1_CMT11, 0x0b20), - INTC_VECT(CMT1_CMT12, 0x0b40), INTC_VECT(CMT1_CMT13, 0x0b60), - INTC_VECT(CMT2, 0x0b80), INTC_VECT(CMT3, 0x0ba0), - INTC_VECT(KEYSC_KEY, 0x0be0), - INTC_VECT(SCIFA0, 0x0c00), INTC_VECT(SCIFA1, 0x0c20), - INTC_VECT(SCIFA2, 0x0c40), INTC_VECT(SCIFA3, 0x0c60), - INTC_VECT(MSIOF2, 0x0c80), INTC_VECT(MSIOF1, 0x0d00), - INTC_VECT(SCIFA4, 0x0d20), INTC_VECT(SCIFA5, 0x0d40), - INTC_VECT(SCIFB, 0x0d60), - INTC_VECT(FLCTL_FLSTEI, 0x0d80), INTC_VECT(FLCTL_FLTENDI, 0x0da0), - INTC_VECT(FLCTL_FLTREQ0I, 0x0dc0), INTC_VECT(FLCTL_FLTREQ1I, 0x0de0), - INTC_VECT(SDHI0, 0x0e00), INTC_VECT(SDHI0, 0x0e20), - INTC_VECT(SDHI0, 0x0e40), INTC_VECT(SDHI0, 0x0e60), - INTC_VECT(SDHI1, 0x0e80), INTC_VECT(SDHI1, 0x0ea0), - INTC_VECT(SDHI1, 0x0ec0), INTC_VECT(SDHI1, 0x0ee0), - INTC_VECT(MSU_MSU, 0x0f20), INTC_VECT(MSU_MSU2, 0x0f40), - INTC_VECT(IRREM, 0x0f60), - INTC_VECT(MSUG, 0x0fa0), - INTC_VECT(IRDA, 0x0480), - INTC_VECT(TPU0, 0x04a0), INTC_VECT(TPU1, 0x04c0), - INTC_VECT(TPU2, 0x04e0), INTC_VECT(TPU3, 0x0500), - INTC_VECT(TPU4, 0x0520), - INTC_VECT(LCRC, 0x0540), - INTC_VECT(PINTCA_PINT1, 0x1000), INTC_VECT(PINTCA_PINT2, 0x1020), - INTC_VECT(TTI20, 0x1100), - INTC_VECT(MISTY, 0x1120), - INTC_VECT(DDM, 0x1140), - INTC_VECT(RWDT0, 0x1280), INTC_VECT(RWDT1, 0x12a0), - INTC_VECT(DMAC_1_DEI0, 0x2000), INTC_VECT(DMAC_1_DEI1, 0x2020), - INTC_VECT(DMAC_1_DEI2, 0x2040), INTC_VECT(DMAC_1_DEI3, 0x2060), - INTC_VECT(DMAC_2_DEI4, 0x2080), INTC_VECT(DMAC_2_DEI5, 0x20a0), - INTC_VECT(DMAC_2_DADERR, 0x20c0), - INTC_VECT(DMAC2_1_DEI0, 0x2100), INTC_VECT(DMAC2_1_DEI1, 0x2120), - INTC_VECT(DMAC2_1_DEI2, 0x2140), INTC_VECT(DMAC2_1_DEI3, 0x2160), - INTC_VECT(DMAC2_2_DEI4, 0x2180), INTC_VECT(DMAC2_2_DEI5, 0x21a0), - INTC_VECT(DMAC2_2_DADERR, 0x21c0), - INTC_VECT(DMAC3_1_DEI0, 0x2200), INTC_VECT(DMAC3_1_DEI1, 0x2220), - INTC_VECT(DMAC3_1_DEI2, 0x2240), INTC_VECT(DMAC3_1_DEI3, 0x2260), - INTC_VECT(DMAC3_2_DEI4, 0x2280), INTC_VECT(DMAC3_2_DEI5, 0x22a0), - INTC_VECT(DMAC3_2_DADERR, 0x22c0), - INTC_VECT(SHWYSTAT_RT, 0x1300), INTC_VECT(SHWYSTAT_HS, 0x1d20), - INTC_VECT(SHWYSTAT_COM, 0x1340), - INTC_VECT(ICUSB_ICUSB0, 0x1700), INTC_VECT(ICUSB_ICUSB1, 0x1720), - INTC_VECT(ICUDMC_ICUDMC1, 0x1780), INTC_VECT(ICUDMC_ICUDMC2, 0x17a0), - INTC_VECT(SPU2_SPU0, 0x1800), INTC_VECT(SPU2_SPU1, 0x1820), - INTC_VECT(FSI, 0x1840), - INTC_VECT(FMSI, 0x1860), - INTC_VECT(SCUV, 0x1880), - INTC_VECT(IPMMU_IPMMUB, 0x1900), - INTC_VECT(AP_ARM_CTIIRQ, 0x1980), - INTC_VECT(AP_ARM_DMAEXTERRIRQ, 0x19a0), - INTC_VECT(AP_ARM_DMAIRQ, 0x19c0), - INTC_VECT(AP_ARM_DMASIRQ, 0x19e0), - INTC_VECT(MFIS2, 0x1a00), - INTC_VECT(CPORTR2S, 0x1a20), - INTC_VECT(CMT14, 0x1a40), INTC_VECT(CMT15, 0x1a60), - INTC_VECT(SCIFA6, 0x1a80), -}; - -static struct intc_group intca_groups[] __initdata = { - INTC_GROUP(DMAC_1, DMAC_1_DEI0, - DMAC_1_DEI1, DMAC_1_DEI2, DMAC_1_DEI3), - INTC_GROUP(DMAC_2, DMAC_2_DEI4, - DMAC_2_DEI5, DMAC_2_DADERR), - INTC_GROUP(DMAC2_1, DMAC2_1_DEI0, - DMAC2_1_DEI1, DMAC2_1_DEI2, DMAC2_1_DEI3), - INTC_GROUP(DMAC2_2, DMAC2_2_DEI4, - DMAC2_2_DEI5, DMAC2_2_DADERR), - INTC_GROUP(DMAC3_1, DMAC3_1_DEI0, - DMAC3_1_DEI1, DMAC3_1_DEI2, DMAC3_1_DEI3), - INTC_GROUP(DMAC3_2, DMAC3_2_DEI4, - DMAC3_2_DEI5, DMAC3_2_DADERR), - INTC_GROUP(AP_ARM1, AP_ARM_IRQPMU, AP_ARM_COMMTX, AP_ARM_COMMTX), - INTC_GROUP(USBHS, USBHS_USHI0, USBHS_USHI1), - INTC_GROUP(SPU2, SPU2_SPU0, SPU2_SPU1), - INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLTENDI, - FLCTL_FLTREQ0I, FLCTL_FLTREQ1I), - INTC_GROUP(IIC1, IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1), - INTC_GROUP(SHWYSTAT, SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM), - INTC_GROUP(ICUSB, ICUSB_ICUSB0, ICUSB_ICUSB1), - INTC_GROUP(ICUDMC, ICUDMC_ICUDMC1, ICUDMC_ICUDMC2), -}; - -static struct intc_mask_reg intca_mask_registers[] __initdata = { - { 0xe6940080, 0xe69400c0, 8, /* IMR0A / IMCR0A */ - { DMAC2_1_DEI3, DMAC2_1_DEI2, DMAC2_1_DEI1, DMAC2_1_DEI0, - AP_ARM_IRQPMU, 0, AP_ARM_COMMTX, AP_ARM_COMMRX } }, - { 0xe6940084, 0xe69400c4, 8, /* IMR1A / IMCR1A */ - { _2DG, CRYPT_STD, DIRC, 0, - DMAC_1_DEI3, DMAC_1_DEI2, DMAC_1_DEI1, DMAC_1_DEI0 } }, - { 0xe6940088, 0xe69400c8, 8, /* IMR2A / IMCR2A */ - { PINTCA_PINT1, PINTCA_PINT2, 0, 0, - BBIF1, BBIF2, MFI_MFIS, MFI_MFIM } }, - { 0xe694008c, 0xe69400cc, 8, /* IMR3A / IMCR3A */ - { DMAC3_1_DEI3, DMAC3_1_DEI2, DMAC3_1_DEI1, DMAC3_1_DEI0, - DMAC3_2_DADERR, DMAC3_2_DEI5, DMAC3_2_DEI4, IRDA } }, - { 0xe6940090, 0xe69400d0, 8, /* IMR4A / IMCR4A */ - { DDM, 0, 0, 0, - 0, 0, 0, 0 } }, - { 0xe6940094, 0xe69400d4, 8, /* IMR5A / IMCR5A */ - { KEYSC_KEY, DMAC_2_DADERR, DMAC_2_DEI5, DMAC_2_DEI4, - SCIFA3, SCIFA2, SCIFA1, SCIFA0 } }, - { 0xe6940098, 0xe69400d8, 8, /* IMR6A / IMCR6A */ - { SCIFB, SCIFA5, SCIFA4, MSIOF1, - 0, 0, MSIOF2, 0 } }, - { 0xe694009c, 0xe69400dc, 8, /* IMR7A / IMCR7A */ - { DISABLED, ENABLED, ENABLED, ENABLED, - FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLTENDI, FLCTL_FLSTEI } }, - { 0xe69400a0, 0xe69400e0, 8, /* IMR8A / IMCR8A */ - { DISABLED, ENABLED, ENABLED, ENABLED, - TTI20, USBDMAC_USHDMI, 0, MSUG } }, - { 0xe69400a4, 0xe69400e4, 8, /* IMR9A / IMCR9A */ - { CMT1_CMT13, CMT1_CMT12, CMT1_CMT11, CMT1_CMT10, - CMT2, USBHS_USHI1, USBHS_USHI0, _3DG_SGX540 } }, - { 0xe69400a8, 0xe69400e8, 8, /* IMR10A / IMCR10A */ - { 0, DMAC2_2_DADERR, DMAC2_2_DEI5, DMAC2_2_DEI4, - 0, 0, 0, 0 } }, - { 0xe69400ac, 0xe69400ec, 8, /* IMR11A / IMCR11A */ - { IIC1_DTEI1, IIC1_WAITI1, IIC1_TACKI1, IIC1_ALI1, - LCRC, MSU_MSU2, IRREM, MSU_MSU } }, - { 0xe69400b0, 0xe69400f0, 8, /* IMR12A / IMCR12A */ - { 0, 0, TPU0, TPU1, - TPU2, TPU3, TPU4, 0 } }, - { 0xe69400b4, 0xe69400f4, 8, /* IMR13A / IMCR13A */ - { 0, 0, 0, 0, - MISTY, CMT3, RWDT1, RWDT0 } }, - { 0xe6950080, 0xe69500c0, 8, /* IMR0A3 / IMCR0A3 */ - { SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM, 0, - 0, 0, 0, 0 } }, - { 0xe6950090, 0xe69500d0, 8, /* IMR4A3 / IMCR4A3 */ - { ICUSB_ICUSB0, ICUSB_ICUSB1, 0, 0, - ICUDMC_ICUDMC1, ICUDMC_ICUDMC2, 0, 0 } }, - { 0xe6950094, 0xe69500d4, 8, /* IMR5A3 / IMCR5A3 */ - { SPU2_SPU0, SPU2_SPU1, FSI, FMSI, - SCUV, 0, 0, 0 } }, - { 0xe6950098, 0xe69500d8, 8, /* IMR6A3 / IMCR6A3 */ - { IPMMU_IPMMUB, 0, 0, 0, - AP_ARM_CTIIRQ, AP_ARM_DMAEXTERRIRQ, - AP_ARM_DMAIRQ, AP_ARM_DMASIRQ } }, - { 0xe695009c, 0xe69500dc, 8, /* IMR7A3 / IMCR7A3 */ - { MFIS2, CPORTR2S, CMT14, CMT15, - SCIFA6, 0, 0, 0 } }, -}; - -static struct intc_prio_reg intca_prio_registers[] __initdata = { - { 0xe6940000, 0, 16, 4, /* IPRAA */ { DMAC3_1, DMAC3_2, CMT2, LCRC } }, - { 0xe6940004, 0, 16, 4, /* IPRBA */ { IRDA, 0, BBIF1, BBIF2 } }, - { 0xe6940008, 0, 16, 4, /* IPRCA */ { _2DG, CRYPT_STD, - CMT1_CMT11, AP_ARM1 } }, - { 0xe694000c, 0, 16, 4, /* IPRDA */ { PINTCA_PINT1, PINTCA_PINT2, - CMT1_CMT12, TPU4 } }, - { 0xe6940010, 0, 16, 4, /* IPREA */ { DMAC_1, MFI_MFIS, - MFI_MFIM, USBHS } }, - { 0xe6940014, 0, 16, 4, /* IPRFA */ { KEYSC_KEY, DMAC_2, - _3DG_SGX540, CMT1_CMT10 } }, - { 0xe6940018, 0, 16, 4, /* IPRGA */ { SCIFA0, SCIFA1, - SCIFA2, SCIFA3 } }, - { 0xe694001c, 0, 16, 4, /* IPRGH */ { MSIOF2, USBDMAC_USHDMI, - FLCTL, SDHI0 } }, - { 0xe6940020, 0, 16, 4, /* IPRIA */ { MSIOF1, SCIFA4, MSU_MSU, IIC1 } }, - { 0xe6940024, 0, 16, 4, /* IPRJA */ { DMAC2_1, DMAC2_2, MSUG, TTI20 } }, - { 0xe6940028, 0, 16, 4, /* IPRKA */ { 0, CMT1_CMT13, IRREM, SDHI1 } }, - { 0xe694002c, 0, 16, 4, /* IPRLA */ { TPU0, TPU1, TPU2, TPU3 } }, - { 0xe6940030, 0, 16, 4, /* IPRMA */ { MISTY, CMT3, RWDT1, RWDT0 } }, - { 0xe6940034, 0, 16, 4, /* IPRNA */ { SCIFB, SCIFA5, 0, DDM } }, - { 0xe6940038, 0, 16, 4, /* IPROA */ { 0, 0, DIRC, 0 } }, - { 0xe6950000, 0, 16, 4, /* IPRAA3 */ { SHWYSTAT, 0, 0, 0 } }, - { 0xe6950020, 0, 16, 4, /* IPRIA3 */ { ICUSB, 0, 0, 0 } }, - { 0xe6950024, 0, 16, 4, /* IPRJA3 */ { ICUDMC, 0, 0, 0 } }, - { 0xe6950028, 0, 16, 4, /* IPRKA3 */ { SPU2, 0, FSI, FMSI } }, - { 0xe695002c, 0, 16, 4, /* IPRLA3 */ { SCUV, 0, 0, 0 } }, - { 0xe6950030, 0, 16, 4, /* IPRMA3 */ { IPMMU_IPMMUB, 0, 0, 0 } }, - { 0xe6950034, 0, 16, 4, /* IPRNA3 */ { AP_ARM2, 0, 0, 0 } }, - { 0xe6950038, 0, 16, 4, /* IPROA3 */ { MFIS2, CPORTR2S, - CMT14, CMT15 } }, - { 0xe694003c, 0, 16, 4, /* IPRPA3 */ { SCIFA6, 0, 0, 0 } }, -}; - -static struct intc_desc intca_desc __initdata = { - .name = "sh7377-intca", - .force_enable = ENABLED, - .force_disable = DISABLED, - .hw = INTC_HW_DESC(intca_vectors, intca_groups, - intca_mask_registers, intca_prio_registers, - NULL, NULL), -}; - -INTC_IRQ_PINS_32(intca_irq_pins, 0xe6900000, - INTC_VECT, "sh7377-intca-irq-pins"); - -/* this macro ignore entry which is also in INTCA */ -#define __IGNORE(a...) -#define __IGNORE0(a...) 0 - -enum { - UNUSED_INTCS = 0, - - INTCS, - - /* interrupt sources INTCS */ - VEU_VEU0, VEU_VEU1, VEU_VEU2, VEU_VEU3, - RTDMAC1_1_DEI0, RTDMAC1_1_DEI1, RTDMAC1_1_DEI2, RTDMAC1_1_DEI3, - CEU, - BEU_BEU0, BEU_BEU1, BEU_BEU2, - __IGNORE(MFI) - __IGNORE(BBIF2) - VPU, - TSIF1, - __IGNORE(SGX540) - _2DDMAC, - IIC2_ALI2, IIC2_TACKI2, IIC2_WAITI2, IIC2_DTEI2, - IPMMU_IPMMUR, IPMMU_IPMMUR2, - RTDMAC1_2_DEI4, RTDMAC1_2_DEI5, RTDMAC1_2_DADERR, - __IGNORE(KEYSC) - __IGNORE(TTI20) - __IGNORE(MSIOF) - IIC0_ALI0, IIC0_TACKI0, IIC0_WAITI0, IIC0_DTEI0, - TMU_TUNI0, TMU_TUNI1, TMU_TUNI2, - CMT0, - TSIF0, - __IGNORE(CMT2) - LMB, - __IGNORE(MSUG) - __IGNORE(MSU_MSU, MSU_MSU2) - __IGNORE(CTI) - MVI3, - __IGNORE(RWDT0) - __IGNORE(RWDT1) - ICB, - PEP, - ASA, - __IGNORE(_2DG) - HQE, - JPU, - LCDC0, - __IGNORE(LCRC) - RTDMAC2_1_DEI0, RTDMAC2_1_DEI1, RTDMAC2_1_DEI2, RTDMAC2_1_DEI3, - RTDMAC2_2_DEI4, RTDMAC2_2_DEI5, RTDMAC2_2_DADERR, - FRC, - LCDC1, - CSIRX, - DSITX_DSITX0, DSITX_DSITX1, - __IGNORE(SPU2_SPU0, SPU2_SPU1) - __IGNORE(FSI) - __IGNORE(FMSI) - __IGNORE(SCUV) - TMU1_TUNI10, TMU1_TUNI11, TMU1_TUNI12, - TSIF2, - CMT4, - __IGNORE(MFIS2) - CPORTS2R, - - /* interrupt groups INTCS */ - RTDMAC1_1, RTDMAC1_2, VEU, BEU, IIC0, __IGNORE(MSU) IPMMU, - IIC2, RTDMAC2_1, RTDMAC2_2, DSITX, __IGNORE(SPU2) TMU1, -}; - -#define INTCS_INTVECT 0x0F80 -static struct intc_vect intcs_vectors[] __initdata = { - INTCS_VECT(VEU_VEU0, 0x0700), INTCS_VECT(VEU_VEU1, 0x0720), - INTCS_VECT(VEU_VEU2, 0x0740), INTCS_VECT(VEU_VEU3, 0x0760), - INTCS_VECT(RTDMAC1_1_DEI0, 0x0800), INTCS_VECT(RTDMAC1_1_DEI1, 0x0820), - INTCS_VECT(RTDMAC1_1_DEI2, 0x0840), INTCS_VECT(RTDMAC1_1_DEI3, 0x0860), - INTCS_VECT(CEU, 0x0880), - INTCS_VECT(BEU_BEU0, 0x08A0), - INTCS_VECT(BEU_BEU1, 0x08C0), - INTCS_VECT(BEU_BEU2, 0x08E0), - __IGNORE(INTCS_VECT(MFI, 0x0900)) - __IGNORE(INTCS_VECT(BBIF2, 0x0960)) - INTCS_VECT(VPU, 0x0980), - INTCS_VECT(TSIF1, 0x09A0), - __IGNORE(INTCS_VECT(SGX540, 0x09E0)) - INTCS_VECT(_2DDMAC, 0x0A00), - INTCS_VECT(IIC2_ALI2, 0x0A80), INTCS_VECT(IIC2_TACKI2, 0x0AA0), - INTCS_VECT(IIC2_WAITI2, 0x0AC0), INTCS_VECT(IIC2_DTEI2, 0x0AE0), - INTCS_VECT(IPMMU_IPMMUR, 0x0B00), INTCS_VECT(IPMMU_IPMMUR2, 0x0B20), - INTCS_VECT(RTDMAC1_2_DEI4, 0x0B80), - INTCS_VECT(RTDMAC1_2_DEI5, 0x0BA0), - INTCS_VECT(RTDMAC1_2_DADERR, 0x0BC0), - __IGNORE(INTCS_VECT(KEYSC 0x0BE0)) - __IGNORE(INTCS_VECT(TTI20, 0x0C80)) - __IGNORE(INTCS_VECT(MSIOF, 0x0D20)) - INTCS_VECT(IIC0_ALI0, 0x0E00), INTCS_VECT(IIC0_TACKI0, 0x0E20), - INTCS_VECT(IIC0_WAITI0, 0x0E40), INTCS_VECT(IIC0_DTEI0, 0x0E60), - INTCS_VECT(TMU_TUNI0, 0x0E80), - INTCS_VECT(TMU_TUNI1, 0x0EA0), - INTCS_VECT(TMU_TUNI2, 0x0EC0), - INTCS_VECT(CMT0, 0x0F00), - INTCS_VECT(TSIF0, 0x0F20), - __IGNORE(INTCS_VECT(CMT2, 0x0F40)) - INTCS_VECT(LMB, 0x0F60), - __IGNORE(INTCS_VECT(MSUG, 0x0F80)) - __IGNORE(INTCS_VECT(MSU_MSU, 0x0FA0)) - __IGNORE(INTCS_VECT(MSU_MSU2, 0x0FC0)) - __IGNORE(INTCS_VECT(CTI, 0x0400)) - INTCS_VECT(MVI3, 0x0420), - __IGNORE(INTCS_VECT(RWDT0, 0x0440)) - __IGNORE(INTCS_VECT(RWDT1, 0x0460)) - INTCS_VECT(ICB, 0x0480), - INTCS_VECT(PEP, 0x04A0), - INTCS_VECT(ASA, 0x04C0), - __IGNORE(INTCS_VECT(_2DG, 0x04E0)) - INTCS_VECT(HQE, 0x0540), - INTCS_VECT(JPU, 0x0560), - INTCS_VECT(LCDC0, 0x0580), - __IGNORE(INTCS_VECT(LCRC, 0x05A0)) - INTCS_VECT(RTDMAC2_1_DEI0, 0x1300), INTCS_VECT(RTDMAC2_1_DEI1, 0x1320), - INTCS_VECT(RTDMAC2_1_DEI2, 0x1340), INTCS_VECT(RTDMAC2_1_DEI3, 0x1360), - INTCS_VECT(RTDMAC2_2_DEI4, 0x1380), INTCS_VECT(RTDMAC2_2_DEI5, 0x13A0), - INTCS_VECT(RTDMAC2_2_DADERR, 0x13C0), - INTCS_VECT(FRC, 0x1700), - INTCS_VECT(LCDC1, 0x1780), - INTCS_VECT(CSIRX, 0x17A0), - INTCS_VECT(DSITX_DSITX0, 0x17C0), INTCS_VECT(DSITX_DSITX1, 0x17E0), - __IGNORE(INTCS_VECT(SPU2_SPU0, 0x1800)) - __IGNORE(INTCS_VECT(SPU2_SPU1, 0x1820)) - __IGNORE(INTCS_VECT(FSI, 0x1840)) - __IGNORE(INTCS_VECT(FMSI, 0x1860)) - __IGNORE(INTCS_VECT(SCUV, 0x1880)) - INTCS_VECT(TMU1_TUNI10, 0x1900), INTCS_VECT(TMU1_TUNI11, 0x1920), - INTCS_VECT(TMU1_TUNI12, 0x1940), - INTCS_VECT(TSIF2, 0x1960), - INTCS_VECT(CMT4, 0x1980), - __IGNORE(INTCS_VECT(MFIS2, 0x1A00)) - INTCS_VECT(CPORTS2R, 0x1A20), - - INTC_VECT(INTCS, INTCS_INTVECT), -}; - -static struct intc_group intcs_groups[] __initdata = { - INTC_GROUP(RTDMAC1_1, - RTDMAC1_1_DEI0, RTDMAC1_1_DEI1, - RTDMAC1_1_DEI2, RTDMAC1_1_DEI3), - INTC_GROUP(RTDMAC1_2, - RTDMAC1_2_DEI4, RTDMAC1_2_DEI5, RTDMAC1_2_DADERR), - INTC_GROUP(VEU, VEU_VEU0, VEU_VEU1, VEU_VEU2, VEU_VEU3), - INTC_GROUP(BEU, BEU_BEU0, BEU_BEU1, BEU_BEU2), - INTC_GROUP(IIC0, IIC0_ALI0, IIC0_TACKI0, IIC0_WAITI0, IIC0_DTEI0), - __IGNORE(INTC_GROUP(MSU, MSU_MSU, MSU_MSU2)) - INTC_GROUP(IPMMU, IPMMU_IPMMUR, IPMMU_IPMMUR2), - INTC_GROUP(IIC2, IIC2_ALI2, IIC2_TACKI2, IIC2_WAITI2, IIC2_DTEI2), - INTC_GROUP(RTDMAC2_1, - RTDMAC2_1_DEI0, RTDMAC2_1_DEI1, - RTDMAC2_1_DEI2, RTDMAC2_1_DEI3), - INTC_GROUP(RTDMAC2_2, RTDMAC2_2_DEI4, RTDMAC2_2_DEI5, RTDMAC2_2_DADERR), - INTC_GROUP(DSITX, DSITX_DSITX0, DSITX_DSITX1), - __IGNORE(INTC_GROUP(SPU2, SPU2_SPU0, SPU2_SPU1)) - INTC_GROUP(TMU1, TMU1_TUNI10, TMU1_TUNI11, TMU1_TUNI12), -}; - -static struct intc_mask_reg intcs_mask_registers[] __initdata = { - { 0xE6940184, 0xE69401C4, 8, /* IMR1AS / IMCR1AS */ - { BEU_BEU2, BEU_BEU1, BEU_BEU0, CEU, - VEU_VEU3, VEU_VEU2, VEU_VEU1, VEU_VEU0 } }, - { 0xE6940188, 0xE69401C8, 8, /* IMR2AS / IMCR2AS */ - { 0, 0, 0, VPU, - __IGNORE0(BBIF2), 0, 0, __IGNORE0(MFI) } }, - { 0xE694018C, 0xE69401CC, 8, /* IMR3AS / IMCR3AS */ - { 0, 0, 0, _2DDMAC, - __IGNORE0(_2DG), ASA, PEP, ICB } }, - { 0xE6940190, 0xE69401D0, 8, /* IMR4AS / IMCR4AS */ - { 0, 0, MVI3, __IGNORE0(CTI), - JPU, HQE, __IGNORE0(LCRC), LCDC0 } }, - { 0xE6940194, 0xE69401D4, 8, /* IMR5AS / IMCR5AS */ - { __IGNORE0(KEYSC), RTDMAC1_2_DADERR, RTDMAC1_2_DEI5, RTDMAC1_2_DEI4, - RTDMAC1_1_DEI3, RTDMAC1_1_DEI2, RTDMAC1_1_DEI1, RTDMAC1_1_DEI0 } }, - __IGNORE({ 0xE6940198, 0xE69401D8, 8, /* IMR6AS / IMCR6AS */ - { 0, 0, MSIOF, 0, - SGX540, 0, TTI20, 0 } }) - { 0xE694019C, 0xE69401DC, 8, /* IMR7AS / IMCR7AS */ - { 0, TMU_TUNI2, TMU_TUNI1, TMU_TUNI0, - 0, 0, 0, 0 } }, - __IGNORE({ 0xE69401A0, 0xE69401E0, 8, /* IMR8AS / IMCR8AS */ - { 0, 0, 0, 0, - 0, MSU_MSU, MSU_MSU2, MSUG } }) - { 0xE69401A4, 0xE69401E4, 8, /* IMR9AS / IMCR9AS */ - { __IGNORE0(RWDT1), __IGNORE0(RWDT0), __IGNORE0(CMT2), CMT0, - IIC2_DTEI2, IIC2_WAITI2, IIC2_TACKI2, IIC2_ALI2 } }, - { 0xE69401A8, 0xE69401E8, 8, /* IMR10AS / IMCR10AS */ - { 0, 0, IPMMU_IPMMUR, IPMMU_IPMMUR2, - 0, 0, 0, 0 } }, - { 0xE69401AC, 0xE69401EC, 8, /* IMR11AS / IMCR11AS */ - { IIC0_DTEI0, IIC0_WAITI0, IIC0_TACKI0, IIC0_ALI0, - 0, TSIF1, LMB, TSIF0 } }, - { 0xE6950180, 0xE69501C0, 8, /* IMR0AS3 / IMCR0AS3 */ - { RTDMAC2_1_DEI0, RTDMAC2_1_DEI1, RTDMAC2_1_DEI2, RTDMAC2_1_DEI3, - RTDMAC2_2_DEI4, RTDMAC2_2_DEI5, RTDMAC2_2_DADERR, 0 } }, - { 0xE6950190, 0xE69501D0, 8, /* IMR4AS3 / IMCR4AS3 */ - { FRC, 0, 0, 0, - LCDC1, CSIRX, DSITX_DSITX0, DSITX_DSITX1 } }, - __IGNORE({ 0xE6950194, 0xE69501D4, 8, /* IMR5AS3 / IMCR5AS3 */ - {SPU2_SPU0, SPU2_SPU1, FSI, FMSI, - SCUV, 0, 0, 0 } }) - { 0xE6950198, 0xE69501D8, 8, /* IMR6AS3 / IMCR6AS3 */ - { TMU1_TUNI10, TMU1_TUNI11, TMU1_TUNI12, TSIF2, - CMT4, 0, 0, 0 } }, - { 0xE695019C, 0xE69501DC, 8, /* IMR7AS3 / IMCR7AS3 */ - { __IGNORE0(MFIS2), CPORTS2R, 0, 0, - 0, 0, 0, 0 } }, - { 0xFFD20104, 0, 16, /* INTAMASK */ - { 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, INTCS } } -}; - -static struct intc_prio_reg intcs_prio_registers[] __initdata = { - /* IPRAS */ - { 0xFFD20000, 0, 16, 4, { __IGNORE0(CTI), MVI3, _2DDMAC, ICB } }, - /* IPRBS */ - { 0xFFD20004, 0, 16, 4, { JPU, LCDC0, 0, __IGNORE0(LCRC) } }, - /* IPRCS */ - __IGNORE({ 0xFFD20008, 0, 16, 4, { BBIF2, 0, 0, 0 } }) - /* IPRES */ - { 0xFFD20010, 0, 16, 4, { RTDMAC1_1, CEU, __IGNORE0(MFI), VPU } }, - /* IPRFS */ - { 0xFFD20014, 0, 16, 4, - { __IGNORE0(KEYSC), RTDMAC1_2, __IGNORE0(CMT2), CMT0 } }, - /* IPRGS */ - { 0xFFD20018, 0, 16, 4, { TMU_TUNI0, TMU_TUNI1, TMU_TUNI2, TSIF1 } }, - /* IPRHS */ - { 0xFFD2001C, 0, 16, 4, { __IGNORE0(TTI20), 0, VEU, BEU } }, - /* IPRIS */ - { 0xFFD20020, 0, 16, 4, { 0, __IGNORE0(MSIOF), TSIF0, IIC0 } }, - /* IPRJS */ - __IGNORE({ 0xFFD20024, 0, 16, 4, { 0, SGX540, MSUG, MSU } }) - /* IPRKS */ - { 0xFFD20028, 0, 16, 4, { __IGNORE0(_2DG), ASA, LMB, PEP } }, - /* IPRLS */ - { 0xFFD2002C, 0, 16, 4, { IPMMU, 0, 0, HQE } }, - /* IPRMS */ - { 0xFFD20030, 0, 16, 4, - { IIC2, 0, __IGNORE0(RWDT1), __IGNORE0(RWDT0) } }, - /* IPRAS3 */ - { 0xFFD50000, 0, 16, 4, { RTDMAC2_1, 0, 0, 0 } }, - /* IPRBS3 */ - { 0xFFD50004, 0, 16, 4, { RTDMAC2_2, 0, 0, 0 } }, - /* IPRIS3 */ - { 0xFFD50020, 0, 16, 4, { FRC, 0, 0, 0 } }, - /* IPRJS3 */ - { 0xFFD50024, 0, 16, 4, { LCDC1, CSIRX, DSITX, 0 } }, - /* IPRKS3 */ - __IGNORE({ 0xFFD50028, 0, 16, 4, { SPU2, 0, FSI, FMSI } }) - /* IPRLS3 */ - __IGNORE({ 0xFFD5002C, 0, 16, 4, { SCUV, 0, 0, 0 } }) - /* IPRMS3 */ - { 0xFFD50030, 0, 16, 4, { TMU1, 0, 0, TSIF2 } }, - /* IPRNS3 */ - { 0xFFD50034, 0, 16, 4, { CMT4, 0, 0, 0 } }, - /* IPROS3 */ - { 0xFFD50038, 0, 16, 4, { __IGNORE0(MFIS2), CPORTS2R, 0, 0 } }, -}; - -static struct resource intcs_resources[] __initdata = { - [0] = { - .start = 0xffd20000, - .end = 0xffd500ff, - .flags = IORESOURCE_MEM, - } -}; - -static struct intc_desc intcs_desc __initdata = { - .name = "sh7377-intcs", - .resource = intcs_resources, - .num_resources = ARRAY_SIZE(intcs_resources), - .hw = INTC_HW_DESC(intcs_vectors, intcs_groups, - intcs_mask_registers, intcs_prio_registers, - NULL, NULL), -}; - -static void intcs_demux(unsigned int irq, struct irq_desc *desc) -{ - void __iomem *reg = (void *)irq_get_handler_data(irq); - unsigned int evtcodeas = ioread32(reg); - - generic_handle_irq(intcs_evt2irq(evtcodeas)); -} - -#define INTEVTSA 0xFFD20100 -void __init sh7377_init_irq(void) -{ - void __iomem *intevtsa = ioremap_nocache(INTEVTSA, PAGE_SIZE); - - register_intc_controller(&intca_desc); - register_intc_controller(&intca_irq_pins_desc); - register_intc_controller(&intcs_desc); - - /* demux using INTEVTSA */ - irq_set_handler_data(evt2irq(INTCS_INTVECT), (void *)intevtsa); - irq_set_chained_handler(evt2irq(INTCS_INTVECT), intcs_demux); -} diff --git a/arch/arm/mach-shmobile/pfc-r8a7779.c b/arch/arm/mach-shmobile/pfc-r8a7779.c index cbc26ba2a0a2..9513234d322b 100644 --- a/arch/arm/mach-shmobile/pfc-r8a7779.c +++ b/arch/arm/mach-shmobile/pfc-r8a7779.c @@ -140,7 +140,7 @@ enum { FN_IP7_3_2, FN_IP7_6_4, FN_IP7_9_7, FN_IP7_12_10, FN_IP7_14_13, FN_IP2_7_4, FN_IP2_11_8, FN_IP2_15_12, FN_IP1_28_25, FN_IP2_3_0, FN_IP8_3_0, FN_IP8_7_4, - FN_IP8_11_8, FN_IP8_15_12, FN_PENC0, FN_PENC1, + FN_IP8_11_8, FN_IP8_15_12, FN_USB_PENC0, FN_USB_PENC1, FN_IP0_2_0, FN_IP8_17_16, FN_IP8_18, FN_IP8_19, /* GPSR5 */ @@ -176,7 +176,7 @@ enum { FN_A0, FN_SD1_DAT3, FN_MMC0_D3, FN_FD3, FN_BS, FN_SD1_DAT2, FN_MMC0_D2, FN_FD2, FN_ATADIR0, FN_SDSELF, FN_HCTS1, FN_TX4_C, - FN_PENC2, FN_SCK0, FN_PWM1, FN_PWMFSW0, + FN_USB_PENC2, FN_SCK0, FN_PWM1, FN_PWMFSW0, FN_SCIF_CLK, FN_TCLK0_C, /* IPSR1 */ @@ -447,7 +447,7 @@ enum { A0_MARK, SD1_DAT3_MARK, MMC0_D3_MARK, FD3_MARK, BS_MARK, SD1_DAT2_MARK, MMC0_D2_MARK, FD2_MARK, ATADIR0_MARK, SDSELF_MARK, HCTS1_MARK, TX4_C_MARK, - PENC2_MARK, SCK0_MARK, PWM1_MARK, PWMFSW0_MARK, + USB_PENC2_MARK, SCK0_MARK, PWM1_MARK, PWMFSW0_MARK, SCIF_CLK_MARK, TCLK0_C_MARK, EX_CS0_MARK, RX3_C_IRDA_RX_C_MARK, MMC0_D6_MARK, @@ -658,7 +658,7 @@ static pinmux_enum_t pinmux_data[] = { PINMUX_DATA(A18_MARK, FN_A18), PINMUX_DATA(A19_MARK, FN_A19), - PINMUX_IPSR_DATA(IP0_2_0, PENC2), + PINMUX_IPSR_DATA(IP0_2_0, USB_PENC2), PINMUX_IPSR_MODSEL_DATA(IP0_2_0, SCK0, SEL_SCIF0_0), PINMUX_IPSR_DATA(IP0_2_0, PWM1), PINMUX_IPSR_MODSEL_DATA(IP0_2_0, PWMFSW0, SEL_PWMFSW_0), @@ -1456,7 +1456,7 @@ static struct pinmux_gpio pinmux_gpios[] = { GPIO_FN(A19), /* IPSR0 */ - GPIO_FN(PENC2), GPIO_FN(SCK0), GPIO_FN(PWM1), GPIO_FN(PWMFSW0), + GPIO_FN(USB_PENC2), GPIO_FN(SCK0), GPIO_FN(PWM1), GPIO_FN(PWMFSW0), GPIO_FN(SCIF_CLK), GPIO_FN(TCLK0_C), GPIO_FN(BS), GPIO_FN(SD1_DAT2), GPIO_FN(MMC0_D2), GPIO_FN(FD2), GPIO_FN(ATADIR0), GPIO_FN(SDSELF), GPIO_FN(HCTS1), GPIO_FN(TX4_C), GPIO_FN(A0), GPIO_FN(SD1_DAT3), @@ -1865,8 +1865,8 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = { GP_4_30_FN, FN_IP8_18, GP_4_29_FN, FN_IP8_17_16, GP_4_28_FN, FN_IP0_2_0, - GP_4_27_FN, FN_PENC1, - GP_4_26_FN, FN_PENC0, + GP_4_27_FN, FN_USB_PENC1, + GP_4_26_FN, FN_USB_PENC0, GP_4_25_FN, FN_IP8_15_12, GP_4_24_FN, FN_IP8_11_8, GP_4_23_FN, FN_IP8_7_4, @@ -1981,7 +1981,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = { FN_BS, FN_SD1_DAT2, FN_MMC0_D2, FN_FD2, FN_ATADIR0, FN_SDSELF, FN_HCTS1, FN_TX4_C, /* IP0_2_0 [3] */ - FN_PENC2, FN_SCK0, FN_PWM1, FN_PWMFSW0, + FN_USB_PENC2, FN_SCK0, FN_PWM1, FN_PWMFSW0, FN_SCIF_CLK, FN_TCLK0_C, 0, 0 } }, { PINMUX_CFG_REG_VAR("IPSR1", 0xfffc0024, 32, diff --git a/arch/arm/mach-shmobile/pfc-sh7367.c b/arch/arm/mach-shmobile/pfc-sh7367.c deleted file mode 100644 index c0c137f39052..000000000000 --- a/arch/arm/mach-shmobile/pfc-sh7367.c +++ /dev/null @@ -1,1727 +0,0 @@ -/* - * sh7367 processor support - PFC hardware block - * - * Copyright (C) 2010 Magnus Damm - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/sh_pfc.h> -#include <mach/sh7367.h> - -#define CPU_ALL_PORT(fn, pfx, sfx) \ - PORT_10(fn, pfx, sfx), PORT_90(fn, pfx, sfx), \ - PORT_10(fn, pfx##10, sfx), PORT_90(fn, pfx##1, sfx), \ - PORT_10(fn, pfx##20, sfx), PORT_10(fn, pfx##21, sfx), \ - PORT_10(fn, pfx##22, sfx), PORT_10(fn, pfx##23, sfx), \ - PORT_10(fn, pfx##24, sfx), PORT_10(fn, pfx##25, sfx), \ - PORT_10(fn, pfx##26, sfx), PORT_1(fn, pfx##270, sfx), \ - PORT_1(fn, pfx##271, sfx), PORT_1(fn, pfx##272, sfx) - -enum { - PINMUX_RESERVED = 0, - - PINMUX_DATA_BEGIN, - PORT_ALL(DATA), /* PORT0_DATA -> PORT272_DATA */ - PINMUX_DATA_END, - - PINMUX_INPUT_BEGIN, - PORT_ALL(IN), /* PORT0_IN -> PORT272_IN */ - PINMUX_INPUT_END, - - PINMUX_INPUT_PULLUP_BEGIN, - PORT_ALL(IN_PU), /* PORT0_IN_PU -> PORT272_IN_PU */ - PINMUX_INPUT_PULLUP_END, - - PINMUX_INPUT_PULLDOWN_BEGIN, - PORT_ALL(IN_PD), /* PORT0_IN_PD -> PORT272_IN_PD */ - PINMUX_INPUT_PULLDOWN_END, - - PINMUX_OUTPUT_BEGIN, - PORT_ALL(OUT), /* PORT0_OUT -> PORT272_OUT */ - PINMUX_OUTPUT_END, - - PINMUX_FUNCTION_BEGIN, - PORT_ALL(FN_IN), /* PORT0_FN_IN -> PORT272_FN_IN */ - PORT_ALL(FN_OUT), /* PORT0_FN_OUT -> PORT272_FN_OUT */ - PORT_ALL(FN0), /* PORT0_FN0 -> PORT272_FN0 */ - PORT_ALL(FN1), /* PORT0_FN1 -> PORT272_FN1 */ - PORT_ALL(FN2), /* PORT0_FN2 -> PORT272_FN2 */ - PORT_ALL(FN3), /* PORT0_FN3 -> PORT272_FN3 */ - PORT_ALL(FN4), /* PORT0_FN4 -> PORT272_FN4 */ - PORT_ALL(FN5), /* PORT0_FN5 -> PORT272_FN5 */ - PORT_ALL(FN6), /* PORT0_FN6 -> PORT272_FN6 */ - PORT_ALL(FN7), /* PORT0_FN7 -> PORT272_FN7 */ - - MSELBCR_MSEL2_1, MSELBCR_MSEL2_0, - PINMUX_FUNCTION_END, - - PINMUX_MARK_BEGIN, - /* Special Pull-up / Pull-down Functions */ - PORT48_KEYIN0_PU_MARK, PORT49_KEYIN1_PU_MARK, - PORT50_KEYIN2_PU_MARK, PORT55_KEYIN3_PU_MARK, - PORT56_KEYIN4_PU_MARK, PORT57_KEYIN5_PU_MARK, - PORT58_KEYIN6_PU_MARK, - - /* 49-1 */ - VBUS0_MARK, CPORT0_MARK, CPORT1_MARK, CPORT2_MARK, - CPORT3_MARK, CPORT4_MARK, CPORT5_MARK, CPORT6_MARK, - CPORT7_MARK, CPORT8_MARK, CPORT9_MARK, CPORT10_MARK, - CPORT11_MARK, SIN2_MARK, CPORT12_MARK, XCTS2_MARK, - CPORT13_MARK, RFSPO4_MARK, CPORT14_MARK, RFSPO5_MARK, - CPORT15_MARK, CPORT16_MARK, CPORT17_MARK, SOUT2_MARK, - CPORT18_MARK, XRTS2_MARK, CPORT19_MARK, CPORT20_MARK, - RFSPO6_MARK, CPORT21_MARK, STATUS0_MARK, CPORT22_MARK, - STATUS1_MARK, CPORT23_MARK, STATUS2_MARK, RFSPO7_MARK, - MPORT0_MARK, MPORT1_MARK, B_SYNLD1_MARK, B_SYNLD2_MARK, - XMAINPS_MARK, XDIVPS_MARK, XIDRST_MARK, IDCLK_MARK, - IDIO_MARK, SOUT1_MARK, SCIFA4_TXD_MARK, - M02_BERDAT_MARK, SIN1_MARK, SCIFA4_RXD_MARK, XWUP_MARK, - XRTS1_MARK, SCIFA4_RTS_MARK, M03_BERCLK_MARK, - XCTS1_MARK, SCIFA4_CTS_MARK, - - /* 49-2 */ - HSU_IQ_AGC6_MARK, MFG2_IN2_MARK, MSIOF2_MCK0_MARK, - HSU_IQ_AGC5_MARK, MFG2_IN1_MARK, MSIOF2_MCK1_MARK, - HSU_IQ_AGC4_MARK, MSIOF2_RSYNC_MARK, - HSU_IQ_AGC3_MARK, MFG2_OUT1_MARK, MSIOF2_RSCK_MARK, - HSU_IQ_AGC2_MARK, PORT42_KEYOUT0_MARK, - HSU_IQ_AGC1_MARK, PORT43_KEYOUT1_MARK, - HSU_IQ_AGC0_MARK, PORT44_KEYOUT2_MARK, - HSU_IQ_AGC_ST_MARK, PORT45_KEYOUT3_MARK, - HSU_IQ_PDO_MARK, PORT46_KEYOUT4_MARK, - HSU_IQ_PYO_MARK, PORT47_KEYOUT5_MARK, - HSU_EN_TXMUX_G3MO_MARK, PORT48_KEYIN0_MARK, - HSU_I_TXMUX_G3MO_MARK, PORT49_KEYIN1_MARK, - HSU_Q_TXMUX_G3MO_MARK, PORT50_KEYIN2_MARK, - HSU_SYO_MARK, PORT51_MSIOF2_TSYNC_MARK, - HSU_SDO_MARK, PORT52_MSIOF2_TSCK_MARK, - HSU_TGTTI_G3MO_MARK, PORT53_MSIOF2_TXD_MARK, - B_TIME_STAMP_MARK, PORT54_MSIOF2_RXD_MARK, - HSU_SDI_MARK, PORT55_KEYIN3_MARK, - HSU_SCO_MARK, PORT56_KEYIN4_MARK, - HSU_DREQ_MARK, PORT57_KEYIN5_MARK, - HSU_DACK_MARK, PORT58_KEYIN6_MARK, - HSU_CLK61M_MARK, PORT59_MSIOF2_SS1_MARK, - HSU_XRST_MARK, PORT60_MSIOF2_SS2_MARK, - PCMCLKO_MARK, SYNC8KO_MARK, DNPCM_A_MARK, UPPCM_A_MARK, - XTALB1L_MARK, - GPS_AGC1_MARK, SCIFA0_RTS_MARK, - GPS_AGC2_MARK, SCIFA0_SCK_MARK, - GPS_AGC3_MARK, SCIFA0_TXD_MARK, - GPS_AGC4_MARK, SCIFA0_RXD_MARK, - GPS_PWRD_MARK, SCIFA0_CTS_MARK, - GPS_IM_MARK, GPS_IS_MARK, GPS_QM_MARK, GPS_QS_MARK, - SIUBOMC_MARK, TPU2TO0_MARK, - SIUCKB_MARK, TPU2TO1_MARK, - SIUBOLR_MARK, BBIF2_TSYNC_MARK, TPU2TO2_MARK, - SIUBOBT_MARK, BBIF2_TSCK_MARK, TPU2TO3_MARK, - SIUBOSLD_MARK, BBIF2_TXD_MARK, TPU3TO0_MARK, - SIUBILR_MARK, TPU3TO1_MARK, - SIUBIBT_MARK, TPU3TO2_MARK, - SIUBISLD_MARK, TPU3TO3_MARK, - NMI_MARK, TPU4TO0_MARK, - DNPCM_M_MARK, TPU4TO1_MARK, TPU4TO2_MARK, TPU4TO3_MARK, - IRQ_TMPB_MARK, - PWEN_MARK, MFG1_OUT1_MARK, - OVCN_MARK, MFG1_IN1_MARK, - OVCN2_MARK, MFG1_IN2_MARK, - - /* 49-3 */ - RFSPO1_MARK, RFSPO2_MARK, RFSPO3_MARK, PORT93_VIO_CKO2_MARK, - USBTERM_MARK, EXTLP_MARK, IDIN_MARK, - SCIFA5_CTS_MARK, MFG0_IN1_MARK, - SCIFA5_RTS_MARK, MFG0_IN2_MARK, - SCIFA5_RXD_MARK, - SCIFA5_TXD_MARK, - SCIFA5_SCK_MARK, MFG0_OUT1_MARK, - A0_EA0_MARK, BS_MARK, - A14_EA14_MARK, PORT102_KEYOUT0_MARK, - A15_EA15_MARK, PORT103_KEYOUT1_MARK, DV_CLKOL_MARK, - A16_EA16_MARK, PORT104_KEYOUT2_MARK, - DV_VSYNCL_MARK, MSIOF0_SS1_MARK, - A17_EA17_MARK, PORT105_KEYOUT3_MARK, - DV_HSYNCL_MARK, MSIOF0_TSYNC_MARK, - A18_EA18_MARK, PORT106_KEYOUT4_MARK, - DV_DL0_MARK, MSIOF0_TSCK_MARK, - A19_EA19_MARK, PORT107_KEYOUT5_MARK, - DV_DL1_MARK, MSIOF0_TXD_MARK, - A20_EA20_MARK, PORT108_KEYIN0_MARK, - DV_DL2_MARK, MSIOF0_RSCK_MARK, - A21_EA21_MARK, PORT109_KEYIN1_MARK, - DV_DL3_MARK, MSIOF0_RSYNC_MARK, - A22_EA22_MARK, PORT110_KEYIN2_MARK, - DV_DL4_MARK, MSIOF0_MCK0_MARK, - A23_EA23_MARK, PORT111_KEYIN3_MARK, - DV_DL5_MARK, MSIOF0_MCK1_MARK, - A24_EA24_MARK, PORT112_KEYIN4_MARK, - DV_DL6_MARK, MSIOF0_RXD_MARK, - A25_EA25_MARK, PORT113_KEYIN5_MARK, - DV_DL7_MARK, MSIOF0_SS2_MARK, - A26_MARK, PORT113_KEYIN6_MARK, DV_CLKIL_MARK, - D0_ED0_NAF0_MARK, D1_ED1_NAF1_MARK, D2_ED2_NAF2_MARK, - D3_ED3_NAF3_MARK, D4_ED4_NAF4_MARK, D5_ED5_NAF5_MARK, - D6_ED6_NAF6_MARK, D7_ED7_NAF7_MARK, D8_ED8_NAF8_MARK, - D9_ED9_NAF9_MARK, D10_ED10_NAF10_MARK, D11_ED11_NAF11_MARK, - D12_ED12_NAF12_MARK, D13_ED13_NAF13_MARK, - D14_ED14_NAF14_MARK, D15_ED15_NAF15_MARK, - CS4_MARK, CS5A_MARK, CS5B_MARK, FCE1_MARK, - CS6B_MARK, XCS2_MARK, FCE0_MARK, CS6A_MARK, - DACK0_MARK, WAIT_MARK, DREQ0_MARK, RD_XRD_MARK, - A27_MARK, RDWR_XWE_MARK, WE0_XWR0_FWE_MARK, - WE1_XWR1_MARK, FRB_MARK, CKO_MARK, - NBRSTOUT_MARK, NBRST_MARK, - - /* 49-4 */ - RFSPO0_MARK, PORT146_VIO_CKO2_MARK, TSTMD_MARK, - VIO_VD_MARK, VIO_HD_MARK, - VIO_D0_MARK, VIO_D1_MARK, VIO_D2_MARK, - VIO_D3_MARK, VIO_D4_MARK, VIO_D5_MARK, - VIO_D6_MARK, VIO_D7_MARK, VIO_D8_MARK, - VIO_D9_MARK, VIO_D10_MARK, VIO_D11_MARK, - VIO_D12_MARK, VIO_D13_MARK, VIO_D14_MARK, - VIO_D15_MARK, VIO_CLK_MARK, VIO_FIELD_MARK, - VIO_CKO_MARK, - MFG3_IN1_MARK, MFG3_IN2_MARK, - M9_SLCD_A01_MARK, MFG3_OUT1_MARK, TPU0TO0_MARK, - M10_SLCD_CK1_MARK, MFG4_IN1_MARK, TPU0TO1_MARK, - M11_SLCD_SO1_MARK, MFG4_IN2_MARK, TPU0TO2_MARK, - M12_SLCD_CE1_MARK, MFG4_OUT1_MARK, TPU0TO3_MARK, - LCDD0_MARK, PORT175_KEYOUT0_MARK, DV_D0_MARK, - SIUCKA_MARK, MFG0_OUT2_MARK, - LCDD1_MARK, PORT176_KEYOUT1_MARK, DV_D1_MARK, - SIUAOLR_MARK, BBIF2_TSYNC1_MARK, - LCDD2_MARK, PORT177_KEYOUT2_MARK, DV_D2_MARK, - SIUAOBT_MARK, BBIF2_TSCK1_MARK, - LCDD3_MARK, PORT178_KEYOUT3_MARK, DV_D3_MARK, - SIUAOSLD_MARK, BBIF2_TXD1_MARK, - LCDD4_MARK, PORT179_KEYOUT4_MARK, DV_D4_MARK, - SIUAISPD_MARK, MFG1_OUT2_MARK, - LCDD5_MARK, PORT180_KEYOUT5_MARK, DV_D5_MARK, - SIUAILR_MARK, MFG2_OUT2_MARK, - LCDD6_MARK, DV_D6_MARK, - SIUAIBT_MARK, MFG3_OUT2_MARK, XWR2_MARK, - LCDD7_MARK, DV_D7_MARK, - SIUAISLD_MARK, MFG4_OUT2_MARK, XWR3_MARK, - LCDD8_MARK, DV_D8_MARK, D16_MARK, ED16_MARK, - LCDD9_MARK, DV_D9_MARK, D17_MARK, ED17_MARK, - LCDD10_MARK, DV_D10_MARK, D18_MARK, ED18_MARK, - LCDD11_MARK, DV_D11_MARK, D19_MARK, ED19_MARK, - LCDD12_MARK, DV_D12_MARK, D20_MARK, ED20_MARK, - LCDD13_MARK, DV_D13_MARK, D21_MARK, ED21_MARK, - LCDD14_MARK, DV_D14_MARK, D22_MARK, ED22_MARK, - LCDD15_MARK, DV_D15_MARK, D23_MARK, ED23_MARK, - LCDD16_MARK, DV_HSYNC_MARK, D24_MARK, ED24_MARK, - LCDD17_MARK, DV_VSYNC_MARK, D25_MARK, ED25_MARK, - LCDD18_MARK, DREQ2_MARK, MSIOF0L_TSCK_MARK, - D26_MARK, ED26_MARK, - LCDD19_MARK, MSIOF0L_TSYNC_MARK, - D27_MARK, ED27_MARK, - LCDD20_MARK, TS_SPSYNC1_MARK, MSIOF0L_MCK0_MARK, - D28_MARK, ED28_MARK, - LCDD21_MARK, TS_SDAT1_MARK, MSIOF0L_MCK1_MARK, - D29_MARK, ED29_MARK, - LCDD22_MARK, TS_SDEN1_MARK, MSIOF0L_SS1_MARK, - D30_MARK, ED30_MARK, - LCDD23_MARK, TS_SCK1_MARK, MSIOF0L_SS2_MARK, - D31_MARK, ED31_MARK, - LCDDCK_MARK, LCDWR_MARK, DV_CKO_MARK, SIUAOSPD_MARK, - LCDRD_MARK, DACK2_MARK, MSIOF0L_RSYNC_MARK, - - /* 49-5 */ - LCDHSYN_MARK, LCDCS_MARK, LCDCS2_MARK, DACK3_MARK, - LCDDISP_MARK, LCDRS_MARK, DREQ3_MARK, MSIOF0L_RSCK_MARK, - LCDCSYN_MARK, LCDCSYN2_MARK, DV_CKI_MARK, - LCDLCLK_MARK, DREQ1_MARK, MSIOF0L_RXD_MARK, - LCDDON_MARK, LCDDON2_MARK, DACK1_MARK, MSIOF0L_TXD_MARK, - VIO_DR0_MARK, VIO_DR1_MARK, VIO_DR2_MARK, VIO_DR3_MARK, - VIO_DR4_MARK, VIO_DR5_MARK, VIO_DR6_MARK, VIO_DR7_MARK, - VIO_VDR_MARK, VIO_HDR_MARK, - VIO_CLKR_MARK, VIO_CKOR_MARK, - SCIFA1_TXD_MARK, GPS_PGFA0_MARK, - SCIFA1_SCK_MARK, GPS_PGFA1_MARK, - SCIFA1_RTS_MARK, GPS_EPPSINMON_MARK, - SCIFA1_RXD_MARK, SCIFA1_CTS_MARK, - MSIOF1_TXD_MARK, SCIFA1_TXD2_MARK, GPS_TXD_MARK, - MSIOF1_TSYNC_MARK, SCIFA1_CTS2_MARK, I2C_SDA2_MARK, - MSIOF1_TSCK_MARK, SCIFA1_SCK2_MARK, - MSIOF1_RXD_MARK, SCIFA1_RXD2_MARK, GPS_RXD_MARK, - MSIOF1_RSCK_MARK, SCIFA1_RTS2_MARK, - MSIOF1_RSYNC_MARK, I2C_SCL2_MARK, - MSIOF1_MCK0_MARK, MSIOF1_MCK1_MARK, - MSIOF1_SS1_MARK, EDBGREQ3_MARK, - MSIOF1_SS2_MARK, - PORT236_IROUT_MARK, IRDA_OUT_MARK, - IRDA_IN_MARK, IRDA_FIRSEL_MARK, - TPU1TO0_MARK, TS_SPSYNC3_MARK, - TPU1TO1_MARK, TS_SDAT3_MARK, - TPU1TO2_MARK, TS_SDEN3_MARK, PORT241_MSIOF2_SS1_MARK, - TPU1TO3_MARK, PORT242_MSIOF2_TSCK_MARK, - M13_BSW_MARK, PORT243_MSIOF2_TSYNC_MARK, - M14_GSW_MARK, PORT244_MSIOF2_TXD_MARK, - PORT245_IROUT_MARK, M15_RSW_MARK, - SOUT3_MARK, SCIFA2_TXD1_MARK, - SIN3_MARK, SCIFA2_RXD1_MARK, - XRTS3_MARK, SCIFA2_RTS1_MARK, PORT248_MSIOF2_SS2_MARK, - XCTS3_MARK, SCIFA2_CTS1_MARK, PORT249_MSIOF2_RXD_MARK, - DINT_MARK, SCIFA2_SCK1_MARK, TS_SCK3_MARK, - SDHICLK0_MARK, TCK2_MARK, - SDHICD0_MARK, - SDHID0_0_MARK, TMS2_MARK, - SDHID0_1_MARK, TDO2_MARK, - SDHID0_2_MARK, TDI2_MARK, - SDHID0_3_MARK, RTCK2_MARK, - - /* 49-6 */ - SDHICMD0_MARK, TRST2_MARK, - SDHIWP0_MARK, EDBGREQ2_MARK, - SDHICLK1_MARK, TCK3_MARK, - SDHID1_0_MARK, M11_SLCD_SO2_MARK, - TS_SPSYNC2_MARK, TMS3_MARK, - SDHID1_1_MARK, M9_SLCD_AO2_MARK, - TS_SDAT2_MARK, TDO3_MARK, - SDHID1_2_MARK, M10_SLCD_CK2_MARK, - TS_SDEN2_MARK, TDI3_MARK, - SDHID1_3_MARK, M12_SLCD_CE2_MARK, - TS_SCK2_MARK, RTCK3_MARK, - SDHICMD1_MARK, TRST3_MARK, - SDHICLK2_MARK, SCIFB_SCK_MARK, - SDHID2_0_MARK, SCIFB_TXD_MARK, - SDHID2_1_MARK, SCIFB_CTS_MARK, - SDHID2_2_MARK, SCIFB_RXD_MARK, - SDHID2_3_MARK, SCIFB_RTS_MARK, - SDHICMD2_MARK, - RESETOUTS_MARK, - DIVLOCK_MARK, - PINMUX_MARK_END, -}; - -static pinmux_enum_t pinmux_data[] = { - - /* specify valid pin states for each pin in GPIO mode */ - - /* 49-1 (GPIO) */ - PORT_DATA_I_PD(0), - PORT_DATA_I_PU(1), PORT_DATA_I_PU(2), PORT_DATA_I_PU(3), - PORT_DATA_I_PU(4), PORT_DATA_I_PU(5), PORT_DATA_I_PU(6), - PORT_DATA_I_PU(7), PORT_DATA_I_PU(8), PORT_DATA_I_PU(9), - PORT_DATA_I_PU(10), PORT_DATA_I_PU(11), PORT_DATA_I_PU(12), - PORT_DATA_I_PU(13), - PORT_DATA_IO_PU_PD(14), PORT_DATA_IO_PU_PD(15), - PORT_DATA_O(16), PORT_DATA_O(17), PORT_DATA_O(18), PORT_DATA_O(19), - PORT_DATA_O(20), PORT_DATA_O(21), PORT_DATA_O(22), PORT_DATA_O(23), - PORT_DATA_O(24), PORT_DATA_O(25), PORT_DATA_O(26), - PORT_DATA_I_PD(27), PORT_DATA_I_PD(28), - PORT_DATA_O(29), PORT_DATA_O(30), PORT_DATA_O(31), PORT_DATA_O(32), - PORT_DATA_IO_PU(33), - PORT_DATA_O(34), - PORT_DATA_I_PU(35), - PORT_DATA_O(36), - PORT_DATA_I_PU_PD(37), - - /* 49-2 (GPIO) */ - PORT_DATA_IO_PU_PD(38), - PORT_DATA_IO_PD(39), PORT_DATA_IO_PD(40), PORT_DATA_IO_PD(41), - PORT_DATA_O(42), PORT_DATA_O(43), PORT_DATA_O(44), PORT_DATA_O(45), - PORT_DATA_O(46), PORT_DATA_O(47), - PORT_DATA_I_PU_PD(48), PORT_DATA_I_PU_PD(49), PORT_DATA_I_PU_PD(50), - PORT_DATA_IO_PD(51), PORT_DATA_IO_PD(52), - PORT_DATA_O(53), - PORT_DATA_IO_PD(54), - PORT_DATA_I_PU_PD(55), - PORT_DATA_IO_PU_PD(56), - PORT_DATA_I_PU_PD(57), - PORT_DATA_IO_PU_PD(58), - PORT_DATA_O(59), PORT_DATA_O(60), PORT_DATA_O(61), PORT_DATA_O(62), - PORT_DATA_O(63), - PORT_DATA_I_PU(64), - PORT_DATA_O(65), PORT_DATA_O(66), PORT_DATA_O(67), PORT_DATA_O(68), - PORT_DATA_IO_PD(69), PORT_DATA_IO_PD(70), - PORT_DATA_I_PD(71), PORT_DATA_I_PD(72), PORT_DATA_I_PD(73), - PORT_DATA_I_PD(74), - PORT_DATA_IO_PU_PD(75), PORT_DATA_IO_PU_PD(76), - PORT_DATA_IO_PD(77), PORT_DATA_IO_PD(78), - PORT_DATA_O(79), - PORT_DATA_IO_PD(80), PORT_DATA_IO_PD(81), PORT_DATA_IO_PD(82), - PORT_DATA_IO_PU_PD(83), PORT_DATA_IO_PU_PD(84), - PORT_DATA_IO_PU_PD(85), PORT_DATA_IO_PU_PD(86), - PORT_DATA_I_PD(87), - PORT_DATA_IO_PU_PD(88), - PORT_DATA_I_PU_PD(89), PORT_DATA_I_PU_PD(90), - - /* 49-3 (GPIO) */ - PORT_DATA_O(91), PORT_DATA_O(92), PORT_DATA_O(93), PORT_DATA_O(94), - PORT_DATA_I_PU_PD(95), - PORT_DATA_IO_PU_PD(96), PORT_DATA_IO_PU_PD(97), PORT_DATA_IO_PU_PD(98), - PORT_DATA_IO_PU_PD(99), PORT_DATA_IO_PU_PD(100), - PORT_DATA_IO(101), PORT_DATA_IO(102), PORT_DATA_IO(103), - PORT_DATA_IO_PD(104), PORT_DATA_IO_PD(105), PORT_DATA_IO_PD(106), - PORT_DATA_IO_PD(107), - PORT_DATA_IO_PU_PD(108), PORT_DATA_IO_PU_PD(109), - PORT_DATA_IO_PU_PD(110), PORT_DATA_IO_PU_PD(111), - PORT_DATA_IO_PU_PD(112), PORT_DATA_IO_PU_PD(113), - PORT_DATA_IO_PU_PD(114), - PORT_DATA_IO_PU(115), PORT_DATA_IO_PU(116), PORT_DATA_IO_PU(117), - PORT_DATA_IO_PU(118), PORT_DATA_IO_PU(119), PORT_DATA_IO_PU(120), - PORT_DATA_IO_PU(121), PORT_DATA_IO_PU(122), PORT_DATA_IO_PU(123), - PORT_DATA_IO_PU(124), PORT_DATA_IO_PU(125), PORT_DATA_IO_PU(126), - PORT_DATA_IO_PU(127), PORT_DATA_IO_PU(128), PORT_DATA_IO_PU(129), - PORT_DATA_IO_PU(130), - PORT_DATA_O(131), PORT_DATA_O(132), PORT_DATA_O(133), - PORT_DATA_IO_PU(134), - PORT_DATA_O(135), PORT_DATA_O(136), - PORT_DATA_I_PU_PD(137), - PORT_DATA_IO(138), - PORT_DATA_IO_PU_PD(139), - PORT_DATA_IO(140), PORT_DATA_IO(141), - PORT_DATA_I_PU(142), - PORT_DATA_O(143), PORT_DATA_O(144), - PORT_DATA_I_PU(145), - - /* 49-4 (GPIO) */ - PORT_DATA_O(146), - PORT_DATA_I_PU_PD(147), - PORT_DATA_I_PD(148), PORT_DATA_I_PD(149), - PORT_DATA_IO_PD(150), PORT_DATA_IO_PD(151), PORT_DATA_IO_PD(152), - PORT_DATA_IO_PD(153), PORT_DATA_IO_PD(154), PORT_DATA_IO_PD(155), - PORT_DATA_IO_PD(156), PORT_DATA_IO_PD(157), PORT_DATA_IO_PD(158), - PORT_DATA_IO_PD(159), PORT_DATA_IO_PD(160), PORT_DATA_IO_PD(161), - PORT_DATA_IO_PD(162), PORT_DATA_IO_PD(163), PORT_DATA_IO_PD(164), - PORT_DATA_IO_PD(165), PORT_DATA_IO_PD(166), - PORT_DATA_IO_PU_PD(167), - PORT_DATA_O(168), - PORT_DATA_I_PD(169), PORT_DATA_I_PD(170), - PORT_DATA_O(171), - PORT_DATA_IO_PD(172), PORT_DATA_IO_PD(173), - PORT_DATA_O(174), - PORT_DATA_IO_PD(175), PORT_DATA_IO_PD(176), PORT_DATA_IO_PD(177), - PORT_DATA_IO_PD(178), PORT_DATA_IO_PD(179), PORT_DATA_IO_PD(180), - PORT_DATA_IO_PD(181), PORT_DATA_IO_PD(182), PORT_DATA_IO_PD(183), - PORT_DATA_IO_PD(184), PORT_DATA_IO_PD(185), PORT_DATA_IO_PD(186), - PORT_DATA_IO_PD(187), PORT_DATA_IO_PD(188), PORT_DATA_IO_PD(189), - PORT_DATA_IO_PD(190), PORT_DATA_IO_PD(191), PORT_DATA_IO_PD(192), - PORT_DATA_IO_PD(193), PORT_DATA_IO_PD(194), PORT_DATA_IO_PD(195), - PORT_DATA_IO_PD(196), PORT_DATA_IO_PD(197), PORT_DATA_IO_PD(198), - PORT_DATA_O(199), - PORT_DATA_IO_PD(200), - - /* 49-5 (GPIO) */ - PORT_DATA_O(201), - PORT_DATA_IO_PD(202), PORT_DATA_IO_PD(203), - PORT_DATA_I(204), - PORT_DATA_O(205), - PORT_DATA_IO_PD(206), PORT_DATA_IO_PD(207), PORT_DATA_IO_PD(208), - PORT_DATA_IO_PD(209), PORT_DATA_IO_PD(210), PORT_DATA_IO_PD(211), - PORT_DATA_IO_PD(212), PORT_DATA_IO_PD(213), PORT_DATA_IO_PD(214), - PORT_DATA_IO_PD(215), PORT_DATA_IO_PD(216), - PORT_DATA_O(217), - PORT_DATA_I_PU_PD(218), PORT_DATA_I_PU_PD(219), - PORT_DATA_O(220), PORT_DATA_O(221), PORT_DATA_O(222), - PORT_DATA_I_PD(223), - PORT_DATA_I_PU_PD(224), - PORT_DATA_O(225), - PORT_DATA_IO_PD(226), - PORT_DATA_IO_PU_PD(227), - PORT_DATA_I_PD(228), - PORT_DATA_IO_PD(229), PORT_DATA_IO_PD(230), - PORT_DATA_I_PU_PD(231), PORT_DATA_I_PU_PD(232), - PORT_DATA_IO_PU_PD(233), PORT_DATA_IO_PU_PD(234), - PORT_DATA_I_PU_PD(235), - PORT_DATA_O(236), - PORT_DATA_I_PD(237), - PORT_DATA_IO_PU_PD(238), PORT_DATA_IO_PU_PD(239), - PORT_DATA_IO_PD(240), PORT_DATA_IO_PD(241), - PORT_DATA_IO_PD(242), PORT_DATA_IO_PD(243), - PORT_DATA_O(244), - PORT_DATA_IO_PU_PD(245), - PORT_DATA_O(246), - PORT_DATA_I_PD(247), - PORT_DATA_IO_PU_PD(248), - PORT_DATA_I_PU_PD(249), - PORT_DATA_IO_PD(250), PORT_DATA_IO_PD(251), - PORT_DATA_IO_PU_PD(252), PORT_DATA_IO_PU_PD(253), - PORT_DATA_IO_PU_PD(254), PORT_DATA_IO_PU_PD(255), - PORT_DATA_IO_PU_PD(256), - - /* 49-6 (GPIO) */ - PORT_DATA_IO_PU_PD(257), PORT_DATA_IO_PU_PD(258), - PORT_DATA_IO_PD(259), - PORT_DATA_IO_PU(260), PORT_DATA_IO_PU(261), PORT_DATA_IO_PU(262), - PORT_DATA_IO_PU(263), PORT_DATA_IO_PU(264), - PORT_DATA_O(265), - PORT_DATA_IO_PU(266), PORT_DATA_IO_PU(267), PORT_DATA_IO_PU(268), - PORT_DATA_IO_PU(269), PORT_DATA_IO_PU(270), - PORT_DATA_O(271), - PORT_DATA_I_PD(272), - - /* Special Pull-up / Pull-down Functions */ - PINMUX_DATA(PORT48_KEYIN0_PU_MARK, MSELBCR_MSEL2_1, - PORT48_FN2, PORT48_IN_PU), - PINMUX_DATA(PORT49_KEYIN1_PU_MARK, MSELBCR_MSEL2_1, - PORT49_FN2, PORT49_IN_PU), - PINMUX_DATA(PORT50_KEYIN2_PU_MARK, MSELBCR_MSEL2_1, - PORT50_FN2, PORT50_IN_PU), - PINMUX_DATA(PORT55_KEYIN3_PU_MARK, MSELBCR_MSEL2_1, - PORT55_FN2, PORT55_IN_PU), - PINMUX_DATA(PORT56_KEYIN4_PU_MARK, MSELBCR_MSEL2_1, - PORT56_FN2, PORT56_IN_PU), - PINMUX_DATA(PORT57_KEYIN5_PU_MARK, MSELBCR_MSEL2_1, - PORT57_FN2, PORT57_IN_PU), - PINMUX_DATA(PORT58_KEYIN6_PU_MARK, MSELBCR_MSEL2_1, - PORT58_FN2, PORT58_IN_PU), - - /* 49-1 (FN) */ - PINMUX_DATA(VBUS0_MARK, PORT0_FN1), - PINMUX_DATA(CPORT0_MARK, PORT1_FN1), - PINMUX_DATA(CPORT1_MARK, PORT2_FN1), - PINMUX_DATA(CPORT2_MARK, PORT3_FN1), - PINMUX_DATA(CPORT3_MARK, PORT4_FN1), - PINMUX_DATA(CPORT4_MARK, PORT5_FN1), - PINMUX_DATA(CPORT5_MARK, PORT6_FN1), - PINMUX_DATA(CPORT6_MARK, PORT7_FN1), - PINMUX_DATA(CPORT7_MARK, PORT8_FN1), - PINMUX_DATA(CPORT8_MARK, PORT9_FN1), - PINMUX_DATA(CPORT9_MARK, PORT10_FN1), - PINMUX_DATA(CPORT10_MARK, PORT11_FN1), - PINMUX_DATA(CPORT11_MARK, PORT12_FN1), - PINMUX_DATA(SIN2_MARK, PORT12_FN2), - PINMUX_DATA(CPORT12_MARK, PORT13_FN1), - PINMUX_DATA(XCTS2_MARK, PORT13_FN2), - PINMUX_DATA(CPORT13_MARK, PORT14_FN1), - PINMUX_DATA(RFSPO4_MARK, PORT14_FN2), - PINMUX_DATA(CPORT14_MARK, PORT15_FN1), - PINMUX_DATA(RFSPO5_MARK, PORT15_FN2), - PINMUX_DATA(CPORT15_MARK, PORT16_FN1), - PINMUX_DATA(CPORT16_MARK, PORT17_FN1), - PINMUX_DATA(CPORT17_MARK, PORT18_FN1), - PINMUX_DATA(SOUT2_MARK, PORT18_FN2), - PINMUX_DATA(CPORT18_MARK, PORT19_FN1), - PINMUX_DATA(XRTS2_MARK, PORT19_FN1), - PINMUX_DATA(CPORT19_MARK, PORT20_FN1), - PINMUX_DATA(CPORT20_MARK, PORT21_FN1), - PINMUX_DATA(RFSPO6_MARK, PORT21_FN2), - PINMUX_DATA(CPORT21_MARK, PORT22_FN1), - PINMUX_DATA(STATUS0_MARK, PORT22_FN2), - PINMUX_DATA(CPORT22_MARK, PORT23_FN1), - PINMUX_DATA(STATUS1_MARK, PORT23_FN2), - PINMUX_DATA(CPORT23_MARK, PORT24_FN1), - PINMUX_DATA(STATUS2_MARK, PORT24_FN2), - PINMUX_DATA(RFSPO7_MARK, PORT24_FN3), - PINMUX_DATA(MPORT0_MARK, PORT25_FN1), - PINMUX_DATA(MPORT1_MARK, PORT26_FN1), - PINMUX_DATA(B_SYNLD1_MARK, PORT27_FN1), - PINMUX_DATA(B_SYNLD2_MARK, PORT28_FN1), - PINMUX_DATA(XMAINPS_MARK, PORT29_FN1), - PINMUX_DATA(XDIVPS_MARK, PORT30_FN1), - PINMUX_DATA(XIDRST_MARK, PORT31_FN1), - PINMUX_DATA(IDCLK_MARK, PORT32_FN1), - PINMUX_DATA(IDIO_MARK, PORT33_FN1), - PINMUX_DATA(SOUT1_MARK, PORT34_FN1), - PINMUX_DATA(SCIFA4_TXD_MARK, PORT34_FN2), - PINMUX_DATA(M02_BERDAT_MARK, PORT34_FN3), - PINMUX_DATA(SIN1_MARK, PORT35_FN1), - PINMUX_DATA(SCIFA4_RXD_MARK, PORT35_FN2), - PINMUX_DATA(XWUP_MARK, PORT35_FN3), - PINMUX_DATA(XRTS1_MARK, PORT36_FN1), - PINMUX_DATA(SCIFA4_RTS_MARK, PORT36_FN2), - PINMUX_DATA(M03_BERCLK_MARK, PORT36_FN3), - PINMUX_DATA(XCTS1_MARK, PORT37_FN1), - PINMUX_DATA(SCIFA4_CTS_MARK, PORT37_FN2), - - /* 49-2 (FN) */ - PINMUX_DATA(HSU_IQ_AGC6_MARK, PORT38_FN1), - PINMUX_DATA(MFG2_IN2_MARK, PORT38_FN2), - PINMUX_DATA(MSIOF2_MCK0_MARK, PORT38_FN3), - PINMUX_DATA(HSU_IQ_AGC5_MARK, PORT39_FN1), - PINMUX_DATA(MFG2_IN1_MARK, PORT39_FN2), - PINMUX_DATA(MSIOF2_MCK1_MARK, PORT39_FN3), - PINMUX_DATA(HSU_IQ_AGC4_MARK, PORT40_FN1), - PINMUX_DATA(MSIOF2_RSYNC_MARK, PORT40_FN3), - PINMUX_DATA(HSU_IQ_AGC3_MARK, PORT41_FN1), - PINMUX_DATA(MFG2_OUT1_MARK, PORT41_FN2), - PINMUX_DATA(MSIOF2_RSCK_MARK, PORT41_FN3), - PINMUX_DATA(HSU_IQ_AGC2_MARK, PORT42_FN1), - PINMUX_DATA(PORT42_KEYOUT0_MARK, MSELBCR_MSEL2_1, PORT42_FN2), - PINMUX_DATA(HSU_IQ_AGC1_MARK, PORT43_FN1), - PINMUX_DATA(PORT43_KEYOUT1_MARK, MSELBCR_MSEL2_1, PORT43_FN2), - PINMUX_DATA(HSU_IQ_AGC0_MARK, PORT44_FN1), - PINMUX_DATA(PORT44_KEYOUT2_MARK, MSELBCR_MSEL2_1, PORT44_FN2), - PINMUX_DATA(HSU_IQ_AGC_ST_MARK, PORT45_FN1), - PINMUX_DATA(PORT45_KEYOUT3_MARK, MSELBCR_MSEL2_1, PORT45_FN2), - PINMUX_DATA(HSU_IQ_PDO_MARK, PORT46_FN1), - PINMUX_DATA(PORT46_KEYOUT4_MARK, MSELBCR_MSEL2_1, PORT46_FN2), - PINMUX_DATA(HSU_IQ_PYO_MARK, PORT47_FN1), - PINMUX_DATA(PORT47_KEYOUT5_MARK, MSELBCR_MSEL2_1, PORT47_FN2), - PINMUX_DATA(HSU_EN_TXMUX_G3MO_MARK, PORT48_FN1), - PINMUX_DATA(PORT48_KEYIN0_MARK, MSELBCR_MSEL2_1, PORT48_FN2), - PINMUX_DATA(HSU_I_TXMUX_G3MO_MARK, PORT49_FN1), - PINMUX_DATA(PORT49_KEYIN1_MARK, MSELBCR_MSEL2_1, PORT49_FN2), - PINMUX_DATA(HSU_Q_TXMUX_G3MO_MARK, PORT50_FN1), - PINMUX_DATA(PORT50_KEYIN2_MARK, MSELBCR_MSEL2_1, PORT50_FN2), - PINMUX_DATA(HSU_SYO_MARK, PORT51_FN1), - PINMUX_DATA(PORT51_MSIOF2_TSYNC_MARK, PORT51_FN2), - PINMUX_DATA(HSU_SDO_MARK, PORT52_FN1), - PINMUX_DATA(PORT52_MSIOF2_TSCK_MARK, PORT52_FN2), - PINMUX_DATA(HSU_TGTTI_G3MO_MARK, PORT53_FN1), - PINMUX_DATA(PORT53_MSIOF2_TXD_MARK, PORT53_FN2), - PINMUX_DATA(B_TIME_STAMP_MARK, PORT54_FN1), - PINMUX_DATA(PORT54_MSIOF2_RXD_MARK, PORT54_FN2), - PINMUX_DATA(HSU_SDI_MARK, PORT55_FN1), - PINMUX_DATA(PORT55_KEYIN3_MARK, MSELBCR_MSEL2_1, PORT55_FN2), - PINMUX_DATA(HSU_SCO_MARK, PORT56_FN1), - PINMUX_DATA(PORT56_KEYIN4_MARK, MSELBCR_MSEL2_1, PORT56_FN2), - PINMUX_DATA(HSU_DREQ_MARK, PORT57_FN1), - PINMUX_DATA(PORT57_KEYIN5_MARK, MSELBCR_MSEL2_1, PORT57_FN2), - PINMUX_DATA(HSU_DACK_MARK, PORT58_FN1), - PINMUX_DATA(PORT58_KEYIN6_MARK, MSELBCR_MSEL2_1, PORT58_FN2), - PINMUX_DATA(HSU_CLK61M_MARK, PORT59_FN1), - PINMUX_DATA(PORT59_MSIOF2_SS1_MARK, PORT59_FN2), - PINMUX_DATA(HSU_XRST_MARK, PORT60_FN1), - PINMUX_DATA(PORT60_MSIOF2_SS2_MARK, PORT60_FN2), - PINMUX_DATA(PCMCLKO_MARK, PORT61_FN1), - PINMUX_DATA(SYNC8KO_MARK, PORT62_FN1), - PINMUX_DATA(DNPCM_A_MARK, PORT63_FN1), - PINMUX_DATA(UPPCM_A_MARK, PORT64_FN1), - PINMUX_DATA(XTALB1L_MARK, PORT65_FN1), - PINMUX_DATA(GPS_AGC1_MARK, PORT66_FN1), - PINMUX_DATA(SCIFA0_RTS_MARK, PORT66_FN2), - PINMUX_DATA(GPS_AGC2_MARK, PORT67_FN1), - PINMUX_DATA(SCIFA0_SCK_MARK, PORT67_FN2), - PINMUX_DATA(GPS_AGC3_MARK, PORT68_FN1), - PINMUX_DATA(SCIFA0_TXD_MARK, PORT68_FN2), - PINMUX_DATA(GPS_AGC4_MARK, PORT69_FN1), - PINMUX_DATA(SCIFA0_RXD_MARK, PORT69_FN2), - PINMUX_DATA(GPS_PWRD_MARK, PORT70_FN1), - PINMUX_DATA(SCIFA0_CTS_MARK, PORT70_FN2), - PINMUX_DATA(GPS_IM_MARK, PORT71_FN1), - PINMUX_DATA(GPS_IS_MARK, PORT72_FN1), - PINMUX_DATA(GPS_QM_MARK, PORT73_FN1), - PINMUX_DATA(GPS_QS_MARK, PORT74_FN1), - PINMUX_DATA(SIUBOMC_MARK, PORT75_FN1), - PINMUX_DATA(TPU2TO0_MARK, PORT75_FN3), - PINMUX_DATA(SIUCKB_MARK, PORT76_FN1), - PINMUX_DATA(TPU2TO1_MARK, PORT76_FN3), - PINMUX_DATA(SIUBOLR_MARK, PORT77_FN1), - PINMUX_DATA(BBIF2_TSYNC_MARK, PORT77_FN2), - PINMUX_DATA(TPU2TO2_MARK, PORT77_FN3), - PINMUX_DATA(SIUBOBT_MARK, PORT78_FN1), - PINMUX_DATA(BBIF2_TSCK_MARK, PORT78_FN2), - PINMUX_DATA(TPU2TO3_MARK, PORT78_FN3), - PINMUX_DATA(SIUBOSLD_MARK, PORT79_FN1), - PINMUX_DATA(BBIF2_TXD_MARK, PORT79_FN2), - PINMUX_DATA(TPU3TO0_MARK, PORT79_FN3), - PINMUX_DATA(SIUBILR_MARK, PORT80_FN1), - PINMUX_DATA(TPU3TO1_MARK, PORT80_FN3), - PINMUX_DATA(SIUBIBT_MARK, PORT81_FN1), - PINMUX_DATA(TPU3TO2_MARK, PORT81_FN3), - PINMUX_DATA(SIUBISLD_MARK, PORT82_FN1), - PINMUX_DATA(TPU3TO3_MARK, PORT82_FN3), - PINMUX_DATA(NMI_MARK, PORT83_FN1), - PINMUX_DATA(TPU4TO0_MARK, PORT83_FN3), - PINMUX_DATA(DNPCM_M_MARK, PORT84_FN1), - PINMUX_DATA(TPU4TO1_MARK, PORT84_FN3), - PINMUX_DATA(TPU4TO2_MARK, PORT85_FN3), - PINMUX_DATA(TPU4TO3_MARK, PORT86_FN3), - PINMUX_DATA(IRQ_TMPB_MARK, PORT87_FN1), - PINMUX_DATA(PWEN_MARK, PORT88_FN1), - PINMUX_DATA(MFG1_OUT1_MARK, PORT88_FN2), - PINMUX_DATA(OVCN_MARK, PORT89_FN1), - PINMUX_DATA(MFG1_IN1_MARK, PORT89_FN2), - PINMUX_DATA(OVCN2_MARK, PORT90_FN1), - PINMUX_DATA(MFG1_IN2_MARK, PORT90_FN2), - - /* 49-3 (FN) */ - PINMUX_DATA(RFSPO1_MARK, PORT91_FN1), - PINMUX_DATA(RFSPO2_MARK, PORT92_FN1), - PINMUX_DATA(RFSPO3_MARK, PORT93_FN1), - PINMUX_DATA(PORT93_VIO_CKO2_MARK, PORT93_FN2), - PINMUX_DATA(USBTERM_MARK, PORT94_FN1), - PINMUX_DATA(EXTLP_MARK, PORT94_FN2), - PINMUX_DATA(IDIN_MARK, PORT95_FN1), - PINMUX_DATA(SCIFA5_CTS_MARK, PORT96_FN1), - PINMUX_DATA(MFG0_IN1_MARK, PORT96_FN2), - PINMUX_DATA(SCIFA5_RTS_MARK, PORT97_FN1), - PINMUX_DATA(MFG0_IN2_MARK, PORT97_FN2), - PINMUX_DATA(SCIFA5_RXD_MARK, PORT98_FN1), - PINMUX_DATA(SCIFA5_TXD_MARK, PORT99_FN1), - PINMUX_DATA(SCIFA5_SCK_MARK, PORT100_FN1), - PINMUX_DATA(MFG0_OUT1_MARK, PORT100_FN2), - PINMUX_DATA(A0_EA0_MARK, PORT101_FN1), - PINMUX_DATA(BS_MARK, PORT101_FN2), - PINMUX_DATA(A14_EA14_MARK, PORT102_FN1), - PINMUX_DATA(PORT102_KEYOUT0_MARK, MSELBCR_MSEL2_0, PORT102_FN2), - PINMUX_DATA(A15_EA15_MARK, PORT103_FN1), - PINMUX_DATA(PORT103_KEYOUT1_MARK, MSELBCR_MSEL2_0, PORT103_FN2), - PINMUX_DATA(DV_CLKOL_MARK, PORT103_FN3), - PINMUX_DATA(A16_EA16_MARK, PORT104_FN1), - PINMUX_DATA(PORT104_KEYOUT2_MARK, MSELBCR_MSEL2_0, PORT104_FN2), - PINMUX_DATA(DV_VSYNCL_MARK, PORT104_FN3), - PINMUX_DATA(MSIOF0_SS1_MARK, PORT104_FN4), - PINMUX_DATA(A17_EA17_MARK, PORT105_FN1), - PINMUX_DATA(PORT105_KEYOUT3_MARK, MSELBCR_MSEL2_0, PORT105_FN2), - PINMUX_DATA(DV_HSYNCL_MARK, PORT105_FN3), - PINMUX_DATA(MSIOF0_TSYNC_MARK, PORT105_FN4), - PINMUX_DATA(A18_EA18_MARK, PORT106_FN1), - PINMUX_DATA(PORT106_KEYOUT4_MARK, MSELBCR_MSEL2_0, PORT106_FN2), - PINMUX_DATA(DV_DL0_MARK, PORT106_FN3), - PINMUX_DATA(MSIOF0_TSCK_MARK, PORT106_FN4), - PINMUX_DATA(A19_EA19_MARK, PORT107_FN1), - PINMUX_DATA(PORT107_KEYOUT5_MARK, MSELBCR_MSEL2_0, PORT107_FN2), - PINMUX_DATA(DV_DL1_MARK, PORT107_FN3), - PINMUX_DATA(MSIOF0_TXD_MARK, PORT107_FN4), - PINMUX_DATA(A20_EA20_MARK, PORT108_FN1), - PINMUX_DATA(PORT108_KEYIN0_MARK, MSELBCR_MSEL2_0, PORT108_FN2), - PINMUX_DATA(DV_DL2_MARK, PORT108_FN3), - PINMUX_DATA(MSIOF0_RSCK_MARK, PORT108_FN4), - PINMUX_DATA(A21_EA21_MARK, PORT109_FN1), - PINMUX_DATA(PORT109_KEYIN1_MARK, MSELBCR_MSEL2_0, PORT109_FN2), - PINMUX_DATA(DV_DL3_MARK, PORT109_FN3), - PINMUX_DATA(MSIOF0_RSYNC_MARK, PORT109_FN4), - PINMUX_DATA(A22_EA22_MARK, PORT110_FN1), - PINMUX_DATA(PORT110_KEYIN2_MARK, MSELBCR_MSEL2_0, PORT110_FN2), - PINMUX_DATA(DV_DL4_MARK, PORT110_FN3), - PINMUX_DATA(MSIOF0_MCK0_MARK, PORT110_FN4), - PINMUX_DATA(A23_EA23_MARK, PORT111_FN1), - PINMUX_DATA(PORT111_KEYIN3_MARK, MSELBCR_MSEL2_0, PORT111_FN2), - PINMUX_DATA(DV_DL5_MARK, PORT111_FN3), - PINMUX_DATA(MSIOF0_MCK1_MARK, PORT111_FN4), - PINMUX_DATA(A24_EA24_MARK, PORT112_FN1), - PINMUX_DATA(PORT112_KEYIN4_MARK, MSELBCR_MSEL2_0, PORT112_FN2), - PINMUX_DATA(DV_DL6_MARK, PORT112_FN3), - PINMUX_DATA(MSIOF0_RXD_MARK, PORT112_FN4), - PINMUX_DATA(A25_EA25_MARK, PORT113_FN1), - PINMUX_DATA(PORT113_KEYIN5_MARK, MSELBCR_MSEL2_0, PORT113_FN2), - PINMUX_DATA(DV_DL7_MARK, PORT113_FN3), - PINMUX_DATA(MSIOF0_SS2_MARK, PORT113_FN4), - PINMUX_DATA(A26_MARK, PORT114_FN1), - PINMUX_DATA(PORT113_KEYIN6_MARK, MSELBCR_MSEL2_0, PORT114_FN2), - PINMUX_DATA(DV_CLKIL_MARK, PORT114_FN3), - PINMUX_DATA(D0_ED0_NAF0_MARK, PORT115_FN1), - PINMUX_DATA(D1_ED1_NAF1_MARK, PORT116_FN1), - PINMUX_DATA(D2_ED2_NAF2_MARK, PORT117_FN1), - PINMUX_DATA(D3_ED3_NAF3_MARK, PORT118_FN1), - PINMUX_DATA(D4_ED4_NAF4_MARK, PORT119_FN1), - PINMUX_DATA(D5_ED5_NAF5_MARK, PORT120_FN1), - PINMUX_DATA(D6_ED6_NAF6_MARK, PORT121_FN1), - PINMUX_DATA(D7_ED7_NAF7_MARK, PORT122_FN1), - PINMUX_DATA(D8_ED8_NAF8_MARK, PORT123_FN1), - PINMUX_DATA(D9_ED9_NAF9_MARK, PORT124_FN1), - PINMUX_DATA(D10_ED10_NAF10_MARK, PORT125_FN1), - PINMUX_DATA(D11_ED11_NAF11_MARK, PORT126_FN1), - PINMUX_DATA(D12_ED12_NAF12_MARK, PORT127_FN1), - PINMUX_DATA(D13_ED13_NAF13_MARK, PORT128_FN1), - PINMUX_DATA(D14_ED14_NAF14_MARK, PORT129_FN1), - PINMUX_DATA(D15_ED15_NAF15_MARK, PORT130_FN1), - PINMUX_DATA(CS4_MARK, PORT131_FN1), - PINMUX_DATA(CS5A_MARK, PORT132_FN1), - PINMUX_DATA(CS5B_MARK, PORT133_FN1), - PINMUX_DATA(FCE1_MARK, PORT133_FN2), - PINMUX_DATA(CS6B_MARK, PORT134_FN1), - PINMUX_DATA(XCS2_MARK, PORT134_FN2), - PINMUX_DATA(FCE0_MARK, PORT135_FN1), - PINMUX_DATA(CS6A_MARK, PORT136_FN1), - PINMUX_DATA(DACK0_MARK, PORT136_FN2), - PINMUX_DATA(WAIT_MARK, PORT137_FN1), - PINMUX_DATA(DREQ0_MARK, PORT137_FN2), - PINMUX_DATA(RD_XRD_MARK, PORT138_FN1), - PINMUX_DATA(A27_MARK, PORT139_FN1), - PINMUX_DATA(RDWR_XWE_MARK, PORT139_FN2), - PINMUX_DATA(WE0_XWR0_FWE_MARK, PORT140_FN1), - PINMUX_DATA(WE1_XWR1_MARK, PORT141_FN1), - PINMUX_DATA(FRB_MARK, PORT142_FN1), - PINMUX_DATA(CKO_MARK, PORT143_FN1), - PINMUX_DATA(NBRSTOUT_MARK, PORT144_FN1), - PINMUX_DATA(NBRST_MARK, PORT145_FN1), - - /* 49-4 (FN) */ - PINMUX_DATA(RFSPO0_MARK, PORT146_FN1), - PINMUX_DATA(PORT146_VIO_CKO2_MARK, PORT146_FN2), - PINMUX_DATA(TSTMD_MARK, PORT147_FN1), - PINMUX_DATA(VIO_VD_MARK, PORT148_FN1), - PINMUX_DATA(VIO_HD_MARK, PORT149_FN1), - PINMUX_DATA(VIO_D0_MARK, PORT150_FN1), - PINMUX_DATA(VIO_D1_MARK, PORT151_FN1), - PINMUX_DATA(VIO_D2_MARK, PORT152_FN1), - PINMUX_DATA(VIO_D3_MARK, PORT153_FN1), - PINMUX_DATA(VIO_D4_MARK, PORT154_FN1), - PINMUX_DATA(VIO_D5_MARK, PORT155_FN1), - PINMUX_DATA(VIO_D6_MARK, PORT156_FN1), - PINMUX_DATA(VIO_D7_MARK, PORT157_FN1), - PINMUX_DATA(VIO_D8_MARK, PORT158_FN1), - PINMUX_DATA(VIO_D9_MARK, PORT159_FN1), - PINMUX_DATA(VIO_D10_MARK, PORT160_FN1), - PINMUX_DATA(VIO_D11_MARK, PORT161_FN1), - PINMUX_DATA(VIO_D12_MARK, PORT162_FN1), - PINMUX_DATA(VIO_D13_MARK, PORT163_FN1), - PINMUX_DATA(VIO_D14_MARK, PORT164_FN1), - PINMUX_DATA(VIO_D15_MARK, PORT165_FN1), - PINMUX_DATA(VIO_CLK_MARK, PORT166_FN1), - PINMUX_DATA(VIO_FIELD_MARK, PORT167_FN1), - PINMUX_DATA(VIO_CKO_MARK, PORT168_FN1), - PINMUX_DATA(MFG3_IN1_MARK, PORT169_FN2), - PINMUX_DATA(MFG3_IN2_MARK, PORT170_FN2), - PINMUX_DATA(M9_SLCD_A01_MARK, PORT171_FN1), - PINMUX_DATA(MFG3_OUT1_MARK, PORT171_FN2), - PINMUX_DATA(TPU0TO0_MARK, PORT171_FN3), - PINMUX_DATA(M10_SLCD_CK1_MARK, PORT172_FN1), - PINMUX_DATA(MFG4_IN1_MARK, PORT172_FN2), - PINMUX_DATA(TPU0TO1_MARK, PORT172_FN3), - PINMUX_DATA(M11_SLCD_SO1_MARK, PORT173_FN1), - PINMUX_DATA(MFG4_IN2_MARK, PORT173_FN2), - PINMUX_DATA(TPU0TO2_MARK, PORT173_FN3), - PINMUX_DATA(M12_SLCD_CE1_MARK, PORT174_FN1), - PINMUX_DATA(MFG4_OUT1_MARK, PORT174_FN2), - PINMUX_DATA(TPU0TO3_MARK, PORT174_FN3), - PINMUX_DATA(LCDD0_MARK, PORT175_FN1), - PINMUX_DATA(PORT175_KEYOUT0_MARK, PORT175_FN2), - PINMUX_DATA(DV_D0_MARK, PORT175_FN3), - PINMUX_DATA(SIUCKA_MARK, PORT175_FN4), - PINMUX_DATA(MFG0_OUT2_MARK, PORT175_FN5), - PINMUX_DATA(LCDD1_MARK, PORT176_FN1), - PINMUX_DATA(PORT176_KEYOUT1_MARK, PORT176_FN2), - PINMUX_DATA(DV_D1_MARK, PORT176_FN3), - PINMUX_DATA(SIUAOLR_MARK, PORT176_FN4), - PINMUX_DATA(BBIF2_TSYNC1_MARK, PORT176_FN5), - PINMUX_DATA(LCDD2_MARK, PORT177_FN1), - PINMUX_DATA(PORT177_KEYOUT2_MARK, PORT177_FN2), - PINMUX_DATA(DV_D2_MARK, PORT177_FN3), - PINMUX_DATA(SIUAOBT_MARK, PORT177_FN4), - PINMUX_DATA(BBIF2_TSCK1_MARK, PORT177_FN5), - PINMUX_DATA(LCDD3_MARK, PORT178_FN1), - PINMUX_DATA(PORT178_KEYOUT3_MARK, PORT178_FN2), - PINMUX_DATA(DV_D3_MARK, PORT178_FN3), - PINMUX_DATA(SIUAOSLD_MARK, PORT178_FN4), - PINMUX_DATA(BBIF2_TXD1_MARK, PORT178_FN5), - PINMUX_DATA(LCDD4_MARK, PORT179_FN1), - PINMUX_DATA(PORT179_KEYOUT4_MARK, PORT179_FN2), - PINMUX_DATA(DV_D4_MARK, PORT179_FN3), - PINMUX_DATA(SIUAISPD_MARK, PORT179_FN4), - PINMUX_DATA(MFG1_OUT2_MARK, PORT179_FN5), - PINMUX_DATA(LCDD5_MARK, PORT180_FN1), - PINMUX_DATA(PORT180_KEYOUT5_MARK, PORT180_FN2), - PINMUX_DATA(DV_D5_MARK, PORT180_FN3), - PINMUX_DATA(SIUAILR_MARK, PORT180_FN4), - PINMUX_DATA(MFG2_OUT2_MARK, PORT180_FN5), - PINMUX_DATA(LCDD6_MARK, PORT181_FN1), - PINMUX_DATA(DV_D6_MARK, PORT181_FN3), - PINMUX_DATA(SIUAIBT_MARK, PORT181_FN4), - PINMUX_DATA(MFG3_OUT2_MARK, PORT181_FN5), - PINMUX_DATA(XWR2_MARK, PORT181_FN7), - PINMUX_DATA(LCDD7_MARK, PORT182_FN1), - PINMUX_DATA(DV_D7_MARK, PORT182_FN3), - PINMUX_DATA(SIUAISLD_MARK, PORT182_FN4), - PINMUX_DATA(MFG4_OUT2_MARK, PORT182_FN5), - PINMUX_DATA(XWR3_MARK, PORT182_FN7), - PINMUX_DATA(LCDD8_MARK, PORT183_FN1), - PINMUX_DATA(DV_D8_MARK, PORT183_FN3), - PINMUX_DATA(D16_MARK, PORT183_FN6), - PINMUX_DATA(ED16_MARK, PORT183_FN7), - PINMUX_DATA(LCDD9_MARK, PORT184_FN1), - PINMUX_DATA(DV_D9_MARK, PORT184_FN3), - PINMUX_DATA(D17_MARK, PORT184_FN6), - PINMUX_DATA(ED17_MARK, PORT184_FN7), - PINMUX_DATA(LCDD10_MARK, PORT185_FN1), - PINMUX_DATA(DV_D10_MARK, PORT185_FN3), - PINMUX_DATA(D18_MARK, PORT185_FN6), - PINMUX_DATA(ED18_MARK, PORT185_FN7), - PINMUX_DATA(LCDD11_MARK, PORT186_FN1), - PINMUX_DATA(DV_D11_MARK, PORT186_FN3), - PINMUX_DATA(D19_MARK, PORT186_FN6), - PINMUX_DATA(ED19_MARK, PORT186_FN7), - PINMUX_DATA(LCDD12_MARK, PORT187_FN1), - PINMUX_DATA(DV_D12_MARK, PORT187_FN3), - PINMUX_DATA(D20_MARK, PORT187_FN6), - PINMUX_DATA(ED20_MARK, PORT187_FN7), - PINMUX_DATA(LCDD13_MARK, PORT188_FN1), - PINMUX_DATA(DV_D13_MARK, PORT188_FN3), - PINMUX_DATA(D21_MARK, PORT188_FN6), - PINMUX_DATA(ED21_MARK, PORT188_FN7), - PINMUX_DATA(LCDD14_MARK, PORT189_FN1), - PINMUX_DATA(DV_D14_MARK, PORT189_FN3), - PINMUX_DATA(D22_MARK, PORT189_FN6), - PINMUX_DATA(ED22_MARK, PORT189_FN7), - PINMUX_DATA(LCDD15_MARK, PORT190_FN1), - PINMUX_DATA(DV_D15_MARK, PORT190_FN3), - PINMUX_DATA(D23_MARK, PORT190_FN6), - PINMUX_DATA(ED23_MARK, PORT190_FN7), - PINMUX_DATA(LCDD16_MARK, PORT191_FN1), - PINMUX_DATA(DV_HSYNC_MARK, PORT191_FN3), - PINMUX_DATA(D24_MARK, PORT191_FN6), - PINMUX_DATA(ED24_MARK, PORT191_FN7), - PINMUX_DATA(LCDD17_MARK, PORT192_FN1), - PINMUX_DATA(DV_VSYNC_MARK, PORT192_FN3), - PINMUX_DATA(D25_MARK, PORT192_FN6), - PINMUX_DATA(ED25_MARK, PORT192_FN7), - PINMUX_DATA(LCDD18_MARK, PORT193_FN1), - PINMUX_DATA(DREQ2_MARK, PORT193_FN2), - PINMUX_DATA(MSIOF0L_TSCK_MARK, PORT193_FN5), - PINMUX_DATA(D26_MARK, PORT193_FN6), - PINMUX_DATA(ED26_MARK, PORT193_FN7), - PINMUX_DATA(LCDD19_MARK, PORT194_FN1), - PINMUX_DATA(MSIOF0L_TSYNC_MARK, PORT194_FN5), - PINMUX_DATA(D27_MARK, PORT194_FN6), - PINMUX_DATA(ED27_MARK, PORT194_FN7), - PINMUX_DATA(LCDD20_MARK, PORT195_FN1), - PINMUX_DATA(TS_SPSYNC1_MARK, PORT195_FN2), - PINMUX_DATA(MSIOF0L_MCK0_MARK, PORT195_FN5), - PINMUX_DATA(D28_MARK, PORT195_FN6), - PINMUX_DATA(ED28_MARK, PORT195_FN7), - PINMUX_DATA(LCDD21_MARK, PORT196_FN1), - PINMUX_DATA(TS_SDAT1_MARK, PORT196_FN2), - PINMUX_DATA(MSIOF0L_MCK1_MARK, PORT196_FN5), - PINMUX_DATA(D29_MARK, PORT196_FN6), - PINMUX_DATA(ED29_MARK, PORT196_FN7), - PINMUX_DATA(LCDD22_MARK, PORT197_FN1), - PINMUX_DATA(TS_SDEN1_MARK, PORT197_FN2), - PINMUX_DATA(MSIOF0L_SS1_MARK, PORT197_FN5), - PINMUX_DATA(D30_MARK, PORT197_FN6), - PINMUX_DATA(ED30_MARK, PORT197_FN7), - PINMUX_DATA(LCDD23_MARK, PORT198_FN1), - PINMUX_DATA(TS_SCK1_MARK, PORT198_FN2), - PINMUX_DATA(MSIOF0L_SS2_MARK, PORT198_FN5), - PINMUX_DATA(D31_MARK, PORT198_FN6), - PINMUX_DATA(ED31_MARK, PORT198_FN7), - PINMUX_DATA(LCDDCK_MARK, PORT199_FN1), - PINMUX_DATA(LCDWR_MARK, PORT199_FN2), - PINMUX_DATA(DV_CKO_MARK, PORT199_FN3), - PINMUX_DATA(SIUAOSPD_MARK, PORT199_FN4), - PINMUX_DATA(LCDRD_MARK, PORT200_FN1), - PINMUX_DATA(DACK2_MARK, PORT200_FN2), - PINMUX_DATA(MSIOF0L_RSYNC_MARK, PORT200_FN5), - - /* 49-5 (FN) */ - PINMUX_DATA(LCDHSYN_MARK, PORT201_FN1), - PINMUX_DATA(LCDCS_MARK, PORT201_FN2), - PINMUX_DATA(LCDCS2_MARK, PORT201_FN3), - PINMUX_DATA(DACK3_MARK, PORT201_FN4), - PINMUX_DATA(LCDDISP_MARK, PORT202_FN1), - PINMUX_DATA(LCDRS_MARK, PORT202_FN2), - PINMUX_DATA(DREQ3_MARK, PORT202_FN4), - PINMUX_DATA(MSIOF0L_RSCK_MARK, PORT202_FN5), - PINMUX_DATA(LCDCSYN_MARK, PORT203_FN1), - PINMUX_DATA(LCDCSYN2_MARK, PORT203_FN2), - PINMUX_DATA(DV_CKI_MARK, PORT203_FN3), - PINMUX_DATA(LCDLCLK_MARK, PORT204_FN1), - PINMUX_DATA(DREQ1_MARK, PORT204_FN3), - PINMUX_DATA(MSIOF0L_RXD_MARK, PORT204_FN5), - PINMUX_DATA(LCDDON_MARK, PORT205_FN1), - PINMUX_DATA(LCDDON2_MARK, PORT205_FN2), - PINMUX_DATA(DACK1_MARK, PORT205_FN3), - PINMUX_DATA(MSIOF0L_TXD_MARK, PORT205_FN5), - PINMUX_DATA(VIO_DR0_MARK, PORT206_FN1), - PINMUX_DATA(VIO_DR1_MARK, PORT207_FN1), - PINMUX_DATA(VIO_DR2_MARK, PORT208_FN1), - PINMUX_DATA(VIO_DR3_MARK, PORT209_FN1), - PINMUX_DATA(VIO_DR4_MARK, PORT210_FN1), - PINMUX_DATA(VIO_DR5_MARK, PORT211_FN1), - PINMUX_DATA(VIO_DR6_MARK, PORT212_FN1), - PINMUX_DATA(VIO_DR7_MARK, PORT213_FN1), - PINMUX_DATA(VIO_VDR_MARK, PORT214_FN1), - PINMUX_DATA(VIO_HDR_MARK, PORT215_FN1), - PINMUX_DATA(VIO_CLKR_MARK, PORT216_FN1), - PINMUX_DATA(VIO_CKOR_MARK, PORT217_FN1), - PINMUX_DATA(SCIFA1_TXD_MARK, PORT220_FN2), - PINMUX_DATA(GPS_PGFA0_MARK, PORT220_FN3), - PINMUX_DATA(SCIFA1_SCK_MARK, PORT221_FN2), - PINMUX_DATA(GPS_PGFA1_MARK, PORT221_FN3), - PINMUX_DATA(SCIFA1_RTS_MARK, PORT222_FN2), - PINMUX_DATA(GPS_EPPSINMON_MARK, PORT222_FN3), - PINMUX_DATA(SCIFA1_RXD_MARK, PORT223_FN2), - PINMUX_DATA(SCIFA1_CTS_MARK, PORT224_FN2), - PINMUX_DATA(MSIOF1_TXD_MARK, PORT225_FN1), - PINMUX_DATA(SCIFA1_TXD2_MARK, PORT225_FN2), - PINMUX_DATA(GPS_TXD_MARK, PORT225_FN3), - PINMUX_DATA(MSIOF1_TSYNC_MARK, PORT226_FN1), - PINMUX_DATA(SCIFA1_CTS2_MARK, PORT226_FN2), - PINMUX_DATA(I2C_SDA2_MARK, PORT226_FN3), - PINMUX_DATA(MSIOF1_TSCK_MARK, PORT227_FN1), - PINMUX_DATA(SCIFA1_SCK2_MARK, PORT227_FN2), - PINMUX_DATA(MSIOF1_RXD_MARK, PORT228_FN1), - PINMUX_DATA(SCIFA1_RXD2_MARK, PORT228_FN2), - PINMUX_DATA(GPS_RXD_MARK, PORT228_FN3), - PINMUX_DATA(MSIOF1_RSCK_MARK, PORT229_FN1), - PINMUX_DATA(SCIFA1_RTS2_MARK, PORT229_FN2), - PINMUX_DATA(MSIOF1_RSYNC_MARK, PORT230_FN1), - PINMUX_DATA(I2C_SCL2_MARK, PORT230_FN3), - PINMUX_DATA(MSIOF1_MCK0_MARK, PORT231_FN1), - PINMUX_DATA(MSIOF1_MCK1_MARK, PORT232_FN1), - PINMUX_DATA(MSIOF1_SS1_MARK, PORT233_FN1), - PINMUX_DATA(EDBGREQ3_MARK, PORT233_FN2), - PINMUX_DATA(MSIOF1_SS2_MARK, PORT234_FN1), - PINMUX_DATA(PORT236_IROUT_MARK, PORT236_FN1), - PINMUX_DATA(IRDA_OUT_MARK, PORT236_FN2), - PINMUX_DATA(IRDA_IN_MARK, PORT237_FN2), - PINMUX_DATA(IRDA_FIRSEL_MARK, PORT238_FN1), - PINMUX_DATA(TPU1TO0_MARK, PORT239_FN3), - PINMUX_DATA(TS_SPSYNC3_MARK, PORT239_FN4), - PINMUX_DATA(TPU1TO1_MARK, PORT240_FN3), - PINMUX_DATA(TS_SDAT3_MARK, PORT240_FN4), - PINMUX_DATA(TPU1TO2_MARK, PORT241_FN3), - PINMUX_DATA(TS_SDEN3_MARK, PORT241_FN4), - PINMUX_DATA(PORT241_MSIOF2_SS1_MARK, PORT241_FN5), - PINMUX_DATA(TPU1TO3_MARK, PORT242_FN3), - PINMUX_DATA(PORT242_MSIOF2_TSCK_MARK, PORT242_FN5), - PINMUX_DATA(M13_BSW_MARK, PORT243_FN2), - PINMUX_DATA(PORT243_MSIOF2_TSYNC_MARK, PORT243_FN5), - PINMUX_DATA(M14_GSW_MARK, PORT244_FN2), - PINMUX_DATA(PORT244_MSIOF2_TXD_MARK, PORT244_FN5), - PINMUX_DATA(PORT245_IROUT_MARK, PORT245_FN1), - PINMUX_DATA(M15_RSW_MARK, PORT245_FN2), - PINMUX_DATA(SOUT3_MARK, PORT246_FN1), - PINMUX_DATA(SCIFA2_TXD1_MARK, PORT246_FN2), - PINMUX_DATA(SIN3_MARK, PORT247_FN1), - PINMUX_DATA(SCIFA2_RXD1_MARK, PORT247_FN2), - PINMUX_DATA(XRTS3_MARK, PORT248_FN1), - PINMUX_DATA(SCIFA2_RTS1_MARK, PORT248_FN2), - PINMUX_DATA(PORT248_MSIOF2_SS2_MARK, PORT248_FN5), - PINMUX_DATA(XCTS3_MARK, PORT249_FN1), - PINMUX_DATA(SCIFA2_CTS1_MARK, PORT249_FN2), - PINMUX_DATA(PORT249_MSIOF2_RXD_MARK, PORT249_FN5), - PINMUX_DATA(DINT_MARK, PORT250_FN1), - PINMUX_DATA(SCIFA2_SCK1_MARK, PORT250_FN2), - PINMUX_DATA(TS_SCK3_MARK, PORT250_FN4), - PINMUX_DATA(SDHICLK0_MARK, PORT251_FN1), - PINMUX_DATA(TCK2_MARK, PORT251_FN2), - PINMUX_DATA(SDHICD0_MARK, PORT252_FN1), - PINMUX_DATA(SDHID0_0_MARK, PORT253_FN1), - PINMUX_DATA(TMS2_MARK, PORT253_FN2), - PINMUX_DATA(SDHID0_1_MARK, PORT254_FN1), - PINMUX_DATA(TDO2_MARK, PORT254_FN2), - PINMUX_DATA(SDHID0_2_MARK, PORT255_FN1), - PINMUX_DATA(TDI2_MARK, PORT255_FN2), - PINMUX_DATA(SDHID0_3_MARK, PORT256_FN1), - PINMUX_DATA(RTCK2_MARK, PORT256_FN2), - - /* 49-6 (FN) */ - PINMUX_DATA(SDHICMD0_MARK, PORT257_FN1), - PINMUX_DATA(TRST2_MARK, PORT257_FN2), - PINMUX_DATA(SDHIWP0_MARK, PORT258_FN1), - PINMUX_DATA(EDBGREQ2_MARK, PORT258_FN2), - PINMUX_DATA(SDHICLK1_MARK, PORT259_FN1), - PINMUX_DATA(TCK3_MARK, PORT259_FN4), - PINMUX_DATA(SDHID1_0_MARK, PORT260_FN1), - PINMUX_DATA(M11_SLCD_SO2_MARK, PORT260_FN2), - PINMUX_DATA(TS_SPSYNC2_MARK, PORT260_FN3), - PINMUX_DATA(TMS3_MARK, PORT260_FN4), - PINMUX_DATA(SDHID1_1_MARK, PORT261_FN1), - PINMUX_DATA(M9_SLCD_AO2_MARK, PORT261_FN2), - PINMUX_DATA(TS_SDAT2_MARK, PORT261_FN3), - PINMUX_DATA(TDO3_MARK, PORT261_FN4), - PINMUX_DATA(SDHID1_2_MARK, PORT262_FN1), - PINMUX_DATA(M10_SLCD_CK2_MARK, PORT262_FN2), - PINMUX_DATA(TS_SDEN2_MARK, PORT262_FN3), - PINMUX_DATA(TDI3_MARK, PORT262_FN4), - PINMUX_DATA(SDHID1_3_MARK, PORT263_FN1), - PINMUX_DATA(M12_SLCD_CE2_MARK, PORT263_FN2), - PINMUX_DATA(TS_SCK2_MARK, PORT263_FN3), - PINMUX_DATA(RTCK3_MARK, PORT263_FN4), - PINMUX_DATA(SDHICMD1_MARK, PORT264_FN1), - PINMUX_DATA(TRST3_MARK, PORT264_FN4), - PINMUX_DATA(SDHICLK2_MARK, PORT265_FN1), - PINMUX_DATA(SCIFB_SCK_MARK, PORT265_FN2), - PINMUX_DATA(SDHID2_0_MARK, PORT266_FN1), - PINMUX_DATA(SCIFB_TXD_MARK, PORT266_FN2), - PINMUX_DATA(SDHID2_1_MARK, PORT267_FN1), - PINMUX_DATA(SCIFB_CTS_MARK, PORT267_FN2), - PINMUX_DATA(SDHID2_2_MARK, PORT268_FN1), - PINMUX_DATA(SCIFB_RXD_MARK, PORT268_FN2), - PINMUX_DATA(SDHID2_3_MARK, PORT269_FN1), - PINMUX_DATA(SCIFB_RTS_MARK, PORT269_FN2), - PINMUX_DATA(SDHICMD2_MARK, PORT270_FN1), - PINMUX_DATA(RESETOUTS_MARK, PORT271_FN1), - PINMUX_DATA(DIVLOCK_MARK, PORT272_FN1), -}; - -static struct pinmux_gpio pinmux_gpios[] = { - /* 49-1 -> 49-6 (GPIO) */ - GPIO_PORT_ALL(), - - /* Special Pull-up / Pull-down Functions */ - GPIO_FN(PORT48_KEYIN0_PU), GPIO_FN(PORT49_KEYIN1_PU), - GPIO_FN(PORT50_KEYIN2_PU), GPIO_FN(PORT55_KEYIN3_PU), - GPIO_FN(PORT56_KEYIN4_PU), GPIO_FN(PORT57_KEYIN5_PU), - GPIO_FN(PORT58_KEYIN6_PU), - - /* 49-1 (FN) */ - GPIO_FN(VBUS0), GPIO_FN(CPORT0), GPIO_FN(CPORT1), GPIO_FN(CPORT2), - GPIO_FN(CPORT3), GPIO_FN(CPORT4), GPIO_FN(CPORT5), GPIO_FN(CPORT6), - GPIO_FN(CPORT7), GPIO_FN(CPORT8), GPIO_FN(CPORT9), GPIO_FN(CPORT10), - GPIO_FN(CPORT11), GPIO_FN(SIN2), GPIO_FN(CPORT12), GPIO_FN(XCTS2), - GPIO_FN(CPORT13), GPIO_FN(RFSPO4), GPIO_FN(CPORT14), GPIO_FN(RFSPO5), - GPIO_FN(CPORT15), GPIO_FN(CPORT16), GPIO_FN(CPORT17), GPIO_FN(SOUT2), - GPIO_FN(CPORT18), GPIO_FN(XRTS2), GPIO_FN(CPORT19), GPIO_FN(CPORT20), - GPIO_FN(RFSPO6), GPIO_FN(CPORT21), GPIO_FN(STATUS0), GPIO_FN(CPORT22), - GPIO_FN(STATUS1), GPIO_FN(CPORT23), GPIO_FN(STATUS2), GPIO_FN(RFSPO7), - GPIO_FN(MPORT0), GPIO_FN(MPORT1), GPIO_FN(B_SYNLD1), GPIO_FN(B_SYNLD2), - GPIO_FN(XMAINPS), GPIO_FN(XDIVPS), GPIO_FN(XIDRST), GPIO_FN(IDCLK), - GPIO_FN(IDIO), GPIO_FN(SOUT1), GPIO_FN(SCIFA4_TXD), - GPIO_FN(M02_BERDAT), GPIO_FN(SIN1), GPIO_FN(SCIFA4_RXD), GPIO_FN(XWUP), - GPIO_FN(XRTS1), GPIO_FN(SCIFA4_RTS), GPIO_FN(M03_BERCLK), - GPIO_FN(XCTS1), GPIO_FN(SCIFA4_CTS), - - /* 49-2 (FN) */ - GPIO_FN(HSU_IQ_AGC6), GPIO_FN(MFG2_IN2), GPIO_FN(MSIOF2_MCK0), - GPIO_FN(HSU_IQ_AGC5), GPIO_FN(MFG2_IN1), GPIO_FN(MSIOF2_MCK1), - GPIO_FN(HSU_IQ_AGC4), GPIO_FN(MSIOF2_RSYNC), - GPIO_FN(HSU_IQ_AGC3), GPIO_FN(MFG2_OUT1), GPIO_FN(MSIOF2_RSCK), - GPIO_FN(HSU_IQ_AGC2), GPIO_FN(PORT42_KEYOUT0), - GPIO_FN(HSU_IQ_AGC1), GPIO_FN(PORT43_KEYOUT1), - GPIO_FN(HSU_IQ_AGC0), GPIO_FN(PORT44_KEYOUT2), - GPIO_FN(HSU_IQ_AGC_ST), GPIO_FN(PORT45_KEYOUT3), - GPIO_FN(HSU_IQ_PDO), GPIO_FN(PORT46_KEYOUT4), - GPIO_FN(HSU_IQ_PYO), GPIO_FN(PORT47_KEYOUT5), - GPIO_FN(HSU_EN_TXMUX_G3MO), GPIO_FN(PORT48_KEYIN0), - GPIO_FN(HSU_I_TXMUX_G3MO), GPIO_FN(PORT49_KEYIN1), - GPIO_FN(HSU_Q_TXMUX_G3MO), GPIO_FN(PORT50_KEYIN2), - GPIO_FN(HSU_SYO), GPIO_FN(PORT51_MSIOF2_TSYNC), - GPIO_FN(HSU_SDO), GPIO_FN(PORT52_MSIOF2_TSCK), - GPIO_FN(HSU_TGTTI_G3MO), GPIO_FN(PORT53_MSIOF2_TXD), - GPIO_FN(B_TIME_STAMP), GPIO_FN(PORT54_MSIOF2_RXD), - GPIO_FN(HSU_SDI), GPIO_FN(PORT55_KEYIN3), - GPIO_FN(HSU_SCO), GPIO_FN(PORT56_KEYIN4), - GPIO_FN(HSU_DREQ), GPIO_FN(PORT57_KEYIN5), - GPIO_FN(HSU_DACK), GPIO_FN(PORT58_KEYIN6), - GPIO_FN(HSU_CLK61M), GPIO_FN(PORT59_MSIOF2_SS1), - GPIO_FN(HSU_XRST), GPIO_FN(PORT60_MSIOF2_SS2), - GPIO_FN(PCMCLKO), GPIO_FN(SYNC8KO), GPIO_FN(DNPCM_A), GPIO_FN(UPPCM_A), - GPIO_FN(XTALB1L), - GPIO_FN(GPS_AGC1), GPIO_FN(SCIFA0_RTS), - GPIO_FN(GPS_AGC2), GPIO_FN(SCIFA0_SCK), - GPIO_FN(GPS_AGC3), GPIO_FN(SCIFA0_TXD), - GPIO_FN(GPS_AGC4), GPIO_FN(SCIFA0_RXD), - GPIO_FN(GPS_PWRD), GPIO_FN(SCIFA0_CTS), - GPIO_FN(GPS_IM), GPIO_FN(GPS_IS), GPIO_FN(GPS_QM), GPIO_FN(GPS_QS), - GPIO_FN(SIUBOMC), GPIO_FN(TPU2TO0), - GPIO_FN(SIUCKB), GPIO_FN(TPU2TO1), - GPIO_FN(SIUBOLR), GPIO_FN(BBIF2_TSYNC), GPIO_FN(TPU2TO2), - GPIO_FN(SIUBOBT), GPIO_FN(BBIF2_TSCK), GPIO_FN(TPU2TO3), - GPIO_FN(SIUBOSLD), GPIO_FN(BBIF2_TXD), GPIO_FN(TPU3TO0), - GPIO_FN(SIUBILR), GPIO_FN(TPU3TO1), - GPIO_FN(SIUBIBT), GPIO_FN(TPU3TO2), - GPIO_FN(SIUBISLD), GPIO_FN(TPU3TO3), - GPIO_FN(NMI), GPIO_FN(TPU4TO0), - GPIO_FN(DNPCM_M), GPIO_FN(TPU4TO1), GPIO_FN(TPU4TO2), GPIO_FN(TPU4TO3), - GPIO_FN(IRQ_TMPB), - GPIO_FN(PWEN), GPIO_FN(MFG1_OUT1), - GPIO_FN(OVCN), GPIO_FN(MFG1_IN1), - GPIO_FN(OVCN2), GPIO_FN(MFG1_IN2), - - /* 49-3 (FN) */ - GPIO_FN(RFSPO1), GPIO_FN(RFSPO2), GPIO_FN(RFSPO3), - GPIO_FN(PORT93_VIO_CKO2), - GPIO_FN(USBTERM), GPIO_FN(EXTLP), GPIO_FN(IDIN), - GPIO_FN(SCIFA5_CTS), GPIO_FN(MFG0_IN1), - GPIO_FN(SCIFA5_RTS), GPIO_FN(MFG0_IN2), - GPIO_FN(SCIFA5_RXD), - GPIO_FN(SCIFA5_TXD), - GPIO_FN(SCIFA5_SCK), GPIO_FN(MFG0_OUT1), - GPIO_FN(A0_EA0), GPIO_FN(BS), - GPIO_FN(A14_EA14), GPIO_FN(PORT102_KEYOUT0), - GPIO_FN(A15_EA15), GPIO_FN(PORT103_KEYOUT1), GPIO_FN(DV_CLKOL), - GPIO_FN(A16_EA16), GPIO_FN(PORT104_KEYOUT2), - GPIO_FN(DV_VSYNCL), GPIO_FN(MSIOF0_SS1), - GPIO_FN(A17_EA17), GPIO_FN(PORT105_KEYOUT3), - GPIO_FN(DV_HSYNCL), GPIO_FN(MSIOF0_TSYNC), - GPIO_FN(A18_EA18), GPIO_FN(PORT106_KEYOUT4), - GPIO_FN(DV_DL0), GPIO_FN(MSIOF0_TSCK), - GPIO_FN(A19_EA19), GPIO_FN(PORT107_KEYOUT5), - GPIO_FN(DV_DL1), GPIO_FN(MSIOF0_TXD), - GPIO_FN(A20_EA20), GPIO_FN(PORT108_KEYIN0), - GPIO_FN(DV_DL2), GPIO_FN(MSIOF0_RSCK), - GPIO_FN(A21_EA21), GPIO_FN(PORT109_KEYIN1), - GPIO_FN(DV_DL3), GPIO_FN(MSIOF0_RSYNC), - GPIO_FN(A22_EA22), GPIO_FN(PORT110_KEYIN2), - GPIO_FN(DV_DL4), GPIO_FN(MSIOF0_MCK0), - GPIO_FN(A23_EA23), GPIO_FN(PORT111_KEYIN3), - GPIO_FN(DV_DL5), GPIO_FN(MSIOF0_MCK1), - GPIO_FN(A24_EA24), GPIO_FN(PORT112_KEYIN4), - GPIO_FN(DV_DL6), GPIO_FN(MSIOF0_RXD), - GPIO_FN(A25_EA25), GPIO_FN(PORT113_KEYIN5), - GPIO_FN(DV_DL7), GPIO_FN(MSIOF0_SS2), - GPIO_FN(A26), GPIO_FN(PORT113_KEYIN6), GPIO_FN(DV_CLKIL), - GPIO_FN(D0_ED0_NAF0), GPIO_FN(D1_ED1_NAF1), GPIO_FN(D2_ED2_NAF2), - GPIO_FN(D3_ED3_NAF3), GPIO_FN(D4_ED4_NAF4), GPIO_FN(D5_ED5_NAF5), - GPIO_FN(D6_ED6_NAF6), GPIO_FN(D7_ED7_NAF7), GPIO_FN(D8_ED8_NAF8), - GPIO_FN(D9_ED9_NAF9), GPIO_FN(D10_ED10_NAF10), GPIO_FN(D11_ED11_NAF11), - GPIO_FN(D12_ED12_NAF12), GPIO_FN(D13_ED13_NAF13), - GPIO_FN(D14_ED14_NAF14), GPIO_FN(D15_ED15_NAF15), - GPIO_FN(CS4), GPIO_FN(CS5A), GPIO_FN(CS5B), GPIO_FN(FCE1), - GPIO_FN(CS6B), GPIO_FN(XCS2), GPIO_FN(FCE0), GPIO_FN(CS6A), - GPIO_FN(DACK0), GPIO_FN(WAIT), GPIO_FN(DREQ0), GPIO_FN(RD_XRD), - GPIO_FN(A27), GPIO_FN(RDWR_XWE), GPIO_FN(WE0_XWR0_FWE), - GPIO_FN(WE1_XWR1), GPIO_FN(FRB), GPIO_FN(CKO), - GPIO_FN(NBRSTOUT), GPIO_FN(NBRST), - - /* 49-4 (FN) */ - GPIO_FN(RFSPO0), GPIO_FN(PORT146_VIO_CKO2), GPIO_FN(TSTMD), - GPIO_FN(VIO_VD), GPIO_FN(VIO_HD), - GPIO_FN(VIO_D0), GPIO_FN(VIO_D1), GPIO_FN(VIO_D2), - GPIO_FN(VIO_D3), GPIO_FN(VIO_D4), GPIO_FN(VIO_D5), - GPIO_FN(VIO_D6), GPIO_FN(VIO_D7), GPIO_FN(VIO_D8), - GPIO_FN(VIO_D9), GPIO_FN(VIO_D10), GPIO_FN(VIO_D11), - GPIO_FN(VIO_D12), GPIO_FN(VIO_D13), GPIO_FN(VIO_D14), - GPIO_FN(VIO_D15), GPIO_FN(VIO_CLK), GPIO_FN(VIO_FIELD), - GPIO_FN(VIO_CKO), - GPIO_FN(MFG3_IN1), GPIO_FN(MFG3_IN2), - GPIO_FN(M9_SLCD_A01), GPIO_FN(MFG3_OUT1), GPIO_FN(TPU0TO0), - GPIO_FN(M10_SLCD_CK1), GPIO_FN(MFG4_IN1), GPIO_FN(TPU0TO1), - GPIO_FN(M11_SLCD_SO1), GPIO_FN(MFG4_IN2), GPIO_FN(TPU0TO2), - GPIO_FN(M12_SLCD_CE1), GPIO_FN(MFG4_OUT1), GPIO_FN(TPU0TO3), - GPIO_FN(LCDD0), GPIO_FN(PORT175_KEYOUT0), GPIO_FN(DV_D0), - GPIO_FN(SIUCKA), GPIO_FN(MFG0_OUT2), - GPIO_FN(LCDD1), GPIO_FN(PORT176_KEYOUT1), GPIO_FN(DV_D1), - GPIO_FN(SIUAOLR), GPIO_FN(BBIF2_TSYNC1), - GPIO_FN(LCDD2), GPIO_FN(PORT177_KEYOUT2), GPIO_FN(DV_D2), - GPIO_FN(SIUAOBT), GPIO_FN(BBIF2_TSCK1), - GPIO_FN(LCDD3), GPIO_FN(PORT178_KEYOUT3), GPIO_FN(DV_D3), - GPIO_FN(SIUAOSLD), GPIO_FN(BBIF2_TXD1), - GPIO_FN(LCDD4), GPIO_FN(PORT179_KEYOUT4), GPIO_FN(DV_D4), - GPIO_FN(SIUAISPD), GPIO_FN(MFG1_OUT2), - GPIO_FN(LCDD5), GPIO_FN(PORT180_KEYOUT5), GPIO_FN(DV_D5), - GPIO_FN(SIUAILR), GPIO_FN(MFG2_OUT2), - GPIO_FN(LCDD6), GPIO_FN(DV_D6), - GPIO_FN(SIUAIBT), GPIO_FN(MFG3_OUT2), GPIO_FN(XWR2), - GPIO_FN(LCDD7), GPIO_FN(DV_D7), - GPIO_FN(SIUAISLD), GPIO_FN(MFG4_OUT2), GPIO_FN(XWR3), - GPIO_FN(LCDD8), GPIO_FN(DV_D8), GPIO_FN(D16), GPIO_FN(ED16), - GPIO_FN(LCDD9), GPIO_FN(DV_D9), GPIO_FN(D17), GPIO_FN(ED17), - GPIO_FN(LCDD10), GPIO_FN(DV_D10), GPIO_FN(D18), GPIO_FN(ED18), - GPIO_FN(LCDD11), GPIO_FN(DV_D11), GPIO_FN(D19), GPIO_FN(ED19), - GPIO_FN(LCDD12), GPIO_FN(DV_D12), GPIO_FN(D20), GPIO_FN(ED20), - GPIO_FN(LCDD13), GPIO_FN(DV_D13), GPIO_FN(D21), GPIO_FN(ED21), - GPIO_FN(LCDD14), GPIO_FN(DV_D14), GPIO_FN(D22), GPIO_FN(ED22), - GPIO_FN(LCDD15), GPIO_FN(DV_D15), GPIO_FN(D23), GPIO_FN(ED23), - GPIO_FN(LCDD16), GPIO_FN(DV_HSYNC), GPIO_FN(D24), GPIO_FN(ED24), - GPIO_FN(LCDD17), GPIO_FN(DV_VSYNC), GPIO_FN(D25), GPIO_FN(ED25), - GPIO_FN(LCDD18), GPIO_FN(DREQ2), GPIO_FN(MSIOF0L_TSCK), - GPIO_FN(D26), GPIO_FN(ED26), - GPIO_FN(LCDD19), GPIO_FN(MSIOF0L_TSYNC), - GPIO_FN(D27), GPIO_FN(ED27), - GPIO_FN(LCDD20), GPIO_FN(TS_SPSYNC1), GPIO_FN(MSIOF0L_MCK0), - GPIO_FN(D28), GPIO_FN(ED28), - GPIO_FN(LCDD21), GPIO_FN(TS_SDAT1), GPIO_FN(MSIOF0L_MCK1), - GPIO_FN(D29), GPIO_FN(ED29), - GPIO_FN(LCDD22), GPIO_FN(TS_SDEN1), GPIO_FN(MSIOF0L_SS1), - GPIO_FN(D30), GPIO_FN(ED30), - GPIO_FN(LCDD23), GPIO_FN(TS_SCK1), GPIO_FN(MSIOF0L_SS2), - GPIO_FN(D31), GPIO_FN(ED31), - GPIO_FN(LCDDCK), GPIO_FN(LCDWR), GPIO_FN(DV_CKO), GPIO_FN(SIUAOSPD), - GPIO_FN(LCDRD), GPIO_FN(DACK2), GPIO_FN(MSIOF0L_RSYNC), - - /* 49-5 (FN) */ - GPIO_FN(LCDHSYN), GPIO_FN(LCDCS), GPIO_FN(LCDCS2), GPIO_FN(DACK3), - GPIO_FN(LCDDISP), GPIO_FN(LCDRS), GPIO_FN(DREQ3), GPIO_FN(MSIOF0L_RSCK), - GPIO_FN(LCDCSYN), GPIO_FN(LCDCSYN2), GPIO_FN(DV_CKI), - GPIO_FN(LCDLCLK), GPIO_FN(DREQ1), GPIO_FN(MSIOF0L_RXD), - GPIO_FN(LCDDON), GPIO_FN(LCDDON2), GPIO_FN(DACK1), GPIO_FN(MSIOF0L_TXD), - GPIO_FN(VIO_DR0), GPIO_FN(VIO_DR1), GPIO_FN(VIO_DR2), GPIO_FN(VIO_DR3), - GPIO_FN(VIO_DR4), GPIO_FN(VIO_DR5), GPIO_FN(VIO_DR6), GPIO_FN(VIO_DR7), - GPIO_FN(VIO_VDR), GPIO_FN(VIO_HDR), - GPIO_FN(VIO_CLKR), GPIO_FN(VIO_CKOR), - GPIO_FN(SCIFA1_TXD), GPIO_FN(GPS_PGFA0), - GPIO_FN(SCIFA1_SCK), GPIO_FN(GPS_PGFA1), - GPIO_FN(SCIFA1_RTS), GPIO_FN(GPS_EPPSINMON), - GPIO_FN(SCIFA1_RXD), GPIO_FN(SCIFA1_CTS), - GPIO_FN(MSIOF1_TXD), GPIO_FN(SCIFA1_TXD2), GPIO_FN(GPS_TXD), - GPIO_FN(MSIOF1_TSYNC), GPIO_FN(SCIFA1_CTS2), GPIO_FN(I2C_SDA2), - GPIO_FN(MSIOF1_TSCK), GPIO_FN(SCIFA1_SCK2), - GPIO_FN(MSIOF1_RXD), GPIO_FN(SCIFA1_RXD2), GPIO_FN(GPS_RXD), - GPIO_FN(MSIOF1_RSCK), GPIO_FN(SCIFA1_RTS2), - GPIO_FN(MSIOF1_RSYNC), GPIO_FN(I2C_SCL2), - GPIO_FN(MSIOF1_MCK0), GPIO_FN(MSIOF1_MCK1), - GPIO_FN(MSIOF1_SS1), GPIO_FN(EDBGREQ3), - GPIO_FN(MSIOF1_SS2), - GPIO_FN(PORT236_IROUT), GPIO_FN(IRDA_OUT), - GPIO_FN(IRDA_IN), GPIO_FN(IRDA_FIRSEL), - GPIO_FN(TPU1TO0), GPIO_FN(TS_SPSYNC3), - GPIO_FN(TPU1TO1), GPIO_FN(TS_SDAT3), - GPIO_FN(TPU1TO2), GPIO_FN(TS_SDEN3), GPIO_FN(PORT241_MSIOF2_SS1), - GPIO_FN(TPU1TO3), GPIO_FN(PORT242_MSIOF2_TSCK), - GPIO_FN(M13_BSW), GPIO_FN(PORT243_MSIOF2_TSYNC), - GPIO_FN(M14_GSW), GPIO_FN(PORT244_MSIOF2_TXD), - GPIO_FN(PORT245_IROUT), GPIO_FN(M15_RSW), - GPIO_FN(SOUT3), GPIO_FN(SCIFA2_TXD1), - GPIO_FN(SIN3), GPIO_FN(SCIFA2_RXD1), - GPIO_FN(XRTS3), GPIO_FN(SCIFA2_RTS1), GPIO_FN(PORT248_MSIOF2_SS2), - GPIO_FN(XCTS3), GPIO_FN(SCIFA2_CTS1), GPIO_FN(PORT249_MSIOF2_RXD), - GPIO_FN(DINT), GPIO_FN(SCIFA2_SCK1), GPIO_FN(TS_SCK3), - GPIO_FN(SDHICLK0), GPIO_FN(TCK2), - GPIO_FN(SDHICD0), - GPIO_FN(SDHID0_0), GPIO_FN(TMS2), - GPIO_FN(SDHID0_1), GPIO_FN(TDO2), - GPIO_FN(SDHID0_2), GPIO_FN(TDI2), - GPIO_FN(SDHID0_3), GPIO_FN(RTCK2), - - /* 49-6 (FN) */ - GPIO_FN(SDHICMD0), GPIO_FN(TRST2), - GPIO_FN(SDHIWP0), GPIO_FN(EDBGREQ2), - GPIO_FN(SDHICLK1), GPIO_FN(TCK3), - GPIO_FN(SDHID1_0), GPIO_FN(M11_SLCD_SO2), - GPIO_FN(TS_SPSYNC2), GPIO_FN(TMS3), - GPIO_FN(SDHID1_1), GPIO_FN(M9_SLCD_AO2), - GPIO_FN(TS_SDAT2), GPIO_FN(TDO3), - GPIO_FN(SDHID1_2), GPIO_FN(M10_SLCD_CK2), - GPIO_FN(TS_SDEN2), GPIO_FN(TDI3), - GPIO_FN(SDHID1_3), GPIO_FN(M12_SLCD_CE2), - GPIO_FN(TS_SCK2), GPIO_FN(RTCK3), - GPIO_FN(SDHICMD1), GPIO_FN(TRST3), - GPIO_FN(SDHICLK2), GPIO_FN(SCIFB_SCK), - GPIO_FN(SDHID2_0), GPIO_FN(SCIFB_TXD), - GPIO_FN(SDHID2_1), GPIO_FN(SCIFB_CTS), - GPIO_FN(SDHID2_2), GPIO_FN(SCIFB_RXD), - GPIO_FN(SDHID2_3), GPIO_FN(SCIFB_RTS), - GPIO_FN(SDHICMD2), - GPIO_FN(RESETOUTS), - GPIO_FN(DIVLOCK), -}; - -static struct pinmux_cfg_reg pinmux_config_regs[] = { - PORTCR(0, 0xe6050000), /* PORT0CR */ - PORTCR(1, 0xe6050001), /* PORT1CR */ - PORTCR(2, 0xe6050002), /* PORT2CR */ - PORTCR(3, 0xe6050003), /* PORT3CR */ - PORTCR(4, 0xe6050004), /* PORT4CR */ - PORTCR(5, 0xe6050005), /* PORT5CR */ - PORTCR(6, 0xe6050006), /* PORT6CR */ - PORTCR(7, 0xe6050007), /* PORT7CR */ - PORTCR(8, 0xe6050008), /* PORT8CR */ - PORTCR(9, 0xe6050009), /* PORT9CR */ - - PORTCR(10, 0xe605000a), /* PORT10CR */ - PORTCR(11, 0xe605000b), /* PORT11CR */ - PORTCR(12, 0xe605000c), /* PORT12CR */ - PORTCR(13, 0xe605000d), /* PORT13CR */ - PORTCR(14, 0xe605000e), /* PORT14CR */ - PORTCR(15, 0xe605000f), /* PORT15CR */ - PORTCR(16, 0xe6050010), /* PORT16CR */ - PORTCR(17, 0xe6050011), /* PORT17CR */ - PORTCR(18, 0xe6050012), /* PORT18CR */ - PORTCR(19, 0xe6050013), /* PORT19CR */ - - PORTCR(20, 0xe6050014), /* PORT20CR */ - PORTCR(21, 0xe6050015), /* PORT21CR */ - PORTCR(22, 0xe6050016), /* PORT22CR */ - PORTCR(23, 0xe6050017), /* PORT23CR */ - PORTCR(24, 0xe6050018), /* PORT24CR */ - PORTCR(25, 0xe6050019), /* PORT25CR */ - PORTCR(26, 0xe605001a), /* PORT26CR */ - PORTCR(27, 0xe605001b), /* PORT27CR */ - PORTCR(28, 0xe605001c), /* PORT28CR */ - PORTCR(29, 0xe605001d), /* PORT29CR */ - - PORTCR(30, 0xe605001e), /* PORT30CR */ - PORTCR(31, 0xe605001f), /* PORT31CR */ - PORTCR(32, 0xe6050020), /* PORT32CR */ - PORTCR(33, 0xe6050021), /* PORT33CR */ - PORTCR(34, 0xe6050022), /* PORT34CR */ - PORTCR(35, 0xe6050023), /* PORT35CR */ - PORTCR(36, 0xe6050024), /* PORT36CR */ - PORTCR(37, 0xe6050025), /* PORT37CR */ - PORTCR(38, 0xe6050026), /* PORT38CR */ - PORTCR(39, 0xe6050027), /* PORT39CR */ - - PORTCR(40, 0xe6050028), /* PORT40CR */ - PORTCR(41, 0xe6050029), /* PORT41CR */ - PORTCR(42, 0xe605002a), /* PORT42CR */ - PORTCR(43, 0xe605002b), /* PORT43CR */ - PORTCR(44, 0xe605002c), /* PORT44CR */ - PORTCR(45, 0xe605002d), /* PORT45CR */ - PORTCR(46, 0xe605002e), /* PORT46CR */ - PORTCR(47, 0xe605002f), /* PORT47CR */ - PORTCR(48, 0xe6050030), /* PORT48CR */ - PORTCR(49, 0xe6050031), /* PORT49CR */ - - PORTCR(50, 0xe6050032), /* PORT50CR */ - PORTCR(51, 0xe6050033), /* PORT51CR */ - PORTCR(52, 0xe6050034), /* PORT52CR */ - PORTCR(53, 0xe6050035), /* PORT53CR */ - PORTCR(54, 0xe6050036), /* PORT54CR */ - PORTCR(55, 0xe6050037), /* PORT55CR */ - PORTCR(56, 0xe6050038), /* PORT56CR */ - PORTCR(57, 0xe6050039), /* PORT57CR */ - PORTCR(58, 0xe605003a), /* PORT58CR */ - PORTCR(59, 0xe605003b), /* PORT59CR */ - - PORTCR(60, 0xe605003c), /* PORT60CR */ - PORTCR(61, 0xe605003d), /* PORT61CR */ - PORTCR(62, 0xe605003e), /* PORT62CR */ - PORTCR(63, 0xe605003f), /* PORT63CR */ - PORTCR(64, 0xe6050040), /* PORT64CR */ - PORTCR(65, 0xe6050041), /* PORT65CR */ - PORTCR(66, 0xe6050042), /* PORT66CR */ - PORTCR(67, 0xe6050043), /* PORT67CR */ - PORTCR(68, 0xe6050044), /* PORT68CR */ - PORTCR(69, 0xe6050045), /* PORT69CR */ - - PORTCR(70, 0xe6050046), /* PORT70CR */ - PORTCR(71, 0xe6050047), /* PORT71CR */ - PORTCR(72, 0xe6050048), /* PORT72CR */ - PORTCR(73, 0xe6050049), /* PORT73CR */ - PORTCR(74, 0xe605004a), /* PORT74CR */ - PORTCR(75, 0xe605004b), /* PORT75CR */ - PORTCR(76, 0xe605004c), /* PORT76CR */ - PORTCR(77, 0xe605004d), /* PORT77CR */ - PORTCR(78, 0xe605004e), /* PORT78CR */ - PORTCR(79, 0xe605004f), /* PORT79CR */ - - PORTCR(80, 0xe6050050), /* PORT80CR */ - PORTCR(81, 0xe6050051), /* PORT81CR */ - PORTCR(82, 0xe6050052), /* PORT82CR */ - PORTCR(83, 0xe6050053), /* PORT83CR */ - PORTCR(84, 0xe6050054), /* PORT84CR */ - PORTCR(85, 0xe6050055), /* PORT85CR */ - PORTCR(86, 0xe6050056), /* PORT86CR */ - PORTCR(87, 0xe6050057), /* PORT87CR */ - PORTCR(88, 0xe6051058), /* PORT88CR */ - PORTCR(89, 0xe6051059), /* PORT89CR */ - - PORTCR(90, 0xe605105a), /* PORT90CR */ - PORTCR(91, 0xe605105b), /* PORT91CR */ - PORTCR(92, 0xe605105c), /* PORT92CR */ - PORTCR(93, 0xe605105d), /* PORT93CR */ - PORTCR(94, 0xe605105e), /* PORT94CR */ - PORTCR(95, 0xe605105f), /* PORT95CR */ - PORTCR(96, 0xe6051060), /* PORT96CR */ - PORTCR(97, 0xe6051061), /* PORT97CR */ - PORTCR(98, 0xe6051062), /* PORT98CR */ - PORTCR(99, 0xe6051063), /* PORT99CR */ - - PORTCR(100, 0xe6051064), /* PORT100CR */ - PORTCR(101, 0xe6051065), /* PORT101CR */ - PORTCR(102, 0xe6051066), /* PORT102CR */ - PORTCR(103, 0xe6051067), /* PORT103CR */ - PORTCR(104, 0xe6051068), /* PORT104CR */ - PORTCR(105, 0xe6051069), /* PORT105CR */ - PORTCR(106, 0xe605106a), /* PORT106CR */ - PORTCR(107, 0xe605106b), /* PORT107CR */ - PORTCR(108, 0xe605106c), /* PORT108CR */ - PORTCR(109, 0xe605106d), /* PORT109CR */ - - PORTCR(110, 0xe605106e), /* PORT110CR */ - PORTCR(111, 0xe605106f), /* PORT111CR */ - PORTCR(112, 0xe6051070), /* PORT112CR */ - PORTCR(113, 0xe6051071), /* PORT113CR */ - PORTCR(114, 0xe6051072), /* PORT114CR */ - PORTCR(115, 0xe6051073), /* PORT115CR */ - PORTCR(116, 0xe6051074), /* PORT116CR */ - PORTCR(117, 0xe6051075), /* PORT117CR */ - PORTCR(118, 0xe6051076), /* PORT118CR */ - PORTCR(119, 0xe6051077), /* PORT119CR */ - - PORTCR(120, 0xe6051078), /* PORT120CR */ - PORTCR(121, 0xe6051079), /* PORT121CR */ - PORTCR(122, 0xe605107a), /* PORT122CR */ - PORTCR(123, 0xe605107b), /* PORT123CR */ - PORTCR(124, 0xe605107c), /* PORT124CR */ - PORTCR(125, 0xe605107d), /* PORT125CR */ - PORTCR(126, 0xe605107e), /* PORT126CR */ - PORTCR(127, 0xe605107f), /* PORT127CR */ - PORTCR(128, 0xe6051080), /* PORT128CR */ - PORTCR(129, 0xe6051081), /* PORT129CR */ - - PORTCR(130, 0xe6051082), /* PORT130CR */ - PORTCR(131, 0xe6051083), /* PORT131CR */ - PORTCR(132, 0xe6051084), /* PORT132CR */ - PORTCR(133, 0xe6051085), /* PORT133CR */ - PORTCR(134, 0xe6051086), /* PORT134CR */ - PORTCR(135, 0xe6051087), /* PORT135CR */ - PORTCR(136, 0xe6051088), /* PORT136CR */ - PORTCR(137, 0xe6051089), /* PORT137CR */ - PORTCR(138, 0xe605108a), /* PORT138CR */ - PORTCR(139, 0xe605108b), /* PORT139CR */ - - PORTCR(140, 0xe605108c), /* PORT140CR */ - PORTCR(141, 0xe605108d), /* PORT141CR */ - PORTCR(142, 0xe605108e), /* PORT142CR */ - PORTCR(143, 0xe605108f), /* PORT143CR */ - PORTCR(144, 0xe6051090), /* PORT144CR */ - PORTCR(145, 0xe6051091), /* PORT145CR */ - PORTCR(146, 0xe6051092), /* PORT146CR */ - PORTCR(147, 0xe6051093), /* PORT147CR */ - PORTCR(148, 0xe6051094), /* PORT148CR */ - PORTCR(149, 0xe6051095), /* PORT149CR */ - - PORTCR(150, 0xe6051096), /* PORT150CR */ - PORTCR(151, 0xe6051097), /* PORT151CR */ - PORTCR(152, 0xe6051098), /* PORT152CR */ - PORTCR(153, 0xe6051099), /* PORT153CR */ - PORTCR(154, 0xe605109a), /* PORT154CR */ - PORTCR(155, 0xe605109b), /* PORT155CR */ - PORTCR(156, 0xe605109c), /* PORT156CR */ - PORTCR(157, 0xe605109d), /* PORT157CR */ - PORTCR(158, 0xe605109e), /* PORT158CR */ - PORTCR(159, 0xe605109f), /* PORT159CR */ - - PORTCR(160, 0xe60510a0), /* PORT160CR */ - PORTCR(161, 0xe60510a1), /* PORT161CR */ - PORTCR(162, 0xe60510a2), /* PORT162CR */ - PORTCR(163, 0xe60510a3), /* PORT163CR */ - PORTCR(164, 0xe60510a4), /* PORT164CR */ - PORTCR(165, 0xe60510a5), /* PORT165CR */ - PORTCR(166, 0xe60510a6), /* PORT166CR */ - PORTCR(167, 0xe60510a7), /* PORT167CR */ - PORTCR(168, 0xe60510a8), /* PORT168CR */ - PORTCR(169, 0xe60510a9), /* PORT169CR */ - - PORTCR(170, 0xe60510aa), /* PORT170CR */ - PORTCR(171, 0xe60510ab), /* PORT171CR */ - PORTCR(172, 0xe60510ac), /* PORT172CR */ - PORTCR(173, 0xe60510ad), /* PORT173CR */ - PORTCR(174, 0xe60510ae), /* PORT174CR */ - PORTCR(175, 0xe60520af), /* PORT175CR */ - PORTCR(176, 0xe60520b0), /* PORT176CR */ - PORTCR(177, 0xe60520b1), /* PORT177CR */ - PORTCR(178, 0xe60520b2), /* PORT178CR */ - PORTCR(179, 0xe60520b3), /* PORT179CR */ - - PORTCR(180, 0xe60520b4), /* PORT180CR */ - PORTCR(181, 0xe60520b5), /* PORT181CR */ - PORTCR(182, 0xe60520b6), /* PORT182CR */ - PORTCR(183, 0xe60520b7), /* PORT183CR */ - PORTCR(184, 0xe60520b8), /* PORT184CR */ - PORTCR(185, 0xe60520b9), /* PORT185CR */ - PORTCR(186, 0xe60520ba), /* PORT186CR */ - PORTCR(187, 0xe60520bb), /* PORT187CR */ - PORTCR(188, 0xe60520bc), /* PORT188CR */ - PORTCR(189, 0xe60520bd), /* PORT189CR */ - - PORTCR(190, 0xe60520be), /* PORT190CR */ - PORTCR(191, 0xe60520bf), /* PORT191CR */ - PORTCR(192, 0xe60520c0), /* PORT192CR */ - PORTCR(193, 0xe60520c1), /* PORT193CR */ - PORTCR(194, 0xe60520c2), /* PORT194CR */ - PORTCR(195, 0xe60520c3), /* PORT195CR */ - PORTCR(196, 0xe60520c4), /* PORT196CR */ - PORTCR(197, 0xe60520c5), /* PORT197CR */ - PORTCR(198, 0xe60520c6), /* PORT198CR */ - PORTCR(199, 0xe60520c7), /* PORT199CR */ - - PORTCR(200, 0xe60520c8), /* PORT200CR */ - PORTCR(201, 0xe60520c9), /* PORT201CR */ - PORTCR(202, 0xe60520ca), /* PORT202CR */ - PORTCR(203, 0xe60520cb), /* PORT203CR */ - PORTCR(204, 0xe60520cc), /* PORT204CR */ - PORTCR(205, 0xe60520cd), /* PORT205CR */ - PORTCR(206, 0xe60520ce), /* PORT206CR */ - PORTCR(207, 0xe60520cf), /* PORT207CR */ - PORTCR(208, 0xe60520d0), /* PORT208CR */ - PORTCR(209, 0xe60520d1), /* PORT209CR */ - - PORTCR(210, 0xe60520d2), /* PORT210CR */ - PORTCR(211, 0xe60520d3), /* PORT211CR */ - PORTCR(212, 0xe60520d4), /* PORT212CR */ - PORTCR(213, 0xe60520d5), /* PORT213CR */ - PORTCR(214, 0xe60520d6), /* PORT214CR */ - PORTCR(215, 0xe60520d7), /* PORT215CR */ - PORTCR(216, 0xe60520d8), /* PORT216CR */ - PORTCR(217, 0xe60520d9), /* PORT217CR */ - PORTCR(218, 0xe60520da), /* PORT218CR */ - PORTCR(219, 0xe60520db), /* PORT219CR */ - - PORTCR(220, 0xe60520dc), /* PORT220CR */ - PORTCR(221, 0xe60520dd), /* PORT221CR */ - PORTCR(222, 0xe60520de), /* PORT222CR */ - PORTCR(223, 0xe60520df), /* PORT223CR */ - PORTCR(224, 0xe60520e0), /* PORT224CR */ - PORTCR(225, 0xe60520e1), /* PORT225CR */ - PORTCR(226, 0xe60520e2), /* PORT226CR */ - PORTCR(227, 0xe60520e3), /* PORT227CR */ - PORTCR(228, 0xe60520e4), /* PORT228CR */ - PORTCR(229, 0xe60520e5), /* PORT229CR */ - - PORTCR(230, 0xe60520e6), /* PORT230CR */ - PORTCR(231, 0xe60520e7), /* PORT231CR */ - PORTCR(232, 0xe60520e8), /* PORT232CR */ - PORTCR(233, 0xe60520e9), /* PORT233CR */ - PORTCR(234, 0xe60520ea), /* PORT234CR */ - PORTCR(235, 0xe60520eb), /* PORT235CR */ - PORTCR(236, 0xe60530ec), /* PORT236CR */ - PORTCR(237, 0xe60530ed), /* PORT237CR */ - PORTCR(238, 0xe60530ee), /* PORT238CR */ - PORTCR(239, 0xe60530ef), /* PORT239CR */ - - PORTCR(240, 0xe60530f0), /* PORT240CR */ - PORTCR(241, 0xe60530f1), /* PORT241CR */ - PORTCR(242, 0xe60530f2), /* PORT242CR */ - PORTCR(243, 0xe60530f3), /* PORT243CR */ - PORTCR(244, 0xe60530f4), /* PORT244CR */ - PORTCR(245, 0xe60530f5), /* PORT245CR */ - PORTCR(246, 0xe60530f6), /* PORT246CR */ - PORTCR(247, 0xe60530f7), /* PORT247CR */ - PORTCR(248, 0xe60530f8), /* PORT248CR */ - PORTCR(249, 0xe60530f9), /* PORT249CR */ - - PORTCR(250, 0xe60530fa), /* PORT250CR */ - PORTCR(251, 0xe60530fb), /* PORT251CR */ - PORTCR(252, 0xe60530fc), /* PORT252CR */ - PORTCR(253, 0xe60530fd), /* PORT253CR */ - PORTCR(254, 0xe60530fe), /* PORT254CR */ - PORTCR(255, 0xe60530ff), /* PORT255CR */ - PORTCR(256, 0xe6053100), /* PORT256CR */ - PORTCR(257, 0xe6053101), /* PORT257CR */ - PORTCR(258, 0xe6053102), /* PORT258CR */ - PORTCR(259, 0xe6053103), /* PORT259CR */ - - PORTCR(260, 0xe6053104), /* PORT260CR */ - PORTCR(261, 0xe6053105), /* PORT261CR */ - PORTCR(262, 0xe6053106), /* PORT262CR */ - PORTCR(263, 0xe6053107), /* PORT263CR */ - PORTCR(264, 0xe6053108), /* PORT264CR */ - PORTCR(265, 0xe6053109), /* PORT265CR */ - PORTCR(266, 0xe605310a), /* PORT266CR */ - PORTCR(267, 0xe605310b), /* PORT267CR */ - PORTCR(268, 0xe605310c), /* PORT268CR */ - PORTCR(269, 0xe605310d), /* PORT269CR */ - - PORTCR(270, 0xe605310e), /* PORT270CR */ - PORTCR(271, 0xe605310f), /* PORT271CR */ - PORTCR(272, 0xe6053110), /* PORT272CR */ - - { PINMUX_CFG_REG("MSELBCR", 0xe6058024, 32, 1) { - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - MSELBCR_MSEL2_0, MSELBCR_MSEL2_1, - 0, 0, - 0, 0 } - }, - { }, -}; - -static struct pinmux_data_reg pinmux_data_regs[] = { - { PINMUX_DATA_REG("PORTL031_000DR", 0xe6054000, 32) { - PORT31_DATA, PORT30_DATA, PORT29_DATA, PORT28_DATA, - PORT27_DATA, PORT26_DATA, PORT25_DATA, PORT24_DATA, - PORT23_DATA, PORT22_DATA, PORT21_DATA, PORT20_DATA, - PORT19_DATA, PORT18_DATA, PORT17_DATA, PORT16_DATA, - PORT15_DATA, PORT14_DATA, PORT13_DATA, PORT12_DATA, - PORT11_DATA, PORT10_DATA, PORT9_DATA, PORT8_DATA, - PORT7_DATA, PORT6_DATA, PORT5_DATA, PORT4_DATA, - PORT3_DATA, PORT2_DATA, PORT1_DATA, PORT0_DATA } - }, - { PINMUX_DATA_REG("PORTL063_032DR", 0xe6054004, 32) { - PORT63_DATA, PORT62_DATA, PORT61_DATA, PORT60_DATA, - PORT59_DATA, PORT58_DATA, PORT57_DATA, PORT56_DATA, - PORT55_DATA, PORT54_DATA, PORT53_DATA, PORT52_DATA, - PORT51_DATA, PORT50_DATA, PORT49_DATA, PORT48_DATA, - PORT47_DATA, PORT46_DATA, PORT45_DATA, PORT44_DATA, - PORT43_DATA, PORT42_DATA, PORT41_DATA, PORT40_DATA, - PORT39_DATA, PORT38_DATA, PORT37_DATA, PORT36_DATA, - PORT35_DATA, PORT34_DATA, PORT33_DATA, PORT32_DATA } - }, - { PINMUX_DATA_REG("PORTL095_064DR", 0xe6054008, 32) { - PORT95_DATA, PORT94_DATA, PORT93_DATA, PORT92_DATA, - PORT91_DATA, PORT90_DATA, PORT89_DATA, PORT88_DATA, - PORT87_DATA, PORT86_DATA, PORT85_DATA, PORT84_DATA, - PORT83_DATA, PORT82_DATA, PORT81_DATA, PORT80_DATA, - PORT79_DATA, PORT78_DATA, PORT77_DATA, PORT76_DATA, - PORT75_DATA, PORT74_DATA, PORT73_DATA, PORT72_DATA, - PORT71_DATA, PORT70_DATA, PORT69_DATA, PORT68_DATA, - PORT67_DATA, PORT66_DATA, PORT65_DATA, PORT64_DATA } - }, - { PINMUX_DATA_REG("PORTD127_096DR", 0xe6055004, 32) { - PORT127_DATA, PORT126_DATA, PORT125_DATA, PORT124_DATA, - PORT123_DATA, PORT122_DATA, PORT121_DATA, PORT120_DATA, - PORT119_DATA, PORT118_DATA, PORT117_DATA, PORT116_DATA, - PORT115_DATA, PORT114_DATA, PORT113_DATA, PORT112_DATA, - PORT111_DATA, PORT110_DATA, PORT109_DATA, PORT108_DATA, - PORT107_DATA, PORT106_DATA, PORT105_DATA, PORT104_DATA, - PORT103_DATA, PORT102_DATA, PORT101_DATA, PORT100_DATA, - PORT99_DATA, PORT98_DATA, PORT97_DATA, PORT96_DATA } - }, - { PINMUX_DATA_REG("PORTD159_128DR", 0xe6055008, 32) { - PORT159_DATA, PORT158_DATA, PORT157_DATA, PORT156_DATA, - PORT155_DATA, PORT154_DATA, PORT153_DATA, PORT152_DATA, - PORT151_DATA, PORT150_DATA, PORT149_DATA, PORT148_DATA, - PORT147_DATA, PORT146_DATA, PORT145_DATA, PORT144_DATA, - PORT143_DATA, PORT142_DATA, PORT141_DATA, PORT140_DATA, - PORT139_DATA, PORT138_DATA, PORT137_DATA, PORT136_DATA, - PORT135_DATA, PORT134_DATA, PORT133_DATA, PORT132_DATA, - PORT131_DATA, PORT130_DATA, PORT129_DATA, PORT128_DATA } - }, - { PINMUX_DATA_REG("PORTR191_160DR", 0xe6056000, 32) { - PORT191_DATA, PORT190_DATA, PORT189_DATA, PORT188_DATA, - PORT187_DATA, PORT186_DATA, PORT185_DATA, PORT184_DATA, - PORT183_DATA, PORT182_DATA, PORT181_DATA, PORT180_DATA, - PORT179_DATA, PORT178_DATA, PORT177_DATA, PORT176_DATA, - PORT175_DATA, PORT174_DATA, PORT173_DATA, PORT172_DATA, - PORT171_DATA, PORT170_DATA, PORT169_DATA, PORT168_DATA, - PORT167_DATA, PORT166_DATA, PORT165_DATA, PORT164_DATA, - PORT163_DATA, PORT162_DATA, PORT161_DATA, PORT160_DATA } - }, - { PINMUX_DATA_REG("PORTR223_192DR", 0xe6056004, 32) { - PORT223_DATA, PORT222_DATA, PORT221_DATA, PORT220_DATA, - PORT219_DATA, PORT218_DATA, PORT217_DATA, PORT216_DATA, - PORT215_DATA, PORT214_DATA, PORT213_DATA, PORT212_DATA, - PORT211_DATA, PORT210_DATA, PORT209_DATA, PORT208_DATA, - PORT207_DATA, PORT206_DATA, PORT205_DATA, PORT204_DATA, - PORT203_DATA, PORT202_DATA, PORT201_DATA, PORT200_DATA, - PORT199_DATA, PORT198_DATA, PORT197_DATA, PORT196_DATA, - PORT195_DATA, PORT194_DATA, PORT193_DATA, PORT192_DATA } - }, - { PINMUX_DATA_REG("PORTU255_224DR", 0xe6057000, 32) { - PORT255_DATA, PORT254_DATA, PORT253_DATA, PORT252_DATA, - PORT251_DATA, PORT250_DATA, PORT249_DATA, PORT248_DATA, - PORT247_DATA, PORT246_DATA, PORT245_DATA, PORT244_DATA, - PORT243_DATA, PORT242_DATA, PORT241_DATA, PORT240_DATA, - PORT239_DATA, PORT238_DATA, PORT237_DATA, PORT236_DATA, - PORT235_DATA, PORT234_DATA, PORT233_DATA, PORT232_DATA, - PORT231_DATA, PORT230_DATA, PORT229_DATA, PORT228_DATA, - PORT227_DATA, PORT226_DATA, PORT225_DATA, PORT224_DATA } - }, - { PINMUX_DATA_REG("PORTU287_256DR", 0xe6057004, 32) { - 0, 0, 0, 0, - 0, 0, 0, 0, - 0, 0, 0, 0, - 0, 0, 0, PORT272_DATA, - PORT271_DATA, PORT270_DATA, PORT269_DATA, PORT268_DATA, - PORT267_DATA, PORT266_DATA, PORT265_DATA, PORT264_DATA, - PORT263_DATA, PORT262_DATA, PORT261_DATA, PORT260_DATA, - PORT259_DATA, PORT258_DATA, PORT257_DATA, PORT256_DATA } - }, - { }, -}; - -static struct pinmux_info sh7367_pinmux_info = { - .name = "sh7367_pfc", - .reserved_id = PINMUX_RESERVED, - .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END }, - .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, - .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END }, - .input_pd = { PINMUX_INPUT_PULLDOWN_BEGIN, PINMUX_INPUT_PULLDOWN_END }, - .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END }, - .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END }, - .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, - - .first_gpio = GPIO_PORT0, - .last_gpio = GPIO_FN_DIVLOCK, - - .gpios = pinmux_gpios, - .cfg_regs = pinmux_config_regs, - .data_regs = pinmux_data_regs, - - .gpio_data = pinmux_data, - .gpio_data_size = ARRAY_SIZE(pinmux_data), -}; - -void sh7367_pinmux_init(void) -{ - register_pinmux(&sh7367_pinmux_info); -} diff --git a/arch/arm/mach-shmobile/pfc-sh7377.c b/arch/arm/mach-shmobile/pfc-sh7377.c deleted file mode 100644 index f3117f67fa25..000000000000 --- a/arch/arm/mach-shmobile/pfc-sh7377.c +++ /dev/null @@ -1,1688 +0,0 @@ -/* - * sh7377 processor support - PFC hardware block - * - * Copyright (C) 2010 NISHIMOTO Hiroki - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of the - * License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/sh_pfc.h> -#include <mach/sh7377.h> - -#define CPU_ALL_PORT(fn, pfx, sfx) \ - PORT_10(fn, pfx, sfx), PORT_90(fn, pfx, sfx), \ - PORT_10(fn, pfx##10, sfx), \ - PORT_1(fn, pfx##110, sfx), PORT_1(fn, pfx##111, sfx), \ - PORT_1(fn, pfx##112, sfx), PORT_1(fn, pfx##113, sfx), \ - PORT_1(fn, pfx##114, sfx), PORT_1(fn, pfx##115, sfx), \ - PORT_1(fn, pfx##116, sfx), PORT_1(fn, pfx##117, sfx), \ - PORT_1(fn, pfx##118, sfx), \ - PORT_1(fn, pfx##128, sfx), PORT_1(fn, pfx##129, sfx), \ - PORT_10(fn, pfx##13, sfx), PORT_10(fn, pfx##14, sfx), \ - PORT_10(fn, pfx##15, sfx), \ - PORT_1(fn, pfx##160, sfx), PORT_1(fn, pfx##161, sfx), \ - PORT_1(fn, pfx##162, sfx), PORT_1(fn, pfx##163, sfx), \ - PORT_1(fn, pfx##164, sfx), \ - PORT_1(fn, pfx##192, sfx), PORT_1(fn, pfx##193, sfx), \ - PORT_1(fn, pfx##194, sfx), PORT_1(fn, pfx##195, sfx), \ - PORT_1(fn, pfx##196, sfx), PORT_1(fn, pfx##197, sfx), \ - PORT_1(fn, pfx##198, sfx), PORT_1(fn, pfx##199, sfx), \ - PORT_10(fn, pfx##20, sfx), PORT_10(fn, pfx##21, sfx), \ - PORT_10(fn, pfx##22, sfx), PORT_10(fn, pfx##23, sfx), \ - PORT_10(fn, pfx##24, sfx), PORT_10(fn, pfx##25, sfx), \ - PORT_1(fn, pfx##260, sfx), PORT_1(fn, pfx##261, sfx), \ - PORT_1(fn, pfx##262, sfx), PORT_1(fn, pfx##263, sfx), \ - PORT_1(fn, pfx##264, sfx) - -enum { - PINMUX_RESERVED = 0, - - PINMUX_DATA_BEGIN, - PORT_ALL(DATA), /* PORT0_DATA -> PORT264_DATA */ - PINMUX_DATA_END, - - PINMUX_INPUT_BEGIN, - PORT_ALL(IN), /* PORT0_IN -> PORT264_IN */ - PINMUX_INPUT_END, - - PINMUX_INPUT_PULLUP_BEGIN, - PORT_ALL(IN_PU), /* PORT0_IN_PU -> PORT264_IN_PU */ - PINMUX_INPUT_PULLUP_END, - - PINMUX_INPUT_PULLDOWN_BEGIN, - PORT_ALL(IN_PD), /* PORT0_IN_PD -> PORT264_IN_PD */ - PINMUX_INPUT_PULLDOWN_END, - - PINMUX_OUTPUT_BEGIN, - PORT_ALL(OUT), /* PORT0_OUT -> PORT264_OUT */ - PINMUX_OUTPUT_END, - - PINMUX_FUNCTION_BEGIN, - PORT_ALL(FN_IN), /* PORT0_FN_IN -> PORT264_FN_IN */ - PORT_ALL(FN_OUT), /* PORT0_FN_OUT -> PORT264_FN_OUT */ - PORT_ALL(FN0), /* PORT0_FN0 -> PORT264_FN0 */ - PORT_ALL(FN1), /* PORT0_FN1 -> PORT264_FN1 */ - PORT_ALL(FN2), /* PORT0_FN2 -> PORT264_FN2 */ - PORT_ALL(FN3), /* PORT0_FN3 -> PORT264_FN3 */ - PORT_ALL(FN4), /* PORT0_FN4 -> PORT264_FN4 */ - PORT_ALL(FN5), /* PORT0_FN5 -> PORT264_FN5 */ - PORT_ALL(FN6), /* PORT0_FN6 -> PORT264_FN6 */ - PORT_ALL(FN7), /* PORT0_FN7 -> PORT264_FN7 */ - - MSELBCR_MSEL17_1, MSELBCR_MSEL17_0, - MSELBCR_MSEL16_1, MSELBCR_MSEL16_0, - PINMUX_FUNCTION_END, - - PINMUX_MARK_BEGIN, - /* Special Pull-up / Pull-down Functions */ - PORT66_KEYIN0_PU_MARK, PORT67_KEYIN1_PU_MARK, - PORT68_KEYIN2_PU_MARK, PORT69_KEYIN3_PU_MARK, - PORT70_KEYIN4_PU_MARK, PORT71_KEYIN5_PU_MARK, - PORT72_KEYIN6_PU_MARK, - - /* 55-1 */ - VBUS_0_MARK, - CPORT0_MARK, - CPORT1_MARK, - CPORT2_MARK, - CPORT3_MARK, - CPORT4_MARK, - CPORT5_MARK, - CPORT6_MARK, - CPORT7_MARK, - CPORT8_MARK, - CPORT9_MARK, - CPORT10_MARK, - CPORT11_MARK, SIN2_MARK, - CPORT12_MARK, XCTS2_MARK, - CPORT13_MARK, RFSPO4_MARK, - CPORT14_MARK, RFSPO5_MARK, - CPORT15_MARK, SCIFA0_SCK_MARK, GPS_AGC2_MARK, - CPORT16_MARK, SCIFA0_TXD_MARK, GPS_AGC3_MARK, - CPORT17_IC_OE_MARK, SOUT2_MARK, - CPORT18_MARK, XRTS2_MARK, PORT19_VIO_CKO2_MARK, - CPORT19_MPORT1_MARK, - CPORT20_MARK, RFSPO6_MARK, - CPORT21_MARK, STATUS0_MARK, - CPORT22_MARK, STATUS1_MARK, - CPORT23_MARK, STATUS2_MARK, RFSPO7_MARK, - B_SYNLD1_MARK, - B_SYNLD2_MARK, SYSENMSK_MARK, - XMAINPS_MARK, - XDIVPS_MARK, - XIDRST_MARK, - IDCLK_MARK, IC_DP_MARK, - IDIO_MARK, IC_DM_MARK, - SOUT1_MARK, SCIFA4_TXD_MARK, M02_BERDAT_MARK, - SIN1_MARK, SCIFA4_RXD_MARK, XWUP_MARK, - XRTS1_MARK, SCIFA4_RTS_MARK, M03_BERCLK_MARK, - XCTS1_MARK, SCIFA4_CTS_MARK, - PCMCLKO_MARK, - SYNC8KO_MARK, - - /* 55-2 */ - DNPCM_A_MARK, - UPPCM_A_MARK, - VACK_MARK, - XTALB1L_MARK, - GPS_AGC1_MARK, SCIFA0_RTS_MARK, - GPS_AGC4_MARK, SCIFA0_RXD_MARK, - GPS_PWRDOWN_MARK, SCIFA0_CTS_MARK, - GPS_IM_MARK, - GPS_IS_MARK, - GPS_QM_MARK, - GPS_QS_MARK, - FMSOCK_MARK, PORT49_IRDA_OUT_MARK, PORT49_IROUT_MARK, - FMSOOLR_MARK, BBIF2_TSYNC2_MARK, TPU2TO2_MARK, IPORT3_MARK, - FMSIOLR_MARK, - FMSOOBT_MARK, BBIF2_TSCK2_MARK, TPU2TO3_MARK, OPORT1_MARK, - FMSIOBT_MARK, - FMSOSLD_MARK, BBIF2_TXD2_MARK, OPORT2_MARK, - FMSOILR_MARK, PORT53_IRDA_IN_MARK, TPU3TO3_MARK, OPORT3_MARK, - FMSIILR_MARK, - FMSOIBT_MARK, PORT54_IRDA_FIRSEL_MARK, TPU3TO2_MARK, FMSIIBT_MARK, - FMSISLD_MARK, MFG0_OUT1_MARK, TPU0TO0_MARK, - A0_EA0_MARK, BS_MARK, - A12_EA12_MARK, PORT58_VIO_CKOR_MARK, TPU4TO2_MARK, - A13_EA13_MARK, PORT59_IROUT_MARK, MFG0_OUT2_MARK, TPU0TO1_MARK, - A14_EA14_MARK, PORT60_KEYOUT5_MARK, - A15_EA15_MARK, PORT61_KEYOUT4_MARK, - A16_EA16_MARK, PORT62_KEYOUT3_MARK, MSIOF0_SS1_MARK, - A17_EA17_MARK, PORT63_KEYOUT2_MARK, MSIOF0_TSYNC_MARK, - A18_EA18_MARK, PORT64_KEYOUT1_MARK, MSIOF0_TSCK_MARK, - A19_EA19_MARK, PORT65_KEYOUT0_MARK, MSIOF0_TXD_MARK, - A20_EA20_MARK, PORT66_KEYIN0_MARK, MSIOF0_RSCK_MARK, - A21_EA21_MARK, PORT67_KEYIN1_MARK, MSIOF0_RSYNC_MARK, - A22_EA22_MARK, PORT68_KEYIN2_MARK, MSIOF0_MCK0_MARK, - A23_EA23_MARK, PORT69_KEYIN3_MARK, MSIOF0_MCK1_MARK, - A24_EA24_MARK, PORT70_KEYIN4_MARK, MSIOF0_RXD_MARK, - A25_EA25_MARK, PORT71_KEYIN5_MARK, MSIOF0_SS2_MARK, - A26_MARK, PORT72_KEYIN6_MARK, - D0_ED0_NAF0_MARK, - D1_ED1_NAF1_MARK, - D2_ED2_NAF2_MARK, - D3_ED3_NAF3_MARK, - D4_ED4_NAF4_MARK, - D5_ED5_NAF5_MARK, - D6_ED6_NAF6_MARK, - D7_ED7_NAF7_MARK, - D8_ED8_NAF8_MARK, - D9_ED9_NAF9_MARK, - D10_ED10_NAF10_MARK, - D11_ED11_NAF11_MARK, - D12_ED12_NAF12_MARK, - D13_ED13_NAF13_MARK, - D14_ED14_NAF14_MARK, - D15_ED15_NAF15_MARK, - CS4_MARK, - CS5A_MARK, FMSICK_MARK, - CS5B_MARK, FCE1_MARK, - - /* 55-3 */ - CS6B_MARK, XCS2_MARK, CS6A_MARK, DACK0_MARK, - FCE0_MARK, - WAIT_MARK, DREQ0_MARK, - RD_XRD_MARK, - WE0_XWR0_FWE_MARK, - WE1_XWR1_MARK, - FRB_MARK, - CKO_MARK, - NBRSTOUT_MARK, - NBRST_MARK, - GPS_EPPSIN_MARK, - LATCHPULSE_MARK, - LTESIGNAL_MARK, - LEGACYSTATE_MARK, - TCKON_MARK, - VIO_VD_MARK, PORT128_KEYOUT0_MARK, IPORT0_MARK, - VIO_HD_MARK, PORT129_KEYOUT1_MARK, IPORT1_MARK, - VIO_D0_MARK, PORT130_KEYOUT2_MARK, PORT130_MSIOF2_RXD_MARK, - VIO_D1_MARK, PORT131_KEYOUT3_MARK, PORT131_MSIOF2_SS1_MARK, - VIO_D2_MARK, PORT132_KEYOUT4_MARK, PORT132_MSIOF2_SS2_MARK, - VIO_D3_MARK, PORT133_KEYOUT5_MARK, PORT133_MSIOF2_TSYNC_MARK, - VIO_D4_MARK, PORT134_KEYIN0_MARK, PORT134_MSIOF2_TXD_MARK, - VIO_D5_MARK, PORT135_KEYIN1_MARK, PORT135_MSIOF2_TSCK_MARK, - VIO_D6_MARK, PORT136_KEYIN2_MARK, - VIO_D7_MARK, PORT137_KEYIN3_MARK, - VIO_D8_MARK, M9_SLCD_A01_MARK, PORT138_FSIAOMC_MARK, - VIO_D9_MARK, M10_SLCD_CK1_MARK, PORT139_FSIAOLR_MARK, - VIO_D10_MARK, M11_SLCD_SO1_MARK, TPU0TO2_MARK, PORT140_FSIAOBT_MARK, - VIO_D11_MARK, M12_SLCD_CE1_MARK, TPU0TO3_MARK, PORT141_FSIAOSLD_MARK, - VIO_D12_MARK, M13_BSW_MARK, PORT142_FSIACK_MARK, - VIO_D13_MARK, M14_GSW_MARK, PORT143_FSIAILR_MARK, - VIO_D14_MARK, M15_RSW_MARK, PORT144_FSIAIBT_MARK, - VIO_D15_MARK, TPU1TO3_MARK, PORT145_FSIAISLD_MARK, - VIO_CLK_MARK, PORT146_KEYIN4_MARK, IPORT2_MARK, - VIO_FIELD_MARK, PORT147_KEYIN5_MARK, - VIO_CKO_MARK, PORT148_KEYIN6_MARK, - A27_MARK, RDWR_XWE_MARK, MFG0_IN1_MARK, - MFG0_IN2_MARK, - TS_SPSYNC3_MARK, MSIOF2_RSCK_MARK, - TS_SDAT3_MARK, MSIOF2_RSYNC_MARK, - TPU1TO2_MARK, TS_SDEN3_MARK, PORT153_MSIOF2_SS1_MARK, - SOUT3_MARK, SCIFA2_TXD1_MARK, MSIOF2_MCK0_MARK, - SIN3_MARK, SCIFA2_RXD1_MARK, MSIOF2_MCK1_MARK, - XRTS3_MARK, SCIFA2_RTS1_MARK, PORT156_MSIOF2_SS2_MARK, - XCTS3_MARK, SCIFA2_CTS1_MARK, PORT157_MSIOF2_RXD_MARK, - - /* 55-4 */ - DINT_MARK, SCIFA2_SCK1_MARK, TS_SCK3_MARK, - PORT159_SCIFB_SCK_MARK, PORT159_SCIFA5_SCK_MARK, NMI_MARK, - PORT160_SCIFB_TXD_MARK, PORT160_SCIFA5_TXD_MARK, SOUT0_MARK, - PORT161_SCIFB_CTS_MARK, PORT161_SCIFA5_CTS_MARK, XCTS0_MARK, - MFG3_IN2_MARK, - PORT162_SCIFB_RXD_MARK, PORT162_SCIFA5_RXD_MARK, SIN0_MARK, - MFG3_IN1_MARK, - PORT163_SCIFB_RTS_MARK, PORT163_SCIFA5_RTS_MARK, XRTS0_MARK, - MFG3_OUT1_MARK, TPU3TO0_MARK, - LCDD0_MARK, PORT192_KEYOUT0_MARK, EXT_CKI_MARK, - LCDD1_MARK, PORT193_KEYOUT1_MARK, PORT193_SCIFA5_CTS_MARK, - BBIF2_TSYNC1_MARK, - LCDD2_MARK, PORT194_KEYOUT2_MARK, PORT194_SCIFA5_RTS_MARK, - BBIF2_TSCK1_MARK, - LCDD3_MARK, PORT195_KEYOUT3_MARK, PORT195_SCIFA5_RXD_MARK, - BBIF2_TXD1_MARK, - LCDD4_MARK, PORT196_KEYOUT4_MARK, PORT196_SCIFA5_TXD_MARK, - LCDD5_MARK, PORT197_KEYOUT5_MARK, PORT197_SCIFA5_SCK_MARK, - MFG2_OUT2_MARK, - TPU2TO1_MARK, - LCDD6_MARK, XWR2_MARK, - LCDD7_MARK, TPU4TO1_MARK, MFG4_OUT2_MARK, XWR3_MARK, - LCDD8_MARK, PORT200_KEYIN0_MARK, VIO_DR0_MARK, D16_MARK, ED16_MARK, - LCDD9_MARK, PORT201_KEYIN1_MARK, VIO_DR1_MARK, D17_MARK, ED17_MARK, - LCDD10_MARK, PORT202_KEYIN2_MARK, VIO_DR2_MARK, D18_MARK, ED18_MARK, - LCDD11_MARK, PORT203_KEYIN3_MARK, VIO_DR3_MARK, D19_MARK, ED19_MARK, - LCDD12_MARK, PORT204_KEYIN4_MARK, VIO_DR4_MARK, D20_MARK, ED20_MARK, - LCDD13_MARK, PORT205_KEYIN5_MARK, VIO_DR5_MARK, D21_MARK, ED21_MARK, - LCDD14_MARK, PORT206_KEYIN6_MARK, VIO_DR6_MARK, D22_MARK, ED22_MARK, - LCDD15_MARK, PORT207_MSIOF0L_SS1_MARK, PORT207_KEYOUT0_MARK, - VIO_DR7_MARK, D23_MARK, ED23_MARK, - LCDD16_MARK, PORT208_MSIOF0L_SS2_MARK, PORT208_KEYOUT1_MARK, - VIO_VDR_MARK, D24_MARK, ED24_MARK, - LCDD17_MARK, PORT209_KEYOUT2_MARK, VIO_HDR_MARK, D25_MARK, ED25_MARK, - LCDD18_MARK, DREQ2_MARK, PORT210_MSIOF0L_SS1_MARK, D26_MARK, ED26_MARK, - LCDD19_MARK, PORT211_MSIOF0L_SS2_MARK, D27_MARK, ED27_MARK, - LCDD20_MARK, TS_SPSYNC1_MARK, MSIOF0L_MCK0_MARK, D28_MARK, ED28_MARK, - LCDD21_MARK, TS_SDAT1_MARK, MSIOF0L_MCK1_MARK, D29_MARK, ED29_MARK, - LCDD22_MARK, TS_SDEN1_MARK, MSIOF0L_RSCK_MARK, D30_MARK, ED30_MARK, - LCDD23_MARK, TS_SCK1_MARK, MSIOF0L_RSYNC_MARK, D31_MARK, ED31_MARK, - LCDDCK_MARK, LCDWR_MARK, PORT216_KEYOUT3_MARK, VIO_CLKR_MARK, - LCDRD_MARK, DACK2_MARK, MSIOF0L_TSYNC_MARK, - LCDHSYN_MARK, LCDCS_MARK, LCDCS2_MARK, DACK3_MARK, - PORT218_VIO_CKOR_MARK, PORT218_KEYOUT4_MARK, - LCDDISP_MARK, LCDRS_MARK, DREQ3_MARK, MSIOF0L_TSCK_MARK, - LCDVSYN_MARK, LCDVSYN2_MARK, PORT220_KEYOUT5_MARK, - LCDLCLK_MARK, DREQ1_MARK, PWEN_MARK, MSIOF0L_RXD_MARK, - LCDDON_MARK, LCDDON2_MARK, DACK1_MARK, OVCN_MARK, MSIOF0L_TXD_MARK, - SCIFA1_TXD_MARK, OVCN2_MARK, - EXTLP_MARK, SCIFA1_SCK_MARK, USBTERM_MARK, PORT226_VIO_CKO2_MARK, - SCIFA1_RTS_MARK, IDIN_MARK, - SCIFA1_RXD_MARK, - SCIFA1_CTS_MARK, MFG1_IN1_MARK, - MSIOF1_TXD_MARK, SCIFA2_TXD2_MARK, PORT230_FSIAOMC_MARK, - MSIOF1_TSYNC_MARK, SCIFA2_CTS2_MARK, PORT231_FSIAOLR_MARK, - MSIOF1_TSCK_MARK, SCIFA2_SCK2_MARK, PORT232_FSIAOBT_MARK, - MSIOF1_RXD_MARK, SCIFA2_RXD2_MARK, GPS_VCOTRIG_MARK, - PORT233_FSIACK_MARK, - MSIOF1_RSCK_MARK, SCIFA2_RTS2_MARK, PORT234_FSIAOSLD_MARK, - MSIOF1_RSYNC_MARK, OPORT0_MARK, MFG1_IN2_MARK, PORT235_FSIAILR_MARK, - MSIOF1_MCK0_MARK, I2C_SDA2_MARK, PORT236_FSIAIBT_MARK, - MSIOF1_MCK1_MARK, I2C_SCL2_MARK, PORT237_FSIAISLD_MARK, - MSIOF1_SS1_MARK, EDBGREQ3_MARK, - - /* 55-5 */ - MSIOF1_SS2_MARK, - SCIFA6_TXD_MARK, - PORT241_IRDA_OUT_MARK, PORT241_IROUT_MARK, MFG4_OUT1_MARK, - TPU4TO0_MARK, - PORT242_IRDA_IN_MARK, MFG4_IN2_MARK, - PORT243_IRDA_FIRSEL_MARK, PORT243_VIO_CKO2_MARK, - PORT244_SCIFA5_CTS_MARK, MFG2_IN1_MARK, PORT244_SCIFB_CTS_MARK, - PORT244_MSIOF2_RXD_MARK, - PORT245_SCIFA5_RTS_MARK, MFG2_IN2_MARK, PORT245_SCIFB_RTS_MARK, - PORT245_MSIOF2_TXD_MARK, - PORT246_SCIFA5_RXD_MARK, MFG1_OUT1_MARK, PORT246_SCIFB_RXD_MARK, - TPU1TO0_MARK, - PORT247_SCIFA5_TXD_MARK, MFG3_OUT2_MARK, PORT247_SCIFB_TXD_MARK, - TPU3TO1_MARK, - PORT248_SCIFA5_SCK_MARK, MFG2_OUT1_MARK, PORT248_SCIFB_SCK_MARK, - TPU2TO0_MARK, - PORT248_MSIOF2_TSCK_MARK, - PORT249_IROUT_MARK, MFG4_IN1_MARK, PORT249_MSIOF2_TSYNC_MARK, - SDHICLK0_MARK, TCK2_SWCLK_MC0_MARK, - SDHICD0_MARK, - SDHID0_0_MARK, TMS2_SWDIO_MC0_MARK, - SDHID0_1_MARK, TDO2_SWO0_MC0_MARK, - SDHID0_2_MARK, TDI2_MARK, - SDHID0_3_MARK, RTCK2_SWO1_MC0_MARK, - SDHICMD0_MARK, TRST2_MARK, - SDHIWP0_MARK, EDBGREQ2_MARK, - SDHICLK1_MARK, TCK3_SWCLK_MC1_MARK, - SDHID1_0_MARK, M11_SLCD_SO2_MARK, TS_SPSYNC2_MARK, - TMS3_SWDIO_MC1_MARK, - SDHID1_1_MARK, M9_SLCD_A02_MARK, TS_SDAT2_MARK, TDO3_SWO0_MC1_MARK, - SDHID1_2_MARK, M10_SLCD_CK2_MARK, TS_SDEN2_MARK, TDI3_MARK, - SDHID1_3_MARK, M12_SLCD_CE2_MARK, TS_SCK2_MARK, RTCK3_SWO1_MC1_MARK, - SDHICMD1_MARK, TRST3_MARK, - RESETOUTS_MARK, - PINMUX_MARK_END, -}; - -static pinmux_enum_t pinmux_data[] = { - /* specify valid pin states for each pin in GPIO mode */ - /* 55-1 (GPIO) */ - PORT_DATA_I_PD(0), PORT_DATA_I_PU(1), - PORT_DATA_I_PU(2), PORT_DATA_I_PU(3), - PORT_DATA_I_PU(4), PORT_DATA_I_PU(5), - PORT_DATA_I_PU(6), PORT_DATA_I_PU(7), - PORT_DATA_I_PU(8), PORT_DATA_I_PU(9), - PORT_DATA_I_PU(10), PORT_DATA_I_PU(11), - PORT_DATA_IO_PU(12), PORT_DATA_IO_PU(13), - PORT_DATA_IO_PU_PD(14), PORT_DATA_IO_PU_PD(15), - PORT_DATA_O(16), PORT_DATA_IO(17), - PORT_DATA_O(18), PORT_DATA_O(19), - PORT_DATA_O(20), PORT_DATA_O(21), - PORT_DATA_O(22), PORT_DATA_O(23), - PORT_DATA_O(24), PORT_DATA_I_PD(25), - PORT_DATA_I_PD(26), PORT_DATA_O(27), - PORT_DATA_O(28), PORT_DATA_O(29), - PORT_DATA_IO(30), PORT_DATA_IO_PU(31), - PORT_DATA_IO_PD(32), PORT_DATA_I_PU(33), - PORT_DATA_IO_PD(34), PORT_DATA_I_PU_PD(35), - PORT_DATA_O(36), PORT_DATA_IO(37), - - /* 55-2 (GPIO) */ - PORT_DATA_O(38), PORT_DATA_I_PU(39), - PORT_DATA_I_PU_PD(40), PORT_DATA_O(41), - PORT_DATA_IO_PD(42), PORT_DATA_IO_PD(43), - PORT_DATA_IO_PD(44), PORT_DATA_I_PD(45), - PORT_DATA_I_PD(46), PORT_DATA_I_PD(47), - PORT_DATA_I_PD(48), PORT_DATA_IO_PU_PD(49), - PORT_DATA_IO_PD(50), PORT_DATA_IO_PD(51), - PORT_DATA_O(52), PORT_DATA_IO_PU_PD(53), - PORT_DATA_IO_PU_PD(54), PORT_DATA_IO_PD(55), - PORT_DATA_I_PU_PD(56), PORT_DATA_IO(57), - PORT_DATA_IO(58), PORT_DATA_IO(59), - PORT_DATA_IO(60), PORT_DATA_IO(61), - PORT_DATA_IO_PD(62), PORT_DATA_IO_PD(63), - PORT_DATA_IO_PD(64), PORT_DATA_IO_PD(65), - PORT_DATA_IO_PU_PD(66), PORT_DATA_IO_PU_PD(67), - PORT_DATA_IO_PU_PD(68), PORT_DATA_IO_PU_PD(69), - PORT_DATA_IO_PU_PD(70), PORT_DATA_IO_PU_PD(71), - PORT_DATA_IO_PU_PD(72), PORT_DATA_I_PU_PD(73), - PORT_DATA_IO_PU(74), PORT_DATA_IO_PU(75), - PORT_DATA_IO_PU(76), PORT_DATA_IO_PU(77), - PORT_DATA_IO_PU(78), PORT_DATA_IO_PU(79), - PORT_DATA_IO_PU(80), PORT_DATA_IO_PU(81), - PORT_DATA_IO_PU(82), PORT_DATA_IO_PU(83), - PORT_DATA_IO_PU(84), PORT_DATA_IO_PU(85), - PORT_DATA_IO_PU(86), PORT_DATA_IO_PU(87), - PORT_DATA_IO_PU(88), PORT_DATA_IO_PU(89), - PORT_DATA_O(90), PORT_DATA_IO_PU(91), - PORT_DATA_O(92), - - /* 55-3 (GPIO) */ - PORT_DATA_IO_PU(93), - PORT_DATA_O(94), - PORT_DATA_I_PU_PD(95), - PORT_DATA_IO(96), PORT_DATA_IO(97), - PORT_DATA_IO(98), PORT_DATA_I_PU(99), - PORT_DATA_O(100), PORT_DATA_O(101), - PORT_DATA_I_PU(102), PORT_DATA_IO_PD(103), - PORT_DATA_I_PD(104), PORT_DATA_I_PD(105), - PORT_DATA_I_PD(106), PORT_DATA_I_PD(107), - PORT_DATA_I_PD(108), PORT_DATA_IO_PD(109), - PORT_DATA_IO_PD(110), PORT_DATA_I_PD(111), - PORT_DATA_IO_PD(112), PORT_DATA_IO_PD(113), - PORT_DATA_IO_PD(114), PORT_DATA_I_PD(115), - PORT_DATA_I_PD(116), PORT_DATA_IO_PD(117), - PORT_DATA_I_PD(118), PORT_DATA_IO_PD(128), - PORT_DATA_IO_PD(129), PORT_DATA_IO_PD(130), - PORT_DATA_IO_PD(131), PORT_DATA_IO_PD(132), - PORT_DATA_IO_PD(133), PORT_DATA_IO_PU_PD(134), - PORT_DATA_IO_PU_PD(135), PORT_DATA_IO_PU_PD(136), - PORT_DATA_IO_PU_PD(137), PORT_DATA_IO_PD(138), - PORT_DATA_IO_PD(139), PORT_DATA_IO_PD(140), - PORT_DATA_IO_PD(141), PORT_DATA_IO_PD(142), - PORT_DATA_IO_PD(143), PORT_DATA_IO_PU_PD(144), - PORT_DATA_IO_PD(145), PORT_DATA_IO_PU_PD(146), - PORT_DATA_IO_PU_PD(147), PORT_DATA_IO_PU_PD(148), - PORT_DATA_IO_PU_PD(149), PORT_DATA_I_PD(150), - PORT_DATA_IO_PU_PD(151), PORT_DATA_IO_PD(152), - PORT_DATA_IO_PD(153), PORT_DATA_IO_PD(154), - PORT_DATA_I_PD(155), PORT_DATA_IO_PU_PD(156), - PORT_DATA_I_PD(157), PORT_DATA_IO_PD(158), - - /* 55-4 (GPIO) */ - PORT_DATA_IO_PU_PD(159), PORT_DATA_IO_PU_PD(160), - PORT_DATA_I_PU_PD(161), PORT_DATA_I_PU_PD(162), - PORT_DATA_IO_PU_PD(163), PORT_DATA_I_PU_PD(164), - PORT_DATA_IO_PD(192), PORT_DATA_IO_PD(193), - PORT_DATA_IO_PD(194), PORT_DATA_IO_PD(195), - PORT_DATA_IO_PD(196), PORT_DATA_IO_PD(197), - PORT_DATA_IO_PD(198), PORT_DATA_IO_PD(199), - PORT_DATA_IO_PU_PD(200), PORT_DATA_IO_PU_PD(201), - PORT_DATA_IO_PU_PD(202), PORT_DATA_IO_PU_PD(203), - PORT_DATA_IO_PU_PD(204), PORT_DATA_IO_PU_PD(205), - PORT_DATA_IO_PU_PD(206), PORT_DATA_IO_PD(207), - PORT_DATA_IO_PD(208), PORT_DATA_IO_PD(209), - PORT_DATA_IO_PD(210), PORT_DATA_IO_PD(211), - PORT_DATA_IO_PD(212), PORT_DATA_IO_PD(213), - PORT_DATA_IO_PD(214), PORT_DATA_IO_PD(215), - PORT_DATA_IO_PD(216), PORT_DATA_IO_PD(217), - PORT_DATA_O(218), PORT_DATA_IO_PD(219), - PORT_DATA_IO_PD(220), PORT_DATA_IO_PD(221), - PORT_DATA_IO_PU_PD(222), - PORT_DATA_I_PU_PD(223), PORT_DATA_I_PU_PD(224), - PORT_DATA_IO_PU_PD(225), PORT_DATA_O(226), - PORT_DATA_IO_PU_PD(227), PORT_DATA_I_PD(228), - PORT_DATA_I_PD(229), PORT_DATA_IO(230), - PORT_DATA_IO_PD(231), PORT_DATA_IO_PU_PD(232), - PORT_DATA_I_PD(233), PORT_DATA_IO_PU_PD(234), - PORT_DATA_IO_PU_PD(235), PORT_DATA_IO_PU_PD(236), - PORT_DATA_IO_PD(237), PORT_DATA_IO_PU_PD(238), - - /* 55-5 (GPIO) */ - PORT_DATA_IO_PU_PD(239), PORT_DATA_IO_PU_PD(240), - PORT_DATA_O(241), PORT_DATA_I_PD(242), - PORT_DATA_IO_PU_PD(243), PORT_DATA_IO_PU_PD(244), - PORT_DATA_IO_PU_PD(245), PORT_DATA_IO_PU_PD(246), - PORT_DATA_IO_PU_PD(247), PORT_DATA_IO_PU_PD(248), - PORT_DATA_IO_PU_PD(249), PORT_DATA_IO_PD(250), - PORT_DATA_IO_PU_PD(251), PORT_DATA_IO_PU_PD(252), - PORT_DATA_IO_PU_PD(253), PORT_DATA_IO_PU_PD(254), - PORT_DATA_IO_PU_PD(255), PORT_DATA_IO_PU_PD(256), - PORT_DATA_IO_PU_PD(257), PORT_DATA_IO_PD(258), - PORT_DATA_IO_PU_PD(259), PORT_DATA_IO_PU_PD(260), - PORT_DATA_IO_PU_PD(261), PORT_DATA_IO_PU_PD(262), - PORT_DATA_IO_PU_PD(263), - - /* Special Pull-up / Pull-down Functions */ - PINMUX_DATA(PORT66_KEYIN0_PU_MARK, MSELBCR_MSEL17_0, MSELBCR_MSEL16_0, - PORT66_FN2, PORT66_IN_PU), - PINMUX_DATA(PORT67_KEYIN1_PU_MARK, MSELBCR_MSEL17_0, MSELBCR_MSEL16_0, - PORT67_FN2, PORT67_IN_PU), - PINMUX_DATA(PORT68_KEYIN2_PU_MARK, MSELBCR_MSEL17_0, MSELBCR_MSEL16_0, - PORT68_FN2, PORT68_IN_PU), - PINMUX_DATA(PORT69_KEYIN3_PU_MARK, MSELBCR_MSEL17_0, MSELBCR_MSEL16_0, - PORT69_FN2, PORT69_IN_PU), - PINMUX_DATA(PORT70_KEYIN4_PU_MARK, MSELBCR_MSEL17_0, MSELBCR_MSEL16_0, - PORT70_FN2, PORT70_IN_PU), - PINMUX_DATA(PORT71_KEYIN5_PU_MARK, MSELBCR_MSEL17_0, MSELBCR_MSEL16_0, - PORT71_FN2, PORT71_IN_PU), - PINMUX_DATA(PORT72_KEYIN6_PU_MARK, MSELBCR_MSEL17_0, MSELBCR_MSEL16_0, - PORT72_FN2, PORT72_IN_PU), - - - /* 55-1 (FN) */ - PINMUX_DATA(VBUS_0_MARK, PORT0_FN1), - PINMUX_DATA(CPORT0_MARK, PORT1_FN1), - PINMUX_DATA(CPORT1_MARK, PORT2_FN1), - PINMUX_DATA(CPORT2_MARK, PORT3_FN1), - PINMUX_DATA(CPORT3_MARK, PORT4_FN1), - PINMUX_DATA(CPORT4_MARK, PORT5_FN1), - PINMUX_DATA(CPORT5_MARK, PORT6_FN1), - PINMUX_DATA(CPORT6_MARK, PORT7_FN1), - PINMUX_DATA(CPORT7_MARK, PORT8_FN1), - PINMUX_DATA(CPORT8_MARK, PORT9_FN1), - PINMUX_DATA(CPORT9_MARK, PORT10_FN1), - PINMUX_DATA(CPORT10_MARK, PORT11_FN1), - PINMUX_DATA(CPORT11_MARK, PORT12_FN1), - PINMUX_DATA(SIN2_MARK, PORT12_FN2), - PINMUX_DATA(CPORT12_MARK, PORT13_FN1), - PINMUX_DATA(XCTS2_MARK, PORT13_FN2), - PINMUX_DATA(CPORT13_MARK, PORT14_FN1), - PINMUX_DATA(RFSPO4_MARK, PORT14_FN2), - PINMUX_DATA(CPORT14_MARK, PORT15_FN1), - PINMUX_DATA(RFSPO5_MARK, PORT15_FN2), - PINMUX_DATA(CPORT15_MARK, PORT16_FN1), - PINMUX_DATA(SCIFA0_SCK_MARK, PORT16_FN2), - PINMUX_DATA(GPS_AGC2_MARK, PORT16_FN3), - PINMUX_DATA(CPORT16_MARK, PORT17_FN1), - PINMUX_DATA(SCIFA0_TXD_MARK, PORT17_FN2), - PINMUX_DATA(GPS_AGC3_MARK, PORT17_FN3), - PINMUX_DATA(CPORT17_IC_OE_MARK, PORT18_FN1), - PINMUX_DATA(SOUT2_MARK, PORT18_FN2), - PINMUX_DATA(CPORT18_MARK, PORT19_FN1), - PINMUX_DATA(XRTS2_MARK, PORT19_FN2), - PINMUX_DATA(PORT19_VIO_CKO2_MARK, PORT19_FN3), - PINMUX_DATA(CPORT19_MPORT1_MARK, PORT20_FN1), - PINMUX_DATA(CPORT20_MARK, PORT21_FN1), - PINMUX_DATA(RFSPO6_MARK, PORT21_FN2), - PINMUX_DATA(CPORT21_MARK, PORT22_FN1), - PINMUX_DATA(STATUS0_MARK, PORT22_FN2), - PINMUX_DATA(CPORT22_MARK, PORT23_FN1), - PINMUX_DATA(STATUS1_MARK, PORT23_FN2), - PINMUX_DATA(CPORT23_MARK, PORT24_FN1), - PINMUX_DATA(STATUS2_MARK, PORT24_FN2), - PINMUX_DATA(RFSPO7_MARK, PORT24_FN3), - PINMUX_DATA(B_SYNLD1_MARK, PORT25_FN1), - PINMUX_DATA(B_SYNLD2_MARK, PORT26_FN1), - PINMUX_DATA(SYSENMSK_MARK, PORT26_FN2), - PINMUX_DATA(XMAINPS_MARK, PORT27_FN1), - PINMUX_DATA(XDIVPS_MARK, PORT28_FN1), - PINMUX_DATA(XIDRST_MARK, PORT29_FN1), - PINMUX_DATA(IDCLK_MARK, PORT30_FN1), - PINMUX_DATA(IC_DP_MARK, PORT30_FN2), - PINMUX_DATA(IDIO_MARK, PORT31_FN1), - PINMUX_DATA(IC_DM_MARK, PORT31_FN2), - PINMUX_DATA(SOUT1_MARK, PORT32_FN1), - PINMUX_DATA(SCIFA4_TXD_MARK, PORT32_FN2), - PINMUX_DATA(M02_BERDAT_MARK, PORT32_FN3), - PINMUX_DATA(SIN1_MARK, PORT33_FN1), - PINMUX_DATA(SCIFA4_RXD_MARK, PORT33_FN2), - PINMUX_DATA(XWUP_MARK, PORT33_FN3), - PINMUX_DATA(XRTS1_MARK, PORT34_FN1), - PINMUX_DATA(SCIFA4_RTS_MARK, PORT34_FN2), - PINMUX_DATA(M03_BERCLK_MARK, PORT34_FN3), - PINMUX_DATA(XCTS1_MARK, PORT35_FN1), - PINMUX_DATA(SCIFA4_CTS_MARK, PORT35_FN2), - PINMUX_DATA(PCMCLKO_MARK, PORT36_FN1), - PINMUX_DATA(SYNC8KO_MARK, PORT37_FN1), - - /* 55-2 (FN) */ - PINMUX_DATA(DNPCM_A_MARK, PORT38_FN1), - PINMUX_DATA(UPPCM_A_MARK, PORT39_FN1), - PINMUX_DATA(VACK_MARK, PORT40_FN1), - PINMUX_DATA(XTALB1L_MARK, PORT41_FN1), - PINMUX_DATA(GPS_AGC1_MARK, PORT42_FN1), - PINMUX_DATA(SCIFA0_RTS_MARK, PORT42_FN2), - PINMUX_DATA(GPS_AGC4_MARK, PORT43_FN1), - PINMUX_DATA(SCIFA0_RXD_MARK, PORT43_FN2), - PINMUX_DATA(GPS_PWRDOWN_MARK, PORT44_FN1), - PINMUX_DATA(SCIFA0_CTS_MARK, PORT44_FN2), - PINMUX_DATA(GPS_IM_MARK, PORT45_FN1), - PINMUX_DATA(GPS_IS_MARK, PORT46_FN1), - PINMUX_DATA(GPS_QM_MARK, PORT47_FN1), - PINMUX_DATA(GPS_QS_MARK, PORT48_FN1), - PINMUX_DATA(FMSOCK_MARK, PORT49_FN1), - PINMUX_DATA(PORT49_IRDA_OUT_MARK, PORT49_FN2), - PINMUX_DATA(PORT49_IROUT_MARK, PORT49_FN3), - PINMUX_DATA(FMSOOLR_MARK, PORT50_FN1), - PINMUX_DATA(BBIF2_TSYNC2_MARK, PORT50_FN2), - PINMUX_DATA(TPU2TO2_MARK, PORT50_FN3), - PINMUX_DATA(IPORT3_MARK, PORT50_FN4), - PINMUX_DATA(FMSIOLR_MARK, PORT50_FN5), - PINMUX_DATA(FMSOOBT_MARK, PORT51_FN1), - PINMUX_DATA(BBIF2_TSCK2_MARK, PORT51_FN2), - PINMUX_DATA(TPU2TO3_MARK, PORT51_FN3), - PINMUX_DATA(OPORT1_MARK, PORT51_FN4), - PINMUX_DATA(FMSIOBT_MARK, PORT51_FN5), - PINMUX_DATA(FMSOSLD_MARK, PORT52_FN1), - PINMUX_DATA(BBIF2_TXD2_MARK, PORT52_FN2), - PINMUX_DATA(OPORT2_MARK, PORT52_FN3), - PINMUX_DATA(FMSOILR_MARK, PORT53_FN1), - PINMUX_DATA(PORT53_IRDA_IN_MARK, PORT53_FN2), - PINMUX_DATA(TPU3TO3_MARK, PORT53_FN3), - PINMUX_DATA(OPORT3_MARK, PORT53_FN4), - PINMUX_DATA(FMSIILR_MARK, PORT53_FN5), - PINMUX_DATA(FMSOIBT_MARK, PORT54_FN1), - PINMUX_DATA(PORT54_IRDA_FIRSEL_MARK, PORT54_FN2), - PINMUX_DATA(TPU3TO2_MARK, PORT54_FN3), - PINMUX_DATA(FMSIIBT_MARK, PORT54_FN4), - PINMUX_DATA(FMSISLD_MARK, PORT55_FN1), - PINMUX_DATA(MFG0_OUT1_MARK, PORT55_FN2), - PINMUX_DATA(TPU0TO0_MARK, PORT55_FN3), - PINMUX_DATA(A0_EA0_MARK, PORT57_FN1), - PINMUX_DATA(BS_MARK, PORT57_FN2), - PINMUX_DATA(A12_EA12_MARK, PORT58_FN1), - PINMUX_DATA(PORT58_VIO_CKOR_MARK, PORT58_FN2), - PINMUX_DATA(TPU4TO2_MARK, PORT58_FN3), - PINMUX_DATA(A13_EA13_MARK, PORT59_FN1), - PINMUX_DATA(PORT59_IROUT_MARK, PORT59_FN2), - PINMUX_DATA(MFG0_OUT2_MARK, PORT59_FN3), - PINMUX_DATA(TPU0TO1_MARK, PORT59_FN4), - PINMUX_DATA(A14_EA14_MARK, PORT60_FN1), - PINMUX_DATA(PORT60_KEYOUT5_MARK, PORT60_FN2), - PINMUX_DATA(A15_EA15_MARK, PORT61_FN1), - PINMUX_DATA(PORT61_KEYOUT4_MARK, PORT61_FN2), - PINMUX_DATA(A16_EA16_MARK, PORT62_FN1), - PINMUX_DATA(PORT62_KEYOUT3_MARK, PORT62_FN2), - PINMUX_DATA(MSIOF0_SS1_MARK, PORT62_FN3), - PINMUX_DATA(A17_EA17_MARK, PORT63_FN1), - PINMUX_DATA(PORT63_KEYOUT2_MARK, PORT63_FN2), - PINMUX_DATA(MSIOF0_TSYNC_MARK, PORT63_FN3), - PINMUX_DATA(A18_EA18_MARK, PORT64_FN1), - PINMUX_DATA(PORT64_KEYOUT1_MARK, PORT64_FN2), - PINMUX_DATA(MSIOF0_TSCK_MARK, PORT64_FN3), - PINMUX_DATA(A19_EA19_MARK, PORT65_FN1), - PINMUX_DATA(PORT65_KEYOUT0_MARK, PORT65_FN2), - PINMUX_DATA(MSIOF0_TXD_MARK, PORT65_FN3), - PINMUX_DATA(A20_EA20_MARK, PORT66_FN1), - PINMUX_DATA(PORT66_KEYIN0_MARK, PORT66_FN2), - PINMUX_DATA(MSIOF0_RSCK_MARK, PORT66_FN3), - PINMUX_DATA(A21_EA21_MARK, PORT67_FN1), - PINMUX_DATA(PORT67_KEYIN1_MARK, PORT67_FN2), - PINMUX_DATA(MSIOF0_RSYNC_MARK, PORT67_FN3), - PINMUX_DATA(A22_EA22_MARK, PORT68_FN1), - PINMUX_DATA(PORT68_KEYIN2_MARK, PORT68_FN2), - PINMUX_DATA(MSIOF0_MCK0_MARK, PORT68_FN3), - PINMUX_DATA(A23_EA23_MARK, PORT69_FN1), - PINMUX_DATA(PORT69_KEYIN3_MARK, PORT69_FN2), - PINMUX_DATA(MSIOF0_MCK1_MARK, PORT69_FN3), - PINMUX_DATA(A24_EA24_MARK, PORT70_FN1), - PINMUX_DATA(PORT70_KEYIN4_MARK, PORT70_FN2), - PINMUX_DATA(MSIOF0_RXD_MARK, PORT70_FN3), - PINMUX_DATA(A25_EA25_MARK, PORT71_FN1), - PINMUX_DATA(PORT71_KEYIN5_MARK, PORT71_FN2), - PINMUX_DATA(MSIOF0_SS2_MARK, PORT71_FN3), - PINMUX_DATA(A26_MARK, PORT72_FN1), - PINMUX_DATA(PORT72_KEYIN6_MARK, PORT72_FN2), - PINMUX_DATA(D0_ED0_NAF0_MARK, PORT74_FN1), - PINMUX_DATA(D1_ED1_NAF1_MARK, PORT75_FN1), - PINMUX_DATA(D2_ED2_NAF2_MARK, PORT76_FN1), - PINMUX_DATA(D3_ED3_NAF3_MARK, PORT77_FN1), - PINMUX_DATA(D4_ED4_NAF4_MARK, PORT78_FN1), - PINMUX_DATA(D5_ED5_NAF5_MARK, PORT79_FN1), - PINMUX_DATA(D6_ED6_NAF6_MARK, PORT80_FN1), - PINMUX_DATA(D7_ED7_NAF7_MARK, PORT81_FN1), - PINMUX_DATA(D8_ED8_NAF8_MARK, PORT82_FN1), - PINMUX_DATA(D9_ED9_NAF9_MARK, PORT83_FN1), - PINMUX_DATA(D10_ED10_NAF10_MARK, PORT84_FN1), - PINMUX_DATA(D11_ED11_NAF11_MARK, PORT85_FN1), - PINMUX_DATA(D12_ED12_NAF12_MARK, PORT86_FN1), - PINMUX_DATA(D13_ED13_NAF13_MARK, PORT87_FN1), - PINMUX_DATA(D14_ED14_NAF14_MARK, PORT88_FN1), - PINMUX_DATA(D15_ED15_NAF15_MARK, PORT89_FN1), - PINMUX_DATA(CS4_MARK, PORT90_FN1), - PINMUX_DATA(CS5A_MARK, PORT91_FN1), - PINMUX_DATA(FMSICK_MARK, PORT91_FN2), - PINMUX_DATA(CS5B_MARK, PORT92_FN1), - PINMUX_DATA(FCE1_MARK, PORT92_FN2), - - /* 55-3 (FN) */ - PINMUX_DATA(CS6B_MARK, PORT93_FN1), - PINMUX_DATA(XCS2_MARK, PORT93_FN2), - PINMUX_DATA(CS6A_MARK, PORT93_FN3), - PINMUX_DATA(DACK0_MARK, PORT93_FN4), - PINMUX_DATA(FCE0_MARK, PORT94_FN1), - PINMUX_DATA(WAIT_MARK, PORT95_FN1), - PINMUX_DATA(DREQ0_MARK, PORT95_FN2), - PINMUX_DATA(RD_XRD_MARK, PORT96_FN1), - PINMUX_DATA(WE0_XWR0_FWE_MARK, PORT97_FN1), - PINMUX_DATA(WE1_XWR1_MARK, PORT98_FN1), - PINMUX_DATA(FRB_MARK, PORT99_FN1), - PINMUX_DATA(CKO_MARK, PORT100_FN1), - PINMUX_DATA(NBRSTOUT_MARK, PORT101_FN1), - PINMUX_DATA(NBRST_MARK, PORT102_FN1), - PINMUX_DATA(GPS_EPPSIN_MARK, PORT106_FN1), - PINMUX_DATA(LATCHPULSE_MARK, PORT110_FN1), - PINMUX_DATA(LTESIGNAL_MARK, PORT111_FN1), - PINMUX_DATA(LEGACYSTATE_MARK, PORT112_FN1), - PINMUX_DATA(TCKON_MARK, PORT118_FN1), - PINMUX_DATA(VIO_VD_MARK, PORT128_FN1), - PINMUX_DATA(PORT128_KEYOUT0_MARK, PORT128_FN2), - PINMUX_DATA(IPORT0_MARK, PORT128_FN3), - PINMUX_DATA(VIO_HD_MARK, PORT129_FN1), - PINMUX_DATA(PORT129_KEYOUT1_MARK, PORT129_FN2), - PINMUX_DATA(IPORT1_MARK, PORT129_FN3), - PINMUX_DATA(VIO_D0_MARK, PORT130_FN1), - PINMUX_DATA(PORT130_KEYOUT2_MARK, PORT130_FN2), - PINMUX_DATA(PORT130_MSIOF2_RXD_MARK, PORT130_FN3), - PINMUX_DATA(VIO_D1_MARK, PORT131_FN1), - PINMUX_DATA(PORT131_KEYOUT3_MARK, PORT131_FN2), - PINMUX_DATA(PORT131_MSIOF2_SS1_MARK, PORT131_FN3), - PINMUX_DATA(VIO_D2_MARK, PORT132_FN1), - PINMUX_DATA(PORT132_KEYOUT4_MARK, PORT132_FN2), - PINMUX_DATA(PORT132_MSIOF2_SS2_MARK, PORT132_FN3), - PINMUX_DATA(VIO_D3_MARK, PORT133_FN1), - PINMUX_DATA(PORT133_KEYOUT5_MARK, PORT133_FN2), - PINMUX_DATA(PORT133_MSIOF2_TSYNC_MARK, PORT133_FN3), - PINMUX_DATA(VIO_D4_MARK, PORT134_FN1), - PINMUX_DATA(PORT134_KEYIN0_MARK, PORT134_FN2), - PINMUX_DATA(PORT134_MSIOF2_TXD_MARK, PORT134_FN3), - PINMUX_DATA(VIO_D5_MARK, PORT135_FN1), - PINMUX_DATA(PORT135_KEYIN1_MARK, PORT135_FN2), - PINMUX_DATA(PORT135_MSIOF2_TSCK_MARK, PORT135_FN3), - PINMUX_DATA(VIO_D6_MARK, PORT136_FN1), - PINMUX_DATA(PORT136_KEYIN2_MARK, PORT136_FN2), - PINMUX_DATA(VIO_D7_MARK, PORT137_FN1), - PINMUX_DATA(PORT137_KEYIN3_MARK, PORT137_FN2), - PINMUX_DATA(VIO_D8_MARK, PORT138_FN1), - PINMUX_DATA(M9_SLCD_A01_MARK, PORT138_FN2), - PINMUX_DATA(PORT138_FSIAOMC_MARK, PORT138_FN3), - PINMUX_DATA(VIO_D9_MARK, PORT139_FN1), - PINMUX_DATA(M10_SLCD_CK1_MARK, PORT139_FN2), - PINMUX_DATA(PORT139_FSIAOLR_MARK, PORT139_FN3), - PINMUX_DATA(VIO_D10_MARK, PORT140_FN1), - PINMUX_DATA(M11_SLCD_SO1_MARK, PORT140_FN2), - PINMUX_DATA(TPU0TO2_MARK, PORT140_FN3), - PINMUX_DATA(PORT140_FSIAOBT_MARK, PORT140_FN4), - PINMUX_DATA(VIO_D11_MARK, PORT141_FN1), - PINMUX_DATA(M12_SLCD_CE1_MARK, PORT141_FN2), - PINMUX_DATA(TPU0TO3_MARK, PORT141_FN3), - PINMUX_DATA(PORT141_FSIAOSLD_MARK, PORT141_FN4), - PINMUX_DATA(VIO_D12_MARK, PORT142_FN1), - PINMUX_DATA(M13_BSW_MARK, PORT142_FN2), - PINMUX_DATA(PORT142_FSIACK_MARK, PORT142_FN3), - PINMUX_DATA(VIO_D13_MARK, PORT143_FN1), - PINMUX_DATA(M14_GSW_MARK, PORT143_FN2), - PINMUX_DATA(PORT143_FSIAILR_MARK, PORT143_FN3), - PINMUX_DATA(VIO_D14_MARK, PORT144_FN1), - PINMUX_DATA(M15_RSW_MARK, PORT144_FN2), - PINMUX_DATA(PORT144_FSIAIBT_MARK, PORT144_FN3), - PINMUX_DATA(VIO_D15_MARK, PORT145_FN1), - PINMUX_DATA(TPU1TO3_MARK, PORT145_FN2), - PINMUX_DATA(PORT145_FSIAISLD_MARK, PORT145_FN3), - PINMUX_DATA(VIO_CLK_MARK, PORT146_FN1), - PINMUX_DATA(PORT146_KEYIN4_MARK, PORT146_FN2), - PINMUX_DATA(IPORT2_MARK, PORT146_FN3), - PINMUX_DATA(VIO_FIELD_MARK, PORT147_FN1), - PINMUX_DATA(PORT147_KEYIN5_MARK, PORT147_FN2), - PINMUX_DATA(VIO_CKO_MARK, PORT148_FN1), - PINMUX_DATA(PORT148_KEYIN6_MARK, PORT148_FN2), - PINMUX_DATA(A27_MARK, PORT149_FN1), - PINMUX_DATA(RDWR_XWE_MARK, PORT149_FN2), - PINMUX_DATA(MFG0_IN1_MARK, PORT149_FN3), - PINMUX_DATA(MFG0_IN2_MARK, PORT150_FN1), - PINMUX_DATA(TS_SPSYNC3_MARK, PORT151_FN1), - PINMUX_DATA(MSIOF2_RSCK_MARK, PORT151_FN2), - PINMUX_DATA(TS_SDAT3_MARK, PORT152_FN1), - PINMUX_DATA(MSIOF2_RSYNC_MARK, PORT152_FN2), - PINMUX_DATA(TPU1TO2_MARK, PORT153_FN1), - PINMUX_DATA(TS_SDEN3_MARK, PORT153_FN2), - PINMUX_DATA(PORT153_MSIOF2_SS1_MARK, PORT153_FN3), - PINMUX_DATA(SOUT3_MARK, PORT154_FN1), - PINMUX_DATA(SCIFA2_TXD1_MARK, PORT154_FN2), - PINMUX_DATA(MSIOF2_MCK0_MARK, PORT154_FN3), - PINMUX_DATA(SIN3_MARK, PORT155_FN1), - PINMUX_DATA(SCIFA2_RXD1_MARK, PORT155_FN2), - PINMUX_DATA(MSIOF2_MCK1_MARK, PORT155_FN3), - PINMUX_DATA(XRTS3_MARK, PORT156_FN1), - PINMUX_DATA(SCIFA2_RTS1_MARK, PORT156_FN2), - PINMUX_DATA(PORT156_MSIOF2_SS2_MARK, PORT156_FN3), - PINMUX_DATA(XCTS3_MARK, PORT157_FN1), - PINMUX_DATA(SCIFA2_CTS1_MARK, PORT157_FN2), - PINMUX_DATA(PORT157_MSIOF2_RXD_MARK, PORT157_FN3), - - /* 55-4 (FN) */ - PINMUX_DATA(DINT_MARK, PORT158_FN1), - PINMUX_DATA(SCIFA2_SCK1_MARK, PORT158_FN2), - PINMUX_DATA(TS_SCK3_MARK, PORT158_FN3), - PINMUX_DATA(PORT159_SCIFB_SCK_MARK, PORT159_FN1), - PINMUX_DATA(PORT159_SCIFA5_SCK_MARK, PORT159_FN2), - PINMUX_DATA(NMI_MARK, PORT159_FN3), - PINMUX_DATA(PORT160_SCIFB_TXD_MARK, PORT160_FN1), - PINMUX_DATA(PORT160_SCIFA5_TXD_MARK, PORT160_FN2), - PINMUX_DATA(SOUT0_MARK, PORT160_FN3), - PINMUX_DATA(PORT161_SCIFB_CTS_MARK, PORT161_FN1), - PINMUX_DATA(PORT161_SCIFA5_CTS_MARK, PORT161_FN2), - PINMUX_DATA(XCTS0_MARK, PORT161_FN3), - PINMUX_DATA(MFG3_IN2_MARK, PORT161_FN4), - PINMUX_DATA(PORT162_SCIFB_RXD_MARK, PORT162_FN1), - PINMUX_DATA(PORT162_SCIFA5_RXD_MARK, PORT162_FN2), - PINMUX_DATA(SIN0_MARK, PORT162_FN3), - PINMUX_DATA(MFG3_IN1_MARK, PORT162_FN4), - PINMUX_DATA(PORT163_SCIFB_RTS_MARK, PORT163_FN1), - PINMUX_DATA(PORT163_SCIFA5_RTS_MARK, PORT163_FN2), - PINMUX_DATA(XRTS0_MARK, PORT163_FN3), - PINMUX_DATA(MFG3_OUT1_MARK, PORT163_FN4), - PINMUX_DATA(TPU3TO0_MARK, PORT163_FN5), - PINMUX_DATA(LCDD0_MARK, PORT192_FN1), - PINMUX_DATA(PORT192_KEYOUT0_MARK, PORT192_FN2), - PINMUX_DATA(EXT_CKI_MARK, PORT192_FN3), - PINMUX_DATA(LCDD1_MARK, PORT193_FN1), - PINMUX_DATA(PORT193_KEYOUT1_MARK, PORT193_FN2), - PINMUX_DATA(PORT193_SCIFA5_CTS_MARK, PORT193_FN3), - PINMUX_DATA(BBIF2_TSYNC1_MARK, PORT193_FN4), - PINMUX_DATA(LCDD2_MARK, PORT194_FN1), - PINMUX_DATA(PORT194_KEYOUT2_MARK, PORT194_FN2), - PINMUX_DATA(PORT194_SCIFA5_RTS_MARK, PORT194_FN3), - PINMUX_DATA(BBIF2_TSCK1_MARK, PORT194_FN4), - PINMUX_DATA(LCDD3_MARK, PORT195_FN1), - PINMUX_DATA(PORT195_KEYOUT3_MARK, PORT195_FN2), - PINMUX_DATA(PORT195_SCIFA5_RXD_MARK, PORT195_FN3), - PINMUX_DATA(BBIF2_TXD1_MARK, PORT195_FN4), - PINMUX_DATA(LCDD4_MARK, PORT196_FN1), - PINMUX_DATA(PORT196_KEYOUT4_MARK, PORT196_FN2), - PINMUX_DATA(PORT196_SCIFA5_TXD_MARK, PORT196_FN3), - PINMUX_DATA(LCDD5_MARK, PORT197_FN1), - PINMUX_DATA(PORT197_KEYOUT5_MARK, PORT197_FN2), - PINMUX_DATA(PORT197_SCIFA5_SCK_MARK, PORT197_FN3), - PINMUX_DATA(MFG2_OUT2_MARK, PORT197_FN4), - PINMUX_DATA(LCDD6_MARK, PORT198_FN1), - PINMUX_DATA(LCDD7_MARK, PORT199_FN1), - PINMUX_DATA(TPU4TO1_MARK, PORT199_FN2), - PINMUX_DATA(MFG4_OUT2_MARK, PORT199_FN3), - PINMUX_DATA(LCDD8_MARK, PORT200_FN1), - PINMUX_DATA(PORT200_KEYIN0_MARK, PORT200_FN2), - PINMUX_DATA(VIO_DR0_MARK, PORT200_FN3), - PINMUX_DATA(D16_MARK, PORT200_FN4), - PINMUX_DATA(LCDD9_MARK, PORT201_FN1), - PINMUX_DATA(PORT201_KEYIN1_MARK, PORT201_FN2), - PINMUX_DATA(VIO_DR1_MARK, PORT201_FN3), - PINMUX_DATA(D17_MARK, PORT201_FN4), - PINMUX_DATA(LCDD10_MARK, PORT202_FN1), - PINMUX_DATA(PORT202_KEYIN2_MARK, PORT202_FN2), - PINMUX_DATA(VIO_DR2_MARK, PORT202_FN3), - PINMUX_DATA(D18_MARK, PORT202_FN4), - PINMUX_DATA(LCDD11_MARK, PORT203_FN1), - PINMUX_DATA(PORT203_KEYIN3_MARK, PORT203_FN2), - PINMUX_DATA(VIO_DR3_MARK, PORT203_FN3), - PINMUX_DATA(D19_MARK, PORT203_FN4), - PINMUX_DATA(LCDD12_MARK, PORT204_FN1), - PINMUX_DATA(PORT204_KEYIN4_MARK, PORT204_FN2), - PINMUX_DATA(VIO_DR4_MARK, PORT204_FN3), - PINMUX_DATA(D20_MARK, PORT204_FN4), - PINMUX_DATA(LCDD13_MARK, PORT205_FN1), - PINMUX_DATA(PORT205_KEYIN5_MARK, PORT205_FN2), - PINMUX_DATA(VIO_DR5_MARK, PORT205_FN3), - PINMUX_DATA(D21_MARK, PORT205_FN4), - PINMUX_DATA(LCDD14_MARK, PORT206_FN1), - PINMUX_DATA(PORT206_KEYIN6_MARK, PORT206_FN2), - PINMUX_DATA(VIO_DR6_MARK, PORT206_FN3), - PINMUX_DATA(D22_MARK, PORT206_FN4), - PINMUX_DATA(LCDD15_MARK, PORT207_FN1), - PINMUX_DATA(PORT207_MSIOF0L_SS1_MARK, PORT207_FN2), - PINMUX_DATA(PORT207_KEYOUT0_MARK, PORT207_FN3), - PINMUX_DATA(VIO_DR7_MARK, PORT207_FN4), - PINMUX_DATA(D23_MARK, PORT207_FN5), - PINMUX_DATA(LCDD16_MARK, PORT208_FN1), - PINMUX_DATA(PORT208_MSIOF0L_SS2_MARK, PORT208_FN2), - PINMUX_DATA(PORT208_KEYOUT1_MARK, PORT208_FN3), - PINMUX_DATA(VIO_VDR_MARK, PORT208_FN4), - PINMUX_DATA(D24_MARK, PORT208_FN5), - PINMUX_DATA(LCDD17_MARK, PORT209_FN1), - PINMUX_DATA(PORT209_KEYOUT2_MARK, PORT209_FN2), - PINMUX_DATA(VIO_HDR_MARK, PORT209_FN3), - PINMUX_DATA(D25_MARK, PORT209_FN4), - PINMUX_DATA(LCDD18_MARK, PORT210_FN1), - PINMUX_DATA(DREQ2_MARK, PORT210_FN2), - PINMUX_DATA(PORT210_MSIOF0L_SS1_MARK, PORT210_FN3), - PINMUX_DATA(D26_MARK, PORT210_FN4), - PINMUX_DATA(LCDD19_MARK, PORT211_FN1), - PINMUX_DATA(PORT211_MSIOF0L_SS2_MARK, PORT211_FN2), - PINMUX_DATA(D27_MARK, PORT211_FN3), - PINMUX_DATA(LCDD20_MARK, PORT212_FN1), - PINMUX_DATA(TS_SPSYNC1_MARK, PORT212_FN2), - PINMUX_DATA(MSIOF0L_MCK0_MARK, PORT212_FN3), - PINMUX_DATA(D28_MARK, PORT212_FN4), - PINMUX_DATA(LCDD21_MARK, PORT213_FN1), - PINMUX_DATA(TS_SDAT1_MARK, PORT213_FN2), - PINMUX_DATA(MSIOF0L_MCK1_MARK, PORT213_FN3), - PINMUX_DATA(D29_MARK, PORT213_FN4), - PINMUX_DATA(LCDD22_MARK, PORT214_FN1), - PINMUX_DATA(TS_SDEN1_MARK, PORT214_FN2), - PINMUX_DATA(MSIOF0L_RSCK_MARK, PORT214_FN3), - PINMUX_DATA(D30_MARK, PORT214_FN4), - PINMUX_DATA(LCDD23_MARK, PORT215_FN1), - PINMUX_DATA(TS_SCK1_MARK, PORT215_FN2), - PINMUX_DATA(MSIOF0L_RSYNC_MARK, PORT215_FN3), - PINMUX_DATA(D31_MARK, PORT215_FN4), - PINMUX_DATA(LCDDCK_MARK, PORT216_FN1), - PINMUX_DATA(LCDWR_MARK, PORT216_FN2), - PINMUX_DATA(PORT216_KEYOUT3_MARK, PORT216_FN3), - PINMUX_DATA(VIO_CLKR_MARK, PORT216_FN4), - PINMUX_DATA(LCDRD_MARK, PORT217_FN1), - PINMUX_DATA(DACK2_MARK, PORT217_FN2), - PINMUX_DATA(MSIOF0L_TSYNC_MARK, PORT217_FN3), - PINMUX_DATA(LCDHSYN_MARK, PORT218_FN1), - PINMUX_DATA(LCDCS_MARK, PORT218_FN2), - PINMUX_DATA(LCDCS2_MARK, PORT218_FN3), - PINMUX_DATA(DACK3_MARK, PORT218_FN4), - PINMUX_DATA(PORT218_VIO_CKOR_MARK, PORT218_FN5), - PINMUX_DATA(PORT218_KEYOUT4_MARK, PORT218_FN6), - PINMUX_DATA(LCDDISP_MARK, PORT219_FN1), - PINMUX_DATA(LCDRS_MARK, PORT219_FN2), - PINMUX_DATA(DREQ3_MARK, PORT219_FN3), - PINMUX_DATA(MSIOF0L_TSCK_MARK, PORT219_FN4), - PINMUX_DATA(LCDVSYN_MARK, PORT220_FN1), - PINMUX_DATA(LCDVSYN2_MARK, PORT220_FN2), - PINMUX_DATA(PORT220_KEYOUT5_MARK, PORT220_FN3), - PINMUX_DATA(LCDLCLK_MARK, PORT221_FN1), - PINMUX_DATA(DREQ1_MARK, PORT221_FN2), - PINMUX_DATA(PWEN_MARK, PORT221_FN3), - PINMUX_DATA(MSIOF0L_RXD_MARK, PORT221_FN4), - PINMUX_DATA(LCDDON_MARK, PORT222_FN1), - PINMUX_DATA(LCDDON2_MARK, PORT222_FN2), - PINMUX_DATA(DACK1_MARK, PORT222_FN3), - PINMUX_DATA(OVCN_MARK, PORT222_FN4), - PINMUX_DATA(MSIOF0L_TXD_MARK, PORT222_FN5), - PINMUX_DATA(SCIFA1_TXD_MARK, PORT225_FN1), - PINMUX_DATA(OVCN2_MARK, PORT225_FN2), - PINMUX_DATA(EXTLP_MARK, PORT226_FN1), - PINMUX_DATA(SCIFA1_SCK_MARK, PORT226_FN2), - PINMUX_DATA(USBTERM_MARK, PORT226_FN3), - PINMUX_DATA(PORT226_VIO_CKO2_MARK, PORT226_FN4), - PINMUX_DATA(SCIFA1_RTS_MARK, PORT227_FN1), - PINMUX_DATA(IDIN_MARK, PORT227_FN2), - PINMUX_DATA(SCIFA1_RXD_MARK, PORT228_FN1), - PINMUX_DATA(SCIFA1_CTS_MARK, PORT229_FN1), - PINMUX_DATA(MFG1_IN1_MARK, PORT229_FN2), - PINMUX_DATA(MSIOF1_TXD_MARK, PORT230_FN1), - PINMUX_DATA(SCIFA2_TXD2_MARK, PORT230_FN2), - PINMUX_DATA(PORT230_FSIAOMC_MARK, PORT230_FN3), - PINMUX_DATA(MSIOF1_TSYNC_MARK, PORT231_FN1), - PINMUX_DATA(SCIFA2_CTS2_MARK, PORT231_FN2), - PINMUX_DATA(PORT231_FSIAOLR_MARK, PORT231_FN3), - PINMUX_DATA(MSIOF1_TSCK_MARK, PORT232_FN1), - PINMUX_DATA(SCIFA2_SCK2_MARK, PORT232_FN2), - PINMUX_DATA(PORT232_FSIAOBT_MARK, PORT232_FN3), - PINMUX_DATA(MSIOF1_RXD_MARK, PORT233_FN1), - PINMUX_DATA(SCIFA2_RXD2_MARK, PORT233_FN2), - PINMUX_DATA(GPS_VCOTRIG_MARK, PORT233_FN3), - PINMUX_DATA(PORT233_FSIACK_MARK, PORT233_FN4), - PINMUX_DATA(MSIOF1_RSCK_MARK, PORT234_FN1), - PINMUX_DATA(SCIFA2_RTS2_MARK, PORT234_FN2), - PINMUX_DATA(PORT234_FSIAOSLD_MARK, PORT234_FN3), - PINMUX_DATA(MSIOF1_RSYNC_MARK, PORT235_FN1), - PINMUX_DATA(OPORT0_MARK, PORT235_FN2), - PINMUX_DATA(MFG1_IN2_MARK, PORT235_FN3), - PINMUX_DATA(PORT235_FSIAILR_MARK, PORT235_FN4), - PINMUX_DATA(MSIOF1_MCK0_MARK, PORT236_FN1), - PINMUX_DATA(I2C_SDA2_MARK, PORT236_FN2), - PINMUX_DATA(PORT236_FSIAIBT_MARK, PORT236_FN3), - PINMUX_DATA(MSIOF1_MCK1_MARK, PORT237_FN1), - PINMUX_DATA(I2C_SCL2_MARK, PORT237_FN2), - PINMUX_DATA(PORT237_FSIAISLD_MARK, PORT237_FN3), - PINMUX_DATA(MSIOF1_SS1_MARK, PORT238_FN1), - PINMUX_DATA(EDBGREQ3_MARK, PORT238_FN2), - - /* 55-5 (FN) */ - PINMUX_DATA(MSIOF1_SS2_MARK, PORT239_FN1), - PINMUX_DATA(SCIFA6_TXD_MARK, PORT240_FN1), - PINMUX_DATA(PORT241_IRDA_OUT_MARK, PORT241_FN1), - PINMUX_DATA(PORT241_IROUT_MARK, PORT241_FN2), - PINMUX_DATA(MFG4_OUT1_MARK, PORT241_FN3), - PINMUX_DATA(TPU4TO0_MARK, PORT241_FN4), - PINMUX_DATA(PORT242_IRDA_IN_MARK, PORT242_FN1), - PINMUX_DATA(MFG4_IN2_MARK, PORT242_FN2), - PINMUX_DATA(PORT243_IRDA_FIRSEL_MARK, PORT243_FN1), - PINMUX_DATA(PORT243_VIO_CKO2_MARK, PORT243_FN2), - PINMUX_DATA(PORT244_SCIFA5_CTS_MARK, PORT244_FN1), - PINMUX_DATA(MFG2_IN1_MARK, PORT244_FN2), - PINMUX_DATA(PORT244_SCIFB_CTS_MARK, PORT244_FN3), - PINMUX_DATA(PORT245_SCIFA5_RTS_MARK, PORT245_FN1), - PINMUX_DATA(MFG2_IN2_MARK, PORT245_FN2), - PINMUX_DATA(PORT245_SCIFB_RTS_MARK, PORT245_FN3), - PINMUX_DATA(PORT246_SCIFA5_RXD_MARK, PORT246_FN1), - PINMUX_DATA(MFG1_OUT1_MARK, PORT246_FN2), - PINMUX_DATA(PORT246_SCIFB_RXD_MARK, PORT246_FN3), - PINMUX_DATA(TPU1TO0_MARK, PORT246_FN4), - PINMUX_DATA(PORT247_SCIFA5_TXD_MARK, PORT247_FN1), - PINMUX_DATA(MFG3_OUT2_MARK, PORT247_FN2), - PINMUX_DATA(PORT247_SCIFB_TXD_MARK, PORT247_FN3), - PINMUX_DATA(TPU3TO1_MARK, PORT247_FN4), - PINMUX_DATA(PORT248_SCIFA5_SCK_MARK, PORT248_FN1), - PINMUX_DATA(MFG2_OUT1_MARK, PORT248_FN2), - PINMUX_DATA(PORT248_SCIFB_SCK_MARK, PORT248_FN3), - PINMUX_DATA(TPU2TO0_MARK, PORT248_FN4), - PINMUX_DATA(PORT249_IROUT_MARK, PORT249_FN1), - PINMUX_DATA(MFG4_IN1_MARK, PORT249_FN2), - PINMUX_DATA(SDHICLK0_MARK, PORT250_FN1), - PINMUX_DATA(TCK2_SWCLK_MC0_MARK, PORT250_FN2), - PINMUX_DATA(SDHICD0_MARK, PORT251_FN1), - PINMUX_DATA(SDHID0_0_MARK, PORT252_FN1), - PINMUX_DATA(TMS2_SWDIO_MC0_MARK, PORT252_FN2), - PINMUX_DATA(SDHID0_1_MARK, PORT253_FN1), - PINMUX_DATA(TDO2_SWO0_MC0_MARK, PORT253_FN2), - PINMUX_DATA(SDHID0_2_MARK, PORT254_FN1), - PINMUX_DATA(TDI2_MARK, PORT254_FN2), - PINMUX_DATA(SDHID0_3_MARK, PORT255_FN1), - PINMUX_DATA(RTCK2_SWO1_MC0_MARK, PORT255_FN2), - PINMUX_DATA(SDHICMD0_MARK, PORT256_FN1), - PINMUX_DATA(TRST2_MARK, PORT256_FN2), - PINMUX_DATA(SDHIWP0_MARK, PORT257_FN1), - PINMUX_DATA(EDBGREQ2_MARK, PORT257_FN2), - PINMUX_DATA(SDHICLK1_MARK, PORT258_FN1), - PINMUX_DATA(TCK3_SWCLK_MC1_MARK, PORT258_FN2), - PINMUX_DATA(SDHID1_0_MARK, PORT259_FN1), - PINMUX_DATA(M11_SLCD_SO2_MARK, PORT259_FN2), - PINMUX_DATA(TS_SPSYNC2_MARK, PORT259_FN3), - PINMUX_DATA(TMS3_SWDIO_MC1_MARK, PORT259_FN4), - PINMUX_DATA(SDHID1_1_MARK, PORT260_FN1), - PINMUX_DATA(M9_SLCD_A02_MARK, PORT260_FN2), - PINMUX_DATA(TS_SDAT2_MARK, PORT260_FN3), - PINMUX_DATA(TDO3_SWO0_MC1_MARK, PORT260_FN4), - PINMUX_DATA(SDHID1_2_MARK, PORT261_FN1), - PINMUX_DATA(M10_SLCD_CK2_MARK, PORT261_FN2), - PINMUX_DATA(TS_SDEN2_MARK, PORT261_FN3), - PINMUX_DATA(TDI3_MARK, PORT261_FN4), - PINMUX_DATA(SDHID1_3_MARK, PORT262_FN1), - PINMUX_DATA(M12_SLCD_CE2_MARK, PORT262_FN2), - PINMUX_DATA(TS_SCK2_MARK, PORT262_FN3), - PINMUX_DATA(RTCK3_SWO1_MC1_MARK, PORT262_FN4), - PINMUX_DATA(SDHICMD1_MARK, PORT263_FN1), - PINMUX_DATA(TRST3_MARK, PORT263_FN2), - PINMUX_DATA(RESETOUTS_MARK, PORT264_FN1), -}; - -static struct pinmux_gpio pinmux_gpios[] = { - /* 55-1 -> 55-5 (GPIO) */ - GPIO_PORT_ALL(), - - /* Special Pull-up / Pull-down Functions */ - GPIO_FN(PORT66_KEYIN0_PU), GPIO_FN(PORT67_KEYIN1_PU), - GPIO_FN(PORT68_KEYIN2_PU), GPIO_FN(PORT69_KEYIN3_PU), - GPIO_FN(PORT70_KEYIN4_PU), GPIO_FN(PORT71_KEYIN5_PU), - GPIO_FN(PORT72_KEYIN6_PU), - - /* 55-1 (FN) */ - GPIO_FN(VBUS_0), - GPIO_FN(CPORT0), - GPIO_FN(CPORT1), - GPIO_FN(CPORT2), - GPIO_FN(CPORT3), - GPIO_FN(CPORT4), - GPIO_FN(CPORT5), - GPIO_FN(CPORT6), - GPIO_FN(CPORT7), - GPIO_FN(CPORT8), - GPIO_FN(CPORT9), - GPIO_FN(CPORT10), - GPIO_FN(CPORT11), GPIO_FN(SIN2), - GPIO_FN(CPORT12), GPIO_FN(XCTS2), - GPIO_FN(CPORT13), GPIO_FN(RFSPO4), - GPIO_FN(CPORT14), GPIO_FN(RFSPO5), - GPIO_FN(CPORT15), GPIO_FN(SCIFA0_SCK), GPIO_FN(GPS_AGC2), - GPIO_FN(CPORT16), GPIO_FN(SCIFA0_TXD), GPIO_FN(GPS_AGC3), - GPIO_FN(CPORT17_IC_OE), GPIO_FN(SOUT2), - GPIO_FN(CPORT18), GPIO_FN(XRTS2), GPIO_FN(PORT19_VIO_CKO2), - GPIO_FN(CPORT19_MPORT1), - GPIO_FN(CPORT20), GPIO_FN(RFSPO6), - GPIO_FN(CPORT21), GPIO_FN(STATUS0), - GPIO_FN(CPORT22), GPIO_FN(STATUS1), - GPIO_FN(CPORT23), GPIO_FN(STATUS2), GPIO_FN(RFSPO7), - GPIO_FN(B_SYNLD1), - GPIO_FN(B_SYNLD2), GPIO_FN(SYSENMSK), - GPIO_FN(XMAINPS), - GPIO_FN(XDIVPS), - GPIO_FN(XIDRST), - GPIO_FN(IDCLK), GPIO_FN(IC_DP), - GPIO_FN(IDIO), GPIO_FN(IC_DM), - GPIO_FN(SOUT1), GPIO_FN(SCIFA4_TXD), GPIO_FN(M02_BERDAT), - GPIO_FN(SIN1), GPIO_FN(SCIFA4_RXD), GPIO_FN(XWUP), - GPIO_FN(XRTS1), GPIO_FN(SCIFA4_RTS), GPIO_FN(M03_BERCLK), - GPIO_FN(XCTS1), GPIO_FN(SCIFA4_CTS), - GPIO_FN(PCMCLKO), - GPIO_FN(SYNC8KO), - - /* 55-2 (FN) */ - GPIO_FN(DNPCM_A), - GPIO_FN(UPPCM_A), - GPIO_FN(VACK), - GPIO_FN(XTALB1L), - GPIO_FN(GPS_AGC1), GPIO_FN(SCIFA0_RTS), - GPIO_FN(GPS_AGC4), GPIO_FN(SCIFA0_RXD), - GPIO_FN(GPS_PWRDOWN), GPIO_FN(SCIFA0_CTS), - GPIO_FN(GPS_IM), - GPIO_FN(GPS_IS), - GPIO_FN(GPS_QM), - GPIO_FN(GPS_QS), - GPIO_FN(FMSOCK), GPIO_FN(PORT49_IRDA_OUT), GPIO_FN(PORT49_IROUT), - GPIO_FN(FMSOOLR), GPIO_FN(BBIF2_TSYNC2), GPIO_FN(TPU2TO2), - GPIO_FN(IPORT3), GPIO_FN(FMSIOLR), - GPIO_FN(FMSOOBT), GPIO_FN(BBIF2_TSCK2), GPIO_FN(TPU2TO3), - GPIO_FN(OPORT1), GPIO_FN(FMSIOBT), - GPIO_FN(FMSOSLD), GPIO_FN(BBIF2_TXD2), GPIO_FN(OPORT2), - GPIO_FN(FMSOILR), GPIO_FN(PORT53_IRDA_IN), GPIO_FN(TPU3TO3), - GPIO_FN(OPORT3), GPIO_FN(FMSIILR), - GPIO_FN(FMSOIBT), GPIO_FN(PORT54_IRDA_FIRSEL), GPIO_FN(TPU3TO2), - GPIO_FN(FMSIIBT), - GPIO_FN(FMSISLD), GPIO_FN(MFG0_OUT1), GPIO_FN(TPU0TO0), - GPIO_FN(A0_EA0), GPIO_FN(BS), - GPIO_FN(A12_EA12), GPIO_FN(PORT58_VIO_CKOR), GPIO_FN(TPU4TO2), - GPIO_FN(A13_EA13), GPIO_FN(PORT59_IROUT), GPIO_FN(MFG0_OUT2), - GPIO_FN(TPU0TO1), - GPIO_FN(A14_EA14), GPIO_FN(PORT60_KEYOUT5), - GPIO_FN(A15_EA15), GPIO_FN(PORT61_KEYOUT4), - GPIO_FN(A16_EA16), GPIO_FN(PORT62_KEYOUT3), GPIO_FN(MSIOF0_SS1), - GPIO_FN(A17_EA17), GPIO_FN(PORT63_KEYOUT2), GPIO_FN(MSIOF0_TSYNC), - GPIO_FN(A18_EA18), GPIO_FN(PORT64_KEYOUT1), GPIO_FN(MSIOF0_TSCK), - GPIO_FN(A19_EA19), GPIO_FN(PORT65_KEYOUT0), GPIO_FN(MSIOF0_TXD), - GPIO_FN(A20_EA20), GPIO_FN(PORT66_KEYIN0), GPIO_FN(MSIOF0_RSCK), - GPIO_FN(A21_EA21), GPIO_FN(PORT67_KEYIN1), GPIO_FN(MSIOF0_RSYNC), - GPIO_FN(A22_EA22), GPIO_FN(PORT68_KEYIN2), GPIO_FN(MSIOF0_MCK0), - GPIO_FN(A23_EA23), GPIO_FN(PORT69_KEYIN3), GPIO_FN(MSIOF0_MCK1), - GPIO_FN(A24_EA24), GPIO_FN(PORT70_KEYIN4), GPIO_FN(MSIOF0_RXD), - GPIO_FN(A25_EA25), GPIO_FN(PORT71_KEYIN5), GPIO_FN(MSIOF0_SS2), - GPIO_FN(A26), GPIO_FN(PORT72_KEYIN6), - GPIO_FN(D0_ED0_NAF0), - GPIO_FN(D1_ED1_NAF1), - GPIO_FN(D2_ED2_NAF2), - GPIO_FN(D3_ED3_NAF3), - GPIO_FN(D4_ED4_NAF4), - GPIO_FN(D5_ED5_NAF5), - GPIO_FN(D6_ED6_NAF6), - GPIO_FN(D7_ED7_NAF7), - GPIO_FN(D8_ED8_NAF8), - GPIO_FN(D9_ED9_NAF9), - GPIO_FN(D10_ED10_NAF10), - GPIO_FN(D11_ED11_NAF11), - GPIO_FN(D12_ED12_NAF12), - GPIO_FN(D13_ED13_NAF13), - GPIO_FN(D14_ED14_NAF14), - GPIO_FN(D15_ED15_NAF15), - GPIO_FN(CS4), - GPIO_FN(CS5A), GPIO_FN(FMSICK), - - /* 55-3 (FN) */ - GPIO_FN(CS5B), GPIO_FN(FCE1), - GPIO_FN(CS6B), GPIO_FN(XCS2), GPIO_FN(CS6A), GPIO_FN(DACK0), - GPIO_FN(FCE0), - GPIO_FN(WAIT), GPIO_FN(DREQ0), - GPIO_FN(RD_XRD), - GPIO_FN(WE0_XWR0_FWE), - GPIO_FN(WE1_XWR1), - GPIO_FN(FRB), - GPIO_FN(CKO), - GPIO_FN(NBRSTOUT), - GPIO_FN(NBRST), - GPIO_FN(GPS_EPPSIN), - GPIO_FN(LATCHPULSE), - GPIO_FN(LTESIGNAL), - GPIO_FN(LEGACYSTATE), - GPIO_FN(TCKON), - GPIO_FN(VIO_VD), GPIO_FN(PORT128_KEYOUT0), GPIO_FN(IPORT0), - GPIO_FN(VIO_HD), GPIO_FN(PORT129_KEYOUT1), GPIO_FN(IPORT1), - GPIO_FN(VIO_D0), GPIO_FN(PORT130_KEYOUT2), GPIO_FN(PORT130_MSIOF2_RXD), - GPIO_FN(VIO_D1), GPIO_FN(PORT131_KEYOUT3), GPIO_FN(PORT131_MSIOF2_SS1), - GPIO_FN(VIO_D2), GPIO_FN(PORT132_KEYOUT4), GPIO_FN(PORT132_MSIOF2_SS2), - GPIO_FN(VIO_D3), GPIO_FN(PORT133_KEYOUT5), - GPIO_FN(PORT133_MSIOF2_TSYNC), - GPIO_FN(VIO_D4), GPIO_FN(PORT134_KEYIN0), GPIO_FN(PORT134_MSIOF2_TXD), - GPIO_FN(VIO_D5), GPIO_FN(PORT135_KEYIN1), GPIO_FN(PORT135_MSIOF2_TSCK), - GPIO_FN(VIO_D6), GPIO_FN(PORT136_KEYIN2), - GPIO_FN(VIO_D7), GPIO_FN(PORT137_KEYIN3), - GPIO_FN(VIO_D8), GPIO_FN(M9_SLCD_A01), GPIO_FN(PORT138_FSIAOMC), - GPIO_FN(VIO_D9), GPIO_FN(M10_SLCD_CK1), GPIO_FN(PORT139_FSIAOLR), - GPIO_FN(VIO_D10), GPIO_FN(M11_SLCD_SO1), GPIO_FN(TPU0TO2), - GPIO_FN(PORT140_FSIAOBT), - GPIO_FN(VIO_D11), GPIO_FN(M12_SLCD_CE1), GPIO_FN(TPU0TO3), - GPIO_FN(PORT141_FSIAOSLD), - GPIO_FN(VIO_D12), GPIO_FN(M13_BSW), GPIO_FN(PORT142_FSIACK), - GPIO_FN(VIO_D13), GPIO_FN(M14_GSW), GPIO_FN(PORT143_FSIAILR), - GPIO_FN(VIO_D14), GPIO_FN(M15_RSW), GPIO_FN(PORT144_FSIAIBT), - GPIO_FN(VIO_D15), GPIO_FN(TPU1TO3), GPIO_FN(PORT145_FSIAISLD), - GPIO_FN(VIO_CLK), GPIO_FN(PORT146_KEYIN4), GPIO_FN(IPORT2), - GPIO_FN(VIO_FIELD), GPIO_FN(PORT147_KEYIN5), - GPIO_FN(VIO_CKO), GPIO_FN(PORT148_KEYIN6), - GPIO_FN(A27), GPIO_FN(RDWR_XWE), GPIO_FN(MFG0_IN1), - GPIO_FN(MFG0_IN2), - GPIO_FN(TS_SPSYNC3), GPIO_FN(MSIOF2_RSCK), - GPIO_FN(TS_SDAT3), GPIO_FN(MSIOF2_RSYNC), - GPIO_FN(TPU1TO2), GPIO_FN(TS_SDEN3), GPIO_FN(PORT153_MSIOF2_SS1), - GPIO_FN(SOUT3), GPIO_FN(SCIFA2_TXD1), GPIO_FN(MSIOF2_MCK0), - GPIO_FN(SIN3), GPIO_FN(SCIFA2_RXD1), GPIO_FN(MSIOF2_MCK1), - GPIO_FN(XRTS3), GPIO_FN(SCIFA2_RTS1), GPIO_FN(PORT156_MSIOF2_SS2), - GPIO_FN(XCTS3), GPIO_FN(SCIFA2_CTS1), GPIO_FN(PORT157_MSIOF2_RXD), - - /* 55-4 (FN) */ - GPIO_FN(DINT), GPIO_FN(SCIFA2_SCK1), GPIO_FN(TS_SCK3), - GPIO_FN(PORT159_SCIFB_SCK), GPIO_FN(PORT159_SCIFA5_SCK), GPIO_FN(NMI), - GPIO_FN(PORT160_SCIFB_TXD), GPIO_FN(PORT160_SCIFA5_TXD), GPIO_FN(SOUT0), - GPIO_FN(PORT161_SCIFB_CTS), GPIO_FN(PORT161_SCIFA5_CTS), GPIO_FN(XCTS0), - GPIO_FN(MFG3_IN2), - GPIO_FN(PORT162_SCIFB_RXD), GPIO_FN(PORT162_SCIFA5_RXD), GPIO_FN(SIN0), - GPIO_FN(MFG3_IN1), - GPIO_FN(PORT163_SCIFB_RTS), GPIO_FN(PORT163_SCIFA5_RTS), GPIO_FN(XRTS0), - GPIO_FN(MFG3_OUT1), GPIO_FN(TPU3TO0), - GPIO_FN(LCDD0), GPIO_FN(PORT192_KEYOUT0), GPIO_FN(EXT_CKI), - GPIO_FN(LCDD1), GPIO_FN(PORT193_KEYOUT1), GPIO_FN(PORT193_SCIFA5_CTS), - GPIO_FN(BBIF2_TSYNC1), - GPIO_FN(LCDD2), GPIO_FN(PORT194_KEYOUT2), GPIO_FN(PORT194_SCIFA5_RTS), - GPIO_FN(BBIF2_TSCK1), - GPIO_FN(LCDD3), GPIO_FN(PORT195_KEYOUT3), GPIO_FN(PORT195_SCIFA5_RXD), - GPIO_FN(BBIF2_TXD1), - GPIO_FN(LCDD4), GPIO_FN(PORT196_KEYOUT4), GPIO_FN(PORT196_SCIFA5_TXD), - GPIO_FN(LCDD5), GPIO_FN(PORT197_KEYOUT5), GPIO_FN(PORT197_SCIFA5_SCK), - GPIO_FN(MFG2_OUT2), - GPIO_FN(LCDD6), - GPIO_FN(LCDD7), GPIO_FN(TPU4TO1), GPIO_FN(MFG4_OUT2), - GPIO_FN(LCDD8), GPIO_FN(PORT200_KEYIN0), GPIO_FN(VIO_DR0), - GPIO_FN(D16), - GPIO_FN(LCDD9), GPIO_FN(PORT201_KEYIN1), GPIO_FN(VIO_DR1), - GPIO_FN(D17), - GPIO_FN(LCDD10), GPIO_FN(PORT202_KEYIN2), GPIO_FN(VIO_DR2), - GPIO_FN(D18), - GPIO_FN(LCDD11), GPIO_FN(PORT203_KEYIN3), GPIO_FN(VIO_DR3), - GPIO_FN(D19), - GPIO_FN(LCDD12), GPIO_FN(PORT204_KEYIN4), GPIO_FN(VIO_DR4), - GPIO_FN(D20), - GPIO_FN(LCDD13), GPIO_FN(PORT205_KEYIN5), GPIO_FN(VIO_DR5), - GPIO_FN(D21), - GPIO_FN(LCDD14), GPIO_FN(PORT206_KEYIN6), GPIO_FN(VIO_DR6), - GPIO_FN(D22), - GPIO_FN(LCDD15), GPIO_FN(PORT207_MSIOF0L_SS1), GPIO_FN(PORT207_KEYOUT0), - GPIO_FN(VIO_DR7), GPIO_FN(D23), - GPIO_FN(LCDD16), GPIO_FN(PORT208_MSIOF0L_SS2), GPIO_FN(PORT208_KEYOUT1), - GPIO_FN(VIO_VDR), GPIO_FN(D24), - GPIO_FN(LCDD17), GPIO_FN(PORT209_KEYOUT2), GPIO_FN(VIO_HDR), - GPIO_FN(D25), - GPIO_FN(LCDD18), GPIO_FN(DREQ2), GPIO_FN(PORT210_MSIOF0L_SS1), - GPIO_FN(D26), - GPIO_FN(LCDD19), GPIO_FN(PORT211_MSIOF0L_SS2), GPIO_FN(D27), - GPIO_FN(LCDD20), GPIO_FN(TS_SPSYNC1), GPIO_FN(MSIOF0L_MCK0), - GPIO_FN(D28), - GPIO_FN(LCDD21), GPIO_FN(TS_SDAT1), GPIO_FN(MSIOF0L_MCK1), - GPIO_FN(D29), - GPIO_FN(LCDD22), GPIO_FN(TS_SDEN1), GPIO_FN(MSIOF0L_RSCK), - GPIO_FN(D30), - GPIO_FN(LCDD23), GPIO_FN(TS_SCK1), GPIO_FN(MSIOF0L_RSYNC), - GPIO_FN(D31), - GPIO_FN(LCDDCK), GPIO_FN(LCDWR), GPIO_FN(PORT216_KEYOUT3), - GPIO_FN(VIO_CLKR), - GPIO_FN(LCDRD), GPIO_FN(DACK2), GPIO_FN(MSIOF0L_TSYNC), - GPIO_FN(LCDHSYN), GPIO_FN(LCDCS), GPIO_FN(LCDCS2), GPIO_FN(DACK3), - GPIO_FN(PORT218_VIO_CKOR), GPIO_FN(PORT218_KEYOUT4), - GPIO_FN(LCDDISP), GPIO_FN(LCDRS), GPIO_FN(DREQ3), GPIO_FN(MSIOF0L_TSCK), - GPIO_FN(LCDVSYN), GPIO_FN(LCDVSYN2), GPIO_FN(PORT220_KEYOUT5), - GPIO_FN(LCDLCLK), GPIO_FN(DREQ1), GPIO_FN(PWEN), GPIO_FN(MSIOF0L_RXD), - GPIO_FN(LCDDON), GPIO_FN(LCDDON2), GPIO_FN(DACK1), GPIO_FN(OVCN), - GPIO_FN(MSIOF0L_TXD), - GPIO_FN(SCIFA1_TXD), GPIO_FN(OVCN2), - GPIO_FN(EXTLP), GPIO_FN(SCIFA1_SCK), GPIO_FN(USBTERM), - GPIO_FN(PORT226_VIO_CKO2), - GPIO_FN(SCIFA1_RTS), GPIO_FN(IDIN), - GPIO_FN(SCIFA1_RXD), - GPIO_FN(SCIFA1_CTS), GPIO_FN(MFG1_IN1), - GPIO_FN(MSIOF1_TXD), GPIO_FN(SCIFA2_TXD2), GPIO_FN(PORT230_FSIAOMC), - GPIO_FN(MSIOF1_TSYNC), GPIO_FN(SCIFA2_CTS2), GPIO_FN(PORT231_FSIAOLR), - GPIO_FN(MSIOF1_TSCK), GPIO_FN(SCIFA2_SCK2), GPIO_FN(PORT232_FSIAOBT), - GPIO_FN(MSIOF1_RXD), GPIO_FN(SCIFA2_RXD2), GPIO_FN(GPS_VCOTRIG), - GPIO_FN(PORT233_FSIACK), - GPIO_FN(MSIOF1_RSCK), GPIO_FN(SCIFA2_RTS2), GPIO_FN(PORT234_FSIAOSLD), - GPIO_FN(MSIOF1_RSYNC), GPIO_FN(OPORT0), GPIO_FN(MFG1_IN2), - GPIO_FN(PORT235_FSIAILR), - GPIO_FN(MSIOF1_MCK0), GPIO_FN(I2C_SDA2), GPIO_FN(PORT236_FSIAIBT), - GPIO_FN(MSIOF1_MCK1), GPIO_FN(I2C_SCL2), GPIO_FN(PORT237_FSIAISLD), - GPIO_FN(MSIOF1_SS1), GPIO_FN(EDBGREQ3), - - /* 55-5 (FN) */ - GPIO_FN(MSIOF1_SS2), - GPIO_FN(SCIFA6_TXD), - GPIO_FN(PORT241_IRDA_OUT), GPIO_FN(PORT241_IROUT), GPIO_FN(MFG4_OUT1), - GPIO_FN(TPU4TO0), - GPIO_FN(PORT242_IRDA_IN), GPIO_FN(MFG4_IN2), - GPIO_FN(PORT243_IRDA_FIRSEL), GPIO_FN(PORT243_VIO_CKO2), - GPIO_FN(PORT244_SCIFA5_CTS), GPIO_FN(MFG2_IN1), - GPIO_FN(PORT244_SCIFB_CTS), - GPIO_FN(PORT245_SCIFA5_RTS), GPIO_FN(MFG2_IN2), - GPIO_FN(PORT245_SCIFB_RTS), - GPIO_FN(PORT246_SCIFA5_RXD), GPIO_FN(MFG1_OUT1), - GPIO_FN(PORT246_SCIFB_RXD), GPIO_FN(TPU1TO0), - GPIO_FN(PORT247_SCIFA5_TXD), GPIO_FN(MFG3_OUT2), - GPIO_FN(PORT247_SCIFB_TXD), GPIO_FN(TPU3TO1), - GPIO_FN(PORT248_SCIFA5_SCK), GPIO_FN(MFG2_OUT1), - GPIO_FN(PORT248_SCIFB_SCK), GPIO_FN(TPU2TO0), - GPIO_FN(PORT249_IROUT), GPIO_FN(MFG4_IN1), - GPIO_FN(SDHICLK0), GPIO_FN(TCK2_SWCLK_MC0), - GPIO_FN(SDHICD0), - GPIO_FN(SDHID0_0), GPIO_FN(TMS2_SWDIO_MC0), - GPIO_FN(SDHID0_1), GPIO_FN(TDO2_SWO0_MC0), - GPIO_FN(SDHID0_2), GPIO_FN(TDI2), - GPIO_FN(SDHID0_3), GPIO_FN(RTCK2_SWO1_MC0), - GPIO_FN(SDHICMD0), GPIO_FN(TRST2), - GPIO_FN(SDHIWP0), GPIO_FN(EDBGREQ2), - GPIO_FN(SDHICLK1), GPIO_FN(TCK3_SWCLK_MC1), - GPIO_FN(SDHID1_0), GPIO_FN(M11_SLCD_SO2), GPIO_FN(TS_SPSYNC2), - GPIO_FN(TMS3_SWDIO_MC1), - GPIO_FN(SDHID1_1), GPIO_FN(M9_SLCD_A02), GPIO_FN(TS_SDAT2), - GPIO_FN(TDO3_SWO0_MC1), - GPIO_FN(SDHID1_2), GPIO_FN(M10_SLCD_CK2), GPIO_FN(TS_SDEN2), - GPIO_FN(TDI3), - GPIO_FN(SDHID1_3), GPIO_FN(M12_SLCD_CE2), GPIO_FN(TS_SCK2), - GPIO_FN(RTCK3_SWO1_MC1), - GPIO_FN(SDHICMD1), GPIO_FN(TRST3), - GPIO_FN(RESETOUTS), -}; - -static struct pinmux_cfg_reg pinmux_config_regs[] = { - PORTCR(0, 0xe6050000), /* PORT0CR */ - PORTCR(1, 0xe6050001), /* PORT1CR */ - PORTCR(2, 0xe6050002), /* PORT2CR */ - PORTCR(3, 0xe6050003), /* PORT3CR */ - PORTCR(4, 0xe6050004), /* PORT4CR */ - PORTCR(5, 0xe6050005), /* PORT5CR */ - PORTCR(6, 0xe6050006), /* PORT6CR */ - PORTCR(7, 0xe6050007), /* PORT7CR */ - PORTCR(8, 0xe6050008), /* PORT8CR */ - PORTCR(9, 0xe6050009), /* PORT9CR */ - - PORTCR(10, 0xe605000a), /* PORT10CR */ - PORTCR(11, 0xe605000b), /* PORT11CR */ - PORTCR(12, 0xe605000c), /* PORT12CR */ - PORTCR(13, 0xe605000d), /* PORT13CR */ - PORTCR(14, 0xe605000e), /* PORT14CR */ - PORTCR(15, 0xe605000f), /* PORT15CR */ - PORTCR(16, 0xe6050010), /* PORT16CR */ - PORTCR(17, 0xe6050011), /* PORT17CR */ - PORTCR(18, 0xe6050012), /* PORT18CR */ - PORTCR(19, 0xe6050013), /* PORT19CR */ - - PORTCR(20, 0xe6050014), /* PORT20CR */ - PORTCR(21, 0xe6050015), /* PORT21CR */ - PORTCR(22, 0xe6050016), /* PORT22CR */ - PORTCR(23, 0xe6050017), /* PORT23CR */ - PORTCR(24, 0xe6050018), /* PORT24CR */ - PORTCR(25, 0xe6050019), /* PORT25CR */ - PORTCR(26, 0xe605001a), /* PORT26CR */ - PORTCR(27, 0xe605001b), /* PORT27CR */ - PORTCR(28, 0xe605001c), /* PORT28CR */ - PORTCR(29, 0xe605001d), /* PORT29CR */ - - PORTCR(30, 0xe605001e), /* PORT30CR */ - PORTCR(31, 0xe605001f), /* PORT31CR */ - PORTCR(32, 0xe6050020), /* PORT32CR */ - PORTCR(33, 0xe6050021), /* PORT33CR */ - PORTCR(34, 0xe6050022), /* PORT34CR */ - PORTCR(35, 0xe6050023), /* PORT35CR */ - PORTCR(36, 0xe6050024), /* PORT36CR */ - PORTCR(37, 0xe6050025), /* PORT37CR */ - PORTCR(38, 0xe6050026), /* PORT38CR */ - PORTCR(39, 0xe6050027), /* PORT39CR */ - - PORTCR(40, 0xe6050028), /* PORT40CR */ - PORTCR(41, 0xe6050029), /* PORT41CR */ - PORTCR(42, 0xe605002a), /* PORT42CR */ - PORTCR(43, 0xe605002b), /* PORT43CR */ - PORTCR(44, 0xe605002c), /* PORT44CR */ - PORTCR(45, 0xe605002d), /* PORT45CR */ - PORTCR(46, 0xe605002e), /* PORT46CR */ - PORTCR(47, 0xe605002f), /* PORT47CR */ - PORTCR(48, 0xe6050030), /* PORT48CR */ - PORTCR(49, 0xe6050031), /* PORT49CR */ - - PORTCR(50, 0xe6050032), /* PORT50CR */ - PORTCR(51, 0xe6050033), /* PORT51CR */ - PORTCR(52, 0xe6050034), /* PORT52CR */ - PORTCR(53, 0xe6050035), /* PORT53CR */ - PORTCR(54, 0xe6050036), /* PORT54CR */ - PORTCR(55, 0xe6050037), /* PORT55CR */ - PORTCR(56, 0xe6050038), /* PORT56CR */ - PORTCR(57, 0xe6050039), /* PORT57CR */ - PORTCR(58, 0xe605003a), /* PORT58CR */ - PORTCR(59, 0xe605003b), /* PORT59CR */ - - PORTCR(60, 0xe605003c), /* PORT60CR */ - PORTCR(61, 0xe605003d), /* PORT61CR */ - PORTCR(62, 0xe605003e), /* PORT62CR */ - PORTCR(63, 0xe605003f), /* PORT63CR */ - PORTCR(64, 0xe6050040), /* PORT64CR */ - PORTCR(65, 0xe6050041), /* PORT65CR */ - PORTCR(66, 0xe6050042), /* PORT66CR */ - PORTCR(67, 0xe6050043), /* PORT67CR */ - PORTCR(68, 0xe6050044), /* PORT68CR */ - PORTCR(69, 0xe6050045), /* PORT69CR */ - - PORTCR(70, 0xe6050046), /* PORT70CR */ - PORTCR(71, 0xe6050047), /* PORT71CR */ - PORTCR(72, 0xe6050048), /* PORT72CR */ - PORTCR(73, 0xe6050049), /* PORT73CR */ - PORTCR(74, 0xe605004a), /* PORT74CR */ - PORTCR(75, 0xe605004b), /* PORT75CR */ - PORTCR(76, 0xe605004c), /* PORT76CR */ - PORTCR(77, 0xe605004d), /* PORT77CR */ - PORTCR(78, 0xe605004e), /* PORT78CR */ - PORTCR(79, 0xe605004f), /* PORT79CR */ - - PORTCR(80, 0xe6050050), /* PORT80CR */ - PORTCR(81, 0xe6050051), /* PORT81CR */ - PORTCR(82, 0xe6050052), /* PORT82CR */ - PORTCR(83, 0xe6050053), /* PORT83CR */ - PORTCR(84, 0xe6050054), /* PORT84CR */ - PORTCR(85, 0xe6050055), /* PORT85CR */ - PORTCR(86, 0xe6050056), /* PORT86CR */ - PORTCR(87, 0xe6050057), /* PORT87CR */ - PORTCR(88, 0xe6050058), /* PORT88CR */ - PORTCR(89, 0xe6050059), /* PORT89CR */ - - PORTCR(90, 0xe605005a), /* PORT90CR */ - PORTCR(91, 0xe605005b), /* PORT91CR */ - PORTCR(92, 0xe605005c), /* PORT92CR */ - PORTCR(93, 0xe605005d), /* PORT93CR */ - PORTCR(94, 0xe605005e), /* PORT94CR */ - PORTCR(95, 0xe605005f), /* PORT95CR */ - PORTCR(96, 0xe6050060), /* PORT96CR */ - PORTCR(97, 0xe6050061), /* PORT97CR */ - PORTCR(98, 0xe6050062), /* PORT98CR */ - PORTCR(99, 0xe6050063), /* PORT99CR */ - - PORTCR(100, 0xe6050064), /* PORT100CR */ - PORTCR(101, 0xe6050065), /* PORT101CR */ - PORTCR(102, 0xe6050066), /* PORT102CR */ - PORTCR(103, 0xe6050067), /* PORT103CR */ - PORTCR(104, 0xe6050068), /* PORT104CR */ - PORTCR(105, 0xe6050069), /* PORT105CR */ - PORTCR(106, 0xe605006a), /* PORT106CR */ - PORTCR(107, 0xe605006b), /* PORT107CR */ - PORTCR(108, 0xe605006c), /* PORT108CR */ - PORTCR(109, 0xe605006d), /* PORT109CR */ - - PORTCR(110, 0xe605006e), /* PORT110CR */ - PORTCR(111, 0xe605006f), /* PORT111CR */ - PORTCR(112, 0xe6050070), /* PORT112CR */ - PORTCR(113, 0xe6050071), /* PORT113CR */ - PORTCR(114, 0xe6050072), /* PORT114CR */ - PORTCR(115, 0xe6050073), /* PORT115CR */ - PORTCR(116, 0xe6050074), /* PORT116CR */ - PORTCR(117, 0xe6050075), /* PORT117CR */ - PORTCR(118, 0xe6050076), /* PORT118CR */ - - PORTCR(128, 0xe6051080), /* PORT128CR */ - PORTCR(129, 0xe6051081), /* PORT129CR */ - - PORTCR(130, 0xe6051082), /* PORT130CR */ - PORTCR(131, 0xe6051083), /* PORT131CR */ - PORTCR(132, 0xe6051084), /* PORT132CR */ - PORTCR(133, 0xe6051085), /* PORT133CR */ - PORTCR(134, 0xe6051086), /* PORT134CR */ - PORTCR(135, 0xe6051087), /* PORT135CR */ - PORTCR(136, 0xe6051088), /* PORT136CR */ - PORTCR(137, 0xe6051089), /* PORT137CR */ - PORTCR(138, 0xe605108a), /* PORT138CR */ - PORTCR(139, 0xe605108b), /* PORT139CR */ - - PORTCR(140, 0xe605108c), /* PORT140CR */ - PORTCR(141, 0xe605108d), /* PORT141CR */ - PORTCR(142, 0xe605108e), /* PORT142CR */ - PORTCR(143, 0xe605108f), /* PORT143CR */ - PORTCR(144, 0xe6051090), /* PORT144CR */ - PORTCR(145, 0xe6051091), /* PORT145CR */ - PORTCR(146, 0xe6051092), /* PORT146CR */ - PORTCR(147, 0xe6051093), /* PORT147CR */ - PORTCR(148, 0xe6051094), /* PORT148CR */ - PORTCR(149, 0xe6051095), /* PORT149CR */ - - PORTCR(150, 0xe6051096), /* PORT150CR */ - PORTCR(151, 0xe6051097), /* PORT151CR */ - PORTCR(152, 0xe6051098), /* PORT152CR */ - PORTCR(153, 0xe6051099), /* PORT153CR */ - PORTCR(154, 0xe605109a), /* PORT154CR */ - PORTCR(155, 0xe605109b), /* PORT155CR */ - PORTCR(156, 0xe605109c), /* PORT156CR */ - PORTCR(157, 0xe605109d), /* PORT157CR */ - PORTCR(158, 0xe605109e), /* PORT158CR */ - PORTCR(159, 0xe605109f), /* PORT159CR */ - - PORTCR(160, 0xe60510a0), /* PORT160CR */ - PORTCR(161, 0xe60510a1), /* PORT161CR */ - PORTCR(162, 0xe60510a2), /* PORT162CR */ - PORTCR(163, 0xe60510a3), /* PORT163CR */ - PORTCR(164, 0xe60510a4), /* PORT164CR */ - - PORTCR(192, 0xe60520c0), /* PORT192CR */ - PORTCR(193, 0xe60520c1), /* PORT193CR */ - PORTCR(194, 0xe60520c2), /* PORT194CR */ - PORTCR(195, 0xe60520c3), /* PORT195CR */ - PORTCR(196, 0xe60520c4), /* PORT196CR */ - PORTCR(197, 0xe60520c5), /* PORT197CR */ - PORTCR(198, 0xe60520c6), /* PORT198CR */ - PORTCR(199, 0xe60520c7), /* PORT199CR */ - - PORTCR(200, 0xe60520c8), /* PORT200CR */ - PORTCR(201, 0xe60520c9), /* PORT201CR */ - PORTCR(202, 0xe60520ca), /* PORT202CR */ - PORTCR(203, 0xe60520cb), /* PORT203CR */ - PORTCR(204, 0xe60520cc), /* PORT204CR */ - PORTCR(205, 0xe60520cd), /* PORT205CR */ - PORTCR(206, 0xe60520ce), /* PORT206CR */ - PORTCR(207, 0xe60520cf), /* PORT207CR */ - PORTCR(208, 0xe60520d0), /* PORT208CR */ - PORTCR(209, 0xe60520d1), /* PORT209CR */ - - PORTCR(210, 0xe60520d2), /* PORT210CR */ - PORTCR(211, 0xe60520d3), /* PORT211CR */ - PORTCR(212, 0xe60520d4), /* PORT212CR */ - PORTCR(213, 0xe60520d5), /* PORT213CR */ - PORTCR(214, 0xe60520d6), /* PORT214CR */ - PORTCR(215, 0xe60520d7), /* PORT215CR */ - PORTCR(216, 0xe60520d8), /* PORT216CR */ - PORTCR(217, 0xe60520d9), /* PORT217CR */ - PORTCR(218, 0xe60520da), /* PORT218CR */ - PORTCR(219, 0xe60520db), /* PORT219CR */ - - PORTCR(220, 0xe60520dc), /* PORT220CR */ - PORTCR(221, 0xe60520dd), /* PORT221CR */ - PORTCR(222, 0xe60520de), /* PORT222CR */ - PORTCR(223, 0xe60520df), /* PORT223CR */ - PORTCR(224, 0xe60520e0), /* PORT224CR */ - PORTCR(225, 0xe60520e1), /* PORT225CR */ - PORTCR(226, 0xe60520e2), /* PORT226CR */ - PORTCR(227, 0xe60520e3), /* PORT227CR */ - PORTCR(228, 0xe60520e4), /* PORT228CR */ - PORTCR(229, 0xe60520e5), /* PORT229CR */ - - PORTCR(230, 0xe60520e6), /* PORT230CR */ - PORTCR(231, 0xe60520e7), /* PORT231CR */ - PORTCR(232, 0xe60520e8), /* PORT232CR */ - PORTCR(233, 0xe60520e9), /* PORT233CR */ - PORTCR(234, 0xe60520ea), /* PORT234CR */ - PORTCR(235, 0xe60520eb), /* PORT235CR */ - PORTCR(236, 0xe60520ec), /* PORT236CR */ - PORTCR(237, 0xe60520ed), /* PORT237CR */ - PORTCR(238, 0xe60520ee), /* PORT238CR */ - PORTCR(239, 0xe60520ef), /* PORT239CR */ - - PORTCR(240, 0xe60520f0), /* PORT240CR */ - PORTCR(241, 0xe60520f1), /* PORT241CR */ - PORTCR(242, 0xe60520f2), /* PORT242CR */ - PORTCR(243, 0xe60520f3), /* PORT243CR */ - PORTCR(244, 0xe60520f4), /* PORT244CR */ - PORTCR(245, 0xe60520f5), /* PORT245CR */ - PORTCR(246, 0xe60520f6), /* PORT246CR */ - PORTCR(247, 0xe60520f7), /* PORT247CR */ - PORTCR(248, 0xe60520f8), /* PORT248CR */ - PORTCR(249, 0xe60520f9), /* PORT249CR */ - - PORTCR(250, 0xe60520fa), /* PORT250CR */ - PORTCR(251, 0xe60520fb), /* PORT251CR */ - PORTCR(252, 0xe60520fc), /* PORT252CR */ - PORTCR(253, 0xe60520fd), /* PORT253CR */ - PORTCR(254, 0xe60520fe), /* PORT254CR */ - PORTCR(255, 0xe60520ff), /* PORT255CR */ - PORTCR(256, 0xe6052100), /* PORT256CR */ - PORTCR(257, 0xe6052101), /* PORT257CR */ - PORTCR(258, 0xe6052102), /* PORT258CR */ - PORTCR(259, 0xe6052103), /* PORT259CR */ - - PORTCR(260, 0xe6052104), /* PORT260CR */ - PORTCR(261, 0xe6052105), /* PORT261CR */ - PORTCR(262, 0xe6052106), /* PORT262CR */ - PORTCR(263, 0xe6052107), /* PORT263CR */ - PORTCR(264, 0xe6052108), /* PORT264CR */ - - { PINMUX_CFG_REG("MSELBCR", 0xe6058024, 32, 1) { - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - MSELBCR_MSEL17_0, MSELBCR_MSEL17_1, - MSELBCR_MSEL16_0, MSELBCR_MSEL16_1, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } - }, - { }, -}; - -static struct pinmux_data_reg pinmux_data_regs[] = { - { PINMUX_DATA_REG("PORTL031_000DR", 0xe6054000, 32) { - PORT31_DATA, PORT30_DATA, PORT29_DATA, PORT28_DATA, - PORT27_DATA, PORT26_DATA, PORT25_DATA, PORT24_DATA, - PORT23_DATA, PORT22_DATA, PORT21_DATA, PORT20_DATA, - PORT19_DATA, PORT18_DATA, PORT17_DATA, PORT16_DATA, - PORT15_DATA, PORT14_DATA, PORT13_DATA, PORT12_DATA, - PORT11_DATA, PORT10_DATA, PORT9_DATA, PORT8_DATA, - PORT7_DATA, PORT6_DATA, PORT5_DATA, PORT4_DATA, - PORT3_DATA, PORT2_DATA, PORT1_DATA, PORT0_DATA } - }, - { PINMUX_DATA_REG("PORTL063_032DR", 0xe6054004, 32) { - PORT63_DATA, PORT62_DATA, PORT61_DATA, PORT60_DATA, - PORT59_DATA, PORT58_DATA, PORT57_DATA, PORT56_DATA, - PORT55_DATA, PORT54_DATA, PORT53_DATA, PORT52_DATA, - PORT51_DATA, PORT50_DATA, PORT49_DATA, PORT48_DATA, - PORT47_DATA, PORT46_DATA, PORT45_DATA, PORT44_DATA, - PORT43_DATA, PORT42_DATA, PORT41_DATA, PORT40_DATA, - PORT39_DATA, PORT38_DATA, PORT37_DATA, PORT36_DATA, - PORT35_DATA, PORT34_DATA, PORT33_DATA, PORT32_DATA } - }, - { PINMUX_DATA_REG("PORTL095_064DR", 0xe6054008, 32) { - PORT95_DATA, PORT94_DATA, PORT93_DATA, PORT92_DATA, - PORT91_DATA, PORT90_DATA, PORT89_DATA, PORT88_DATA, - PORT87_DATA, PORT86_DATA, PORT85_DATA, PORT84_DATA, - PORT83_DATA, PORT82_DATA, PORT81_DATA, PORT80_DATA, - PORT79_DATA, PORT78_DATA, PORT77_DATA, PORT76_DATA, - PORT75_DATA, PORT74_DATA, PORT73_DATA, PORT72_DATA, - PORT71_DATA, PORT70_DATA, PORT69_DATA, PORT68_DATA, - PORT67_DATA, PORT66_DATA, PORT65_DATA, PORT64_DATA } - }, - { PINMUX_DATA_REG("PORTD127_096DR", 0xe605400C, 32) { - 0, 0, 0, 0, - 0, 0, 0, 0, - 0, PORT118_DATA, PORT117_DATA, PORT116_DATA, - PORT115_DATA, PORT114_DATA, PORT113_DATA, PORT112_DATA, - PORT111_DATA, PORT110_DATA, PORT109_DATA, PORT108_DATA, - PORT107_DATA, PORT106_DATA, PORT105_DATA, PORT104_DATA, - PORT103_DATA, PORT102_DATA, PORT101_DATA, PORT100_DATA, - PORT99_DATA, PORT98_DATA, PORT97_DATA, PORT96_DATA } - }, - { PINMUX_DATA_REG("PORTD159_128DR", 0xe6055000, 32) { - PORT159_DATA, PORT158_DATA, PORT157_DATA, PORT156_DATA, - PORT155_DATA, PORT154_DATA, PORT153_DATA, PORT152_DATA, - PORT151_DATA, PORT150_DATA, PORT149_DATA, PORT148_DATA, - PORT147_DATA, PORT146_DATA, PORT145_DATA, PORT144_DATA, - PORT143_DATA, PORT142_DATA, PORT141_DATA, PORT140_DATA, - PORT139_DATA, PORT138_DATA, PORT137_DATA, PORT136_DATA, - PORT135_DATA, PORT134_DATA, PORT133_DATA, PORT132_DATA, - PORT131_DATA, PORT130_DATA, PORT129_DATA, PORT128_DATA } - }, - { PINMUX_DATA_REG("PORTR191_160DR", 0xe6055004, 32) { - 0, 0, 0, 0, - 0, 0, 0, 0, - 0, 0, 0, 0, - 0, 0, 0, 0, - 0, 0, 0, 0, - 0, 0, 0, 0, - 0, 0, 0, PORT164_DATA, - PORT163_DATA, PORT162_DATA, PORT161_DATA, PORT160_DATA } - }, - { PINMUX_DATA_REG("PORTR223_192DR", 0xe6056000, 32) { - PORT223_DATA, PORT222_DATA, PORT221_DATA, PORT220_DATA, - PORT219_DATA, PORT218_DATA, PORT217_DATA, PORT216_DATA, - PORT215_DATA, PORT214_DATA, PORT213_DATA, PORT212_DATA, - PORT211_DATA, PORT210_DATA, PORT209_DATA, PORT208_DATA, - PORT207_DATA, PORT206_DATA, PORT205_DATA, PORT204_DATA, - PORT203_DATA, PORT202_DATA, PORT201_DATA, PORT200_DATA, - PORT199_DATA, PORT198_DATA, PORT197_DATA, PORT196_DATA, - PORT195_DATA, PORT194_DATA, PORT193_DATA, PORT192_DATA } - }, - { PINMUX_DATA_REG("PORTU255_224DR", 0xe6056004, 32) { - PORT255_DATA, PORT254_DATA, PORT253_DATA, PORT252_DATA, - PORT251_DATA, PORT250_DATA, PORT249_DATA, PORT248_DATA, - PORT247_DATA, PORT246_DATA, PORT245_DATA, PORT244_DATA, - PORT243_DATA, PORT242_DATA, PORT241_DATA, PORT240_DATA, - PORT239_DATA, PORT238_DATA, PORT237_DATA, PORT236_DATA, - PORT235_DATA, PORT234_DATA, PORT233_DATA, PORT232_DATA, - PORT231_DATA, PORT230_DATA, PORT229_DATA, PORT228_DATA, - PORT227_DATA, PORT226_DATA, PORT225_DATA, PORT224_DATA } - }, - { PINMUX_DATA_REG("PORTU287_256DR", 0xe6056008, 32) { - 0, 0, 0, 0, - 0, 0, 0, 0, - 0, 0, 0, 0, - 0, 0, 0, 0, - 0, 0, 0, 0, - 0, 0, 0, PORT264_DATA, - PORT263_DATA, PORT262_DATA, PORT261_DATA, PORT260_DATA, - PORT259_DATA, PORT258_DATA, PORT257_DATA, PORT256_DATA } - }, - { }, -}; - -static struct pinmux_info sh7377_pinmux_info = { - .name = "sh7377_pfc", - .reserved_id = PINMUX_RESERVED, - .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END }, - .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, - .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END }, - .input_pd = { PINMUX_INPUT_PULLDOWN_BEGIN, PINMUX_INPUT_PULLDOWN_END }, - .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END }, - .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END }, - .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, - - .first_gpio = GPIO_PORT0, - .last_gpio = GPIO_FN_RESETOUTS, - - .gpios = pinmux_gpios, - .cfg_regs = pinmux_config_regs, - .data_regs = pinmux_data_regs, - - .gpio_data = pinmux_data, - .gpio_data_size = ARRAY_SIZE(pinmux_data), -}; - -void sh7377_pinmux_init(void) -{ - register_pinmux(&sh7377_pinmux_info); -} diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c index 11bb1d984197..6ac242cdca7f 100644 --- a/arch/arm/mach-shmobile/setup-r8a7740.c +++ b/arch/arm/mach-shmobile/setup-r8a7740.c @@ -590,6 +590,21 @@ static struct platform_device i2c1_device = { .num_resources = ARRAY_SIZE(i2c1_resources), }; +static struct resource pmu_resources[] = { + [0] = { + .start = evt2irq(0x19a0), + .end = evt2irq(0x19a0), + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device pmu_device = { + .name = "arm-pmu", + .id = -1, + .num_resources = ARRAY_SIZE(pmu_resources), + .resource = pmu_resources, +}; + static struct platform_device *r8a7740_late_devices[] __initdata = { &i2c0_device, &i2c1_device, @@ -597,6 +612,7 @@ static struct platform_device *r8a7740_late_devices[] __initdata = { &dma1_device, &dma2_device, &usb_dma_device, + &pmu_device, }; /* @@ -747,7 +763,7 @@ static const char *r8a7740_boards_compat_dt[] __initdata = { NULL, }; -DT_MACHINE_START(SH7372_DT, "Generic R8A7740 (Flattened Device Tree)") +DT_MACHINE_START(R8A7740_DT, "Generic R8A7740 (Flattened Device Tree)") .map_io = r8a7740_map_io, .init_early = r8a7740_add_early_devices_dt, .init_irq = r8a7740_init_irq, diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c index 2917668f0091..7a1ad4f38539 100644 --- a/arch/arm/mach-shmobile/setup-r8a7779.c +++ b/arch/arm/mach-shmobile/setup-r8a7779.c @@ -229,6 +229,79 @@ static struct platform_device tmu01_device = { .num_resources = ARRAY_SIZE(tmu01_resources), }; +/* I2C */ +static struct resource rcar_i2c0_res[] = { + { + .start = 0xffc70000, + .end = 0xffc70fff, + .flags = IORESOURCE_MEM, + }, { + .start = gic_spi(79), + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device i2c0_device = { + .name = "i2c-rcar", + .id = 0, + .resource = rcar_i2c0_res, + .num_resources = ARRAY_SIZE(rcar_i2c0_res), +}; + +static struct resource rcar_i2c1_res[] = { + { + .start = 0xffc71000, + .end = 0xffc71fff, + .flags = IORESOURCE_MEM, + }, { + .start = gic_spi(82), + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device i2c1_device = { + .name = "i2c-rcar", + .id = 1, + .resource = rcar_i2c1_res, + .num_resources = ARRAY_SIZE(rcar_i2c1_res), +}; + +static struct resource rcar_i2c2_res[] = { + { + .start = 0xffc72000, + .end = 0xffc72fff, + .flags = IORESOURCE_MEM, + }, { + .start = gic_spi(80), + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device i2c2_device = { + .name = "i2c-rcar", + .id = 2, + .resource = rcar_i2c2_res, + .num_resources = ARRAY_SIZE(rcar_i2c2_res), +}; + +static struct resource rcar_i2c3_res[] = { + { + .start = 0xffc73000, + .end = 0xffc73fff, + .flags = IORESOURCE_MEM, + }, { + .start = gic_spi(81), + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device i2c3_device = { + .name = "i2c-rcar", + .id = 3, + .resource = rcar_i2c3_res, + .num_resources = ARRAY_SIZE(rcar_i2c3_res), +}; + static struct platform_device *r8a7779_early_devices[] __initdata = { &scif0_device, &scif1_device, @@ -238,6 +311,10 @@ static struct platform_device *r8a7779_early_devices[] __initdata = { &scif5_device, &tmu00_device, &tmu01_device, + &i2c0_device, + &i2c1_device, + &i2c2_device, + &i2c3_device, }; static struct platform_device *r8a7779_late_devices[] __initdata = { @@ -247,7 +324,7 @@ void __init r8a7779_add_standard_devices(void) { #ifdef CONFIG_CACHE_L2X0 /* Early BRESP enable, Shared attribute override enable, 64K*16way */ - l2x0_init((void __iomem __force *)(0xf0100000), 0x40470000, 0x82000fff); + l2x0_init(IOMEM(0xf0100000), 0x40470000, 0x82000fff); #endif r8a7779_pm_init(); diff --git a/arch/arm/mach-shmobile/setup-sh7367.c b/arch/arm/mach-shmobile/setup-sh7367.c deleted file mode 100644 index e647f5410879..000000000000 --- a/arch/arm/mach-shmobile/setup-sh7367.c +++ /dev/null @@ -1,481 +0,0 @@ -/* - * sh7367 processor support - * - * Copyright (C) 2010 Magnus Damm - * Copyright (C) 2008 Yoshihiro Shimoda - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/interrupt.h> -#include <linux/irq.h> -#include <linux/platform_device.h> -#include <linux/uio_driver.h> -#include <linux/delay.h> -#include <linux/input.h> -#include <linux/io.h> -#include <linux/serial_sci.h> -#include <linux/sh_timer.h> -#include <mach/hardware.h> -#include <mach/common.h> -#include <mach/irqs.h> -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/time.h> - -static struct map_desc sh7367_io_desc[] __initdata = { - /* create a 1:1 entity map for 0xe6xxxxxx - * used by CPGA, INTC and PFC. - */ - { - .virtual = 0xe6000000, - .pfn = __phys_to_pfn(0xe6000000), - .length = 256 << 20, - .type = MT_DEVICE_NONSHARED - }, -}; - -void __init sh7367_map_io(void) -{ - iotable_init(sh7367_io_desc, ARRAY_SIZE(sh7367_io_desc)); -} - -/* SCIFA0 */ -static struct plat_sci_port scif0_platform_data = { - .mapbase = 0xe6c40000, - .flags = UPF_BOOT_AUTOCONF, - .scscr = SCSCR_RE | SCSCR_TE, - .scbrr_algo_id = SCBRR_ALGO_4, - .type = PORT_SCIFA, - .irqs = { evt2irq(0xc00), evt2irq(0xc00), - evt2irq(0xc00), evt2irq(0xc00) }, -}; - -static struct platform_device scif0_device = { - .name = "sh-sci", - .id = 0, - .dev = { - .platform_data = &scif0_platform_data, - }, -}; - -/* SCIFA1 */ -static struct plat_sci_port scif1_platform_data = { - .mapbase = 0xe6c50000, - .flags = UPF_BOOT_AUTOCONF, - .scscr = SCSCR_RE | SCSCR_TE, - .scbrr_algo_id = SCBRR_ALGO_4, - .type = PORT_SCIFA, - .irqs = { evt2irq(0xc20), evt2irq(0xc20), - evt2irq(0xc20), evt2irq(0xc20) }, -}; - -static struct platform_device scif1_device = { - .name = "sh-sci", - .id = 1, - .dev = { - .platform_data = &scif1_platform_data, - }, -}; - -/* SCIFA2 */ -static struct plat_sci_port scif2_platform_data = { - .mapbase = 0xe6c60000, - .flags = UPF_BOOT_AUTOCONF, - .scscr = SCSCR_RE | SCSCR_TE, - .scbrr_algo_id = SCBRR_ALGO_4, - .type = PORT_SCIFA, - .irqs = { evt2irq(0xc40), evt2irq(0xc40), - evt2irq(0xc40), evt2irq(0xc40) }, -}; - -static struct platform_device scif2_device = { - .name = "sh-sci", - .id = 2, - .dev = { - .platform_data = &scif2_platform_data, - }, -}; - -/* SCIFA3 */ -static struct plat_sci_port scif3_platform_data = { - .mapbase = 0xe6c70000, - .flags = UPF_BOOT_AUTOCONF, - .scscr = SCSCR_RE | SCSCR_TE, - .scbrr_algo_id = SCBRR_ALGO_4, - .type = PORT_SCIFA, - .irqs = { evt2irq(0xc60), evt2irq(0xc60), - evt2irq(0xc60), evt2irq(0xc60) }, -}; - -static struct platform_device scif3_device = { - .name = "sh-sci", - .id = 3, - .dev = { - .platform_data = &scif3_platform_data, - }, -}; - -/* SCIFA4 */ -static struct plat_sci_port scif4_platform_data = { - .mapbase = 0xe6c80000, - .flags = UPF_BOOT_AUTOCONF, - .scscr = SCSCR_RE | SCSCR_TE, - .scbrr_algo_id = SCBRR_ALGO_4, - .type = PORT_SCIFA, - .irqs = { evt2irq(0xd20), evt2irq(0xd20), - evt2irq(0xd20), evt2irq(0xd20) }, -}; - -static struct platform_device scif4_device = { - .name = "sh-sci", - .id = 4, - .dev = { - .platform_data = &scif4_platform_data, - }, -}; - -/* SCIFA5 */ -static struct plat_sci_port scif5_platform_data = { - .mapbase = 0xe6cb0000, - .flags = UPF_BOOT_AUTOCONF, - .scscr = SCSCR_RE | SCSCR_TE, - .scbrr_algo_id = SCBRR_ALGO_4, - .type = PORT_SCIFA, - .irqs = { evt2irq(0xd40), evt2irq(0xd40), - evt2irq(0xd40), evt2irq(0xd40) }, -}; - -static struct platform_device scif5_device = { - .name = "sh-sci", - .id = 5, - .dev = { - .platform_data = &scif5_platform_data, - }, -}; - -/* SCIFB */ -static struct plat_sci_port scif6_platform_data = { - .mapbase = 0xe6c30000, - .flags = UPF_BOOT_AUTOCONF, - .scscr = SCSCR_RE | SCSCR_TE, - .scbrr_algo_id = SCBRR_ALGO_4, - .type = PORT_SCIFB, - .irqs = { evt2irq(0xd60), evt2irq(0xd60), - evt2irq(0xd60), evt2irq(0xd60) }, -}; - -static struct platform_device scif6_device = { - .name = "sh-sci", - .id = 6, - .dev = { - .platform_data = &scif6_platform_data, - }, -}; - -static struct sh_timer_config cmt10_platform_data = { - .name = "CMT10", - .channel_offset = 0x10, - .timer_bit = 0, - .clockevent_rating = 125, - .clocksource_rating = 125, -}; - -static struct resource cmt10_resources[] = { - [0] = { - .name = "CMT10", - .start = 0xe6138010, - .end = 0xe613801b, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = evt2irq(0xb00), /* CMT1_CMT10 */ - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device cmt10_device = { - .name = "sh_cmt", - .id = 10, - .dev = { - .platform_data = &cmt10_platform_data, - }, - .resource = cmt10_resources, - .num_resources = ARRAY_SIZE(cmt10_resources), -}; - -/* VPU */ -static struct uio_info vpu_platform_data = { - .name = "VPU5", - .version = "0", - .irq = intcs_evt2irq(0x980), -}; - -static struct resource vpu_resources[] = { - [0] = { - .name = "VPU", - .start = 0xfe900000, - .end = 0xfe902807, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device vpu_device = { - .name = "uio_pdrv_genirq", - .id = 0, - .dev = { - .platform_data = &vpu_platform_data, - }, - .resource = vpu_resources, - .num_resources = ARRAY_SIZE(vpu_resources), -}; - -/* VEU0 */ -static struct uio_info veu0_platform_data = { - .name = "VEU0", - .version = "0", - .irq = intcs_evt2irq(0x700), -}; - -static struct resource veu0_resources[] = { - [0] = { - .name = "VEU0", - .start = 0xfe920000, - .end = 0xfe9200b7, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device veu0_device = { - .name = "uio_pdrv_genirq", - .id = 1, - .dev = { - .platform_data = &veu0_platform_data, - }, - .resource = veu0_resources, - .num_resources = ARRAY_SIZE(veu0_resources), -}; - -/* VEU1 */ -static struct uio_info veu1_platform_data = { - .name = "VEU1", - .version = "0", - .irq = intcs_evt2irq(0x720), -}; - -static struct resource veu1_resources[] = { - [0] = { - .name = "VEU1", - .start = 0xfe924000, - .end = 0xfe9240b7, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device veu1_device = { - .name = "uio_pdrv_genirq", - .id = 2, - .dev = { - .platform_data = &veu1_platform_data, - }, - .resource = veu1_resources, - .num_resources = ARRAY_SIZE(veu1_resources), -}; - -/* VEU2 */ -static struct uio_info veu2_platform_data = { - .name = "VEU2", - .version = "0", - .irq = intcs_evt2irq(0x740), -}; - -static struct resource veu2_resources[] = { - [0] = { - .name = "VEU2", - .start = 0xfe928000, - .end = 0xfe9280b7, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device veu2_device = { - .name = "uio_pdrv_genirq", - .id = 3, - .dev = { - .platform_data = &veu2_platform_data, - }, - .resource = veu2_resources, - .num_resources = ARRAY_SIZE(veu2_resources), -}; - -/* VEU3 */ -static struct uio_info veu3_platform_data = { - .name = "VEU3", - .version = "0", - .irq = intcs_evt2irq(0x760), -}; - -static struct resource veu3_resources[] = { - [0] = { - .name = "VEU3", - .start = 0xfe92c000, - .end = 0xfe92c0b7, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device veu3_device = { - .name = "uio_pdrv_genirq", - .id = 4, - .dev = { - .platform_data = &veu3_platform_data, - }, - .resource = veu3_resources, - .num_resources = ARRAY_SIZE(veu3_resources), -}; - -/* VEU2H */ -static struct uio_info veu2h_platform_data = { - .name = "VEU2H", - .version = "0", - .irq = intcs_evt2irq(0x520), -}; - -static struct resource veu2h_resources[] = { - [0] = { - .name = "VEU2H", - .start = 0xfe93c000, - .end = 0xfe93c27b, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device veu2h_device = { - .name = "uio_pdrv_genirq", - .id = 5, - .dev = { - .platform_data = &veu2h_platform_data, - }, - .resource = veu2h_resources, - .num_resources = ARRAY_SIZE(veu2h_resources), -}; - -/* JPU */ -static struct uio_info jpu_platform_data = { - .name = "JPU", - .version = "0", - .irq = intcs_evt2irq(0x560), -}; - -static struct resource jpu_resources[] = { - [0] = { - .name = "JPU", - .start = 0xfe980000, - .end = 0xfe9902d3, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device jpu_device = { - .name = "uio_pdrv_genirq", - .id = 6, - .dev = { - .platform_data = &jpu_platform_data, - }, - .resource = jpu_resources, - .num_resources = ARRAY_SIZE(jpu_resources), -}; - -/* SPU1 */ -static struct uio_info spu1_platform_data = { - .name = "SPU1", - .version = "0", - .irq = evt2irq(0xfc0), -}; - -static struct resource spu1_resources[] = { - [0] = { - .name = "SPU1", - .start = 0xfe300000, - .end = 0xfe3fffff, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device spu1_device = { - .name = "uio_pdrv_genirq", - .id = 7, - .dev = { - .platform_data = &spu1_platform_data, - }, - .resource = spu1_resources, - .num_resources = ARRAY_SIZE(spu1_resources), -}; - -static struct platform_device *sh7367_early_devices[] __initdata = { - &scif0_device, - &scif1_device, - &scif2_device, - &scif3_device, - &scif4_device, - &scif5_device, - &scif6_device, - &cmt10_device, -}; - -static struct platform_device *sh7367_devices[] __initdata = { - &vpu_device, - &veu0_device, - &veu1_device, - &veu2_device, - &veu3_device, - &veu2h_device, - &jpu_device, - &spu1_device, -}; - -void __init sh7367_add_standard_devices(void) -{ - platform_add_devices(sh7367_early_devices, - ARRAY_SIZE(sh7367_early_devices)); - - platform_add_devices(sh7367_devices, - ARRAY_SIZE(sh7367_devices)); -} - -static void __init sh7367_earlytimer_init(void) -{ - sh7367_clock_init(); - shmobile_earlytimer_init(); -} - -#define SYMSTPCR2 IOMEM(0xe6158048) -#define SYMSTPCR2_CMT1 (1 << 29) - -void __init sh7367_add_early_devices(void) -{ - /* enable clock to CMT1 */ - __raw_writel(__raw_readl(SYMSTPCR2) & ~SYMSTPCR2_CMT1, SYMSTPCR2); - - early_platform_add_devices(sh7367_early_devices, - ARRAY_SIZE(sh7367_early_devices)); - - /* setup early console here as well */ - shmobile_setup_console(); - - /* override timer setup with soc-specific code */ - shmobile_timer.init = sh7367_earlytimer_init; -} diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c index a07954fbcd22..a36011184c16 100644 --- a/arch/arm/mach-shmobile/setup-sh7372.c +++ b/arch/arm/mach-shmobile/setup-sh7372.c @@ -408,6 +408,26 @@ static const struct sh_dmae_slave_config sh7372_dmae_slaves[] = { .chcr = CHCR_RX(XMIT_SZ_8BIT), .mid_rid = 0x3e, }, { + .slave_id = SHDMA_SLAVE_FLCTL0_TX, + .addr = 0xe6a30050, + .chcr = CHCR_TX(XMIT_SZ_32BIT), + .mid_rid = 0x83, + }, { + .slave_id = SHDMA_SLAVE_FLCTL0_RX, + .addr = 0xe6a30050, + .chcr = CHCR_RX(XMIT_SZ_32BIT), + .mid_rid = 0x83, + }, { + .slave_id = SHDMA_SLAVE_FLCTL1_TX, + .addr = 0xe6a30060, + .chcr = CHCR_TX(XMIT_SZ_32BIT), + .mid_rid = 0x87, + }, { + .slave_id = SHDMA_SLAVE_FLCTL1_RX, + .addr = 0xe6a30060, + .chcr = CHCR_RX(XMIT_SZ_32BIT), + .mid_rid = 0x87, + }, { .slave_id = SHDMA_SLAVE_SDHI0_TX, .addr = 0xe6850030, .chcr = CHCR_TX(XMIT_SZ_16BIT), diff --git a/arch/arm/mach-shmobile/setup-sh7377.c b/arch/arm/mach-shmobile/setup-sh7377.c deleted file mode 100644 index edcf98bb7012..000000000000 --- a/arch/arm/mach-shmobile/setup-sh7377.c +++ /dev/null @@ -1,549 +0,0 @@ -/* - * sh7377 processor support - * - * Copyright (C) 2010 Magnus Damm - * Copyright (C) 2008 Yoshihiro Shimoda - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/interrupt.h> -#include <linux/irq.h> -#include <linux/platform_device.h> -#include <linux/of_platform.h> -#include <linux/uio_driver.h> -#include <linux/delay.h> -#include <linux/input.h> -#include <linux/io.h> -#include <linux/serial_sci.h> -#include <linux/sh_intc.h> -#include <linux/sh_timer.h> -#include <mach/hardware.h> -#include <mach/common.h> -#include <asm/mach/map.h> -#include <mach/irqs.h> -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/time.h> - -static struct map_desc sh7377_io_desc[] __initdata = { - /* create a 1:1 entity map for 0xe6xxxxxx - * used by CPGA, INTC and PFC. - */ - { - .virtual = 0xe6000000, - .pfn = __phys_to_pfn(0xe6000000), - .length = 256 << 20, - .type = MT_DEVICE_NONSHARED - }, -}; - -void __init sh7377_map_io(void) -{ - iotable_init(sh7377_io_desc, ARRAY_SIZE(sh7377_io_desc)); -} - -/* SCIFA0 */ -static struct plat_sci_port scif0_platform_data = { - .mapbase = 0xe6c40000, - .flags = UPF_BOOT_AUTOCONF, - .scscr = SCSCR_RE | SCSCR_TE, - .scbrr_algo_id = SCBRR_ALGO_4, - .type = PORT_SCIFA, - .irqs = { evt2irq(0xc00), evt2irq(0xc00), - evt2irq(0xc00), evt2irq(0xc00) }, -}; - -static struct platform_device scif0_device = { - .name = "sh-sci", - .id = 0, - .dev = { - .platform_data = &scif0_platform_data, - }, -}; - -/* SCIFA1 */ -static struct plat_sci_port scif1_platform_data = { - .mapbase = 0xe6c50000, - .flags = UPF_BOOT_AUTOCONF, - .scscr = SCSCR_RE | SCSCR_TE, - .scbrr_algo_id = SCBRR_ALGO_4, - .type = PORT_SCIFA, - .irqs = { evt2irq(0xc20), evt2irq(0xc20), - evt2irq(0xc20), evt2irq(0xc20) }, -}; - -static struct platform_device scif1_device = { - .name = "sh-sci", - .id = 1, - .dev = { - .platform_data = &scif1_platform_data, - }, -}; - -/* SCIFA2 */ -static struct plat_sci_port scif2_platform_data = { - .mapbase = 0xe6c60000, - .flags = UPF_BOOT_AUTOCONF, - .scscr = SCSCR_RE | SCSCR_TE, - .scbrr_algo_id = SCBRR_ALGO_4, - .type = PORT_SCIFA, - .irqs = { evt2irq(0xc40), evt2irq(0xc40), - evt2irq(0xc40), evt2irq(0xc40) }, -}; - -static struct platform_device scif2_device = { - .name = "sh-sci", - .id = 2, - .dev = { - .platform_data = &scif2_platform_data, - }, -}; - -/* SCIFA3 */ -static struct plat_sci_port scif3_platform_data = { - .mapbase = 0xe6c70000, - .flags = UPF_BOOT_AUTOCONF, - .scscr = SCSCR_RE | SCSCR_TE, - .scbrr_algo_id = SCBRR_ALGO_4, - .type = PORT_SCIFA, - .irqs = { evt2irq(0xc60), evt2irq(0xc60), - evt2irq(0xc60), evt2irq(0xc60) }, -}; - -static struct platform_device scif3_device = { - .name = "sh-sci", - .id = 3, - .dev = { - .platform_data = &scif3_platform_data, - }, -}; - -/* SCIFA4 */ -static struct plat_sci_port scif4_platform_data = { - .mapbase = 0xe6c80000, - .flags = UPF_BOOT_AUTOCONF, - .scscr = SCSCR_RE | SCSCR_TE, - .scbrr_algo_id = SCBRR_ALGO_4, - .type = PORT_SCIFA, - .irqs = { evt2irq(0xd20), evt2irq(0xd20), - evt2irq(0xd20), evt2irq(0xd20) }, -}; - -static struct platform_device scif4_device = { - .name = "sh-sci", - .id = 4, - .dev = { - .platform_data = &scif4_platform_data, - }, -}; - -/* SCIFA5 */ -static struct plat_sci_port scif5_platform_data = { - .mapbase = 0xe6cb0000, - .flags = UPF_BOOT_AUTOCONF, - .scscr = SCSCR_RE | SCSCR_TE, - .scbrr_algo_id = SCBRR_ALGO_4, - .type = PORT_SCIFA, - .irqs = { evt2irq(0xd40), evt2irq(0xd40), - evt2irq(0xd40), evt2irq(0xd40) }, -}; - -static struct platform_device scif5_device = { - .name = "sh-sci", - .id = 5, - .dev = { - .platform_data = &scif5_platform_data, - }, -}; - -/* SCIFA6 */ -static struct plat_sci_port scif6_platform_data = { - .mapbase = 0xe6cc0000, - .flags = UPF_BOOT_AUTOCONF, - .scscr = SCSCR_RE | SCSCR_TE, - .scbrr_algo_id = SCBRR_ALGO_4, - .type = PORT_SCIFA, - .irqs = { intcs_evt2irq(0x1a80), intcs_evt2irq(0x1a80), - intcs_evt2irq(0x1a80), intcs_evt2irq(0x1a80) }, -}; - -static struct platform_device scif6_device = { - .name = "sh-sci", - .id = 6, - .dev = { - .platform_data = &scif6_platform_data, - }, -}; - -/* SCIFB */ -static struct plat_sci_port scif7_platform_data = { - .mapbase = 0xe6c30000, - .flags = UPF_BOOT_AUTOCONF, - .scscr = SCSCR_RE | SCSCR_TE, - .scbrr_algo_id = SCBRR_ALGO_4, - .type = PORT_SCIFB, - .irqs = { evt2irq(0xd60), evt2irq(0xd60), - evt2irq(0xd60), evt2irq(0xd60) }, -}; - -static struct platform_device scif7_device = { - .name = "sh-sci", - .id = 7, - .dev = { - .platform_data = &scif7_platform_data, - }, -}; - -static struct sh_timer_config cmt10_platform_data = { - .name = "CMT10", - .channel_offset = 0x10, - .timer_bit = 0, - .clockevent_rating = 125, - .clocksource_rating = 125, -}; - -static struct resource cmt10_resources[] = { - [0] = { - .name = "CMT10", - .start = 0xe6138010, - .end = 0xe613801b, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = evt2irq(0xb00), /* CMT1_CMT10 */ - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device cmt10_device = { - .name = "sh_cmt", - .id = 10, - .dev = { - .platform_data = &cmt10_platform_data, - }, - .resource = cmt10_resources, - .num_resources = ARRAY_SIZE(cmt10_resources), -}; - -/* VPU */ -static struct uio_info vpu_platform_data = { - .name = "VPU5HG", - .version = "0", - .irq = intcs_evt2irq(0x980), -}; - -static struct resource vpu_resources[] = { - [0] = { - .name = "VPU", - .start = 0xfe900000, - .end = 0xfe900157, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device vpu_device = { - .name = "uio_pdrv_genirq", - .id = 0, - .dev = { - .platform_data = &vpu_platform_data, - }, - .resource = vpu_resources, - .num_resources = ARRAY_SIZE(vpu_resources), -}; - -/* VEU0 */ -static struct uio_info veu0_platform_data = { - .name = "VEU0", - .version = "0", - .irq = intcs_evt2irq(0x700), -}; - -static struct resource veu0_resources[] = { - [0] = { - .name = "VEU0", - .start = 0xfe920000, - .end = 0xfe9200cb, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device veu0_device = { - .name = "uio_pdrv_genirq", - .id = 1, - .dev = { - .platform_data = &veu0_platform_data, - }, - .resource = veu0_resources, - .num_resources = ARRAY_SIZE(veu0_resources), -}; - -/* VEU1 */ -static struct uio_info veu1_platform_data = { - .name = "VEU1", - .version = "0", - .irq = intcs_evt2irq(0x720), -}; - -static struct resource veu1_resources[] = { - [0] = { - .name = "VEU1", - .start = 0xfe924000, - .end = 0xfe9240cb, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device veu1_device = { - .name = "uio_pdrv_genirq", - .id = 2, - .dev = { - .platform_data = &veu1_platform_data, - }, - .resource = veu1_resources, - .num_resources = ARRAY_SIZE(veu1_resources), -}; - -/* VEU2 */ -static struct uio_info veu2_platform_data = { - .name = "VEU2", - .version = "0", - .irq = intcs_evt2irq(0x740), -}; - -static struct resource veu2_resources[] = { - [0] = { - .name = "VEU2", - .start = 0xfe928000, - .end = 0xfe928307, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device veu2_device = { - .name = "uio_pdrv_genirq", - .id = 3, - .dev = { - .platform_data = &veu2_platform_data, - }, - .resource = veu2_resources, - .num_resources = ARRAY_SIZE(veu2_resources), -}; - -/* VEU3 */ -static struct uio_info veu3_platform_data = { - .name = "VEU3", - .version = "0", - .irq = intcs_evt2irq(0x760), -}; - -static struct resource veu3_resources[] = { - [0] = { - .name = "VEU3", - .start = 0xfe92c000, - .end = 0xfe92c307, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device veu3_device = { - .name = "uio_pdrv_genirq", - .id = 4, - .dev = { - .platform_data = &veu3_platform_data, - }, - .resource = veu3_resources, - .num_resources = ARRAY_SIZE(veu3_resources), -}; - -/* JPU */ -static struct uio_info jpu_platform_data = { - .name = "JPU", - .version = "0", - .irq = intcs_evt2irq(0x560), -}; - -static struct resource jpu_resources[] = { - [0] = { - .name = "JPU", - .start = 0xfe980000, - .end = 0xfe9902d3, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device jpu_device = { - .name = "uio_pdrv_genirq", - .id = 5, - .dev = { - .platform_data = &jpu_platform_data, - }, - .resource = jpu_resources, - .num_resources = ARRAY_SIZE(jpu_resources), -}; - -/* SPU2DSP0 */ -static struct uio_info spu0_platform_data = { - .name = "SPU2DSP0", - .version = "0", - .irq = evt2irq(0x1800), -}; - -static struct resource spu0_resources[] = { - [0] = { - .name = "SPU2DSP0", - .start = 0xfe200000, - .end = 0xfe2fffff, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device spu0_device = { - .name = "uio_pdrv_genirq", - .id = 6, - .dev = { - .platform_data = &spu0_platform_data, - }, - .resource = spu0_resources, - .num_resources = ARRAY_SIZE(spu0_resources), -}; - -/* SPU2DSP1 */ -static struct uio_info spu1_platform_data = { - .name = "SPU2DSP1", - .version = "0", - .irq = evt2irq(0x1820), -}; - -static struct resource spu1_resources[] = { - [0] = { - .name = "SPU2DSP1", - .start = 0xfe300000, - .end = 0xfe3fffff, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device spu1_device = { - .name = "uio_pdrv_genirq", - .id = 7, - .dev = { - .platform_data = &spu1_platform_data, - }, - .resource = spu1_resources, - .num_resources = ARRAY_SIZE(spu1_resources), -}; - -static struct platform_device *sh7377_early_devices[] __initdata = { - &scif0_device, - &scif1_device, - &scif2_device, - &scif3_device, - &scif4_device, - &scif5_device, - &scif6_device, - &scif7_device, - &cmt10_device, -}; - -static struct platform_device *sh7377_devices[] __initdata = { - &vpu_device, - &veu0_device, - &veu1_device, - &veu2_device, - &veu3_device, - &jpu_device, - &spu0_device, - &spu1_device, -}; - -void __init sh7377_add_standard_devices(void) -{ - platform_add_devices(sh7377_early_devices, - ARRAY_SIZE(sh7377_early_devices)); - - platform_add_devices(sh7377_devices, - ARRAY_SIZE(sh7377_devices)); -} - -static void __init sh7377_earlytimer_init(void) -{ - sh7377_clock_init(); - shmobile_earlytimer_init(); -} - -#define SMSTPCR3 IOMEM(0xe615013c) -#define SMSTPCR3_CMT1 (1 << 29) - -void __init sh7377_add_early_devices(void) -{ - /* enable clock to CMT1 */ - __raw_writel(__raw_readl(SMSTPCR3) & ~SMSTPCR3_CMT1, SMSTPCR3); - - early_platform_add_devices(sh7377_early_devices, - ARRAY_SIZE(sh7377_early_devices)); - - /* setup early console here as well */ - shmobile_setup_console(); - - /* override timer setup with soc-specific code */ - shmobile_timer.init = sh7377_earlytimer_init; -} - -#ifdef CONFIG_USE_OF - -void __init sh7377_add_early_devices_dt(void) -{ - shmobile_setup_delay(600, 1, 3); /* Cortex-A8 @ 600MHz */ - - early_platform_add_devices(sh7377_early_devices, - ARRAY_SIZE(sh7377_early_devices)); - - /* setup early console here as well */ - shmobile_setup_console(); -} - -static const struct of_dev_auxdata sh7377_auxdata_lookup[] __initconst = { - { } -}; - -void __init sh7377_add_standard_devices_dt(void) -{ - /* clocks are setup late during boot in the case of DT */ - sh7377_clock_init(); - - platform_add_devices(sh7377_early_devices, - ARRAY_SIZE(sh7377_early_devices)); - - of_platform_populate(NULL, of_default_bus_match_table, - sh7377_auxdata_lookup, NULL); -} - -static const char *sh7377_boards_compat_dt[] __initdata = { - "renesas,sh7377", - NULL, -}; - -DT_MACHINE_START(SH7377_DT, "Generic SH7377 (Flattened Device Tree)") - .map_io = sh7377_map_io, - .init_early = sh7377_add_early_devices_dt, - .init_irq = sh7377_init_irq, - .handle_irq = shmobile_handle_irq_intc, - .init_machine = sh7377_add_standard_devices_dt, - .timer = &shmobile_timer, - .dt_compat = sh7377_boards_compat_dt, -MACHINE_END - -#endif /* CONFIG_USE_OF */ diff --git a/arch/arm/mach-spear13xx/include/mach/spear1310_misc_regs.h b/arch/arm/mach-spear13xx/include/mach/spear1310_misc_regs.h deleted file mode 100644 index e69de29bb2d1..000000000000 --- a/arch/arm/mach-spear13xx/include/mach/spear1310_misc_regs.h +++ /dev/null diff --git a/arch/arm/mach-spear13xx/include/mach/spear1340_misc_regs.h b/arch/arm/mach-spear13xx/include/mach/spear1340_misc_regs.h deleted file mode 100644 index e69de29bb2d1..000000000000 --- a/arch/arm/mach-spear13xx/include/mach/spear1340_misc_regs.h +++ /dev/null diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c index 2236cbd03cd7..1f3fbc2bb776 100644 --- a/arch/arm/mach-ux500/cpu.c +++ b/arch/arm/mach-ux500/cpu.c @@ -16,6 +16,7 @@ #include <linux/stat.h> #include <linux/of.h> #include <linux/of_irq.h> +#include <linux/irq.h> #include <linux/platform_data/clk-ux500.h> #include <asm/hardware/gic.h> diff --git a/arch/arm/mach-vexpress/Kconfig b/arch/arm/mach-vexpress/Kconfig index c95296066203..99e63f5f99d1 100644 --- a/arch/arm/mach-vexpress/Kconfig +++ b/arch/arm/mach-vexpress/Kconfig @@ -1,11 +1,12 @@ config ARCH_VEXPRESS bool "ARM Ltd. Versatile Express family" if ARCH_MULTI_V7 - select ARCH_WANT_OPTIONAL_GPIOLIB + select ARCH_REQUIRE_GPIOLIB select ARM_AMBA select ARM_GIC select ARM_TIMER_SP804 select CLKDEV_LOOKUP select COMMON_CLK + select COMMON_CLK_VERSATILE select CPU_V7 select GENERIC_CLOCKEVENTS select HAVE_CLK @@ -17,6 +18,7 @@ config ARCH_VEXPRESS select PLAT_VERSATILE select PLAT_VERSATILE_CLCD select REGULATOR_FIXED_VOLTAGE if REGULATOR + select VEXPRESS_CONFIG help This option enables support for systems using Cortex processor based ARM core and logic (FPGA) tiles on the Versatile Express motherboard, diff --git a/arch/arm/mach-vexpress/Makefile b/arch/arm/mach-vexpress/Makefile index 42703e8b4d3b..80b64971fbdd 100644 --- a/arch/arm/mach-vexpress/Makefile +++ b/arch/arm/mach-vexpress/Makefile @@ -4,7 +4,7 @@ ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include \ -I$(srctree)/arch/arm/plat-versatile/include -obj-y := v2m.o +obj-y := v2m.o reset.o obj-$(CONFIG_ARCH_VEXPRESS_CA9X4) += ct-ca9x4.o obj-$(CONFIG_SMP) += platsmp.o obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o diff --git a/arch/arm/mach-vexpress/ct-ca9x4.c b/arch/arm/mach-vexpress/ct-ca9x4.c index 4f471fa3e3c5..60838ddb8564 100644 --- a/arch/arm/mach-vexpress/ct-ca9x4.c +++ b/arch/arm/mach-vexpress/ct-ca9x4.c @@ -9,6 +9,7 @@ #include <linux/amba/bus.h> #include <linux/amba/clcd.h> #include <linux/clkdev.h> +#include <linux/vexpress.h> #include <asm/hardware/arm_timer.h> #include <asm/hardware/cache-l2x0.h> @@ -64,19 +65,6 @@ static void __init ct_ca9x4_init_irq(void) ca9x4_twd_init(); } -static void ct_ca9x4_clcd_enable(struct clcd_fb *fb) -{ - u32 site = v2m_get_master_site(); - - /* - * Old firmware was using the "site" component of the command - * to control the DVI muxer (while it should be always 0 ie. MB). - * Newer firmware uses the data register. Keep both for compatibility. - */ - v2m_cfg_write(SYS_CFG_MUXFPGA | SYS_CFG_SITE(site), site); - v2m_cfg_write(SYS_CFG_DVIMODE | SYS_CFG_SITE(SYS_CFG_SITE_MB), 2); -} - static int ct_ca9x4_clcd_setup(struct clcd_fb *fb) { unsigned long framesize = 1024 * 768 * 2; @@ -93,7 +81,6 @@ static struct clcd_board ct_ca9x4_clcd_data = { .caps = CLCD_CAP_5551 | CLCD_CAP_565, .check = clcdfb_check, .decode = clcdfb_decode, - .enable = ct_ca9x4_clcd_enable, .setup = ct_ca9x4_clcd_setup, .mmap = versatile_clcd_mmap_dma, .remove = versatile_clcd_remove_dma, @@ -111,14 +98,6 @@ static struct amba_device *ct_ca9x4_amba_devs[] __initdata = { &gpio_device, }; - -static struct v2m_osc ct_osc1 = { - .osc = 1, - .rate_min = 10000000, - .rate_max = 80000000, - .rate_default = 23750000, -}; - static struct resource pmu_resources[] = { [0] = { .start = IRQ_CT_CA9X4_PMU_CPU0, @@ -149,10 +128,18 @@ static struct platform_device pmu_device = { .resource = pmu_resources, }; +static struct platform_device osc1_device = { + .name = "vexpress-osc", + .id = 1, + .num_resources = 1, + .resource = (struct resource []) { + VEXPRESS_RES_FUNC(0xf, 1), + }, +}; + static void __init ct_ca9x4_init(void) { int i; - struct clk *clk; #ifdef CONFIG_CACHE_L2X0 void __iomem *l2x0_base = ioremap(CT_CA9X4_L2CC, SZ_4K); @@ -164,14 +151,14 @@ static void __init ct_ca9x4_init(void) l2x0_init(l2x0_base, 0x00400000, 0xfe0fffff); #endif - ct_osc1.site = v2m_get_master_site(); - clk = v2m_osc_register("ct:osc1", &ct_osc1); - clk_register_clkdev(clk, NULL, "ct:clcd"); - for (i = 0; i < ARRAY_SIZE(ct_ca9x4_amba_devs); i++) amba_device_register(ct_ca9x4_amba_devs[i], &iomem_resource); platform_device_register(&pmu_device); + platform_device_register(&osc1_device); + + WARN_ON(clk_register_clkdev(vexpress_osc_setup(&osc1_device.dev), + NULL, "ct:clcd")); } #ifdef CONFIG_SMP diff --git a/arch/arm/mach-vexpress/include/mach/motherboard.h b/arch/arm/mach-vexpress/include/mach/motherboard.h index 1e388c7bf4d7..68abc8b72781 100644 --- a/arch/arm/mach-vexpress/include/mach/motherboard.h +++ b/arch/arm/mach-vexpress/include/mach/motherboard.h @@ -1,8 +1,6 @@ #ifndef __MACH_MOTHERBOARD_H #define __MACH_MOTHERBOARD_H -#include <linux/clk-provider.h> - /* * Physical addresses, offset from V2M_PA_CS0-3 */ @@ -41,31 +39,6 @@ #define V2M_CF (V2M_PA_CS7 + 0x0001a000) #define V2M_CLCD (V2M_PA_CS7 + 0x0001f000) -/* - * Offsets from SYSREGS base - */ -#define V2M_SYS_ID 0x000 -#define V2M_SYS_SW 0x004 -#define V2M_SYS_LED 0x008 -#define V2M_SYS_100HZ 0x024 -#define V2M_SYS_FLAGS 0x030 -#define V2M_SYS_FLAGSSET 0x030 -#define V2M_SYS_FLAGSCLR 0x034 -#define V2M_SYS_NVFLAGS 0x038 -#define V2M_SYS_NVFLAGSSET 0x038 -#define V2M_SYS_NVFLAGSCLR 0x03c -#define V2M_SYS_MCI 0x048 -#define V2M_SYS_FLASH 0x03c -#define V2M_SYS_CFGSW 0x058 -#define V2M_SYS_24MHZ 0x05c -#define V2M_SYS_MISC 0x060 -#define V2M_SYS_DMA 0x064 -#define V2M_SYS_PROCID0 0x084 -#define V2M_SYS_PROCID1 0x088 -#define V2M_SYS_CFGDATA 0x0a0 -#define V2M_SYS_CFGCTRL 0x0a4 -#define V2M_SYS_CFGSTAT 0x0a8 - /* * Interrupts. Those in {} are for AMBA devices @@ -91,43 +64,6 @@ /* - * Configuration - */ -#define SYS_CFG_START (1 << 31) -#define SYS_CFG_WRITE (1 << 30) -#define SYS_CFG_OSC (1 << 20) -#define SYS_CFG_VOLT (2 << 20) -#define SYS_CFG_AMP (3 << 20) -#define SYS_CFG_TEMP (4 << 20) -#define SYS_CFG_RESET (5 << 20) -#define SYS_CFG_SCC (6 << 20) -#define SYS_CFG_MUXFPGA (7 << 20) -#define SYS_CFG_SHUTDOWN (8 << 20) -#define SYS_CFG_REBOOT (9 << 20) -#define SYS_CFG_DVIMODE (11 << 20) -#define SYS_CFG_POWER (12 << 20) -#define SYS_CFG_SITE(n) ((n) << 16) -#define SYS_CFG_SITE_MB 0 -#define SYS_CFG_SITE_DB1 1 -#define SYS_CFG_SITE_DB2 2 -#define SYS_CFG_STACK(n) ((n) << 12) - -#define SYS_CFG_ERR (1 << 1) -#define SYS_CFG_COMPLETE (1 << 0) - -int v2m_cfg_write(u32 devfn, u32 data); -int v2m_cfg_read(u32 devfn, u32 *data); -void v2m_flags_set(u32 data); - -/* - * Miscellaneous - */ -#define SYS_MISC_MASTERSITE (1 << 14) -#define SYS_PROCIDx_HBI_MASK 0xfff - -int v2m_get_master_site(void); - -/* * Core tile IDs */ #define V2M_CT_ID_CA9 0x0c000191 @@ -149,21 +85,4 @@ struct ct_desc { extern struct ct_desc *ct_desc; -/* - * OSC clock provider - */ -struct v2m_osc { - struct clk_hw hw; - u8 site; /* 0 = motherboard, 1 = site 1, 2 = site 2 */ - u8 stack; /* board stack position */ - u16 osc; - unsigned long rate_min; - unsigned long rate_max; - unsigned long rate_default; -}; - -#define to_v2m_osc(osc) container_of(osc, struct v2m_osc, hw) - -struct clk *v2m_osc_register(const char *name, struct v2m_osc *osc); - #endif diff --git a/arch/arm/mach-vexpress/platsmp.c b/arch/arm/mach-vexpress/platsmp.c index 7db27c8c05cc..c5d70de9bb4e 100644 --- a/arch/arm/mach-vexpress/platsmp.c +++ b/arch/arm/mach-vexpress/platsmp.c @@ -13,6 +13,7 @@ #include <linux/smp.h> #include <linux/io.h> #include <linux/of_fdt.h> +#include <linux/vexpress.h> #include <asm/smp_scu.h> #include <asm/hardware/gic.h> @@ -193,7 +194,7 @@ static void __init vexpress_smp_prepare_cpus(unsigned int max_cpus) * until it receives a soft interrupt, and then the * secondary CPU branches to this address. */ - v2m_flags_set(virt_to_phys(versatile_secondary_startup)); + vexpress_flags_set(virt_to_phys(versatile_secondary_startup)); } struct smp_operations __initdata vexpress_smp_ops = { diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c index 560e0df728f8..4e168e81fb42 100644 --- a/arch/arm/mach-vexpress/v2m.c +++ b/arch/arm/mach-vexpress/v2m.c @@ -16,11 +16,10 @@ #include <linux/smsc911x.h> #include <linux/spinlock.h> #include <linux/usb/isp1760.h> -#include <linux/clkdev.h> -#include <linux/clk-provider.h> #include <linux/mtd/physmap.h> #include <linux/regulator/fixed.h> #include <linux/regulator/machine.h> +#include <linux/vexpress.h> #include <asm/arch_timer.h> #include <asm/mach-types.h> @@ -33,7 +32,6 @@ #include <asm/hardware/cache-l2x0.h> #include <asm/hardware/gic.h> #include <asm/hardware/timer-sp.h> -#include <asm/hardware/sp810.h> #include <mach/ct-ca9x4.h> #include <mach/motherboard.h> @@ -58,22 +56,6 @@ static struct map_desc v2m_io_desc[] __initdata = { }, }; -static void __iomem *v2m_sysreg_base; - -static void __init v2m_sysctl_init(void __iomem *base) -{ - u32 scctrl; - - if (WARN_ON(!base)) - return; - - /* Select 1MHz TIMCLK as the reference clock for SP804 timers */ - scctrl = readl(base + SCCTRL); - scctrl |= SCCTRL_TIMEREN0SEL_TIMCLK; - scctrl |= SCCTRL_TIMEREN1SEL_TIMCLK; - writel(scctrl, base + SCCTRL); -} - static void __init v2m_sp804_init(void __iomem *base, unsigned int irq) { if (WARN_ON(!base || irq == NO_IRQ)) @@ -87,69 +69,6 @@ static void __init v2m_sp804_init(void __iomem *base, unsigned int irq) } -static DEFINE_SPINLOCK(v2m_cfg_lock); - -int v2m_cfg_write(u32 devfn, u32 data) -{ - /* Configuration interface broken? */ - u32 val; - - printk("%s: writing %08x to %08x\n", __func__, data, devfn); - - devfn |= SYS_CFG_START | SYS_CFG_WRITE; - - spin_lock(&v2m_cfg_lock); - val = readl(v2m_sysreg_base + V2M_SYS_CFGSTAT); - writel(val & ~SYS_CFG_COMPLETE, v2m_sysreg_base + V2M_SYS_CFGSTAT); - - writel(data, v2m_sysreg_base + V2M_SYS_CFGDATA); - writel(devfn, v2m_sysreg_base + V2M_SYS_CFGCTRL); - - do { - val = readl(v2m_sysreg_base + V2M_SYS_CFGSTAT); - } while (val == 0); - spin_unlock(&v2m_cfg_lock); - - return !!(val & SYS_CFG_ERR); -} - -int v2m_cfg_read(u32 devfn, u32 *data) -{ - u32 val; - - devfn |= SYS_CFG_START; - - spin_lock(&v2m_cfg_lock); - writel(0, v2m_sysreg_base + V2M_SYS_CFGSTAT); - writel(devfn, v2m_sysreg_base + V2M_SYS_CFGCTRL); - - mb(); - - do { - cpu_relax(); - val = readl(v2m_sysreg_base + V2M_SYS_CFGSTAT); - } while (val == 0); - - *data = readl(v2m_sysreg_base + V2M_SYS_CFGDATA); - spin_unlock(&v2m_cfg_lock); - - return !!(val & SYS_CFG_ERR); -} - -void __init v2m_flags_set(u32 data) -{ - writel(~0, v2m_sysreg_base + V2M_SYS_FLAGSCLR); - writel(data, v2m_sysreg_base + V2M_SYS_FLAGSSET); -} - -int v2m_get_master_site(void) -{ - u32 misc = readl(v2m_sysreg_base + V2M_SYS_MISC); - - return misc & SYS_MISC_MASTERSITE ? SYS_CFG_SITE_DB2 : SYS_CFG_SITE_DB1; -} - - static struct resource v2m_pcie_i2c_resource = { .start = V2M_SERIAL_BUS_PCI, .end = V2M_SERIAL_BUS_PCI + SZ_4K - 1, @@ -237,14 +156,8 @@ static struct platform_device v2m_usb_device = { .dev.platform_data = &v2m_usb_config, }; -static void v2m_flash_set_vpp(struct platform_device *pdev, int on) -{ - writel(on != 0, v2m_sysreg_base + V2M_SYS_FLASH); -} - static struct physmap_flash_data v2m_flash_data = { .width = 4, - .set_vpp = v2m_flash_set_vpp, }; static struct resource v2m_flash_resources[] = { @@ -291,14 +204,61 @@ static struct platform_device v2m_cf_device = { .dev.platform_data = &v2m_pata_data, }; -static unsigned int v2m_mmci_status(struct device *dev) -{ - return readl(v2m_sysreg_base + V2M_SYS_MCI) & (1 << 0); -} - static struct mmci_platform_data v2m_mmci_data = { .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, - .status = v2m_mmci_status, + .gpio_wp = VEXPRESS_GPIO_MMC_WPROT, + .gpio_cd = VEXPRESS_GPIO_MMC_CARDIN, +}; + +static struct resource v2m_sysreg_resources[] = { + { + .start = V2M_SYSREGS, + .end = V2M_SYSREGS + 0xfff, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device v2m_sysreg_device = { + .name = "vexpress-sysreg", + .id = -1, + .resource = v2m_sysreg_resources, + .num_resources = ARRAY_SIZE(v2m_sysreg_resources), +}; + +static struct platform_device v2m_muxfpga_device = { + .name = "vexpress-muxfpga", + .id = 0, + .num_resources = 1, + .resource = (struct resource []) { + VEXPRESS_RES_FUNC(0, 7), + } +}; + +static struct platform_device v2m_shutdown_device = { + .name = "vexpress-shutdown", + .id = 0, + .num_resources = 1, + .resource = (struct resource []) { + VEXPRESS_RES_FUNC(0, 8), + } +}; + +static struct platform_device v2m_reboot_device = { + .name = "vexpress-reboot", + .id = 0, + .num_resources = 1, + .resource = (struct resource []) { + VEXPRESS_RES_FUNC(0, 9), + } +}; + +static struct platform_device v2m_dvimode_device = { + .name = "vexpress-dvimode", + .id = 0, + .num_resources = 1, + .resource = (struct resource []) { + VEXPRESS_RES_FUNC(0, 11), + } }; static AMBA_APB_DEVICE(aaci, "mb:aaci", 0, V2M_AACI, IRQ_V2M_AACI, NULL); @@ -325,123 +285,9 @@ static struct amba_device *v2m_amba_devs[] __initdata = { &rtc_device, }; - -static unsigned long v2m_osc_recalc_rate(struct clk_hw *hw, - unsigned long parent_rate) -{ - struct v2m_osc *osc = to_v2m_osc(hw); - - return !parent_rate ? osc->rate_default : parent_rate; -} - -static long v2m_osc_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) -{ - struct v2m_osc *osc = to_v2m_osc(hw); - - if (WARN_ON(rate < osc->rate_min)) - rate = osc->rate_min; - - if (WARN_ON(rate > osc->rate_max)) - rate = osc->rate_max; - - return rate; -} - -static int v2m_osc_set_rate(struct clk_hw *hw, unsigned long rate, - unsigned long parent_rate) -{ - struct v2m_osc *osc = to_v2m_osc(hw); - - v2m_cfg_write(SYS_CFG_OSC | SYS_CFG_SITE(osc->site) | - SYS_CFG_STACK(osc->stack) | osc->osc, rate); - - return 0; -} - -static struct clk_ops v2m_osc_ops = { - .recalc_rate = v2m_osc_recalc_rate, - .round_rate = v2m_osc_round_rate, - .set_rate = v2m_osc_set_rate, -}; - -struct clk * __init v2m_osc_register(const char *name, struct v2m_osc *osc) -{ - struct clk_init_data init; - - WARN_ON(osc->site > 2); - WARN_ON(osc->stack > 15); - WARN_ON(osc->osc > 4095); - - init.name = name; - init.ops = &v2m_osc_ops; - init.flags = CLK_IS_ROOT; - init.num_parents = 0; - - osc->hw.init = &init; - - return clk_register(NULL, &osc->hw); -} - -static struct v2m_osc v2m_mb_osc1 = { - .site = SYS_CFG_SITE_MB, - .osc = 1, - .rate_min = 23750000, - .rate_max = 63500000, - .rate_default = 23750000, -}; - -static const char *v2m_ref_clk_periphs[] __initconst = { - "mb:wdt", "1000f000.wdt", "1c0f0000.wdt", /* SP805 WDT */ -}; - -static const char *v2m_osc1_periphs[] __initconst = { - "mb:clcd", "1001f000.clcd", "1c1f0000.clcd", /* PL111 CLCD */ -}; - -static const char *v2m_osc2_periphs[] __initconst = { - "mb:mmci", "10005000.mmci", "1c050000.mmci", /* PL180 MMCI */ - "mb:kmi0", "10006000.kmi", "1c060000.kmi", /* PL050 KMI0 */ - "mb:kmi1", "10007000.kmi", "1c070000.kmi", /* PL050 KMI1 */ - "mb:uart0", "10009000.uart", "1c090000.uart", /* PL011 UART0 */ - "mb:uart1", "1000a000.uart", "1c0a0000.uart", /* PL011 UART1 */ - "mb:uart2", "1000b000.uart", "1c0b0000.uart", /* PL011 UART2 */ - "mb:uart3", "1000c000.uart", "1c0c0000.uart", /* PL011 UART3 */ -}; - -static void __init v2m_clk_init(void) -{ - struct clk *clk; - int i; - - clk = clk_register_fixed_rate(NULL, "dummy_apb_pclk", NULL, - CLK_IS_ROOT, 0); - WARN_ON(clk_register_clkdev(clk, "apb_pclk", NULL)); - - clk = clk_register_fixed_rate(NULL, "mb:ref_clk", NULL, - CLK_IS_ROOT, 32768); - for (i = 0; i < ARRAY_SIZE(v2m_ref_clk_periphs); i++) - WARN_ON(clk_register_clkdev(clk, NULL, v2m_ref_clk_periphs[i])); - - clk = clk_register_fixed_rate(NULL, "mb:sp804_clk", NULL, - CLK_IS_ROOT, 1000000); - WARN_ON(clk_register_clkdev(clk, "v2m-timer0", "sp804")); - WARN_ON(clk_register_clkdev(clk, "v2m-timer1", "sp804")); - - clk = v2m_osc_register("mb:osc1", &v2m_mb_osc1); - for (i = 0; i < ARRAY_SIZE(v2m_osc1_periphs); i++) - WARN_ON(clk_register_clkdev(clk, NULL, v2m_osc1_periphs[i])); - - clk = clk_register_fixed_rate(NULL, "mb:osc2", NULL, - CLK_IS_ROOT, 24000000); - for (i = 0; i < ARRAY_SIZE(v2m_osc2_periphs); i++) - WARN_ON(clk_register_clkdev(clk, NULL, v2m_osc2_periphs[i])); -} - static void __init v2m_timer_init(void) { - v2m_sysctl_init(ioremap(V2M_SYSCTL, SZ_4K)); - v2m_clk_init(); + vexpress_clk_init(ioremap(V2M_SYSCTL, SZ_4K)); v2m_sp804_init(ioremap(V2M_TIMER01, SZ_4K), IRQ_V2M_TIMER0); } @@ -453,19 +299,7 @@ static void __init v2m_init_early(void) { if (ct_desc->init_early) ct_desc->init_early(); - versatile_sched_clock_init(v2m_sysreg_base + V2M_SYS_24MHZ, 24000000); -} - -static void v2m_power_off(void) -{ - if (v2m_cfg_write(SYS_CFG_SHUTDOWN | SYS_CFG_SITE(SYS_CFG_SITE_MB), 0)) - printk(KERN_EMERG "Unable to shutdown\n"); -} - -static void v2m_restart(char str, const char *cmd) -{ - if (v2m_cfg_write(SYS_CFG_REBOOT | SYS_CFG_SITE(SYS_CFG_SITE_MB), 0)) - printk(KERN_EMERG "Unable to reboot\n"); + versatile_sched_clock_init(vexpress_get_24mhz_clock_base(), 24000000); } struct ct_desc *ct_desc; @@ -482,7 +316,7 @@ static void __init v2m_populate_ct_desc(void) u32 current_tile_id; ct_desc = NULL; - current_tile_id = readl(v2m_sysreg_base + V2M_SYS_PROCID0) + current_tile_id = vexpress_get_procid(VEXPRESS_SITE_MASTER) & V2M_CT_ID_MASK; for (i = 0; i < ARRAY_SIZE(ct_descs) && !ct_desc; ++i) @@ -498,7 +332,7 @@ static void __init v2m_populate_ct_desc(void) static void __init v2m_map_io(void) { iotable_init(v2m_io_desc, ARRAY_SIZE(v2m_io_desc)); - v2m_sysreg_base = ioremap(V2M_SYSREGS, SZ_4K); + vexpress_sysreg_early_init(ioremap(V2M_SYSREGS, SZ_4K)); v2m_populate_ct_desc(); ct_desc->map_io(); } @@ -515,6 +349,12 @@ static void __init v2m_init(void) regulator_register_fixed(0, v2m_eth_supplies, ARRAY_SIZE(v2m_eth_supplies)); + platform_device_register(&v2m_muxfpga_device); + platform_device_register(&v2m_shutdown_device); + platform_device_register(&v2m_reboot_device); + platform_device_register(&v2m_dvimode_device); + + platform_device_register(&v2m_sysreg_device); platform_device_register(&v2m_pcie_i2c_device); platform_device_register(&v2m_ddc_i2c_device); platform_device_register(&v2m_flash_device); @@ -525,7 +365,7 @@ static void __init v2m_init(void) for (i = 0; i < ARRAY_SIZE(v2m_amba_devs); i++) amba_device_register(v2m_amba_devs[i], &iomem_resource); - pm_power_off = v2m_power_off; + pm_power_off = vexpress_power_off; ct_desc->init_tile(); } @@ -539,7 +379,7 @@ MACHINE_START(VEXPRESS, "ARM-Versatile Express") .timer = &v2m_timer, .handle_irq = gic_handle_irq, .init_machine = v2m_init, - .restart = v2m_restart, + .restart = vexpress_restart, MACHINE_END static struct map_desc v2m_rs1_io_desc __initdata = { @@ -580,20 +420,13 @@ void __init v2m_dt_map_io(void) void __init v2m_dt_init_early(void) { - struct device_node *node; u32 dt_hbi; - node = of_find_compatible_node(NULL, NULL, "arm,vexpress-sysreg"); - v2m_sysreg_base = of_iomap(node, 0); - if (WARN_ON(!v2m_sysreg_base)) - return; + vexpress_sysreg_of_early_init(); /* Confirm board type against DT property, if available */ if (of_property_read_u32(allnodes, "arm,hbi", &dt_hbi) == 0) { - int site = v2m_get_master_site(); - u32 id = readl(v2m_sysreg_base + (site == SYS_CFG_SITE_DB2 ? - V2M_SYS_PROCID1 : V2M_SYS_PROCID0)); - u32 hbi = id & SYS_PROCIDx_HBI_MASK; + u32 hbi = vexpress_get_hbi(VEXPRESS_SITE_MASTER); if (WARN_ON(dt_hbi != hbi)) pr_warning("vexpress: DT HBI (%x) is not matching " @@ -613,51 +446,47 @@ static void __init v2m_dt_init_irq(void) static void __init v2m_dt_timer_init(void) { - struct device_node *node; - const char *path; - int err; + struct device_node *node = NULL; - node = of_find_compatible_node(NULL, NULL, "arm,sp810"); - v2m_sysctl_init(of_iomap(node, 0)); + vexpress_clk_of_init(); - v2m_clk_init(); + do { + node = of_find_compatible_node(node, NULL, "arm,sp804"); + } while (node && vexpress_get_site_by_node(node) != VEXPRESS_SITE_MB); + if (node) { + pr_info("Using SP804 '%s' as a clock & events source\n", + node->full_name); + v2m_sp804_init(of_iomap(node, 0), + irq_of_parse_and_map(node, 0)); + } - err = of_property_read_string(of_aliases, "arm,v2m_timer", &path); - if (WARN_ON(err)) - return; - node = of_find_node_by_path(path); - v2m_sp804_init(of_iomap(node, 0), irq_of_parse_and_map(node, 0)); if (arch_timer_of_register() != 0) twd_local_timer_of_register(); if (arch_timer_sched_clock_init() != 0) - versatile_sched_clock_init(v2m_sysreg_base + V2M_SYS_24MHZ, 24000000); + versatile_sched_clock_init(vexpress_get_24mhz_clock_base(), + 24000000); } static struct sys_timer v2m_dt_timer = { .init = v2m_dt_timer_init, }; -static struct of_dev_auxdata v2m_dt_auxdata_lookup[] __initdata = { - OF_DEV_AUXDATA("arm,vexpress-flash", V2M_NOR0, "physmap-flash", - &v2m_flash_data), - OF_DEV_AUXDATA("arm,primecell", V2M_MMCI, "mb:mmci", &v2m_mmci_data), - /* RS1 memory map */ - OF_DEV_AUXDATA("arm,vexpress-flash", 0x08000000, "physmap-flash", - &v2m_flash_data), - OF_DEV_AUXDATA("arm,primecell", 0x1c050000, "mb:mmci", &v2m_mmci_data), +static const struct of_device_id v2m_dt_bus_match[] __initconst = { + { .compatible = "simple-bus", }, + { .compatible = "arm,amba-bus", }, + { .compatible = "arm,vexpress,config-bus", }, {} }; static void __init v2m_dt_init(void) { l2x0_of_init(0x00400000, 0xfe0fffff); - of_platform_populate(NULL, of_default_bus_match_table, - v2m_dt_auxdata_lookup, NULL); - pm_power_off = v2m_power_off; + of_platform_populate(NULL, v2m_dt_bus_match, NULL, NULL); + pm_power_off = vexpress_power_off; } -const static char *v2m_dt_match[] __initconst = { +static const char * const v2m_dt_match[] __initconst = { "arm,vexpress", "xen,xenvm", NULL, @@ -672,5 +501,5 @@ DT_MACHINE_START(VEXPRESS_DT, "ARM-Versatile Express") .timer = &v2m_dt_timer, .init_machine = v2m_dt_init, .handle_irq = gic_handle_irq, - .restart = v2m_restart, + .restart = vexpress_restart, MACHINE_END diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c index b9f60ebe3bc4..b820edaf3184 100644 --- a/arch/arm/mm/alignment.c +++ b/arch/arm/mm/alignment.c @@ -745,7 +745,7 @@ do_alignment_t32_to_handler(unsigned long *pinstr, struct pt_regs *regs, static int do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs) { - union offset_union offset; + union offset_union uninitialized_var(offset); unsigned long instr = 0, instrptr; int (*handler)(unsigned long addr, unsigned long instr, struct pt_regs *regs); unsigned int type; @@ -856,8 +856,10 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs) if (thumb2_32b) { offset.un = 0; handler = do_alignment_t32_to_handler(&instr, regs, &offset); - } else + } else { + offset.un = 0; handler = do_alignment_ldmstm; + } break; default: diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c index 477a2d23ddf1..58bc3e4d3bd0 100644 --- a/arch/arm/mm/dma-mapping.c +++ b/arch/arm/mm/dma-mapping.c @@ -610,7 +610,7 @@ static void *__dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp, pgprot_t prot, bool is_coherent, const void *caller) { u64 mask = get_coherent_dma_mask(dev); - struct page *page; + struct page *page = NULL; void *addr; #ifdef CONFIG_DMA_API_DEBUG diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c index 941dfb9e9a78..39719bb93caa 100644 --- a/arch/arm/mm/mmu.c +++ b/arch/arm/mm/mmu.c @@ -876,6 +876,22 @@ static void __init pci_reserve_io(void) #define pci_reserve_io() do { } while (0) #endif +#ifdef CONFIG_DEBUG_LL +void __init debug_ll_io_init(void) +{ + struct map_desc map; + + debug_ll_addr(&map.pfn, &map.virtual); + if (!map.pfn || !map.virtual) + return; + map.pfn = __phys_to_pfn(map.pfn); + map.virtual &= PAGE_MASK; + map.length = PAGE_SIZE; + map.type = MT_DEVICE; + create_mapping(&map); +} +#endif + static void * __initdata vmalloc_min = (void *)(VMALLOC_END - (240 << 20) - VMALLOC_OFFSET); diff --git a/arch/arm/mm/vmregion.h b/arch/arm/mm/vmregion.h index bf312c354a21..0f5a5f2a2c7b 100644 --- a/arch/arm/mm/vmregion.h +++ b/arch/arm/mm/vmregion.h @@ -17,7 +17,6 @@ struct arm_vmregion { struct list_head vm_list; unsigned long vm_start; unsigned long vm_end; - void *priv; int vm_active; const void *caller; }; diff --git a/arch/arm/plat-mxc/devices/platform-mxc-mmc.c b/arch/arm/plat-mxc/devices/platform-mxc-mmc.c index 540d3a7d92df..e7b920b58675 100644 --- a/arch/arm/plat-mxc/devices/platform-mxc-mmc.c +++ b/arch/arm/plat-mxc/devices/platform-mxc-mmc.c @@ -55,7 +55,7 @@ struct platform_device *__init imx_add_mxc_mmc( struct resource res[] = { { .start = data->iobase, - .end = data->iobase + SZ_4K - 1, + .end = data->iobase + data->iosize - 1, .flags = IORESOURCE_MEM, }, { .start = data->irq, diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig index 7cd56ed5cd94..82fcb206b5b2 100644 --- a/arch/arm/plat-omap/Kconfig +++ b/arch/arm/plat-omap/Kconfig @@ -26,6 +26,7 @@ config ARCH_OMAP2PLUS select CLKDEV_LOOKUP select GENERIC_IRQ_CHIP select OMAP_DM_TIMER + select PINCTRL select PROC_DEVICETREE if PROC_FS select SPARSE_IRQ select USE_OF diff --git a/arch/arm/plat-omap/include/plat/omap-serial.h b/arch/arm/plat-omap/include/plat/omap-serial.h index f4a4cd014795..1957a8516e93 100644 --- a/arch/arm/plat-omap/include/plat/omap-serial.h +++ b/arch/arm/plat-omap/include/plat/omap-serial.h @@ -40,10 +40,10 @@ #define OMAP_UART_WER_MOD_WKUP 0X7F /* Enable XON/XOFF flow control on output */ -#define OMAP_UART_SW_TX 0x8 +#define OMAP_UART_SW_TX 0x04 /* Enable XON/XOFF flow control on input */ -#define OMAP_UART_SW_RX 0x2 +#define OMAP_UART_SW_RX 0x04 #define OMAP_UART_SYSC_RESET 0X07 #define OMAP_UART_TCR_TRIG 0X0F diff --git a/arch/arm/plat-samsung/clock.c b/arch/arm/plat-samsung/clock.c index 012bbd0b8d81..47c9fad43f00 100644 --- a/arch/arm/plat-samsung/clock.c +++ b/arch/arm/plat-samsung/clock.c @@ -389,6 +389,72 @@ int __init s3c24xx_register_baseclocks(unsigned long xtal) static struct dentry *clk_debugfs_root; +static void clock_tree_show_one(struct seq_file *s, struct clk *c, int level) +{ + struct clk *child; + const char *state; + char buf[255] = { 0 }; + int n = 0; + + if (c->name) + n = snprintf(buf, sizeof(buf) - 1, "%s", c->name); + + if (c->devname) + n += snprintf(buf + n, sizeof(buf) - 1 - n, ":%s", c->devname); + + state = (c->usage > 0) ? "on" : "off"; + + seq_printf(s, "%*s%-*s %-6s %-3d %-10lu\n", + level * 3 + 1, "", + 50 - level * 3, buf, + state, c->usage, clk_get_rate(c)); + + list_for_each_entry(child, &clocks, list) { + if (child->parent != c) + continue; + + clock_tree_show_one(s, child, level + 1); + } +} + +static int clock_tree_show(struct seq_file *s, void *data) +{ + struct clk *c; + unsigned long flags; + + seq_printf(s, " clock state ref rate\n"); + seq_printf(s, "----------------------------------------------------\n"); + + spin_lock_irqsave(&clocks_lock, flags); + + list_for_each_entry(c, &clocks, list) + if (c->parent == NULL) + clock_tree_show_one(s, c, 0); + + spin_unlock_irqrestore(&clocks_lock, flags); + return 0; +} + +static int clock_tree_open(struct inode *inode, struct file *file) +{ + return single_open(file, clock_tree_show, inode->i_private); +} + +static const struct file_operations clock_tree_fops = { + .open = clock_tree_open, + .read = seq_read, + .llseek = seq_lseek, + .release = single_release, +}; + +static int clock_rate_show(void *data, u64 *val) +{ + struct clk *c = data; + *val = clk_get_rate(c); + return 0; +} +DEFINE_SIMPLE_ATTRIBUTE(clock_rate_fops, clock_rate_show, NULL, "%llu\n"); + static int clk_debugfs_register_one(struct clk *c) { int err; @@ -411,7 +477,7 @@ static int clk_debugfs_register_one(struct clk *c) goto err_out; } - d = debugfs_create_u32("rate", S_IRUGO, c->dent, (u32 *)&c->rate); + d = debugfs_create_file("rate", S_IRUGO, c->dent, c, &clock_rate_fops); if (!d) { err = -ENOMEM; goto err_out; @@ -446,13 +512,18 @@ static int __init clk_debugfs_init(void) { struct clk *c; struct dentry *d; - int err; + int err = -ENOMEM; d = debugfs_create_dir("clock", NULL); if (!d) return -ENOMEM; clk_debugfs_root = d; + d = debugfs_create_file("clock_tree", S_IRUGO, clk_debugfs_root, NULL, + &clock_tree_fops); + if (!d) + goto err_out; + list_for_each_entry(c, &clocks, list) { err = clk_debugfs_register(c); if (err) diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h index 5da4b4f38f40..133e3e4170fb 100644 --- a/arch/arm/plat-samsung/include/plat/devs.h +++ b/arch/arm/plat-samsung/include/plat/devs.h @@ -133,8 +133,6 @@ extern struct platform_device exynos4_device_pcm1; extern struct platform_device exynos4_device_pcm2; extern struct platform_device exynos4_device_spdif; -extern struct platform_device exynos_device_drm; - extern struct platform_device samsung_asoc_dma; extern struct platform_device samsung_asoc_idma; extern struct platform_device samsung_device_keypad; diff --git a/arch/arm/plat-samsung/include/plat/spi-core.h b/arch/arm/plat-samsung/include/plat/spi-core.h new file mode 100644 index 000000000000..0b9428ab3fc3 --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/spi-core.h @@ -0,0 +1,30 @@ +/* + * Copyright (C) 2012 Heiko Stuebner <heiko@sntech.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __PLAT_S3C_SPI_CORE_H +#define __PLAT_S3C_SPI_CORE_H + +/* These functions are only for use with the core support code, such as + * the cpu specific initialisation code + */ + +/* re-define device name depending on support. */ +static inline void s3c64xx_spi_setname(char *name) +{ +#ifdef CONFIG_S3C64XX_DEV_SPI0 + s3c64xx_device_spi0.name = name; +#endif +#ifdef CONFIG_S3C64XX_DEV_SPI1 + s3c64xx_device_spi1.name = name; +#endif +#ifdef CONFIG_S3C64XX_DEV_SPI2 + s3c64xx_device_spi2.name = name; +#endif +} + +#endif /* __PLAT_S3C_SPI_CORE_H */ diff --git a/arch/arm/tools/Makefile b/arch/arm/tools/Makefile index 635cb1865e4d..cd60a81163e9 100644 --- a/arch/arm/tools/Makefile +++ b/arch/arm/tools/Makefile @@ -5,6 +5,6 @@ # include/generated/mach-types.h: $(src)/gen-mach-types $(src)/mach-types - @echo ' Generating $@' + $(kecho) ' Generating $@' @mkdir -p $(dir $@) $(Q)$(AWK) -f $^ > $@ || { rm -f $@; /bin/false; } diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c index c834b32af275..3b44e0dd0a93 100644 --- a/arch/arm/vfp/vfpmodule.c +++ b/arch/arm/vfp/vfpmodule.c @@ -701,11 +701,14 @@ static int __init vfp_init(void) elf_hwcap |= HWCAP_VFPv3; /* - * Check for VFPv3 D16. CPUs in this configuration - * only have 16 x 64bit registers. + * Check for VFPv3 D16 and VFPv4 D16. CPUs in + * this configuration only have 16 x 64bit + * registers. */ if (((fmrx(MVFR0) & MVFR0_A_SIMD_MASK)) == 1) - elf_hwcap |= HWCAP_VFPv3D16; + elf_hwcap |= HWCAP_VFPv3D16; /* also v4-D16 */ + else + elf_hwcap |= HWCAP_VFPD32; } #endif /* diff --git a/arch/arm/xen/enlighten.c b/arch/arm/xen/enlighten.c index 59bcb96ac369..f57609275449 100644 --- a/arch/arm/xen/enlighten.c +++ b/arch/arm/xen/enlighten.c @@ -166,3 +166,14 @@ void free_xenballooned_pages(int nr_pages, struct page **pages) *pages = NULL; } EXPORT_SYMBOL_GPL(free_xenballooned_pages); + +/* In the hypervisor.S file. */ +EXPORT_SYMBOL_GPL(HYPERVISOR_event_channel_op); +EXPORT_SYMBOL_GPL(HYPERVISOR_grant_table_op); +EXPORT_SYMBOL_GPL(HYPERVISOR_xen_version); +EXPORT_SYMBOL_GPL(HYPERVISOR_console_io); +EXPORT_SYMBOL_GPL(HYPERVISOR_sched_op); +EXPORT_SYMBOL_GPL(HYPERVISOR_hvm_op); +EXPORT_SYMBOL_GPL(HYPERVISOR_memory_op); +EXPORT_SYMBOL_GPL(HYPERVISOR_physdev_op); +EXPORT_SYMBOL_GPL(privcmd_call); diff --git a/arch/arm/xen/grant-table.c b/arch/arm/xen/grant-table.c index dbd1330c0196..859a9bb002d5 100644 --- a/arch/arm/xen/grant-table.c +++ b/arch/arm/xen/grant-table.c @@ -33,7 +33,7 @@ #include <xen/page.h> #include <xen/grant_table.h> -int arch_gnttab_map_shared(unsigned long *frames, unsigned long nr_gframes, +int arch_gnttab_map_shared(xen_pfn_t *frames, unsigned long nr_gframes, unsigned long max_nr_gframes, void **__shared) { diff --git a/arch/arm/xen/hypercall.S b/arch/arm/xen/hypercall.S index 074f5ed101b9..71f723984cbd 100644 --- a/arch/arm/xen/hypercall.S +++ b/arch/arm/xen/hypercall.S @@ -48,20 +48,16 @@ #include <linux/linkage.h> #include <asm/assembler.h> +#include <asm/opcodes-virt.h> #include <xen/interface/xen.h> -/* HVC 0xEA1 */ -#ifdef CONFIG_THUMB2_KERNEL -#define xen_hvc .word 0xf7e08ea1 -#else -#define xen_hvc .word 0xe140ea71 -#endif +#define XEN_IMM 0xEA1 #define HYPERCALL_SIMPLE(hypercall) \ ENTRY(HYPERVISOR_##hypercall) \ mov r12, #__HYPERVISOR_##hypercall; \ - xen_hvc; \ + __HVC(XEN_IMM); \ mov pc, lr; \ ENDPROC(HYPERVISOR_##hypercall) @@ -76,7 +72,7 @@ ENTRY(HYPERVISOR_##hypercall) \ stmdb sp!, {r4} \ ldr r4, [sp, #4] \ mov r12, #__HYPERVISOR_##hypercall; \ - xen_hvc \ + __HVC(XEN_IMM); \ ldm sp!, {r4} \ mov pc, lr \ ENDPROC(HYPERVISOR_##hypercall) @@ -100,7 +96,7 @@ ENTRY(privcmd_call) mov r2, r3 ldr r3, [sp, #8] ldr r4, [sp, #4] - xen_hvc + __HVC(XEN_IMM) ldm sp!, {r4} mov pc, lr ENDPROC(privcmd_call); diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index ef54a59a9e89..15ac18a56c93 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -1,6 +1,7 @@ config ARM64 def_bool y select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE + select ARCH_WANT_COMPAT_IPC_PARSE_VERSION select GENERIC_CLOCKEVENTS select GENERIC_HARDIRQS_NO_DEPRECATED select GENERIC_IOMAP diff --git a/arch/arm64/include/asm/elf.h b/arch/arm64/include/asm/elf.h index cf284649dfcb..07fea290d7c1 100644 --- a/arch/arm64/include/asm/elf.h +++ b/arch/arm64/include/asm/elf.h @@ -25,12 +25,10 @@ #include <asm/user.h> typedef unsigned long elf_greg_t; -typedef unsigned long elf_freg_t[3]; #define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t)) typedef elf_greg_t elf_gregset_t[ELF_NGREG]; - -typedef struct user_fp elf_fpregset_t; +typedef struct user_fpsimd_state elf_fpregset_t; #define EM_AARCH64 183 @@ -87,7 +85,6 @@ typedef struct user_fp elf_fpregset_t; #define R_AARCH64_MOVW_PREL_G2_NC 292 #define R_AARCH64_MOVW_PREL_G3 293 - /* * These are used to set parameters in the core dumps. */ diff --git a/arch/arm64/include/asm/fpsimd.h b/arch/arm64/include/asm/fpsimd.h index b42fab9f62a9..c43b4ac13008 100644 --- a/arch/arm64/include/asm/fpsimd.h +++ b/arch/arm64/include/asm/fpsimd.h @@ -25,9 +25,8 @@ * - FPSR and FPCR * - 32 128-bit data registers * - * Note that user_fp forms a prefix of this structure, which is relied - * upon in the ptrace FP/SIMD accessors. struct user_fpsimd_state must - * form a prefix of struct fpsimd_state. + * Note that user_fpsimd forms a prefix of this structure, which is + * relied upon in the ptrace FP/SIMD accessors. */ struct fpsimd_state { union { diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm/io.h index 74a2a7d304a9..54f6116697f7 100644 --- a/arch/arm64/include/asm/io.h +++ b/arch/arm64/include/asm/io.h @@ -114,7 +114,7 @@ static inline u64 __raw_readq(const volatile void __iomem *addr) * I/O port access primitives. */ #define IO_SPACE_LIMIT 0xffff -#define PCI_IOBASE ((void __iomem *)0xffffffbbfffe0000UL) +#define PCI_IOBASE ((void __iomem *)(MODULES_VADDR - SZ_2M)) static inline u8 inb(unsigned long addr) { @@ -225,9 +225,9 @@ extern void __iounmap(volatile void __iomem *addr); #define PROT_DEVICE_nGnRE (PROT_DEFAULT | PTE_XN | PTE_ATTRINDX(MT_DEVICE_nGnRE)) #define PROT_NORMAL_NC (PROT_DEFAULT | PTE_ATTRINDX(MT_NORMAL_NC)) -#define ioremap(addr, size) __ioremap((addr), (size), PROT_DEVICE_nGnRE) -#define ioremap_nocache(addr, size) __ioremap((addr), (size), PROT_DEVICE_nGnRE) -#define ioremap_wc(addr, size) __ioremap((addr), (size), PROT_NORMAL_NC) +#define ioremap(addr, size) __ioremap((addr), (size), __pgprot(PROT_DEVICE_nGnRE)) +#define ioremap_nocache(addr, size) __ioremap((addr), (size), __pgprot(PROT_DEVICE_nGnRE)) +#define ioremap_wc(addr, size) __ioremap((addr), (size), __pgprot(PROT_NORMAL_NC)) #define iounmap __iounmap #define ARCH_HAS_IOREMAP_WC diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h index 5d810044feda..77f696c14339 100644 --- a/arch/arm64/include/asm/processor.h +++ b/arch/arm64/include/asm/processor.h @@ -43,6 +43,8 @@ #else #define STACK_TOP STACK_TOP_MAX #endif /* CONFIG_COMPAT */ + +#define ARCH_LOW_ADDRESS_LIMIT PHYS_MASK #endif /* __KERNEL__ */ struct debug_info { diff --git a/arch/arm64/include/asm/unistd.h b/arch/arm64/include/asm/unistd.h index 63f853f8b718..68aff2816e86 100644 --- a/arch/arm64/include/asm/unistd.h +++ b/arch/arm64/include/asm/unistd.h @@ -14,7 +14,6 @@ * along with this program. If not, see <http://www.gnu.org/licenses/>. */ #ifdef CONFIG_COMPAT -#define __ARCH_WANT_COMPAT_IPC_PARSE_VERSION #define __ARCH_WANT_COMPAT_STAT64 #define __ARCH_WANT_SYS_GETHOSTNAME #define __ARCH_WANT_SYS_PAUSE diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c index ecbf2d81ec5c..c76c7241125b 100644 --- a/arch/arm64/kernel/perf_event.c +++ b/arch/arm64/kernel/perf_event.c @@ -613,17 +613,11 @@ enum armv8_pmuv3_perf_types { ARMV8_PMUV3_PERFCTR_BUS_ACCESS = 0x19, ARMV8_PMUV3_PERFCTR_MEM_ERROR = 0x1A, ARMV8_PMUV3_PERFCTR_BUS_CYCLES = 0x1D, - - /* - * This isn't an architected event. - * We detect this event number and use the cycle counter instead. - */ - ARMV8_PMUV3_PERFCTR_CPU_CYCLES = 0xFF, }; /* PMUv3 HW events mapping. */ static const unsigned armv8_pmuv3_perf_map[PERF_COUNT_HW_MAX] = { - [PERF_COUNT_HW_CPU_CYCLES] = ARMV8_PMUV3_PERFCTR_CPU_CYCLES, + [PERF_COUNT_HW_CPU_CYCLES] = ARMV8_PMUV3_PERFCTR_CLOCK_CYCLES, [PERF_COUNT_HW_INSTRUCTIONS] = ARMV8_PMUV3_PERFCTR_INSTR_EXECUTED, [PERF_COUNT_HW_CACHE_REFERENCES] = ARMV8_PMUV3_PERFCTR_L1_DCACHE_ACCESS, [PERF_COUNT_HW_CACHE_MISSES] = ARMV8_PMUV3_PERFCTR_L1_DCACHE_REFILL, @@ -1106,7 +1100,7 @@ static int armv8pmu_get_event_idx(struct pmu_hw_events *cpuc, unsigned long evtype = event->config_base & ARMV8_EVTYPE_EVENT; /* Always place a cycle counter into the cycle counter. */ - if (evtype == ARMV8_PMUV3_PERFCTR_CPU_CYCLES) { + if (evtype == ARMV8_PMUV3_PERFCTR_CLOCK_CYCLES) { if (test_and_set_bit(ARMV8_IDX_CYCLE_COUNTER, cpuc->used_mask)) return -EAGAIN; diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c index f22965ea1cfc..e04cebdbb47f 100644 --- a/arch/arm64/kernel/process.c +++ b/arch/arm64/kernel/process.c @@ -310,24 +310,6 @@ struct task_struct *__switch_to(struct task_struct *prev, } /* - * Fill in the task's elfregs structure for a core dump. - */ -int dump_task_regs(struct task_struct *t, elf_gregset_t *elfregs) -{ - elf_core_copy_regs(elfregs, task_pt_regs(t)); - return 1; -} - -/* - * fill in the fpe structure for a core dump... - */ -int dump_fpu (struct pt_regs *regs, struct user_fp *fp) -{ - return 0; -} -EXPORT_SYMBOL(dump_fpu); - -/* * Shuffle the argument into the correct register before calling the * thread function. x1 is the thread argument, x2 is the pointer to * the thread function, and x3 points to the exit function. diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c index 226b6bf6e9c2..538300f2273d 100644 --- a/arch/arm64/kernel/smp.c +++ b/arch/arm64/kernel/smp.c @@ -211,8 +211,7 @@ asmlinkage void __cpuinit secondary_start_kernel(void) * before we continue. */ set_cpu_online(cpu, true); - while (!cpu_active(cpu)) - cpu_relax(); + complete(&cpu_running); /* * OK, it's off to the idle thread for us diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c index efbf7df05d3f..4cd28931dba9 100644 --- a/arch/arm64/mm/init.c +++ b/arch/arm64/mm/init.c @@ -80,7 +80,7 @@ static void __init zone_sizes_init(unsigned long min, unsigned long max) #ifdef CONFIG_ZONE_DMA32 /* 4GB maximum for 32-bit only capable devices */ max_dma32 = min(max, MAX_DMA32_PFN); - zone_size[ZONE_DMA32] = max_dma32 - min; + zone_size[ZONE_DMA32] = max(min, max_dma32) - min; #endif zone_size[ZONE_NORMAL] = max - max_dma32; diff --git a/arch/frv/Kconfig b/arch/frv/Kconfig index b7412504f08a..df2eb4bd9fa2 100644 --- a/arch/frv/Kconfig +++ b/arch/frv/Kconfig @@ -13,6 +13,7 @@ config FRV select GENERIC_CPU_DEVICES select ARCH_WANT_IPC_PARSE_VERSION select GENERIC_KERNEL_THREAD + select GENERIC_KERNEL_EXECVE config ZONE_DMA bool diff --git a/arch/frv/boot/Makefile b/arch/frv/boot/Makefile index 6ae3254da019..636d5bbcd53f 100644 --- a/arch/frv/boot/Makefile +++ b/arch/frv/boot/Makefile @@ -17,6 +17,8 @@ PARAMS_PHYS = 0x0207c000 INITRD_PHYS = 0x02180000 INITRD_VIRT = 0x02180000 +OBJCOPYFLAGS :=-O binary -R .note -R .note.gnu.build-id -R .comment + # # If you don't define ZRELADDR above, # then it defaults to ZTEXTADDR @@ -32,18 +34,18 @@ Image: $(obj)/Image targets: $(obj)/Image $(obj)/Image: vmlinux FORCE - $(OBJCOPY) -O binary -R .note -R .comment -S vmlinux $@ + $(OBJCOPY) $(OBJCOPYFLAGS) -S vmlinux $@ #$(obj)/Image: $(CONFIGURE) $(SYSTEM) -# $(OBJCOPY) -O binary -R .note -R .comment -g -S $(SYSTEM) $@ +# $(OBJCOPY) $(OBJCOPYFLAGS) -g -S $(SYSTEM) $@ bzImage: zImage zImage: $(CONFIGURE) compressed/$(LINUX) - $(OBJCOPY) -O binary -R .note -R .comment -S compressed/$(LINUX) $@ + $(OBJCOPY) $(OBJCOPYFLAGS) -S compressed/$(LINUX) $@ bootpImage: bootp/bootp - $(OBJCOPY) -O binary -R .note -R .comment -S bootp/bootp $@ + $(OBJCOPY) $(OBJCOPYFLAGS) -S bootp/bootp $@ compressed/$(LINUX): $(LINUX) dep @$(MAKE) -C compressed $(LINUX) diff --git a/arch/frv/include/asm/unistd.h b/arch/frv/include/asm/unistd.h index 266a5b25a0c1..2358634cacca 100644 --- a/arch/frv/include/asm/unistd.h +++ b/arch/frv/include/asm/unistd.h @@ -30,7 +30,6 @@ #define __ARCH_WANT_SYS_RT_SIGACTION #define __ARCH_WANT_SYS_RT_SIGSUSPEND #define __ARCH_WANT_SYS_EXECVE -#define __ARCH_WANT_KERNEL_EXECVE /* * "Conditional" syscalls diff --git a/arch/frv/kernel/entry.S b/arch/frv/kernel/entry.S index ee0beb354e4d..dfcd263c0517 100644 --- a/arch/frv/kernel/entry.S +++ b/arch/frv/kernel/entry.S @@ -869,11 +869,6 @@ ret_from_kernel_thread: call schedule_tail calll.p @(gr21,gr0) or gr20,gr20,gr8 - bra sys_exit - - .globl ret_from_kernel_execve -ret_from_kernel_execve: - ori gr28,0,sp bra __syscall_exit ################################################################################################### @@ -1080,27 +1075,10 @@ __entry_return_from_kernel_interrupt: subicc gr5,#0,gr0,icc0 beq icc0,#0,__entry_return_direct -__entry_preempt_need_resched: - ldi @(gr15,#TI_FLAGS),gr4 - andicc gr4,#_TIF_NEED_RESCHED,gr0,icc0 - beq icc0,#1,__entry_return_direct - - setlos #PREEMPT_ACTIVE,gr5 - sti gr5,@(gr15,#TI_FLAGS) - - andi gr23,#~PSR_PIL,gr23 - movgs gr23,psr - - call schedule - sti gr0,@(gr15,#TI_PRE_COUNT) - - movsg psr,gr23 - ori gr23,#PSR_PIL_14,gr23 - movgs gr23,psr - bra __entry_preempt_need_resched -#else - bra __entry_return_direct + subcc gr0,gr0,gr0,icc2 /* set Z and clear C */ + call preempt_schedule_irq #endif + bra __entry_return_direct ############################################################################### diff --git a/arch/frv/kernel/process.c b/arch/frv/kernel/process.c index e1e3aa196aa4..7e33215f1d8f 100644 --- a/arch/frv/kernel/process.c +++ b/arch/frv/kernel/process.c @@ -181,6 +181,9 @@ int copy_thread(unsigned long clone_flags, childregs = (struct pt_regs *) (task_stack_page(p) + THREAD_SIZE - FRV_FRAME0_SIZE); + /* set up the userspace frame (the only place that the USP is stored) */ + *childregs = *__kernel_frame0_ptr; + p->set_child_tid = p->clear_child_tid = NULL; p->thread.frame = childregs; @@ -191,10 +194,8 @@ int copy_thread(unsigned long clone_flags, p->thread.frame0 = childregs; if (unlikely(!regs)) { - memset(childregs, 0, sizeof(struct pt_regs)); childregs->gr9 = usp; /* function */ childregs->gr8 = arg; - childregs->psr = PSR_S; p->thread.pc = (unsigned long) ret_from_kernel_thread; save_user_regs(p->thread.user); return 0; diff --git a/arch/frv/mb93090-mb00/pci-dma-nommu.c b/arch/frv/mb93090-mb00/pci-dma-nommu.c index e47857f889b6..b99c2a7cc7a4 100644 --- a/arch/frv/mb93090-mb00/pci-dma-nommu.c +++ b/arch/frv/mb93090-mb00/pci-dma-nommu.c @@ -11,6 +11,7 @@ #include <linux/types.h> #include <linux/slab.h> +#include <linux/export.h> #include <linux/dma-mapping.h> #include <linux/list.h> #include <linux/pci.h> diff --git a/arch/h8300/include/asm/cache.h b/arch/h8300/include/asm/cache.h index c6350283649d..05887a1d80e5 100644 --- a/arch/h8300/include/asm/cache.h +++ b/arch/h8300/include/asm/cache.h @@ -2,7 +2,8 @@ #define __ARCH_H8300_CACHE_H /* bytes per L1 cache line */ -#define L1_CACHE_BYTES 4 +#define L1_CACHE_SHIFT 2 +#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) /* m68k-elf-gcc 2.95.2 doesn't like these */ diff --git a/arch/ia64/include/asm/Kbuild b/arch/ia64/include/asm/Kbuild index 4a159da23633..dd02f09b6eda 100644 --- a/arch/ia64/include/asm/Kbuild +++ b/arch/ia64/include/asm/Kbuild @@ -1,3 +1,4 @@ generic-y += clkdev.h generic-y += exec.h +generic-y += kvm_para.h diff --git a/arch/ia64/include/asm/kvm_para.h b/arch/ia64/include/asm/kvm_para.h deleted file mode 100644 index 47c00f910434..000000000000 --- a/arch/ia64/include/asm/kvm_para.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * Copyright (C) 2007 Xiantao Zhang <xiantao.zhang@intel.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., 59 Temple - * Place - Suite 330, Boston, MA 02111-1307 USA. - * - */ -#ifndef __IA64_KVM_PARA_H -#define __IA64_KVM_PARA_H - -#include <uapi/asm/kvm_para.h> - - -static inline unsigned int kvm_arch_para_features(void) -{ - return 0; -} - -static inline bool kvm_check_and_clear_guest_paused(void) -{ - return false; -} - -#endif diff --git a/arch/m68k/include/asm/Kbuild b/arch/m68k/include/asm/Kbuild index ecb540810ab3..88fa3ac86fae 100644 --- a/arch/m68k/include/asm/Kbuild +++ b/arch/m68k/include/asm/Kbuild @@ -1,5 +1,3 @@ -include include/asm-generic/Kbuild.asm -header-y += cachectl.h generic-y += bitsperlong.h generic-y += clkdev.h diff --git a/arch/m68k/include/asm/ptrace.h b/arch/m68k/include/asm/ptrace.h index 5e08b597f012..0f717045bdde 100644 --- a/arch/m68k/include/asm/ptrace.h +++ b/arch/m68k/include/asm/ptrace.h @@ -1,82 +1,10 @@ #ifndef _M68K_PTRACE_H #define _M68K_PTRACE_H -#define PT_D1 0 -#define PT_D2 1 -#define PT_D3 2 -#define PT_D4 3 -#define PT_D5 4 -#define PT_D6 5 -#define PT_D7 6 -#define PT_A0 7 -#define PT_A1 8 -#define PT_A2 9 -#define PT_A3 10 -#define PT_A4 11 -#define PT_A5 12 -#define PT_A6 13 -#define PT_D0 14 -#define PT_USP 15 -#define PT_ORIG_D0 16 -#define PT_SR 17 -#define PT_PC 18 +#include <uapi/asm/ptrace.h> #ifndef __ASSEMBLY__ -/* this struct defines the way the registers are stored on the - stack during a system call. */ - -struct pt_regs { - long d1; - long d2; - long d3; - long d4; - long d5; - long a0; - long a1; - long a2; - long d0; - long orig_d0; - long stkadj; -#ifdef CONFIG_COLDFIRE - unsigned format : 4; /* frame format specifier */ - unsigned vector : 12; /* vector offset */ - unsigned short sr; - unsigned long pc; -#else - unsigned short sr; - unsigned long pc; - unsigned format : 4; /* frame format specifier */ - unsigned vector : 12; /* vector offset */ -#endif -}; - -/* - * This is the extended stack used by signal handlers and the context - * switcher: it's pushed after the normal "struct pt_regs". - */ -struct switch_stack { - unsigned long d6; - unsigned long d7; - unsigned long a3; - unsigned long a4; - unsigned long a5; - unsigned long a6; - unsigned long retpc; -}; - -/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */ -#define PTRACE_GETREGS 12 -#define PTRACE_SETREGS 13 -#define PTRACE_GETFPREGS 14 -#define PTRACE_SETFPREGS 15 - -#define PTRACE_GET_THREAD_AREA 25 - -#define PTRACE_SINGLEBLOCK 33 /* resume execution until next branch */ - -#ifdef __KERNEL__ - #ifndef PS_S #define PS_S (0x2000) #define PS_M (0x1000) @@ -94,6 +22,5 @@ struct switch_stack { #define arch_has_block_step() (1) #endif -#endif /* __KERNEL__ */ #endif /* __ASSEMBLY__ */ #endif /* _M68K_PTRACE_H */ diff --git a/arch/m68k/include/asm/setup.h b/arch/m68k/include/asm/setup.h index 00c2c5397d37..65e78a2dad64 100644 --- a/arch/m68k/include/asm/setup.h +++ b/arch/m68k/include/asm/setup.h @@ -19,33 +19,12 @@ ** Redesign of the boot information structure; moved boot information ** structure to bootinfo.h */ - #ifndef _M68K_SETUP_H #define _M68K_SETUP_H +#include <uapi/asm/setup.h> - /* - * Linux/m68k Architectures - */ - -#define MACH_AMIGA 1 -#define MACH_ATARI 2 -#define MACH_MAC 3 -#define MACH_APOLLO 4 -#define MACH_SUN3 5 -#define MACH_MVME147 6 -#define MACH_MVME16x 7 -#define MACH_BVME6000 8 -#define MACH_HP300 9 -#define MACH_Q40 10 -#define MACH_SUN3X 11 -#define MACH_M54XX 12 - -#define COMMAND_LINE_SIZE 256 - -#ifdef __KERNEL__ - #define CL_SIZE COMMAND_LINE_SIZE #ifndef __ASSEMBLY__ @@ -194,63 +173,6 @@ extern unsigned long m68k_machtype; # define MACH_TYPE (m68k_machtype) #endif -#endif /* __KERNEL__ */ - - - /* - * CPU, FPU and MMU types - * - * Note: we may rely on the following equalities: - * - * CPU_68020 == MMU_68851 - * CPU_68030 == MMU_68030 - * CPU_68040 == FPU_68040 == MMU_68040 - * CPU_68060 == FPU_68060 == MMU_68060 - */ - -#define CPUB_68020 0 -#define CPUB_68030 1 -#define CPUB_68040 2 -#define CPUB_68060 3 -#define CPUB_COLDFIRE 4 - -#define CPU_68020 (1<<CPUB_68020) -#define CPU_68030 (1<<CPUB_68030) -#define CPU_68040 (1<<CPUB_68040) -#define CPU_68060 (1<<CPUB_68060) -#define CPU_COLDFIRE (1<<CPUB_COLDFIRE) - -#define FPUB_68881 0 -#define FPUB_68882 1 -#define FPUB_68040 2 /* Internal FPU */ -#define FPUB_68060 3 /* Internal FPU */ -#define FPUB_SUNFPA 4 /* Sun-3 FPA */ -#define FPUB_COLDFIRE 5 /* ColdFire FPU */ - -#define FPU_68881 (1<<FPUB_68881) -#define FPU_68882 (1<<FPUB_68882) -#define FPU_68040 (1<<FPUB_68040) -#define FPU_68060 (1<<FPUB_68060) -#define FPU_SUNFPA (1<<FPUB_SUNFPA) -#define FPU_COLDFIRE (1<<FPUB_COLDFIRE) - -#define MMUB_68851 0 -#define MMUB_68030 1 /* Internal MMU */ -#define MMUB_68040 2 /* Internal MMU */ -#define MMUB_68060 3 /* Internal MMU */ -#define MMUB_APOLLO 4 /* Custom Apollo */ -#define MMUB_SUN3 5 /* Custom Sun-3 */ -#define MMUB_COLDFIRE 6 /* Internal MMU */ - -#define MMU_68851 (1<<MMUB_68851) -#define MMU_68030 (1<<MMUB_68030) -#define MMU_68040 (1<<MMUB_68040) -#define MMU_68060 (1<<MMUB_68060) -#define MMU_SUN3 (1<<MMUB_SUN3) -#define MMU_APOLLO (1<<MMUB_APOLLO) -#define MMU_COLDFIRE (1<<MMUB_COLDFIRE) - -#ifdef __KERNEL__ #ifndef __ASSEMBLY__ extern unsigned long m68k_cputype; @@ -385,6 +307,4 @@ extern int m68k_realnum_memory; /* real # of memory blocks found */ extern struct mem_info m68k_memory[NUM_MEMINFO];/* memory description */ #endif -#endif /* __KERNEL__ */ - #endif /* _M68K_SETUP_H */ diff --git a/arch/m68k/include/asm/signal.h b/arch/m68k/include/asm/signal.h index 60e88660169c..67e489d8d1bd 100644 --- a/arch/m68k/include/asm/signal.h +++ b/arch/m68k/include/asm/signal.h @@ -1,12 +1,8 @@ #ifndef _M68K_SIGNAL_H #define _M68K_SIGNAL_H -#include <linux/types.h> +#include <uapi/asm/signal.h> -/* Avoid too many header ordering problems. */ -struct siginfo; - -#ifdef __KERNEL__ /* Most things should be clean enough to redefine this at will, if care is taken to make libc match. */ @@ -20,92 +16,6 @@ typedef struct { unsigned long sig[_NSIG_WORDS]; } sigset_t; -#else -/* Here we must cater to libcs that poke about in kernel headers. */ - -#define NSIG 32 -typedef unsigned long sigset_t; - -#endif /* __KERNEL__ */ - -#define SIGHUP 1 -#define SIGINT 2 -#define SIGQUIT 3 -#define SIGILL 4 -#define SIGTRAP 5 -#define SIGABRT 6 -#define SIGIOT 6 -#define SIGBUS 7 -#define SIGFPE 8 -#define SIGKILL 9 -#define SIGUSR1 10 -#define SIGSEGV 11 -#define SIGUSR2 12 -#define SIGPIPE 13 -#define SIGALRM 14 -#define SIGTERM 15 -#define SIGSTKFLT 16 -#define SIGCHLD 17 -#define SIGCONT 18 -#define SIGSTOP 19 -#define SIGTSTP 20 -#define SIGTTIN 21 -#define SIGTTOU 22 -#define SIGURG 23 -#define SIGXCPU 24 -#define SIGXFSZ 25 -#define SIGVTALRM 26 -#define SIGPROF 27 -#define SIGWINCH 28 -#define SIGIO 29 -#define SIGPOLL SIGIO -/* -#define SIGLOST 29 -*/ -#define SIGPWR 30 -#define SIGSYS 31 -#define SIGUNUSED 31 - -/* These should not be considered constants from userland. */ -#define SIGRTMIN 32 -#define SIGRTMAX _NSIG - -/* - * SA_FLAGS values: - * - * SA_ONSTACK indicates that a registered stack_t will be used. - * SA_RESTART flag to get restarting signals (which were the default long ago) - * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop. - * SA_RESETHAND clears the handler when the signal is delivered. - * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies. - * SA_NODEFER prevents the current signal from being masked in the handler. - * - * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single - * Unix names RESETHAND and NODEFER respectively. - */ -#define SA_NOCLDSTOP 0x00000001 -#define SA_NOCLDWAIT 0x00000002 -#define SA_SIGINFO 0x00000004 -#define SA_ONSTACK 0x08000000 -#define SA_RESTART 0x10000000 -#define SA_NODEFER 0x40000000 -#define SA_RESETHAND 0x80000000 - -#define SA_NOMASK SA_NODEFER -#define SA_ONESHOT SA_RESETHAND - -/* - * sigaltstack controls - */ -#define SS_ONSTACK 1 -#define SS_DISABLE 2 - -#define MINSIGSTKSZ 2048 -#define SIGSTKSZ 8192 - -#include <asm-generic/signal-defs.h> - -#ifdef __KERNEL__ struct old_sigaction { __sighandler_t sa_handler; old_sigset_t sa_mask; @@ -123,31 +33,6 @@ struct sigaction { struct k_sigaction { struct sigaction sa; }; -#else -/* Here we must cater to libcs that poke about in kernel headers. */ - -struct sigaction { - union { - __sighandler_t _sa_handler; - void (*_sa_sigaction)(int, struct siginfo *, void *); - } _u; - sigset_t sa_mask; - unsigned long sa_flags; - void (*sa_restorer)(void); -}; - -#define sa_handler _u._sa_handler -#define sa_sigaction _u._sa_sigaction - -#endif /* __KERNEL__ */ - -typedef struct sigaltstack { - void __user *ss_sp; - int ss_flags; - size_t ss_size; -} stack_t; - -#ifdef __KERNEL__ #include <asm/sigcontext.h> #ifndef CONFIG_CPU_HAS_NO_BITFIELDS @@ -208,5 +93,4 @@ struct pt_regs; extern void ptrace_signal_deliver(struct pt_regs *regs, void *cookie); #endif /* __uClinux__ */ -#endif /* __KERNEL__ */ #endif /* _M68K_SIGNAL_H */ diff --git a/arch/m68k/include/asm/termios.h b/arch/m68k/include/asm/termios.h index 0823032e4045..ad8efb098663 100644 --- a/arch/m68k/include/asm/termios.h +++ b/arch/m68k/include/asm/termios.h @@ -1,27 +1,8 @@ #ifndef _M68K_TERMIOS_H #define _M68K_TERMIOS_H -#include <asm/termbits.h> -#include <asm/ioctls.h> +#include <uapi/asm/termios.h> -struct winsize { - unsigned short ws_row; - unsigned short ws_col; - unsigned short ws_xpixel; - unsigned short ws_ypixel; -}; - -#define NCC 8 -struct termio { - unsigned short c_iflag; /* input mode flags */ - unsigned short c_oflag; /* output mode flags */ - unsigned short c_cflag; /* control mode flags */ - unsigned short c_lflag; /* local mode flags */ - unsigned char c_line; /* line discipline */ - unsigned char c_cc[NCC]; /* control characters */ -}; - -#ifdef __KERNEL__ /* intr=^C quit=^| erase=del kill=^U eof=^D vtime=\0 vmin=\1 sxtc=\0 start=^Q stop=^S susp=^Z eol=\0 @@ -29,27 +10,6 @@ struct termio { eol2=\0 */ #define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0" -#endif - -/* modem lines */ -#define TIOCM_LE 0x001 -#define TIOCM_DTR 0x002 -#define TIOCM_RTS 0x004 -#define TIOCM_ST 0x008 -#define TIOCM_SR 0x010 -#define TIOCM_CTS 0x020 -#define TIOCM_CAR 0x040 -#define TIOCM_RNG 0x080 -#define TIOCM_DSR 0x100 -#define TIOCM_CD TIOCM_CAR -#define TIOCM_RI TIOCM_RNG -#define TIOCM_OUT1 0x2000 -#define TIOCM_OUT2 0x4000 -#define TIOCM_LOOP 0x8000 - -/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */ - -#ifdef __KERNEL__ /* * Translate a "termio" structure into a "termios". Ugh. @@ -87,6 +47,4 @@ struct termio { #define user_termios_to_kernel_termios_1(k, u) copy_from_user(k, u, sizeof(struct termios)) #define kernel_termios_to_user_termios_1(u, k) copy_to_user(u, k, sizeof(struct termios)) -#endif /* __KERNEL__ */ - #endif /* _M68K_TERMIOS_H */ diff --git a/arch/m68k/include/asm/unistd.h b/arch/m68k/include/asm/unistd.h index c702ad716791..5fc7f7bec1c8 100644 --- a/arch/m68k/include/asm/unistd.h +++ b/arch/m68k/include/asm/unistd.h @@ -1,361 +1,10 @@ #ifndef _ASM_M68K_UNISTD_H_ #define _ASM_M68K_UNISTD_H_ -/* - * This file contains the system call numbers. - */ - -#define __NR_restart_syscall 0 -#define __NR_exit 1 -#define __NR_fork 2 -#define __NR_read 3 -#define __NR_write 4 -#define __NR_open 5 -#define __NR_close 6 -#define __NR_waitpid 7 -#define __NR_creat 8 -#define __NR_link 9 -#define __NR_unlink 10 -#define __NR_execve 11 -#define __NR_chdir 12 -#define __NR_time 13 -#define __NR_mknod 14 -#define __NR_chmod 15 -#define __NR_chown 16 -/*#define __NR_break 17*/ -#define __NR_oldstat 18 -#define __NR_lseek 19 -#define __NR_getpid 20 -#define __NR_mount 21 -#define __NR_umount 22 -#define __NR_setuid 23 -#define __NR_getuid 24 -#define __NR_stime 25 -#define __NR_ptrace 26 -#define __NR_alarm 27 -#define __NR_oldfstat 28 -#define __NR_pause 29 -#define __NR_utime 30 -/*#define __NR_stty 31*/ -/*#define __NR_gtty 32*/ -#define __NR_access 33 -#define __NR_nice 34 -/*#define __NR_ftime 35*/ -#define __NR_sync 36 -#define __NR_kill 37 -#define __NR_rename 38 -#define __NR_mkdir 39 -#define __NR_rmdir 40 -#define __NR_dup 41 -#define __NR_pipe 42 -#define __NR_times 43 -/*#define __NR_prof 44*/ -#define __NR_brk 45 -#define __NR_setgid 46 -#define __NR_getgid 47 -#define __NR_signal 48 -#define __NR_geteuid 49 -#define __NR_getegid 50 -#define __NR_acct 51 -#define __NR_umount2 52 -/*#define __NR_lock 53*/ -#define __NR_ioctl 54 -#define __NR_fcntl 55 -/*#define __NR_mpx 56*/ -#define __NR_setpgid 57 -/*#define __NR_ulimit 58*/ -/*#define __NR_oldolduname 59*/ -#define __NR_umask 60 -#define __NR_chroot 61 -#define __NR_ustat 62 -#define __NR_dup2 63 -#define __NR_getppid 64 -#define __NR_getpgrp 65 -#define __NR_setsid 66 -#define __NR_sigaction 67 -#define __NR_sgetmask 68 -#define __NR_ssetmask 69 -#define __NR_setreuid 70 -#define __NR_setregid 71 -#define __NR_sigsuspend 72 -#define __NR_sigpending 73 -#define __NR_sethostname 74 -#define __NR_setrlimit 75 -#define __NR_getrlimit 76 -#define __NR_getrusage 77 -#define __NR_gettimeofday 78 -#define __NR_settimeofday 79 -#define __NR_getgroups 80 -#define __NR_setgroups 81 -#define __NR_select 82 -#define __NR_symlink 83 -#define __NR_oldlstat 84 -#define __NR_readlink 85 -#define __NR_uselib 86 -#define __NR_swapon 87 -#define __NR_reboot 88 -#define __NR_readdir 89 -#define __NR_mmap 90 -#define __NR_munmap 91 -#define __NR_truncate 92 -#define __NR_ftruncate 93 -#define __NR_fchmod 94 -#define __NR_fchown 95 -#define __NR_getpriority 96 -#define __NR_setpriority 97 -/*#define __NR_profil 98*/ -#define __NR_statfs 99 -#define __NR_fstatfs 100 -/*#define __NR_ioperm 101*/ -#define __NR_socketcall 102 -#define __NR_syslog 103 -#define __NR_setitimer 104 -#define __NR_getitimer 105 -#define __NR_stat 106 -#define __NR_lstat 107 -#define __NR_fstat 108 -/*#define __NR_olduname 109*/ -/*#define __NR_iopl 110*/ /* not supported */ -#define __NR_vhangup 111 -/*#define __NR_idle 112*/ /* Obsolete */ -/*#define __NR_vm86 113*/ /* not supported */ -#define __NR_wait4 114 -#define __NR_swapoff 115 -#define __NR_sysinfo 116 -#define __NR_ipc 117 -#define __NR_fsync 118 -#define __NR_sigreturn 119 -#define __NR_clone 120 -#define __NR_setdomainname 121 -#define __NR_uname 122 -#define __NR_cacheflush 123 -#define __NR_adjtimex 124 -#define __NR_mprotect 125 -#define __NR_sigprocmask 126 -#define __NR_create_module 127 -#define __NR_init_module 128 -#define __NR_delete_module 129 -#define __NR_get_kernel_syms 130 -#define __NR_quotactl 131 -#define __NR_getpgid 132 -#define __NR_fchdir 133 -#define __NR_bdflush 134 -#define __NR_sysfs 135 -#define __NR_personality 136 -/*#define __NR_afs_syscall 137*/ /* Syscall for Andrew File System */ -#define __NR_setfsuid 138 -#define __NR_setfsgid 139 -#define __NR__llseek 140 -#define __NR_getdents 141 -#define __NR__newselect 142 -#define __NR_flock 143 -#define __NR_msync 144 -#define __NR_readv 145 -#define __NR_writev 146 -#define __NR_getsid 147 -#define __NR_fdatasync 148 -#define __NR__sysctl 149 -#define __NR_mlock 150 -#define __NR_munlock 151 -#define __NR_mlockall 152 -#define __NR_munlockall 153 -#define __NR_sched_setparam 154 -#define __NR_sched_getparam 155 -#define __NR_sched_setscheduler 156 -#define __NR_sched_getscheduler 157 -#define __NR_sched_yield 158 -#define __NR_sched_get_priority_max 159 -#define __NR_sched_get_priority_min 160 -#define __NR_sched_rr_get_interval 161 -#define __NR_nanosleep 162 -#define __NR_mremap 163 -#define __NR_setresuid 164 -#define __NR_getresuid 165 -#define __NR_getpagesize 166 -#define __NR_query_module 167 -#define __NR_poll 168 -#define __NR_nfsservctl 169 -#define __NR_setresgid 170 -#define __NR_getresgid 171 -#define __NR_prctl 172 -#define __NR_rt_sigreturn 173 -#define __NR_rt_sigaction 174 -#define __NR_rt_sigprocmask 175 -#define __NR_rt_sigpending 176 -#define __NR_rt_sigtimedwait 177 -#define __NR_rt_sigqueueinfo 178 -#define __NR_rt_sigsuspend 179 -#define __NR_pread64 180 -#define __NR_pwrite64 181 -#define __NR_lchown 182 -#define __NR_getcwd 183 -#define __NR_capget 184 -#define __NR_capset 185 -#define __NR_sigaltstack 186 -#define __NR_sendfile 187 -#define __NR_getpmsg 188 /* some people actually want streams */ -#define __NR_putpmsg 189 /* some people actually want streams */ -#define __NR_vfork 190 -#define __NR_ugetrlimit 191 -#define __NR_mmap2 192 -#define __NR_truncate64 193 -#define __NR_ftruncate64 194 -#define __NR_stat64 195 -#define __NR_lstat64 196 -#define __NR_fstat64 197 -#define __NR_chown32 198 -#define __NR_getuid32 199 -#define __NR_getgid32 200 -#define __NR_geteuid32 201 -#define __NR_getegid32 202 -#define __NR_setreuid32 203 -#define __NR_setregid32 204 -#define __NR_getgroups32 205 -#define __NR_setgroups32 206 -#define __NR_fchown32 207 -#define __NR_setresuid32 208 -#define __NR_getresuid32 209 -#define __NR_setresgid32 210 -#define __NR_getresgid32 211 -#define __NR_lchown32 212 -#define __NR_setuid32 213 -#define __NR_setgid32 214 -#define __NR_setfsuid32 215 -#define __NR_setfsgid32 216 -#define __NR_pivot_root 217 -/* 218*/ -/* 219*/ -#define __NR_getdents64 220 -#define __NR_gettid 221 -#define __NR_tkill 222 -#define __NR_setxattr 223 -#define __NR_lsetxattr 224 -#define __NR_fsetxattr 225 -#define __NR_getxattr 226 -#define __NR_lgetxattr 227 -#define __NR_fgetxattr 228 -#define __NR_listxattr 229 -#define __NR_llistxattr 230 -#define __NR_flistxattr 231 -#define __NR_removexattr 232 -#define __NR_lremovexattr 233 -#define __NR_fremovexattr 234 -#define __NR_futex 235 -#define __NR_sendfile64 236 -#define __NR_mincore 237 -#define __NR_madvise 238 -#define __NR_fcntl64 239 -#define __NR_readahead 240 -#define __NR_io_setup 241 -#define __NR_io_destroy 242 -#define __NR_io_getevents 243 -#define __NR_io_submit 244 -#define __NR_io_cancel 245 -#define __NR_fadvise64 246 -#define __NR_exit_group 247 -#define __NR_lookup_dcookie 248 -#define __NR_epoll_create 249 -#define __NR_epoll_ctl 250 -#define __NR_epoll_wait 251 -#define __NR_remap_file_pages 252 -#define __NR_set_tid_address 253 -#define __NR_timer_create 254 -#define __NR_timer_settime 255 -#define __NR_timer_gettime 256 -#define __NR_timer_getoverrun 257 -#define __NR_timer_delete 258 -#define __NR_clock_settime 259 -#define __NR_clock_gettime 260 -#define __NR_clock_getres 261 -#define __NR_clock_nanosleep 262 -#define __NR_statfs64 263 -#define __NR_fstatfs64 264 -#define __NR_tgkill 265 -#define __NR_utimes 266 -#define __NR_fadvise64_64 267 -#define __NR_mbind 268 -#define __NR_get_mempolicy 269 -#define __NR_set_mempolicy 270 -#define __NR_mq_open 271 -#define __NR_mq_unlink 272 -#define __NR_mq_timedsend 273 -#define __NR_mq_timedreceive 274 -#define __NR_mq_notify 275 -#define __NR_mq_getsetattr 276 -#define __NR_waitid 277 -/*#define __NR_vserver 278*/ -#define __NR_add_key 279 -#define __NR_request_key 280 -#define __NR_keyctl 281 -#define __NR_ioprio_set 282 -#define __NR_ioprio_get 283 -#define __NR_inotify_init 284 -#define __NR_inotify_add_watch 285 -#define __NR_inotify_rm_watch 286 -#define __NR_migrate_pages 287 -#define __NR_openat 288 -#define __NR_mkdirat 289 -#define __NR_mknodat 290 -#define __NR_fchownat 291 -#define __NR_futimesat 292 -#define __NR_fstatat64 293 -#define __NR_unlinkat 294 -#define __NR_renameat 295 -#define __NR_linkat 296 -#define __NR_symlinkat 297 -#define __NR_readlinkat 298 -#define __NR_fchmodat 299 -#define __NR_faccessat 300 -#define __NR_pselect6 301 -#define __NR_ppoll 302 -#define __NR_unshare 303 -#define __NR_set_robust_list 304 -#define __NR_get_robust_list 305 -#define __NR_splice 306 -#define __NR_sync_file_range 307 -#define __NR_tee 308 -#define __NR_vmsplice 309 -#define __NR_move_pages 310 -#define __NR_sched_setaffinity 311 -#define __NR_sched_getaffinity 312 -#define __NR_kexec_load 313 -#define __NR_getcpu 314 -#define __NR_epoll_pwait 315 -#define __NR_utimensat 316 -#define __NR_signalfd 317 -#define __NR_timerfd_create 318 -#define __NR_eventfd 319 -#define __NR_fallocate 320 -#define __NR_timerfd_settime 321 -#define __NR_timerfd_gettime 322 -#define __NR_signalfd4 323 -#define __NR_eventfd2 324 -#define __NR_epoll_create1 325 -#define __NR_dup3 326 -#define __NR_pipe2 327 -#define __NR_inotify_init1 328 -#define __NR_preadv 329 -#define __NR_pwritev 330 -#define __NR_rt_tgsigqueueinfo 331 -#define __NR_perf_event_open 332 -#define __NR_get_thread_area 333 -#define __NR_set_thread_area 334 -#define __NR_atomic_cmpxchg_32 335 -#define __NR_atomic_barrier 336 -#define __NR_fanotify_init 337 -#define __NR_fanotify_mark 338 -#define __NR_prlimit64 339 -#define __NR_name_to_handle_at 340 -#define __NR_open_by_handle_at 341 -#define __NR_clock_adjtime 342 -#define __NR_syncfs 343 -#define __NR_setns 344 -#define __NR_process_vm_readv 345 -#define __NR_process_vm_writev 346 +#include <uapi/asm/unistd.h> -#ifdef __KERNEL__ -#define NR_syscalls 347 +#define NR_syscalls 348 #define __ARCH_WANT_OLD_READDIR #define __ARCH_WANT_OLD_STAT @@ -393,5 +42,4 @@ */ #define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall") -#endif /* __KERNEL__ */ #endif /* _ASM_M68K_UNISTD_H_ */ diff --git a/arch/m68k/include/uapi/asm/Kbuild b/arch/m68k/include/uapi/asm/Kbuild index baebb3da1d44..972bce120e1e 100644 --- a/arch/m68k/include/uapi/asm/Kbuild +++ b/arch/m68k/include/uapi/asm/Kbuild @@ -1,3 +1,26 @@ # UAPI Header export list include include/uapi/asm-generic/Kbuild.asm +header-y += a.out.h +header-y += auxvec.h +header-y += byteorder.h +header-y += cachectl.h +header-y += fcntl.h +header-y += ioctls.h +header-y += msgbuf.h +header-y += param.h +header-y += poll.h +header-y += posix_types.h +header-y += ptrace.h +header-y += sembuf.h +header-y += setup.h +header-y += shmbuf.h +header-y += sigcontext.h +header-y += signal.h +header-y += socket.h +header-y += sockios.h +header-y += stat.h +header-y += swab.h +header-y += termbits.h +header-y += termios.h +header-y += unistd.h diff --git a/arch/m68k/include/asm/a.out.h b/arch/m68k/include/uapi/asm/a.out.h index 3885fe43432a..3885fe43432a 100644 --- a/arch/m68k/include/asm/a.out.h +++ b/arch/m68k/include/uapi/asm/a.out.h diff --git a/arch/m68k/include/asm/auxvec.h b/arch/m68k/include/uapi/asm/auxvec.h index 844d6d52204b..844d6d52204b 100644 --- a/arch/m68k/include/asm/auxvec.h +++ b/arch/m68k/include/uapi/asm/auxvec.h diff --git a/arch/m68k/include/asm/byteorder.h b/arch/m68k/include/uapi/asm/byteorder.h index 31b260a88803..31b260a88803 100644 --- a/arch/m68k/include/asm/byteorder.h +++ b/arch/m68k/include/uapi/asm/byteorder.h diff --git a/arch/m68k/include/asm/cachectl.h b/arch/m68k/include/uapi/asm/cachectl.h index 525978e959e3..525978e959e3 100644 --- a/arch/m68k/include/asm/cachectl.h +++ b/arch/m68k/include/uapi/asm/cachectl.h diff --git a/arch/m68k/include/asm/fcntl.h b/arch/m68k/include/uapi/asm/fcntl.h index 1c369b20dc45..1c369b20dc45 100644 --- a/arch/m68k/include/asm/fcntl.h +++ b/arch/m68k/include/uapi/asm/fcntl.h diff --git a/arch/m68k/include/asm/ioctls.h b/arch/m68k/include/uapi/asm/ioctls.h index 1332bb4ca5b0..1332bb4ca5b0 100644 --- a/arch/m68k/include/asm/ioctls.h +++ b/arch/m68k/include/uapi/asm/ioctls.h diff --git a/arch/m68k/include/asm/msgbuf.h b/arch/m68k/include/uapi/asm/msgbuf.h index 243cb798de8f..243cb798de8f 100644 --- a/arch/m68k/include/asm/msgbuf.h +++ b/arch/m68k/include/uapi/asm/msgbuf.h diff --git a/arch/m68k/include/asm/param.h b/arch/m68k/include/uapi/asm/param.h index 36265ccf5c7b..36265ccf5c7b 100644 --- a/arch/m68k/include/asm/param.h +++ b/arch/m68k/include/uapi/asm/param.h diff --git a/arch/m68k/include/asm/poll.h b/arch/m68k/include/uapi/asm/poll.h index f080fcdb61bf..f080fcdb61bf 100644 --- a/arch/m68k/include/asm/poll.h +++ b/arch/m68k/include/uapi/asm/poll.h diff --git a/arch/m68k/include/asm/posix_types.h b/arch/m68k/include/uapi/asm/posix_types.h index cf4dbf70fdc7..cf4dbf70fdc7 100644 --- a/arch/m68k/include/asm/posix_types.h +++ b/arch/m68k/include/uapi/asm/posix_types.h diff --git a/arch/m68k/include/uapi/asm/ptrace.h b/arch/m68k/include/uapi/asm/ptrace.h new file mode 100644 index 000000000000..caf92fd34939 --- /dev/null +++ b/arch/m68k/include/uapi/asm/ptrace.h @@ -0,0 +1,79 @@ +#ifndef _UAPI_M68K_PTRACE_H +#define _UAPI_M68K_PTRACE_H + +#define PT_D1 0 +#define PT_D2 1 +#define PT_D3 2 +#define PT_D4 3 +#define PT_D5 4 +#define PT_D6 5 +#define PT_D7 6 +#define PT_A0 7 +#define PT_A1 8 +#define PT_A2 9 +#define PT_A3 10 +#define PT_A4 11 +#define PT_A5 12 +#define PT_A6 13 +#define PT_D0 14 +#define PT_USP 15 +#define PT_ORIG_D0 16 +#define PT_SR 17 +#define PT_PC 18 + +#ifndef __ASSEMBLY__ + +/* this struct defines the way the registers are stored on the + stack during a system call. */ + +struct pt_regs { + long d1; + long d2; + long d3; + long d4; + long d5; + long a0; + long a1; + long a2; + long d0; + long orig_d0; + long stkadj; +#ifdef CONFIG_COLDFIRE + unsigned format : 4; /* frame format specifier */ + unsigned vector : 12; /* vector offset */ + unsigned short sr; + unsigned long pc; +#else + unsigned short sr; + unsigned long pc; + unsigned format : 4; /* frame format specifier */ + unsigned vector : 12; /* vector offset */ +#endif +}; + +/* + * This is the extended stack used by signal handlers and the context + * switcher: it's pushed after the normal "struct pt_regs". + */ +struct switch_stack { + unsigned long d6; + unsigned long d7; + unsigned long a3; + unsigned long a4; + unsigned long a5; + unsigned long a6; + unsigned long retpc; +}; + +/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */ +#define PTRACE_GETREGS 12 +#define PTRACE_SETREGS 13 +#define PTRACE_GETFPREGS 14 +#define PTRACE_SETFPREGS 15 + +#define PTRACE_GET_THREAD_AREA 25 + +#define PTRACE_SINGLEBLOCK 33 /* resume execution until next branch */ + +#endif /* __ASSEMBLY__ */ +#endif /* _UAPI_M68K_PTRACE_H */ diff --git a/arch/m68k/include/asm/sembuf.h b/arch/m68k/include/uapi/asm/sembuf.h index 2308052a8c24..2308052a8c24 100644 --- a/arch/m68k/include/asm/sembuf.h +++ b/arch/m68k/include/uapi/asm/sembuf.h diff --git a/arch/m68k/include/uapi/asm/setup.h b/arch/m68k/include/uapi/asm/setup.h new file mode 100644 index 000000000000..85579bff455c --- /dev/null +++ b/arch/m68k/include/uapi/asm/setup.h @@ -0,0 +1,103 @@ +/* +** asm/setup.h -- Definition of the Linux/m68k setup information +** +** Copyright 1992 by Greg Harp +** +** This file is subject to the terms and conditions of the GNU General Public +** License. See the file COPYING in the main directory of this archive +** for more details. +** +** Created 09/29/92 by Greg Harp +** +** 5/2/94 Roman Hodek: +** Added bi_atari part of the machine dependent union bi_un; for now it +** contains just a model field to distinguish between TT and Falcon. +** 26/7/96 Roman Zippel: +** Renamed to setup.h; added some useful macros to allow gcc some +** optimizations if possible. +** 5/10/96 Geert Uytterhoeven: +** Redesign of the boot information structure; moved boot information +** structure to bootinfo.h +*/ + +#ifndef _UAPI_M68K_SETUP_H +#define _UAPI_M68K_SETUP_H + + + + /* + * Linux/m68k Architectures + */ + +#define MACH_AMIGA 1 +#define MACH_ATARI 2 +#define MACH_MAC 3 +#define MACH_APOLLO 4 +#define MACH_SUN3 5 +#define MACH_MVME147 6 +#define MACH_MVME16x 7 +#define MACH_BVME6000 8 +#define MACH_HP300 9 +#define MACH_Q40 10 +#define MACH_SUN3X 11 +#define MACH_M54XX 12 + +#define COMMAND_LINE_SIZE 256 + + + + /* + * CPU, FPU and MMU types + * + * Note: we may rely on the following equalities: + * + * CPU_68020 == MMU_68851 + * CPU_68030 == MMU_68030 + * CPU_68040 == FPU_68040 == MMU_68040 + * CPU_68060 == FPU_68060 == MMU_68060 + */ + +#define CPUB_68020 0 +#define CPUB_68030 1 +#define CPUB_68040 2 +#define CPUB_68060 3 +#define CPUB_COLDFIRE 4 + +#define CPU_68020 (1<<CPUB_68020) +#define CPU_68030 (1<<CPUB_68030) +#define CPU_68040 (1<<CPUB_68040) +#define CPU_68060 (1<<CPUB_68060) +#define CPU_COLDFIRE (1<<CPUB_COLDFIRE) + +#define FPUB_68881 0 +#define FPUB_68882 1 +#define FPUB_68040 2 /* Internal FPU */ +#define FPUB_68060 3 /* Internal FPU */ +#define FPUB_SUNFPA 4 /* Sun-3 FPA */ +#define FPUB_COLDFIRE 5 /* ColdFire FPU */ + +#define FPU_68881 (1<<FPUB_68881) +#define FPU_68882 (1<<FPUB_68882) +#define FPU_68040 (1<<FPUB_68040) +#define FPU_68060 (1<<FPUB_68060) +#define FPU_SUNFPA (1<<FPUB_SUNFPA) +#define FPU_COLDFIRE (1<<FPUB_COLDFIRE) + +#define MMUB_68851 0 +#define MMUB_68030 1 /* Internal MMU */ +#define MMUB_68040 2 /* Internal MMU */ +#define MMUB_68060 3 /* Internal MMU */ +#define MMUB_APOLLO 4 /* Custom Apollo */ +#define MMUB_SUN3 5 /* Custom Sun-3 */ +#define MMUB_COLDFIRE 6 /* Internal MMU */ + +#define MMU_68851 (1<<MMUB_68851) +#define MMU_68030 (1<<MMUB_68030) +#define MMU_68040 (1<<MMUB_68040) +#define MMU_68060 (1<<MMUB_68060) +#define MMU_SUN3 (1<<MMUB_SUN3) +#define MMU_APOLLO (1<<MMUB_APOLLO) +#define MMU_COLDFIRE (1<<MMUB_COLDFIRE) + + +#endif /* _UAPI_M68K_SETUP_H */ diff --git a/arch/m68k/include/asm/shmbuf.h b/arch/m68k/include/uapi/asm/shmbuf.h index f8928d62f1b7..f8928d62f1b7 100644 --- a/arch/m68k/include/asm/shmbuf.h +++ b/arch/m68k/include/uapi/asm/shmbuf.h diff --git a/arch/m68k/include/asm/sigcontext.h b/arch/m68k/include/uapi/asm/sigcontext.h index 523db2a51cf3..523db2a51cf3 100644 --- a/arch/m68k/include/asm/sigcontext.h +++ b/arch/m68k/include/uapi/asm/sigcontext.h diff --git a/arch/m68k/include/uapi/asm/signal.h b/arch/m68k/include/uapi/asm/signal.h new file mode 100644 index 000000000000..2b450f311bd9 --- /dev/null +++ b/arch/m68k/include/uapi/asm/signal.h @@ -0,0 +1,118 @@ +#ifndef _UAPI_M68K_SIGNAL_H +#define _UAPI_M68K_SIGNAL_H + +#include <linux/types.h> + +/* Avoid too many header ordering problems. */ +struct siginfo; + +#ifndef __KERNEL__ +/* Here we must cater to libcs that poke about in kernel headers. */ + +#define NSIG 32 +typedef unsigned long sigset_t; + +#endif /* __KERNEL__ */ + +#define SIGHUP 1 +#define SIGINT 2 +#define SIGQUIT 3 +#define SIGILL 4 +#define SIGTRAP 5 +#define SIGABRT 6 +#define SIGIOT 6 +#define SIGBUS 7 +#define SIGFPE 8 +#define SIGKILL 9 +#define SIGUSR1 10 +#define SIGSEGV 11 +#define SIGUSR2 12 +#define SIGPIPE 13 +#define SIGALRM 14 +#define SIGTERM 15 +#define SIGSTKFLT 16 +#define SIGCHLD 17 +#define SIGCONT 18 +#define SIGSTOP 19 +#define SIGTSTP 20 +#define SIGTTIN 21 +#define SIGTTOU 22 +#define SIGURG 23 +#define SIGXCPU 24 +#define SIGXFSZ 25 +#define SIGVTALRM 26 +#define SIGPROF 27 +#define SIGWINCH 28 +#define SIGIO 29 +#define SIGPOLL SIGIO +/* +#define SIGLOST 29 +*/ +#define SIGPWR 30 +#define SIGSYS 31 +#define SIGUNUSED 31 + +/* These should not be considered constants from userland. */ +#define SIGRTMIN 32 +#define SIGRTMAX _NSIG + +/* + * SA_FLAGS values: + * + * SA_ONSTACK indicates that a registered stack_t will be used. + * SA_RESTART flag to get restarting signals (which were the default long ago) + * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop. + * SA_RESETHAND clears the handler when the signal is delivered. + * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies. + * SA_NODEFER prevents the current signal from being masked in the handler. + * + * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single + * Unix names RESETHAND and NODEFER respectively. + */ +#define SA_NOCLDSTOP 0x00000001 +#define SA_NOCLDWAIT 0x00000002 +#define SA_SIGINFO 0x00000004 +#define SA_ONSTACK 0x08000000 +#define SA_RESTART 0x10000000 +#define SA_NODEFER 0x40000000 +#define SA_RESETHAND 0x80000000 + +#define SA_NOMASK SA_NODEFER +#define SA_ONESHOT SA_RESETHAND + +/* + * sigaltstack controls + */ +#define SS_ONSTACK 1 +#define SS_DISABLE 2 + +#define MINSIGSTKSZ 2048 +#define SIGSTKSZ 8192 + +#include <asm-generic/signal-defs.h> + +#ifndef __KERNEL__ +/* Here we must cater to libcs that poke about in kernel headers. */ + +struct sigaction { + union { + __sighandler_t _sa_handler; + void (*_sa_sigaction)(int, struct siginfo *, void *); + } _u; + sigset_t sa_mask; + unsigned long sa_flags; + void (*sa_restorer)(void); +}; + +#define sa_handler _u._sa_handler +#define sa_sigaction _u._sa_sigaction + +#endif /* __KERNEL__ */ + +typedef struct sigaltstack { + void __user *ss_sp; + int ss_flags; + size_t ss_size; +} stack_t; + +#endif /* _UAPI_M68K_SIGNAL_H */ diff --git a/arch/m68k/include/asm/socket.h b/arch/m68k/include/uapi/asm/socket.h index d1be684edf97..d1be684edf97 100644 --- a/arch/m68k/include/asm/socket.h +++ b/arch/m68k/include/uapi/asm/socket.h diff --git a/arch/m68k/include/asm/sockios.h b/arch/m68k/include/uapi/asm/sockios.h index c04a23943cb7..c04a23943cb7 100644 --- a/arch/m68k/include/asm/sockios.h +++ b/arch/m68k/include/uapi/asm/sockios.h diff --git a/arch/m68k/include/asm/stat.h b/arch/m68k/include/uapi/asm/stat.h index dd38bc2e9f98..dd38bc2e9f98 100644 --- a/arch/m68k/include/asm/stat.h +++ b/arch/m68k/include/uapi/asm/stat.h diff --git a/arch/m68k/include/asm/swab.h b/arch/m68k/include/uapi/asm/swab.h index b7b37a40defc..b7b37a40defc 100644 --- a/arch/m68k/include/asm/swab.h +++ b/arch/m68k/include/uapi/asm/swab.h diff --git a/arch/m68k/include/asm/termbits.h b/arch/m68k/include/uapi/asm/termbits.h index aea1e37b765a..aea1e37b765a 100644 --- a/arch/m68k/include/asm/termbits.h +++ b/arch/m68k/include/uapi/asm/termbits.h diff --git a/arch/m68k/include/uapi/asm/termios.h b/arch/m68k/include/uapi/asm/termios.h new file mode 100644 index 000000000000..ce2142c9ac1d --- /dev/null +++ b/arch/m68k/include/uapi/asm/termios.h @@ -0,0 +1,44 @@ +#ifndef _UAPI_M68K_TERMIOS_H +#define _UAPI_M68K_TERMIOS_H + +#include <asm/termbits.h> +#include <asm/ioctls.h> + +struct winsize { + unsigned short ws_row; + unsigned short ws_col; + unsigned short ws_xpixel; + unsigned short ws_ypixel; +}; + +#define NCC 8 +struct termio { + unsigned short c_iflag; /* input mode flags */ + unsigned short c_oflag; /* output mode flags */ + unsigned short c_cflag; /* control mode flags */ + unsigned short c_lflag; /* local mode flags */ + unsigned char c_line; /* line discipline */ + unsigned char c_cc[NCC]; /* control characters */ +}; + + +/* modem lines */ +#define TIOCM_LE 0x001 +#define TIOCM_DTR 0x002 +#define TIOCM_RTS 0x004 +#define TIOCM_ST 0x008 +#define TIOCM_SR 0x010 +#define TIOCM_CTS 0x020 +#define TIOCM_CAR 0x040 +#define TIOCM_RNG 0x080 +#define TIOCM_DSR 0x100 +#define TIOCM_CD TIOCM_CAR +#define TIOCM_RI TIOCM_RNG +#define TIOCM_OUT1 0x2000 +#define TIOCM_OUT2 0x4000 +#define TIOCM_LOOP 0x8000 + +/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */ + + +#endif /* _UAPI_M68K_TERMIOS_H */ diff --git a/arch/m68k/include/uapi/asm/unistd.h b/arch/m68k/include/uapi/asm/unistd.h new file mode 100644 index 000000000000..b94bfbf90705 --- /dev/null +++ b/arch/m68k/include/uapi/asm/unistd.h @@ -0,0 +1,357 @@ +#ifndef _UAPI_ASM_M68K_UNISTD_H_ +#define _UAPI_ASM_M68K_UNISTD_H_ + +/* + * This file contains the system call numbers. + */ + +#define __NR_restart_syscall 0 +#define __NR_exit 1 +#define __NR_fork 2 +#define __NR_read 3 +#define __NR_write 4 +#define __NR_open 5 +#define __NR_close 6 +#define __NR_waitpid 7 +#define __NR_creat 8 +#define __NR_link 9 +#define __NR_unlink 10 +#define __NR_execve 11 +#define __NR_chdir 12 +#define __NR_time 13 +#define __NR_mknod 14 +#define __NR_chmod 15 +#define __NR_chown 16 +/*#define __NR_break 17*/ +#define __NR_oldstat 18 +#define __NR_lseek 19 +#define __NR_getpid 20 +#define __NR_mount 21 +#define __NR_umount 22 +#define __NR_setuid 23 +#define __NR_getuid 24 +#define __NR_stime 25 +#define __NR_ptrace 26 +#define __NR_alarm 27 +#define __NR_oldfstat 28 +#define __NR_pause 29 +#define __NR_utime 30 +/*#define __NR_stty 31*/ +/*#define __NR_gtty 32*/ +#define __NR_access 33 +#define __NR_nice 34 +/*#define __NR_ftime 35*/ +#define __NR_sync 36 +#define __NR_kill 37 +#define __NR_rename 38 +#define __NR_mkdir 39 +#define __NR_rmdir 40 +#define __NR_dup 41 +#define __NR_pipe 42 +#define __NR_times 43 +/*#define __NR_prof 44*/ +#define __NR_brk 45 +#define __NR_setgid 46 +#define __NR_getgid 47 +#define __NR_signal 48 +#define __NR_geteuid 49 +#define __NR_getegid 50 +#define __NR_acct 51 +#define __NR_umount2 52 +/*#define __NR_lock 53*/ +#define __NR_ioctl 54 +#define __NR_fcntl 55 +/*#define __NR_mpx 56*/ +#define __NR_setpgid 57 +/*#define __NR_ulimit 58*/ +/*#define __NR_oldolduname 59*/ +#define __NR_umask 60 +#define __NR_chroot 61 +#define __NR_ustat 62 +#define __NR_dup2 63 +#define __NR_getppid 64 +#define __NR_getpgrp 65 +#define __NR_setsid 66 +#define __NR_sigaction 67 +#define __NR_sgetmask 68 +#define __NR_ssetmask 69 +#define __NR_setreuid 70 +#define __NR_setregid 71 +#define __NR_sigsuspend 72 +#define __NR_sigpending 73 +#define __NR_sethostname 74 +#define __NR_setrlimit 75 +#define __NR_getrlimit 76 +#define __NR_getrusage 77 +#define __NR_gettimeofday 78 +#define __NR_settimeofday 79 +#define __NR_getgroups 80 +#define __NR_setgroups 81 +#define __NR_select 82 +#define __NR_symlink 83 +#define __NR_oldlstat 84 +#define __NR_readlink 85 +#define __NR_uselib 86 +#define __NR_swapon 87 +#define __NR_reboot 88 +#define __NR_readdir 89 +#define __NR_mmap 90 +#define __NR_munmap 91 +#define __NR_truncate 92 +#define __NR_ftruncate 93 +#define __NR_fchmod 94 +#define __NR_fchown 95 +#define __NR_getpriority 96 +#define __NR_setpriority 97 +/*#define __NR_profil 98*/ +#define __NR_statfs 99 +#define __NR_fstatfs 100 +/*#define __NR_ioperm 101*/ +#define __NR_socketcall 102 +#define __NR_syslog 103 +#define __NR_setitimer 104 +#define __NR_getitimer 105 +#define __NR_stat 106 +#define __NR_lstat 107 +#define __NR_fstat 108 +/*#define __NR_olduname 109*/ +/*#define __NR_iopl 110*/ /* not supported */ +#define __NR_vhangup 111 +/*#define __NR_idle 112*/ /* Obsolete */ +/*#define __NR_vm86 113*/ /* not supported */ +#define __NR_wait4 114 +#define __NR_swapoff 115 +#define __NR_sysinfo 116 +#define __NR_ipc 117 +#define __NR_fsync 118 +#define __NR_sigreturn 119 +#define __NR_clone 120 +#define __NR_setdomainname 121 +#define __NR_uname 122 +#define __NR_cacheflush 123 +#define __NR_adjtimex 124 +#define __NR_mprotect 125 +#define __NR_sigprocmask 126 +#define __NR_create_module 127 +#define __NR_init_module 128 +#define __NR_delete_module 129 +#define __NR_get_kernel_syms 130 +#define __NR_quotactl 131 +#define __NR_getpgid 132 +#define __NR_fchdir 133 +#define __NR_bdflush 134 +#define __NR_sysfs 135 +#define __NR_personality 136 +/*#define __NR_afs_syscall 137*/ /* Syscall for Andrew File System */ +#define __NR_setfsuid 138 +#define __NR_setfsgid 139 +#define __NR__llseek 140 +#define __NR_getdents 141 +#define __NR__newselect 142 +#define __NR_flock 143 +#define __NR_msync 144 +#define __NR_readv 145 +#define __NR_writev 146 +#define __NR_getsid 147 +#define __NR_fdatasync 148 +#define __NR__sysctl 149 +#define __NR_mlock 150 +#define __NR_munlock 151 +#define __NR_mlockall 152 +#define __NR_munlockall 153 +#define __NR_sched_setparam 154 +#define __NR_sched_getparam 155 +#define __NR_sched_setscheduler 156 +#define __NR_sched_getscheduler 157 +#define __NR_sched_yield 158 +#define __NR_sched_get_priority_max 159 +#define __NR_sched_get_priority_min 160 +#define __NR_sched_rr_get_interval 161 +#define __NR_nanosleep 162 +#define __NR_mremap 163 +#define __NR_setresuid 164 +#define __NR_getresuid 165 +#define __NR_getpagesize 166 +#define __NR_query_module 167 +#define __NR_poll 168 +#define __NR_nfsservctl 169 +#define __NR_setresgid 170 +#define __NR_getresgid 171 +#define __NR_prctl 172 +#define __NR_rt_sigreturn 173 +#define __NR_rt_sigaction 174 +#define __NR_rt_sigprocmask 175 +#define __NR_rt_sigpending 176 +#define __NR_rt_sigtimedwait 177 +#define __NR_rt_sigqueueinfo 178 +#define __NR_rt_sigsuspend 179 +#define __NR_pread64 180 +#define __NR_pwrite64 181 +#define __NR_lchown 182 +#define __NR_getcwd 183 +#define __NR_capget 184 +#define __NR_capset 185 +#define __NR_sigaltstack 186 +#define __NR_sendfile 187 +#define __NR_getpmsg 188 /* some people actually want streams */ +#define __NR_putpmsg 189 /* some people actually want streams */ +#define __NR_vfork 190 +#define __NR_ugetrlimit 191 +#define __NR_mmap2 192 +#define __NR_truncate64 193 +#define __NR_ftruncate64 194 +#define __NR_stat64 195 +#define __NR_lstat64 196 +#define __NR_fstat64 197 +#define __NR_chown32 198 +#define __NR_getuid32 199 +#define __NR_getgid32 200 +#define __NR_geteuid32 201 +#define __NR_getegid32 202 +#define __NR_setreuid32 203 +#define __NR_setregid32 204 +#define __NR_getgroups32 205 +#define __NR_setgroups32 206 +#define __NR_fchown32 207 +#define __NR_setresuid32 208 +#define __NR_getresuid32 209 +#define __NR_setresgid32 210 +#define __NR_getresgid32 211 +#define __NR_lchown32 212 +#define __NR_setuid32 213 +#define __NR_setgid32 214 +#define __NR_setfsuid32 215 +#define __NR_setfsgid32 216 +#define __NR_pivot_root 217 +/* 218*/ +/* 219*/ +#define __NR_getdents64 220 +#define __NR_gettid 221 +#define __NR_tkill 222 +#define __NR_setxattr 223 +#define __NR_lsetxattr 224 +#define __NR_fsetxattr 225 +#define __NR_getxattr 226 +#define __NR_lgetxattr 227 +#define __NR_fgetxattr 228 +#define __NR_listxattr 229 +#define __NR_llistxattr 230 +#define __NR_flistxattr 231 +#define __NR_removexattr 232 +#define __NR_lremovexattr 233 +#define __NR_fremovexattr 234 +#define __NR_futex 235 +#define __NR_sendfile64 236 +#define __NR_mincore 237 +#define __NR_madvise 238 +#define __NR_fcntl64 239 +#define __NR_readahead 240 +#define __NR_io_setup 241 +#define __NR_io_destroy 242 +#define __NR_io_getevents 243 +#define __NR_io_submit 244 +#define __NR_io_cancel 245 +#define __NR_fadvise64 246 +#define __NR_exit_group 247 +#define __NR_lookup_dcookie 248 +#define __NR_epoll_create 249 +#define __NR_epoll_ctl 250 +#define __NR_epoll_wait 251 +#define __NR_remap_file_pages 252 +#define __NR_set_tid_address 253 +#define __NR_timer_create 254 +#define __NR_timer_settime 255 +#define __NR_timer_gettime 256 +#define __NR_timer_getoverrun 257 +#define __NR_timer_delete 258 +#define __NR_clock_settime 259 +#define __NR_clock_gettime 260 +#define __NR_clock_getres 261 +#define __NR_clock_nanosleep 262 +#define __NR_statfs64 263 +#define __NR_fstatfs64 264 +#define __NR_tgkill 265 +#define __NR_utimes 266 +#define __NR_fadvise64_64 267 +#define __NR_mbind 268 +#define __NR_get_mempolicy 269 +#define __NR_set_mempolicy 270 +#define __NR_mq_open 271 +#define __NR_mq_unlink 272 +#define __NR_mq_timedsend 273 +#define __NR_mq_timedreceive 274 +#define __NR_mq_notify 275 +#define __NR_mq_getsetattr 276 +#define __NR_waitid 277 +/*#define __NR_vserver 278*/ +#define __NR_add_key 279 +#define __NR_request_key 280 +#define __NR_keyctl 281 +#define __NR_ioprio_set 282 +#define __NR_ioprio_get 283 +#define __NR_inotify_init 284 +#define __NR_inotify_add_watch 285 +#define __NR_inotify_rm_watch 286 +#define __NR_migrate_pages 287 +#define __NR_openat 288 +#define __NR_mkdirat 289 +#define __NR_mknodat 290 +#define __NR_fchownat 291 +#define __NR_futimesat 292 +#define __NR_fstatat64 293 +#define __NR_unlinkat 294 +#define __NR_renameat 295 +#define __NR_linkat 296 +#define __NR_symlinkat 297 +#define __NR_readlinkat 298 +#define __NR_fchmodat 299 +#define __NR_faccessat 300 +#define __NR_pselect6 301 +#define __NR_ppoll 302 +#define __NR_unshare 303 +#define __NR_set_robust_list 304 +#define __NR_get_robust_list 305 +#define __NR_splice 306 +#define __NR_sync_file_range 307 +#define __NR_tee 308 +#define __NR_vmsplice 309 +#define __NR_move_pages 310 +#define __NR_sched_setaffinity 311 +#define __NR_sched_getaffinity 312 +#define __NR_kexec_load 313 +#define __NR_getcpu 314 +#define __NR_epoll_pwait 315 +#define __NR_utimensat 316 +#define __NR_signalfd 317 +#define __NR_timerfd_create 318 +#define __NR_eventfd 319 +#define __NR_fallocate 320 +#define __NR_timerfd_settime 321 +#define __NR_timerfd_gettime 322 +#define __NR_signalfd4 323 +#define __NR_eventfd2 324 +#define __NR_epoll_create1 325 +#define __NR_dup3 326 +#define __NR_pipe2 327 +#define __NR_inotify_init1 328 +#define __NR_preadv 329 +#define __NR_pwritev 330 +#define __NR_rt_tgsigqueueinfo 331 +#define __NR_perf_event_open 332 +#define __NR_get_thread_area 333 +#define __NR_set_thread_area 334 +#define __NR_atomic_cmpxchg_32 335 +#define __NR_atomic_barrier 336 +#define __NR_fanotify_init 337 +#define __NR_fanotify_mark 338 +#define __NR_prlimit64 339 +#define __NR_name_to_handle_at 340 +#define __NR_open_by_handle_at 341 +#define __NR_clock_adjtime 342 +#define __NR_syncfs 343 +#define __NR_setns 344 +#define __NR_process_vm_readv 345 +#define __NR_process_vm_writev 346 +#define __NR_kcmp 347 + +#endif /* _UAPI_ASM_M68K_UNISTD_H_ */ diff --git a/arch/m68k/kernel/syscalltable.S b/arch/m68k/kernel/syscalltable.S index ce827b376110..4fc2e29b771b 100644 --- a/arch/m68k/kernel/syscalltable.S +++ b/arch/m68k/kernel/syscalltable.S @@ -367,4 +367,5 @@ ENTRY(sys_call_table) .long sys_setns .long sys_process_vm_readv /* 345 */ .long sys_process_vm_writev + .long sys_kcmp diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig index 3f3d9ca7a5b6..5dba755a43e6 100644 --- a/arch/s390/Kconfig +++ b/arch/s390/Kconfig @@ -130,6 +130,7 @@ config S390 select ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE select HAVE_UID16 if 32BIT select ARCH_WANT_IPC_PARSE_VERSION + select HAVE_ARCH_TRANSPARENT_HUGEPAGE if 64BIT select GENERIC_SMP_IDLE_THREAD select GENERIC_TIME_VSYSCALL_OLD select GENERIC_CLOCKEVENTS diff --git a/arch/s390/boot/compressed/vmlinux.lds.S b/arch/s390/boot/compressed/vmlinux.lds.S index d80f79d8dd9c..8e1fb8239287 100644 --- a/arch/s390/boot/compressed/vmlinux.lds.S +++ b/arch/s390/boot/compressed/vmlinux.lds.S @@ -5,7 +5,7 @@ OUTPUT_FORMAT("elf64-s390", "elf64-s390", "elf64-s390") OUTPUT_ARCH(s390:64-bit) #else OUTPUT_FORMAT("elf32-s390", "elf32-s390", "elf32-s390") -OUTPUT_ARCH(s390) +OUTPUT_ARCH(s390:31-bit) #endif ENTRY(startup) diff --git a/arch/s390/include/asm/cio.h b/arch/s390/include/asm/cio.h index 55bde6035216..ad2b924167d7 100644 --- a/arch/s390/include/asm/cio.h +++ b/arch/s390/include/asm/cio.h @@ -9,6 +9,8 @@ #define LPM_ANYPATH 0xff #define __MAX_CSSID 0 +#define __MAX_SUBCHANNEL 65535 +#define __MAX_SSID 3 #include <asm/scsw.h> diff --git a/arch/s390/include/asm/perf_event.h b/arch/s390/include/asm/perf_event.h index 7941968e12b4..5f0173a31693 100644 --- a/arch/s390/include/asm/perf_event.h +++ b/arch/s390/include/asm/perf_event.h @@ -9,7 +9,7 @@ #include <asm/cpu_mf.h> /* CPU-measurement counter facility */ -#define PERF_CPUM_CF_MAX_CTR 160 +#define PERF_CPUM_CF_MAX_CTR 256 /* Per-CPU flags for PMU states */ #define PMU_F_RESERVED 0x1000 diff --git a/arch/s390/include/asm/pgtable.h b/arch/s390/include/asm/pgtable.h index dd647c919a66..2d3b7cb26005 100644 --- a/arch/s390/include/asm/pgtable.h +++ b/arch/s390/include/asm/pgtable.h @@ -506,12 +506,15 @@ static inline int pud_bad(pud_t pud) static inline int pmd_present(pmd_t pmd) { - return (pmd_val(pmd) & _SEGMENT_ENTRY_ORIGIN) != 0UL; + unsigned long mask = _SEGMENT_ENTRY_INV | _SEGMENT_ENTRY_RO; + return (pmd_val(pmd) & mask) == _HPAGE_TYPE_NONE || + !(pmd_val(pmd) & _SEGMENT_ENTRY_INV); } static inline int pmd_none(pmd_t pmd) { - return (pmd_val(pmd) & _SEGMENT_ENTRY_INV) != 0UL; + return (pmd_val(pmd) & _SEGMENT_ENTRY_INV) && + !(pmd_val(pmd) & _SEGMENT_ENTRY_RO); } static inline int pmd_large(pmd_t pmd) @@ -1223,6 +1226,11 @@ static inline void __pmd_idte(unsigned long address, pmd_t *pmdp) } #ifdef CONFIG_TRANSPARENT_HUGEPAGE + +#define SEGMENT_NONE __pgprot(_HPAGE_TYPE_NONE) +#define SEGMENT_RO __pgprot(_HPAGE_TYPE_RO) +#define SEGMENT_RW __pgprot(_HPAGE_TYPE_RW) + #define __HAVE_ARCH_PGTABLE_DEPOSIT extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pgtable_t pgtable); @@ -1242,16 +1250,15 @@ static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr, static inline unsigned long massage_pgprot_pmd(pgprot_t pgprot) { - unsigned long pgprot_pmd = 0; - - if (pgprot_val(pgprot) & _PAGE_INVALID) { - if (pgprot_val(pgprot) & _PAGE_SWT) - pgprot_pmd |= _HPAGE_TYPE_NONE; - pgprot_pmd |= _SEGMENT_ENTRY_INV; - } - if (pgprot_val(pgprot) & _PAGE_RO) - pgprot_pmd |= _SEGMENT_ENTRY_RO; - return pgprot_pmd; + /* + * pgprot is PAGE_NONE, PAGE_RO, or PAGE_RW (see __Pxxx / __Sxxx) + * Convert to segment table entry format. + */ + if (pgprot_val(pgprot) == pgprot_val(PAGE_NONE)) + return pgprot_val(SEGMENT_NONE); + if (pgprot_val(pgprot) == pgprot_val(PAGE_RO)) + return pgprot_val(SEGMENT_RO); + return pgprot_val(SEGMENT_RW); } static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot) @@ -1269,7 +1276,9 @@ static inline pmd_t pmd_mkhuge(pmd_t pmd) static inline pmd_t pmd_mkwrite(pmd_t pmd) { - pmd_val(pmd) &= ~_SEGMENT_ENTRY_RO; + /* Do not clobber _HPAGE_TYPE_NONE pages! */ + if (!(pmd_val(pmd) & _SEGMENT_ENTRY_INV)) + pmd_val(pmd) &= ~_SEGMENT_ENTRY_RO; return pmd; } diff --git a/arch/s390/include/uapi/asm/Kbuild b/arch/s390/include/uapi/asm/Kbuild index 59b67ed423b4..7bf68fff7c5d 100644 --- a/arch/s390/include/uapi/asm/Kbuild +++ b/arch/s390/include/uapi/asm/Kbuild @@ -1,8 +1,6 @@ # UAPI Header export list include include/uapi/asm-generic/Kbuild.asm -generic-y += kvm_para.h - header-y += auxvec.h header-y += bitsperlong.h header-y += byteorder.h diff --git a/arch/s390/include/uapi/asm/chpid.h b/arch/s390/include/uapi/asm/chpid.h index 581992dfae27..6b4fb29cc197 100644 --- a/arch/s390/include/uapi/asm/chpid.h +++ b/arch/s390/include/uapi/asm/chpid.h @@ -1,5 +1,5 @@ /* - * Copyright IBM Corp. 2007 + * Copyright IBM Corp. 2007, 2012 * Author(s): Peter Oberparleiter <peter.oberparleiter@de.ibm.com> */ @@ -12,10 +12,10 @@ #define __MAX_CHPID 255 struct chp_id { - u8 reserved1; - u8 cssid; - u8 reserved2; - u8 id; + __u8 reserved1; + __u8 cssid; + __u8 reserved2; + __u8 id; } __attribute__((packed)); diff --git a/arch/s390/include/uapi/asm/kvm_para.h b/arch/s390/include/uapi/asm/kvm_para.h new file mode 100644 index 000000000000..ff1f4e7b3015 --- /dev/null +++ b/arch/s390/include/uapi/asm/kvm_para.h @@ -0,0 +1,11 @@ +/* + * User API definitions for paravirtual devices on s390 + * + * Copyright IBM Corp. 2008 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License (version 2 only) + * as published by the Free Software Foundation. + * + * Author(s): Christian Borntraeger <borntraeger@de.ibm.com> + */ diff --git a/arch/s390/kernel/cache.c b/arch/s390/kernel/cache.c index 8df8d8a19c98..64b24650e4f8 100644 --- a/arch/s390/kernel/cache.c +++ b/arch/s390/kernel/cache.c @@ -59,8 +59,8 @@ enum { enum { CACHE_TI_UNIFIED = 0, - CACHE_TI_INSTRUCTION = 0, - CACHE_TI_DATA, + CACHE_TI_DATA = 0, + CACHE_TI_INSTRUCTION, }; struct cache_info { @@ -121,7 +121,10 @@ static int __init cache_add(int level, int private, int type) cache = kzalloc(sizeof(*cache), GFP_KERNEL); if (!cache) return -ENOMEM; - ti = type == CACHE_TYPE_DATA ? CACHE_TI_DATA : CACHE_TI_UNIFIED; + if (type == CACHE_TYPE_INSTRUCTION) + ti = CACHE_TI_INSTRUCTION; + else + ti = CACHE_TI_UNIFIED; cache->size = ecag(EXTRACT_SIZE, level, ti); cache->line_size = ecag(EXTRACT_LINE_SIZE, level, ti); cache->associativity = ecag(EXTRACT_ASSOCIATIVITY, level, ti); diff --git a/arch/s390/kernel/head_kdump.S b/arch/s390/kernel/head_kdump.S index acaaaf4b7055..085a95eb315f 100644 --- a/arch/s390/kernel/head_kdump.S +++ b/arch/s390/kernel/head_kdump.S @@ -85,16 +85,10 @@ .align 2 startup_kdump_relocated: basr %r13,0 -0: - mvc 0(8,%r0),.Lrestart_psw-0b(%r13) # Setup restart PSW - sam31 # Switch to 31 bit addr mode - sr %r1,%r1 # Erase register r1 - sr %r2,%r2 # Erase register r2 - sigp %r1,%r2,SIGP_SET_ARCHITECTURE # Switch to 31 bit arch mode - lpsw 0 # Start new kernel... +0: lpswe .Lrestart_psw-0b(%r13) # Start new kernel... .align 8 .Lrestart_psw: - .long 0x00080000,0x80000000 + startup + .quad 0x0000000080000000,0x0000000000000000 + startup #else .align 2 .Lep_startup_kdump: diff --git a/arch/s390/kernel/perf_cpum_cf.c b/arch/s390/kernel/perf_cpum_cf.c index 9871b1971ed7..c4e7269d4a09 100644 --- a/arch/s390/kernel/perf_cpum_cf.c +++ b/arch/s390/kernel/perf_cpum_cf.c @@ -94,7 +94,7 @@ static int get_counter_set(u64 event) set = CPUMF_CTR_SET_USER; else if (event < 128) set = CPUMF_CTR_SET_CRYPTO; - else if (event < 160) + else if (event < 256) set = CPUMF_CTR_SET_EXT; return set; @@ -138,6 +138,10 @@ static int validate_ctr_version(const struct hw_perf_event *hwc) case CPUMF_CTR_SET_EXT: if (cpuhw->info.csvn < 1) err = -EOPNOTSUPP; + if ((cpuhw->info.csvn == 1 && hwc->config > 159) || + (cpuhw->info.csvn == 2 && hwc->config > 175) || + (cpuhw->info.csvn > 2 && hwc->config > 255)) + err = -EOPNOTSUPP; break; } diff --git a/arch/s390/kernel/sclp.S b/arch/s390/kernel/sclp.S index bf053898630d..b6506ee32a36 100644 --- a/arch/s390/kernel/sclp.S +++ b/arch/s390/kernel/sclp.S @@ -44,6 +44,12 @@ _sclp_wait_int: #endif mvc .LoldpswS1-.LbaseS1(16,%r13),0(%r8) mvc 0(16,%r8),0(%r9) +#ifdef CONFIG_64BIT + epsw %r6,%r7 # set current addressing mode + nill %r6,0x1 # in new psw (31 or 64 bit mode) + nilh %r7,0x8000 + stm %r6,%r7,0(%r8) +#endif lhi %r6,0x0200 # cr mask for ext int (cr0.54) ltr %r2,%r2 jz .LsetctS1 @@ -87,7 +93,7 @@ _sclp_wait_int: .long 0x00080000, 0x80000000+.LwaitS1 # PSW to handle ext int #ifdef CONFIG_64BIT .LextpswS1_64: - .quad 0x0000000180000000, .LwaitS1 # PSW to handle ext int, 64 bit + .quad 0, .LwaitS1 # PSW to handle ext int, 64 bit #endif .LwaitpswS1: .long 0x010a0000, 0x00000000+.LloopS1 # PSW to wait for ext int diff --git a/arch/s390/kernel/vmlinux.lds.S b/arch/s390/kernel/vmlinux.lds.S index de8fa9bbd35e..79cb51adc741 100644 --- a/arch/s390/kernel/vmlinux.lds.S +++ b/arch/s390/kernel/vmlinux.lds.S @@ -8,7 +8,7 @@ #ifndef CONFIG_64BIT OUTPUT_FORMAT("elf32-s390", "elf32-s390", "elf32-s390") -OUTPUT_ARCH(s390) +OUTPUT_ARCH(s390:31-bit) ENTRY(startup) jiffies = jiffies_64 + 4; #else diff --git a/arch/s390/lib/uaccess_pt.c b/arch/s390/lib/uaccess_pt.c index 2d37bb861faf..9017a63dda3d 100644 --- a/arch/s390/lib/uaccess_pt.c +++ b/arch/s390/lib/uaccess_pt.c @@ -39,7 +39,7 @@ static __always_inline unsigned long follow_table(struct mm_struct *mm, pmd = pmd_offset(pud, addr); if (pmd_none(*pmd)) return -0x10UL; - if (pmd_huge(*pmd)) { + if (pmd_large(*pmd)) { if (write && (pmd_val(*pmd) & _SEGMENT_ENTRY_RO)) return -0x04UL; return (pmd_val(*pmd) & HPAGE_MASK) + (addr & ~HPAGE_MASK); diff --git a/arch/s390/mm/gup.c b/arch/s390/mm/gup.c index 60acb93a4680..8b8285310b5a 100644 --- a/arch/s390/mm/gup.c +++ b/arch/s390/mm/gup.c @@ -126,7 +126,7 @@ static inline int gup_pmd_range(pud_t *pudp, pud_t pud, unsigned long addr, */ if (pmd_none(pmd) || pmd_trans_splitting(pmd)) return 0; - if (unlikely(pmd_huge(pmd))) { + if (unlikely(pmd_large(pmd))) { if (!gup_huge_pmd(pmdp, pmd, addr, next, write, pages, nr)) return 0; diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig index b6b442b0d793..9f2edb5c5551 100644 --- a/arch/sparc/Kconfig +++ b/arch/sparc/Kconfig @@ -20,6 +20,7 @@ config SPARC select HAVE_ARCH_TRACEHOOK select SYSCTL_EXCEPTION_TRACE select ARCH_WANT_OPTIONAL_GPIOLIB + select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE select RTC_CLASS select RTC_DRV_M48T59 select HAVE_IRQ_WORK diff --git a/arch/sparc/crypto/Makefile b/arch/sparc/crypto/Makefile index 6ae1ad5e502b..5d469d81761f 100644 --- a/arch/sparc/crypto/Makefile +++ b/arch/sparc/crypto/Makefile @@ -13,13 +13,13 @@ obj-$(CONFIG_CRYPTO_DES_SPARC64) += camellia-sparc64.o obj-$(CONFIG_CRYPTO_CRC32C_SPARC64) += crc32c-sparc64.o -sha1-sparc64-y := sha1_asm.o sha1_glue.o crop_devid.o -sha256-sparc64-y := sha256_asm.o sha256_glue.o crop_devid.o -sha512-sparc64-y := sha512_asm.o sha512_glue.o crop_devid.o -md5-sparc64-y := md5_asm.o md5_glue.o crop_devid.o +sha1-sparc64-y := sha1_asm.o sha1_glue.o +sha256-sparc64-y := sha256_asm.o sha256_glue.o +sha512-sparc64-y := sha512_asm.o sha512_glue.o +md5-sparc64-y := md5_asm.o md5_glue.o -aes-sparc64-y := aes_asm.o aes_glue.o crop_devid.o -des-sparc64-y := des_asm.o des_glue.o crop_devid.o -camellia-sparc64-y := camellia_asm.o camellia_glue.o crop_devid.o +aes-sparc64-y := aes_asm.o aes_glue.o +des-sparc64-y := des_asm.o des_glue.o +camellia-sparc64-y := camellia_asm.o camellia_glue.o -crc32c-sparc64-y := crc32c_asm.o crc32c_glue.o crop_devid.o +crc32c-sparc64-y := crc32c_asm.o crc32c_glue.o diff --git a/arch/sparc/crypto/aes_glue.c b/arch/sparc/crypto/aes_glue.c index 8f1c9980f637..3965d1d36dfa 100644 --- a/arch/sparc/crypto/aes_glue.c +++ b/arch/sparc/crypto/aes_glue.c @@ -475,3 +475,5 @@ MODULE_LICENSE("GPL"); MODULE_DESCRIPTION("AES Secure Hash Algorithm, sparc64 aes opcode accelerated"); MODULE_ALIAS("aes"); + +#include "crop_devid.c" diff --git a/arch/sparc/crypto/camellia_glue.c b/arch/sparc/crypto/camellia_glue.c index 42905c084299..62c89af3fd3f 100644 --- a/arch/sparc/crypto/camellia_glue.c +++ b/arch/sparc/crypto/camellia_glue.c @@ -320,3 +320,5 @@ MODULE_LICENSE("GPL"); MODULE_DESCRIPTION("Camellia Cipher Algorithm, sparc64 camellia opcode accelerated"); MODULE_ALIAS("aes"); + +#include "crop_devid.c" diff --git a/arch/sparc/crypto/crc32c_glue.c b/arch/sparc/crypto/crc32c_glue.c index 0bd89cea8d8e..5162fad912ce 100644 --- a/arch/sparc/crypto/crc32c_glue.c +++ b/arch/sparc/crypto/crc32c_glue.c @@ -177,3 +177,5 @@ MODULE_LICENSE("GPL"); MODULE_DESCRIPTION("CRC32c (Castagnoli), sparc64 crc32c opcode accelerated"); MODULE_ALIAS("crc32c"); + +#include "crop_devid.c" diff --git a/arch/sparc/crypto/des_glue.c b/arch/sparc/crypto/des_glue.c index c4940c2d3073..41524cebcc49 100644 --- a/arch/sparc/crypto/des_glue.c +++ b/arch/sparc/crypto/des_glue.c @@ -527,3 +527,5 @@ MODULE_LICENSE("GPL"); MODULE_DESCRIPTION("DES & Triple DES EDE Cipher Algorithms, sparc64 des opcode accelerated"); MODULE_ALIAS("des"); + +#include "crop_devid.c" diff --git a/arch/sparc/crypto/md5_glue.c b/arch/sparc/crypto/md5_glue.c index 603d723038ce..09a9ea1dfb69 100644 --- a/arch/sparc/crypto/md5_glue.c +++ b/arch/sparc/crypto/md5_glue.c @@ -186,3 +186,5 @@ MODULE_LICENSE("GPL"); MODULE_DESCRIPTION("MD5 Secure Hash Algorithm, sparc64 md5 opcode accelerated"); MODULE_ALIAS("md5"); + +#include "crop_devid.c" diff --git a/arch/sparc/crypto/sha1_glue.c b/arch/sparc/crypto/sha1_glue.c index 2bbb20bee9f1..6cd5f29e1e0d 100644 --- a/arch/sparc/crypto/sha1_glue.c +++ b/arch/sparc/crypto/sha1_glue.c @@ -181,3 +181,5 @@ MODULE_LICENSE("GPL"); MODULE_DESCRIPTION("SHA1 Secure Hash Algorithm, sparc64 sha1 opcode accelerated"); MODULE_ALIAS("sha1"); + +#include "crop_devid.c" diff --git a/arch/sparc/crypto/sha256_glue.c b/arch/sparc/crypto/sha256_glue.c index 591e656bd891..04f555ab2680 100644 --- a/arch/sparc/crypto/sha256_glue.c +++ b/arch/sparc/crypto/sha256_glue.c @@ -239,3 +239,5 @@ MODULE_DESCRIPTION("SHA-224 and SHA-256 Secure Hash Algorithm, sparc64 sha256 op MODULE_ALIAS("sha224"); MODULE_ALIAS("sha256"); + +#include "crop_devid.c" diff --git a/arch/sparc/crypto/sha512_glue.c b/arch/sparc/crypto/sha512_glue.c index 486f0a2b7001..f04d1994d19a 100644 --- a/arch/sparc/crypto/sha512_glue.c +++ b/arch/sparc/crypto/sha512_glue.c @@ -224,3 +224,5 @@ MODULE_DESCRIPTION("SHA-384 and SHA-512 Secure Hash Algorithm, sparc64 sha512 op MODULE_ALIAS("sha384"); MODULE_ALIAS("sha512"); + +#include "crop_devid.c" diff --git a/arch/sparc/include/asm/atomic_64.h b/arch/sparc/include/asm/atomic_64.h index ce35a1cf1a20..be56a244c9cf 100644 --- a/arch/sparc/include/asm/atomic_64.h +++ b/arch/sparc/include/asm/atomic_64.h @@ -1,7 +1,7 @@ /* atomic.h: Thankfully the V9 is at least reasonable for this * stuff. * - * Copyright (C) 1996, 1997, 2000 David S. Miller (davem@redhat.com) + * Copyright (C) 1996, 1997, 2000, 2012 David S. Miller (davem@redhat.com) */ #ifndef __ARCH_SPARC64_ATOMIC__ @@ -106,6 +106,8 @@ static inline long atomic64_add_unless(atomic64_t *v, long a, long u) #define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0) +extern long atomic64_dec_if_positive(atomic64_t *v); + /* Atomic operations are already serializing */ #define smp_mb__before_atomic_dec() barrier() #define smp_mb__after_atomic_dec() barrier() diff --git a/arch/sparc/include/asm/backoff.h b/arch/sparc/include/asm/backoff.h index db3af0d30fb1..4e02086b839c 100644 --- a/arch/sparc/include/asm/backoff.h +++ b/arch/sparc/include/asm/backoff.h @@ -1,6 +1,46 @@ #ifndef _SPARC64_BACKOFF_H #define _SPARC64_BACKOFF_H +/* The macros in this file implement an exponential backoff facility + * for atomic operations. + * + * When multiple threads compete on an atomic operation, it is + * possible for one thread to be continually denied a successful + * completion of the compare-and-swap instruction. Heavily + * threaded cpu implementations like Niagara can compound this + * problem even further. + * + * When an atomic operation fails and needs to be retried, we spin a + * certain number of times. At each subsequent failure of the same + * operation we double the spin count, realizing an exponential + * backoff. + * + * When we spin, we try to use an operation that will cause the + * current cpu strand to block, and therefore make the core fully + * available to any other other runnable strands. There are two + * options, based upon cpu capabilities. + * + * On all cpus prior to SPARC-T4 we do three dummy reads of the + * condition code register. Each read blocks the strand for something + * between 40 and 50 cpu cycles. + * + * For SPARC-T4 and later we have a special "pause" instruction + * available. This is implemented using writes to register %asr27. + * The cpu will block the number of cycles written into the register, + * unless a disrupting trap happens first. SPARC-T4 specifically + * implements pause with a granularity of 8 cycles. Each strand has + * an internal pause counter which decrements every 8 cycles. So the + * chip shifts the %asr27 value down by 3 bits, and writes the result + * into the pause counter. If a value smaller than 8 is written, the + * chip blocks for 1 cycle. + * + * To achieve the same amount of backoff as the three %ccr reads give + * on earlier chips, we shift the backoff value up by 7 bits. (Three + * %ccr reads block for about 128 cycles, 1 << 7 == 128) We write the + * whole amount we want to block into the pause register, rather than + * loop writing 128 each time. + */ + #define BACKOFF_LIMIT (4 * 1024) #ifdef CONFIG_SMP @@ -11,16 +51,25 @@ #define BACKOFF_LABEL(spin_label, continue_label) \ spin_label -#define BACKOFF_SPIN(reg, tmp, label) \ - mov reg, tmp; \ -88: brnz,pt tmp, 88b; \ - sub tmp, 1, tmp; \ - set BACKOFF_LIMIT, tmp; \ - cmp reg, tmp; \ - bg,pn %xcc, label; \ - nop; \ - ba,pt %xcc, label; \ - sllx reg, 1, reg; +#define BACKOFF_SPIN(reg, tmp, label) \ + mov reg, tmp; \ +88: rd %ccr, %g0; \ + rd %ccr, %g0; \ + rd %ccr, %g0; \ + .section .pause_3insn_patch,"ax";\ + .word 88b; \ + sllx tmp, 7, tmp; \ + wr tmp, 0, %asr27; \ + clr tmp; \ + .previous; \ + brnz,pt tmp, 88b; \ + sub tmp, 1, tmp; \ + set BACKOFF_LIMIT, tmp; \ + cmp reg, tmp; \ + bg,pn %xcc, label; \ + nop; \ + ba,pt %xcc, label; \ + sllx reg, 1, reg; #else diff --git a/arch/sparc/include/asm/compat.h b/arch/sparc/include/asm/compat.h index cef99fbc0a21..830502fe62b4 100644 --- a/arch/sparc/include/asm/compat.h +++ b/arch/sparc/include/asm/compat.h @@ -232,9 +232,10 @@ static inline void __user *arch_compat_alloc_user_space(long len) struct pt_regs *regs = current_thread_info()->kregs; unsigned long usp = regs->u_regs[UREG_I6]; - if (!(test_thread_flag(TIF_32BIT))) + if (test_thread_64bit_stack(usp)) usp += STACK_BIAS; - else + + if (test_thread_flag(TIF_32BIT)) usp &= 0xffffffffUL; usp -= len; diff --git a/arch/sparc/include/asm/processor_64.h b/arch/sparc/include/asm/processor_64.h index 4e5a483122a0..721e25f0e2ea 100644 --- a/arch/sparc/include/asm/processor_64.h +++ b/arch/sparc/include/asm/processor_64.h @@ -196,7 +196,22 @@ extern unsigned long get_wchan(struct task_struct *task); #define KSTK_EIP(tsk) (task_pt_regs(tsk)->tpc) #define KSTK_ESP(tsk) (task_pt_regs(tsk)->u_regs[UREG_FP]) -#define cpu_relax() barrier() +/* Please see the commentary in asm/backoff.h for a description of + * what these instructions are doing and how they have been choosen. + * To make a long story short, we are trying to yield the current cpu + * strand during busy loops. + */ +#define cpu_relax() asm volatile("\n99:\n\t" \ + "rd %%ccr, %%g0\n\t" \ + "rd %%ccr, %%g0\n\t" \ + "rd %%ccr, %%g0\n\t" \ + ".section .pause_3insn_patch,\"ax\"\n\t"\ + ".word 99b\n\t" \ + "wr %%g0, 128, %%asr27\n\t" \ + "nop\n\t" \ + "nop\n\t" \ + ".previous" \ + ::: "memory") /* Prefetch support. This is tuned for UltraSPARC-III and later. * UltraSPARC-I will treat these as nops, and UltraSPARC-II has diff --git a/arch/sparc/include/asm/prom.h b/arch/sparc/include/asm/prom.h index c28765110706..f93003123bce 100644 --- a/arch/sparc/include/asm/prom.h +++ b/arch/sparc/include/asm/prom.h @@ -63,5 +63,10 @@ extern char *of_console_options; extern void irq_trans_init(struct device_node *dp); extern char *build_path_component(struct device_node *dp); +/* SPARC has a local implementation */ +extern int of_address_to_resource(struct device_node *dev, int index, + struct resource *r); +#define of_address_to_resource of_address_to_resource + #endif /* __KERNEL__ */ #endif /* _SPARC_PROM_H */ diff --git a/arch/sparc/include/asm/thread_info_64.h b/arch/sparc/include/asm/thread_info_64.h index 4e2276631081..a3fe4dcc0aa6 100644 --- a/arch/sparc/include/asm/thread_info_64.h +++ b/arch/sparc/include/asm/thread_info_64.h @@ -259,6 +259,11 @@ static inline bool test_and_clear_restore_sigmask(void) #define tsk_is_polling(t) test_tsk_thread_flag(t, TIF_POLLING_NRFLAG) +#define thread32_stack_is_64bit(__SP) (((__SP) & 0x1) != 0) +#define test_thread_64bit_stack(__SP) \ + ((test_thread_flag(TIF_32BIT) && !thread32_stack_is_64bit(__SP)) ? \ + false : true) + #endif /* !__ASSEMBLY__ */ #endif /* __KERNEL__ */ diff --git a/arch/sparc/include/asm/ttable.h b/arch/sparc/include/asm/ttable.h index 48f2807d3265..71b5a67522ab 100644 --- a/arch/sparc/include/asm/ttable.h +++ b/arch/sparc/include/asm/ttable.h @@ -372,7 +372,9 @@ etrap_spill_fixup_64bit: \ /* Normal 32bit spill */ #define SPILL_2_GENERIC(ASI) \ - srl %sp, 0, %sp; \ + and %sp, 1, %g3; \ + brnz,pn %g3, (. - (128 + 4)); \ + srl %sp, 0, %sp; \ stwa %l0, [%sp + %g0] ASI; \ mov 0x04, %g3; \ stwa %l1, [%sp + %g3] ASI; \ @@ -398,14 +400,16 @@ etrap_spill_fixup_64bit: \ stwa %i6, [%g1 + %g0] ASI; \ stwa %i7, [%g1 + %g3] ASI; \ saved; \ - retry; nop; nop; \ + retry; \ b,a,pt %xcc, spill_fixup_dax; \ b,a,pt %xcc, spill_fixup_mna; \ b,a,pt %xcc, spill_fixup; #define SPILL_2_GENERIC_ETRAP \ etrap_user_spill_32bit: \ - srl %sp, 0, %sp; \ + and %sp, 1, %g3; \ + brnz,pn %g3, etrap_user_spill_64bit; \ + srl %sp, 0, %sp; \ stwa %l0, [%sp + 0x00] %asi; \ stwa %l1, [%sp + 0x04] %asi; \ stwa %l2, [%sp + 0x08] %asi; \ @@ -427,7 +431,7 @@ etrap_user_spill_32bit: \ ba,pt %xcc, etrap_save; \ wrpr %g1, %cwp; \ nop; nop; nop; nop; \ - nop; nop; nop; nop; \ + nop; nop; \ ba,a,pt %xcc, etrap_spill_fixup_32bit; \ ba,a,pt %xcc, etrap_spill_fixup_32bit; \ ba,a,pt %xcc, etrap_spill_fixup_32bit; @@ -592,7 +596,9 @@ user_rtt_fill_64bit: \ /* Normal 32bit fill */ #define FILL_2_GENERIC(ASI) \ - srl %sp, 0, %sp; \ + and %sp, 1, %g3; \ + brnz,pn %g3, (. - (128 + 4)); \ + srl %sp, 0, %sp; \ lduwa [%sp + %g0] ASI, %l0; \ mov 0x04, %g2; \ mov 0x08, %g3; \ @@ -616,14 +622,16 @@ user_rtt_fill_64bit: \ lduwa [%g1 + %g3] ASI, %i6; \ lduwa [%g1 + %g5] ASI, %i7; \ restored; \ - retry; nop; nop; nop; nop; \ + retry; nop; nop; \ b,a,pt %xcc, fill_fixup_dax; \ b,a,pt %xcc, fill_fixup_mna; \ b,a,pt %xcc, fill_fixup; #define FILL_2_GENERIC_RTRAP \ user_rtt_fill_32bit: \ - srl %sp, 0, %sp; \ + and %sp, 1, %g3; \ + brnz,pn %g3, user_rtt_fill_64bit; \ + srl %sp, 0, %sp; \ lduwa [%sp + 0x00] %asi, %l0; \ lduwa [%sp + 0x04] %asi, %l1; \ lduwa [%sp + 0x08] %asi, %l2; \ @@ -643,7 +651,7 @@ user_rtt_fill_32bit: \ ba,pt %xcc, user_rtt_pre_restore; \ restored; \ nop; nop; nop; nop; nop; \ - nop; nop; nop; nop; nop; \ + nop; nop; nop; \ ba,a,pt %xcc, user_rtt_fill_fixup; \ ba,a,pt %xcc, user_rtt_fill_fixup; \ ba,a,pt %xcc, user_rtt_fill_fixup; diff --git a/arch/sparc/include/uapi/asm/unistd.h b/arch/sparc/include/uapi/asm/unistd.h index 8974ef7ae920..cac719d1bc5c 100644 --- a/arch/sparc/include/uapi/asm/unistd.h +++ b/arch/sparc/include/uapi/asm/unistd.h @@ -405,8 +405,13 @@ #define __NR_setns 337 #define __NR_process_vm_readv 338 #define __NR_process_vm_writev 339 +#define __NR_kern_features 340 +#define __NR_kcmp 341 -#define NR_syscalls 340 +#define NR_syscalls 342 + +/* Bitmask values returned from kern_features system call. */ +#define KERN_FEATURE_MIXED_MODE_STACK 0x00000001 #ifdef __32bit_syscall_numbers__ /* Sparc 32-bit only has the "setresuid32", "getresuid32" variants, diff --git a/arch/sparc/kernel/entry.h b/arch/sparc/kernel/entry.h index 0c218e4c0881..cc3c5cb47cda 100644 --- a/arch/sparc/kernel/entry.h +++ b/arch/sparc/kernel/entry.h @@ -59,6 +59,13 @@ struct popc_6insn_patch_entry { extern struct popc_6insn_patch_entry __popc_6insn_patch, __popc_6insn_patch_end; +struct pause_patch_entry { + unsigned int addr; + unsigned int insns[3]; +}; +extern struct pause_patch_entry __pause_3insn_patch, + __pause_3insn_patch_end; + extern void __init per_cpu_patch(void); extern void sun4v_patch_1insn_range(struct sun4v_1insn_patch_entry *, struct sun4v_1insn_patch_entry *); diff --git a/arch/sparc/kernel/leon_kernel.c b/arch/sparc/kernel/leon_kernel.c index f8b6eee40bde..87f60ee65433 100644 --- a/arch/sparc/kernel/leon_kernel.c +++ b/arch/sparc/kernel/leon_kernel.c @@ -56,11 +56,13 @@ static inline unsigned int leon_eirq_get(int cpu) static void leon_handle_ext_irq(unsigned int irq, struct irq_desc *desc) { unsigned int eirq; + struct irq_bucket *p; int cpu = sparc_leon3_cpuid(); eirq = leon_eirq_get(cpu); - if ((eirq & 0x10) && irq_map[eirq]->irq) /* bit4 tells if IRQ happened */ - generic_handle_irq(irq_map[eirq]->irq); + p = irq_map[eirq]; + if ((eirq & 0x10) && p && p->irq) /* bit4 tells if IRQ happened */ + generic_handle_irq(p->irq); } /* The extended IRQ controller has been found, this function registers it */ diff --git a/arch/sparc/kernel/perf_event.c b/arch/sparc/kernel/perf_event.c index 885a8af74064..b5c38faa4ead 100644 --- a/arch/sparc/kernel/perf_event.c +++ b/arch/sparc/kernel/perf_event.c @@ -1762,15 +1762,25 @@ static void perf_callchain_user_32(struct perf_callchain_entry *entry, ufp = regs->u_regs[UREG_I6] & 0xffffffffUL; do { - struct sparc_stackf32 *usf, sf; unsigned long pc; - usf = (struct sparc_stackf32 *) ufp; - if (__copy_from_user_inatomic(&sf, usf, sizeof(sf))) - break; + if (thread32_stack_is_64bit(ufp)) { + struct sparc_stackf *usf, sf; - pc = sf.callers_pc; - ufp = (unsigned long)sf.fp; + ufp += STACK_BIAS; + usf = (struct sparc_stackf *) ufp; + if (__copy_from_user_inatomic(&sf, usf, sizeof(sf))) + break; + pc = sf.callers_pc & 0xffffffff; + ufp = ((unsigned long) sf.fp) & 0xffffffff; + } else { + struct sparc_stackf32 *usf, sf; + usf = (struct sparc_stackf32 *) ufp; + if (__copy_from_user_inatomic(&sf, usf, sizeof(sf))) + break; + pc = sf.callers_pc; + ufp = (unsigned long)sf.fp; + } perf_callchain_store(entry, pc); } while (entry->nr < PERF_MAX_STACK_DEPTH); } diff --git a/arch/sparc/kernel/process_64.c b/arch/sparc/kernel/process_64.c index d778248ef3f8..c6e0c2910043 100644 --- a/arch/sparc/kernel/process_64.c +++ b/arch/sparc/kernel/process_64.c @@ -452,13 +452,16 @@ void flush_thread(void) /* It's a bit more tricky when 64-bit tasks are involved... */ static unsigned long clone_stackframe(unsigned long csp, unsigned long psp) { + bool stack_64bit = test_thread_64bit_stack(psp); unsigned long fp, distance, rval; - if (!(test_thread_flag(TIF_32BIT))) { + if (stack_64bit) { csp += STACK_BIAS; psp += STACK_BIAS; __get_user(fp, &(((struct reg_window __user *)psp)->ins[6])); fp += STACK_BIAS; + if (test_thread_flag(TIF_32BIT)) + fp &= 0xffffffff; } else __get_user(fp, &(((struct reg_window32 __user *)psp)->ins[6])); @@ -472,7 +475,7 @@ static unsigned long clone_stackframe(unsigned long csp, unsigned long psp) rval = (csp - distance); if (copy_in_user((void __user *) rval, (void __user *) psp, distance)) rval = 0; - else if (test_thread_flag(TIF_32BIT)) { + else if (!stack_64bit) { if (put_user(((u32)csp), &(((struct reg_window32 __user *)rval)->ins[6]))) rval = 0; @@ -507,18 +510,18 @@ void synchronize_user_stack(void) flush_user_windows(); if ((window = get_thread_wsaved()) != 0) { - int winsize = sizeof(struct reg_window); - int bias = 0; - - if (test_thread_flag(TIF_32BIT)) - winsize = sizeof(struct reg_window32); - else - bias = STACK_BIAS; - window -= 1; do { - unsigned long sp = (t->rwbuf_stkptrs[window] + bias); struct reg_window *rwin = &t->reg_window[window]; + int winsize = sizeof(struct reg_window); + unsigned long sp; + + sp = t->rwbuf_stkptrs[window]; + + if (test_thread_64bit_stack(sp)) + sp += STACK_BIAS; + else + winsize = sizeof(struct reg_window32); if (!copy_to_user((char __user *)sp, rwin, winsize)) { shift_window_buffer(window, get_thread_wsaved() - 1, t); @@ -544,13 +547,6 @@ void fault_in_user_windows(void) { struct thread_info *t = current_thread_info(); unsigned long window; - int winsize = sizeof(struct reg_window); - int bias = 0; - - if (test_thread_flag(TIF_32BIT)) - winsize = sizeof(struct reg_window32); - else - bias = STACK_BIAS; flush_user_windows(); window = get_thread_wsaved(); @@ -558,8 +554,16 @@ void fault_in_user_windows(void) if (likely(window != 0)) { window -= 1; do { - unsigned long sp = (t->rwbuf_stkptrs[window] + bias); struct reg_window *rwin = &t->reg_window[window]; + int winsize = sizeof(struct reg_window); + unsigned long sp; + + sp = t->rwbuf_stkptrs[window]; + + if (test_thread_64bit_stack(sp)) + sp += STACK_BIAS; + else + winsize = sizeof(struct reg_window32); if (unlikely(sp & 0x7UL)) stack_unaligned(sp); diff --git a/arch/sparc/kernel/ptrace_64.c b/arch/sparc/kernel/ptrace_64.c index 484dabac7045..7ff45e4ba681 100644 --- a/arch/sparc/kernel/ptrace_64.c +++ b/arch/sparc/kernel/ptrace_64.c @@ -151,7 +151,7 @@ static int regwindow64_get(struct task_struct *target, { unsigned long rw_addr = regs->u_regs[UREG_I6]; - if (test_tsk_thread_flag(current, TIF_32BIT)) { + if (!test_thread_64bit_stack(rw_addr)) { struct reg_window32 win32; int i; @@ -176,7 +176,7 @@ static int regwindow64_set(struct task_struct *target, { unsigned long rw_addr = regs->u_regs[UREG_I6]; - if (test_tsk_thread_flag(current, TIF_32BIT)) { + if (!test_thread_64bit_stack(rw_addr)) { struct reg_window32 win32; int i; diff --git a/arch/sparc/kernel/setup_64.c b/arch/sparc/kernel/setup_64.c index 0800e71d8a88..0eaf0059aaef 100644 --- a/arch/sparc/kernel/setup_64.c +++ b/arch/sparc/kernel/setup_64.c @@ -316,6 +316,25 @@ static void __init popc_patch(void) } } +static void __init pause_patch(void) +{ + struct pause_patch_entry *p; + + p = &__pause_3insn_patch; + while (p < &__pause_3insn_patch_end) { + unsigned long i, addr = p->addr; + + for (i = 0; i < 3; i++) { + *(unsigned int *) (addr + (i * 4)) = p->insns[i]; + wmb(); + __asm__ __volatile__("flush %0" + : : "r" (addr + (i * 4))); + } + + p++; + } +} + #ifdef CONFIG_SMP void __init boot_cpu_id_too_large(int cpu) { @@ -528,6 +547,8 @@ static void __init init_sparc64_elf_hwcap(void) if (sparc64_elf_hwcap & AV_SPARC_POPC) popc_patch(); + if (sparc64_elf_hwcap & AV_SPARC_PAUSE) + pause_patch(); } void __init setup_arch(char **cmdline_p) diff --git a/arch/sparc/kernel/sys_sparc_64.c b/arch/sparc/kernel/sys_sparc_64.c index 11c6c9603e71..878ef3d5fec5 100644 --- a/arch/sparc/kernel/sys_sparc_64.c +++ b/arch/sparc/kernel/sys_sparc_64.c @@ -751,3 +751,8 @@ int kernel_execve(const char *filename, : "cc"); return __res; } + +asmlinkage long sys_kern_features(void) +{ + return KERN_FEATURE_MIXED_MODE_STACK; +} diff --git a/arch/sparc/kernel/systbls_32.S b/arch/sparc/kernel/systbls_32.S index 63402f9e9f51..5147f574f125 100644 --- a/arch/sparc/kernel/systbls_32.S +++ b/arch/sparc/kernel/systbls_32.S @@ -85,3 +85,4 @@ sys_call_table: /*325*/ .long sys_pwritev, sys_rt_tgsigqueueinfo, sys_perf_event_open, sys_recvmmsg, sys_fanotify_init /*330*/ .long sys_fanotify_mark, sys_prlimit64, sys_name_to_handle_at, sys_open_by_handle_at, sys_clock_adjtime /*335*/ .long sys_syncfs, sys_sendmmsg, sys_setns, sys_process_vm_readv, sys_process_vm_writev +/*340*/ .long sys_ni_syscall, sys_kcmp diff --git a/arch/sparc/kernel/systbls_64.S b/arch/sparc/kernel/systbls_64.S index 3a58e0d66f51..1c9af9fa38e9 100644 --- a/arch/sparc/kernel/systbls_64.S +++ b/arch/sparc/kernel/systbls_64.S @@ -86,6 +86,7 @@ sys_call_table32: .word compat_sys_pwritev, compat_sys_rt_tgsigqueueinfo, sys_perf_event_open, compat_sys_recvmmsg, sys_fanotify_init /*330*/ .word sys32_fanotify_mark, sys_prlimit64, sys_name_to_handle_at, compat_sys_open_by_handle_at, compat_sys_clock_adjtime .word sys_syncfs, compat_sys_sendmmsg, sys_setns, compat_sys_process_vm_readv, compat_sys_process_vm_writev +/*340*/ .word sys_kern_features, sys_kcmp #endif /* CONFIG_COMPAT */ @@ -163,3 +164,4 @@ sys_call_table: .word sys_pwritev, sys_rt_tgsigqueueinfo, sys_perf_event_open, sys_recvmmsg, sys_fanotify_init /*330*/ .word sys_fanotify_mark, sys_prlimit64, sys_name_to_handle_at, sys_open_by_handle_at, sys_clock_adjtime .word sys_syncfs, sys_sendmmsg, sys_setns, sys_process_vm_readv, sys_process_vm_writev +/*340*/ .word sys_kern_features, sys_kcmp diff --git a/arch/sparc/kernel/unaligned_64.c b/arch/sparc/kernel/unaligned_64.c index f81d038f7340..8201c25e7669 100644 --- a/arch/sparc/kernel/unaligned_64.c +++ b/arch/sparc/kernel/unaligned_64.c @@ -113,21 +113,24 @@ static inline long sign_extend_imm13(long imm) static unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs) { - unsigned long value; + unsigned long value, fp; if (reg < 16) return (!reg ? 0 : regs->u_regs[reg]); + + fp = regs->u_regs[UREG_FP]; + if (regs->tstate & TSTATE_PRIV) { struct reg_window *win; - win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS); + win = (struct reg_window *)(fp + STACK_BIAS); value = win->locals[reg - 16]; - } else if (test_thread_flag(TIF_32BIT)) { + } else if (!test_thread_64bit_stack(fp)) { struct reg_window32 __user *win32; - win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP])); + win32 = (struct reg_window32 __user *)((unsigned long)((u32)fp)); get_user(value, &win32->locals[reg - 16]); } else { struct reg_window __user *win; - win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS); + win = (struct reg_window __user *)(fp + STACK_BIAS); get_user(value, &win->locals[reg - 16]); } return value; @@ -135,19 +138,24 @@ static unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs) static unsigned long *fetch_reg_addr(unsigned int reg, struct pt_regs *regs) { + unsigned long fp; + if (reg < 16) return ®s->u_regs[reg]; + + fp = regs->u_regs[UREG_FP]; + if (regs->tstate & TSTATE_PRIV) { struct reg_window *win; - win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS); + win = (struct reg_window *)(fp + STACK_BIAS); return &win->locals[reg - 16]; - } else if (test_thread_flag(TIF_32BIT)) { + } else if (!test_thread_64bit_stack(fp)) { struct reg_window32 *win32; - win32 = (struct reg_window32 *)((unsigned long)((u32)regs->u_regs[UREG_FP])); + win32 = (struct reg_window32 *)((unsigned long)((u32)fp)); return (unsigned long *)&win32->locals[reg - 16]; } else { struct reg_window *win; - win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS); + win = (struct reg_window *)(fp + STACK_BIAS); return &win->locals[reg - 16]; } } @@ -392,13 +400,15 @@ int handle_popc(u32 insn, struct pt_regs *regs) if (rd) regs->u_regs[rd] = ret; } else { - if (test_thread_flag(TIF_32BIT)) { + unsigned long fp = regs->u_regs[UREG_FP]; + + if (!test_thread_64bit_stack(fp)) { struct reg_window32 __user *win32; - win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP])); + win32 = (struct reg_window32 __user *)((unsigned long)((u32)fp)); put_user(ret, &win32->locals[rd - 16]); } else { struct reg_window __user *win; - win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS); + win = (struct reg_window __user *)(fp + STACK_BIAS); put_user(ret, &win->locals[rd - 16]); } } @@ -554,7 +564,7 @@ void handle_ld_nf(u32 insn, struct pt_regs *regs) reg[0] = 0; if ((insn & 0x780000) == 0x180000) reg[1] = 0; - } else if (test_thread_flag(TIF_32BIT)) { + } else if (!test_thread_64bit_stack(regs->u_regs[UREG_FP])) { put_user(0, (int __user *) reg); if ((insn & 0x780000) == 0x180000) put_user(0, ((int __user *) reg) + 1); diff --git a/arch/sparc/kernel/visemul.c b/arch/sparc/kernel/visemul.c index 08e074b7eb6a..c096c624ac4d 100644 --- a/arch/sparc/kernel/visemul.c +++ b/arch/sparc/kernel/visemul.c @@ -149,21 +149,24 @@ static inline void maybe_flush_windows(unsigned int rs1, unsigned int rs2, static unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs) { - unsigned long value; + unsigned long value, fp; if (reg < 16) return (!reg ? 0 : regs->u_regs[reg]); + + fp = regs->u_regs[UREG_FP]; + if (regs->tstate & TSTATE_PRIV) { struct reg_window *win; - win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS); + win = (struct reg_window *)(fp + STACK_BIAS); value = win->locals[reg - 16]; - } else if (test_thread_flag(TIF_32BIT)) { + } else if (!test_thread_64bit_stack(fp)) { struct reg_window32 __user *win32; - win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP])); + win32 = (struct reg_window32 __user *)((unsigned long)((u32)fp)); get_user(value, &win32->locals[reg - 16]); } else { struct reg_window __user *win; - win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS); + win = (struct reg_window __user *)(fp + STACK_BIAS); get_user(value, &win->locals[reg - 16]); } return value; @@ -172,16 +175,18 @@ static unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs) static inline unsigned long __user *__fetch_reg_addr_user(unsigned int reg, struct pt_regs *regs) { + unsigned long fp = regs->u_regs[UREG_FP]; + BUG_ON(reg < 16); BUG_ON(regs->tstate & TSTATE_PRIV); - if (test_thread_flag(TIF_32BIT)) { + if (!test_thread_64bit_stack(fp)) { struct reg_window32 __user *win32; - win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP])); + win32 = (struct reg_window32 __user *)((unsigned long)((u32)fp)); return (unsigned long __user *)&win32->locals[reg - 16]; } else { struct reg_window __user *win; - win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS); + win = (struct reg_window __user *)(fp + STACK_BIAS); return &win->locals[reg - 16]; } } @@ -204,7 +209,7 @@ static void store_reg(struct pt_regs *regs, unsigned long val, unsigned long rd) } else { unsigned long __user *rd_user = __fetch_reg_addr_user(rd, regs); - if (test_thread_flag(TIF_32BIT)) + if (!test_thread_64bit_stack(regs->u_regs[UREG_FP])) __put_user((u32)val, (u32 __user *)rd_user); else __put_user(val, rd_user); diff --git a/arch/sparc/kernel/vmlinux.lds.S b/arch/sparc/kernel/vmlinux.lds.S index 89c2c29f154b..0bacceb19150 100644 --- a/arch/sparc/kernel/vmlinux.lds.S +++ b/arch/sparc/kernel/vmlinux.lds.S @@ -132,6 +132,11 @@ SECTIONS *(.popc_6insn_patch) __popc_6insn_patch_end = .; } + .pause_3insn_patch : { + __pause_3insn_patch = .; + *(.pause_3insn_patch) + __pause_3insn_patch_end = .; + } PERCPU_SECTION(SMP_CACHE_BYTES) . = ALIGN(PAGE_SIZE); diff --git a/arch/sparc/kernel/winfixup.S b/arch/sparc/kernel/winfixup.S index a6b0863c27df..1e67ce958369 100644 --- a/arch/sparc/kernel/winfixup.S +++ b/arch/sparc/kernel/winfixup.S @@ -43,6 +43,8 @@ spill_fixup_mna: spill_fixup_dax: TRAP_LOAD_THREAD_REG(%g6, %g1) ldx [%g6 + TI_FLAGS], %g1 + andcc %sp, 0x1, %g0 + movne %icc, 0, %g1 andcc %g1, _TIF_32BIT, %g0 ldub [%g6 + TI_WSAVED], %g1 sll %g1, 3, %g3 diff --git a/arch/sparc/lib/atomic_64.S b/arch/sparc/lib/atomic_64.S index 4d502da3de78..85c233d0a340 100644 --- a/arch/sparc/lib/atomic_64.S +++ b/arch/sparc/lib/atomic_64.S @@ -1,6 +1,6 @@ /* atomic.S: These things are too big to do inline. * - * Copyright (C) 1999, 2007 David S. Miller (davem@davemloft.net) + * Copyright (C) 1999, 2007 2012 David S. Miller (davem@davemloft.net) */ #include <linux/linkage.h> @@ -117,3 +117,17 @@ ENTRY(atomic64_sub_ret) /* %o0 = decrement, %o1 = atomic_ptr */ sub %g1, %o0, %o0 2: BACKOFF_SPIN(%o2, %o3, 1b) ENDPROC(atomic64_sub_ret) + +ENTRY(atomic64_dec_if_positive) /* %o0 = atomic_ptr */ + BACKOFF_SETUP(%o2) +1: ldx [%o0], %g1 + brlez,pn %g1, 3f + sub %g1, 1, %g7 + casx [%o0], %g1, %g7 + cmp %g1, %g7 + bne,pn %xcc, BACKOFF_LABEL(2f, 1b) + nop +3: retl + sub %g1, 1, %o0 +2: BACKOFF_SPIN(%o2, %o3, 1b) +ENDPROC(atomic64_dec_if_positive) diff --git a/arch/sparc/lib/ksyms.c b/arch/sparc/lib/ksyms.c index ee31b884c61b..0c4e35e522fa 100644 --- a/arch/sparc/lib/ksyms.c +++ b/arch/sparc/lib/ksyms.c @@ -116,6 +116,7 @@ EXPORT_SYMBOL(atomic64_add); EXPORT_SYMBOL(atomic64_add_ret); EXPORT_SYMBOL(atomic64_sub); EXPORT_SYMBOL(atomic64_sub_ret); +EXPORT_SYMBOL(atomic64_dec_if_positive); /* Atomic bit operations. */ EXPORT_SYMBOL(test_and_set_bit); diff --git a/arch/sparc/math-emu/math_64.c b/arch/sparc/math-emu/math_64.c index 1704068da928..034aadbff036 100644 --- a/arch/sparc/math-emu/math_64.c +++ b/arch/sparc/math-emu/math_64.c @@ -320,7 +320,7 @@ int do_mathemu(struct pt_regs *regs, struct fpustate *f, bool illegal_insn_trap) XR = 0; else if (freg < 16) XR = regs->u_regs[freg]; - else if (test_thread_flag(TIF_32BIT)) { + else if (!test_thread_64bit_stack(regs->u_regs[UREG_FP])) { struct reg_window32 __user *win32; flushw_user (); win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP])); diff --git a/arch/tile/Makefile b/arch/tile/Makefile index 55640cf92597..3d15364c6071 100644 --- a/arch/tile/Makefile +++ b/arch/tile/Makefile @@ -26,6 +26,10 @@ $(error Set TILERA_ROOT or CROSS_COMPILE when building $(ARCH) on $(HOST_ARCH)) endif endif +# The tile compiler may emit .eh_frame information for backtracing. +# In kernel modules, this causes load failures due to unsupported relocations. +KBUILD_CFLAGS += -fno-asynchronous-unwind-tables + ifneq ($(CONFIG_DEBUG_EXTRA_FLAGS),"") KBUILD_CFLAGS += $(CONFIG_DEBUG_EXTRA_FLAGS) endif diff --git a/arch/tile/kernel/module.c b/arch/tile/kernel/module.c index 001cbfa10ac6..243ffebe38d6 100644 --- a/arch/tile/kernel/module.c +++ b/arch/tile/kernel/module.c @@ -24,16 +24,6 @@ #include <asm/homecache.h> #include <arch/opcode.h> -#ifdef __tilegx__ -# define Elf_Rela Elf64_Rela -# define ELF_R_SYM ELF64_R_SYM -# define ELF_R_TYPE ELF64_R_TYPE -#else -# define Elf_Rela Elf32_Rela -# define ELF_R_SYM ELF32_R_SYM -# define ELF_R_TYPE ELF32_R_TYPE -#endif - #ifdef MODULE_DEBUG #define DEBUGP printk #else diff --git a/arch/x86/include/asm/efi.h b/arch/x86/include/asm/efi.h index c9dcc181d4d1..6e8fdf5ad113 100644 --- a/arch/x86/include/asm/efi.h +++ b/arch/x86/include/asm/efi.h @@ -35,7 +35,7 @@ extern unsigned long asmlinkage efi_call_phys(void *, ...); #define efi_call_virt6(f, a1, a2, a3, a4, a5, a6) \ efi_call_virt(f, a1, a2, a3, a4, a5, a6) -#define efi_ioremap(addr, size, type) ioremap_cache(addr, size) +#define efi_ioremap(addr, size, type, attr) ioremap_cache(addr, size) #else /* !CONFIG_X86_32 */ @@ -89,7 +89,7 @@ extern u64 efi_call6(void *fp, u64 arg1, u64 arg2, u64 arg3, (u64)(a3), (u64)(a4), (u64)(a5), (u64)(a6)) extern void __iomem *efi_ioremap(unsigned long addr, unsigned long size, - u32 type); + u32 type, u64 attribute); #endif /* CONFIG_X86_32 */ @@ -98,6 +98,8 @@ extern void efi_set_executable(efi_memory_desc_t *md, bool executable); extern int efi_memblock_x86_reserve_range(void); extern void efi_call_phys_prelog(void); extern void efi_call_phys_epilog(void); +extern void efi_unmap_memmap(void); +extern void efi_memory_uc(u64 addr, unsigned long size); #ifndef CONFIG_EFI /* diff --git a/arch/x86/include/asm/xen/hypercall.h b/arch/x86/include/asm/xen/hypercall.h index 59c226d120cd..c20d1ce62dc6 100644 --- a/arch/x86/include/asm/xen/hypercall.h +++ b/arch/x86/include/asm/xen/hypercall.h @@ -359,18 +359,14 @@ HYPERVISOR_update_va_mapping(unsigned long va, pte_t new_val, return _hypercall4(int, update_va_mapping, va, new_val.pte, new_val.pte >> 32, flags); } +extern int __must_check xen_event_channel_op_compat(int, void *); static inline int HYPERVISOR_event_channel_op(int cmd, void *arg) { int rc = _hypercall2(int, event_channel_op, cmd, arg); - if (unlikely(rc == -ENOSYS)) { - struct evtchn_op op; - op.cmd = cmd; - memcpy(&op.u, arg, sizeof(op.u)); - rc = _hypercall1(int, event_channel_op_compat, &op); - memcpy(arg, &op.u, sizeof(op.u)); - } + if (unlikely(rc == -ENOSYS)) + rc = xen_event_channel_op_compat(cmd, arg); return rc; } @@ -386,17 +382,14 @@ HYPERVISOR_console_io(int cmd, int count, char *str) return _hypercall3(int, console_io, cmd, count, str); } +extern int __must_check HYPERVISOR_physdev_op_compat(int, void *); + static inline int HYPERVISOR_physdev_op(int cmd, void *arg) { int rc = _hypercall2(int, physdev_op, cmd, arg); - if (unlikely(rc == -ENOSYS)) { - struct physdev_op op; - op.cmd = cmd; - memcpy(&op.u, arg, sizeof(op.u)); - rc = _hypercall1(int, physdev_op_compat, &op); - memcpy(arg, &op.u, sizeof(op.u)); - } + if (unlikely(rc == -ENOSYS)) + rc = HYPERVISOR_physdev_op_compat(cmd, arg); return rc; } diff --git a/arch/x86/include/asm/xen/hypervisor.h b/arch/x86/include/asm/xen/hypervisor.h index 66d0fff1ee84..125f344f06a9 100644 --- a/arch/x86/include/asm/xen/hypervisor.h +++ b/arch/x86/include/asm/xen/hypervisor.h @@ -33,7 +33,6 @@ #ifndef _ASM_X86_XEN_HYPERVISOR_H #define _ASM_X86_XEN_HYPERVISOR_H -/* arch/i386/kernel/setup.c */ extern struct shared_info *HYPERVISOR_shared_info; extern struct start_info *xen_start_info; diff --git a/arch/x86/include/asm/xen/interface.h b/arch/x86/include/asm/xen/interface.h index 6d2f75a82a14..54d52ff1304a 100644 --- a/arch/x86/include/asm/xen/interface.h +++ b/arch/x86/include/asm/xen/interface.h @@ -51,14 +51,14 @@ * with Xen so that on ARM we can have one ABI that works for 32 and 64 * bit guests. */ typedef unsigned long xen_pfn_t; +#define PRI_xen_pfn "lx" typedef unsigned long xen_ulong_t; +#define PRI_xen_ulong "lx" /* Guest handles for primitive C types. */ __DEFINE_GUEST_HANDLE(uchar, unsigned char); __DEFINE_GUEST_HANDLE(uint, unsigned int); -__DEFINE_GUEST_HANDLE(ulong, unsigned long); DEFINE_GUEST_HANDLE(char); DEFINE_GUEST_HANDLE(int); -DEFINE_GUEST_HANDLE(long); DEFINE_GUEST_HANDLE(void); DEFINE_GUEST_HANDLE(uint64_t); DEFINE_GUEST_HANDLE(uint32_t); diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c index c265593ec2cd..1817fa911024 100644 --- a/arch/x86/kernel/apic/io_apic.c +++ b/arch/x86/kernel/apic/io_apic.c @@ -2257,6 +2257,9 @@ asmlinkage void smp_irq_move_cleanup_interrupt(void) continue; cfg = irq_cfg(irq); + if (!cfg) + continue; + raw_spin_lock(&desc->lock); /* diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c index 3373f84d1397..4a3374e61a93 100644 --- a/arch/x86/kernel/cpu/perf_event.c +++ b/arch/x86/kernel/cpu/perf_event.c @@ -208,12 +208,14 @@ static bool check_hw_exists(void) } /* - * Now write a value and read it back to see if it matches, - * this is needed to detect certain hardware emulators (qemu/kvm) - * that don't trap on the MSR access and always return 0s. + * Read the current value, change it and read it back to see if it + * matches, this is needed to detect certain hardware emulators + * (qemu/kvm) that don't trap on the MSR access and always return 0s. */ - val = 0xabcdUL; reg = x86_pmu_event_addr(0); + if (rdmsrl_safe(reg, &val)) + goto msr_fail; + val ^= 0xffffUL; ret = wrmsrl_safe(reg, val); ret |= rdmsrl_safe(reg, &val_new); if (ret || val != val_new) diff --git a/arch/x86/kernel/cpu/perf_event_intel_uncore.c b/arch/x86/kernel/cpu/perf_event_intel_uncore.c index 99d96a4978b5..3cf3d97cce3a 100644 --- a/arch/x86/kernel/cpu/perf_event_intel_uncore.c +++ b/arch/x86/kernel/cpu/perf_event_intel_uncore.c @@ -118,22 +118,24 @@ static void snbep_uncore_pci_disable_box(struct intel_uncore_box *box) { struct pci_dev *pdev = box->pci_dev; int box_ctl = uncore_pci_box_ctl(box); - u32 config; + u32 config = 0; - pci_read_config_dword(pdev, box_ctl, &config); - config |= SNBEP_PMON_BOX_CTL_FRZ; - pci_write_config_dword(pdev, box_ctl, config); + if (!pci_read_config_dword(pdev, box_ctl, &config)) { + config |= SNBEP_PMON_BOX_CTL_FRZ; + pci_write_config_dword(pdev, box_ctl, config); + } } static void snbep_uncore_pci_enable_box(struct intel_uncore_box *box) { struct pci_dev *pdev = box->pci_dev; int box_ctl = uncore_pci_box_ctl(box); - u32 config; + u32 config = 0; - pci_read_config_dword(pdev, box_ctl, &config); - config &= ~SNBEP_PMON_BOX_CTL_FRZ; - pci_write_config_dword(pdev, box_ctl, config); + if (!pci_read_config_dword(pdev, box_ctl, &config)) { + config &= ~SNBEP_PMON_BOX_CTL_FRZ; + pci_write_config_dword(pdev, box_ctl, config); + } } static void snbep_uncore_pci_enable_event(struct intel_uncore_box *box, struct perf_event *event) @@ -156,7 +158,7 @@ static u64 snbep_uncore_pci_read_counter(struct intel_uncore_box *box, struct pe { struct pci_dev *pdev = box->pci_dev; struct hw_perf_event *hwc = &event->hw; - u64 count; + u64 count = 0; pci_read_config_dword(pdev, hwc->event_base, (u32 *)&count); pci_read_config_dword(pdev, hwc->event_base + 4, (u32 *)&count + 1); @@ -603,11 +605,12 @@ static struct pci_driver snbep_uncore_pci_driver = { /* * build pci bus to socket mapping */ -static void snbep_pci2phy_map_init(void) +static int snbep_pci2phy_map_init(void) { struct pci_dev *ubox_dev = NULL; int i, bus, nodeid; - u32 config; + int err = 0; + u32 config = 0; while (1) { /* find the UBOX device */ @@ -618,10 +621,14 @@ static void snbep_pci2phy_map_init(void) break; bus = ubox_dev->bus->number; /* get the Node ID of the local register */ - pci_read_config_dword(ubox_dev, 0x40, &config); + err = pci_read_config_dword(ubox_dev, 0x40, &config); + if (err) + break; nodeid = config; /* get the Node ID mapping */ - pci_read_config_dword(ubox_dev, 0x54, &config); + err = pci_read_config_dword(ubox_dev, 0x54, &config); + if (err) + break; /* * every three bits in the Node ID mapping register maps * to a particular node. @@ -633,7 +640,11 @@ static void snbep_pci2phy_map_init(void) } } }; - return; + + if (ubox_dev) + pci_dev_put(ubox_dev); + + return err ? pcibios_err_to_errno(err) : 0; } /* end of Sandy Bridge-EP uncore support */ @@ -1547,7 +1558,6 @@ void nhmex_rbox_alter_er(struct intel_uncore_box *box, struct perf_event *event) { struct hw_perf_event *hwc = &event->hw; struct hw_perf_event_extra *reg1 = &hwc->extra_reg; - int port; /* adjust the main event selector and extra register index */ if (reg1->idx % 2) { @@ -1559,7 +1569,6 @@ void nhmex_rbox_alter_er(struct intel_uncore_box *box, struct perf_event *event) } /* adjust extra register config */ - port = reg1->idx / 6 + box->pmu->pmu_idx * 4; switch (reg1->idx % 6) { case 2: /* shift the 8~15 bits to the 0~7 bits */ @@ -2578,9 +2587,11 @@ static int __init uncore_pci_init(void) switch (boot_cpu_data.x86_model) { case 45: /* Sandy Bridge-EP */ + ret = snbep_pci2phy_map_init(); + if (ret) + return ret; pci_uncores = snbep_pci_uncores; uncore_pci_driver = &snbep_uncore_pci_driver; - snbep_pci2phy_map_init(); break; default: return 0; @@ -2926,6 +2937,9 @@ static int __init intel_uncore_init(void) if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) return -ENODEV; + if (cpu_has_hypervisor) + return -ENODEV; + ret = uncore_pci_init(); if (ret) goto fail; diff --git a/arch/x86/kernel/cpu/perf_event_knc.c b/arch/x86/kernel/cpu/perf_event_knc.c index 7c46bfdbc373..4b7731bf23a8 100644 --- a/arch/x86/kernel/cpu/perf_event_knc.c +++ b/arch/x86/kernel/cpu/perf_event_knc.c @@ -3,6 +3,8 @@ #include <linux/perf_event.h> #include <linux/types.h> +#include <asm/hardirq.h> + #include "perf_event.h" static const u64 knc_perfmon_event_map[] = @@ -173,30 +175,100 @@ static void knc_pmu_enable_all(int added) static inline void knc_pmu_disable_event(struct perf_event *event) { - struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); struct hw_perf_event *hwc = &event->hw; u64 val; val = hwc->config; - if (cpuc->enabled) - val &= ~ARCH_PERFMON_EVENTSEL_ENABLE; + val &= ~ARCH_PERFMON_EVENTSEL_ENABLE; (void)wrmsrl_safe(hwc->config_base + hwc->idx, val); } static void knc_pmu_enable_event(struct perf_event *event) { - struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); struct hw_perf_event *hwc = &event->hw; u64 val; val = hwc->config; - if (cpuc->enabled) - val |= ARCH_PERFMON_EVENTSEL_ENABLE; + val |= ARCH_PERFMON_EVENTSEL_ENABLE; (void)wrmsrl_safe(hwc->config_base + hwc->idx, val); } +static inline u64 knc_pmu_get_status(void) +{ + u64 status; + + rdmsrl(MSR_KNC_IA32_PERF_GLOBAL_STATUS, status); + + return status; +} + +static inline void knc_pmu_ack_status(u64 ack) +{ + wrmsrl(MSR_KNC_IA32_PERF_GLOBAL_OVF_CONTROL, ack); +} + +static int knc_pmu_handle_irq(struct pt_regs *regs) +{ + struct perf_sample_data data; + struct cpu_hw_events *cpuc; + int handled = 0; + int bit, loops; + u64 status; + + cpuc = &__get_cpu_var(cpu_hw_events); + + knc_pmu_disable_all(); + + status = knc_pmu_get_status(); + if (!status) { + knc_pmu_enable_all(0); + return handled; + } + + loops = 0; +again: + knc_pmu_ack_status(status); + if (++loops > 100) { + WARN_ONCE(1, "perf: irq loop stuck!\n"); + perf_event_print_debug(); + goto done; + } + + inc_irq_stat(apic_perf_irqs); + + for_each_set_bit(bit, (unsigned long *)&status, X86_PMC_IDX_MAX) { + struct perf_event *event = cpuc->events[bit]; + + handled++; + + if (!test_bit(bit, cpuc->active_mask)) + continue; + + if (!intel_pmu_save_and_restart(event)) + continue; + + perf_sample_data_init(&data, 0, event->hw.last_period); + + if (perf_event_overflow(event, &data, regs)) + x86_pmu_stop(event, 0); + } + + /* + * Repeat if there is more work to be done: + */ + status = knc_pmu_get_status(); + if (status) + goto again; + +done: + knc_pmu_enable_all(0); + + return handled; +} + + PMU_FORMAT_ATTR(event, "config:0-7" ); PMU_FORMAT_ATTR(umask, "config:8-15" ); PMU_FORMAT_ATTR(edge, "config:18" ); @@ -214,7 +286,7 @@ static struct attribute *intel_knc_formats_attr[] = { static __initconst struct x86_pmu knc_pmu = { .name = "knc", - .handle_irq = x86_pmu_handle_irq, + .handle_irq = knc_pmu_handle_irq, .disable_all = knc_pmu_disable_all, .enable_all = knc_pmu_enable_all, .enable = knc_pmu_enable_event, @@ -226,12 +298,11 @@ static __initconst struct x86_pmu knc_pmu = { .event_map = knc_pmu_event_map, .max_events = ARRAY_SIZE(knc_perfmon_event_map), .apic = 1, - .max_period = (1ULL << 31) - 1, + .max_period = (1ULL << 39) - 1, .version = 0, .num_counters = 2, - /* in theory 40 bits, early silicon is buggy though */ - .cntval_bits = 32, - .cntval_mask = (1ULL << 32) - 1, + .cntval_bits = 40, + .cntval_mask = (1ULL << 40) - 1, .get_event_constraints = x86_get_event_constraints, .event_constraints = knc_event_constraints, .format_attrs = intel_knc_formats_attr, diff --git a/arch/x86/kernel/cpu/perf_event_p6.c b/arch/x86/kernel/cpu/perf_event_p6.c index e4dd0f7a0453..7d0270bd793e 100644 --- a/arch/x86/kernel/cpu/perf_event_p6.c +++ b/arch/x86/kernel/cpu/perf_event_p6.c @@ -8,13 +8,106 @@ */ static const u64 p6_perfmon_event_map[] = { - [PERF_COUNT_HW_CPU_CYCLES] = 0x0079, - [PERF_COUNT_HW_INSTRUCTIONS] = 0x00c0, - [PERF_COUNT_HW_CACHE_REFERENCES] = 0x0f2e, - [PERF_COUNT_HW_CACHE_MISSES] = 0x012e, - [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = 0x00c4, - [PERF_COUNT_HW_BRANCH_MISSES] = 0x00c5, - [PERF_COUNT_HW_BUS_CYCLES] = 0x0062, + [PERF_COUNT_HW_CPU_CYCLES] = 0x0079, /* CPU_CLK_UNHALTED */ + [PERF_COUNT_HW_INSTRUCTIONS] = 0x00c0, /* INST_RETIRED */ + [PERF_COUNT_HW_CACHE_REFERENCES] = 0x0f2e, /* L2_RQSTS:M:E:S:I */ + [PERF_COUNT_HW_CACHE_MISSES] = 0x012e, /* L2_RQSTS:I */ + [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = 0x00c4, /* BR_INST_RETIRED */ + [PERF_COUNT_HW_BRANCH_MISSES] = 0x00c5, /* BR_MISS_PRED_RETIRED */ + [PERF_COUNT_HW_BUS_CYCLES] = 0x0062, /* BUS_DRDY_CLOCKS */ + [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = 0x00a2, /* RESOURCE_STALLS */ + +}; + +static __initconst u64 p6_hw_cache_event_ids + [PERF_COUNT_HW_CACHE_MAX] + [PERF_COUNT_HW_CACHE_OP_MAX] + [PERF_COUNT_HW_CACHE_RESULT_MAX] = +{ + [ C(L1D) ] = { + [ C(OP_READ) ] = { + [ C(RESULT_ACCESS) ] = 0x0043, /* DATA_MEM_REFS */ + [ C(RESULT_MISS) ] = 0x0045, /* DCU_LINES_IN */ + }, + [ C(OP_WRITE) ] = { + [ C(RESULT_ACCESS) ] = 0, + [ C(RESULT_MISS) ] = 0x0f29, /* L2_LD:M:E:S:I */ + }, + [ C(OP_PREFETCH) ] = { + [ C(RESULT_ACCESS) ] = 0, + [ C(RESULT_MISS) ] = 0, + }, + }, + [ C(L1I ) ] = { + [ C(OP_READ) ] = { + [ C(RESULT_ACCESS) ] = 0x0080, /* IFU_IFETCH */ + [ C(RESULT_MISS) ] = 0x0f28, /* L2_IFETCH:M:E:S:I */ + }, + [ C(OP_WRITE) ] = { + [ C(RESULT_ACCESS) ] = -1, + [ C(RESULT_MISS) ] = -1, + }, + [ C(OP_PREFETCH) ] = { + [ C(RESULT_ACCESS) ] = 0, + [ C(RESULT_MISS) ] = 0, + }, + }, + [ C(LL ) ] = { + [ C(OP_READ) ] = { + [ C(RESULT_ACCESS) ] = 0, + [ C(RESULT_MISS) ] = 0, + }, + [ C(OP_WRITE) ] = { + [ C(RESULT_ACCESS) ] = 0, + [ C(RESULT_MISS) ] = 0x0025, /* L2_M_LINES_INM */ + }, + [ C(OP_PREFETCH) ] = { + [ C(RESULT_ACCESS) ] = 0, + [ C(RESULT_MISS) ] = 0, + }, + }, + [ C(DTLB) ] = { + [ C(OP_READ) ] = { + [ C(RESULT_ACCESS) ] = 0x0043, /* DATA_MEM_REFS */ + [ C(RESULT_MISS) ] = 0, + }, + [ C(OP_WRITE) ] = { + [ C(RESULT_ACCESS) ] = 0, + [ C(RESULT_MISS) ] = 0, + }, + [ C(OP_PREFETCH) ] = { + [ C(RESULT_ACCESS) ] = 0, + [ C(RESULT_MISS) ] = 0, + }, + }, + [ C(ITLB) ] = { + [ C(OP_READ) ] = { + [ C(RESULT_ACCESS) ] = 0x0080, /* IFU_IFETCH */ + [ C(RESULT_MISS) ] = 0x0085, /* ITLB_MISS */ + }, + [ C(OP_WRITE) ] = { + [ C(RESULT_ACCESS) ] = -1, + [ C(RESULT_MISS) ] = -1, + }, + [ C(OP_PREFETCH) ] = { + [ C(RESULT_ACCESS) ] = -1, + [ C(RESULT_MISS) ] = -1, + }, + }, + [ C(BPU ) ] = { + [ C(OP_READ) ] = { + [ C(RESULT_ACCESS) ] = 0x00c4, /* BR_INST_RETIRED */ + [ C(RESULT_MISS) ] = 0x00c5, /* BR_MISS_PRED_RETIRED */ + }, + [ C(OP_WRITE) ] = { + [ C(RESULT_ACCESS) ] = -1, + [ C(RESULT_MISS) ] = -1, + }, + [ C(OP_PREFETCH) ] = { + [ C(RESULT_ACCESS) ] = -1, + [ C(RESULT_MISS) ] = -1, + }, + }, }; static u64 p6_pmu_event_map(int hw_event) @@ -34,7 +127,7 @@ static struct event_constraint p6_event_constraints[] = { INTEL_EVENT_CONSTRAINT(0xc1, 0x1), /* FLOPS */ INTEL_EVENT_CONSTRAINT(0x10, 0x1), /* FP_COMP_OPS_EXE */ - INTEL_EVENT_CONSTRAINT(0x11, 0x1), /* FP_ASSIST */ + INTEL_EVENT_CONSTRAINT(0x11, 0x2), /* FP_ASSIST */ INTEL_EVENT_CONSTRAINT(0x12, 0x2), /* MUL */ INTEL_EVENT_CONSTRAINT(0x13, 0x2), /* DIV */ INTEL_EVENT_CONSTRAINT(0x14, 0x1), /* CYCLES_DIV_BUSY */ @@ -64,25 +157,25 @@ static void p6_pmu_enable_all(int added) static inline void p6_pmu_disable_event(struct perf_event *event) { - struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); struct hw_perf_event *hwc = &event->hw; u64 val = P6_NOP_EVENT; - if (cpuc->enabled) - val |= ARCH_PERFMON_EVENTSEL_ENABLE; - (void)wrmsrl_safe(hwc->config_base, val); } static void p6_pmu_enable_event(struct perf_event *event) { - struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); struct hw_perf_event *hwc = &event->hw; u64 val; val = hwc->config; - if (cpuc->enabled) - val |= ARCH_PERFMON_EVENTSEL_ENABLE; + + /* + * p6 only has a global event enable, set on PerfEvtSel0 + * We "disable" events by programming P6_NOP_EVENT + * and we rely on p6_pmu_enable_all() being called + * to actually enable the events. + */ (void)wrmsrl_safe(hwc->config_base, val); } @@ -158,5 +251,9 @@ __init int p6_pmu_init(void) x86_pmu = p6_pmu; + memcpy(hw_cache_event_ids, p6_hw_cache_event_ids, + sizeof(hw_cache_event_ids)); + + return 0; } diff --git a/arch/x86/kernel/e820.c b/arch/x86/kernel/e820.c index ed858e9e9a74..df06ade26bef 100644 --- a/arch/x86/kernel/e820.c +++ b/arch/x86/kernel/e820.c @@ -1077,6 +1077,9 @@ void __init memblock_x86_fill(void) memblock_add(ei->addr, ei->size); } + /* throw away partial pages */ + memblock_trim_memory(PAGE_SIZE); + memblock_dump_all(); } diff --git a/arch/x86/kernel/entry_32.S b/arch/x86/kernel/entry_32.S index a1193aef6d7d..88b725aa1d52 100644 --- a/arch/x86/kernel/entry_32.S +++ b/arch/x86/kernel/entry_32.S @@ -1035,7 +1035,7 @@ ENTRY(xen_sysenter_target) ENTRY(xen_hypervisor_callback) CFI_STARTPROC - pushl_cfi $0 + pushl_cfi $-1 /* orig_ax = -1 => not a system call */ SAVE_ALL TRACE_IRQS_OFF @@ -1077,14 +1077,16 @@ ENTRY(xen_failsafe_callback) 2: mov 8(%esp),%es 3: mov 12(%esp),%fs 4: mov 16(%esp),%gs + /* EAX == 0 => Category 1 (Bad segment) + EAX != 0 => Category 2 (Bad IRET) */ testl %eax,%eax popl_cfi %eax lea 16(%esp),%esp CFI_ADJUST_CFA_OFFSET -16 jz 5f addl $16,%esp - jmp iret_exc # EAX != 0 => Category 2 (Bad IRET) -5: pushl_cfi $0 # EAX == 0 => Category 1 (Bad segment) + jmp iret_exc +5: pushl_cfi $-1 /* orig_ax = -1 => not a system call */ SAVE_ALL jmp ret_from_exception CFI_ENDPROC diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S index 0c58952d64e8..b51b2c7ee51f 100644 --- a/arch/x86/kernel/entry_64.S +++ b/arch/x86/kernel/entry_64.S @@ -1435,7 +1435,7 @@ ENTRY(xen_failsafe_callback) CFI_RESTORE r11 addq $0x30,%rsp CFI_ADJUST_CFA_OFFSET -0x30 - pushq_cfi $0 + pushq_cfi $-1 /* orig_ax = -1 => not a system call */ SAVE_ALL jmp error_exit CFI_ENDPROC diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c index b3e5e51bc907..4180a874c764 100644 --- a/arch/x86/kernel/kvm.c +++ b/arch/x86/kernel/kvm.c @@ -247,7 +247,10 @@ do_async_page_fault(struct pt_regs *regs, unsigned long error_code) break; case KVM_PV_REASON_PAGE_NOT_PRESENT: /* page is swapped out by the host. */ + rcu_irq_enter(); + exit_idle(); kvm_async_pf_task_wait((u32)read_cr2()); + rcu_irq_exit(); break; case KVM_PV_REASON_PAGE_READY: rcu_irq_enter(); diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c index 468e98dfd44e..ca45696f30fb 100644 --- a/arch/x86/kernel/setup.c +++ b/arch/x86/kernel/setup.c @@ -921,18 +921,19 @@ void __init setup_arch(char **cmdline_p) #ifdef CONFIG_X86_64 if (max_pfn > max_low_pfn) { int i; - for (i = 0; i < e820.nr_map; i++) { - struct e820entry *ei = &e820.map[i]; + unsigned long start, end; + unsigned long start_pfn, end_pfn; - if (ei->addr + ei->size <= 1UL << 32) - continue; + for_each_mem_pfn_range(i, MAX_NUMNODES, &start_pfn, &end_pfn, + NULL) { - if (ei->type == E820_RESERVED) + end = PFN_PHYS(end_pfn); + if (end <= (1UL<<32)) continue; + start = PFN_PHYS(start_pfn); max_pfn_mapped = init_memory_mapping( - ei->addr < 1UL << 32 ? 1UL << 32 : ei->addr, - ei->addr + ei->size); + max((1UL<<32), start), end); } /* can we preseve max_low_pfn ?*/ @@ -1048,6 +1049,18 @@ void __init setup_arch(char **cmdline_p) arch_init_ideal_nops(); register_refined_jiffies(CLOCK_TICK_RATE); + +#ifdef CONFIG_EFI + /* Once setup is done above, disable efi_enabled on mismatched + * firmware/kernel archtectures since there is no support for + * runtime services. + */ + if (efi_enabled && IS_ENABLED(CONFIG_X86_64) != efi_64bit) { + pr_info("efi: Setup done, disabling due to 32/64-bit mismatch\n"); + efi_unmap_memmap(); + efi_enabled = 0; + } +#endif } #ifdef CONFIG_X86_32 diff --git a/arch/x86/kernel/signal.c b/arch/x86/kernel/signal.c index 29ad351804e9..70b27ee6118e 100644 --- a/arch/x86/kernel/signal.c +++ b/arch/x86/kernel/signal.c @@ -824,10 +824,8 @@ do_notify_resume(struct pt_regs *regs, void *unused, __u32 thread_info_flags) mce_notify_process(); #endif /* CONFIG_X86_64 && CONFIG_X86_MCE */ - if (thread_info_flags & _TIF_UPROBE) { - clear_thread_flag(TIF_UPROBE); + if (thread_info_flags & _TIF_UPROBE) uprobe_notify_resume(regs); - } /* deal with pending signal delivery */ if (thread_info_flags & _TIF_SIGPENDING) diff --git a/arch/x86/kernel/uprobes.c b/arch/x86/kernel/uprobes.c index 9538f00827a9..aafa5557b396 100644 --- a/arch/x86/kernel/uprobes.c +++ b/arch/x86/kernel/uprobes.c @@ -651,31 +651,19 @@ void arch_uprobe_abort_xol(struct arch_uprobe *auprobe, struct pt_regs *regs) /* * Skip these instructions as per the currently known x86 ISA. - * 0x66* { 0x90 | 0x0f 0x1f | 0x0f 0x19 | 0x87 0xc0 } + * rep=0x66*; nop=0x90 */ static bool __skip_sstep(struct arch_uprobe *auprobe, struct pt_regs *regs) { int i; for (i = 0; i < MAX_UINSN_BYTES; i++) { - if ((auprobe->insn[i] == 0x66)) + if (auprobe->insn[i] == 0x66) continue; if (auprobe->insn[i] == 0x90) return true; - if (i == (MAX_UINSN_BYTES - 1)) - break; - - if ((auprobe->insn[i] == 0x0f) && (auprobe->insn[i+1] == 0x1f)) - return true; - - if ((auprobe->insn[i] == 0x0f) && (auprobe->insn[i+1] == 0x19)) - return true; - - if ((auprobe->insn[i] == 0x87) && (auprobe->insn[i+1] == 0xc0)) - return true; - break; } return false; diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c index c6e6b721b6ee..43e9fadca5d0 100644 --- a/arch/x86/kvm/lapic.c +++ b/arch/x86/kvm/lapic.c @@ -1311,7 +1311,7 @@ void kvm_lapic_set_base(struct kvm_vcpu *vcpu, u64 value) vcpu->arch.apic_base = value; if (apic_x2apic_mode(apic)) { u32 id = kvm_apic_id(apic); - u32 ldr = ((id & ~0xf) << 16) | (1 << (id & 0xf)); + u32 ldr = ((id >> 4) << 16) | (1 << (id & 0xf)); kvm_apic_set_ldr(apic, ldr); } apic->base_address = apic->vcpu->arch.apic_base & diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c index d289fee1ffb8..6f85fe0bf958 100644 --- a/arch/x86/kvm/mmu.c +++ b/arch/x86/kvm/mmu.c @@ -2497,8 +2497,7 @@ static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep, } } - if (!is_error_pfn(pfn)) - kvm_release_pfn_clean(pfn); + kvm_release_pfn_clean(pfn); } static void nonpaging_new_cr3(struct kvm_vcpu *vcpu) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 1eefebe5d727..224a7e78cb6c 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -3779,7 +3779,7 @@ static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, { struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0]; - memcpy(vcpu->run->mmio.data, frag->data, frag->len); + memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len)); return X86EMUL_CONTINUE; } @@ -3832,18 +3832,11 @@ mmio: bytes -= handled; val += handled; - while (bytes) { - unsigned now = min(bytes, 8U); - - frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++]; - frag->gpa = gpa; - frag->data = val; - frag->len = now; - - gpa += now; - val += now; - bytes -= now; - } + WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS); + frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++]; + frag->gpa = gpa; + frag->data = val; + frag->len = bytes; return X86EMUL_CONTINUE; } @@ -3890,7 +3883,7 @@ int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr, vcpu->mmio_needed = 1; vcpu->mmio_cur_fragment = 0; - vcpu->run->mmio.len = vcpu->mmio_fragments[0].len; + vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len); vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write; vcpu->run->exit_reason = KVM_EXIT_MMIO; vcpu->run->mmio.phys_addr = gpa; @@ -5522,28 +5515,44 @@ static int complete_emulated_pio(struct kvm_vcpu *vcpu) * * read: * for each fragment - * write gpa, len - * exit - * copy data + * for each mmio piece in the fragment + * write gpa, len + * exit + * copy data * execute insn * * write: * for each fragment - * write gpa, len - * copy data - * exit + * for each mmio piece in the fragment + * write gpa, len + * copy data + * exit */ static int complete_emulated_mmio(struct kvm_vcpu *vcpu) { struct kvm_run *run = vcpu->run; struct kvm_mmio_fragment *frag; + unsigned len; BUG_ON(!vcpu->mmio_needed); /* Complete previous fragment */ - frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment++]; + frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment]; + len = min(8u, frag->len); if (!vcpu->mmio_is_write) - memcpy(frag->data, run->mmio.data, frag->len); + memcpy(frag->data, run->mmio.data, len); + + if (frag->len <= 8) { + /* Switch to the next fragment. */ + frag++; + vcpu->mmio_cur_fragment++; + } else { + /* Go forward to the next mmio piece. */ + frag->data += len; + frag->gpa += len; + frag->len -= len; + } + if (vcpu->mmio_cur_fragment == vcpu->mmio_nr_fragments) { vcpu->mmio_needed = 0; if (vcpu->mmio_is_write) @@ -5551,13 +5560,12 @@ static int complete_emulated_mmio(struct kvm_vcpu *vcpu) vcpu->mmio_read_completed = 1; return complete_emulated_io(vcpu); } - /* Initiate next fragment */ - ++frag; + run->exit_reason = KVM_EXIT_MMIO; run->mmio.phys_addr = frag->gpa; if (vcpu->mmio_is_write) - memcpy(run->mmio.data, frag->data, frag->len); - run->mmio.len = frag->len; + memcpy(run->mmio.data, frag->data, min(8u, frag->len)); + run->mmio.len = min(8u, frag->len); run->mmio.is_write = vcpu->mmio_is_write; vcpu->arch.complete_userspace_io = complete_emulated_mmio; return 0; diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c index ab1f6a93b527..d7aea41563b3 100644 --- a/arch/x86/mm/init.c +++ b/arch/x86/mm/init.c @@ -35,40 +35,44 @@ struct map_range { unsigned page_size_mask; }; -static void __init find_early_table_space(struct map_range *mr, unsigned long end, - int use_pse, int use_gbpages) +/* + * First calculate space needed for kernel direct mapping page tables to cover + * mr[0].start to mr[nr_range - 1].end, while accounting for possible 2M and 1GB + * pages. Then find enough contiguous space for those page tables. + */ +static void __init find_early_table_space(struct map_range *mr, int nr_range) { - unsigned long puds, pmds, ptes, tables, start = 0, good_end = end; + int i; + unsigned long puds = 0, pmds = 0, ptes = 0, tables; + unsigned long start = 0, good_end; phys_addr_t base; - puds = (end + PUD_SIZE - 1) >> PUD_SHIFT; - tables = roundup(puds * sizeof(pud_t), PAGE_SIZE); - - if (use_gbpages) { - unsigned long extra; - - extra = end - ((end>>PUD_SHIFT) << PUD_SHIFT); - pmds = (extra + PMD_SIZE - 1) >> PMD_SHIFT; - } else - pmds = (end + PMD_SIZE - 1) >> PMD_SHIFT; + for (i = 0; i < nr_range; i++) { + unsigned long range, extra; - tables += roundup(pmds * sizeof(pmd_t), PAGE_SIZE); + range = mr[i].end - mr[i].start; + puds += (range + PUD_SIZE - 1) >> PUD_SHIFT; - if (use_pse) { - unsigned long extra; + if (mr[i].page_size_mask & (1 << PG_LEVEL_1G)) { + extra = range - ((range >> PUD_SHIFT) << PUD_SHIFT); + pmds += (extra + PMD_SIZE - 1) >> PMD_SHIFT; + } else { + pmds += (range + PMD_SIZE - 1) >> PMD_SHIFT; + } - extra = end - ((end>>PMD_SHIFT) << PMD_SHIFT); + if (mr[i].page_size_mask & (1 << PG_LEVEL_2M)) { + extra = range - ((range >> PMD_SHIFT) << PMD_SHIFT); #ifdef CONFIG_X86_32 - extra += PMD_SIZE; + extra += PMD_SIZE; #endif - /* The first 2/4M doesn't use large pages. */ - if (mr->start < PMD_SIZE) - extra += mr->end - mr->start; - - ptes = (extra + PAGE_SIZE - 1) >> PAGE_SHIFT; - } else - ptes = (end + PAGE_SIZE - 1) >> PAGE_SHIFT; + ptes += (extra + PAGE_SIZE - 1) >> PAGE_SHIFT; + } else { + ptes += (range + PAGE_SIZE - 1) >> PAGE_SHIFT; + } + } + tables = roundup(puds * sizeof(pud_t), PAGE_SIZE); + tables += roundup(pmds * sizeof(pmd_t), PAGE_SIZE); tables += roundup(ptes * sizeof(pte_t), PAGE_SIZE); #ifdef CONFIG_X86_32 @@ -86,7 +90,7 @@ static void __init find_early_table_space(struct map_range *mr, unsigned long en pgt_buf_top = pgt_buf_start + (tables >> PAGE_SHIFT); printk(KERN_DEBUG "kernel direct mapping tables up to %#lx @ [mem %#010lx-%#010lx]\n", - end - 1, pgt_buf_start << PAGE_SHIFT, + mr[nr_range - 1].end - 1, pgt_buf_start << PAGE_SHIFT, (pgt_buf_top << PAGE_SHIFT) - 1); } @@ -267,7 +271,7 @@ unsigned long __init_refok init_memory_mapping(unsigned long start, * nodes are discovered. */ if (!after_bootmem) - find_early_table_space(&mr[0], end, use_pse, use_gbpages); + find_early_table_space(mr, nr_range); for (i = 0; i < nr_range; i++) ret = kernel_physical_mapping_init(mr[i].start, mr[i].end, diff --git a/arch/x86/mm/init_64.c b/arch/x86/mm/init_64.c index 2b6b4a3c8beb..3baff255adac 100644 --- a/arch/x86/mm/init_64.c +++ b/arch/x86/mm/init_64.c @@ -386,7 +386,8 @@ phys_pte_init(pte_t *pte_page, unsigned long addr, unsigned long end, * these mappings are more intelligent. */ if (pte_val(*pte)) { - pages++; + if (!after_bootmem) + pages++; continue; } @@ -451,6 +452,8 @@ phys_pmd_init(pmd_t *pmd_page, unsigned long address, unsigned long end, * attributes. */ if (page_size_mask & (1 << PG_LEVEL_2M)) { + if (!after_bootmem) + pages++; last_map_addr = next; continue; } @@ -526,6 +529,8 @@ phys_pud_init(pud_t *pud_page, unsigned long addr, unsigned long end, * attributes. */ if (page_size_mask & (1 << PG_LEVEL_1G)) { + if (!after_bootmem) + pages++; last_map_addr = next; continue; } diff --git a/arch/x86/oprofile/nmi_int.c b/arch/x86/oprofile/nmi_int.c index 26b8a8514ee5..48768df2471a 100644 --- a/arch/x86/oprofile/nmi_int.c +++ b/arch/x86/oprofile/nmi_int.c @@ -55,7 +55,7 @@ u64 op_x86_get_ctrl(struct op_x86_model_spec const *model, val |= counter_config->extra; event &= model->event_mask ? model->event_mask : 0xFF; val |= event & 0xFF; - val |= (event & 0x0F00) << 24; + val |= (u64)(event & 0x0F00) << 24; return val; } diff --git a/arch/x86/platform/efi/efi.c b/arch/x86/platform/efi/efi.c index aded2a91162a..ad4439145f85 100644 --- a/arch/x86/platform/efi/efi.c +++ b/arch/x86/platform/efi/efi.c @@ -70,11 +70,15 @@ EXPORT_SYMBOL(efi); struct efi_memory_map memmap; bool efi_64bit; -static bool efi_native; static struct efi efi_phys __initdata; static efi_system_table_t efi_systab __initdata; +static inline bool efi_is_native(void) +{ + return IS_ENABLED(CONFIG_X86_64) == efi_64bit; +} + static int __init setup_noefi(char *arg) { efi_enabled = 0; @@ -420,7 +424,7 @@ void __init efi_reserve_boot_services(void) } } -static void __init efi_unmap_memmap(void) +void __init efi_unmap_memmap(void) { if (memmap.map) { early_iounmap(memmap.map, memmap.nr_map * memmap.desc_size); @@ -432,7 +436,7 @@ void __init efi_free_boot_services(void) { void *p; - if (!efi_native) + if (!efi_is_native()) return; for (p = memmap.map; p < memmap.map_end; p += memmap.desc_size) { @@ -684,12 +688,10 @@ void __init efi_init(void) return; } efi_phys.systab = (efi_system_table_t *)boot_params.efi_info.efi_systab; - efi_native = !efi_64bit; #else efi_phys.systab = (efi_system_table_t *) (boot_params.efi_info.efi_systab | ((__u64)boot_params.efi_info.efi_systab_hi<<32)); - efi_native = efi_64bit; #endif if (efi_systab_init(efi_phys.systab)) { @@ -723,7 +725,7 @@ void __init efi_init(void) * that doesn't match the kernel 32/64-bit mode. */ - if (!efi_native) + if (!efi_is_native()) pr_info("No EFI runtime due to 32/64-bit mismatch with kernel\n"); else if (efi_runtime_init()) { efi_enabled = 0; @@ -735,7 +737,7 @@ void __init efi_init(void) return; } #ifdef CONFIG_X86_32 - if (efi_native) { + if (efi_is_native()) { x86_platform.get_wallclock = efi_get_time; x86_platform.set_wallclock = efi_set_rtc_mmss; } @@ -810,6 +812,16 @@ void __iomem *efi_lookup_mapped_addr(u64 phys_addr) return NULL; } +void efi_memory_uc(u64 addr, unsigned long size) +{ + unsigned long page_shift = 1UL << EFI_PAGE_SHIFT; + u64 npages; + + npages = round_up(size, page_shift) / page_shift; + memrange_efi_to_native(&addr, &npages); + set_memory_uc(addr, npages); +} + /* * This function will switch the EFI runtime services to virtual mode. * Essentially, look through the EFI memmap and map every region that @@ -823,7 +835,7 @@ void __init efi_enter_virtual_mode(void) efi_memory_desc_t *md, *prev_md = NULL; efi_status_t status; unsigned long size; - u64 end, systab, addr, npages, end_pfn; + u64 end, systab, end_pfn; void *p, *va, *new_memmap = NULL; int count = 0; @@ -834,7 +846,7 @@ void __init efi_enter_virtual_mode(void) * non-native EFI */ - if (!efi_native) { + if (!efi_is_native()) { efi_unmap_memmap(); return; } @@ -879,10 +891,14 @@ void __init efi_enter_virtual_mode(void) end_pfn = PFN_UP(end); if (end_pfn <= max_low_pfn_mapped || (end_pfn > (1UL << (32 - PAGE_SHIFT)) - && end_pfn <= max_pfn_mapped)) + && end_pfn <= max_pfn_mapped)) { va = __va(md->phys_addr); - else - va = efi_ioremap(md->phys_addr, size, md->type); + + if (!(md->attribute & EFI_MEMORY_WB)) + efi_memory_uc((u64)(unsigned long)va, size); + } else + va = efi_ioremap(md->phys_addr, size, + md->type, md->attribute); md->virt_addr = (u64) (unsigned long) va; @@ -892,13 +908,6 @@ void __init efi_enter_virtual_mode(void) continue; } - if (!(md->attribute & EFI_MEMORY_WB)) { - addr = md->virt_addr; - npages = md->num_pages; - memrange_efi_to_native(&addr, &npages); - set_memory_uc(addr, npages); - } - systab = (u64) (unsigned long) efi_phys.systab; if (md->phys_addr <= systab && systab < end) { systab += md->virt_addr - md->phys_addr; diff --git a/arch/x86/platform/efi/efi_64.c b/arch/x86/platform/efi/efi_64.c index ac3aa54e2654..95fd505dfeb6 100644 --- a/arch/x86/platform/efi/efi_64.c +++ b/arch/x86/platform/efi/efi_64.c @@ -82,7 +82,7 @@ void __init efi_call_phys_epilog(void) } void __iomem *__init efi_ioremap(unsigned long phys_addr, unsigned long size, - u32 type) + u32 type, u64 attribute) { unsigned long last_map_pfn; @@ -92,8 +92,11 @@ void __iomem *__init efi_ioremap(unsigned long phys_addr, unsigned long size, last_map_pfn = init_memory_mapping(phys_addr, phys_addr + size); if ((last_map_pfn << PAGE_SHIFT) < phys_addr + size) { unsigned long top = last_map_pfn << PAGE_SHIFT; - efi_ioremap(top, size - (top - phys_addr), type); + efi_ioremap(top, size - (top - phys_addr), type, attribute); } + if (!(attribute & EFI_MEMORY_WB)) + efi_memory_uc((u64)(unsigned long)__va(phys_addr), size); + return (void __iomem *)__va(phys_addr); } diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c index e3497f240eab..586d83812b67 100644 --- a/arch/x86/xen/enlighten.c +++ b/arch/x86/xen/enlighten.c @@ -81,8 +81,6 @@ #include "smp.h" #include "multicalls.h" -#include <xen/events.h> - EXPORT_SYMBOL_GPL(hypercall_page); DEFINE_PER_CPU(struct vcpu_info *, xen_vcpu); diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c index 6226c99729b9..dcf5f2dd91ec 100644 --- a/arch/x86/xen/mmu.c +++ b/arch/x86/xen/mmu.c @@ -1288,6 +1288,25 @@ unsigned long xen_read_cr2_direct(void) return this_cpu_read(xen_vcpu_info.arch.cr2); } +void xen_flush_tlb_all(void) +{ + struct mmuext_op *op; + struct multicall_space mcs; + + trace_xen_mmu_flush_tlb_all(0); + + preempt_disable(); + + mcs = xen_mc_entry(sizeof(*op)); + + op = mcs.args; + op->cmd = MMUEXT_TLB_FLUSH_ALL; + MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); + + xen_mc_issue(PARAVIRT_LAZY_MMU); + + preempt_enable(); +} static void xen_flush_tlb(void) { struct mmuext_op *op; @@ -2518,7 +2537,7 @@ int xen_remap_domain_mfn_range(struct vm_area_struct *vma, err = 0; out: - flush_tlb_all(); + xen_flush_tlb_all(); return err; } diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig index cdcb48adee4c..0d1f36a22c98 100644 --- a/arch/xtensa/Kconfig +++ b/arch/xtensa/Kconfig @@ -13,6 +13,8 @@ config XTENSA select GENERIC_CPU_DEVICES select MODULES_USE_ELF_RELA select GENERIC_PCI_IOMAP + select GENERIC_KERNEL_THREAD + select GENERIC_KERNEL_EXECVE select ARCH_WANT_OPTIONAL_GPIOLIB help Xtensa processors are 32-bit RISC machines designed by Tensilica diff --git a/arch/xtensa/include/asm/io.h b/arch/xtensa/include/asm/io.h index e6be5b9091c2..700c2e6f2d25 100644 --- a/arch/xtensa/include/asm/io.h +++ b/arch/xtensa/include/asm/io.h @@ -62,6 +62,10 @@ static inline void __iomem *ioremap(unsigned long offset, unsigned long size) static inline void iounmap(volatile void __iomem *addr) { } + +#define virt_to_bus virt_to_phys +#define bus_to_virt phys_to_virt + #endif /* CONFIG_MMU */ /* diff --git a/arch/xtensa/include/asm/processor.h b/arch/xtensa/include/asm/processor.h index 5c371d8d4528..2d630e7399ca 100644 --- a/arch/xtensa/include/asm/processor.h +++ b/arch/xtensa/include/asm/processor.h @@ -152,6 +152,7 @@ struct thread_struct { /* Clearing a0 terminates the backtrace. */ #define start_thread(regs, new_pc, new_sp) \ + memset(regs, 0, sizeof(*regs)); \ regs->pc = new_pc; \ regs->ps = USER_PS_VALUE; \ regs->areg[1] = new_sp; \ @@ -168,9 +169,6 @@ struct mm_struct; /* Free all resources held by a thread. */ #define release_thread(thread) do { } while(0) -/* Create a kernel thread without removing it from tasklists */ -extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); - /* Copy and release all segment info associated with a VM */ #define copy_segments(p, mm) do { } while(0) #define release_segments(mm) do { } while(0) diff --git a/arch/xtensa/include/asm/syscall.h b/arch/xtensa/include/asm/syscall.h index c1dacca312f3..124aeee0d381 100644 --- a/arch/xtensa/include/asm/syscall.h +++ b/arch/xtensa/include/asm/syscall.h @@ -10,7 +10,7 @@ struct pt_regs; struct sigaction; -asmlinkage long xtensa_execve(char*, char**, char**, struct pt_regs*); +asmlinkage long sys_execve(char*, char**, char**, struct pt_regs*); asmlinkage long xtensa_clone(unsigned long, unsigned long, struct pt_regs*); asmlinkage long xtensa_ptrace(long, long, long, long); asmlinkage long xtensa_sigreturn(struct pt_regs*); diff --git a/arch/xtensa/include/asm/unistd.h b/arch/xtensa/include/asm/unistd.h index 9ef1c31d2c83..f4e6eaa40d1c 100644 --- a/arch/xtensa/include/asm/unistd.h +++ b/arch/xtensa/include/asm/unistd.h @@ -1,16 +1,9 @@ -/* - * include/asm-xtensa/unistd.h - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2001 - 2005 Tensilica Inc. - */ +#ifndef _XTENSA_UNISTD_H +#define _XTENSA_UNISTD_H +#define __ARCH_WANT_SYS_EXECVE #include <uapi/asm/unistd.h> - /* * "Conditional" syscalls * @@ -37,3 +30,5 @@ #define __IGNORE_mmap /* use mmap2 */ #define __IGNORE_vfork /* use clone */ #define __IGNORE_fadvise64 /* use fadvise64_64 */ + +#endif /* _XTENSA_UNISTD_H */ diff --git a/arch/xtensa/include/uapi/asm/unistd.h b/arch/xtensa/include/uapi/asm/unistd.h index 479abaea5aae..9f36d0e3e0ac 100644 --- a/arch/xtensa/include/uapi/asm/unistd.h +++ b/arch/xtensa/include/uapi/asm/unistd.h @@ -1,14 +1,4 @@ -/* - * include/asm-xtensa/unistd.h - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2001 - 2012 Tensilica Inc. - */ - -#ifndef _UAPI_XTENSA_UNISTD_H +#if !defined(_UAPI_XTENSA_UNISTD_H) || defined(__SYSCALL) #define _UAPI_XTENSA_UNISTD_H #ifndef __SYSCALL @@ -272,7 +262,7 @@ __SYSCALL(115, sys_sendmmsg, 4) #define __NR_clone 116 __SYSCALL(116, xtensa_clone, 5) #define __NR_execve 117 -__SYSCALL(117, xtensa_execve, 3) +__SYSCALL(117, sys_execve, 3) #define __NR_exit 118 __SYSCALL(118, sys_exit, 1) #define __NR_exit_group 119 @@ -759,4 +749,6 @@ __SYSCALL(331, sys_kcmp, 5) #define SYS_XTENSA_COUNT 5 /* count */ +#undef __SYSCALL + #endif /* _UAPI_XTENSA_UNISTD_H */ diff --git a/arch/xtensa/kernel/entry.S b/arch/xtensa/kernel/entry.S index 18453067c258..90bfc1dbc13d 100644 --- a/arch/xtensa/kernel/entry.S +++ b/arch/xtensa/kernel/entry.S @@ -1833,50 +1833,6 @@ ENTRY(system_call) /* - * Create a kernel thread - * - * int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags) - * a2 a2 a3 a4 - */ - -ENTRY(kernel_thread) - entry a1, 16 - - mov a5, a2 # preserve fn over syscall - mov a7, a3 # preserve args over syscall - - movi a3, _CLONE_VM | _CLONE_UNTRACED - movi a2, __NR_clone - or a6, a4, a3 # arg0: flags - mov a3, a1 # arg1: sp - syscall - - beq a3, a1, 1f # branch if parent - mov a6, a7 # args - callx4 a5 # fn(args) - - movi a2, __NR_exit - syscall # return value of fn(args) still in a6 - -1: retw - -/* - * Do a system call from kernel instead of calling sys_execve, so we end up - * with proper pt_regs. - * - * int kernel_execve(const char *fname, char *const argv[], charg *const envp[]) - * a2 a2 a3 a4 - */ - -ENTRY(kernel_execve) - entry a1, 16 - mov a6, a2 # arg0 is in a6 - movi a2, __NR_execve - syscall - - retw - -/* * Task switch. * * struct task* _switch_to (struct task* prev, struct task* next) @@ -1958,3 +1914,16 @@ ENTRY(ret_from_fork) j common_exception_return +/* + * Kernel thread creation helper + * On entry, set up by copy_thread: a2 = thread_fn, a3 = thread_fn arg + * left from _switch_to: a6 = prev + */ +ENTRY(ret_from_kernel_thread) + + call4 schedule_tail + mov a6, a3 + callx4 a2 + j common_exception_return + +ENDPROC(ret_from_kernel_thread) diff --git a/arch/xtensa/kernel/process.c b/arch/xtensa/kernel/process.c index 1908f6642d31..09ae7bfab9a7 100644 --- a/arch/xtensa/kernel/process.c +++ b/arch/xtensa/kernel/process.c @@ -45,6 +45,7 @@ #include <asm/regs.h> extern void ret_from_fork(void); +extern void ret_from_kernel_thread(void); struct task_struct *current_set[NR_CPUS] = {&init_task, }; @@ -158,18 +159,30 @@ int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src) /* * Copy thread. * + * There are two modes in which this function is called: + * 1) Userspace thread creation, + * regs != NULL, usp_thread_fn is userspace stack pointer. + * It is expected to copy parent regs (in case CLONE_VM is not set + * in the clone_flags) and set up passed usp in the childregs. + * 2) Kernel thread creation, + * regs == NULL, usp_thread_fn is the function to run in the new thread + * and thread_fn_arg is its parameter. + * childregs are not used for the kernel threads. + * * The stack layout for the new thread looks like this: * - * +------------------------+ <- sp in childregs (= tos) + * +------------------------+ * | childregs | * +------------------------+ <- thread.sp = sp in dummy-frame * | dummy-frame | (saved in dummy-frame spill-area) * +------------------------+ * - * We create a dummy frame to return to ret_from_fork: - * a0 points to ret_from_fork (simulating a call4) + * We create a dummy frame to return to either ret_from_fork or + * ret_from_kernel_thread: + * a0 points to ret_from_fork/ret_from_kernel_thread (simulating a call4) * sp points to itself (thread.sp) - * a2, a3 are unused. + * a2, a3 are unused for userspace threads, + * a2 points to thread_fn, a3 holds thread_fn arg for kernel threads. * * Note: This is a pristine frame, so we don't need any spill region on top of * childregs. @@ -185,43 +198,63 @@ int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src) * involved. Much simpler to just not copy those live frames across. */ -int copy_thread(unsigned long clone_flags, unsigned long usp, - unsigned long unused, - struct task_struct * p, struct pt_regs * regs) +int copy_thread(unsigned long clone_flags, unsigned long usp_thread_fn, + unsigned long thread_fn_arg, + struct task_struct *p, struct pt_regs *unused) { - struct pt_regs *childregs; - unsigned long tos; - int user_mode = user_mode(regs); + struct pt_regs *childregs = task_pt_regs(p); #if (XTENSA_HAVE_COPROCESSORS || XTENSA_HAVE_IO_PORTS) struct thread_info *ti; #endif - /* Set up new TSS. */ - tos = (unsigned long)task_stack_page(p) + THREAD_SIZE; - if (user_mode) - childregs = (struct pt_regs*)(tos - PT_USER_SIZE); - else - childregs = (struct pt_regs*)tos - 1; - - /* This does not copy all the regs. In a bout of brilliance or madness, - ARs beyond a0-a15 exist past the end of the struct. */ - *childregs = *regs; - /* Create a call4 dummy-frame: a0 = 0, a1 = childregs. */ *((int*)childregs - 3) = (unsigned long)childregs; *((int*)childregs - 4) = 0; - childregs->areg[2] = 0; - p->set_child_tid = p->clear_child_tid = NULL; - p->thread.ra = MAKE_RA_FOR_CALL((unsigned long)ret_from_fork, 0x1); p->thread.sp = (unsigned long)childregs; - if (user_mode(regs)) { + if (!(p->flags & PF_KTHREAD)) { + struct pt_regs *regs = current_pt_regs(); + unsigned long usp = usp_thread_fn ? + usp_thread_fn : regs->areg[1]; + p->thread.ra = MAKE_RA_FOR_CALL( + (unsigned long)ret_from_fork, 0x1); + + /* This does not copy all the regs. + * In a bout of brilliance or madness, + * ARs beyond a0-a15 exist past the end of the struct. + */ + *childregs = *regs; childregs->areg[1] = usp; + childregs->areg[2] = 0; + + /* When sharing memory with the parent thread, the child + usually starts on a pristine stack, so we have to reset + windowbase, windowstart and wmask. + (Note that such a new thread is required to always create + an initial call4 frame) + The exception is vfork, where the new thread continues to + run on the parent's stack until it calls execve. This could + be a call8 or call12, which requires a legal stack frame + of the previous caller for the overflow handlers to work. + (Note that it's always legal to overflow live registers). + In this case, ensure to spill at least the stack pointer + of that frame. */ + if (clone_flags & CLONE_VM) { - childregs->wmask = 1; /* can't share live windows */ + /* check that caller window is live and same stack */ + int len = childregs->wmask & ~0xf; + if (regs->areg[1] == usp && len != 0) { + int callinc = (regs->areg[0] >> 30) & 3; + int caller_ars = XCHAL_NUM_AREGS - callinc * 4; + put_user(regs->areg[caller_ars+1], + (unsigned __user*)(usp - 12)); + } + childregs->wmask = 1; + childregs->windowstart = 1; + childregs->windowbase = 0; } else { int len = childregs->wmask & ~0xf; memcpy(&childregs->areg[XCHAL_NUM_AREGS - len/4], @@ -230,11 +263,19 @@ int copy_thread(unsigned long clone_flags, unsigned long usp, // FIXME: we need to set THREADPTR in thread_info... if (clone_flags & CLONE_SETTLS) childregs->areg[2] = childregs->areg[6]; - } else { - /* In kernel space, we start a new thread with a new stack. */ - childregs->wmask = 1; - childregs->areg[1] = tos; + p->thread.ra = MAKE_RA_FOR_CALL( + (unsigned long)ret_from_kernel_thread, 1); + + /* pass parameters to ret_from_kernel_thread: + * a2 = thread_fn, a3 = thread_fn arg + */ + *((int *)childregs - 1) = thread_fn_arg; + *((int *)childregs - 2) = usp_thread_fn; + + /* Childregs are only used when we're going to userspace + * in which case start_thread will set them up. + */ } #if (XTENSA_HAVE_COPROCESSORS || XTENSA_HAVE_IO_PORTS) @@ -330,32 +371,5 @@ long xtensa_clone(unsigned long clone_flags, unsigned long newsp, void __user *child_tid, long a5, struct pt_regs *regs) { - if (!newsp) - newsp = regs->areg[1]; return do_fork(clone_flags, newsp, regs, 0, parent_tid, child_tid); } - -/* - * xtensa_execve() executes a new program. - */ - -asmlinkage -long xtensa_execve(const char __user *name, - const char __user *const __user *argv, - const char __user *const __user *envp, - long a3, long a4, long a5, - struct pt_regs *regs) -{ - long error; - struct filename *filename; - - filename = getname(name); - error = PTR_ERR(filename); - if (IS_ERR(filename)) - goto out; - error = do_execve(filename->name, argv, envp, regs); - putname(filename); -out: - return error; -} - diff --git a/arch/xtensa/kernel/syscall.c b/arch/xtensa/kernel/syscall.c index a5c01e74d5d5..5702065f472a 100644 --- a/arch/xtensa/kernel/syscall.c +++ b/arch/xtensa/kernel/syscall.c @@ -32,10 +32,8 @@ typedef void (*syscall_t)(void); syscall_t sys_call_table[__NR_syscall_count] /* FIXME __cacheline_aligned */= { [0 ... __NR_syscall_count - 1] = (syscall_t)&sys_ni_syscall, -#undef __SYSCALL #define __SYSCALL(nr,symbol,nargs) [ nr ] = (syscall_t)symbol, -#undef __KERNEL_SYSCALLS__ -#include <asm/unistd.h> +#include <uapi/asm/unistd.h> }; asmlinkage long xtensa_shmat(int shmid, char __user *shmaddr, int shmflg) @@ -49,7 +47,8 @@ asmlinkage long xtensa_shmat(int shmid, char __user *shmaddr, int shmflg) return (long)ret; } -asmlinkage long xtensa_fadvise64_64(int fd, int advice, unsigned long long offset, unsigned long long len) +asmlinkage long xtensa_fadvise64_64(int fd, int advice, + unsigned long long offset, unsigned long long len) { return sys_fadvise64_64(fd, offset, len, advice); } diff --git a/arch/xtensa/kernel/xtensa_ksyms.c b/arch/xtensa/kernel/xtensa_ksyms.c index a8b9f1fd1e17..afe058b24e6e 100644 --- a/arch/xtensa/kernel/xtensa_ksyms.c +++ b/arch/xtensa/kernel/xtensa_ksyms.c @@ -43,7 +43,6 @@ EXPORT_SYMBOL(__strncpy_user); EXPORT_SYMBOL(clear_page); EXPORT_SYMBOL(copy_page); -EXPORT_SYMBOL(kernel_thread); EXPORT_SYMBOL(empty_zero_page); /* |