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-rw-r--r--arch/arm/boot/dts/exynos3250.dtsi34
-rw-r--r--arch/arm/boot/dts/exynos4.dtsi57
-rw-r--r--arch/arm/boot/dts/exynos4210.dtsi8
-rw-r--r--arch/arm/boot/dts/exynos4412-pinctrl.dtsi2
-rw-r--r--arch/arm/boot/dts/exynos4412-trats2.dts29
-rw-r--r--arch/arm/boot/dts/exynos4412.dtsi93
-rw-r--r--arch/arm/boot/dts/exynos5.dtsi45
-rw-r--r--arch/arm/boot/dts/exynos5250.dtsi126
-rw-r--r--arch/arm/boot/dts/exynos5260.dtsi26
-rw-r--r--arch/arm/boot/dts/exynos5410.dtsi18
-rw-r--r--arch/arm/boot/dts/exynos5420-cpus.dtsi10
-rw-r--r--arch/arm/boot/dts/exynos5420.dtsi71
-rw-r--r--arch/arm/boot/dts/exynos5422-cpus.dtsi10
-rw-r--r--arch/arm/boot/dts/exynos5422-odroid-core.dtsi6
-rw-r--r--arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi60
-rw-r--r--arch/arm/boot/dts/exynos5422-odroidxu4.dts52
-rw-r--r--arch/arm/boot/dts/exynos5440.dtsi14
-rw-r--r--arch/arm/boot/dts/exynos54xx.dtsi26
18 files changed, 464 insertions, 223 deletions
diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi
index 2bd3872221a1..8d47571b3984 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -164,31 +164,31 @@
syscon = <&pmu_system_controller>;
};
- pd_cam: cam-power-domain@10023C00 {
+ pd_cam: cam-power-domain@10023c00 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023C00 0x20>;
#power-domain-cells = <0>;
};
- pd_mfc: mfc-power-domain@10023C40 {
+ pd_mfc: mfc-power-domain@10023c40 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023C40 0x20>;
#power-domain-cells = <0>;
};
- pd_g3d: g3d-power-domain@10023C60 {
+ pd_g3d: g3d-power-domain@10023c60 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023C60 0x20>;
#power-domain-cells = <0>;
};
- pd_lcd0: lcd0-power-domain@10023C80 {
+ pd_lcd0: lcd0-power-domain@10023c80 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023C80 0x20>;
#power-domain-cells = <0>;
};
- pd_isp: isp-power-domain@10023CA0 {
+ pd_isp: isp-power-domain@10023ca0 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023CA0 0x20>;
#power-domain-cells = <0>;
@@ -204,7 +204,7 @@
<&cmu CLK_FIN_PLL>;
};
- cmu_dmc: clock-controller@105C0000 {
+ cmu_dmc: clock-controller@105c0000 {
compatible = "samsung,exynos3250-cmu-dmc";
reg = <0x105C0000 0x2000>;
#clock-cells = <1>;
@@ -219,7 +219,7 @@
status = "disabled";
};
- tmu: tmu@100C0000 {
+ tmu: tmu@100c0000 {
compatible = "samsung,exynos3250-tmu";
reg = <0x100C0000 0x100>;
interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
@@ -287,7 +287,7 @@
status = "disabled";
};
- sysmmu_jpeg: sysmmu@11A60000 {
+ sysmmu_jpeg: sysmmu@11a60000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x11a60000 0x1000>;
interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>,
@@ -313,7 +313,7 @@
status = "disabled";
};
- dsi_0: dsi@11C80000 {
+ dsi_0: dsi@11c80000 {
compatible = "samsung,exynos3250-mipi-dsi";
reg = <0x11C80000 0x10000>;
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
@@ -328,7 +328,7 @@
status = "disabled";
};
- sysmmu_fimd0: sysmmu@11E20000 {
+ sysmmu_fimd0: sysmmu@11e20000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x11e20000 0x1000>;
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
@@ -386,7 +386,7 @@
status = "disabled";
};
- exynos_usbphy: exynos-usbphy@125B0000 {
+ exynos_usbphy: exynos-usbphy@125b0000 {
compatible = "samsung,exynos3250-usb2-phy";
reg = <0x125B0000 0x100>;
samsung,pmureg-phandle = <&pmu_system_controller>;
@@ -425,7 +425,7 @@
};
};
- adc: adc@126C0000 {
+ adc: adc@126c0000 {
compatible = "samsung,exynos3250-adc",
"samsung,exynos-adc-v2";
reg = <0x126C0000 0x100>;
@@ -544,7 +544,7 @@
status = "disabled";
};
- i2c_4: i2c@138A0000 {
+ i2c_4: i2c@138a0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
@@ -557,7 +557,7 @@
status = "disabled";
};
- i2c_5: i2c@138B0000 {
+ i2c_5: i2c@138b0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
@@ -570,7 +570,7 @@
status = "disabled";
};
- i2c_6: i2c@138C0000 {
+ i2c_6: i2c@138c0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
@@ -583,7 +583,7 @@
status = "disabled";
};
- i2c_7: i2c@138D0000 {
+ i2c_7: i2c@138d0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
@@ -641,7 +641,7 @@
status = "disabled";
};
- pwm: pwm@139D0000 {
+ pwm: pwm@139d0000 {
compatible = "samsung,exynos4210-pwm";
reg = <0x139D0000 0x1000>;
interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index 4768b086ed67..f44aa383f626 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -101,28 +101,28 @@
syscon = <&pmu_system_controller>;
};
- pd_mfc: mfc-power-domain@10023C40 {
+ pd_mfc: mfc-power-domain@10023c40 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023C40 0x20>;
#power-domain-cells = <0>;
label = "MFC";
};
- pd_g3d: g3d-power-domain@10023C60 {
+ pd_g3d: g3d-power-domain@10023c60 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023C60 0x20>;
#power-domain-cells = <0>;
label = "G3D";
};
- pd_lcd0: lcd0-power-domain@10023C80 {
+ pd_lcd0: lcd0-power-domain@10023c80 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023C80 0x20>;
#power-domain-cells = <0>;
label = "LCD0";
};
- pd_tv: tv-power-domain@10023C20 {
+ pd_tv: tv-power-domain@10023c20 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023C20 0x20>;
#power-domain-cells = <0>;
@@ -130,21 +130,21 @@
label = "TV";
};
- pd_cam: cam-power-domain@10023C00 {
+ pd_cam: cam-power-domain@10023c00 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023C00 0x20>;
#power-domain-cells = <0>;
label = "CAM";
};
- pd_gps: gps-power-domain@10023CE0 {
+ pd_gps: gps-power-domain@10023ce0 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023CE0 0x20>;
#power-domain-cells = <0>;
label = "GPS";
};
- pd_gps_alive: gps-alive-power-domain@10023D00 {
+ pd_gps_alive: gps-alive-power-domain@10023d00 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023D00 0x20>;
#power-domain-cells = <0>;
@@ -184,7 +184,7 @@
interrupt-parent = <&gic>;
};
- dsi_0: dsi@11C80000 {
+ dsi_0: dsi@11c80000 {
compatible = "samsung,exynos4210-mipi-dsi";
reg = <0x11C80000 0x10000>;
interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
@@ -297,7 +297,7 @@
status = "disabled";
};
- keypad: keypad@100A0000 {
+ keypad: keypad@100a0000 {
compatible = "samsung,s5pv210-keypad";
reg = <0x100A0000 0x100>;
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
@@ -342,7 +342,7 @@
status = "disabled";
};
- exynos_usbphy: exynos-usbphy@125B0000 {
+ exynos_usbphy: exynos-usbphy@125b0000 {
compatible = "samsung,exynos4210-usb2-phy";
reg = <0x125B0000 0x100>;
samsung,pmureg-phandle = <&pmu_system_controller>;
@@ -538,7 +538,7 @@
status = "disabled";
};
- i2c_4: i2c@138A0000 {
+ i2c_4: i2c@138a0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
@@ -551,7 +551,7 @@
status = "disabled";
};
- i2c_5: i2c@138B0000 {
+ i2c_5: i2c@138b0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
@@ -564,7 +564,7 @@
status = "disabled";
};
- i2c_6: i2c@138C0000 {
+ i2c_6: i2c@138c0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
@@ -577,7 +577,7 @@
status = "disabled";
};
- i2c_7: i2c@138D0000 {
+ i2c_7: i2c@138d0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
@@ -590,7 +590,7 @@
status = "disabled";
};
- i2c_8: i2c@138E0000 {
+ i2c_8: i2c@138e0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-hdmiphy-i2c";
@@ -651,7 +651,7 @@
status = "disabled";
};
- pwm: pwm@139D0000 {
+ pwm: pwm@139d0000 {
compatible = "samsung,exynos4210-pwm";
reg = <0x139D0000 0x1000>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
@@ -720,7 +720,7 @@
status = "disabled";
};
- tmu: tmu@100C0000 {
+ tmu: tmu@100c0000 {
#include "exynos4412-tmu-sensor-conf.dtsi"
};
@@ -743,7 +743,7 @@
iommus = <&sysmmu_rotator>;
};
- hdmi: hdmi@12D00000 {
+ hdmi: hdmi@12d00000 {
compatible = "samsung,exynos4210-hdmi";
reg = <0x12D00000 0x70000>;
interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
@@ -755,10 +755,11 @@
phy = <&hdmi_i2c_phy>;
power-domains = <&pd_tv>;
samsung,syscon-phandle = <&pmu_system_controller>;
+ #sound-dai-cells = <0>;
status = "disabled";
};
- hdmicec: cec@100B0000 {
+ hdmicec: cec@100b0000 {
compatible = "samsung,s5p-cec";
reg = <0x100B0000 0x200>;
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
@@ -771,7 +772,7 @@
status = "disabled";
};
- mixer: mixer@12C10000 {
+ mixer: mixer@12c10000 {
compatible = "samsung,exynos4210-mixer";
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x12C10000 0x2100>, <0x12c00000 0x300>;
@@ -910,7 +911,7 @@
#iommu-cells = <0>;
};
- sysmmu_tv: sysmmu@12E20000 {
+ sysmmu_tv: sysmmu@12e20000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x12E20000 0x1000>;
interrupt-parent = <&combiner>;
@@ -921,7 +922,7 @@
#iommu-cells = <0>;
};
- sysmmu_fimc0: sysmmu@11A20000 {
+ sysmmu_fimc0: sysmmu@11a20000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x11A20000 0x1000>;
interrupt-parent = <&combiner>;
@@ -932,7 +933,7 @@
#iommu-cells = <0>;
};
- sysmmu_fimc1: sysmmu@11A30000 {
+ sysmmu_fimc1: sysmmu@11a30000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x11A30000 0x1000>;
interrupt-parent = <&combiner>;
@@ -943,7 +944,7 @@
#iommu-cells = <0>;
};
- sysmmu_fimc2: sysmmu@11A40000 {
+ sysmmu_fimc2: sysmmu@11a40000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x11A40000 0x1000>;
interrupt-parent = <&combiner>;
@@ -954,7 +955,7 @@
#iommu-cells = <0>;
};
- sysmmu_fimc3: sysmmu@11A50000 {
+ sysmmu_fimc3: sysmmu@11a50000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x11A50000 0x1000>;
interrupt-parent = <&combiner>;
@@ -965,7 +966,7 @@
#iommu-cells = <0>;
};
- sysmmu_jpeg: sysmmu@11A60000 {
+ sysmmu_jpeg: sysmmu@11a60000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x11A60000 0x1000>;
interrupt-parent = <&combiner>;
@@ -976,7 +977,7 @@
#iommu-cells = <0>;
};
- sysmmu_rotator: sysmmu@12A30000 {
+ sysmmu_rotator: sysmmu@12a30000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x12A30000 0x1000>;
interrupt-parent = <&combiner>;
@@ -986,7 +987,7 @@
#iommu-cells = <0>;
};
- sysmmu_fimd0: sysmmu@11E20000 {
+ sysmmu_fimd0: sysmmu@11e20000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x11E20000 0x1000>;
interrupt-parent = <&combiner>;
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index 03dd61f64809..ce161ad1215d 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -82,7 +82,7 @@
};
};
- pd_lcd1: lcd1-power-domain@10023CA0 {
+ pd_lcd1: lcd1-power-domain@10023ca0 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023CA0 0x20>;
#power-domain-cells = <0>;
@@ -156,7 +156,7 @@
reg = <0x03860000 0x1000>;
};
- tmu: tmu@100C0000 {
+ tmu: tmu@100c0000 {
compatible = "samsung,exynos4210-tmu";
interrupt-parent = <&combiner>;
reg = <0x100C0000 0x100>;
@@ -229,7 +229,7 @@
};
};
- mixer: mixer@12C10000 {
+ mixer: mixer@12c10000 {
clock-names = "mixer", "hdmi", "sclk_hdmi", "vp", "mout_mixer",
"sclk_mixer";
clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>,
@@ -245,7 +245,7 @@
status = "disabled";
};
- sysmmu_g2d: sysmmu@12A20000 {
+ sysmmu_g2d: sysmmu@12a20000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x12A20000 0x1000>;
interrupt-parent = <&combiner>;
diff --git a/arch/arm/boot/dts/exynos4412-pinctrl.dtsi b/arch/arm/boot/dts/exynos4412-pinctrl.dtsi
index 4eebd4721a5f..ef7b89d3db9e 100644
--- a/arch/arm/boot/dts/exynos4412-pinctrl.dtsi
+++ b/arch/arm/boot/dts/exynos4412-pinctrl.dtsi
@@ -925,7 +925,7 @@
};
};
- pinctrl_3: pinctrl@106E0000 {
+ pinctrl_3: pinctrl@106e0000 {
gpv0: gpv0 {
gpio-controller;
#gpio-cells = <2>;
diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts
index 220cdf109405..f285790e8e04 100644
--- a/arch/arm/boot/dts/exynos4412-trats2.dts
+++ b/arch/arm/boot/dts/exynos4412-trats2.dts
@@ -300,6 +300,13 @@
};
+ wlan_pwrseq: sdhci3-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&gpj0 0 GPIO_ACTIVE_LOW>;
+ clocks = <&max77686 MAX77686_CLK_PMIC>;
+ clock-names = "ext_clock";
+ };
+
sound {
compatible = "samsung,trats2-audio";
samsung,i2s-controller = <&i2s0>;
@@ -454,7 +461,7 @@
reg = <0>;
vdd3-supply = <&lcd_vdd3_reg>;
vci-supply = <&ldo25_reg>;
- reset-gpios = <&gpy4 5 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&gpf2 1 GPIO_ACTIVE_HIGH>;
power-on-delay= <50>;
reset-delay = <100>;
init-delay = <100>;
@@ -1350,6 +1357,26 @@
status = "okay";
};
+&sdhci_3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ non-removable;
+ bus-width = <4>;
+
+ mmc-pwrseq = <&wlan_pwrseq>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sd3_clk &sd3_cmd &sd3_bus4>;
+ status = "okay";
+
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ interrupt-parent = <&gpx2>;
+ interrupts = <5 IRQ_TYPE_NONE>;
+ interrupt-names = "host-wake";
+ };
+};
+
&serial_0 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi
index b255ac55b1c1..cec5bef44bdb 100644
--- a/arch/arm/boot/dts/exynos4412.dtsi
+++ b/arch/arm/boot/dts/exynos4412.dtsi
@@ -38,7 +38,7 @@
#address-cells = <1>;
#size-cells = <0>;
- cpu0: cpu@A00 {
+ cpu0: cpu@a00 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0xA00>;
@@ -50,21 +50,21 @@
#cooling-cells = <2>; /* min followed by max */
};
- cpu@A01 {
+ cpu@a01 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0xA01>;
operating-points-v2 = <&cpu0_opp_table>;
};
- cpu@A02 {
+ cpu@a02 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0xA02>;
operating-points-v2 = <&cpu0_opp_table>;
};
- cpu@A03 {
+ cpu@a03 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0xA03>;
@@ -168,7 +168,7 @@
};
};
- pd_isp: isp-power-domain@10023CA0 {
+ pd_isp: isp-power-domain@10023ca0 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023CA0 0x20>;
#power-domain-cells = <0>;
@@ -191,10 +191,19 @@
clock: clock-controller@10030000 {
compatible = "samsung,exynos4412-clock";
- reg = <0x10030000 0x20000>;
+ reg = <0x10030000 0x18000>;
#clock-cells = <1>;
};
+ isp_clock: clock-controller@10048000 {
+ compatible = "samsung,exynos4412-isp-clock";
+ reg = <0x10048000 0x1000>;
+ #clock-cells = <1>;
+ power-domains = <&pd_isp>;
+ clocks = <&clock CLK_ACLK200>, <&clock CLK_ACLK400_MCUISP>;
+ clock-names = "aclk200", "aclk400_mcuisp";
+ };
+
mct@10050000 {
compatible = "samsung,exynos4412-mct";
reg = <0x10050000 0x800>;
@@ -224,7 +233,7 @@
samsung,syscon-phandle = <&pmu_system_controller>;
};
- adc: adc@126C0000 {
+ adc: adc@126c0000 {
compatible = "samsung,exynos-adc-v1";
reg = <0x126C0000 0x100>;
interrupt-parent = <&combiner>;
@@ -257,18 +266,18 @@
reg = <0x12390000 0x1000>;
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&pd_isp>;
- clocks = <&clock CLK_FIMC_LITE0>;
+ clocks = <&isp_clock CLK_ISP_FIMC_LITE0>;
clock-names = "flite";
iommus = <&sysmmu_fimc_lite0>;
status = "disabled";
};
- fimc_lite_1: fimc-lite@123A0000 {
+ fimc_lite_1: fimc-lite@123a0000 {
compatible = "samsung,exynos4212-fimc-lite";
reg = <0x123A0000 0x1000>;
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&pd_isp>;
- clocks = <&clock CLK_FIMC_LITE1>;
+ clocks = <&isp_clock CLK_ISP_FIMC_LITE1>;
clock-names = "flite";
iommus = <&sysmmu_fimc_lite1>;
status = "disabled";
@@ -280,29 +289,35 @@
interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&pd_isp>;
- clocks = <&clock CLK_FIMC_LITE0>,
- <&clock CLK_FIMC_LITE1>, <&clock CLK_PPMUISPX>,
- <&clock CLK_PPMUISPMX>,
+ clocks = <&isp_clock CLK_ISP_FIMC_LITE0>,
+ <&isp_clock CLK_ISP_FIMC_LITE1>,
+ <&isp_clock CLK_ISP_PPMUISPX>,
+ <&isp_clock CLK_ISP_PPMUISPMX>,
+ <&isp_clock CLK_ISP_FIMC_ISP>,
+ <&isp_clock CLK_ISP_FIMC_DRC>,
+ <&isp_clock CLK_ISP_FIMC_FD>,
+ <&isp_clock CLK_ISP_MCUISP>,
+ <&isp_clock CLK_ISP_GICISP>,
+ <&isp_clock CLK_ISP_MCUCTL_ISP>,
+ <&isp_clock CLK_ISP_PWM_ISP>,
+ <&isp_clock CLK_ISP_DIV_ISP0>,
+ <&isp_clock CLK_ISP_DIV_ISP1>,
+ <&isp_clock CLK_ISP_DIV_MCUISP0>,
+ <&isp_clock CLK_ISP_DIV_MCUISP1>,
<&clock CLK_MOUT_MPLL_USER_T>,
- <&clock CLK_FIMC_ISP>, <&clock CLK_FIMC_DRC>,
- <&clock CLK_FIMC_FD>, <&clock CLK_MCUISP>,
- <&clock CLK_GICISP>, <&clock CLK_MCUCTL_ISP>,
- <&clock CLK_PWM_ISP>,
- <&clock CLK_DIV_ISP0>, <&clock CLK_DIV_ISP1>,
- <&clock CLK_DIV_MCUISP0>,
- <&clock CLK_DIV_MCUISP1>,
- <&clock CLK_UART_ISP_SCLK>,
- <&clock CLK_ACLK200>, <&clock CLK_DIV_ACLK200>,
+ <&clock CLK_ACLK200>,
<&clock CLK_ACLK400_MCUISP>,
- <&clock CLK_DIV_ACLK400_MCUISP>;
+ <&clock CLK_DIV_ACLK200>,
+ <&clock CLK_DIV_ACLK400_MCUISP>,
+ <&clock CLK_UART_ISP_SCLK>;
clock-names = "lite0", "lite1", "ppmuispx",
- "ppmuispmx", "mpll", "isp",
+ "ppmuispmx", "isp",
"drc", "fd", "mcuisp",
"gicisp", "mcuctl_isp", "pwm_isp",
"ispdiv0", "ispdiv1", "mcuispdiv0",
- "mcuispdiv1", "uart", "aclk200",
- "div_aclk200", "aclk400mcuisp",
- "div_aclk400mcuisp";
+ "mcuispdiv1", "mpll", "aclk200",
+ "aclk400mcuisp", "div_aclk200",
+ "div_aclk400mcuisp", "uart";
iommus = <&sysmmu_fimc_isp>, <&sysmmu_fimc_drc>,
<&sysmmu_fimc_fd>, <&sysmmu_fimc_mcuctl>;
iommu-names = "isp", "drc", "fd", "mcuctl";
@@ -318,7 +333,7 @@
i2c1_isp: i2c-isp@12140000 {
compatible = "samsung,exynos4212-i2c-isp";
reg = <0x12140000 0x100>;
- clocks = <&clock CLK_I2C1_ISP>;
+ clocks = <&isp_clock CLK_ISP_I2C1_ISP>;
clock-names = "i2c_isp";
#address-cells = <1>;
#size-cells = <0>;
@@ -355,7 +370,7 @@
interrupts = <16 2>;
power-domains = <&pd_isp>;
clock-names = "sysmmu";
- clocks = <&clock CLK_SMMU_ISP>;
+ clocks = <&isp_clock CLK_ISP_SMMU_ISP>;
#iommu-cells = <0>;
};
@@ -366,51 +381,53 @@
interrupts = <16 3>;
power-domains = <&pd_isp>;
clock-names = "sysmmu";
- clocks = <&clock CLK_SMMU_DRC>;
+ clocks = <&isp_clock CLK_ISP_SMMU_DRC>;
#iommu-cells = <0>;
};
- sysmmu_fimc_fd: sysmmu@122A0000 {
+ sysmmu_fimc_fd: sysmmu@122a0000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x122A0000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <16 4>;
power-domains = <&pd_isp>;
clock-names = "sysmmu";
- clocks = <&clock CLK_SMMU_FD>;
+ clocks = <&isp_clock CLK_ISP_SMMU_FD>;
#iommu-cells = <0>;
};
- sysmmu_fimc_mcuctl: sysmmu@122B0000 {
+ sysmmu_fimc_mcuctl: sysmmu@122b0000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x122B0000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <16 5>;
power-domains = <&pd_isp>;
clock-names = "sysmmu";
- clocks = <&clock CLK_SMMU_ISPCX>;
+ clocks = <&isp_clock CLK_ISP_SMMU_ISPCX>;
#iommu-cells = <0>;
};
- sysmmu_fimc_lite0: sysmmu@123B0000 {
+ sysmmu_fimc_lite0: sysmmu@123b0000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x123B0000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <16 0>;
power-domains = <&pd_isp>;
clock-names = "sysmmu", "master";
- clocks = <&clock CLK_SMMU_LITE0>, <&clock CLK_FIMC_LITE0>;
+ clocks = <&isp_clock CLK_ISP_SMMU_LITE0>,
+ <&isp_clock CLK_ISP_FIMC_LITE0>;
#iommu-cells = <0>;
};
- sysmmu_fimc_lite1: sysmmu@123C0000 {
+ sysmmu_fimc_lite1: sysmmu@123c0000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x123C0000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <16 1>;
power-domains = <&pd_isp>;
clock-names = "sysmmu", "master";
- clocks = <&clock CLK_SMMU_LITE1>, <&clock CLK_FIMC_LITE1>;
+ clocks = <&isp_clock CLK_ISP_SMMU_LITE1>,
+ <&isp_clock CLK_ISP_FIMC_LITE1>;
#iommu-cells = <0>;
};
diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi
index 66d22521c976..1b1dd3850638 100644
--- a/arch/arm/boot/dts/exynos5.dtsi
+++ b/arch/arm/boot/dts/exynos5.dtsi
@@ -106,31 +106,31 @@
reg = <0x10050000 0x5000>;
};
- serial_0: serial@12C00000 {
+ serial_0: serial@12c00000 {
compatible = "samsung,exynos4210-uart";
reg = <0x12C00000 0x100>;
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
};
- serial_1: serial@12C10000 {
+ serial_1: serial@12c10000 {
compatible = "samsung,exynos4210-uart";
reg = <0x12C10000 0x100>;
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
};
- serial_2: serial@12C20000 {
+ serial_2: serial@12c20000 {
compatible = "samsung,exynos4210-uart";
reg = <0x12C20000 0x100>;
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
};
- serial_3: serial@12C30000 {
+ serial_3: serial@12c30000 {
compatible = "samsung,exynos4210-uart";
reg = <0x12C30000 0x100>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
};
- i2c_0: i2c@12C60000 {
+ i2c_0: i2c@12c60000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12C60000 0x100>;
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
@@ -140,7 +140,7 @@
status = "disabled";
};
- i2c_1: i2c@12C70000 {
+ i2c_1: i2c@12c70000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12C70000 0x100>;
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
@@ -150,7 +150,7 @@
status = "disabled";
};
- i2c_2: i2c@12C80000 {
+ i2c_2: i2c@12c80000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12C80000 0x100>;
interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
@@ -160,7 +160,7 @@
status = "disabled";
};
- i2c_3: i2c@12C90000 {
+ i2c_3: i2c@12c90000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12C90000 0x100>;
interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
@@ -170,14 +170,14 @@
status = "disabled";
};
- pwm: pwm@12DD0000 {
+ pwm: pwm@12dd0000 {
compatible = "samsung,exynos4210-pwm";
reg = <0x12DD0000 0x100>;
samsung,pwm-outputs = <0>, <1>, <2>, <3>;
#pwm-cells = <3>;
};
- rtc: rtc@101E0000 {
+ rtc: rtc@101e0000 {
compatible = "samsung,s3c6410-rtc";
reg = <0x101E0000 0x100>;
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
@@ -195,7 +195,7 @@
status = "disabled";
};
- dp: dp-controller@145B0000 {
+ dp: dp-controller@145b0000 {
compatible = "samsung,exynos5-dp";
reg = <0x145B0000 0x1000>;
interrupts = <10 3>;
@@ -204,5 +204,28 @@
#size-cells = <0>;
status = "disabled";
};
+
+ sss: sss@10830000 {
+ compatible = "samsung,exynos4210-secss";
+ reg = <0x10830000 0x300>;
+ interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ prng: rng@10830400 {
+ compatible = "samsung,exynos5250-prng";
+ reg = <0x10830400 0x200>;
+ };
+
+ trng: rng@10830600 {
+ compatible = "samsung,exynos5250-trng";
+ reg = <0x10830600 0x100>;
+ };
+
+ g2d: g2d@10850000 {
+ compatible = "samsung,exynos5250-g2d";
+ reg = <0x10850000 0x1000>;
+ interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
};
};
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index 5286084e1032..571c89605a39 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -111,21 +111,28 @@
};
};
- pd_gsc: gsc-power-domain@10044000 {
+ pd_gsc: power-domain@10044000 {
compatible = "samsung,exynos4210-pd";
reg = <0x10044000 0x20>;
#power-domain-cells = <0>;
label = "GSC";
};
- pd_mfc: mfc-power-domain@10044040 {
+ pd_mfc: power-domain@10044040 {
compatible = "samsung,exynos4210-pd";
reg = <0x10044040 0x20>;
#power-domain-cells = <0>;
label = "MFC";
};
- pd_disp1: disp1-power-domain@100440A0 {
+ pd_g3d: power-domain@10044060 {
+ compatible = "samsung,exynos4210-pd";
+ reg = <0x10044060 0x20>;
+ #power-domain-cells = <0>;
+ label = "G3D";
+ };
+
+ pd_disp1: power-domain@100440a0 {
compatible = "samsung,exynos4210-pd";
reg = <0x100440A0 0x20>;
#power-domain-cells = <0>;
@@ -136,6 +143,13 @@
clock-names = "oscclk", "clk0", "clk1";
};
+ pd_mau: power-domain@100440c0 {
+ compatible = "samsung,exynos4210-pd";
+ reg = <0x100440C0 0x20>;
+ #power-domain-cells = <0>;
+ label = "MAU";
+ };
+
clock: clock-controller@10010000 {
compatible = "samsung,exynos5250-clock";
reg = <0x10010000 0x30000>;
@@ -149,6 +163,7 @@
clocks = <&clock CLK_FIN_PLL>, <&clock CLK_FOUT_EPLL>,
<&clock CLK_SCLK_AUDIO0>, <&clock CLK_DIV_PCM0>;
clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in";
+ power-domains = <&pd_mau>;
};
timer {
@@ -165,7 +180,7 @@
clock-frequency = <24000000>;
};
- mct@101C0000 {
+ mct@101c0000 {
compatible = "samsung,exynos4210-mct";
reg = <0x101C0000 0x800>;
interrupt-controller;
@@ -223,6 +238,7 @@
compatible = "samsung,exynos5250-pinctrl";
reg = <0x03860000 0x1000>;
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&pd_mau>;
};
pmu_system_controller: system-controller@10040000 {
@@ -236,7 +252,7 @@
interrupt-parent = <&gic>;
};
- watchdog@101D0000 {
+ watchdog@101d0000 {
compatible = "samsung,exynos5250-wdt";
reg = <0x101D0000 0x100>;
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
@@ -245,15 +261,6 @@
samsung,syscon-phandle = <&pmu_system_controller>;
};
- g2d@10850000 {
- compatible = "samsung,exynos5250-g2d";
- reg = <0x10850000 0x1000>;
- interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clock CLK_G2D>;
- clock-names = "fimg2d";
- iommus = <&sysmmu_g2d>;
- };
-
mfc: codec@11000000 {
compatible = "samsung,mfc-v6";
reg = <0x11000000 0x10000>;
@@ -265,7 +272,7 @@
iommu-names = "left", "right";
};
- rotator: rotator@11C00000 {
+ rotator: rotator@11c00000 {
compatible = "samsung,exynos5250-rotator";
reg = <0x11C00000 0x64>;
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
@@ -283,7 +290,7 @@
#include "exynos4412-tmu-sensor-conf.dtsi"
};
- sata: sata@122F0000 {
+ sata: sata@122f0000 {
compatible = "snps,dwc-ahci";
samsung,sata-freq = <66>;
reg = <0x122F0000 0x1ff>;
@@ -306,7 +313,7 @@
};
/* i2c_0-3 are defined in exynos5.dtsi */
- i2c_4: i2c@12CA0000 {
+ i2c_4: i2c@12ca0000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12CA0000 0x100>;
interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
@@ -319,7 +326,7 @@
status = "disabled";
};
- i2c_5: i2c@12CB0000 {
+ i2c_5: i2c@12cb0000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12CB0000 0x100>;
interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
@@ -332,7 +339,7 @@
status = "disabled";
};
- i2c_6: i2c@12CC0000 {
+ i2c_6: i2c@12cc0000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12CC0000 0x100>;
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
@@ -345,7 +352,7 @@
status = "disabled";
};
- i2c_7: i2c@12CD0000 {
+ i2c_7: i2c@12cd0000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12CD0000 0x100>;
interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
@@ -358,7 +365,7 @@
status = "disabled";
};
- i2c_8: i2c@12CE0000 {
+ i2c_8: i2c@12ce0000 {
compatible = "samsung,s3c2440-hdmiphy-i2c";
reg = <0x12CE0000 0x1000>;
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
@@ -374,7 +381,7 @@
};
};
- i2c_9: i2c@121D0000 {
+ i2c_9: i2c@121d0000 {
compatible = "samsung,exynos5-sata-phy-i2c";
reg = <0x121D0000 0x100>;
#address-cells = <1>;
@@ -495,9 +502,10 @@
samsung,idma-addr = <0x03000000>;
pinctrl-names = "default";
pinctrl-0 = <&i2s0_bus>;
+ power-domains = <&pd_mau>;
};
- i2s1: i2s@12D60000 {
+ i2s1: i2s@12d60000 {
compatible = "samsung,s3c6410-i2s";
status = "disabled";
reg = <0x12D60000 0x100>;
@@ -508,9 +516,10 @@
clock-names = "iis", "i2s_opclk0";
pinctrl-names = "default";
pinctrl-0 = <&i2s1_bus>;
+ power-domains = <&pd_mau>;
};
- i2s2: i2s@12D70000 {
+ i2s2: i2s@12d70000 {
compatible = "samsung,s3c6410-i2s";
status = "disabled";
reg = <0x12D70000 0x100>;
@@ -521,6 +530,7 @@
clock-names = "iis", "i2s_opclk0";
pinctrl-names = "default";
pinctrl-0 = <&i2s2_bus>;
+ power-domains = <&pd_mau>;
};
usb_dwc3 {
@@ -596,7 +606,7 @@
interrupt-parent = <&gic>;
ranges;
- pdma0: pdma@121A0000 {
+ pdma0: pdma@121a0000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x121A0000 0x1000>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
@@ -607,7 +617,7 @@
#dma-requests = <32>;
};
- pdma1: pdma@121B0000 {
+ pdma1: pdma@121b0000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x121B0000 0x1000>;
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
@@ -629,7 +639,7 @@
#dma-requests = <1>;
};
- mdma1: mdma@11C10000 {
+ mdma1: mdma@11c10000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x11C10000 0x1000>;
interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
@@ -696,7 +706,7 @@
status = "disabled";
};
- hdmicec: cec@101B0000 {
+ hdmicec: cec@101b0000 {
compatible = "samsung,s5p-cec";
reg = <0x101B0000 0x200>;
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
@@ -727,7 +737,7 @@
#phy-cells = <0>;
};
- adc: adc@12D10000 {
+ adc: adc@12d10000 {
compatible = "samsung,exynos-adc-v1";
reg = <0x12D10000 0x100>;
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
@@ -739,15 +749,7 @@
status = "disabled";
};
- sss@10830000 {
- compatible = "samsung,exynos4210-secss";
- reg = <0x10830000 0x300>;
- interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clock CLK_SSS>;
- clock-names = "secss";
- };
-
- sysmmu_g2d: sysmmu@10A60000 {
+ sysmmu_g2d: sysmmu@10a60000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x10A60000 0x1000>;
interrupt-parent = <&combiner>;
@@ -779,7 +781,7 @@
#iommu-cells = <0>;
};
- sysmmu_rotator: sysmmu@11D40000 {
+ sysmmu_rotator: sysmmu@11d40000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x11D40000 0x1000>;
interrupt-parent = <&combiner>;
@@ -789,7 +791,7 @@
#iommu-cells = <0>;
};
- sysmmu_jpeg: sysmmu@11F20000 {
+ sysmmu_jpeg: sysmmu@11f20000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x11F20000 0x1000>;
interrupt-parent = <&combiner>;
@@ -820,7 +822,7 @@
#iommu-cells = <0>;
};
- sysmmu_fimc_fd: sysmmu@132A0000 {
+ sysmmu_fimc_fd: sysmmu@132a0000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x132A0000 0x1000>;
interrupt-parent = <&combiner>;
@@ -850,7 +852,7 @@
#iommu-cells = <0>;
};
- sysmmu_fimc_mcuctl: sysmmu@132B0000 {
+ sysmmu_fimc_mcuctl: sysmmu@132b0000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x132B0000 0x1000>;
interrupt-parent = <&combiner>;
@@ -860,7 +862,7 @@
#iommu-cells = <0>;
};
- sysmmu_fimc_odc: sysmmu@132C0000 {
+ sysmmu_fimc_odc: sysmmu@132c0000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x132C0000 0x1000>;
interrupt-parent = <&combiner>;
@@ -870,7 +872,7 @@
#iommu-cells = <0>;
};
- sysmmu_fimc_dis0: sysmmu@132D0000 {
+ sysmmu_fimc_dis0: sysmmu@132d0000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x132D0000 0x1000>;
interrupt-parent = <&combiner>;
@@ -890,7 +892,7 @@
#iommu-cells = <0>;
};
- sysmmu_fimc_3dnr: sysmmu@132F0000 {
+ sysmmu_fimc_3dnr: sysmmu@132f0000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x132F0000 0x1000>;
interrupt-parent = <&combiner>;
@@ -900,7 +902,7 @@
#iommu-cells = <0>;
};
- sysmmu_fimc_lite0: sysmmu@13C40000 {
+ sysmmu_fimc_lite0: sysmmu@13c40000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x13C40000 0x1000>;
interrupt-parent = <&combiner>;
@@ -911,7 +913,7 @@
#iommu-cells = <0>;
};
- sysmmu_fimc_lite1: sysmmu@13C50000 {
+ sysmmu_fimc_lite1: sysmmu@13c50000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x13C50000 0x1000>;
interrupt-parent = <&combiner>;
@@ -922,7 +924,7 @@
#iommu-cells = <0>;
};
- sysmmu_gsc0: sysmmu@13E80000 {
+ sysmmu_gsc0: sysmmu@13e80000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x13E80000 0x1000>;
interrupt-parent = <&combiner>;
@@ -933,7 +935,7 @@
#iommu-cells = <0>;
};
- sysmmu_gsc1: sysmmu@13E90000 {
+ sysmmu_gsc1: sysmmu@13e90000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x13E90000 0x1000>;
interrupt-parent = <&combiner>;
@@ -944,7 +946,7 @@
#iommu-cells = <0>;
};
- sysmmu_gsc2: sysmmu@13EA0000 {
+ sysmmu_gsc2: sysmmu@13ea0000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x13EA0000 0x1000>;
interrupt-parent = <&combiner>;
@@ -955,7 +957,7 @@
#iommu-cells = <0>;
};
- sysmmu_gsc3: sysmmu@13EB0000 {
+ sysmmu_gsc3: sysmmu@13eb0000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x13EB0000 0x1000>;
interrupt-parent = <&combiner>;
@@ -1024,6 +1026,13 @@
iommus = <&sysmmu_fimd1>;
};
+&g2d {
+ iommus = <&sysmmu_g2d>;
+ clocks = <&clock CLK_G2D>;
+ clock-names = "fimg2d";
+ status = "okay";
+};
+
&i2c_0 {
clocks = <&clock CLK_I2C0>;
clock-names = "i2c";
@@ -1052,6 +1061,11 @@
pinctrl-0 = <&i2c3_bus>;
};
+&prng {
+ clocks = <&clock CLK_SSS>;
+ clock-names = "secss";
+};
+
&pwm {
clocks = <&clock CLK_PWM>;
clock-names = "timers";
@@ -1092,4 +1106,14 @@
dma-names = "rx", "tx";
};
+&sss {
+ clocks = <&clock CLK_SSS>;
+ clock-names = "secss";
+};
+
+&trng {
+ clocks = <&clock CLK_SSS>;
+ clock-names = "secss";
+};
+
#include "exynos5250-pinctrl.dtsi"
diff --git a/arch/arm/boot/dts/exynos5260.dtsi b/arch/arm/boot/dts/exynos5260.dtsi
index 5e88c9645975..12c6b011576b 100644
--- a/arch/arm/boot/dts/exynos5260.dtsi
+++ b/arch/arm/boot/dts/exynos5260.dtsi
@@ -106,13 +106,13 @@
#clock-cells = <1>;
};
- clock_g2d: clock-controller@10A00000 {
+ clock_g2d: clock-controller@10a00000 {
compatible = "samsung,exynos5260-clock-g2d";
reg = <0x10A00000 0x10000>;
#clock-cells = <1>;
};
- clock_mif: clock-controller@10CE0000 {
+ clock_mif: clock-controller@10ce0000 {
compatible = "samsung,exynos5260-clock-mif";
reg = <0x10CE0000 0x10000>;
#clock-cells = <1>;
@@ -130,25 +130,25 @@
#clock-cells = <1>;
};
- clock_fsys: clock-controller@122E0000 {
+ clock_fsys: clock-controller@122e0000 {
compatible = "samsung,exynos5260-clock-fsys";
reg = <0x122E0000 0x10000>;
#clock-cells = <1>;
};
- clock_aud: clock-controller@128C0000 {
+ clock_aud: clock-controller@128c0000 {
compatible = "samsung,exynos5260-clock-aud";
reg = <0x128C0000 0x10000>;
#clock-cells = <1>;
};
- clock_isp: clock-controller@133C0000 {
+ clock_isp: clock-controller@133c0000 {
compatible = "samsung,exynos5260-clock-isp";
reg = <0x133C0000 0x10000>;
#clock-cells = <1>;
};
- clock_gscl: clock-controller@13F00000 {
+ clock_gscl: clock-controller@13f00000 {
compatible = "samsung,exynos5260-clock-gscl";
reg = <0x13F00000 0x10000>;
#clock-cells = <1>;
@@ -179,7 +179,7 @@
reg = <0x10000000 0x100>;
};
- mct: mct@100B0000 {
+ mct: mct@100b0000 {
compatible = "samsung,exynos4210-mct";
reg = <0x100B0000 0x1000>;
clocks = <&fin_pll>, <&clock_peri PERI_CLK_MCT>;
@@ -198,7 +198,7 @@
<GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;
};
- cci: cci@10F00000 {
+ cci: cci@10f00000 {
compatible = "arm,cci-400";
#address-cells = <1>;
#size-cells = <1>;
@@ -236,18 +236,18 @@
interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
};
- pinctrl_2: pinctrl@128B0000 {
+ pinctrl_2: pinctrl@128b0000 {
compatible = "samsung,exynos5260-pinctrl";
reg = <0x128B0000 0x1000>;
interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>;
};
- pmu_system_controller: system-controller@10D50000 {
+ pmu_system_controller: system-controller@10d50000 {
compatible = "samsung,exynos5260-pmu", "syscon";
reg = <0x10D50000 0x10000>;
};
- uart0: serial@12C00000 {
+ uart0: serial@12c00000 {
compatible = "samsung,exynos4210-uart";
reg = <0x12C00000 0x100>;
interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
@@ -256,7 +256,7 @@
status = "disabled";
};
- uart1: serial@12C10000 {
+ uart1: serial@12c10000 {
compatible = "samsung,exynos4210-uart";
reg = <0x12C10000 0x100>;
interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
@@ -265,7 +265,7 @@
status = "disabled";
};
- uart2: serial@12C20000 {
+ uart2: serial@12c20000 {
compatible = "samsung,exynos4210-uart";
reg = <0x12C20000 0x100>;
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/boot/dts/exynos5410.dtsi b/arch/arm/boot/dts/exynos5410.dtsi
index 06713ec86f0d..4e5d9bad085f 100644
--- a/arch/arm/boot/dts/exynos5410.dtsi
+++ b/arch/arm/boot/dts/exynos5410.dtsi
@@ -75,6 +75,9 @@
clock-names = "clkout16";
clocks = <&fin_pll>;
#clock-cells = <1>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ interrupt-parent = <&gic>;
};
clock: clock-controller@10010000 {
@@ -264,6 +267,11 @@
};
};
+&arm_a15_pmu {
+ interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
+ status = "okay";
+};
+
&i2c_0 {
clocks = <&clock CLK_I2C0>;
clock-names = "i2c";
@@ -325,6 +333,11 @@
clock-names = "fin_pll", "mct";
};
+&prng {
+ clocks = <&clock CLK_SSS>;
+ clock-names = "secss";
+};
+
&pwm {
clocks = <&clock CLK_PWM>;
clock-names = "timers";
@@ -379,6 +392,11 @@
3 0 0x07000000 0x20000>;
};
+&trng {
+ clocks = <&clock CLK_SSS>;
+ clock-names = "secss";
+};
+
&usbdrd3_0 {
clocks = <&clock CLK_USBD300>;
clock-names = "usbdrd30";
diff --git a/arch/arm/boot/dts/exynos5420-cpus.dtsi b/arch/arm/boot/dts/exynos5420-cpus.dtsi
index d7d703aa1699..4ee2f9718e8a 100644
--- a/arch/arm/boot/dts/exynos5420-cpus.dtsi
+++ b/arch/arm/boot/dts/exynos5420-cpus.dtsi
@@ -132,3 +132,13 @@
};
};
};
+
+&arm_a7_pmu {
+ interrupt-affinity = <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;
+ status = "okay";
+};
+
+&arm_a15_pmu {
+ interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 8aa2cc7aa125..61b42b7c4fee 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -188,6 +188,7 @@
clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MAU_EPLL>,
<&clock CLK_SCLK_MAUDIO0>, <&clock CLK_SCLK_MAUPCM0>;
clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in";
+ power-domains = <&mau_pd>;
};
mfc: codec@11000000 {
@@ -237,37 +238,37 @@
status = "disabled";
};
- nocp_mem0_0: nocp@10CA1000 {
+ nocp_mem0_0: nocp@10ca1000 {
compatible = "samsung,exynos5420-nocp";
reg = <0x10CA1000 0x200>;
status = "disabled";
};
- nocp_mem0_1: nocp@10CA1400 {
+ nocp_mem0_1: nocp@10ca1400 {
compatible = "samsung,exynos5420-nocp";
reg = <0x10CA1400 0x200>;
status = "disabled";
};
- nocp_mem1_0: nocp@10CA1800 {
+ nocp_mem1_0: nocp@10ca1800 {
compatible = "samsung,exynos5420-nocp";
reg = <0x10CA1800 0x200>;
status = "disabled";
};
- nocp_mem1_1: nocp@10CA1C00 {
+ nocp_mem1_1: nocp@10ca1c00 {
compatible = "samsung,exynos5420-nocp";
reg = <0x10CA1C00 0x200>;
status = "disabled";
};
- nocp_g3d_0: nocp@11A51000 {
+ nocp_g3d_0: nocp@11a51000 {
compatible = "samsung,exynos5420-nocp";
reg = <0x11A51000 0x200>;
status = "disabled";
};
- nocp_g3d_1: nocp@11A51400 {
+ nocp_g3d_1: nocp@11a51400 {
compatible = "samsung,exynos5420-nocp";
reg = <0x11A51400 0x200>;
status = "disabled";
@@ -309,7 +310,7 @@
label = "MSC";
};
- disp_pd: power-domain@100440C0 {
+ disp_pd: power-domain@100440c0 {
compatible = "samsung,exynos4210-pd";
reg = <0x100440C0 0x20>;
#power-domain-cells = <0>;
@@ -322,6 +323,13 @@
clock-names = "oscclk", "clk0", "clk1", "clk2", "asb0", "asb1";
};
+ mau_pd: power-domain@100440e0 {
+ compatible = "samsung,exynos4210-pd";
+ reg = <0x100440E0 0x20>;
+ #power-domain-cells = <0>;
+ label = "MAU";
+ };
+
pinctrl_0: pinctrl@13400000 {
compatible = "samsung,exynos5420-pinctrl";
reg = <0x13400000 0x1000>;
@@ -356,6 +364,7 @@
compatible = "samsung,exynos5420-pinctrl";
reg = <0x03860000 0x1000>;
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&mau_pd>;
};
amba {
@@ -374,9 +383,10 @@
#dma-cells = <1>;
#dma-channels = <6>;
#dma-requests = <16>;
+ power-domains = <&mau_pd>;
};
- pdma0: pdma@121A0000 {
+ pdma0: pdma@121a0000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x121A0000 0x1000>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
@@ -387,7 +397,7 @@
#dma-requests = <32>;
};
- pdma1: pdma@121B0000 {
+ pdma1: pdma@121b0000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x121B0000 0x1000>;
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
@@ -409,7 +419,7 @@
#dma-requests = <1>;
};
- mdma1: mdma@11C10000 {
+ mdma1: mdma@11c10000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x11C10000 0x1000>;
interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
@@ -446,10 +456,11 @@
samsung,idma-addr = <0x03000000>;
pinctrl-names = "default";
pinctrl-0 = <&i2s0_bus>;
+ power-domains = <&mau_pd>;
status = "disabled";
};
- i2s1: i2s@12D60000 {
+ i2s1: i2s@12d60000 {
compatible = "samsung,exynos5420-i2s";
reg = <0x12D60000 0x100>;
dmas = <&pdma1 12
@@ -465,7 +476,7 @@
status = "disabled";
};
- i2s2: i2s@12D70000 {
+ i2s2: i2s@12d70000 {
compatible = "samsung,exynos5420-i2s";
reg = <0x12D70000 0x100>;
dmas = <&pdma0 12
@@ -554,7 +565,7 @@
status = "disabled";
};
- adc: adc@12D10000 {
+ adc: adc@12d10000 {
compatible = "samsung,exynos-adc-v2";
reg = <0x12D10000 0x100>;
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
@@ -566,7 +577,7 @@
status = "disabled";
};
- hsi2c_8: i2c@12E00000 {
+ hsi2c_8: i2c@12e00000 {
compatible = "samsung,exynos5250-hsi2c";
reg = <0x12E00000 0x1000>;
interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
@@ -579,7 +590,7 @@
status = "disabled";
};
- hsi2c_9: i2c@12E10000 {
+ hsi2c_9: i2c@12e10000 {
compatible = "samsung,exynos5250-hsi2c";
reg = <0x12E10000 0x1000>;
interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
@@ -592,7 +603,7 @@
status = "disabled";
};
- hsi2c_10: i2c@12E20000 {
+ hsi2c_10: i2c@12e20000 {
compatible = "samsung,exynos5250-hsi2c";
reg = <0x12E20000 0x1000>;
interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>;
@@ -618,13 +629,14 @@
samsung,syscon-phandle = <&pmu_system_controller>;
status = "disabled";
power-domains = <&disp_pd>;
+ #sound-dai-cells = <0>;
};
- hdmiphy: hdmiphy@145D0000 {
+ hdmiphy: hdmiphy@145d0000 {
reg = <0x145D0000 0x20>;
};
- hdmicec: cec@101B0000 {
+ hdmicec: cec@101b0000 {
compatible = "samsung,s5p-cec";
reg = <0x101B0000 0x200>;
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
@@ -649,7 +661,7 @@
status = "disabled";
};
- rotator: rotator@11C00000 {
+ rotator: rotator@11c00000 {
compatible = "samsung,exynos5250-rotator";
reg = <0x11C00000 0x64>;
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
@@ -678,7 +690,7 @@
iommus = <&sysmmu_gscl1>;
};
- jpeg_0: jpeg@11F50000 {
+ jpeg_0: jpeg@11f50000 {
compatible = "samsung,exynos5420-jpeg";
reg = <0x11F50000 0x1000>;
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
@@ -687,7 +699,7 @@
iommus = <&sysmmu_jpeg0>;
};
- jpeg_1: jpeg@11F60000 {
+ jpeg_1: jpeg@11f60000 {
compatible = "samsung,exynos5420-jpeg";
reg = <0x11F60000 0x1000>;
interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
@@ -1349,6 +1361,13 @@
iommu-names = "m0", "m1";
};
+&g2d {
+ iommus = <&sysmmu_g2dr>, <&sysmmu_g2dw>;
+ clocks = <&clock CLK_G2D>;
+ clock-names = "fimg2d";
+ status = "okay";
+};
+
&i2c_0 {
clocks = <&clock CLK_I2C0>;
clock-names = "i2c";
@@ -1410,6 +1429,11 @@
clock-names = "fin_pll", "mct";
};
+&prng {
+ clocks = <&clock CLK_SSS>;
+ clock-names = "secss";
+};
+
&pwm {
clocks = <&clock CLK_PWM>;
clock-names = "timers";
@@ -1455,6 +1479,11 @@
clock-names = "secss";
};
+&trng {
+ clocks = <&clock CLK_SSS>;
+ clock-names = "secss";
+};
+
&usbdrd3_0 {
clocks = <&clock CLK_USBD300>;
clock-names = "usbdrd30";
diff --git a/arch/arm/boot/dts/exynos5422-cpus.dtsi b/arch/arm/boot/dts/exynos5422-cpus.dtsi
index ec01d8020c2d..73fb37d5042d 100644
--- a/arch/arm/boot/dts/exynos5422-cpus.dtsi
+++ b/arch/arm/boot/dts/exynos5422-cpus.dtsi
@@ -131,3 +131,13 @@
};
};
};
+
+&arm_a7_pmu {
+ interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
+ status = "okay";
+};
+
+&arm_a15_pmu {
+ interrupt-affinity = <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
index a5b8d0f0877e..81cbb77204a8 100644
--- a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
+++ b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
@@ -233,8 +233,8 @@
ldo15_reg: LDO15 {
regulator-name = "vdd_ldo15";
- regulator-min-microvolt = <3100000>;
- regulator-max-microvolt = <3100000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
regulator-always-on;
};
@@ -246,7 +246,7 @@
};
ldo17_reg: LDO17 {
- regulator-name = "tsp_avdd";
+ regulator-name = "vdd_ldo17";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi b/arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi
index da3141a307d5..fe4d8ef094d0 100644
--- a/arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi
+++ b/arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi
@@ -1,5 +1,5 @@
/*
- * Hardkernel Odroid XU3 Audio Codec device tree source
+ * Hardkernel Odroid XU3 audio subsystem device tree source
*
* Copyright (c) 2015 Krzysztof Kozlowski
* Copyright (c) 2014 Collabora Ltd.
@@ -15,13 +15,13 @@
/ {
sound: sound {
- compatible = "simple-audio-card";
+ compatible = "samsung,odroid-xu3-audio";
+ model = "Odroid-XU3";
- simple-audio-card,name = "Odroid-XU3";
- simple-audio-card,widgets =
+ samsung,audio-widgets =
"Headphone", "Headphone Jack",
"Speakers", "Speakers";
- simple-audio-card,routing =
+ samsung,audio-routing =
"Headphone Jack", "HPL",
"Headphone Jack", "HPR",
"Headphone Jack", "MICBIAS",
@@ -29,31 +29,47 @@
"Speakers", "SPKL",
"Speakers", "SPKR";
- simple-audio-card,format = "i2s";
- simple-audio-card,bitclock-master = <&link0_codec>;
- simple-audio-card,frame-master = <&link0_codec>;
+ assigned-clocks = <&i2s0 CLK_I2S_RCLK_SRC>,
+ <&clock CLK_MOUT_EPLL>,
+ <&clock CLK_MOUT_MAU_EPLL>,
+ <&clock CLK_MOUT_USER_MAU_EPLL>,
+ <&clock_audss EXYNOS_MOUT_AUDSS>,
+ <&clock_audss EXYNOS_MOUT_I2S>,
+ <&clock_audss EXYNOS_DOUT_SRP>,
+ <&clock_audss EXYNOS_DOUT_AUD_BUS>,
+ <&clock_audss EXYNOS_DOUT_I2S>;
- simple-audio-card,cpu {
+ assigned-clock-parents = <&clock_audss EXYNOS_SCLK_I2S>,
+ <&clock CLK_FOUT_EPLL>,
+ <&clock CLK_MOUT_EPLL>,
+ <&clock CLK_MOUT_MAU_EPLL>,
+ <&clock CLK_MAU_EPLL>,
+ <&clock_audss EXYNOS_MOUT_AUDSS>;
+
+ assigned-clock-rates = <0>,
+ <0>,
+ <0>,
+ <0>,
+ <0>,
+ <0>,
+ <196608001>,
+ <(196608002 / 2)>,
+ <196608000>;
+
+ cpu {
sound-dai = <&i2s0 0>;
- system-clock-frequency = <19200000>;
};
-
- link0_codec: simple-audio-card,codec {
- sound-dai = <&max98090>;
- clocks = <&i2s0 CLK_I2S_CDCLK>;
+ codec {
+ sound-dai = <&hdmi>, <&max98090>;
};
};
};
&clock_audss {
- assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
- <&clock_audss EXYNOS_MOUT_I2S>,
- <&clock_audss EXYNOS_DOUT_AUD_BUS>;
- assigned-clock-parents = <&clock CLK_FIN_PLL>,
- <&clock_audss EXYNOS_MOUT_AUDSS>;
- assigned-clock-rates = <0>,
- <0>,
- <19200000>;
+ assigned-clocks = <&clock_audss EXYNOS_DOUT_SRP>,
+ <&clock CLK_FOUT_EPLL>;
+ assigned-clock-rates = <(196608000 / 256)>,
+ <196608000>;
};
&hsi2c_5 {
diff --git a/arch/arm/boot/dts/exynos5422-odroidxu4.dts b/arch/arm/boot/dts/exynos5422-odroidxu4.dts
index 2faf88627a48..0c2f1ef8a552 100644
--- a/arch/arm/boot/dts/exynos5422-odroidxu4.dts
+++ b/arch/arm/boot/dts/exynos5422-odroidxu4.dts
@@ -12,6 +12,7 @@
*/
/dts-v1/;
+#include <dt-bindings/sound/samsung-i2s.h>
#include "exynos5422-odroidxu3-common.dtsi"
/ {
@@ -30,6 +31,57 @@
linux,default-trigger = "heartbeat";
};
};
+
+ sound: sound {
+ compatible = "samsung,odroid-xu3-audio";
+ model = "Odroid-XU4";
+
+ assigned-clocks = <&i2s0 CLK_I2S_RCLK_SRC>,
+ <&clock CLK_MOUT_EPLL>,
+ <&clock CLK_MOUT_MAU_EPLL>,
+ <&clock CLK_MOUT_USER_MAU_EPLL>,
+ <&clock_audss EXYNOS_MOUT_AUDSS>,
+ <&clock_audss EXYNOS_MOUT_I2S>,
+ <&clock_audss EXYNOS_DOUT_SRP>,
+ <&clock_audss EXYNOS_DOUT_AUD_BUS>,
+ <&clock_audss EXYNOS_DOUT_I2S>;
+
+ assigned-clock-parents = <&clock_audss EXYNOS_SCLK_I2S>,
+ <&clock CLK_FOUT_EPLL>,
+ <&clock CLK_MOUT_EPLL>,
+ <&clock CLK_MOUT_MAU_EPLL>,
+ <&clock CLK_MAU_EPLL>,
+ <&clock_audss EXYNOS_MOUT_AUDSS>;
+
+ assigned-clock-rates = <0>,
+ <0>,
+ <0>,
+ <0>,
+ <0>,
+ <0>,
+ <196608001>,
+ <(196608002 / 2)>,
+ <196608000>;
+
+ cpu {
+ sound-dai = <&i2s0 0>;
+ };
+
+ codec {
+ sound-dai = <&hdmi>;
+ };
+ };
+};
+
+&clock_audss {
+ assigned-clocks = <&clock_audss EXYNOS_DOUT_SRP>,
+ <&clock CLK_FOUT_EPLL>;
+ assigned-clock-rates = <(196608000 / 256)>,
+ <196608000>;
+};
+
+&i2s0 {
+ status = "okay";
};
&pwm {
diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi
index 9c3c75ae5e48..3acf3f2d643e 100644
--- a/arch/arm/boot/dts/exynos5440.dtsi
+++ b/arch/arm/boot/dts/exynos5440.dtsi
@@ -35,7 +35,7 @@
#clock-cells = <1>;
};
- gic: interrupt-controller@2E0000 {
+ gic: interrupt-controller@2e0000 {
compatible = "arm,cortex-a15-gic";
#interrupt-cells = <3>;
interrupt-controller;
@@ -108,7 +108,7 @@
>;
};
- serial_0: serial@B0000 {
+ serial_0: serial@b0000 {
compatible = "samsung,exynos4210-uart";
reg = <0xB0000 0x1000>;
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
@@ -116,7 +116,7 @@
clock-names = "uart", "clk_uart_baud0";
};
- serial_1: serial@C0000 {
+ serial_1: serial@c0000 {
compatible = "samsung,exynos4210-uart";
reg = <0xC0000 0x1000>;
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
@@ -124,7 +124,7 @@
clock-names = "uart", "clk_uart_baud0";
};
- spi_0: spi@D0000 {
+ spi_0: spi@d0000 {
compatible = "samsung,exynos5440-spi";
reg = <0xD0000 0x100>;
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
@@ -136,7 +136,7 @@
clock-names = "spi", "spi_busclk0";
};
- pin_ctrl: pinctrl@E0000 {
+ pin_ctrl: pinctrl@e0000 {
compatible = "samsung,exynos5440-pinctrl";
reg = <0xE0000 0x1000>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
@@ -168,7 +168,7 @@
};
};
- i2c@F0000 {
+ i2c@f0000 {
compatible = "samsung,exynos5440-i2c";
reg = <0xF0000 0x1000>;
interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
@@ -233,7 +233,7 @@
#include "exynos5440-tmu-sensor-conf.dtsi"
};
- tmuctrl_1: tmuctrl@16011C {
+ tmuctrl_1: tmuctrl@16011c {
compatible = "samsung,exynos5440-tmu";
reg = <0x16011C 0x230>, <0x160368 0x10>;
interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/boot/dts/exynos54xx.dtsi b/arch/arm/boot/dts/exynos54xx.dtsi
index a5007f182bc4..8f87ab1dd9e3 100644
--- a/arch/arm/boot/dts/exynos54xx.dtsi
+++ b/arch/arm/boot/dts/exynos54xx.dtsi
@@ -29,6 +29,26 @@
};
soc: soc {
+ arm_a7_pmu: arm-a7-pmu {
+ compatible = "arm,cortex-a7-pmu";
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+ arm_a15_pmu: arm-a15-pmu {
+ compatible = "arm,cortex-a15-pmu";
+ interrupt-parent = <&combiner>;
+ interrupts = <1 2>,
+ <7 0>,
+ <16 6>,
+ <19 2>;
+ status = "disabled";
+ };
+
sysram@2020000 {
compatible = "mmio-sram";
reg = <0x02020000 0x54000>;
@@ -79,12 +99,6 @@
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
};
- sss: sss@10830000 {
- compatible = "samsung,exynos4210-secss";
- reg = <0x10830000 0x300>;
- interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
- };
-
/* i2c_0-3 are defined in exynos5.dtsi */
hsi2c_4: i2c@12ca0000 {
compatible = "samsung,exynos5250-hsi2c";
generated by cgit v1.2.3 (git 2.39.0) at 2025-02-02 12:15:05 +0300