diff options
Diffstat (limited to 'arch/powerpc/boot/dts')
21 files changed, 2329 insertions, 788 deletions
diff --git a/arch/powerpc/boot/dts/kuroboxHD.dts b/arch/powerpc/boot/dts/kuroboxHD.dts new file mode 100644 index 000000000000..b89791802e86 --- /dev/null +++ b/arch/powerpc/boot/dts/kuroboxHD.dts @@ -0,0 +1,147 @@ +/* + * Device Tree Souce for Buffalo KuroboxHD + * + * Choose CONFIG_LINKSTATION to build a kernel for KuroboxHD, or use + * the default configuration linkstation_defconfig. + * + * Based on sandpoint.dts + * + * 2006 (c) G. Liakhovetski <g.liakhovetski@gmx.de> + * + * This file is licensed under + * the terms of the GNU General Public License version 2. This program + * is licensed "as is" without any warranty of any kind, whether express + * or implied. + +XXXX add flash parts, rtc, ?? + +build with: "dtc -f -I dts -O dtb -o kuroboxHD.dtb -V 16 kuroboxHD.dts" + + + */ + +/ { + linux,phandle = <1000>; + model = "KuroboxHD"; + compatible = "linkstation"; + #address-cells = <1>; + #size-cells = <1>; + + cpus { + linux,phandle = <2000>; + #cpus = <1>; + #address-cells = <1>; + #size-cells = <0>; + + PowerPC,603e { /* Really 8241 */ + linux,phandle = <2100>; + device_type = "cpu"; + reg = <0>; + clock-frequency = <bebc200>; /* Fixed by bootwrapper */ + timebase-frequency = <1743000>; /* Fixed by bootwrapper */ + bus-frequency = <0>; /* From bootloader */ + /* Following required by dtc but not used */ + i-cache-line-size = <0>; + d-cache-line-size = <0>; + i-cache-size = <4000>; + d-cache-size = <4000>; + }; + }; + + memory { + linux,phandle = <3000>; + device_type = "memory"; + reg = <00000000 04000000>; + }; + + soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */ + linux,phandle = <4000>; + #address-cells = <1>; + #size-cells = <1>; + #interrupt-cells = <2>; + device_type = "soc"; + compatible = "mpc10x"; + store-gathering = <0>; /* 0 == off, !0 == on */ + reg = <80000000 00100000>; + ranges = <80000000 80000000 70000000 /* pci mem space */ + fc000000 fc000000 00100000 /* EUMB */ + fe000000 fe000000 00c00000 /* pci i/o space */ + fec00000 fec00000 00300000 /* pci cfg regs */ + fef00000 fef00000 00100000>; /* pci iack */ + + i2c@80003000 { + linux,phandle = <4300>; + device_type = "i2c"; + compatible = "fsl-i2c"; + reg = <80003000 1000>; + interrupts = <5 2>; + interrupt-parent = <4400>; + }; + + serial@80004500 { + linux,phandle = <4511>; + device_type = "serial"; + compatible = "ns16550"; + reg = <80004500 8>; + clock-frequency = <5d08d88>; + current-speed = <2580>; + interrupts = <9 2>; + interrupt-parent = <4400>; + }; + + serial@80004600 { + linux,phandle = <4512>; + device_type = "serial"; + compatible = "ns16550"; + reg = <80004600 8>; + clock-frequency = <5d08d88>; + current-speed = <e100>; + interrupts = <a 0>; + interrupt-parent = <4400>; + }; + + pic@80040000 { + linux,phandle = <4400>; + #interrupt-cells = <2>; + #address-cells = <0>; + device_type = "open-pic"; + compatible = "chrp,open-pic"; + interrupt-controller; + reg = <80040000 40000>; + built-in; + }; + + pci@fec00000 { + linux,phandle = <4500>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + device_type = "pci"; + compatible = "mpc10x-pci"; + reg = <fec00000 400000>; + ranges = <01000000 0 0 fe000000 0 00c00000 + 02000000 0 80000000 80000000 0 70000000>; + bus-range = <0 ff>; + clock-frequency = <7f28155>; + interrupt-parent = <4400>; + interrupt-map-mask = <f800 0 0 7>; + interrupt-map = < + /* IDSEL 0x11 - IRQ0 ETH */ + 5800 0 0 1 4400 0 1 + 5800 0 0 2 4400 1 1 + 5800 0 0 3 4400 2 1 + 5800 0 0 4 4400 3 1 + /* IDSEL 0x12 - IRQ1 IDE0 */ + 6000 0 0 1 4400 1 1 + 6000 0 0 2 4400 2 1 + 6000 0 0 3 4400 3 1 + 6000 0 0 4 4400 0 1 + /* IDSEL 0x14 - IRQ3 USB2.0 */ + 7000 0 0 1 4400 3 1 + 7000 0 0 2 4400 3 1 + 7000 0 0 3 4400 3 1 + 7000 0 0 4 4400 3 1 + >; + }; + }; +}; diff --git a/arch/powerpc/boot/dts/kuroboxHG.dts b/arch/powerpc/boot/dts/kuroboxHG.dts index d06b0b018899..753102752d8b 100644 --- a/arch/powerpc/boot/dts/kuroboxHG.dts +++ b/arch/powerpc/boot/dts/kuroboxHG.dts @@ -35,7 +35,6 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHG.dtb -V 16 kuroboxHG.dts" PowerPC,603e { /* Really 8241 */ linux,phandle = <2100>; - linux,boot-cpu; device_type = "cpu"; reg = <0>; clock-frequency = <fdad680>; /* Fixed by bootwrapper */ diff --git a/arch/powerpc/boot/dts/lite5200.dts b/arch/powerpc/boot/dts/lite5200.dts index 186870704ad9..c03103c63285 100644 --- a/arch/powerpc/boot/dts/lite5200.dts +++ b/arch/powerpc/boot/dts/lite5200.dts @@ -1,7 +1,7 @@ /* * Lite5200 board Device Tree Source * - * Copyright 2006 Secret Lab Technologies Ltd. + * Copyright 2006-2007 Secret Lab Technologies Ltd. * Grant Likely <grant.likely@secretlab.ca> * * This program is free software; you can redistribute it and/or modify it @@ -17,8 +17,9 @@ */ / { - model = "Lite5200"; - compatible = "lite5200\0lite52xx\0mpc5200\0mpc52xx"; + model = "fsl,lite5200"; + // revision = "1.0"; + compatible = "fsl,lite5200\0generic-mpc5200"; #address-cells = <1>; #size-cells = <1>; @@ -47,14 +48,17 @@ }; soc5200@f0000000 { + model = "fsl,mpc5200"; + revision = "" // from bootloader #interrupt-cells = <3>; device_type = "soc"; ranges = <0 f0000000 f0010000>; reg = <f0000000 00010000>; bus-frequency = <0>; // from bootloader + system-frequency = <0>; // from bootloader cdm@200 { - compatible = "mpc5200-cdm\0mpc52xx-cdm"; + compatible = "mpc5200-cdm"; reg = <200 38>; }; @@ -64,77 +68,86 @@ interrupt-controller; #interrupt-cells = <3>; device_type = "interrupt-controller"; - compatible = "mpc5200-pic\0mpc52xx-pic"; + compatible = "mpc5200-pic"; reg = <500 80>; built-in; }; gpt@600 { // General Purpose Timer - compatible = "mpc5200-gpt\0mpc52xx-gpt"; + compatible = "mpc5200-gpt"; device_type = "gpt"; + cell-index = <0>; reg = <600 10>; interrupts = <1 9 0>; interrupt-parent = <500>; + has-wdt; }; gpt@610 { // General Purpose Timer - compatible = "mpc5200-gpt\0mpc52xx-gpt"; + compatible = "mpc5200-gpt"; device_type = "gpt"; + cell-index = <1>; reg = <610 10>; interrupts = <1 a 0>; interrupt-parent = <500>; }; gpt@620 { // General Purpose Timer - compatible = "mpc5200-gpt\0mpc52xx-gpt"; + compatible = "mpc5200-gpt"; device_type = "gpt"; + cell-index = <2>; reg = <620 10>; interrupts = <1 b 0>; interrupt-parent = <500>; }; gpt@630 { // General Purpose Timer - compatible = "mpc5200-gpt\0mpc52xx-gpt"; + compatible = "mpc5200-gpt"; device_type = "gpt"; + cell-index = <3>; reg = <630 10>; interrupts = <1 c 0>; interrupt-parent = <500>; }; gpt@640 { // General Purpose Timer - compatible = "mpc5200-gpt\0mpc52xx-gpt"; + compatible = "mpc5200-gpt"; device_type = "gpt"; + cell-index = <4>; reg = <640 10>; interrupts = <1 d 0>; interrupt-parent = <500>; }; gpt@650 { // General Purpose Timer - compatible = "mpc5200-gpt\0mpc52xx-gpt"; + compatible = "mpc5200-gpt"; device_type = "gpt"; + cell-index = <5>; reg = <650 10>; interrupts = <1 e 0>; interrupt-parent = <500>; }; gpt@660 { // General Purpose Timer - compatible = "mpc5200-gpt\0mpc52xx-gpt"; + compatible = "mpc5200-gpt"; device_type = "gpt"; + cell-index = <6>; reg = <660 10>; interrupts = <1 f 0>; interrupt-parent = <500>; }; gpt@670 { // General Purpose Timer - compatible = "mpc5200-gpt\0mpc52xx-gpt"; + compatible = "mpc5200-gpt"; device_type = "gpt"; + cell-index = <7>; reg = <670 10>; interrupts = <1 10 0>; interrupt-parent = <500>; }; rtc@800 { // Real time clock - compatible = "mpc5200-rtc\0mpc52xx-rtc"; + compatible = "mpc5200-rtc"; device_type = "rtc"; reg = <800 100>; interrupts = <1 5 0 1 6 0>; @@ -143,7 +156,8 @@ mscan@900 { device_type = "mscan"; - compatible = "mpc5200-mscan\0mpc52xx-mscan"; + compatible = "mpc5200-mscan"; + cell-index = <0>; interrupts = <2 11 0>; interrupt-parent = <500>; reg = <900 80>; @@ -151,21 +165,22 @@ mscan@980 { device_type = "mscan"; - compatible = "mpc5200-mscan\0mpc52xx-mscan"; + compatible = "mpc5200-mscan"; + cell-index = <1>; interrupts = <1 12 0>; interrupt-parent = <500>; reg = <980 80>; }; gpio@b00 { - compatible = "mpc5200-gpio\0mpc52xx-gpio"; + compatible = "mpc5200-gpio"; reg = <b00 40>; interrupts = <1 7 0>; interrupt-parent = <500>; }; gpio-wkup@b00 { - compatible = "mpc5200-gpio-wkup\0mpc52xx-gpio-wkup"; + compatible = "mpc5200-gpio-wkup"; reg = <c00 40>; interrupts = <1 8 0 0 3 0>; interrupt-parent = <500>; @@ -176,7 +191,7 @@ #size-cells = <2>; #address-cells = <3>; device_type = "pci"; - compatible = "mpc5200-pci\0mpc52xx-pci"; + compatible = "mpc5200-pci"; reg = <d00 100>; interrupt-map-mask = <f800 0 0 7>; interrupt-map = <c000 0 0 1 500 0 0 3 @@ -194,7 +209,7 @@ spi@f00 { device_type = "spi"; - compatible = "mpc5200-spi\0mpc52xx-spi"; + compatible = "mpc5200-spi"; reg = <f00 20>; interrupts = <2 d 0 2 e 0>; interrupt-parent = <500>; @@ -202,7 +217,7 @@ usb@1000 { device_type = "usb-ohci-be"; - compatible = "mpc5200-ohci\0mpc52xx-ohci\0ohci-be"; + compatible = "mpc5200-ohci\0ohci-be"; reg = <1000 ff>; interrupts = <2 6 0>; interrupt-parent = <500>; @@ -210,7 +225,7 @@ bestcomm@1200 { device_type = "dma-controller"; - compatible = "mpc5200-bestcomm\0mpc52xx-bestcomm"; + compatible = "mpc5200-bestcomm"; reg = <1200 80>; interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 3 4 0 3 5 0 3 6 0 3 7 0 @@ -220,67 +235,73 @@ }; xlb@1f00 { - compatible = "mpc5200-xlb\0mpc52xx-xlb"; + compatible = "mpc5200-xlb"; reg = <1f00 100>; }; serial@2000 { // PSC1 device_type = "serial"; - compatible = "mpc5200-psc-uart\0mpc52xx-psc-uart"; + compatible = "mpc5200-psc-uart"; port-number = <0>; // Logical port assignment + cell-index = <0>; reg = <2000 100>; interrupts = <2 1 0>; interrupt-parent = <500>; }; - // PSC2 in spi mode example - spi@2200 { // PSC2 - device_type = "spi"; - compatible = "mpc5200-psc-spi\0mpc52xx-psc-spi"; - reg = <2200 100>; - interrupts = <2 2 0>; - interrupt-parent = <500>; - }; + // PSC2 in ac97 mode example + //ac97@2200 { // PSC2 + // device_type = "sound"; + // compatible = "mpc5200-psc-ac97"; + // cell-index = <1>; + // reg = <2200 100>; + // interrupts = <2 2 0>; + // interrupt-parent = <500>; + //}; // PSC3 in CODEC mode example - i2s@2400 { // PSC3 - device_type = "sound"; - compatible = "mpc5200-psc-i2s\0mpc52xx-psc-i2s"; - reg = <2400 100>; - interrupts = <2 3 0>; - interrupt-parent = <500>; - }; + //i2s@2400 { // PSC3 + // device_type = "sound"; + // compatible = "mpc5200-psc-i2s"; + // cell-index = <2>; + // reg = <2400 100>; + // interrupts = <2 3 0>; + // interrupt-parent = <500>; + //}; - // PSC4 unconfigured + // PSC4 in uart mode example //serial@2600 { // PSC4 // device_type = "serial"; - // compatible = "mpc5200-psc-uart\0mpc52xx-psc-uart"; + // compatible = "mpc5200-psc-uart"; + // cell-index = <3>; // reg = <2600 100>; // interrupts = <2 b 0>; // interrupt-parent = <500>; //}; - // PSC5 unconfigured + // PSC5 in uart mode example //serial@2800 { // PSC5 // device_type = "serial"; - // compatible = "mpc5200-psc-uart\0mpc52xx-psc-uart"; + // compatible = "mpc5200-psc-uart"; + // cell-index = <4>; // reg = <2800 100>; // interrupts = <2 c 0>; // interrupt-parent = <500>; //}; - // PSC6 in AC97 mode example - ac97@2c00 { // PSC6 - device_type = "sound"; - compatible = "mpc5200-psc-ac97\0mpc52xx-psc-ac97"; - reg = <2c00 100>; - interrupts = <2 4 0>; - interrupt-parent = <500>; - }; + // PSC6 in spi mode example + //spi@2c00 { // PSC6 + // device_type = "spi"; + // compatible = "mpc5200-psc-spi"; + // cell-index = <5>; + // reg = <2c00 100>; + // interrupts = <2 4 0>; + // interrupt-parent = <500>; + //}; ethernet@3000 { device_type = "network"; - compatible = "mpc5200-fec\0mpc52xx-fec"; + compatible = "mpc5200-fec"; reg = <3000 800>; mac-address = [ 02 03 04 05 06 07 ]; // Bad! interrupts = <2 5 0>; @@ -289,7 +310,7 @@ ata@3a00 { device_type = "ata"; - compatible = "mpc5200-ata\0mpc52xx-ata"; + compatible = "mpc5200-ata"; reg = <3a00 100>; interrupts = <2 7 0>; interrupt-parent = <500>; @@ -297,7 +318,8 @@ i2c@3d00 { device_type = "i2c"; - compatible = "mpc5200-i2c\0mpc52xx-i2c"; + compatible = "mpc5200-i2c"; + cell-index = <0>; reg = <3d00 40>; interrupts = <2 f 0>; interrupt-parent = <500>; @@ -305,14 +327,15 @@ i2c@3d40 { device_type = "i2c"; - compatible = "mpc5200-i2c\0mpc52xx-i2c"; + compatible = "mpc5200-i2c"; + cell-index = <1>; reg = <3d40 40>; interrupts = <2 10 0>; interrupt-parent = <500>; }; sram@8000 { device_type = "sram"; - compatible = "mpc5200-sram\0mpc52xx-sram\0sram"; + compatible = "mpc5200-sram\0sram"; reg = <8000 4000>; }; }; diff --git a/arch/powerpc/boot/dts/lite5200b.dts b/arch/powerpc/boot/dts/lite5200b.dts index 5bb2760d7c30..3875ca9a9a62 100644 --- a/arch/powerpc/boot/dts/lite5200b.dts +++ b/arch/powerpc/boot/dts/lite5200b.dts @@ -1,7 +1,7 @@ /* * Lite5200B board Device Tree Source * - * Copyright 2006 Secret Lab Technologies Ltd. + * Copyright 2006-2007 Secret Lab Technologies Ltd. * Grant Likely <grant.likely@secretlab.ca> * * This program is free software; you can redistribute it and/or modify it @@ -17,8 +17,9 @@ */ / { - model = "Lite5200b"; - compatible = "lite5200b\0lite52xx\0mpc5200b\0mpc52xx"; + model = "fsl,lite5200b"; + // revision = "1.0"; + compatible = "fsl,lite5200b\0generic-mpc5200"; #address-cells = <1>; #size-cells = <1>; @@ -47,14 +48,17 @@ }; soc5200@f0000000 { + model = "fsl,mpc5200b"; + revision = ""; // from bootloader #interrupt-cells = <3>; device_type = "soc"; ranges = <0 f0000000 f0010000>; reg = <f0000000 00010000>; bus-frequency = <0>; // from bootloader + system-frequency = <0>; // from bootloader cdm@200 { - compatible = "mpc5200b-cdm\0mpc52xx-cdm"; + compatible = "mpc5200b-cdm\0mpc5200-cdm"; reg = <200 38>; }; @@ -64,77 +68,86 @@ interrupt-controller; #interrupt-cells = <3>; device_type = "interrupt-controller"; - compatible = "mpc5200b-pic\0mpc52xx-pic"; + compatible = "mpc5200b-pic\0mpc5200-pic"; reg = <500 80>; built-in; }; gpt@600 { // General Purpose Timer - compatible = "mpc5200b-gpt\0mpc52xx-gpt"; + compatible = "mpc5200b-gpt\0mpc5200-gpt"; device_type = "gpt"; + cell-index = <0>; reg = <600 10>; interrupts = <1 9 0>; interrupt-parent = <500>; + has-wdt; }; gpt@610 { // General Purpose Timer - compatible = "mpc5200b-gpt\0mpc52xx-gpt"; + compatible = "mpc5200b-gpt\0mpc5200-gpt"; device_type = "gpt"; + cell-index = <1>; reg = <610 10>; interrupts = <1 a 0>; interrupt-parent = <500>; }; gpt@620 { // General Purpose Timer - compatible = "mpc5200b-gpt\0mpc52xx-gpt"; + compatible = "mpc5200b-gpt\0mpc5200-gpt"; device_type = "gpt"; + cell-index = <2>; reg = <620 10>; interrupts = <1 b 0>; interrupt-parent = <500>; }; gpt@630 { // General Purpose Timer - compatible = "mpc5200b-gpt\0mpc52xx-gpt"; + compatible = "mpc5200b-gpt\0mpc5200-gpt"; device_type = "gpt"; + cell-index = <3>; reg = <630 10>; interrupts = <1 c 0>; interrupt-parent = <500>; }; gpt@640 { // General Purpose Timer - compatible = "mpc5200b-gpt\0mpc52xx-gpt"; + compatible = "mpc5200b-gpt\0mpc5200-gpt"; device_type = "gpt"; + cell-index = <4>; reg = <640 10>; interrupts = <1 d 0>; interrupt-parent = <500>; }; gpt@650 { // General Purpose Timer - compatible = "mpc5200b-gpt\0mpc52xx-gpt"; + compatible = "mpc5200b-gpt\0mpc5200-gpt"; device_type = "gpt"; + cell-index = <5>; reg = <650 10>; interrupts = <1 e 0>; interrupt-parent = <500>; }; gpt@660 { // General Purpose Timer - compatible = "mpc5200b-gpt\0mpc52xx-gpt"; + compatible = "mpc5200b-gpt\0mpc5200-gpt"; device_type = "gpt"; + cell-index = <6>; reg = <660 10>; interrupts = <1 f 0>; interrupt-parent = <500>; }; gpt@670 { // General Purpose Timer - compatible = "mpc5200b-gpt\0mpc52xx-gpt"; + compatible = "mpc5200b-gpt\0mpc5200-gpt"; device_type = "gpt"; + cell-index = <7>; reg = <670 10>; interrupts = <1 10 0>; interrupt-parent = <500>; }; rtc@800 { // Real time clock - compatible = "mpc5200b-rtc\0mpc52xx-rtc"; + compatible = "mpc5200b-rtc\0mpc5200-rtc"; device_type = "rtc"; reg = <800 100>; interrupts = <1 5 0 1 6 0>; @@ -143,7 +156,8 @@ mscan@900 { device_type = "mscan"; - compatible = "mpc5200b-mscan\0mpc52xx-mscan"; + compatible = "mpc5200b-mscan\0mpc5200-mscan"; + cell-index = <0>; interrupts = <2 11 0>; interrupt-parent = <500>; reg = <900 80>; @@ -151,21 +165,22 @@ mscan@980 { device_type = "mscan"; - compatible = "mpc5200b-mscan\0mpc52xx-mscan"; + compatible = "mpc5200b-mscan\0mpc5200-mscan"; + cell-index = <1>; interrupts = <1 12 0>; interrupt-parent = <500>; reg = <980 80>; }; gpio@b00 { - compatible = "mpc5200b-gpio\0mpc52xx-gpio"; + compatible = "mpc5200b-gpio\0mpc5200-gpio"; reg = <b00 40>; interrupts = <1 7 0>; interrupt-parent = <500>; }; gpio-wkup@b00 { - compatible = "mpc5200b-gpio-wkup\0mpc52xx-gpio-wkup"; + compatible = "mpc5200b-gpio-wkup\0mpc5200-gpio-wkup"; reg = <c00 40>; interrupts = <1 8 0 0 3 0>; interrupt-parent = <500>; @@ -176,7 +191,7 @@ #size-cells = <2>; #address-cells = <3>; device_type = "pci"; - compatible = "mpc5200b-pci\0mpc52xx-pci"; + compatible = "mpc5200b-pci\0mpc5200-pci"; reg = <d00 100>; interrupt-map-mask = <f800 0 0 7>; interrupt-map = <c000 0 0 1 500 0 0 3 // 1st slot @@ -199,7 +214,7 @@ spi@f00 { device_type = "spi"; - compatible = "mpc5200b-spi\0mpc52xx-spi"; + compatible = "mpc5200b-spi\0mpc5200-spi"; reg = <f00 20>; interrupts = <2 d 0 2 e 0>; interrupt-parent = <500>; @@ -207,7 +222,7 @@ usb@1000 { device_type = "usb-ohci-be"; - compatible = "mpc5200b-ohci\0mpc52xx-ohci\0ohci-be"; + compatible = "mpc5200b-ohci\0mpc5200-ohci\0ohci-be"; reg = <1000 ff>; interrupts = <2 6 0>; interrupt-parent = <500>; @@ -215,7 +230,7 @@ bestcomm@1200 { device_type = "dma-controller"; - compatible = "mpc5200b-bestcomm\0mpc52xx-bestcomm"; + compatible = "mpc5200b-bestcomm\0mpc5200-bestcomm"; reg = <1200 80>; interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 3 4 0 3 5 0 3 6 0 3 7 0 @@ -225,67 +240,73 @@ }; xlb@1f00 { - compatible = "mpc5200b-xlb\0mpc52xx-xlb"; + compatible = "mpc5200b-xlb\0mpc5200-xlb"; reg = <1f00 100>; }; serial@2000 { // PSC1 device_type = "serial"; - compatible = "mpc5200b-psc-uart\0mpc52xx-psc-uart"; + compatible = "mpc5200b-psc-uart\0mpc5200-psc-uart"; port-number = <0>; // Logical port assignment + cell-index = <0>; reg = <2000 100>; interrupts = <2 1 0>; interrupt-parent = <500>; }; - // PSC2 in spi mode example - spi@2200 { // PSC2 - device_type = "spi"; - compatible = "mpc5200b-psc-spi\0mpc52xx-psc-spi"; - reg = <2200 100>; - interrupts = <2 2 0>; - interrupt-parent = <500>; - }; + // PSC2 in ac97 mode example + //ac97@2200 { // PSC2 + // device_type = "sound"; + // compatible = "mpc5200b-psc-ac97\0mpc5200-psc-ac97"; + // cell-index = <1>; + // reg = <2200 100>; + // interrupts = <2 2 0>; + // interrupt-parent = <500>; + //}; // PSC3 in CODEC mode example - i2s@2400 { // PSC3 - device_type = "sound"; - compatible = "mpc5200b-psc-i2s\0mpc52xx-psc-i2s"; - reg = <2400 100>; - interrupts = <2 3 0>; - interrupt-parent = <500>; - }; + //i2s@2400 { // PSC3 + // device_type = "sound"; + // compatible = "mpc5200b-psc-i2s"; //not 5200 compatible + // cell-index = <2>; + // reg = <2400 100>; + // interrupts = <2 3 0>; + // interrupt-parent = <500>; + //}; - // PSC4 unconfigured + // PSC4 in uart mode example //serial@2600 { // PSC4 // device_type = "serial"; - // compatible = "mpc5200b-psc-uart\0mpc52xx-psc-uart"; + // compatible = "mpc5200b-psc-uart\0mpc5200-psc-uart"; + // cell-index = <3>; // reg = <2600 100>; // interrupts = <2 b 0>; // interrupt-parent = <500>; //}; - // PSC5 unconfigured + // PSC5 in uart mode example //serial@2800 { // PSC5 // device_type = "serial"; - // compatible = "mpc5200b-psc-uart\0mpc52xx-psc-uart"; + // compatible = "mpc5200b-psc-uart\0mpc5200-psc-uart"; + // cell-index = <4>; // reg = <2800 100>; // interrupts = <2 c 0>; // interrupt-parent = <500>; //}; - // PSC6 in AC97 mode example - ac97@2c00 { // PSC6 - device_type = "sound"; - compatible = "mpc5200b-psc-ac97\0mpc52xx-psc-ac97"; - reg = <2c00 100>; - interrupts = <2 4 0>; - interrupt-parent = <500>; - }; + // PSC6 in spi mode example + //spi@2c00 { // PSC6 + // device_type = "spi"; + // compatible = "mpc5200b-psc-spi\0mpc5200-psc-spi"; + // cell-index = <5>; + // reg = <2c00 100>; + // interrupts = <2 4 0>; + // interrupt-parent = <500>; + //}; ethernet@3000 { device_type = "network"; - compatible = "mpc5200b-fec\0mpc52xx-fec"; + compatible = "mpc5200b-fec\0mpc5200-fec"; reg = <3000 800>; mac-address = [ 02 03 04 05 06 07 ]; // Bad! interrupts = <2 5 0>; @@ -294,7 +315,7 @@ ata@3a00 { device_type = "ata"; - compatible = "mpc5200b-ata\0mpc52xx-ata"; + compatible = "mpc5200b-ata\0mpc5200-ata"; reg = <3a00 100>; interrupts = <2 7 0>; interrupt-parent = <500>; @@ -302,7 +323,8 @@ i2c@3d00 { device_type = "i2c"; - compatible = "mpc5200b-i2c\0mpc52xx-i2c"; + compatible = "mpc5200b-i2c\0mpc5200-i2c"; + cell-index = <0>; reg = <3d00 40>; interrupts = <2 f 0>; interrupt-parent = <500>; @@ -310,14 +332,15 @@ i2c@3d40 { device_type = "i2c"; - compatible = "mpc5200b-i2c\0mpc52xx-i2c"; + compatible = "mpc5200b-i2c\0mpc5200-i2c"; + cell-index = <1>; reg = <3d40 40>; interrupts = <2 10 0>; interrupt-parent = <500>; }; sram@8000 { device_type = "sram"; - compatible = "mpc5200b-sram\0mpc52xx-sram\0sram"; + compatible = "mpc5200b-sram\0mpc5200-sram\0sram"; reg = <8000 4000>; }; }; diff --git a/arch/powerpc/boot/dts/mpc7448hpc2.dts b/arch/powerpc/boot/dts/mpc7448hpc2.dts index c4d9562cbaad..41d0720c5900 100644 --- a/arch/powerpc/boot/dts/mpc7448hpc2.dts +++ b/arch/powerpc/boot/dts/mpc7448hpc2.dts @@ -36,7 +36,6 @@ bus-frequency = <0>; // From U-Boot 32-bit; linux,phandle = <201>; - linux,boot-cpu; }; }; diff --git a/arch/powerpc/boot/dts/mpc8272ads.dts b/arch/powerpc/boot/dts/mpc8272ads.dts index 34efdd028c4f..260b2e447779 100644 --- a/arch/powerpc/boot/dts/mpc8272ads.dts +++ b/arch/powerpc/boot/dts/mpc8272ads.dts @@ -34,7 +34,6 @@ clock-frequency = <0>; 32-bit; linux,phandle = <201>; - linux,boot-cpu; }; }; @@ -53,13 +52,20 @@ reg = <00000000 4000000 f4500000 00000020>; }; + chosen { + name = "chosen"; + linux,platform = <0>; + interrupt-controller = <10c00>; + linux,phandle = <400>; + }; + soc8272@f0000000 { #address-cells = <1>; #size-cells = <1>; #interrupt-cells = <2>; device_type = "soc"; - ranges = < 0 0 2 00000000 f0000000 00053000>; - reg = <f0000000 0>; + ranges = <00000000 f0000000 00053000>; + reg = <f0000000 10000>; mdio@0 { device_type = "mdio"; @@ -71,7 +77,7 @@ ethernet-phy@0 { linux,phandle = <2452000>; interrupt-parent = <10c00>; - interrupts = <19 1>; + interrupts = <17 4>; reg = <0>; bitbang = [ 12 12 13 02 02 01 ]; device_type = "ethernet-phy"; @@ -79,7 +85,7 @@ ethernet-phy@1 { linux,phandle = <2452001>; interrupt-parent = <10c00>; - interrupts = <19 1>; + interrupts = <17 4>; bitbang = [ 12 12 13 02 02 01 ]; reg = <3>; device_type = "ethernet-phy"; @@ -90,7 +96,7 @@ #address-cells = <1>; #size-cells = <0>; device_type = "network"; - device-id = <2>; + device-id = <1>; compatible = "fs_enet"; model = "FCC"; reg = <11300 20 8400 100 11380 30>; @@ -104,7 +110,7 @@ ethernet@25000 { device_type = "network"; - device-id = <3>; + device-id = <2>; compatible = "fs_enet"; model = "FCC"; reg = <11320 20 8500 100 113b0 30>; @@ -123,8 +129,8 @@ #interrupt-cells = <2>; device_type = "cpm"; model = "CPM2"; - ranges = <00000000 00000000 3ffff>; - reg = <10d80 3280>; + ranges = <00000000 00000000 20000>; + reg = <0 20000>; command-proc = <119c0>; brg-frequency = <17D7840>; cpm_clk = <BEBC200>; @@ -133,7 +139,7 @@ device_type = "serial"; compatible = "cpm_uart"; model = "SCC"; - device-id = <2>; + device-id = <1>; reg = <11a00 20 8000 100>; current-speed = <1c200>; interrupts = <28 2>; @@ -147,7 +153,7 @@ device_type = "serial"; compatible = "cpm_uart"; model = "SCC"; - device-id = <5>; + device-id = <4>; reg = <11a60 20 8300 100>; current-speed = <1c200>; interrupts = <2b 2>; @@ -181,24 +187,24 @@ interrupt-map = < /* IDSEL 0x16 */ - b000 0 0 1 f8200000 40 0 - b000 0 0 2 f8200000 41 0 - b000 0 0 3 f8200000 42 0 - b000 0 0 4 f8200000 43 0 + b000 0 0 1 f8200000 40 8 + b000 0 0 2 f8200000 41 8 + b000 0 0 3 f8200000 42 8 + b000 0 0 4 f8200000 43 8 /* IDSEL 0x17 */ - b800 0 0 1 f8200000 43 0 - b800 0 0 2 f8200000 40 0 - b800 0 0 3 f8200000 41 0 - b800 0 0 4 f8200000 42 0 + b800 0 0 1 f8200000 43 8 + b800 0 0 2 f8200000 40 8 + b800 0 0 3 f8200000 41 8 + b800 0 0 4 f8200000 42 8 /* IDSEL 0x18 */ - c000 0 0 1 f8200000 42 0 - c000 0 0 2 f8200000 43 0 - c000 0 0 3 f8200000 40 0 - c000 0 0 4 f8200000 41 0>; + c000 0 0 1 f8200000 42 8 + c000 0 0 2 f8200000 43 8 + c000 0 0 3 f8200000 40 8 + c000 0 0 4 f8200000 41 8>; interrupt-parent = <10c00>; - interrupts = <14 3>; + interrupts = <14 8>; bus-range = <0 0>; ranges = <02000000 0 80000000 80000000 0 40000000 01000000 0 00000000 f6000000 0 02000000>; @@ -210,7 +216,7 @@ model = "SEC2"; compatible = "talitos"; reg = <30000 10000>; - interrupts = <b 0>; + interrupts = <b 2>; interrupt-parent = <10c00>; num-channels = <4>; channel-fifo-len = <18>; diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts b/arch/powerpc/boot/dts/mpc8313erdb.dts new file mode 100644 index 000000000000..6d721900d00e --- /dev/null +++ b/arch/powerpc/boot/dts/mpc8313erdb.dts @@ -0,0 +1,215 @@ +/* + * MPC8313E RDB Device Tree Source + * + * Copyright 2005, 2006, 2007 Freescale Semiconductor Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +/ { + model = "MPC8313ERDB"; + compatible = "MPC8313ERDB", "MPC831xRDB", "MPC83xxRDB"; + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #cpus = <1>; + #address-cells = <1>; + #size-cells = <0>; + + PowerPC,8313@0 { + device_type = "cpu"; + reg = <0>; + d-cache-line-size = <20>; // 32 bytes + i-cache-line-size = <20>; // 32 bytes + d-cache-size = <4000>; // L1, 16K + i-cache-size = <4000>; // L1, 16K + timebase-frequency = <0>; // from bootloader + bus-frequency = <0>; // from bootloader + clock-frequency = <0>; // from bootloader + 32-bit; + }; + }; + + memory { + device_type = "memory"; + reg = <00000000 08000000>; // 128MB at 0 + }; + + soc8313@e0000000 { + #address-cells = <1>; + #size-cells = <1>; + #interrupt-cells = <2>; + device_type = "soc"; + ranges = <0 e0000000 00100000>; + reg = <e0000000 00000200>; + bus-frequency = <0>; + + wdt@200 { + device_type = "watchdog"; + compatible = "mpc83xx_wdt"; + reg = <200 100>; + }; + + i2c@3000 { + device_type = "i2c"; + compatible = "fsl-i2c"; + reg = <3000 100>; + interrupts = <e 8>; + interrupt-parent = < &ipic >; + dfsrr; + }; + + i2c@3100 { + device_type = "i2c"; + compatible = "fsl-i2c"; + reg = <3100 100>; + interrupts = <f 8>; + interrupt-parent = < &ipic >; + dfsrr; + }; + + spi@7000 { + device_type = "spi"; + compatible = "mpc83xx_spi"; + reg = <7000 1000>; + interrupts = <10 8>; + interrupt-parent = < &ipic >; + mode = <0>; + }; + + /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ + usb@23000 { + device_type = "usb"; + compatible = "fsl-usb2-dr"; + reg = <23000 1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupt-parent = < &ipic >; + interrupts = <26 8>; + phy_type = "utmi_wide"; + }; + + mdio@24520 { + device_type = "mdio"; + compatible = "gianfar"; + reg = <24520 20>; + #address-cells = <1>; + #size-cells = <0>; + phy1: ethernet-phy@1 { + interrupt-parent = < &ipic >; + interrupts = <13 8>; + reg = <1>; + device_type = "ethernet-phy"; + }; + phy4: ethernet-phy@4 { + interrupt-parent = < &ipic >; + interrupts = <14 8>; + reg = <4>; + device_type = "ethernet-phy"; + }; + }; + + ethernet@24000 { + device_type = "network"; + model = "eTSEC"; + compatible = "gianfar"; + reg = <24000 1000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <25 8 24 8 23 8>; + interrupt-parent = < &ipic >; + phy-handle = < &phy1 >; + }; + + ethernet@25000 { + device_type = "network"; + model = "eTSEC"; + compatible = "gianfar"; + reg = <25000 1000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <22 8 21 8 20 8>; + interrupt-parent = < &ipic >; + phy-handle = < &phy4 >; + }; + + serial@4500 { + device_type = "serial"; + compatible = "ns16550"; + reg = <4500 100>; + clock-frequency = <0>; + interrupts = <9 8>; + interrupt-parent = < &ipic >; + }; + + serial@4600 { + device_type = "serial"; + compatible = "ns16550"; + reg = <4600 100>; + clock-frequency = <0>; + interrupts = <a 8>; + interrupt-parent = < &ipic >; + }; + + pci@8500 { + interrupt-map-mask = <f800 0 0 7>; + interrupt-map = < + + /* IDSEL 0x0E -mini PCI */ + 7000 0 0 1 &ipic 12 8 + 7000 0 0 2 &ipic 12 8 + 7000 0 0 3 &ipic 12 8 + 7000 0 0 4 &ipic 12 8 + + /* IDSEL 0x0F - PCI slot */ + 7800 0 0 1 &ipic 11 8 + 7800 0 0 2 &ipic 12 8 + 7800 0 0 3 &ipic 11 8 + 7800 0 0 4 &ipic 12 8>; + interrupt-parent = < &ipic >; + interrupts = <42 8>; + bus-range = <0 0>; + ranges = <02000000 0 90000000 90000000 0 10000000 + 42000000 0 80000000 80000000 0 10000000 + 01000000 0 00000000 e2000000 0 00100000>; + clock-frequency = <3f940aa>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + reg = <8500 100>; + compatible = "83xx"; + device_type = "pci"; + }; + + crypto@30000 { + device_type = "crypto"; + model = "SEC2"; + compatible = "talitos"; + reg = <30000 7000>; + interrupts = <b 8>; + interrupt-parent = < &ipic >; + /* Rev. 2.2 */ + num-channels = <1>; + channel-fifo-len = <18>; + exec-units-mask = <0000004c>; + descriptor-types-mask = <0122003f>; + }; + + /* IPIC + * interrupts cell = <intr #, sense> + * sense values match linux IORESOURCE_IRQ_* defines: + * sense == 8: Level, low assertion + * sense == 2: Edge, high-to-low change + */ + ipic: pic@700 { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <2>; + reg = <700 100>; + built-in; + device_type = "ipic"; + }; + }; +}; diff --git a/arch/powerpc/boot/dts/mpc832x_mds.dts b/arch/powerpc/boot/dts/mpc832x_mds.dts new file mode 100644 index 000000000000..06b310698a02 --- /dev/null +++ b/arch/powerpc/boot/dts/mpc832x_mds.dts @@ -0,0 +1,333 @@ +/* + * MPC8323E EMDS Device Tree Source + * + * Copyright 2006 Freescale Semiconductor Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +/ { + model = "MPC8323EMDS"; + compatible = "MPC8323EMDS", "MPC832xMDS", "MPC83xxMDS"; + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #cpus = <1>; + #address-cells = <1>; + #size-cells = <0>; + + PowerPC,8323@0 { + device_type = "cpu"; + reg = <0>; + d-cache-line-size = <20>; // 32 bytes + i-cache-line-size = <20>; // 32 bytes + d-cache-size = <4000>; // L1, 16K + i-cache-size = <4000>; // L1, 16K + timebase-frequency = <0>; + bus-frequency = <0>; + clock-frequency = <0>; + 32-bit; + }; + }; + + memory { + device_type = "memory"; + reg = <00000000 08000000>; + }; + + bcsr@f8000000 { + device_type = "board-control"; + reg = <f8000000 8000>; + }; + + soc8323@e0000000 { + #address-cells = <1>; + #size-cells = <1>; + #interrupt-cells = <2>; + device_type = "soc"; + ranges = <0 e0000000 00100000>; + reg = <e0000000 00000200>; + bus-frequency = <7DE2900>; + + wdt@200 { + device_type = "watchdog"; + compatible = "mpc83xx_wdt"; + reg = <200 100>; + }; + + i2c@3000 { + device_type = "i2c"; + compatible = "fsl-i2c"; + reg = <3000 100>; + interrupts = <e 8>; + interrupt-parent = < &ipic >; + dfsrr; + }; + + serial@4500 { + device_type = "serial"; + compatible = "ns16550"; + reg = <4500 100>; + clock-frequency = <0>; + interrupts = <9 8>; + interrupt-parent = < &ipic >; + }; + + serial@4600 { + device_type = "serial"; + compatible = "ns16550"; + reg = <4600 100>; + clock-frequency = <0>; + interrupts = <a 8>; + interrupt-parent = < &ipic >; + }; + + crypto@30000 { + device_type = "crypto"; + model = "SEC2"; + compatible = "talitos"; + reg = <30000 7000>; + interrupts = <b 8>; + interrupt-parent = < &ipic >; + /* Rev. 2.2 */ + num-channels = <1>; + channel-fifo-len = <18>; + exec-units-mask = <0000004c>; + descriptor-types-mask = <0122003f>; + }; + + pci@8500 { + interrupt-map-mask = <f800 0 0 7>; + interrupt-map = < + /* IDSEL 0x11 AD17 */ + 8800 0 0 1 &ipic 14 8 + 8800 0 0 2 &ipic 15 8 + 8800 0 0 3 &ipic 16 8 + 8800 0 0 4 &ipic 17 8 + + /* IDSEL 0x12 AD18 */ + 9000 0 0 1 &ipic 16 8 + 9000 0 0 2 &ipic 17 8 + 9000 0 0 3 &ipic 14 8 + 9000 0 0 4 &ipic 15 8 + + /* IDSEL 0x13 AD19 */ + 9800 0 0 1 &ipic 17 8 + 9800 0 0 2 &ipic 14 8 + 9800 0 0 3 &ipic 15 8 + 9800 0 0 4 &ipic 16 8 + + /* IDSEL 0x15 AD21*/ + a800 0 0 1 &ipic 14 8 + a800 0 0 2 &ipic 15 8 + a800 0 0 3 &ipic 16 8 + a800 0 0 4 &ipic 17 8 + + /* IDSEL 0x16 AD22*/ + b000 0 0 1 &ipic 17 8 + b000 0 0 2 &ipic 14 8 + b000 0 0 3 &ipic 15 8 + b000 0 0 4 &ipic 16 8 + + /* IDSEL 0x17 AD23*/ + b800 0 0 1 &ipic 16 8 + b800 0 0 2 &ipic 17 8 + b800 0 0 3 &ipic 14 8 + b800 0 0 4 &ipic 15 8 + + /* IDSEL 0x18 AD24*/ + c000 0 0 1 &ipic 15 8 + c000 0 0 2 &ipic 16 8 + c000 0 0 3 &ipic 17 8 + c000 0 0 4 &ipic 14 8>; + interrupt-parent = < &ipic >; + interrupts = <42 8>; + bus-range = <0 0>; + ranges = <02000000 0 a0000000 90000000 0 10000000 + 42000000 0 80000000 80000000 0 10000000 + 01000000 0 00000000 d0000000 0 00100000>; + clock-frequency = <0>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + reg = <8500 100>; + compatible = "83xx"; + device_type = "pci"; + }; + + ipic: pic@700 { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <2>; + reg = <700 100>; + built-in; + device_type = "ipic"; + }; + + par_io@1400 { + reg = <1400 100>; + device_type = "par_io"; + num-ports = <7>; + + pio3: ucc_pin@03 { + pio-map = < + /* port pin dir open_drain assignment has_irq */ + 3 4 3 0 2 0 /* MDIO */ + 3 5 1 0 2 0 /* MDC */ + 0 d 2 0 1 0 /* RX_CLK (CLK9) */ + 3 18 2 0 1 0 /* TX_CLK (CLK10) */ + 1 1 1 0 1 0 /* TxD1 */ + 1 0 1 0 1 0 /* TxD0 */ + 1 1 1 0 1 0 /* TxD1 */ + 1 2 1 0 1 0 /* TxD2 */ + 1 3 1 0 1 0 /* TxD3 */ + 1 4 2 0 1 0 /* RxD0 */ + 1 5 2 0 1 0 /* RxD1 */ + 1 6 2 0 1 0 /* RxD2 */ + 1 7 2 0 1 0 /* RxD3 */ + 1 8 2 0 1 0 /* RX_ER */ + 1 9 1 0 1 0 /* TX_ER */ + 1 a 2 0 1 0 /* RX_DV */ + 1 b 2 0 1 0 /* COL */ + 1 c 1 0 1 0 /* TX_EN */ + 1 d 2 0 1 0>;/* CRS */ + }; + pio4: ucc_pin@04 { + pio-map = < + /* port pin dir open_drain assignment has_irq */ + 3 1f 2 0 1 0 /* RX_CLK (CLK7) */ + 3 6 2 0 1 0 /* TX_CLK (CLK8) */ + 1 12 1 0 1 0 /* TxD0 */ + 1 13 1 0 1 0 /* TxD1 */ + 1 14 1 0 1 0 /* TxD2 */ + 1 15 1 0 1 0 /* TxD3 */ + 1 16 2 0 1 0 /* RxD0 */ + 1 17 2 0 1 0 /* RxD1 */ + 1 18 2 0 1 0 /* RxD2 */ + 1 19 2 0 1 0 /* RxD3 */ + 1 1a 2 0 1 0 /* RX_ER */ + 1 1b 1 0 1 0 /* TX_ER */ + 1 1c 2 0 1 0 /* RX_DV */ + 1 1d 2 0 1 0 /* COL */ + 1 1e 1 0 1 0 /* TX_EN */ + 1 1f 2 0 1 0>;/* CRS */ + }; + }; + }; + + qe@e0100000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "qe"; + model = "QE"; + ranges = <0 e0100000 00100000>; + reg = <e0100000 480>; + brg-frequency = <0>; + bus-frequency = <BCD3D80>; + + muram@10000 { + device_type = "muram"; + ranges = <0 00010000 00004000>; + + data-only@0 { + reg = <0 4000>; + }; + }; + + spi@4c0 { + device_type = "spi"; + compatible = "fsl_spi"; + reg = <4c0 40>; + interrupts = <2>; + interrupt-parent = < &qeic >; + mode = "cpu"; + }; + + spi@500 { + device_type = "spi"; + compatible = "fsl_spi"; + reg = <500 40>; + interrupts = <1>; + interrupt-parent = < &qeic >; + mode = "cpu"; + }; + + usb@6c0 { + device_type = "usb"; + compatible = "qe_udc"; + reg = <6c0 40 8B00 100>; + interrupts = <b>; + interrupt-parent = < &qeic >; + mode = "slave"; + }; + + ucc@2200 { + device_type = "network"; + compatible = "ucc_geth"; + model = "UCC"; + device-id = <3>; + reg = <2200 200>; + interrupts = <22>; + interrupt-parent = < &qeic >; + mac-address = [ 00 04 9f 00 23 23 ]; + rx-clock = <19>; + tx-clock = <1a>; + phy-handle = < &phy3 >; + pio-handle = < &pio3 >; + }; + + ucc@3200 { + device_type = "network"; + compatible = "ucc_geth"; + model = "UCC"; + device-id = <4>; + reg = <3000 200>; + interrupts = <23>; + interrupt-parent = < &qeic >; + mac-address = [ 00 11 22 33 44 55 ]; + rx-clock = <17>; + tx-clock = <18>; + phy-handle = < &phy4 >; + pio-handle = < &pio4 >; + }; + + mdio@2320 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2320 18>; + device_type = "mdio"; + compatible = "ucc_geth_phy"; + + phy3: ethernet-phy@03 { + interrupt-parent = < &ipic >; + interrupts = <11 8>; + reg = <3>; + device_type = "ethernet-phy"; + interface = <3>; //ENET_100_MII + }; + phy4: ethernet-phy@04 { + interrupt-parent = < &ipic >; + interrupts = <12 8>; + reg = <4>; + device_type = "ethernet-phy"; + interface = <3>; + }; + }; + + qeic: qeic@80 { + interrupt-controller; + device_type = "qeic"; + #address-cells = <0>; + #interrupt-cells = <1>; + reg = <80 80>; + built-in; + big-endian; + interrupts = <20 8 21 8>; //high:32 low:33 + interrupt-parent = < &ipic >; + }; + }; +}; diff --git a/arch/powerpc/boot/dts/mpc8349emitx.dts b/arch/powerpc/boot/dts/mpc8349emitx.dts index 27807fc45888..61b550bf1645 100644 --- a/arch/powerpc/boot/dts/mpc8349emitx.dts +++ b/arch/powerpc/boot/dts/mpc8349emitx.dts @@ -10,7 +10,7 @@ */ / { model = "MPC8349EMITX"; - compatible = "MPC834xMITX"; + compatible = "MPC8349EMITX", "MPC834xMITX", "MPC83xxMITX"; #address-cells = <1>; #size-cells = <1>; @@ -58,7 +58,7 @@ compatible = "fsl-i2c"; reg = <3000 100>; interrupts = <e 8>; - interrupt-parent = <700>; + interrupt-parent = < &ipic >; dfsrr; }; @@ -67,7 +67,7 @@ compatible = "fsl-i2c"; reg = <3100 100>; interrupts = <f 8>; - interrupt-parent = <700>; + interrupt-parent = < &ipic >; dfsrr; }; @@ -76,7 +76,7 @@ compatible = "mpc83xx_spi"; reg = <7000 1000>; interrupts = <10 8>; - interrupt-parent = <700>; + interrupt-parent = < &ipic >; mode = <0>; }; @@ -86,8 +86,8 @@ reg = <22000 1000>; #address-cells = <1>; #size-cells = <0>; - interrupt-parent = <700>; - interrupts = <27 2>; + interrupt-parent = < &ipic >; + interrupts = <27 8>; phy_type = "ulpi"; port1; }; @@ -98,8 +98,8 @@ reg = <23000 1000>; #address-cells = <1>; #size-cells = <0>; - interrupt-parent = <700>; - interrupts = <26 2>; + interrupt-parent = < &ipic >; + interrupts = <26 8>; phy_type = "ulpi"; }; @@ -109,22 +109,19 @@ reg = <24520 20>; #address-cells = <1>; #size-cells = <0>; - linux,phandle = <24520>; /* Vitesse 8201 */ - ethernet-phy@1c { - linux,phandle = <245201c>; - interrupt-parent = <700>; - interrupts = <12 2>; + phy1c: ethernet-phy@1c { + interrupt-parent = < &ipic >; + interrupts = <12 8>; reg = <1c>; device_type = "ethernet-phy"; }; /* Vitesse 7385 */ - ethernet-phy@1f { - linux,phandle = <245201f>; - interrupt-parent = <700>; - interrupts = <12 2>; + phy1f: ethernet-phy@1f { + interrupt-parent = < &ipic >; + interrupts = <12 8>; reg = <1f>; device_type = "ethernet-phy"; }; @@ -138,8 +135,8 @@ address = [ 00 00 00 00 00 00 ]; local-mac-address = [ 00 00 00 00 00 00 ]; interrupts = <20 8 21 8 22 8>; - interrupt-parent = <700>; - phy-handle = <245201c>; + interrupt-parent = < &ipic >; + phy-handle = < &phy1c >; }; ethernet@25000 { @@ -152,8 +149,8 @@ address = [ 00 00 00 00 00 00 ]; local-mac-address = [ 00 00 00 00 00 00 ]; interrupts = <23 8 24 8 25 8>; - interrupt-parent = <700>; - phy-handle = <245201f>; + interrupt-parent = < &ipic >; + phy-handle = < &phy1f >; }; serial@4500 { @@ -162,7 +159,7 @@ reg = <4500 100>; clock-frequency = <0>; // from bootloader interrupts = <9 8>; - interrupt-parent = <700>; + interrupt-parent = < &ipic >; }; serial@4600 { @@ -171,16 +168,16 @@ reg = <4600 100>; clock-frequency = <0>; // from bootloader interrupts = <a 8>; - interrupt-parent = <700>; + interrupt-parent = < &ipic >; }; pci@8500 { interrupt-map-mask = <f800 0 0 7>; interrupt-map = < /* IDSEL 0x10 - SATA */ - 8000 0 0 1 700 16 8 /* SATA_INTA */ + 8000 0 0 1 &ipic 16 8 /* SATA_INTA */ >; - interrupt-parent = <700>; + interrupt-parent = < &ipic >; interrupts = <42 8>; bus-range = <0 0>; ranges = <42000000 0 80000000 80000000 0 10000000 @@ -199,13 +196,13 @@ interrupt-map-mask = <f800 0 0 7>; interrupt-map = < /* IDSEL 0x0E - MiniPCI Slot */ - 7000 0 0 1 700 15 8 /* PCI_INTA */ + 7000 0 0 1 &ipic 15 8 /* PCI_INTA */ /* IDSEL 0x0F - PCI Slot */ - 7800 0 0 1 700 14 8 /* PCI_INTA */ - 7800 0 0 2 700 15 8 /* PCI_INTB */ + 7800 0 0 1 &ipic 14 8 /* PCI_INTA */ + 7800 0 0 2 &ipic 15 8 /* PCI_INTB */ >; - interrupt-parent = <700>; + interrupt-parent = < &ipic >; interrupts = <43 8>; bus-range = <1 1>; ranges = <42000000 0 a0000000 a0000000 0 10000000 @@ -226,15 +223,14 @@ compatible = "talitos"; reg = <30000 10000>; interrupts = <b 8>; - interrupt-parent = <700>; + interrupt-parent = < &ipic >; num-channels = <4>; channel-fifo-len = <18>; exec-units-mask = <0000007e>; descriptor-types-mask = <01010ebf>; }; - pic@700 { - linux,phandle = <700>; + ipic: pic@700 { interrupt-controller; #address-cells = <0>; #interrupt-cells = <2>; diff --git a/arch/powerpc/boot/dts/mpc8349emitxgp.dts b/arch/powerpc/boot/dts/mpc8349emitxgp.dts new file mode 100644 index 000000000000..b2e1a5ec3779 --- /dev/null +++ b/arch/powerpc/boot/dts/mpc8349emitxgp.dts @@ -0,0 +1,184 @@ +/* + * MPC8349E-mITX-GP Device Tree Source + * + * Copyright 2007 Freescale Semiconductor Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ +/ { + model = "MPC8349EMITXGP"; + compatible = "MPC8349EMITXGP", "MPC834xMITX", "MPC83xxMITX"; + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #cpus = <1>; + #address-cells = <1>; + #size-cells = <0>; + + PowerPC,8349@0 { + device_type = "cpu"; + reg = <0>; + d-cache-line-size = <20>; + i-cache-line-size = <20>; + d-cache-size = <8000>; + i-cache-size = <8000>; + timebase-frequency = <0>; // from bootloader + bus-frequency = <0>; // from bootloader + clock-frequency = <0>; // from bootloader + 32-bit; + }; + }; + + memory { + device_type = "memory"; + reg = <00000000 10000000>; + }; + + soc8349@e0000000 { + #address-cells = <1>; + #size-cells = <1>; + #interrupt-cells = <2>; + device_type = "soc"; + ranges = <0 e0000000 00100000>; + reg = <e0000000 00000200>; + bus-frequency = <0>; // from bootloader + + wdt@200 { + device_type = "watchdog"; + compatible = "mpc83xx_wdt"; + reg = <200 100>; + }; + + i2c@3000 { + device_type = "i2c"; + compatible = "fsl-i2c"; + reg = <3000 100>; + interrupts = <e 8>; + interrupt-parent = < &ipic >; + dfsrr; + }; + + i2c@3100 { + device_type = "i2c"; + compatible = "fsl-i2c"; + reg = <3100 100>; + interrupts = <f 8>; + interrupt-parent = < &ipic >; + dfsrr; + }; + + spi@7000 { + device_type = "spi"; + compatible = "mpc83xx_spi"; + reg = <7000 1000>; + interrupts = <10 8>; + interrupt-parent = < &ipic >; + mode = <0>; + }; + + usb@23000 { + device_type = "usb"; + compatible = "fsl-usb2-dr"; + reg = <23000 1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupt-parent = < &ipic >; + interrupts = <26 8>; + dr_mode = "otg"; + phy_type = "ulpi"; + }; + + mdio@24520 { + device_type = "mdio"; + compatible = "gianfar"; + reg = <24520 20>; + #address-cells = <1>; + #size-cells = <0>; + + /* Vitesse 8201 */ + phy1c: ethernet-phy@1c { + interrupt-parent = < &ipic >; + interrupts = <12 8>; + reg = <1c>; + device_type = "ethernet-phy"; + }; + }; + + ethernet@24000 { + device_type = "network"; + model = "TSEC"; + compatible = "gianfar"; + reg = <24000 1000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <20 8 21 8 22 8>; + interrupt-parent = < &ipic >; + phy-handle = < &phy1c >; + }; + + serial@4500 { + device_type = "serial"; + compatible = "ns16550"; + reg = <4500 100>; + clock-frequency = <0>; // from bootloader + interrupts = <9 8>; + interrupt-parent = < &ipic >; + }; + + serial@4600 { + device_type = "serial"; + compatible = "ns16550"; + reg = <4600 100>; + clock-frequency = <0>; // from bootloader + interrupts = <a 8>; + interrupt-parent = < &ipic >; + }; + + pci@8600 { + interrupt-map-mask = <f800 0 0 7>; + interrupt-map = < + /* IDSEL 0x0F - PCI Slot */ + 7800 0 0 1 &ipic 14 8 /* PCI_INTA */ + 7800 0 0 2 &ipic 15 8 /* PCI_INTB */ + >; + interrupt-parent = < &ipic >; + interrupts = <43 8>; + bus-range = <1 1>; + ranges = <42000000 0 a0000000 a0000000 0 10000000 + 02000000 0 b0000000 b0000000 0 10000000 + 01000000 0 00000000 e3000000 0 01000000>; + clock-frequency = <3f940aa>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + reg = <8600 100>; + compatible = "83xx"; + device_type = "pci"; + }; + + crypto@30000 { + device_type = "crypto"; + model = "SEC2"; + compatible = "talitos"; + reg = <30000 10000>; + interrupts = <b 8>; + interrupt-parent = < &ipic >; + num-channels = <4>; + channel-fifo-len = <18>; + exec-units-mask = <0000007e>; + descriptor-types-mask = <01010ebf>; + }; + + ipic: pic@700 { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <2>; + reg = <700 100>; + built-in; + device_type = "ipic"; + }; + }; +}; diff --git a/arch/powerpc/boot/dts/mpc8349emds.dts b/arch/powerpc/boot/dts/mpc834x_mds.dts index efceb3432653..e4b43c24bc0b 100644 --- a/arch/powerpc/boot/dts/mpc8349emds.dts +++ b/arch/powerpc/boot/dts/mpc834x_mds.dts @@ -11,7 +11,7 @@ / { model = "MPC8349EMDS"; - compatible = "MPC834xMDS"; + compatible = "MPC8349EMDS", "MPC834xMDS", "MPC83xxMDS"; #address-cells = <1>; #size-cells = <1>; @@ -39,6 +39,11 @@ reg = <00000000 10000000>; // 256MB at 0 }; + bcsr@e2400000 { + device_type = "board-control"; + reg = <e2400000 8000>; + }; + soc8349@e0000000 { #address-cells = <1>; #size-cells = <1>; @@ -59,7 +64,7 @@ compatible = "fsl-i2c"; reg = <3000 100>; interrupts = <e 8>; - interrupt-parent = <700>; + interrupt-parent = < &ipic >; dfsrr; }; @@ -68,7 +73,7 @@ compatible = "fsl-i2c"; reg = <3100 100>; interrupts = <f 8>; - interrupt-parent = <700>; + interrupt-parent = < &ipic >; dfsrr; }; @@ -77,7 +82,7 @@ compatible = "mpc83xx_spi"; reg = <7000 1000>; interrupts = <10 8>; - interrupt-parent = <700>; + interrupt-parent = < &ipic >; mode = <0>; }; @@ -89,8 +94,8 @@ reg = <22000 1000>; #address-cells = <1>; #size-cells = <0>; - interrupt-parent = <700>; - interrupts = <27 2>; + interrupt-parent = < &ipic >; + interrupts = <27 8>; phy_type = "ulpi"; port1; }; @@ -101,8 +106,9 @@ reg = <23000 1000>; #address-cells = <1>; #size-cells = <0>; - interrupt-parent = <700>; - interrupts = <26 2>; + interrupt-parent = < &ipic >; + interrupts = <26 8>; + dr_mode = "otg"; phy_type = "ulpi"; }; @@ -112,18 +118,15 @@ reg = <24520 20>; #address-cells = <1>; #size-cells = <0>; - linux,phandle = <24520>; - ethernet-phy@0 { - linux,phandle = <2452000>; - interrupt-parent = <700>; - interrupts = <11 2>; + phy0: ethernet-phy@0 { + interrupt-parent = < &ipic >; + interrupts = <11 8>; reg = <0>; device_type = "ethernet-phy"; }; - ethernet-phy@1 { - linux,phandle = <2452001>; - interrupt-parent = <700>; - interrupts = <12 2>; + phy1: ethernet-phy@1 { + interrupt-parent = < &ipic >; + interrupts = <12 8>; reg = <1>; device_type = "ethernet-phy"; }; @@ -137,8 +140,8 @@ address = [ 00 00 00 00 00 00 ]; local-mac-address = [ 00 00 00 00 00 00 ]; interrupts = <20 8 21 8 22 8>; - interrupt-parent = <700>; - phy-handle = <2452000>; + interrupt-parent = < &ipic >; + phy-handle = < &phy0 >; }; ethernet@25000 { @@ -151,8 +154,8 @@ address = [ 00 00 00 00 00 00 ]; local-mac-address = [ 00 00 00 00 00 00 ]; interrupts = <23 8 24 8 25 8>; - interrupt-parent = <700>; - phy-handle = <2452001>; + interrupt-parent = < &ipic >; + phy-handle = < &phy1 >; }; serial@4500 { @@ -161,7 +164,7 @@ reg = <4500 100>; clock-frequency = <0>; interrupts = <9 8>; - interrupt-parent = <700>; + interrupt-parent = < &ipic >; }; serial@4600 { @@ -170,7 +173,7 @@ reg = <4600 100>; clock-frequency = <0>; interrupts = <a 8>; - interrupt-parent = <700>; + interrupt-parent = < &ipic >; }; pci@8500 { @@ -178,47 +181,47 @@ interrupt-map = < /* IDSEL 0x11 */ - 8800 0 0 1 700 14 8 - 8800 0 0 2 700 15 8 - 8800 0 0 3 700 16 8 - 8800 0 0 4 700 17 8 + 8800 0 0 1 &ipic 14 8 + 8800 0 0 2 &ipic 15 8 + 8800 0 0 3 &ipic 16 8 + 8800 0 0 4 &ipic 17 8 /* IDSEL 0x12 */ - 9000 0 0 1 700 16 8 - 9000 0 0 2 700 17 8 - 9000 0 0 3 700 14 8 - 9000 0 0 4 700 15 8 + 9000 0 0 1 &ipic 16 8 + 9000 0 0 2 &ipic 17 8 + 9000 0 0 3 &ipic 14 8 + 9000 0 0 4 &ipic 15 8 /* IDSEL 0x13 */ - 9800 0 0 1 700 17 8 - 9800 0 0 2 700 14 8 - 9800 0 0 3 700 15 8 - 9800 0 0 4 700 16 8 + 9800 0 0 1 &ipic 17 8 + 9800 0 0 2 &ipic 14 8 + 9800 0 0 3 &ipic 15 8 + 9800 0 0 4 &ipic 16 8 /* IDSEL 0x15 */ - a800 0 0 1 700 14 8 - a800 0 0 2 700 15 8 - a800 0 0 3 700 16 8 - a800 0 0 4 700 17 8 + a800 0 0 1 &ipic 14 8 + a800 0 0 2 &ipic 15 8 + a800 0 0 3 &ipic 16 8 + a800 0 0 4 &ipic 17 8 /* IDSEL 0x16 */ - b000 0 0 1 700 17 8 - b000 0 0 2 700 14 8 - b000 0 0 3 700 15 8 - b000 0 0 4 700 16 8 + b000 0 0 1 &ipic 17 8 + b000 0 0 2 &ipic 14 8 + b000 0 0 3 &ipic 15 8 + b000 0 0 4 &ipic 16 8 /* IDSEL 0x17 */ - b800 0 0 1 700 16 8 - b800 0 0 2 700 17 8 - b800 0 0 3 700 14 8 - b800 0 0 4 700 15 8 + b800 0 0 1 &ipic 16 8 + b800 0 0 2 &ipic 17 8 + b800 0 0 3 &ipic 14 8 + b800 0 0 4 &ipic 15 8 /* IDSEL 0x18 */ - c000 0 0 1 700 15 8 - c000 0 0 2 700 16 8 - c000 0 0 3 700 17 8 - c000 0 0 4 700 14 8>; - interrupt-parent = <700>; + c000 0 0 1 &ipic 15 8 + c000 0 0 2 &ipic 16 8 + c000 0 0 3 &ipic 17 8 + c000 0 0 4 &ipic 14 8>; + interrupt-parent = < &ipic >; interrupts = <42 8>; bus-range = <0 0>; ranges = <02000000 0 a0000000 a0000000 0 10000000 @@ -238,47 +241,47 @@ interrupt-map = < /* IDSEL 0x11 */ - 8800 0 0 1 700 14 8 - 8800 0 0 2 700 15 8 - 8800 0 0 3 700 16 8 - 8800 0 0 4 700 17 8 + 8800 0 0 1 &ipic 14 8 + 8800 0 0 2 &ipic 15 8 + 8800 0 0 3 &ipic 16 8 + 8800 0 0 4 &ipic 17 8 /* IDSEL 0x12 */ - 9000 0 0 1 700 16 8 - 9000 0 0 2 700 17 8 - 9000 0 0 3 700 14 8 - 9000 0 0 4 700 15 8 + 9000 0 0 1 &ipic 16 8 + 9000 0 0 2 &ipic 17 8 + 9000 0 0 3 &ipic 14 8 + 9000 0 0 4 &ipic 15 8 /* IDSEL 0x13 */ - 9800 0 0 1 700 17 8 - 9800 0 0 2 700 14 8 - 9800 0 0 3 700 15 8 - 9800 0 0 4 700 16 8 + 9800 0 0 1 &ipic 17 8 + 9800 0 0 2 &ipic 14 8 + 9800 0 0 3 &ipic 15 8 + 9800 0 0 4 &ipic 16 8 /* IDSEL 0x15 */ - a800 0 0 1 700 14 8 - a800 0 0 2 700 15 8 - a800 0 0 3 700 16 8 - a800 0 0 4 700 17 8 + a800 0 0 1 &ipic 14 8 + a800 0 0 2 &ipic 15 8 + a800 0 0 3 &ipic 16 8 + a800 0 0 4 &ipic 17 8 /* IDSEL 0x16 */ - b000 0 0 1 700 17 8 - b000 0 0 2 700 14 8 - b000 0 0 3 700 15 8 - b000 0 0 4 700 16 8 + b000 0 0 1 &ipic 17 8 + b000 0 0 2 &ipic 14 8 + b000 0 0 3 &ipic 15 8 + b000 0 0 4 &ipic 16 8 /* IDSEL 0x17 */ - b800 0 0 1 700 16 8 - b800 0 0 2 700 17 8 - b800 0 0 3 700 14 8 - b800 0 0 4 700 15 8 + b800 0 0 1 &ipic 16 8 + b800 0 0 2 &ipic 17 8 + b800 0 0 3 &ipic 14 8 + b800 0 0 4 &ipic 15 8 /* IDSEL 0x18 */ - c000 0 0 1 700 15 8 - c000 0 0 2 700 16 8 - c000 0 0 3 700 17 8 - c000 0 0 4 700 14 8>; - interrupt-parent = <700>; + c000 0 0 1 &ipic 15 8 + c000 0 0 2 &ipic 16 8 + c000 0 0 3 &ipic 17 8 + c000 0 0 4 &ipic 14 8>; + interrupt-parent = < &ipic >; interrupts = <42 8>; bus-range = <0 0>; ranges = <02000000 0 b0000000 b0000000 0 10000000 @@ -300,7 +303,7 @@ compatible = "talitos"; reg = <30000 10000>; interrupts = <b 8>; - interrupt-parent = <700>; + interrupt-parent = < &ipic >; num-channels = <4>; channel-fifo-len = <18>; exec-units-mask = <0000007e>; @@ -315,8 +318,7 @@ * sense == 8: Level, low assertion * sense == 2: Edge, high-to-low change */ - pic@700 { - linux,phandle = <700>; + ipic: pic@700 { interrupt-controller; #address-cells = <0>; #interrupt-cells = <2>; diff --git a/arch/powerpc/boot/dts/mpc8360emds.dts b/arch/powerpc/boot/dts/mpc836x_mds.dts index 9022192155b9..4fe45c021848 100644 --- a/arch/powerpc/boot/dts/mpc8360emds.dts +++ b/arch/powerpc/boot/dts/mpc836x_mds.dts @@ -15,17 +15,15 @@ */ / { - model = "MPC8360EPB"; - compatible = "MPC83xx"; + model = "MPC8360MDS"; + compatible = "MPC8360EMDS", "MPC836xMDS", "MPC83xxMDS"; #address-cells = <1>; #size-cells = <1>; - linux,phandle = <100>; cpus { #cpus = <1>; #address-cells = <1>; #size-cells = <0>; - linux,phandle = <200>; PowerPC,8360@0 { device_type = "cpu"; @@ -38,14 +36,11 @@ bus-frequency = <FBC5200>; clock-frequency = <1F78A400>; 32-bit; - linux,phandle = <201>; - linux,boot-cpu; }; }; memory { device_type = "memory"; - linux,phandle = <300>; reg = <00000000 10000000>; }; @@ -74,7 +69,7 @@ compatible = "fsl-i2c"; reg = <3000 100>; interrupts = <e 8>; - interrupt-parent = <700>; + interrupt-parent = < &ipic >; dfsrr; }; @@ -83,7 +78,7 @@ compatible = "fsl-i2c"; reg = <3100 100>; interrupts = <f 8>; - interrupt-parent = <700>; + interrupt-parent = < &ipic >; dfsrr; }; @@ -93,7 +88,7 @@ reg = <4500 100>; clock-frequency = <FBC5200>; interrupts = <9 8>; - interrupt-parent = <700>; + interrupt-parent = < &ipic >; }; serial@4600 { @@ -102,7 +97,7 @@ reg = <4600 100>; clock-frequency = <FBC5200>; interrupts = <a 8>; - interrupt-parent = <700>; + interrupt-parent = < &ipic >; }; crypto@30000 { @@ -111,7 +106,7 @@ compatible = "talitos"; reg = <30000 10000>; interrupts = <b 8>; - interrupt-parent = <700>; + interrupt-parent = < &ipic >; num-channels = <4>; channel-fifo-len = <18>; exec-units-mask = <0000007e>; @@ -120,52 +115,51 @@ }; pci@8500 { - linux,phandle = <8500>; interrupt-map-mask = <f800 0 0 7>; interrupt-map = < /* IDSEL 0x11 AD17 */ - 8800 0 0 1 700 14 8 - 8800 0 0 2 700 15 8 - 8800 0 0 3 700 16 8 - 8800 0 0 4 700 17 8 + 8800 0 0 1 &ipic 14 8 + 8800 0 0 2 &ipic 15 8 + 8800 0 0 3 &ipic 16 8 + 8800 0 0 4 &ipic 17 8 /* IDSEL 0x12 AD18 */ - 9000 0 0 1 700 16 8 - 9000 0 0 2 700 17 8 - 9000 0 0 3 700 14 8 - 9000 0 0 4 700 15 8 + 9000 0 0 1 &ipic 16 8 + 9000 0 0 2 &ipic 17 8 + 9000 0 0 3 &ipic 14 8 + 9000 0 0 4 &ipic 15 8 /* IDSEL 0x13 AD19 */ - 9800 0 0 1 700 17 8 - 9800 0 0 2 700 14 8 - 9800 0 0 3 700 15 8 - 9800 0 0 4 700 16 8 + 9800 0 0 1 &ipic 17 8 + 9800 0 0 2 &ipic 14 8 + 9800 0 0 3 &ipic 15 8 + 9800 0 0 4 &ipic 16 8 /* IDSEL 0x15 AD21*/ - a800 0 0 1 700 14 8 - a800 0 0 2 700 15 8 - a800 0 0 3 700 16 8 - a800 0 0 4 700 17 8 + a800 0 0 1 &ipic 14 8 + a800 0 0 2 &ipic 15 8 + a800 0 0 3 &ipic 16 8 + a800 0 0 4 &ipic 17 8 /* IDSEL 0x16 AD22*/ - b000 0 0 1 700 17 8 - b000 0 0 2 700 14 8 - b000 0 0 3 700 15 8 - b000 0 0 4 700 16 8 + b000 0 0 1 &ipic 17 8 + b000 0 0 2 &ipic 14 8 + b000 0 0 3 &ipic 15 8 + b000 0 0 4 &ipic 16 8 /* IDSEL 0x17 AD23*/ - b800 0 0 1 700 16 8 - b800 0 0 2 700 17 8 - b800 0 0 3 700 14 8 - b800 0 0 4 700 15 8 + b800 0 0 1 &ipic 16 8 + b800 0 0 2 &ipic 17 8 + b800 0 0 3 &ipic 14 8 + b800 0 0 4 &ipic 15 8 /* IDSEL 0x18 AD24*/ - c000 0 0 1 700 15 8 - c000 0 0 2 700 16 8 - c000 0 0 3 700 17 8 - c000 0 0 4 700 14 8>; - interrupt-parent = <700>; + c000 0 0 1 &ipic 15 8 + c000 0 0 2 &ipic 16 8 + c000 0 0 3 &ipic 17 8 + c000 0 0 4 &ipic 14 8>; + interrupt-parent = < &ipic >; interrupts = <42 8>; bus-range = <0 0>; ranges = <02000000 0 a0000000 a0000000 0 10000000 @@ -180,8 +174,7 @@ device_type = "pci"; }; - pic@700 { - linux,phandle = <700>; + ipic: pic@700 { interrupt-controller; #address-cells = <0>; #interrupt-cells = <2>; @@ -195,8 +188,7 @@ device_type = "par_io"; num-ports = <7>; - ucc_pin@01 { - linux,phandle = <140001>; + pio1: ucc_pin@01 { pio-map = < /* port pin dir open_drain assignment has_irq */ 0 3 1 0 1 0 /* TxD0 */ @@ -223,8 +215,7 @@ 2 9 1 0 3 0 /* GTX_CLK - CLK10 */ 2 8 2 0 1 0>; /* GTX125 - CLK9 */ }; - ucc_pin@02 { - linux,phandle = <140002>; + pio2: ucc_pin@02 { pio-map = < /* port pin dir open_drain assignment has_irq */ 0 11 1 0 1 0 /* TxD0 */ @@ -281,7 +272,7 @@ compatible = "fsl_spi"; reg = <4c0 40>; interrupts = <2>; - interrupt-parent = <80>; + interrupt-parent = < &qeic >; mode = "cpu"; }; @@ -290,7 +281,7 @@ compatible = "fsl_spi"; reg = <500 40>; interrupts = <1>; - interrupt-parent = <80>; + interrupt-parent = < &qeic >; mode = "cpu"; }; @@ -299,7 +290,7 @@ compatible = "qe_udc"; reg = <6c0 40 8B00 100>; interrupts = <b>; - interrupt-parent = <80>; + interrupt-parent = < &qeic >; mode = "slave"; }; @@ -310,12 +301,12 @@ device-id = <1>; reg = <2000 200>; interrupts = <20>; - interrupt-parent = <80>; + interrupt-parent = < &qeic >; mac-address = [ 00 04 9f 00 23 23 ]; rx-clock = <0>; tx-clock = <19>; - phy-handle = <212000>; - pio-handle = <140001>; + phy-handle = < &phy0 >; + pio-handle = < &pio1 >; }; ucc@3000 { @@ -325,12 +316,12 @@ device-id = <2>; reg = <3000 200>; interrupts = <21>; - interrupt-parent = <80>; + interrupt-parent = < &qeic >; mac-address = [ 00 11 22 33 44 55 ]; rx-clock = <0>; tx-clock = <14>; - phy-handle = <212001>; - pio-handle = <140002>; + phy-handle = < &phy1 >; + pio-handle = < &pio2 >; }; mdio@2120 { @@ -340,26 +331,23 @@ device_type = "mdio"; compatible = "ucc_geth_phy"; - ethernet-phy@00 { - linux,phandle = <212000>; - interrupt-parent = <700>; - interrupts = <11 2>; + phy0: ethernet-phy@00 { + interrupt-parent = < &ipic >; + interrupts = <11 8>; reg = <0>; device_type = "ethernet-phy"; interface = <6>; //ENET_1000_GMII }; - ethernet-phy@01 { - linux,phandle = <212001>; - interrupt-parent = <700>; - interrupts = <12 2>; + phy1: ethernet-phy@01 { + interrupt-parent = < &ipic >; + interrupts = <12 8>; reg = <1>; device_type = "ethernet-phy"; interface = <6>; }; }; - qeic@80 { - linux,phandle = <80>; + qeic: qeic@80 { interrupt-controller; device_type = "qeic"; #address-cells = <0>; @@ -368,7 +356,7 @@ built-in; big-endian; interrupts = <20 8 21 8>; //high:32 low:33 - interrupt-parent = <700>; + interrupt-parent = < &ipic >; }; }; diff --git a/arch/powerpc/boot/dts/mpc8540ads.dts b/arch/powerpc/boot/dts/mpc8540ads.dts index 5f41c1f7a5f3..3c0917fa791c 100644 --- a/arch/powerpc/boot/dts/mpc8540ads.dts +++ b/arch/powerpc/boot/dts/mpc8540ads.dts @@ -12,16 +12,14 @@ / { model = "MPC8540ADS"; - compatible = "MPC85xxADS"; + compatible = "MPC8540ADS", "MPC85xxADS"; #address-cells = <1>; #size-cells = <1>; - linux,phandle = <100>; cpus { #cpus = <1>; #address-cells = <1>; #size-cells = <0>; - linux,phandle = <200>; PowerPC,8540@0 { device_type = "cpu"; @@ -34,13 +32,11 @@ bus-frequency = <0>; // 166 MHz clock-frequency = <0>; // 825 MHz, from uboot 32-bit; - linux,phandle = <201>; }; }; memory { device_type = "memory"; - linux,phandle = <300>; reg = <00000000 08000000>; // 128M at 0x0 }; @@ -58,7 +54,7 @@ compatible = "fsl-i2c"; reg = <3000 100>; interrupts = <1b 2>; - interrupt-parent = <40000>; + interrupt-parent = <&mpic>; dfsrr; }; @@ -68,24 +64,20 @@ device_type = "mdio"; compatible = "gianfar"; reg = <24520 20>; - linux,phandle = <24520>; - ethernet-phy@0 { - linux,phandle = <2452000>; - interrupt-parent = <40000>; + phy0: ethernet-phy@0 { + interrupt-parent = <&mpic>; interrupts = <35 1>; reg = <0>; device_type = "ethernet-phy"; }; - ethernet-phy@1 { - linux,phandle = <2452001>; - interrupt-parent = <40000>; + phy1: ethernet-phy@1 { + interrupt-parent = <&mpic>; interrupts = <35 1>; reg = <1>; device_type = "ethernet-phy"; }; - ethernet-phy@3 { - linux,phandle = <2452003>; - interrupt-parent = <40000>; + phy3: ethernet-phy@3 { + interrupt-parent = <&mpic>; interrupts = <37 1>; reg = <3>; device_type = "ethernet-phy"; @@ -102,8 +94,8 @@ address = [ 00 E0 0C 00 73 00 ]; local-mac-address = [ 00 E0 0C 00 73 00 ]; interrupts = <d 2 e 2 12 2>; - interrupt-parent = <40000>; - phy-handle = <2452000>; + interrupt-parent = <&mpic>; + phy-handle = <&phy0>; }; ethernet@25000 { @@ -116,8 +108,8 @@ address = [ 00 E0 0C 00 73 01 ]; local-mac-address = [ 00 E0 0C 00 73 01 ]; interrupts = <13 2 14 2 18 2>; - interrupt-parent = <40000>; - phy-handle = <2452001>; + interrupt-parent = <&mpic>; + phy-handle = <&phy1>; }; ethernet@26000 { @@ -130,8 +122,8 @@ address = [ 00 E0 0C 00 73 02 ]; local-mac-address = [ 00 E0 0C 00 73 02 ]; interrupts = <19 2>; - interrupt-parent = <40000>; - phy-handle = <2452003>; + interrupt-parent = <&mpic>; + phy-handle = <&phy3>; }; serial@4500 { @@ -140,7 +132,7 @@ reg = <4500 100>; // reg base, size clock-frequency = <0>; // should we fill in in uboot? interrupts = <1a 2>; - interrupt-parent = <40000>; + interrupt-parent = <&mpic>; }; serial@4600 { @@ -149,85 +141,84 @@ reg = <4600 100>; // reg base, size clock-frequency = <0>; // should we fill in in uboot? interrupts = <1a 2>; - interrupt-parent = <40000>; + interrupt-parent = <&mpic>; }; pci@8000 { - linux,phandle = <8000>; interrupt-map-mask = <f800 0 0 7>; interrupt-map = < /* IDSEL 0x02 */ - 1000 0 0 1 40000 31 1 - 1000 0 0 2 40000 32 1 - 1000 0 0 3 40000 33 1 - 1000 0 0 4 40000 34 1 + 1000 0 0 1 &mpic 31 1 + 1000 0 0 2 &mpic 32 1 + 1000 0 0 3 &mpic 33 1 + 1000 0 0 4 &mpic 34 1 /* IDSEL 0x03 */ - 1800 0 0 1 40000 34 1 - 1800 0 0 2 40000 31 1 - 1800 0 0 3 40000 32 1 - 1800 0 0 4 40000 33 1 + 1800 0 0 1 &mpic 34 1 + 1800 0 0 2 &mpic 31 1 + 1800 0 0 3 &mpic 32 1 + 1800 0 0 4 &mpic 33 1 /* IDSEL 0x04 */ - 2000 0 0 1 40000 33 1 - 2000 0 0 2 40000 34 1 - 2000 0 0 3 40000 31 1 - 2000 0 0 4 40000 32 1 + 2000 0 0 1 &mpic 33 1 + 2000 0 0 2 &mpic 34 1 + 2000 0 0 3 &mpic 31 1 + 2000 0 0 4 &mpic 32 1 /* IDSEL 0x05 */ - 2800 0 0 1 40000 32 1 - 2800 0 0 2 40000 33 1 - 2800 0 0 3 40000 34 1 - 2800 0 0 4 40000 31 1 + 2800 0 0 1 &mpic 32 1 + 2800 0 0 2 &mpic 33 1 + 2800 0 0 3 &mpic 34 1 + 2800 0 0 4 &mpic 31 1 /* IDSEL 0x0c */ - 6000 0 0 1 40000 31 1 - 6000 0 0 2 40000 32 1 - 6000 0 0 3 40000 33 1 - 6000 0 0 4 40000 34 1 + 6000 0 0 1 &mpic 31 1 + 6000 0 0 2 &mpic 32 1 + 6000 0 0 3 &mpic 33 1 + 6000 0 0 4 &mpic 34 1 /* IDSEL 0x0d */ - 6800 0 0 1 40000 34 1 - 6800 0 0 2 40000 31 1 - 6800 0 0 3 40000 32 1 - 6800 0 0 4 40000 33 1 + 6800 0 0 1 &mpic 34 1 + 6800 0 0 2 &mpic 31 1 + 6800 0 0 3 &mpic 32 1 + 6800 0 0 4 &mpic 33 1 /* IDSEL 0x0e */ - 7000 0 0 1 40000 33 1 - 7000 0 0 2 40000 34 1 - 7000 0 0 3 40000 31 1 - 7000 0 0 4 40000 32 1 + 7000 0 0 1 &mpic 33 1 + 7000 0 0 2 &mpic 34 1 + 7000 0 0 3 &mpic 31 1 + 7000 0 0 4 &mpic 32 1 /* IDSEL 0x0f */ - 7800 0 0 1 40000 32 1 - 7800 0 0 2 40000 33 1 - 7800 0 0 3 40000 34 1 - 7800 0 0 4 40000 31 1 + 7800 0 0 1 &mpic 32 1 + 7800 0 0 2 &mpic 33 1 + 7800 0 0 3 &mpic 34 1 + 7800 0 0 4 &mpic 31 1 /* IDSEL 0x12 */ - 9000 0 0 1 40000 31 1 - 9000 0 0 2 40000 32 1 - 9000 0 0 3 40000 33 1 - 9000 0 0 4 40000 34 1 + 9000 0 0 1 &mpic 31 1 + 9000 0 0 2 &mpic 32 1 + 9000 0 0 3 &mpic 33 1 + 9000 0 0 4 &mpic 34 1 /* IDSEL 0x13 */ - 9800 0 0 1 40000 34 1 - 9800 0 0 2 40000 31 1 - 9800 0 0 3 40000 32 1 - 9800 0 0 4 40000 33 1 + 9800 0 0 1 &mpic 34 1 + 9800 0 0 2 &mpic 31 1 + 9800 0 0 3 &mpic 32 1 + 9800 0 0 4 &mpic 33 1 /* IDSEL 0x14 */ - a000 0 0 1 40000 33 1 - a000 0 0 2 40000 34 1 - a000 0 0 3 40000 31 1 - a000 0 0 4 40000 32 1 + a000 0 0 1 &mpic 33 1 + a000 0 0 2 &mpic 34 1 + a000 0 0 3 &mpic 31 1 + a000 0 0 4 &mpic 32 1 /* IDSEL 0x15 */ - a800 0 0 1 40000 32 1 - a800 0 0 2 40000 33 1 - a800 0 0 3 40000 34 1 - a800 0 0 4 40000 31 1>; - interrupt-parent = <40000>; + a800 0 0 1 &mpic 32 1 + a800 0 0 2 &mpic 33 1 + a800 0 0 3 &mpic 34 1 + a800 0 0 4 &mpic 31 1>; + interrupt-parent = <&mpic>; interrupts = <08 2>; bus-range = <0 0>; ranges = <02000000 0 80000000 80000000 0 20000000 @@ -241,8 +232,7 @@ device_type = "pci"; }; - pic@40000 { - linux,phandle = <40000>; + mpic: pic@40000 { clock-frequency = <0>; interrupt-controller; #address-cells = <0>; diff --git a/arch/powerpc/boot/dts/mpc8541cds.dts b/arch/powerpc/boot/dts/mpc8541cds.dts index 7be0bc659e1c..2a1ae760ab3a 100644 --- a/arch/powerpc/boot/dts/mpc8541cds.dts +++ b/arch/powerpc/boot/dts/mpc8541cds.dts @@ -12,16 +12,14 @@ / { model = "MPC8541CDS"; - compatible = "MPC85xxCDS"; + compatible = "MPC8541CDS", "MPC85xxCDS"; #address-cells = <1>; #size-cells = <1>; - linux,phandle = <100>; cpus { #cpus = <1>; #address-cells = <1>; #size-cells = <0>; - linux,phandle = <200>; PowerPC,8541@0 { device_type = "cpu"; @@ -34,13 +32,11 @@ bus-frequency = <0>; // 166 MHz clock-frequency = <0>; // 825 MHz, from uboot 32-bit; - linux,phandle = <201>; }; }; memory { device_type = "memory"; - linux,phandle = <300>; reg = <00000000 08000000>; // 128M at 0x0 }; @@ -58,7 +54,7 @@ compatible = "fsl-i2c"; reg = <3000 100>; interrupts = <1b 2>; - interrupt-parent = <40000>; + interrupt-parent = <&mpic>; dfsrr; }; @@ -68,17 +64,14 @@ device_type = "mdio"; compatible = "gianfar"; reg = <24520 20>; - linux,phandle = <24520>; - ethernet-phy@0 { - linux,phandle = <2452000>; - interrupt-parent = <40000>; + phy0: ethernet-phy@0 { + interrupt-parent = <&mpic>; interrupts = <35 0>; reg = <0>; device_type = "ethernet-phy"; }; - ethernet-phy@1 { - linux,phandle = <2452001>; - interrupt-parent = <40000>; + phy1: ethernet-phy@1 { + interrupt-parent = <&mpic>; interrupts = <35 0>; reg = <1>; device_type = "ethernet-phy"; @@ -94,8 +87,8 @@ reg = <24000 1000>; local-mac-address = [ 00 E0 0C 00 73 00 ]; interrupts = <d 2 e 2 12 2>; - interrupt-parent = <40000>; - phy-handle = <2452000>; + interrupt-parent = <&mpic>; + phy-handle = <&phy0>; }; ethernet@25000 { @@ -107,8 +100,8 @@ reg = <25000 1000>; local-mac-address = [ 00 E0 0C 00 73 01 ]; interrupts = <13 2 14 2 18 2>; - interrupt-parent = <40000>; - phy-handle = <2452001>; + interrupt-parent = <&mpic>; + phy-handle = <&phy1>; }; serial@4500 { @@ -117,7 +110,7 @@ reg = <4500 100>; // reg base, size clock-frequency = <0>; // should we fill in in uboot? interrupts = <1a 2>; - interrupt-parent = <40000>; + interrupt-parent = <&mpic>; }; serial@4600 { @@ -126,57 +119,56 @@ reg = <4600 100>; // reg base, size clock-frequency = <0>; // should we fill in in uboot? interrupts = <1a 2>; - interrupt-parent = <40000>; + interrupt-parent = <&mpic>; }; - pci@8000 { - linux,phandle = <8000>; + pci1: pci@8000 { interrupt-map-mask = <1f800 0 0 7>; interrupt-map = < /* IDSEL 0x10 */ - 08000 0 0 1 40000 30 1 - 08000 0 0 2 40000 31 1 - 08000 0 0 3 40000 32 1 - 08000 0 0 4 40000 33 1 + 08000 0 0 1 &mpic 30 1 + 08000 0 0 2 &mpic 31 1 + 08000 0 0 3 &mpic 32 1 + 08000 0 0 4 &mpic 33 1 /* IDSEL 0x11 */ - 08800 0 0 1 40000 30 1 - 08800 0 0 2 40000 31 1 - 08800 0 0 3 40000 32 1 - 08800 0 0 4 40000 33 1 + 08800 0 0 1 &mpic 30 1 + 08800 0 0 2 &mpic 31 1 + 08800 0 0 3 &mpic 32 1 + 08800 0 0 4 &mpic 33 1 /* IDSEL 0x12 (Slot 1) */ - 09000 0 0 1 40000 30 1 - 09000 0 0 2 40000 31 1 - 09000 0 0 3 40000 32 1 - 09000 0 0 4 40000 33 1 + 09000 0 0 1 &mpic 30 1 + 09000 0 0 2 &mpic 31 1 + 09000 0 0 3 &mpic 32 1 + 09000 0 0 4 &mpic 33 1 /* IDSEL 0x13 (Slot 2) */ - 09800 0 0 1 40000 31 1 - 09800 0 0 2 40000 32 1 - 09800 0 0 3 40000 33 1 - 09800 0 0 4 40000 30 1 + 09800 0 0 1 &mpic 31 1 + 09800 0 0 2 &mpic 32 1 + 09800 0 0 3 &mpic 33 1 + 09800 0 0 4 &mpic 30 1 /* IDSEL 0x14 (Slot 3) */ - 0a000 0 0 1 40000 32 1 - 0a000 0 0 2 40000 33 1 - 0a000 0 0 3 40000 30 1 - 0a000 0 0 4 40000 31 1 + 0a000 0 0 1 &mpic 32 1 + 0a000 0 0 2 &mpic 33 1 + 0a000 0 0 3 &mpic 30 1 + 0a000 0 0 4 &mpic 31 1 /* IDSEL 0x15 (Slot 4) */ - 0a800 0 0 1 40000 33 1 - 0a800 0 0 2 40000 30 1 - 0a800 0 0 3 40000 31 1 - 0a800 0 0 4 40000 32 1 + 0a800 0 0 1 &mpic 33 1 + 0a800 0 0 2 &mpic 30 1 + 0a800 0 0 3 &mpic 31 1 + 0a800 0 0 4 &mpic 32 1 /* Bus 1 (Tundra Bridge) */ /* IDSEL 0x12 (ISA bridge) */ - 19000 0 0 1 40000 30 1 - 19000 0 0 2 40000 31 1 - 19000 0 0 3 40000 32 1 - 19000 0 0 4 40000 33 1>; - interrupt-parent = <40000>; + 19000 0 0 1 &mpic 30 1 + 19000 0 0 2 &mpic 31 1 + 19000 0 0 3 &mpic 32 1 + 19000 0 0 4 &mpic 33 1>; + interrupt-parent = <&mpic>; interrupts = <08 2>; bus-range = <0 0>; ranges = <02000000 0 80000000 80000000 0 20000000 @@ -200,21 +192,20 @@ compatible = "chrp,iic"; big-endian; interrupts = <1>; - interrupt-parent = <8000>; + interrupt-parent = <&pci1>; }; }; pci@9000 { - linux,phandle = <9000>; interrupt-map-mask = <f800 0 0 7>; interrupt-map = < /* IDSEL 0x15 */ - a800 0 0 1 40000 3b 1 - a800 0 0 2 40000 3b 1 - a800 0 0 3 40000 3b 1 - a800 0 0 4 40000 3b 1>; - interrupt-parent = <40000>; + a800 0 0 1 &mpic 3b 1 + a800 0 0 2 &mpic 3b 1 + a800 0 0 3 &mpic 3b 1 + a800 0 0 4 &mpic 3b 1>; + interrupt-parent = <&mpic>; interrupts = <09 2>; bus-range = <0 0>; ranges = <02000000 0 a0000000 a0000000 0 20000000 @@ -228,8 +219,7 @@ device_type = "pci"; }; - pic@40000 { - linux,phandle = <40000>; + mpic: pic@40000 { clock-frequency = <0>; interrupt-controller; #address-cells = <0>; diff --git a/arch/powerpc/boot/dts/mpc8548cds.dts b/arch/powerpc/boot/dts/mpc8548cds.dts index 893d7957c174..7eb5d81d5eec 100644 --- a/arch/powerpc/boot/dts/mpc8548cds.dts +++ b/arch/powerpc/boot/dts/mpc8548cds.dts @@ -12,16 +12,14 @@ / { model = "MPC8548CDS"; - compatible = "MPC85xxCDS"; + compatible = "MPC8548CDS", "MPC85xxCDS"; #address-cells = <1>; #size-cells = <1>; - linux,phandle = <100>; cpus { #cpus = <1>; #address-cells = <1>; #size-cells = <0>; - linux,phandle = <200>; PowerPC,8548@0 { device_type = "cpu"; @@ -34,13 +32,11 @@ bus-frequency = <0>; // 166 MHz clock-frequency = <0>; // 825 MHz, from uboot 32-bit; - linux,phandle = <201>; }; }; memory { device_type = "memory"; - linux,phandle = <300>; reg = <00000000 08000000>; // 128M at 0x0 }; @@ -58,7 +54,7 @@ compatible = "fsl-i2c"; reg = <3000 100>; interrupts = <1b 2>; - interrupt-parent = <40000>; + interrupt-parent = <&mpic>; dfsrr; }; @@ -68,32 +64,26 @@ device_type = "mdio"; compatible = "gianfar"; reg = <24520 20>; - linux,phandle = <24520>; - ethernet-phy@0 { - linux,phandle = <2452000>; - interrupt-parent = <40000>; + phy0: ethernet-phy@0 { + interrupt-parent = <&mpic>; interrupts = <35 0>; reg = <0>; device_type = "ethernet-phy"; }; - ethernet-phy@1 { - linux,phandle = <2452001>; - interrupt-parent = <40000>; + phy1: ethernet-phy@1 { + interrupt-parent = <&mpic>; interrupts = <35 0>; reg = <1>; device_type = "ethernet-phy"; }; - - ethernet-phy@2 { - linux,phandle = <2452002>; - interrupt-parent = <40000>; + phy2: ethernet-phy@2 { + interrupt-parent = <&mpic>; interrupts = <35 0>; reg = <2>; device_type = "ethernet-phy"; }; - ethernet-phy@3 { - linux,phandle = <2452003>; - interrupt-parent = <40000>; + phy3: ethernet-phy@3 { + interrupt-parent = <&mpic>; interrupts = <35 0>; reg = <3>; device_type = "ethernet-phy"; @@ -109,8 +99,8 @@ reg = <24000 1000>; local-mac-address = [ 00 E0 0C 00 73 00 ]; interrupts = <d 2 e 2 12 2>; - interrupt-parent = <40000>; - phy-handle = <2452000>; + interrupt-parent = <&mpic>; + phy-handle = <&phy0>; }; ethernet@25000 { @@ -122,10 +112,11 @@ reg = <25000 1000>; local-mac-address = [ 00 E0 0C 00 73 01 ]; interrupts = <13 2 14 2 18 2>; - interrupt-parent = <40000>; - phy-handle = <2452001>; + interrupt-parent = <&mpic>; + phy-handle = <&phy1>; }; +/* eTSEC 3/4 are currently broken ethernet@26000 { #address-cells = <1>; #size-cells = <0>; @@ -135,11 +126,10 @@ reg = <26000 1000>; local-mac-address = [ 00 E0 0C 00 73 02 ]; interrupts = <f 2 10 2 11 2>; - interrupt-parent = <40000>; - phy-handle = <2452001>; + interrupt-parent = <&mpic>; + phy-handle = <&phy2>; }; -/* eTSEC 4 is currently broken ethernet@27000 { #address-cells = <1>; #size-cells = <0>; @@ -149,8 +139,8 @@ reg = <27000 1000>; local-mac-address = [ 00 E0 0C 00 73 03 ]; interrupts = <15 2 16 2 17 2>; - interrupt-parent = <40000>; - phy-handle = <2452001>; + interrupt-parent = <&mpic>; + phy-handle = <&phy3>; }; */ @@ -160,7 +150,7 @@ reg = <4500 100>; // reg base, size clock-frequency = <0>; // should we fill in in uboot? interrupts = <1a 2>; - interrupt-parent = <40000>; + interrupt-parent = <&mpic>; }; serial@4600 { @@ -169,57 +159,56 @@ reg = <4600 100>; // reg base, size clock-frequency = <0>; // should we fill in in uboot? interrupts = <1a 2>; - interrupt-parent = <40000>; + interrupt-parent = <&mpic>; }; - pci@8000 { - linux,phandle = <8000>; + pci1: pci@8000 { interrupt-map-mask = <1f800 0 0 7>; interrupt-map = < /* IDSEL 0x10 */ - 08000 0 0 1 40000 30 1 - 08000 0 0 2 40000 31 1 - 08000 0 0 3 40000 32 1 - 08000 0 0 4 40000 33 1 + 08000 0 0 1 &mpic 30 1 + 08000 0 0 2 &mpic 31 1 + 08000 0 0 3 &mpic 32 1 + 08000 0 0 4 &mpic 33 1 /* IDSEL 0x11 */ - 08800 0 0 1 40000 30 1 - 08800 0 0 2 40000 31 1 - 08800 0 0 3 40000 32 1 - 08800 0 0 4 40000 33 1 + 08800 0 0 1 &mpic 30 1 + 08800 0 0 2 &mpic 31 1 + 08800 0 0 3 &mpic 32 1 + 08800 0 0 4 &mpic 33 1 /* IDSEL 0x12 (Slot 1) */ - 09000 0 0 1 40000 30 1 - 09000 0 0 2 40000 31 1 - 09000 0 0 3 40000 32 1 - 09000 0 0 4 40000 33 1 + 09000 0 0 1 &mpic 30 1 + 09000 0 0 2 &mpic 31 1 + 09000 0 0 3 &mpic 32 1 + 09000 0 0 4 &mpic 33 1 /* IDSEL 0x13 (Slot 2) */ - 09800 0 0 1 40000 31 1 - 09800 0 0 2 40000 32 1 - 09800 0 0 3 40000 33 1 - 09800 0 0 4 40000 30 1 + 09800 0 0 1 &mpic 31 1 + 09800 0 0 2 &mpic 32 1 + 09800 0 0 3 &mpic 33 1 + 09800 0 0 4 &mpic 30 1 /* IDSEL 0x14 (Slot 3) */ - 0a000 0 0 1 40000 32 1 - 0a000 0 0 2 40000 33 1 - 0a000 0 0 3 40000 30 1 - 0a000 0 0 4 40000 31 1 + 0a000 0 0 1 &mpic 32 1 + 0a000 0 0 2 &mpic 33 1 + 0a000 0 0 3 &mpic 30 1 + 0a000 0 0 4 &mpic 31 1 /* IDSEL 0x15 (Slot 4) */ - 0a800 0 0 1 40000 33 1 - 0a800 0 0 2 40000 30 1 - 0a800 0 0 3 40000 31 1 - 0a800 0 0 4 40000 32 1 + 0a800 0 0 1 &mpic 33 1 + 0a800 0 0 2 &mpic 30 1 + 0a800 0 0 3 &mpic 31 1 + 0a800 0 0 4 &mpic 32 1 /* Bus 1 (Tundra Bridge) */ /* IDSEL 0x12 (ISA bridge) */ - 19000 0 0 1 40000 30 1 - 19000 0 0 2 40000 31 1 - 19000 0 0 3 40000 32 1 - 19000 0 0 4 40000 33 1>; - interrupt-parent = <40000>; + 19000 0 0 1 &mpic 30 1 + 19000 0 0 2 &mpic 31 1 + 19000 0 0 3 &mpic 32 1 + 19000 0 0 4 &mpic 33 1>; + interrupt-parent = <&mpic>; interrupts = <08 2>; bus-range = <0 0>; ranges = <02000000 0 80000000 80000000 0 20000000 @@ -243,21 +232,20 @@ compatible = "chrp,iic"; big-endian; interrupts = <1>; - interrupt-parent = <8000>; + interrupt-parent = <&pci1>; }; }; pci@9000 { - linux,phandle = <9000>; interrupt-map-mask = <f800 0 0 7>; interrupt-map = < /* IDSEL 0x15 */ - a800 0 0 1 40000 3b 1 - a800 0 0 2 40000 3b 1 - a800 0 0 3 40000 3b 1 - a800 0 0 4 40000 3b 1>; - interrupt-parent = <40000>; + a800 0 0 1 &mpic 3b 1 + a800 0 0 2 &mpic 3b 1 + a800 0 0 3 &mpic 3b 1 + a800 0 0 4 &mpic 3b 1>; + interrupt-parent = <&mpic>; interrupts = <09 2>; bus-range = <0 0>; ranges = <02000000 0 a0000000 a0000000 0 20000000 @@ -271,8 +259,7 @@ device_type = "pci"; }; - pic@40000 { - linux,phandle = <40000>; + mpic: pic@40000 { clock-frequency = <0>; interrupt-controller; #address-cells = <0>; diff --git a/arch/powerpc/boot/dts/mpc8555cds.dts b/arch/powerpc/boot/dts/mpc8555cds.dts index 118f5a887651..5f9c102a0ab4 100644 --- a/arch/powerpc/boot/dts/mpc8555cds.dts +++ b/arch/powerpc/boot/dts/mpc8555cds.dts @@ -12,16 +12,14 @@ / { model = "MPC8555CDS"; - compatible = "MPC85xxCDS"; + compatible = "MPC8555CDS", "MPC85xxCDS"; #address-cells = <1>; #size-cells = <1>; - linux,phandle = <100>; cpus { #cpus = <1>; #address-cells = <1>; #size-cells = <0>; - linux,phandle = <200>; PowerPC,8555@0 { device_type = "cpu"; @@ -34,13 +32,11 @@ bus-frequency = <0>; // 166 MHz clock-frequency = <0>; // 825 MHz, from uboot 32-bit; - linux,phandle = <201>; }; }; memory { device_type = "memory"; - linux,phandle = <300>; reg = <00000000 08000000>; // 128M at 0x0 }; @@ -58,7 +54,7 @@ compatible = "fsl-i2c"; reg = <3000 100>; interrupts = <1b 2>; - interrupt-parent = <40000>; + interrupt-parent = <&mpic>; dfsrr; }; @@ -68,17 +64,14 @@ device_type = "mdio"; compatible = "gianfar"; reg = <24520 20>; - linux,phandle = <24520>; - ethernet-phy@0 { - linux,phandle = <2452000>; - interrupt-parent = <40000>; + phy0: ethernet-phy@0 { + interrupt-parent = <&mpic>; interrupts = <35 0>; reg = <0>; device_type = "ethernet-phy"; }; - ethernet-phy@1 { - linux,phandle = <2452001>; - interrupt-parent = <40000>; + phy1: ethernet-phy@1 { + interrupt-parent = <&mpic>; interrupts = <35 0>; reg = <1>; device_type = "ethernet-phy"; @@ -94,8 +87,8 @@ reg = <24000 1000>; local-mac-address = [ 00 E0 0C 00 73 00 ]; interrupts = <0d 2 0e 2 12 2>; - interrupt-parent = <40000>; - phy-handle = <2452000>; + interrupt-parent = <&mpic>; + phy-handle = <&phy0>; }; ethernet@25000 { @@ -107,8 +100,8 @@ reg = <25000 1000>; local-mac-address = [ 00 E0 0C 00 73 01 ]; interrupts = <13 2 14 2 18 2>; - interrupt-parent = <40000>; - phy-handle = <2452001>; + interrupt-parent = <&mpic>; + phy-handle = <&phy1>; }; serial@4500 { @@ -117,7 +110,7 @@ reg = <4500 100>; // reg base, size clock-frequency = <0>; // should we fill in in uboot? interrupts = <1a 2>; - interrupt-parent = <40000>; + interrupt-parent = <&mpic>; }; serial@4600 { @@ -126,57 +119,56 @@ reg = <4600 100>; // reg base, size clock-frequency = <0>; // should we fill in in uboot? interrupts = <1a 2>; - interrupt-parent = <40000>; + interrupt-parent = <&mpic>; }; - pci@8000 { - linux,phandle = <8000>; + pci1: pci@8000 { interrupt-map-mask = <1f800 0 0 7>; interrupt-map = < /* IDSEL 0x10 */ - 08000 0 0 1 40000 30 1 - 08000 0 0 2 40000 31 1 - 08000 0 0 3 40000 32 1 - 08000 0 0 4 40000 33 1 + 08000 0 0 1 &mpic 30 1 + 08000 0 0 2 &mpic 31 1 + 08000 0 0 3 &mpic 32 1 + 08000 0 0 4 &mpic 33 1 /* IDSEL 0x11 */ - 08800 0 0 1 40000 30 1 - 08800 0 0 2 40000 31 1 - 08800 0 0 3 40000 32 1 - 08800 0 0 4 40000 33 1 + 08800 0 0 1 &mpic 30 1 + 08800 0 0 2 &mpic 31 1 + 08800 0 0 3 &mpic 32 1 + 08800 0 0 4 &mpic 33 1 /* IDSEL 0x12 (Slot 1) */ - 09000 0 0 1 40000 30 1 - 09000 0 0 2 40000 31 1 - 09000 0 0 3 40000 32 1 - 09000 0 0 4 40000 33 1 + 09000 0 0 1 &mpic 30 1 + 09000 0 0 2 &mpic 31 1 + 09000 0 0 3 &mpic 32 1 + 09000 0 0 4 &mpic 33 1 /* IDSEL 0x13 (Slot 2) */ - 09800 0 0 1 40000 31 1 - 09800 0 0 2 40000 32 1 - 09800 0 0 3 40000 33 1 - 09800 0 0 4 40000 30 1 + 09800 0 0 1 &mpic 31 1 + 09800 0 0 2 &mpic 32 1 + 09800 0 0 3 &mpic 33 1 + 09800 0 0 4 &mpic 30 1 /* IDSEL 0x14 (Slot 3) */ - 0a000 0 0 1 40000 32 1 - 0a000 0 0 2 40000 33 1 - 0a000 0 0 3 40000 30 1 - 0a000 0 0 4 40000 31 1 + 0a000 0 0 1 &mpic 32 1 + 0a000 0 0 2 &mpic 33 1 + 0a000 0 0 3 &mpic 30 1 + 0a000 0 0 4 &mpic 31 1 /* IDSEL 0x15 (Slot 4) */ - 0a800 0 0 1 40000 33 1 - 0a800 0 0 2 40000 30 1 - 0a800 0 0 3 40000 31 1 - 0a800 0 0 4 40000 32 1 + 0a800 0 0 1 &mpic 33 1 + 0a800 0 0 2 &mpic 30 1 + 0a800 0 0 3 &mpic 31 1 + 0a800 0 0 4 &mpic 32 1 /* Bus 1 (Tundra Bridge) */ /* IDSEL 0x12 (ISA bridge) */ - 19000 0 0 1 40000 30 1 - 19000 0 0 2 40000 31 1 - 19000 0 0 3 40000 32 1 - 19000 0 0 4 40000 33 1>; - interrupt-parent = <40000>; + 19000 0 0 1 &mpic 30 1 + 19000 0 0 2 &mpic 31 1 + 19000 0 0 3 &mpic 32 1 + 19000 0 0 4 &mpic 33 1>; + interrupt-parent = <&mpic>; interrupts = <08 2>; bus-range = <0 0>; ranges = <02000000 0 80000000 80000000 0 20000000 @@ -200,21 +192,20 @@ compatible = "chrp,iic"; big-endian; interrupts = <1>; - interrupt-parent = <8000>; + interrupt-parent = <&pci1>; }; }; pci@9000 { - linux,phandle = <9000>; interrupt-map-mask = <f800 0 0 7>; interrupt-map = < /* IDSEL 0x15 */ - a800 0 0 1 40000 3b 1 - a800 0 0 2 40000 3b 1 - a800 0 0 3 40000 3b 1 - a800 0 0 4 40000 3b 1>; - interrupt-parent = <40000>; + a800 0 0 1 &mpic 3b 1 + a800 0 0 2 &mpic 3b 1 + a800 0 0 3 &mpic 3b 1 + a800 0 0 4 &mpic 3b 1>; + interrupt-parent = <&mpic>; interrupts = <09 2>; bus-range = <0 0>; ranges = <02000000 0 a0000000 a0000000 0 20000000 @@ -228,8 +219,7 @@ device_type = "pci"; }; - pic@40000 { - linux,phandle = <40000>; + mpic: pic@40000 { clock-frequency = <0>; interrupt-controller; #address-cells = <0>; diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts b/arch/powerpc/boot/dts/mpc8560ads.dts index 2b168486aeba..10502638b0e9 100644 --- a/arch/powerpc/boot/dts/mpc8560ads.dts +++ b/arch/powerpc/boot/dts/mpc8560ads.dts @@ -12,16 +12,14 @@ / { model = "MPC8560ADS"; - compatible = "MPC85xxADS"; + compatible = "MPC8560ADS", "MPC85xxADS"; #address-cells = <1>; #size-cells = <1>; - linux,phandle = <100>; cpus { #cpus = <1>; #address-cells = <1>; #size-cells = <0>; - linux,phandle = <200>; PowerPC,8560@0 { device_type = "cpu"; @@ -34,14 +32,11 @@ bus-frequency = <13ab6680>; clock-frequency = <312c8040>; 32-bit; - linux,phandle = <201>; - linux,boot-cpu; }; }; memory { device_type = "memory"; - linux,phandle = <300>; reg = <00000000 10000000>; }; @@ -58,33 +53,28 @@ device_type = "mdio"; compatible = "gianfar"; reg = <24520 20>; - linux,phandle = <24520>; #address-cells = <1>; #size-cells = <0>; - ethernet-phy@0 { - linux,phandle = <2452000>; - interrupt-parent = <40000>; + phy0: ethernet-phy@0 { + interrupt-parent = <&mpic>; interrupts = <35 1>; reg = <0>; device_type = "ethernet-phy"; }; - ethernet-phy@1 { - linux,phandle = <2452001>; - interrupt-parent = <40000>; + phy1: ethernet-phy@1 { + interrupt-parent = <&mpic>; interrupts = <35 1>; reg = <1>; device_type = "ethernet-phy"; }; - ethernet-phy@2 { - linux,phandle = <2452002>; - interrupt-parent = <40000>; + phy2: ethernet-phy@2 { + interrupt-parent = <&mpic>; interrupts = <37 1>; reg = <2>; device_type = "ethernet-phy"; }; - ethernet-phy@3 { - linux,phandle = <2452003>; - interrupt-parent = <40000>; + phy3: ethernet-phy@3 { + interrupt-parent = <&mpic>; interrupts = <37 1>; reg = <3>; device_type = "ethernet-phy"; @@ -98,8 +88,8 @@ reg = <24000 1000>; address = [ 00 00 0C 00 00 FD ]; interrupts = <d 2 e 2 12 2>; - interrupt-parent = <40000>; - phy-handle = <2452000>; + interrupt-parent = <&mpic>; + phy-handle = <&phy0>; }; ethernet@25000 { @@ -111,12 +101,11 @@ reg = <25000 1000>; address = [ 00 00 0C 00 01 FD ]; interrupts = <13 2 14 2 18 2>; - interrupt-parent = <40000>; - phy-handle = <2452001>; + interrupt-parent = <&mpic>; + phy-handle = <&phy1>; }; pci@8000 { - linux,phandle = <8000>; #interrupt-cells = <1>; #size-cells = <2>; #address-cells = <3>; @@ -128,96 +117,94 @@ interrupt-map = < /* IDSEL 0x2 */ - 1000 0 0 1 40000 31 1 - 1000 0 0 2 40000 32 1 - 1000 0 0 3 40000 33 1 - 1000 0 0 4 40000 34 1 + 1000 0 0 1 &mpic 31 1 + 1000 0 0 2 &mpic 32 1 + 1000 0 0 3 &mpic 33 1 + 1000 0 0 4 &mpic 34 1 /* IDSEL 0x3 */ - 1800 0 0 1 40000 34 1 - 1800 0 0 2 40000 31 1 - 1800 0 0 3 40000 32 1 - 1800 0 0 4 40000 33 1 + 1800 0 0 1 &mpic 34 1 + 1800 0 0 2 &mpic 31 1 + 1800 0 0 3 &mpic 32 1 + 1800 0 0 4 &mpic 33 1 /* IDSEL 0x4 */ - 2000 0 0 1 40000 33 1 - 2000 0 0 2 40000 34 1 - 2000 0 0 3 40000 31 1 - 2000 0 0 4 40000 32 1 + 2000 0 0 1 &mpic 33 1 + 2000 0 0 2 &mpic 34 1 + 2000 0 0 3 &mpic 31 1 + 2000 0 0 4 &mpic 32 1 /* IDSEL 0x5 */ - 2800 0 0 1 40000 32 1 - 2800 0 0 2 40000 33 1 - 2800 0 0 3 40000 34 1 - 2800 0 0 4 40000 31 1 + 2800 0 0 1 &mpic 32 1 + 2800 0 0 2 &mpic 33 1 + 2800 0 0 3 &mpic 34 1 + 2800 0 0 4 &mpic 31 1 /* IDSEL 12 */ - 6000 0 0 1 40000 31 1 - 6000 0 0 2 40000 32 1 - 6000 0 0 3 40000 33 1 - 6000 0 0 4 40000 34 1 + 6000 0 0 1 &mpic 31 1 + 6000 0 0 2 &mpic 32 1 + 6000 0 0 3 &mpic 33 1 + 6000 0 0 4 &mpic 34 1 /* IDSEL 13 */ - 6800 0 0 1 40000 34 1 - 6800 0 0 2 40000 31 1 - 6800 0 0 3 40000 32 1 - 6800 0 0 4 40000 33 1 + 6800 0 0 1 &mpic 34 1 + 6800 0 0 2 &mpic 31 1 + 6800 0 0 3 &mpic 32 1 + 6800 0 0 4 &mpic 33 1 /* IDSEL 14*/ - 7000 0 0 1 40000 33 1 - 7000 0 0 2 40000 34 1 - 7000 0 0 3 40000 31 1 - 7000 0 0 4 40000 32 1 + 7000 0 0 1 &mpic 33 1 + 7000 0 0 2 &mpic 34 1 + 7000 0 0 3 &mpic 31 1 + 7000 0 0 4 &mpic 32 1 /* IDSEL 15 */ - 7800 0 0 1 40000 32 1 - 7800 0 0 2 40000 33 1 - 7800 0 0 3 40000 34 1 - 7800 0 0 4 40000 31 1 + 7800 0 0 1 &mpic 32 1 + 7800 0 0 2 &mpic 33 1 + 7800 0 0 3 &mpic 34 1 + 7800 0 0 4 &mpic 31 1 /* IDSEL 18 */ - 9000 0 0 1 40000 31 1 - 9000 0 0 2 40000 32 1 - 9000 0 0 3 40000 33 1 - 9000 0 0 4 40000 34 1 + 9000 0 0 1 &mpic 31 1 + 9000 0 0 2 &mpic 32 1 + 9000 0 0 3 &mpic 33 1 + 9000 0 0 4 &mpic 34 1 /* IDSEL 19 */ - 9800 0 0 1 40000 34 1 - 9800 0 0 2 40000 31 1 - 9800 0 0 3 40000 32 1 - 9800 0 0 4 40000 33 1 + 9800 0 0 1 &mpic 34 1 + 9800 0 0 2 &mpic 31 1 + 9800 0 0 3 &mpic 32 1 + 9800 0 0 4 &mpic 33 1 /* IDSEL 20 */ - a000 0 0 1 40000 33 1 - a000 0 0 2 40000 34 1 - a000 0 0 3 40000 31 1 - a000 0 0 4 40000 32 1 + a000 0 0 1 &mpic 33 1 + a000 0 0 2 &mpic 34 1 + a000 0 0 3 &mpic 31 1 + a000 0 0 4 &mpic 32 1 /* IDSEL 21 */ - a800 0 0 1 40000 32 1 - a800 0 0 2 40000 33 1 - a800 0 0 3 40000 34 1 - a800 0 0 4 40000 31 1>; + a800 0 0 1 &mpic 32 1 + a800 0 0 2 &mpic 33 1 + a800 0 0 3 &mpic 34 1 + a800 0 0 4 &mpic 31 1>; - interrupt-parent = <40000>; - interrupts = <42 0>; + interrupt-parent = <&mpic>; + interrupts = <8 0>; bus-range = <0 0>; ranges = <02000000 0 80000000 80000000 0 20000000 01000000 0 00000000 e2000000 0 01000000>; }; - pic@40000 { - linux,phandle = <40000>; + mpic: pic@40000 { interrupt-controller; #address-cells = <0>; #interrupt-cells = <2>; - reg = <40000 20100>; + reg = <40000 40000>; built-in; device_type = "open-pic"; }; cpm@e0000000 { - linux,phandle = <e0000000>; #address-cells = <1>; #size-cells = <1>; #interrupt-cells = <2>; @@ -228,13 +215,12 @@ command-proc = <919c0>; brg-frequency = <9d5b340>; - pic@90c00 { - linux,phandle = <90c00>; + cpmpic: pic@90c00 { interrupt-controller; #address-cells = <0>; #interrupt-cells = <2>; interrupts = <1e 0>; - interrupt-parent = <40000>; + interrupt-parent = <&mpic>; reg = <90c00 80>; built-in; device_type = "cpm-pic"; @@ -250,8 +236,8 @@ rx-clock = <1>; tx-clock = <1>; current-speed = <1c200>; - interrupts = <64 1>; - interrupt-parent = <90c00>; + interrupts = <28 8>; + interrupt-parent = <&cpmpic>; }; scc@91a20 { @@ -264,8 +250,8 @@ rx-clock = <2>; tx-clock = <2>; current-speed = <1c200>; - interrupts = <65 1>; - interrupt-parent = <90c00>; + interrupts = <29 8>; + interrupt-parent = <&cpmpic>; }; fcc@91320 { @@ -278,9 +264,9 @@ clock-setup = <ff00ffff 250000>; rx-clock = <15>; tx-clock = <16>; - interrupts = <5d 1>; - interrupt-parent = <90c00>; - phy-handle = <2452002>; + interrupts = <21 8>; + interrupt-parent = <&cpmpic>; + phy-handle = <&phy2>; }; fcc@91340 { @@ -293,9 +279,9 @@ clock-setup = <ffff00ff 3700>; rx-clock = <17>; tx-clock = <18>; - interrupts = <5e 1>; - interrupt-parent = <90c00>; - phy-handle = <2452003>; + interrupts = <22 8>; + interrupt-parent = <&cpmpic>; + phy-handle = <&phy3>; }; }; }; diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts new file mode 100644 index 000000000000..bf49d8c997b9 --- /dev/null +++ b/arch/powerpc/boot/dts/mpc8568mds.dts @@ -0,0 +1,362 @@ +/* + * MPC8568E MDS Device Tree Source + * + * Copyright 2007 Freescale Semiconductor Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + + +/* +/memreserve/ 00000000 1000000; +*/ + +/ { + model = "MPC8568EMDS"; + compatible = "MPC8568EMDS", "MPC85xxMDS"; + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #cpus = <1>; + #address-cells = <1>; + #size-cells = <0>; + + PowerPC,8568@0 { + device_type = "cpu"; + reg = <0>; + d-cache-line-size = <20>; // 32 bytes + i-cache-line-size = <20>; // 32 bytes + d-cache-size = <8000>; // L1, 32K + i-cache-size = <8000>; // L1, 32K + timebase-frequency = <0>; + bus-frequency = <0>; + clock-frequency = <0>; + 32-bit; + }; + }; + + memory { + device_type = "memory"; + reg = <00000000 10000000>; + }; + + bcsr@f8000000 { + device_type = "board-control"; + reg = <f8000000 8000>; + }; + + soc8568@e0000000 { + #address-cells = <1>; + #size-cells = <1>; + #interrupt-cells = <2>; + device_type = "soc"; + ranges = <0 e0000000 00100000>; + reg = <e0000000 00100000>; + bus-frequency = <0>; + + i2c@3000 { + device_type = "i2c"; + compatible = "fsl-i2c"; + reg = <3000 100>; + interrupts = <1b 2>; + interrupt-parent = <&mpic>; + dfsrr; + }; + + i2c@3100 { + device_type = "i2c"; + compatible = "fsl-i2c"; + reg = <3100 100>; + interrupts = <1b 2>; + interrupt-parent = <&mpic>; + dfsrr; + }; + + mdio@24520 { + #address-cells = <1>; + #size-cells = <0>; + device_type = "mdio"; + compatible = "gianfar"; + reg = <24520 20>; + phy0: ethernet-phy@0 { + interrupt-parent = <&mpic>; + interrupts = <31 1>; + reg = <0>; + device_type = "ethernet-phy"; + }; + phy1: ethernet-phy@1 { + interrupt-parent = <&mpic>; + interrupts = <32 1>; + reg = <1>; + device_type = "ethernet-phy"; + }; + phy2: ethernet-phy@2 { + interrupt-parent = <&mpic>; + interrupts = <31 1>; + reg = <2>; + device_type = "ethernet-phy"; + }; + phy3: ethernet-phy@3 { + interrupt-parent = <&mpic>; + interrupts = <32 1>; + reg = <3>; + device_type = "ethernet-phy"; + }; + }; + + ethernet@24000 { + #address-cells = <1>; + #size-cells = <0>; + device_type = "network"; + model = "eTSEC"; + compatible = "gianfar"; + reg = <24000 1000>; + mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <d 2 e 2 12 2>; + interrupt-parent = <&mpic>; + phy-handle = <&phy2>; + }; + + ethernet@25000 { + #address-cells = <1>; + #size-cells = <0>; + device_type = "network"; + model = "eTSEC"; + compatible = "gianfar"; + reg = <25000 1000>; + mac-address = [ 00 00 00 00 00 00]; + interrupts = <13 2 14 2 18 2>; + interrupt-parent = <&mpic>; + phy-handle = <&phy3>; + }; + + serial@4500 { + device_type = "serial"; + compatible = "ns16550"; + reg = <4500 100>; + clock-frequency = <0>; + interrupts = <1a 2>; + interrupt-parent = <&mpic>; + }; + + serial@4600 { + device_type = "serial"; + compatible = "ns16550"; + reg = <4600 100>; + clock-frequency = <0>; + interrupts = <1a 2>; + interrupt-parent = <&mpic>; + }; + + crypto@30000 { + device_type = "crypto"; + model = "SEC2"; + compatible = "talitos"; + reg = <30000 f000>; + interrupts = <1d 2>; + interrupt-parent = <&mpic>; + num-channels = <4>; + channel-fifo-len = <18>; + exec-units-mask = <000000fe>; + descriptor-types-mask = <012b0ebf>; + }; + + mpic: pic@40000 { + clock-frequency = <0>; + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <2>; + reg = <40000 40000>; + built-in; + compatible = "chrp,open-pic"; + device_type = "open-pic"; + big-endian; + }; + par_io@e0100 { + reg = <e0100 100>; + device_type = "par_io"; + num-ports = <7>; + + pio1: ucc_pin@01 { + pio-map = < + /* port pin dir open_drain assignment has_irq */ + 4 0a 1 0 2 0 /* TxD0 */ + 4 09 1 0 2 0 /* TxD1 */ + 4 08 1 0 2 0 /* TxD2 */ + 4 07 1 0 2 0 /* TxD3 */ + 4 17 1 0 2 0 /* TxD4 */ + 4 16 1 0 2 0 /* TxD5 */ + 4 15 1 0 2 0 /* TxD6 */ + 4 14 1 0 2 0 /* TxD7 */ + 4 0f 2 0 2 0 /* RxD0 */ + 4 0e 2 0 2 0 /* RxD1 */ + 4 0d 2 0 2 0 /* RxD2 */ + 4 0c 2 0 2 0 /* RxD3 */ + 4 1d 2 0 2 0 /* RxD4 */ + 4 1c 2 0 2 0 /* RxD5 */ + 4 1b 2 0 2 0 /* RxD6 */ + 4 1a 2 0 2 0 /* RxD7 */ + 4 0b 1 0 2 0 /* TX_EN */ + 4 18 1 0 2 0 /* TX_ER */ + 4 0f 2 0 2 0 /* RX_DV */ + 4 1e 2 0 2 0 /* RX_ER */ + 4 11 2 0 2 0 /* RX_CLK */ + 4 13 1 0 2 0 /* GTX_CLK */ + 1 1f 2 0 3 0>; /* GTX125 */ + }; + pio2: ucc_pin@02 { + pio-map = < + /* port pin dir open_drain assignment has_irq */ + 5 0a 1 0 2 0 /* TxD0 */ + 5 09 1 0 2 0 /* TxD1 */ + 5 08 1 0 2 0 /* TxD2 */ + 5 07 1 0 2 0 /* TxD3 */ + 5 17 1 0 2 0 /* TxD4 */ + 5 16 1 0 2 0 /* TxD5 */ + 5 15 1 0 2 0 /* TxD6 */ + 5 14 1 0 2 0 /* TxD7 */ + 5 0f 2 0 2 0 /* RxD0 */ + 5 0e 2 0 2 0 /* RxD1 */ + 5 0d 2 0 2 0 /* RxD2 */ + 5 0c 2 0 2 0 /* RxD3 */ + 5 1d 2 0 2 0 /* RxD4 */ + 5 1c 2 0 2 0 /* RxD5 */ + 5 1b 2 0 2 0 /* RxD6 */ + 5 1a 2 0 2 0 /* RxD7 */ + 5 0b 1 0 2 0 /* TX_EN */ + 5 18 1 0 2 0 /* TX_ER */ + 5 10 2 0 2 0 /* RX_DV */ + 5 1e 2 0 2 0 /* RX_ER */ + 5 11 2 0 2 0 /* RX_CLK */ + 5 13 1 0 2 0 /* GTX_CLK */ + 1 1f 2 0 3 0 /* GTX125 */ + 4 06 3 0 2 0 /* MDIO */ + 4 05 1 0 2 0>; /* MDC */ + }; + }; + }; + + qe@e0080000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "qe"; + model = "QE"; + ranges = <0 e0080000 00040000>; + reg = <e0080000 480>; + brg-frequency = <0>; + bus-frequency = <179A7B00>; + + muram@10000 { + device_type = "muram"; + ranges = <0 00010000 0000c000>; + + data-only@0{ + reg = <0 c000>; + }; + }; + + spi@4c0 { + device_type = "spi"; + compatible = "fsl_spi"; + reg = <4c0 40>; + interrupts = <2>; + interrupt-parent = <&qeic>; + mode = "cpu"; + }; + + spi@500 { + device_type = "spi"; + compatible = "fsl_spi"; + reg = <500 40>; + interrupts = <1>; + interrupt-parent = <&qeic>; + mode = "cpu"; + }; + + ucc@2000 { + device_type = "network"; + compatible = "ucc_geth"; + model = "UCC"; + device-id = <1>; + reg = <2000 200>; + interrupts = <20>; + interrupt-parent = <&qeic>; + mac-address = [ 00 04 9f 00 23 23 ]; + rx-clock = <0>; + tx-clock = <19>; + phy-handle = <&qe_phy0>; + pio-handle = <&pio1>; + }; + + ucc@3000 { + device_type = "network"; + compatible = "ucc_geth"; + model = "UCC"; + device-id = <2>; + reg = <3000 200>; + interrupts = <21>; + interrupt-parent = <&qeic>; + mac-address = [ 00 11 22 33 44 55 ]; + rx-clock = <0>; + tx-clock = <14>; + phy-handle = <&qe_phy1>; + pio-handle = <&pio2>; + }; + + mdio@2120 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2120 18>; + device_type = "mdio"; + compatible = "ucc_geth_phy"; + + /* These are the same PHYs as on + * gianfar's MDIO bus */ + qe_phy0: ethernet-phy@00 { + interrupt-parent = <&mpic>; + interrupts = <31 1>; + reg = <0>; + device_type = "ethernet-phy"; + interface = <6>; //ENET_1000_GMII + }; + qe_phy1: ethernet-phy@01 { + interrupt-parent = <&mpic>; + interrupts = <32 1>; + reg = <1>; + device_type = "ethernet-phy"; + interface = <6>; + }; + qe_phy2: ethernet-phy@02 { + interrupt-parent = <&mpic>; + interrupts = <31 1>; + reg = <2>; + device_type = "ethernet-phy"; + interface = <6>; //ENET_1000_GMII + }; + qe_phy3: ethernet-phy@03 { + interrupt-parent = <&mpic>; + interrupts = <32 1>; + reg = <3>; + device_type = "ethernet-phy"; + interface = <6>; //ENET_1000_GMII + }; + }; + + qeic: qeic@80 { + interrupt-controller; + device_type = "qeic"; + #address-cells = <0>; + #interrupt-cells = <1>; + reg = <80 80>; + built-in; + big-endian; + interrupts = <1e 2 1e 2>; //high:30 low:30 + interrupt-parent = <&mpic>; + }; + + }; +}; diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn.dts b/arch/powerpc/boot/dts/mpc8641_hpcn.dts index f0c7731743ea..8a4995a85ba0 100644 --- a/arch/powerpc/boot/dts/mpc8641_hpcn.dts +++ b/arch/powerpc/boot/dts/mpc8641_hpcn.dts @@ -32,7 +32,6 @@ bus-frequency = <0>; // From uboot clock-frequency = <0>; // From uboot 32-bit; - linux,boot-cpu; }; PowerPC,8641@1 { device_type = "cpu"; @@ -67,7 +66,7 @@ compatible = "fsl-i2c"; reg = <3000 100>; interrupts = <2b 2>; - interrupt-parent = <40000>; + interrupt-parent = <&mpic>; dfsrr; }; @@ -76,7 +75,7 @@ compatible = "fsl-i2c"; reg = <3100 100>; interrupts = <2b 2>; - interrupt-parent = <40000>; + interrupt-parent = <&mpic>; dfsrr; }; @@ -86,31 +85,26 @@ device_type = "mdio"; compatible = "gianfar"; reg = <24520 20>; - linux,phandle = <24520>; - ethernet-phy@0 { - linux,phandle = <2452000>; - interrupt-parent = <40000>; + phy0: ethernet-phy@0 { + interrupt-parent = <&mpic>; interrupts = <4a 1>; reg = <0>; device_type = "ethernet-phy"; }; - ethernet-phy@1 { - linux,phandle = <2452001>; - interrupt-parent = <40000>; + phy1: ethernet-phy@1 { + interrupt-parent = <&mpic>; interrupts = <4a 1>; reg = <1>; device_type = "ethernet-phy"; }; - ethernet-phy@2 { - linux,phandle = <2452002>; - interrupt-parent = <40000>; + phy2: ethernet-phy@2 { + interrupt-parent = <&mpic>; interrupts = <4a 1>; reg = <2>; device_type = "ethernet-phy"; }; - ethernet-phy@3 { - linux,phandle = <2452003>; - interrupt-parent = <40000>; + phy3: ethernet-phy@3 { + interrupt-parent = <&mpic>; interrupts = <4a 1>; reg = <3>; device_type = "ethernet-phy"; @@ -126,8 +120,8 @@ reg = <24000 1000>; mac-address = [ 00 E0 0C 00 73 00 ]; interrupts = <1d 2 1e 2 22 2>; - interrupt-parent = <40000>; - phy-handle = <2452000>; + interrupt-parent = <&mpic>; + phy-handle = <&phy0>; }; ethernet@25000 { @@ -139,8 +133,8 @@ reg = <25000 1000>; mac-address = [ 00 E0 0C 00 73 01 ]; interrupts = <23 2 24 2 28 2>; - interrupt-parent = <40000>; - phy-handle = <2452001>; + interrupt-parent = <&mpic>; + phy-handle = <&phy1>; }; ethernet@26000 { @@ -152,8 +146,8 @@ reg = <26000 1000>; mac-address = [ 00 E0 0C 00 02 FD ]; interrupts = <1F 2 20 2 21 2>; - interrupt-parent = <40000>; - phy-handle = <2452002>; + interrupt-parent = <&mpic>; + phy-handle = <&phy2>; }; ethernet@27000 { @@ -165,8 +159,8 @@ reg = <27000 1000>; mac-address = [ 00 E0 0C 00 03 FD ]; interrupts = <25 2 26 2 27 2>; - interrupt-parent = <40000>; - phy-handle = <2452003>; + interrupt-parent = <&mpic>; + phy-handle = <&phy3>; }; serial@4500 { device_type = "serial"; @@ -174,7 +168,7 @@ reg = <4500 100>; clock-frequency = <0>; interrupts = <2a 2>; - interrupt-parent = <40000>; + interrupt-parent = <&mpic>; }; serial@4600 { @@ -183,7 +177,7 @@ reg = <4600 100>; clock-frequency = <0>; interrupts = <1c 2>; - interrupt-parent = <40000>; + interrupt-parent = <&mpic>; }; pci@8000 { @@ -197,103 +191,102 @@ ranges = <02000000 0 80000000 80000000 0 20000000 01000000 0 00000000 e2000000 0 00100000>; clock-frequency = <1fca055>; - interrupt-parent = <40000>; + interrupt-parent = <&mpic>; interrupts = <18 2>; interrupt-map-mask = <f800 0 0 7>; interrupt-map = < /* IDSEL 0x11 */ - 8800 0 0 1 4d0 3 2 - 8800 0 0 2 4d0 4 2 - 8800 0 0 3 4d0 5 2 - 8800 0 0 4 4d0 6 2 + 8800 0 0 1 &i8259 3 2 + 8800 0 0 2 &i8259 4 2 + 8800 0 0 3 &i8259 5 2 + 8800 0 0 4 &i8259 6 2 /* IDSEL 0x12 */ - 9000 0 0 1 4d0 4 2 - 9000 0 0 2 4d0 5 2 - 9000 0 0 3 4d0 6 2 - 9000 0 0 4 4d0 3 2 + 9000 0 0 1 &i8259 4 2 + 9000 0 0 2 &i8259 5 2 + 9000 0 0 3 &i8259 6 2 + 9000 0 0 4 &i8259 3 2 /* IDSEL 0x13 */ - 9800 0 0 1 4d0 0 0 - 9800 0 0 2 4d0 0 0 - 9800 0 0 3 4d0 0 0 - 9800 0 0 4 4d0 0 0 + 9800 0 0 1 &i8259 0 0 + 9800 0 0 2 &i8259 0 0 + 9800 0 0 3 &i8259 0 0 + 9800 0 0 4 &i8259 0 0 /* IDSEL 0x14 */ - a000 0 0 1 4d0 0 0 - a000 0 0 2 4d0 0 0 - a000 0 0 3 4d0 0 0 - a000 0 0 4 4d0 0 0 + a000 0 0 1 &i8259 0 0 + a000 0 0 2 &i8259 0 0 + a000 0 0 3 &i8259 0 0 + a000 0 0 4 &i8259 0 0 /* IDSEL 0x15 */ - a800 0 0 1 4d0 0 0 - a800 0 0 2 4d0 0 0 - a800 0 0 3 4d0 0 0 - a800 0 0 4 4d0 0 0 + a800 0 0 1 &i8259 0 0 + a800 0 0 2 &i8259 0 0 + a800 0 0 3 &i8259 0 0 + a800 0 0 4 &i8259 0 0 /* IDSEL 0x16 */ - b000 0 0 1 4d0 0 0 - b000 0 0 2 4d0 0 0 - b000 0 0 3 4d0 0 0 - b000 0 0 4 4d0 0 0 + b000 0 0 1 &i8259 0 0 + b000 0 0 2 &i8259 0 0 + b000 0 0 3 &i8259 0 0 + b000 0 0 4 &i8259 0 0 /* IDSEL 0x17 */ - b800 0 0 1 4d0 0 0 - b800 0 0 2 4d0 0 0 - b800 0 0 3 4d0 0 0 - b800 0 0 4 4d0 0 0 + b800 0 0 1 &i8259 0 0 + b800 0 0 2 &i8259 0 0 + b800 0 0 3 &i8259 0 0 + b800 0 0 4 &i8259 0 0 /* IDSEL 0x18 */ - c000 0 0 1 4d0 0 0 - c000 0 0 2 4d0 0 0 - c000 0 0 3 4d0 0 0 - c000 0 0 4 4d0 0 0 + c000 0 0 1 &i8259 0 0 + c000 0 0 2 &i8259 0 0 + c000 0 0 3 &i8259 0 0 + c000 0 0 4 &i8259 0 0 /* IDSEL 0x19 */ - c800 0 0 1 4d0 0 0 - c800 0 0 2 4d0 0 0 - c800 0 0 3 4d0 0 0 - c800 0 0 4 4d0 0 0 + c800 0 0 1 &i8259 0 0 + c800 0 0 2 &i8259 0 0 + c800 0 0 3 &i8259 0 0 + c800 0 0 4 &i8259 0 0 /* IDSEL 0x1a */ - d000 0 0 1 4d0 6 2 - d000 0 0 2 4d0 3 2 - d000 0 0 3 4d0 4 2 - d000 0 0 4 4d0 5 2 + d000 0 0 1 &i8259 6 2 + d000 0 0 2 &i8259 3 2 + d000 0 0 3 &i8259 4 2 + d000 0 0 4 &i8259 5 2 /* IDSEL 0x1b */ - d800 0 0 1 4d0 5 2 - d800 0 0 2 4d0 0 0 - d800 0 0 3 4d0 0 0 - d800 0 0 4 4d0 0 0 + d800 0 0 1 &i8259 5 2 + d800 0 0 2 &i8259 0 0 + d800 0 0 3 &i8259 0 0 + d800 0 0 4 &i8259 0 0 /* IDSEL 0x1c */ - e000 0 0 1 4d0 9 2 - e000 0 0 2 4d0 a 2 - e000 0 0 3 4d0 c 2 - e000 0 0 4 4d0 7 2 + e000 0 0 1 &i8259 9 2 + e000 0 0 2 &i8259 a 2 + e000 0 0 3 &i8259 c 2 + e000 0 0 4 &i8259 7 2 /* IDSEL 0x1d */ - e800 0 0 1 4d0 9 2 - e800 0 0 2 4d0 a 2 - e800 0 0 3 4d0 b 2 - e800 0 0 4 4d0 0 0 + e800 0 0 1 &i8259 9 2 + e800 0 0 2 &i8259 a 2 + e800 0 0 3 &i8259 b 2 + e800 0 0 4 &i8259 0 0 /* IDSEL 0x1e */ - f000 0 0 1 4d0 c 2 - f000 0 0 2 4d0 0 0 - f000 0 0 3 4d0 0 0 - f000 0 0 4 4d0 0 0 + f000 0 0 1 &i8259 c 2 + f000 0 0 2 &i8259 0 0 + f000 0 0 3 &i8259 0 0 + f000 0 0 4 &i8259 0 0 /* IDSEL 0x1f */ - f800 0 0 1 4d0 6 2 - f800 0 0 2 4d0 0 0 - f800 0 0 3 4d0 0 0 - f800 0 0 4 4d0 0 0 + f800 0 0 1 &i8259 6 2 + f800 0 0 2 &i8259 0 0 + f800 0 0 3 &i8259 0 0 + f800 0 0 4 &i8259 0 0 >; - i8259@4d0 { - linux,phandle = <4d0>; + i8259: i8259@4d0 { clock-frequency = <0>; interrupt-controller; device_type = "interrupt-controller"; @@ -303,12 +296,11 @@ compatible = "chrp,iic"; big-endian; interrupts = <49 2>; - interrupt-parent = <40000>; + interrupt-parent = <&mpic>; }; }; - pic@40000 { - linux,phandle = <40000>; + mpic: pic@40000 { clock-frequency = <0>; interrupt-controller; #address-cells = <0>; @@ -317,23 +309,7 @@ built-in; compatible = "chrp,open-pic"; device_type = "open-pic"; - big-endian; - interrupts = < - 10 2 11 2 12 2 13 2 - 14 2 15 2 16 2 17 2 - 18 2 19 2 1a 2 1b 2 - 1c 2 1d 2 1e 2 1f 2 - 20 2 21 2 22 2 23 2 - 24 2 25 2 26 2 27 2 - 28 2 29 2 2a 2 2b 2 - 2c 2 2d 2 2e 2 2f 2 - 30 2 31 2 32 2 33 2 - 34 2 35 2 36 2 37 2 - 38 2 39 2 2a 2 3b 2 - 3c 2 3d 2 3e 2 3f 2 - 48 1 49 2 4a 1 - >; - interrupt-parent = <40000>; + big-endian; }; }; }; diff --git a/arch/powerpc/boot/dts/mpc866ads.dts b/arch/powerpc/boot/dts/mpc866ads.dts new file mode 100644 index 000000000000..2b56b5df451a --- /dev/null +++ b/arch/powerpc/boot/dts/mpc866ads.dts @@ -0,0 +1,161 @@ +/* + * MPC866 ADS Device Tree Source + * + * Copyright 2006 MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + + +/ { + model = "MPC866ADS"; + compatible = "mpc8xx"; + #address-cells = <1>; + #size-cells = <1>; + linux,phandle = <100>; + + cpus { + #cpus = <1>; + #address-cells = <1>; + #size-cells = <0>; + linux,phandle = <200>; + + PowerPC,866@0 { + device_type = "cpu"; + reg = <0>; + d-cache-line-size = <20>; // 32 bytes + i-cache-line-size = <20>; // 32 bytes + d-cache-size = <2000>; // L1, 8K + i-cache-size = <4000>; // L1, 16K + timebase-frequency = <0>; + bus-frequency = <0>; + clock-frequency = <0>; + 32-bit; + interrupts = <f 2>; // decrementer interrupt + interrupt-parent = <ff000000>; + linux,phandle = <201>; + }; + }; + + memory { + device_type = "memory"; + linux,phandle = <300>; + reg = <00000000 800000>; + }; + + soc866@ff000000 { + #address-cells = <1>; + #size-cells = <1>; + #interrupt-cells = <2>; + device_type = "soc"; + ranges = <0 ff000000 00100000>; + reg = <ff000000 00000200>; + bus-frequency = <0>; + mdio@e80 { + device_type = "mdio"; + compatible = "fs_enet"; + reg = <e80 8>; + linux,phandle = <e80>; + #address-cells = <1>; + #size-cells = <0>; + ethernet-phy@f { + linux,phandle = <e800f>; + reg = <f>; + device_type = "ethernet-phy"; + }; + }; + + fec@e00 { + device_type = "network"; + compatible = "fs_enet"; + model = "FEC"; + device-id = <1>; + reg = <e00 188>; + mac-address = [ 00 00 0C 00 01 FD ]; + interrupts = <3 1>; + interrupt-parent = <ff000000>; + phy-handle = <e800f>; + }; + + pic@ff000000 { + linux,phandle = <ff000000>; + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <2>; + reg = <0 24>; + built-in; + device_type = "mpc8xx-pic"; + compatible = "CPM"; + }; + + cpm@ff000000 { + linux,phandle = <ff000000>; + #address-cells = <1>; + #size-cells = <1>; + #interrupt-cells = <2>; + device_type = "cpm"; + model = "CPM"; + ranges = <0 0 4000>; + reg = <860 f0>; + command-proc = <9c0>; + brg-frequency = <0>; + interrupts = <0 2>; // cpm error interrupt + interrupt-parent = <930>; + + pic@930 { + linux,phandle = <930>; + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <2>; + interrupts = <5 2 0 2>; + interrupt-parent = <ff000000>; + reg = <930 20>; + built-in; + device_type = "cpm-pic"; + compatible = "CPM"; + }; + + smc@a80 { + device_type = "serial"; + compatible = "cpm_uart"; + model = "SMC"; + device-id = <1>; + reg = <a80 10 3e80 40>; + clock-setup = <00ffffff 0>; + rx-clock = <1>; + tx-clock = <1>; + current-speed = <0>; + interrupts = <4 3>; + interrupt-parent = <930>; + }; + + smc@a90 { + device_type = "serial"; + compatible = "cpm_uart"; + model = "SMC"; + device-id = <2>; + reg = <a90 20 3f80 40>; + clock-setup = <ff00ffff 90000>; + rx-clock = <2>; + tx-clock = <2>; + current-speed = <0>; + interrupts = <3 3>; + interrupt-parent = <930>; + }; + + scc@a00 { + device_type = "network"; + compatible = "fs_enet"; + model = "SCC"; + device-id = <1>; + reg = <a00 18 3c00 80>; + mac-address = [ 00 00 0C 00 03 FD ]; + interrupts = <1e 3>; + interrupt-parent = <930>; + }; + }; + }; +}; diff --git a/arch/powerpc/boot/dts/mpc885ads.dts b/arch/powerpc/boot/dts/mpc885ads.dts new file mode 100644 index 000000000000..faecd08c54da --- /dev/null +++ b/arch/powerpc/boot/dts/mpc885ads.dts @@ -0,0 +1,184 @@ +/* + * MPC885 ADS Device Tree Source + * + * Copyright 2006 MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + + +/ { + model = "MPC885ADS"; + compatible = "mpc8xx"; + #address-cells = <1>; + #size-cells = <1>; + linux,phandle = <100>; + + cpus { + #cpus = <1>; + #address-cells = <1>; + #size-cells = <0>; + linux,phandle = <200>; + + PowerPC,885@0 { + device_type = "cpu"; + reg = <0>; + d-cache-line-size = <20>; // 32 bytes + i-cache-line-size = <20>; // 32 bytes + d-cache-size = <2000>; // L1, 8K + i-cache-size = <2000>; // L1, 8K + timebase-frequency = <0>; + bus-frequency = <0>; + clock-frequency = <0>; + 32-bit; + interrupts = <f 2>; // decrementer interrupt + interrupt-parent = <ff000000>; + linux,phandle = <201>; + }; + }; + + memory { + device_type = "memory"; + linux,phandle = <300>; + reg = <00000000 800000>; + }; + + soc885@ff000000 { + #address-cells = <1>; + #size-cells = <1>; + #interrupt-cells = <2>; + device_type = "soc"; + ranges = <0 ff000000 00100000>; + reg = <ff000000 00000200>; + bus-frequency = <0>; + mdio@e80 { + device_type = "mdio"; + compatible = "fs_enet"; + reg = <e80 8>; + linux,phandle = <e80>; + #address-cells = <1>; + #size-cells = <0>; + ethernet-phy@0 { + linux,phandle = <e8000>; + reg = <0>; + device_type = "ethernet-phy"; + }; + ethernet-phy@1 { + linux,phandle = <e8001>; + reg = <1>; + device_type = "ethernet-phy"; + }; + ethernet-phy@2 { + linux,phandle = <e8002>; + reg = <2>; + device_type = "ethernet-phy"; + }; + }; + + fec@e00 { + device_type = "network"; + compatible = "fs_enet"; + model = "FEC"; + device-id = <1>; + reg = <e00 188>; + mac-address = [ 00 00 0C 00 01 FD ]; + interrupts = <3 1>; + interrupt-parent = <ff000000>; + phy-handle = <e8000>; + }; + + fec@1e00 { + device_type = "network"; + compatible = "fs_enet"; + model = "FEC"; + device-id = <2>; + reg = <1e00 188>; + mac-address = [ 00 00 0C 00 02 FD ]; + interrupts = <7 1>; + interrupt-parent = <ff000000>; + phy-handle = <e8001>; + }; + + pic@ff000000 { + linux,phandle = <ff000000>; + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <2>; + reg = <0 24>; + built-in; + device_type = "mpc8xx-pic"; + compatible = "CPM"; + }; + + cpm@ff000000 { + linux,phandle = <ff000000>; + #address-cells = <1>; + #size-cells = <1>; + #interrupt-cells = <2>; + device_type = "cpm"; + model = "CPM"; + ranges = <0 0 4000>; + reg = <860 f0>; + command-proc = <9c0>; + brg-frequency = <0>; + interrupts = <0 2>; // cpm error interrupt + interrupt-parent = <930>; + + pic@930 { + linux,phandle = <930>; + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <2>; + interrupts = <5 2 0 2>; + interrupt-parent = <ff000000>; + reg = <930 20>; + built-in; + device_type = "cpm-pic"; + compatible = "CPM"; + }; + + smc@a80 { + device_type = "serial"; + compatible = "cpm_uart"; + model = "SMC"; + device-id = <1>; + reg = <a80 10 3e80 40>; + clock-setup = <00ffffff 0>; + rx-clock = <1>; + tx-clock = <1>; + current-speed = <0>; + interrupts = <4 3>; + interrupt-parent = <930>; + }; + + smc@a90 { + device_type = "serial"; + compatible = "cpm_uart"; + model = "SMC"; + device-id = <2>; + reg = <a90 20 3f80 40>; + clock-setup = <ff00ffff 90000>; + rx-clock = <2>; + tx-clock = <2>; + current-speed = <0>; + interrupts = <3 3>; + interrupt-parent = <930>; + }; + + scc@a40 { + device_type = "network"; + compatible = "fs_enet"; + model = "SCC"; + device-id = <3>; + reg = <a40 18 3e00 80>; + mac-address = [ 00 00 0C 00 03 FD ]; + interrupts = <1c 3>; + interrupt-parent = <930>; + phy-handle = <e8002>; + }; + }; + }; +}; |