diff options
Diffstat (limited to 'arch/mips/include/asm')
80 files changed, 405 insertions, 19921 deletions
diff --git a/arch/mips/include/asm/Kbuild b/arch/mips/include/asm/Kbuild index 9a81e72119da..f15d5db5dd67 100644 --- a/arch/mips/include/asm/Kbuild +++ b/arch/mips/include/asm/Kbuild @@ -1,4 +1,8 @@ # MIPS headers +generated-y += syscall_table_32_o32.h +generated-y += syscall_table_64_n32.h +generated-y += syscall_table_64_n64.h +generated-y += syscall_table_64_o32.h generic-(CONFIG_GENERIC_CSUM) += checksum.h generic-y += current.h generic-y += device.h diff --git a/arch/mips/include/asm/atomic.h b/arch/mips/include/asm/atomic.h index d4ea7a5b60cf..e8fbfd419151 100644 --- a/arch/mips/include/asm/atomic.h +++ b/arch/mips/include/asm/atomic.h @@ -59,12 +59,13 @@ static __inline__ void atomic_##op(int i, atomic_t * v) \ int temp; \ \ __asm__ __volatile__( \ + " .set push \n" \ " .set "MIPS_ISA_LEVEL" \n" \ "1: ll %0, %1 # atomic_" #op " \n" \ " " #asm_op " %0, %2 \n" \ " sc %0, %1 \n" \ "\t" __scbeqz " %0, 1b \n" \ - " .set mips0 \n" \ + " .set pop \n" \ : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (v->counter) \ : "Ir" (i)); \ } else { \ @@ -85,13 +86,14 @@ static __inline__ int atomic_##op##_return_relaxed(int i, atomic_t * v) \ int temp; \ \ __asm__ __volatile__( \ + " .set push \n" \ " .set "MIPS_ISA_LEVEL" \n" \ "1: ll %1, %2 # atomic_" #op "_return \n" \ " " #asm_op " %0, %1, %3 \n" \ " sc %0, %2 \n" \ "\t" __scbeqz " %0, 1b \n" \ " " #asm_op " %0, %1, %3 \n" \ - " .set mips0 \n" \ + " .set pop \n" \ : "=&r" (result), "=&r" (temp), \ "+" GCC_OFF_SMALL_ASM() (v->counter) \ : "Ir" (i)); \ @@ -117,12 +119,13 @@ static __inline__ int atomic_fetch_##op##_relaxed(int i, atomic_t * v) \ int temp; \ \ __asm__ __volatile__( \ + " .set push \n" \ " .set "MIPS_ISA_LEVEL" \n" \ "1: ll %1, %2 # atomic_fetch_" #op " \n" \ " " #asm_op " %0, %1, %3 \n" \ " sc %0, %2 \n" \ "\t" __scbeqz " %0, 1b \n" \ - " .set mips0 \n" \ + " .set pop \n" \ " move %0, %1 \n" \ : "=&r" (result), "=&r" (temp), \ "+" GCC_OFF_SMALL_ASM() (v->counter) \ @@ -188,17 +191,19 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v) int temp; __asm__ __volatile__( + " .set push \n" " .set "MIPS_ISA_LEVEL" \n" "1: ll %1, %2 # atomic_sub_if_positive\n" - " .set mips0 \n" + " .set pop \n" " subu %0, %1, %3 \n" " move %1, %0 \n" " bltz %0, 1f \n" + " .set push \n" " .set "MIPS_ISA_LEVEL" \n" " sc %1, %2 \n" "\t" __scbeqz " %1, 1b \n" "1: \n" - " .set mips0 \n" + " .set pop \n" : "=&r" (result), "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (v->counter) : "Ir" (i)); @@ -252,12 +257,13 @@ static __inline__ void atomic64_##op(long i, atomic64_t * v) \ long temp; \ \ __asm__ __volatile__( \ + " .set push \n" \ " .set "MIPS_ISA_LEVEL" \n" \ "1: lld %0, %1 # atomic64_" #op " \n" \ " " #asm_op " %0, %2 \n" \ " scd %0, %1 \n" \ "\t" __scbeqz " %0, 1b \n" \ - " .set mips0 \n" \ + " .set pop \n" \ : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (v->counter) \ : "Ir" (i)); \ } else { \ @@ -278,13 +284,14 @@ static __inline__ long atomic64_##op##_return_relaxed(long i, atomic64_t * v) \ long temp; \ \ __asm__ __volatile__( \ + " .set push \n" \ " .set "MIPS_ISA_LEVEL" \n" \ "1: lld %1, %2 # atomic64_" #op "_return\n" \ " " #asm_op " %0, %1, %3 \n" \ " scd %0, %2 \n" \ "\t" __scbeqz " %0, 1b \n" \ " " #asm_op " %0, %1, %3 \n" \ - " .set mips0 \n" \ + " .set pop \n" \ : "=&r" (result), "=&r" (temp), \ "+" GCC_OFF_SMALL_ASM() (v->counter) \ : "Ir" (i)); \ @@ -310,13 +317,14 @@ static __inline__ long atomic64_fetch_##op##_relaxed(long i, atomic64_t * v) \ long temp; \ \ __asm__ __volatile__( \ + " .set push \n" \ " .set "MIPS_ISA_LEVEL" \n" \ "1: lld %1, %2 # atomic64_fetch_" #op "\n" \ " " #asm_op " %0, %1, %3 \n" \ " scd %0, %2 \n" \ "\t" __scbeqz " %0, 1b \n" \ " move %0, %1 \n" \ - " .set mips0 \n" \ + " .set pop \n" \ : "=&r" (result), "=&r" (temp), \ "+" GCC_OFF_SMALL_ASM() (v->counter) \ : "Ir" (i)); \ @@ -382,6 +390,7 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v) long temp; __asm__ __volatile__( + " .set push \n" " .set "MIPS_ISA_LEVEL" \n" "1: lld %1, %2 # atomic64_sub_if_positive\n" " dsubu %0, %1, %3 \n" @@ -390,7 +399,7 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v) " scd %1, %2 \n" "\t" __scbeqz " %1, 1b \n" "1: \n" - " .set mips0 \n" + " .set pop \n" : "=&r" (result), "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (v->counter) : "Ir" (i)); diff --git a/arch/mips/include/asm/bitops.h b/arch/mips/include/asm/bitops.h index da1b8718861e..f2a840fb6a9a 100644 --- a/arch/mips/include/asm/bitops.h +++ b/arch/mips/include/asm/bitops.h @@ -58,12 +58,13 @@ static inline void set_bit(unsigned long nr, volatile unsigned long *addr) if (kernel_uses_llsc && R10000_LLSC_WAR) { __asm__ __volatile__( + " .set push \n" " .set arch=r4000 \n" "1: " __LL "%0, %1 # set_bit \n" " or %0, %2 \n" " " __SC "%0, %1 \n" " beqzl %0, 1b \n" - " .set mips0 \n" + " .set pop \n" : "=&r" (temp), "=" GCC_OFF_SMALL_ASM() (*m) : "ir" (1UL << bit), GCC_OFF_SMALL_ASM() (*m)); #if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6) @@ -80,11 +81,12 @@ static inline void set_bit(unsigned long nr, volatile unsigned long *addr) } else if (kernel_uses_llsc) { do { __asm__ __volatile__( + " .set push \n" " .set "MIPS_ISA_ARCH_LEVEL" \n" " " __LL "%0, %1 # set_bit \n" " or %0, %2 \n" " " __SC "%0, %1 \n" - " .set mips0 \n" + " .set pop \n" : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m) : "ir" (1UL << bit)); } while (unlikely(!temp)); @@ -110,12 +112,13 @@ static inline void clear_bit(unsigned long nr, volatile unsigned long *addr) if (kernel_uses_llsc && R10000_LLSC_WAR) { __asm__ __volatile__( + " .set push \n" " .set arch=r4000 \n" "1: " __LL "%0, %1 # clear_bit \n" " and %0, %2 \n" " " __SC "%0, %1 \n" " beqzl %0, 1b \n" - " .set mips0 \n" + " .set pop \n" : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m) : "ir" (~(1UL << bit))); #if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6) @@ -132,11 +135,12 @@ static inline void clear_bit(unsigned long nr, volatile unsigned long *addr) } else if (kernel_uses_llsc) { do { __asm__ __volatile__( + " .set push \n" " .set "MIPS_ISA_ARCH_LEVEL" \n" " " __LL "%0, %1 # clear_bit \n" " and %0, %2 \n" " " __SC "%0, %1 \n" - " .set mips0 \n" + " .set pop \n" : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m) : "ir" (~(1UL << bit))); } while (unlikely(!temp)); @@ -176,12 +180,13 @@ static inline void change_bit(unsigned long nr, volatile unsigned long *addr) unsigned long temp; __asm__ __volatile__( + " .set push \n" " .set arch=r4000 \n" "1: " __LL "%0, %1 # change_bit \n" " xor %0, %2 \n" " " __SC "%0, %1 \n" " beqzl %0, 1b \n" - " .set mips0 \n" + " .set pop \n" : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m) : "ir" (1UL << bit)); } else if (kernel_uses_llsc) { @@ -190,11 +195,12 @@ static inline void change_bit(unsigned long nr, volatile unsigned long *addr) do { __asm__ __volatile__( + " .set push \n" " .set "MIPS_ISA_ARCH_LEVEL" \n" " " __LL "%0, %1 # change_bit \n" " xor %0, %2 \n" " " __SC "%0, %1 \n" - " .set mips0 \n" + " .set pop \n" : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m) : "ir" (1UL << bit)); } while (unlikely(!temp)); @@ -223,13 +229,14 @@ static inline int test_and_set_bit(unsigned long nr, unsigned long temp; __asm__ __volatile__( + " .set push \n" " .set arch=r4000 \n" "1: " __LL "%0, %1 # test_and_set_bit \n" " or %2, %0, %3 \n" " " __SC "%2, %1 \n" " beqzl %2, 1b \n" " and %2, %0, %3 \n" - " .set mips0 \n" + " .set pop \n" : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m), "=&r" (res) : "r" (1UL << bit) : "memory"); @@ -239,11 +246,12 @@ static inline int test_and_set_bit(unsigned long nr, do { __asm__ __volatile__( + " .set push \n" " .set "MIPS_ISA_ARCH_LEVEL" \n" " " __LL "%0, %1 # test_and_set_bit \n" " or %2, %0, %3 \n" " " __SC "%2, %1 \n" - " .set mips0 \n" + " .set pop \n" : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m), "=&r" (res) : "r" (1UL << bit) : "memory"); @@ -277,13 +285,14 @@ static inline int test_and_set_bit_lock(unsigned long nr, unsigned long temp; __asm__ __volatile__( + " .set push \n" " .set arch=r4000 \n" "1: " __LL "%0, %1 # test_and_set_bit \n" " or %2, %0, %3 \n" " " __SC "%2, %1 \n" " beqzl %2, 1b \n" " and %2, %0, %3 \n" - " .set mips0 \n" + " .set pop \n" : "=&r" (temp), "+m" (*m), "=&r" (res) : "r" (1UL << bit) : "memory"); @@ -293,11 +302,12 @@ static inline int test_and_set_bit_lock(unsigned long nr, do { __asm__ __volatile__( + " .set push \n" " .set "MIPS_ISA_ARCH_LEVEL" \n" " " __LL "%0, %1 # test_and_set_bit \n" " or %2, %0, %3 \n" " " __SC "%2, %1 \n" - " .set mips0 \n" + " .set pop \n" : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m), "=&r" (res) : "r" (1UL << bit) : "memory"); @@ -332,6 +342,7 @@ static inline int test_and_clear_bit(unsigned long nr, unsigned long temp; __asm__ __volatile__( + " .set push \n" " .set arch=r4000 \n" "1: " __LL "%0, %1 # test_and_clear_bit \n" " or %2, %0, %3 \n" @@ -339,7 +350,7 @@ static inline int test_and_clear_bit(unsigned long nr, " " __SC "%2, %1 \n" " beqzl %2, 1b \n" " and %2, %0, %3 \n" - " .set mips0 \n" + " .set pop \n" : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m), "=&r" (res) : "r" (1UL << bit) : "memory"); @@ -365,12 +376,13 @@ static inline int test_and_clear_bit(unsigned long nr, do { __asm__ __volatile__( + " .set push \n" " .set "MIPS_ISA_ARCH_LEVEL" \n" " " __LL "%0, %1 # test_and_clear_bit \n" " or %2, %0, %3 \n" " xor %2, %3 \n" " " __SC "%2, %1 \n" - " .set mips0 \n" + " .set pop \n" : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m), "=&r" (res) : "r" (1UL << bit) : "memory"); @@ -406,13 +418,14 @@ static inline int test_and_change_bit(unsigned long nr, unsigned long temp; __asm__ __volatile__( + " .set push \n" " .set arch=r4000 \n" "1: " __LL "%0, %1 # test_and_change_bit \n" " xor %2, %0, %3 \n" " " __SC "%2, %1 \n" " beqzl %2, 1b \n" " and %2, %0, %3 \n" - " .set mips0 \n" + " .set pop \n" : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m), "=&r" (res) : "r" (1UL << bit) : "memory"); @@ -422,11 +435,12 @@ static inline int test_and_change_bit(unsigned long nr, do { __asm__ __volatile__( + " .set push \n" " .set "MIPS_ISA_ARCH_LEVEL" \n" " " __LL "%0, %1 # test_and_change_bit \n" " xor %2, %0, %3 \n" " " __SC "\t%2, %1 \n" - " .set mips0 \n" + " .set pop \n" : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m), "=&r" (res) : "r" (1UL << bit) : "memory"); diff --git a/arch/mips/include/asm/cmpxchg.h b/arch/mips/include/asm/cmpxchg.h index 89e9fb7976fe..638de0c25249 100644 --- a/arch/mips/include/asm/cmpxchg.h +++ b/arch/mips/include/asm/cmpxchg.h @@ -47,9 +47,10 @@ extern unsigned long __xchg_called_with_bad_pointer(void) __asm__ __volatile__( \ " .set push \n" \ " .set noat \n" \ + " .set push \n" \ " .set " MIPS_ISA_ARCH_LEVEL " \n" \ "1: " ld " %0, %2 # __xchg_asm \n" \ - " .set mips0 \n" \ + " .set pop \n" \ " move $1, %z3 \n" \ " .set " MIPS_ISA_ARCH_LEVEL " \n" \ " " st " $1, %1 \n" \ @@ -117,10 +118,11 @@ static inline unsigned long __xchg(volatile void *ptr, unsigned long x, __asm__ __volatile__( \ " .set push \n" \ " .set noat \n" \ + " .set push \n" \ " .set "MIPS_ISA_ARCH_LEVEL" \n" \ "1: " ld " %0, %2 # __cmpxchg_asm \n" \ " bne %0, %z3, 2f \n" \ - " .set mips0 \n" \ + " .set pop \n" \ " move $1, %z4 \n" \ " .set "MIPS_ISA_ARCH_LEVEL" \n" \ " " st " $1, %1 \n" \ diff --git a/arch/mips/include/asm/compiler.h b/arch/mips/include/asm/compiler.h index cc2eb1b06050..f77e99f1722e 100644 --- a/arch/mips/include/asm/compiler.h +++ b/arch/mips/include/asm/compiler.h @@ -43,28 +43,16 @@ #undef barrier_before_unreachable #define barrier_before_unreachable() asm volatile(".insn") -#if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4) -#define GCC_IMM_ASM() "n" -#define GCC_REG_ACCUM "$0" +#if !defined(CONFIG_CC_IS_GCC) || \ + (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 9) +# define GCC_OFF_SMALL_ASM() "ZC" +#elif defined(CONFIG_CPU_MICROMIPS) +# error "microMIPS compilation unsupported with GCC older than 4.9" #else -#define GCC_IMM_ASM() "rn" -#define GCC_REG_ACCUM "accum" +# define GCC_OFF_SMALL_ASM() "R" #endif #ifdef CONFIG_CPU_MIPSR6 -/* All MIPS R6 toolchains support the ZC constrain */ -#define GCC_OFF_SMALL_ASM() "ZC" -#else -#ifndef CONFIG_CPU_MICROMIPS -#define GCC_OFF_SMALL_ASM() "R" -#elif __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 9) -#define GCC_OFF_SMALL_ASM() "ZC" -#else -#error "microMIPS compilation unsupported with GCC older than 4.9" -#endif /* CONFIG_CPU_MICROMIPS */ -#endif /* CONFIG_CPU_MIPSR6 */ - -#ifdef CONFIG_CPU_MIPSR6 #define MIPS_ISA_LEVEL "mips64r6" #define MIPS_ISA_ARCH_LEVEL MIPS_ISA_LEVEL #define MIPS_ISA_LEVEL_RAW mips64r6 diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h index 0edba3e75747..701e525641b8 100644 --- a/arch/mips/include/asm/cpu-features.h +++ b/arch/mips/include/asm/cpu-features.h @@ -15,6 +15,7 @@ #include <cpu-feature-overrides.h> #define __ase(ase) (cpu_data[0].ases & (ase)) +#define __isa(isa) (cpu_data[0].isa_level & (isa)) #define __opt(opt) (cpu_data[0].options & (opt)) /* @@ -53,6 +54,18 @@ #define __isa_lt_and_opt(isa, opt) ((MIPS_ISA_REV < (isa)) && __opt(opt)) /* + * Similarly allow for ISA level checks that take into account knowledge of the + * ISA targeted by the kernel build, provided by MIPS_ISA_REV. + */ +#define __isa_ge_and_flag(isa, flag) ((MIPS_ISA_REV >= (isa)) && __isa(flag)) +#define __isa_ge_or_flag(isa, flag) ((MIPS_ISA_REV >= (isa)) || __isa(flag)) +#define __isa_lt_and_flag(isa, flag) ((MIPS_ISA_REV < (isa)) && __isa(flag)) +#define __isa_range(ge, lt) \ + ((MIPS_ISA_REV >= (ge)) && (MIPS_ISA_REV < (lt))) +#define __isa_range_or_flag(ge, lt, flag) \ + (__isa_range(ge, lt) || ((MIPS_ISA_REV < (lt)) && __isa(flag))) + +/* * SMP assumption: Options of CPU 0 are a superset of all processors. * This is true for all known MIPS systems. */ @@ -115,10 +128,15 @@ #endif /* Don't override `cpu_has_fpu' to 1 or the "nofpu" option won't work. */ #ifndef cpu_has_fpu -#define cpu_has_fpu (current_cpu_data.options & MIPS_CPU_FPU) -#define raw_cpu_has_fpu (raw_current_cpu_data.options & MIPS_CPU_FPU) +# ifdef CONFIG_MIPS_FP_SUPPORT +# define cpu_has_fpu (current_cpu_data.options & MIPS_CPU_FPU) +# define raw_cpu_has_fpu (raw_current_cpu_data.options & MIPS_CPU_FPU) +# else +# define cpu_has_fpu 0 +# define raw_cpu_has_fpu 0 +# endif #else -#define raw_cpu_has_fpu cpu_has_fpu +# define raw_cpu_has_fpu cpu_has_fpu #endif #ifndef cpu_has_32fpr #define cpu_has_32fpr __isa_ge_or_opt(1, MIPS_CPU_32FPR) @@ -195,7 +213,9 @@ #endif #ifndef cpu_has_mmips -# ifdef CONFIG_SYS_SUPPORTS_MICROMIPS +# if defined(__mips_micromips) +# define cpu_has_mmips 1 +# elif defined(CONFIG_SYS_SUPPORTS_MICROMIPS) # define cpu_has_mmips __opt(MIPS_CPU_MICROMIPS) # else # define cpu_has_mmips 0 @@ -246,48 +266,38 @@ #endif #endif -/* __builtin_constant_p(cpu_has_mips_r) && cpu_has_mips_r */ -#if !((defined(cpu_has_mips32r1) && cpu_has_mips32r1) || \ - (defined(cpu_has_mips32r2) && cpu_has_mips32r2) || \ - (defined(cpu_has_mips32r6) && cpu_has_mips32r6) || \ - (defined(cpu_has_mips64r1) && cpu_has_mips64r1) || \ - (defined(cpu_has_mips64r2) && cpu_has_mips64r2) || \ - (defined(cpu_has_mips64r6) && cpu_has_mips64r6)) -#define CPU_NO_EFFICIENT_FFS 1 -#endif - #ifndef cpu_has_mips_1 -# define cpu_has_mips_1 (!cpu_has_mips_r6) +# define cpu_has_mips_1 (MIPS_ISA_REV < 6) #endif #ifndef cpu_has_mips_2 -# define cpu_has_mips_2 (cpu_data[0].isa_level & MIPS_CPU_ISA_II) +# define cpu_has_mips_2 __isa_lt_and_flag(6, MIPS_CPU_ISA_II) #endif #ifndef cpu_has_mips_3 -# define cpu_has_mips_3 (cpu_data[0].isa_level & MIPS_CPU_ISA_III) +# define cpu_has_mips_3 __isa_lt_and_flag(6, MIPS_CPU_ISA_III) #endif #ifndef cpu_has_mips_4 -# define cpu_has_mips_4 (cpu_data[0].isa_level & MIPS_CPU_ISA_IV) +# define cpu_has_mips_4 __isa_lt_and_flag(6, MIPS_CPU_ISA_IV) #endif #ifndef cpu_has_mips_5 -# define cpu_has_mips_5 (cpu_data[0].isa_level & MIPS_CPU_ISA_V) +# define cpu_has_mips_5 __isa_lt_and_flag(6, MIPS_CPU_ISA_V) #endif #ifndef cpu_has_mips32r1 -# define cpu_has_mips32r1 (cpu_data[0].isa_level & MIPS_CPU_ISA_M32R1) +# define cpu_has_mips32r1 __isa_range_or_flag(1, 6, MIPS_CPU_ISA_M32R1) #endif #ifndef cpu_has_mips32r2 -# define cpu_has_mips32r2 (cpu_data[0].isa_level & MIPS_CPU_ISA_M32R2) +# define cpu_has_mips32r2 __isa_range_or_flag(2, 6, MIPS_CPU_ISA_M32R2) #endif #ifndef cpu_has_mips32r6 -# define cpu_has_mips32r6 (cpu_data[0].isa_level & MIPS_CPU_ISA_M32R6) +# define cpu_has_mips32r6 __isa_ge_or_flag(6, MIPS_CPU_ISA_M32R6) #endif #ifndef cpu_has_mips64r1 -# define cpu_has_mips64r1 (cpu_data[0].isa_level & MIPS_CPU_ISA_M64R1) +# define cpu_has_mips64r1 __isa_range_or_flag(1, 6, MIPS_CPU_ISA_M64R1) #endif #ifndef cpu_has_mips64r2 -# define cpu_has_mips64r2 (cpu_data[0].isa_level & MIPS_CPU_ISA_M64R2) +# define cpu_has_mips64r2 __isa_range_or_flag(2, 6, MIPS_CPU_ISA_M64R2) #endif #ifndef cpu_has_mips64r6 -# define cpu_has_mips64r6 (cpu_data[0].isa_level & MIPS_CPU_ISA_M64R6) +# define cpu_has_mips64r6 __isa_ge_and_flag(6, MIPS_CPU_ISA_M64R6) #endif /* diff --git a/arch/mips/include/asm/cpu-info.h b/arch/mips/include/asm/cpu-info.h index a41059d47d31..ed7ffe4e63a3 100644 --- a/arch/mips/include/asm/cpu-info.h +++ b/arch/mips/include/asm/cpu-info.h @@ -50,7 +50,7 @@ struct guest_info { #define MIPS_CACHE_PINDEX 0x00000020 /* Physically indexed cache */ struct cpuinfo_mips { - unsigned long asid_cache; + u64 asid_cache; #ifdef CONFIG_MIPS_ASID_BITS_VARIABLE unsigned long asid_mask; #endif diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h index dacbdb84516a..532b49b1dbb3 100644 --- a/arch/mips/include/asm/cpu.h +++ b/arch/mips/include/asm/cpu.h @@ -248,8 +248,9 @@ #define PRID_REV_LOONGSON3A_R1 0x0005 #define PRID_REV_LOONGSON3B_R1 0x0006 #define PRID_REV_LOONGSON3B_R2 0x0007 -#define PRID_REV_LOONGSON3A_R2 0x0008 +#define PRID_REV_LOONGSON3A_R2_0 0x0008 #define PRID_REV_LOONGSON3A_R3_0 0x0009 +#define PRID_REV_LOONGSON3A_R2_1 0x000c #define PRID_REV_LOONGSON3A_R3_1 0x000d /* diff --git a/arch/mips/include/asm/dma-mapping.h b/arch/mips/include/asm/dma-mapping.h index b4c477eb46ce..20dfaad3a55d 100644 --- a/arch/mips/include/asm/dma-mapping.h +++ b/arch/mips/include/asm/dma-mapping.h @@ -10,10 +10,8 @@ static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus) { #if defined(CONFIG_MACH_JAZZ) return &jazz_dma_ops; -#elif defined(CONFIG_SWIOTLB) - return &swiotlb_dma_ops; #else - return &dma_direct_ops; + return NULL; #endif } diff --git a/arch/mips/include/asm/dsemul.h b/arch/mips/include/asm/dsemul.h index b47a97527673..6d5b781ad518 100644 --- a/arch/mips/include/asm/dsemul.h +++ b/arch/mips/include/asm/dsemul.h @@ -52,7 +52,14 @@ extern int mips_dsemul(struct pt_regs *regs, mips_instruction ir, * * Return: True if an emulation frame was returned from, else false. */ +#ifdef CONFIG_MIPS_FP_SUPPORT extern bool do_dsemulret(struct pt_regs *xcp); +#else +static inline bool do_dsemulret(struct pt_regs *xcp) +{ + return false; +} +#endif /** * dsemul_thread_cleanup() - Cleanup thread 'emulation' frame @@ -63,8 +70,14 @@ extern bool do_dsemulret(struct pt_regs *xcp); * * Return: True if a frame was freed, else false. */ +#ifdef CONFIG_MIPS_FP_SUPPORT extern bool dsemul_thread_cleanup(struct task_struct *tsk); - +#else +static inline bool dsemul_thread_cleanup(struct task_struct *tsk) +{ + return false; +} +#endif /** * dsemul_thread_rollback() - Rollback from an 'emulation' frame * @regs: User thread register context. @@ -77,7 +90,14 @@ extern bool dsemul_thread_cleanup(struct task_struct *tsk); * * Return: True if a frame was exited, else false. */ +#ifdef CONFIG_MIPS_FP_SUPPORT extern bool dsemul_thread_rollback(struct pt_regs *regs); +#else +static inline bool dsemul_thread_rollback(struct pt_regs *regs) +{ + return false; +} +#endif /** * dsemul_mm_cleanup() - Cleanup per-mm delay slot 'emulation' state @@ -87,6 +107,13 @@ extern bool dsemul_thread_rollback(struct pt_regs *regs); * for delay slot 'emulation' book-keeping is freed. This is to be called * before @mm is freed in order to avoid memory leaks. */ +#ifdef CONFIG_MIPS_FP_SUPPORT extern void dsemul_mm_cleanup(struct mm_struct *mm); +#else +static inline void dsemul_mm_cleanup(struct mm_struct *mm) +{ + /* no-op */ +} +#endif #endif /* __MIPS_ASM_DSEMUL_H__ */ diff --git a/arch/mips/include/asm/edac.h b/arch/mips/include/asm/edac.h index fc467767329b..c5d147744423 100644 --- a/arch/mips/include/asm/edac.h +++ b/arch/mips/include/asm/edac.h @@ -21,12 +21,13 @@ static inline void edac_atomic_scrub(void *va, u32 size) */ __asm__ __volatile__ ( + " .set push \n" " .set mips2 \n" "1: ll %0, %1 # edac_atomic_scrub \n" " addu %0, $0 \n" " sc %0, %1 \n" " beqz %0, 1b \n" - " .set mips0 \n" + " .set pop \n" : "=&r" (temp), "=" GCC_OFF_SMALL_ASM() (*virt_addr) : GCC_OFF_SMALL_ASM() (*virt_addr)); diff --git a/arch/mips/include/asm/elf.h b/arch/mips/include/asm/elf.h index 0eb1a75be105..f8f44b1a6cbb 100644 --- a/arch/mips/include/asm/elf.h +++ b/arch/mips/include/asm/elf.h @@ -481,6 +481,8 @@ struct linux_binprm; extern int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp); +#ifdef CONFIG_MIPS_FP_SUPPORT + struct arch_elf_state { int nan_2008; int fp_abi; @@ -497,19 +499,35 @@ struct arch_elf_state { .overall_fp_mode = -1, \ } -/* Whether to accept legacy-NaN and 2008-NaN user binaries. */ -extern bool mips_use_nan_legacy; -extern bool mips_use_nan_2008; - extern int arch_elf_pt_proc(void *ehdr, void *phdr, struct file *elf, bool is_interp, struct arch_elf_state *state); extern int arch_check_elf(void *ehdr, bool has_interpreter, void *interp_ehdr, struct arch_elf_state *state); +/* Whether to accept legacy-NaN and 2008-NaN user binaries. */ +extern bool mips_use_nan_legacy; +extern bool mips_use_nan_2008; + extern void mips_set_personality_nan(struct arch_elf_state *state); extern void mips_set_personality_fp(struct arch_elf_state *state); +#else /* !CONFIG_MIPS_FP_SUPPORT */ + +struct arch_elf_state; + +static inline void mips_set_personality_nan(struct arch_elf_state *state) +{ + /* no-op */ +} + +static inline void mips_set_personality_fp(struct arch_elf_state *state) +{ + /* no-op */ +} + +#endif /* !CONFIG_MIPS_FP_SUPPORT */ + #define elf_read_implies_exec(ex, stk) mips_elf_read_implies_exec(&(ex), stk) extern int mips_elf_read_implies_exec(void *elf_ex, int exstack); diff --git a/arch/mips/include/asm/fpu.h b/arch/mips/include/asm/fpu.h index a2813fe381cf..42bc2bbbd3d7 100644 --- a/arch/mips/include/asm/fpu.h +++ b/arch/mips/include/asm/fpu.h @@ -30,13 +30,6 @@ #include <asm/mips_mt.h> #endif -struct sigcontext; -struct sigcontext32; - -extern void _init_fpu(unsigned int); -extern void _save_fp(struct task_struct *); -extern void _restore_fp(struct task_struct *); - /* * This enum specifies a mode in which we want the FPU to operate, for cores * which implement the Status.FR bit. Note that the bottom bit of the value @@ -51,6 +44,11 @@ enum fpu_mode { #define FPU_FR_MASK 0x1 }; +#ifdef CONFIG_MIPS_FP_SUPPORT + +extern void _save_fp(struct task_struct *); +extern void _restore_fp(struct task_struct *); + #define __disable_fpu() \ do { \ clear_c0_status(ST0_CU1); \ @@ -198,42 +196,36 @@ static inline void lose_fpu(int save) preempt_enable(); } -static inline int init_fpu(void) +/** + * init_fp_ctx() - Initialize task FP context + * @target: The task whose FP context should be initialized. + * + * Initializes the FP context of the target task to sane default values if that + * target task does not already have valid FP context. Once the context has + * been initialized, the task will be marked as having used FP & thus having + * valid FP context. + * + * Returns: true if context is initialized, else false. + */ +static inline bool init_fp_ctx(struct task_struct *target) { - unsigned int fcr31 = current->thread.fpu.fcr31; - int ret = 0; + /* If FP has been used then the target already has context */ + if (tsk_used_math(target)) + return false; - if (cpu_has_fpu) { - unsigned int config5; - - ret = __own_fpu(); - if (ret) - return ret; + /* Begin with data registers set to all 1s... */ + memset(&target->thread.fpu.fpr, ~0, sizeof(target->thread.fpu.fpr)); - if (!cpu_has_fre) { - _init_fpu(fcr31); + /* FCSR has been preset by `mips_set_personality_nan'. */ - return 0; - } - - /* - * Ensure FRE is clear whilst running _init_fpu, since - * single precision FP instructions are used. If FRE - * was set then we'll just end up initialising all 32 - * 64b registers. - */ - config5 = clear_c0_config5(MIPS_CONF5_FRE); - enable_fpu_hazard(); + /* + * Record that the target has "used" math, such that the context + * just initialised, and any modifications made by the caller, + * aren't discarded. + */ + set_stopped_child_used_math(target); - _init_fpu(fcr31); - - /* Restore FRE */ - write_c0_config5(config5); - enable_fpu_hazard(); - } else - fpu_emulator_init_fpu(); - - return ret; + return true; } static inline void save_fp(struct task_struct *tsk) @@ -260,4 +252,81 @@ static inline union fpureg *get_fpu_regs(struct task_struct *tsk) return tsk->thread.fpu.fpr; } +#else /* !CONFIG_MIPS_FP_SUPPORT */ + +/* + * When FP support is disabled we provide only a minimal set of stub functions + * to avoid callers needing to care too much about CONFIG_MIPS_FP_SUPPORT. + */ + +static inline int __enable_fpu(enum fpu_mode mode) +{ + return SIGILL; +} + +static inline void __disable_fpu(void) +{ + /* no-op */ +} + + +static inline int is_fpu_owner(void) +{ + return 0; +} + +static inline void clear_fpu_owner(void) +{ + /* no-op */ +} + +static inline int own_fpu_inatomic(int restore) +{ + return SIGILL; +} + +static inline int own_fpu(int restore) +{ + return SIGILL; +} + +static inline void lose_fpu_inatomic(int save, struct task_struct *tsk) +{ + /* no-op */ +} + +static inline void lose_fpu(int save) +{ + /* no-op */ +} + +static inline bool init_fp_ctx(struct task_struct *target) +{ + return false; +} + +/* + * The following functions should only be called in paths where we know that FP + * support is enabled, typically a path where own_fpu() or __enable_fpu() have + * returned successfully. When CONFIG_MIPS_FP_SUPPORT=n it is known at compile + * time that this should never happen, so calls to these functions should be + * optimized away & never actually be emitted. + */ + +extern void save_fp(struct task_struct *tsk) + __compiletime_error("save_fp() should not be called when CONFIG_MIPS_FP_SUPPORT=n"); + +extern void _save_fp(struct task_struct *) + __compiletime_error("_save_fp() should not be called when CONFIG_MIPS_FP_SUPPORT=n"); + +extern void restore_fp(struct task_struct *tsk) + __compiletime_error("restore_fp() should not be called when CONFIG_MIPS_FP_SUPPORT=n"); + +extern void _restore_fp(struct task_struct *) + __compiletime_error("_restore_fp() should not be called when CONFIG_MIPS_FP_SUPPORT=n"); + +extern union fpureg *get_fpu_regs(struct task_struct *tsk) + __compiletime_error("get_fpu_regs() should not be called when CONFIG_MIPS_FP_SUPPORT=n"); + +#endif /* !CONFIG_MIPS_FP_SUPPORT */ #endif /* _ASM_FPU_H */ diff --git a/arch/mips/include/asm/fpu_emulator.h b/arch/mips/include/asm/fpu_emulator.h index b36097d3cbf4..7e233055f7b4 100644 --- a/arch/mips/include/asm/fpu_emulator.h +++ b/arch/mips/include/asm/fpu_emulator.h @@ -188,17 +188,6 @@ int isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn, int mm_isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn, unsigned long *contpc); -#define SIGNALLING_NAN 0x7ff800007ff80000LL - -static inline void fpu_emulator_init_fpu(void) -{ - struct task_struct *t = current; - int i; - - for (i = 0; i < 32; i++) - set_fpr64(&t->thread.fpu.fpr[i], 0, SIGNALLING_NAN); -} - /* * Mask the FCSR Cause bits according to the Enable bits, observing * that Unimplemented is always enabled. diff --git a/arch/mips/include/asm/futex.h b/arch/mips/include/asm/futex.h index a9e61ea54ca9..8eff134b3a43 100644 --- a/arch/mips/include/asm/futex.h +++ b/arch/mips/include/asm/futex.h @@ -24,9 +24,10 @@ __asm__ __volatile__( \ " .set push \n" \ " .set noat \n" \ + " .set push \n" \ " .set arch=r4000 \n" \ "1: ll %1, %4 # __futex_atomic_op \n" \ - " .set mips0 \n" \ + " .set pop \n" \ " " insn " \n" \ " .set arch=r4000 \n" \ "2: sc $1, %2 \n" \ @@ -35,7 +36,6 @@ "3: \n" \ " .insn \n" \ " .set pop \n" \ - " .set mips0 \n" \ " .section .fixup,\"ax\" \n" \ "4: li %0, %6 \n" \ " j 3b \n" \ @@ -53,9 +53,10 @@ __asm__ __volatile__( \ " .set push \n" \ " .set noat \n" \ + " .set push \n" \ " .set "MIPS_ISA_ARCH_LEVEL" \n" \ "1: "user_ll("%1", "%4")" # __futex_atomic_op\n" \ - " .set mips0 \n" \ + " .set pop \n" \ " " insn " \n" \ " .set "MIPS_ISA_ARCH_LEVEL" \n" \ "2: "user_sc("$1", "%2")" \n" \ @@ -64,7 +65,6 @@ "3: \n" \ " .insn \n" \ " .set pop \n" \ - " .set mips0 \n" \ " .section .fixup,\"ax\" \n" \ "4: li %0, %6 \n" \ " j 3b \n" \ @@ -137,10 +137,11 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, "# futex_atomic_cmpxchg_inatomic \n" " .set push \n" " .set noat \n" + " .set push \n" " .set arch=r4000 \n" "1: ll %1, %3 \n" " bne %1, %z4, 3f \n" - " .set mips0 \n" + " .set pop \n" " move $1, %z5 \n" " .set arch=r4000 \n" "2: sc $1, %2 \n" @@ -166,10 +167,11 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, "# futex_atomic_cmpxchg_inatomic \n" " .set push \n" " .set noat \n" + " .set push \n" " .set "MIPS_ISA_ARCH_LEVEL" \n" "1: "user_ll("%1", "%3")" \n" " bne %1, %z4, 3f \n" - " .set mips0 \n" + " .set pop \n" " move $1, %z5 \n" " .set "MIPS_ISA_ARCH_LEVEL" \n" "2: "user_sc("$1", "%2")" \n" diff --git a/arch/mips/include/asm/hazards.h b/arch/mips/include/asm/hazards.h index e0fecf206f2c..0fa27446869a 100644 --- a/arch/mips/include/asm/hazards.h +++ b/arch/mips/include/asm/hazards.h @@ -66,10 +66,11 @@ do { \ unsigned long tmp; \ \ __asm__ __volatile__( \ + " .set push \n" \ " .set "MIPS_ISA_LEVEL" \n" \ " dla %0, 1f \n" \ " jr.hb %0 \n" \ - " .set mips0 \n" \ + " .set pop \n" \ "1: \n" \ : "=r" (tmp)); \ } while (0) @@ -141,10 +142,11 @@ do { \ unsigned long tmp; \ \ __asm__ __volatile__( \ + " .set push \n" \ " .set mips64r2 \n" \ " dla %0, 1f \n" \ " jr.hb %0 \n" \ - " .set mips0 \n" \ + " .set pop \n" \ "1: \n" \ : "=r" (tmp)); \ } while (0) diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h index 266257d56fb6..845fbbc7a2e3 100644 --- a/arch/mips/include/asm/io.h +++ b/arch/mips/include/asm/io.h @@ -218,6 +218,18 @@ static inline void __iomem * __ioremap_mode(phys_addr_t offset, unsigned long si } /* + * ioremap_prot - map bus memory into CPU space + * @offset: bus address of the memory + * @size: size of the resource to map + + * ioremap_prot gives the caller control over cache coherency attributes (CCA) + */ +static inline void __iomem *ioremap_prot(phys_addr_t offset, + unsigned long size, unsigned long prot_val) { + return __ioremap_mode(offset, size, prot_val & _CACHE_MASK); +} + +/* * ioremap - map bus memory into CPU space * @offset: bus address of the memory * @size: size of the resource to map @@ -342,13 +354,14 @@ static inline void pfx##write##bwlq(type val, \ if (irq) \ local_irq_save(__flags); \ __asm__ __volatile__( \ - ".set arch=r4000" "\t\t# __writeq""\n\t" \ + ".set push" "\t\t# __writeq""\n\t" \ + ".set arch=r4000" "\n\t" \ "dsll32 %L0, %L0, 0" "\n\t" \ "dsrl32 %L0, %L0, 0" "\n\t" \ "dsll32 %M0, %M0, 0" "\n\t" \ "or %L0, %L0, %M0" "\n\t" \ "sd %L0, %2" "\n\t" \ - ".set mips0" "\n" \ + ".set pop" "\n" \ : "=r" (__tmp) \ : "0" (__val), "m" (*__mem)); \ if (irq) \ @@ -375,11 +388,12 @@ static inline type pfx##read##bwlq(const volatile void __iomem *mem) \ if (irq) \ local_irq_save(__flags); \ __asm__ __volatile__( \ - ".set arch=r4000" "\t\t# __readq" "\n\t" \ + ".set push" "\t\t# __readq" "\n\t" \ + ".set arch=r4000" "\n\t" \ "ld %L0, %1" "\n\t" \ "dsra32 %M0, %L0, 0" "\n\t" \ "sll %L0, %L0, 0" "\n\t" \ - ".set mips0" "\n" \ + ".set pop" "\n" \ : "=r" (__val) \ : "m" (*__mem)); \ if (irq) \ diff --git a/arch/mips/include/asm/jazzdma.h b/arch/mips/include/asm/jazzdma.h index d913439c738c..d13f940022d5 100644 --- a/arch/mips/include/asm/jazzdma.h +++ b/arch/mips/include/asm/jazzdma.h @@ -40,12 +40,6 @@ extern int vdma_get_enable(int channel); #define VDMA_OFFSET(a) ((unsigned int)(a) & (VDMA_PAGESIZE-1)) /* - * error code returned by vdma_alloc() - * (See also arch/mips/kernel/jazzdma.c) - */ -#define VDMA_ERROR 0xffffffff - -/* * VDMA pagetable entry description */ typedef volatile struct VDMA_PGTBL_ENTRY { diff --git a/arch/mips/include/asm/kvm_host.h b/arch/mips/include/asm/kvm_host.h index 2c1c53d12179..d2abd98471e8 100644 --- a/arch/mips/include/asm/kvm_host.h +++ b/arch/mips/include/asm/kvm_host.h @@ -411,11 +411,12 @@ static inline void _kvm_atomic_set_c0_guest_reg(unsigned long *reg, unsigned long temp; do { __asm__ __volatile__( + " .set push \n" " .set "MIPS_ISA_ARCH_LEVEL" \n" " " __LL "%0, %1 \n" " or %0, %2 \n" " " __SC "%0, %1 \n" - " .set mips0 \n" + " .set pop \n" : "=&r" (temp), "+m" (*reg) : "r" (val)); } while (unlikely(!temp)); @@ -427,11 +428,12 @@ static inline void _kvm_atomic_clear_c0_guest_reg(unsigned long *reg, unsigned long temp; do { __asm__ __volatile__( + " .set push \n" " .set "MIPS_ISA_ARCH_LEVEL" \n" " " __LL "%0, %1 \n" " and %0, %2 \n" " " __SC "%0, %1 \n" - " .set mips0 \n" + " .set pop \n" : "=&r" (temp), "+m" (*reg) : "r" (~val)); } while (unlikely(!temp)); @@ -444,12 +446,13 @@ static inline void _kvm_atomic_change_c0_guest_reg(unsigned long *reg, unsigned long temp; do { __asm__ __volatile__( + " .set push \n" " .set "MIPS_ISA_ARCH_LEVEL" \n" " " __LL "%0, %1 \n" " and %0, %2 \n" " or %0, %3 \n" " " __SC "%0, %1 \n" - " .set mips0 \n" + " .set pop \n" : "=&r" (temp), "+m" (*reg) : "r" (~change), "r" (val & change)); } while (unlikely(!temp)); @@ -933,7 +936,7 @@ enum kvm_mips_fault_result kvm_trap_emul_gva_fault(struct kvm_vcpu *vcpu, #define KVM_ARCH_WANT_MMU_NOTIFIER int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end); -void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte); +int kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte); int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end); int kvm_test_age_hva(struct kvm *kvm, unsigned long hva); diff --git a/arch/mips/include/asm/local.h b/arch/mips/include/asm/local.h index ac8264eca1e9..02783e141c32 100644 --- a/arch/mips/include/asm/local.h +++ b/arch/mips/include/asm/local.h @@ -35,13 +35,14 @@ static __inline__ long local_add_return(long i, local_t * l) unsigned long temp; __asm__ __volatile__( + " .set push \n" " .set arch=r4000 \n" "1:" __LL "%1, %2 # local_add_return \n" " addu %0, %1, %3 \n" __SC "%0, %2 \n" " beqzl %0, 1b \n" " addu %0, %1, %3 \n" - " .set mips0 \n" + " .set pop \n" : "=&r" (result), "=&r" (temp), "=m" (l->a.counter) : "Ir" (i), "m" (l->a.counter) : "memory"); @@ -49,13 +50,14 @@ static __inline__ long local_add_return(long i, local_t * l) unsigned long temp; __asm__ __volatile__( + " .set push \n" " .set "MIPS_ISA_ARCH_LEVEL" \n" "1:" __LL "%1, %2 # local_add_return \n" " addu %0, %1, %3 \n" __SC "%0, %2 \n" " beqz %0, 1b \n" " addu %0, %1, %3 \n" - " .set mips0 \n" + " .set pop \n" : "=&r" (result), "=&r" (temp), "=m" (l->a.counter) : "Ir" (i), "m" (l->a.counter) : "memory"); @@ -80,13 +82,14 @@ static __inline__ long local_sub_return(long i, local_t * l) unsigned long temp; __asm__ __volatile__( + " .set push \n" " .set arch=r4000 \n" "1:" __LL "%1, %2 # local_sub_return \n" " subu %0, %1, %3 \n" __SC "%0, %2 \n" " beqzl %0, 1b \n" " subu %0, %1, %3 \n" - " .set mips0 \n" + " .set pop \n" : "=&r" (result), "=&r" (temp), "=m" (l->a.counter) : "Ir" (i), "m" (l->a.counter) : "memory"); @@ -94,13 +97,14 @@ static __inline__ long local_sub_return(long i, local_t * l) unsigned long temp; __asm__ __volatile__( + " .set push \n" " .set "MIPS_ISA_ARCH_LEVEL" \n" "1:" __LL "%1, %2 # local_sub_return \n" " subu %0, %1, %3 \n" __SC "%0, %2 \n" " beqz %0, 1b \n" " subu %0, %1, %3 \n" - " .set mips0 \n" + " .set pop \n" : "=&r" (result), "=&r" (temp), "=m" (l->a.counter) : "Ir" (i), "m" (l->a.counter) : "memory"); diff --git a/arch/mips/include/asm/mach-jz4740/jz4740_mmc.h b/arch/mips/include/asm/mach-jz4740/jz4740_mmc.h index e9cc62cfac99..9a7de47c7c79 100644 --- a/arch/mips/include/asm/mach-jz4740/jz4740_mmc.h +++ b/arch/mips/include/asm/mach-jz4740/jz4740_mmc.h @@ -3,12 +3,8 @@ #define __LINUX_MMC_JZ4740_MMC struct jz4740_mmc_platform_data { - int gpio_power; - int gpio_card_detect; - int gpio_read_only; unsigned card_detect_active_low:1; unsigned read_only_active_low:1; - unsigned power_active_low:1; unsigned data_1bit:1; }; diff --git a/arch/mips/include/asm/mach-loongson64/kernel-entry-init.h b/arch/mips/include/asm/mach-loongson64/kernel-entry-init.h index cbac603ced19..b5e288a12dfe 100644 --- a/arch/mips/include/asm/mach-loongson64/kernel-entry-init.h +++ b/arch/mips/include/asm/mach-loongson64/kernel-entry-init.h @@ -31,7 +31,7 @@ /* Enable STFill Buffer */ mfc0 t0, CP0_PRID andi t0, (PRID_IMP_MASK | PRID_REV_MASK) - slti t0, (PRID_IMP_LOONGSON_64 | PRID_REV_LOONGSON3A_R2) + slti t0, (PRID_IMP_LOONGSON_64 | PRID_REV_LOONGSON3A_R2_0) bnez t0, 1f mfc0 t0, CP0_CONFIG6 or t0, 0x100 @@ -60,7 +60,7 @@ /* Enable STFill Buffer */ mfc0 t0, CP0_PRID andi t0, (PRID_IMP_MASK | PRID_REV_MASK) - slti t0, (PRID_IMP_LOONGSON_64 | PRID_REV_LOONGSON3A_R2) + slti t0, (PRID_IMP_LOONGSON_64 | PRID_REV_LOONGSON3A_R2_0) bnez t0, 1f mfc0 t0, CP0_CONFIG6 or t0, 0x100 diff --git a/arch/mips/include/asm/mach-loongson64/loongson.h b/arch/mips/include/asm/mach-loongson64/loongson.h index d0ae5d55413b..b6870fec0f99 100644 --- a/arch/mips/include/asm/mach-loongson64/loongson.h +++ b/arch/mips/include/asm/mach-loongson64/loongson.h @@ -113,7 +113,7 @@ static inline void do_perfcnt_IRQ(void) #define LOONGSON_PCICFG_SIZE 0x00000800 /* 2K */ #define LOONGSON_PCICFG_TOP (LOONGSON_PCICFG_BASE+LOONGSON_PCICFG_SIZE-1) -#if defined(CONFIG_HT_PCI) +#ifdef CONFIG_CPU_LOONGSON3 #define LOONGSON_PCIIO_BASE loongson_sysconf.pci_io_base #else #define LOONGSON_PCIIO_BASE 0x1fd00000 diff --git a/arch/mips/include/asm/mach-loongson64/mmzone.h b/arch/mips/include/asm/mach-loongson64/mmzone.h index c9f7e231e66b..59c8b11c090e 100644 --- a/arch/mips/include/asm/mach-loongson64/mmzone.h +++ b/arch/mips/include/asm/mach-loongson64/mmzone.h @@ -21,6 +21,7 @@ #define NODE3_ADDRSPACE_OFFSET 0x300000000000UL #define pa_to_nid(addr) (((addr) & 0xf00000000000) >> NODE_ADDRSPACE_SHIFT) +#define nid_to_addrbase(nid) ((nid) << NODE_ADDRSPACE_SHIFT) #define LEVELS_PER_SLICE 128 diff --git a/arch/mips/include/asm/mach-rc32434/rb.h b/arch/mips/include/asm/mach-rc32434/rb.h index aac8ce8902e7..5dfd4d66d6fc 100644 --- a/arch/mips/include/asm/mach-rc32434/rb.h +++ b/arch/mips/include/asm/mach-rc32434/rb.h @@ -71,12 +71,6 @@ struct korina_device { struct net_device *dev; }; -struct cf_device { - int gpio_pin; - void *dev; - struct gendisk *gd; -}; - struct mpmc_device { unsigned char state; spinlock_t lock; diff --git a/arch/mips/include/asm/mipsmtregs.h b/arch/mips/include/asm/mipsmtregs.h index 212336b7c0f4..be4cf9d477be 100644 --- a/arch/mips/include/asm/mipsmtregs.h +++ b/arch/mips/include/asm/mipsmtregs.h @@ -255,12 +255,12 @@ static inline unsigned int dmt(void) static inline void __raw_emt(void) { __asm__ __volatile__( + " .set push \n" " .set noreorder \n" " .set mips32r2 \n" " .word 0x41600be1 # emt \n" " ehb \n" - " .set mips0 \n" - " .set reorder"); + " .set pop"); } /* enable multi-threaded execution if previous suggested it should be. @@ -277,9 +277,10 @@ static inline void emt(int previous) static inline void ehb(void) { __asm__ __volatile__( + " .set push \n" " .set mips32r2 \n" " ehb \n" - " .set mips0 \n"); + " .set pop \n"); } #define mftc0(rt,sel) \ diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h index 341a02c92985..402b80af91aa 100644 --- a/arch/mips/include/asm/mipsregs.h +++ b/arch/mips/include/asm/mipsregs.h @@ -1345,9 +1345,10 @@ do { \ : "=r" (__res)); \ else \ __asm__ vol( \ + ".set\tpush\n\t" \ ".set\tmips32\n\t" \ "mfc0\t%0, " #source ", " #sel "\n\t" \ - ".set\tmips0\n\t" \ + ".set\tpop\n\t" \ : "=r" (__res)); \ __res; \ }) @@ -1358,15 +1359,17 @@ do { \ __res = __read_64bit_c0_split(source, sel, vol); \ else if (sel == 0) \ __asm__ vol( \ + ".set\tpush\n\t" \ ".set\tmips3\n\t" \ "dmfc0\t%0, " #source "\n\t" \ - ".set\tmips0" \ + ".set\tpop" \ : "=r" (__res)); \ else \ __asm__ vol( \ + ".set\tpush\n\t" \ ".set\tmips64\n\t" \ "dmfc0\t%0, " #source ", " #sel "\n\t" \ - ".set\tmips0" \ + ".set\tpop" \ : "=r" (__res)); \ __res; \ }) @@ -1391,9 +1394,10 @@ do { \ : : "Jr" ((unsigned int)(value))); \ else \ __asm__ __volatile__( \ + ".set\tpush\n\t" \ ".set\tmips32\n\t" \ "mtc0\t%z0, " #register ", " #sel "\n\t" \ - ".set\tmips0" \ + ".set\tpop" \ : : "Jr" ((unsigned int)(value))); \ } while (0) @@ -1403,15 +1407,17 @@ do { \ __write_64bit_c0_split(register, sel, value); \ else if (sel == 0) \ __asm__ __volatile__( \ + ".set\tpush\n\t" \ ".set\tmips3\n\t" \ "dmtc0\t%z0, " #register "\n\t" \ - ".set\tmips0" \ + ".set\tpop" \ : : "Jr" (value)); \ else \ __asm__ __volatile__( \ + ".set\tpush\n\t" \ ".set\tmips64\n\t" \ "dmtc0\t%z0, " #register ", " #sel "\n\t" \ - ".set\tmips0" \ + ".set\tpop" \ : : "Jr" (value)); \ } while (0) @@ -1463,19 +1469,21 @@ do { \ local_irq_save(__flags); \ if (sel == 0) \ __asm__ vol( \ + ".set\tpush\n\t" \ ".set\tmips64\n\t" \ "dmfc0\t%L0, " #source "\n\t" \ "dsra\t%M0, %L0, 32\n\t" \ "sll\t%L0, %L0, 0\n\t" \ - ".set\tmips0" \ + ".set\tpop" \ : "=r" (__val)); \ else \ __asm__ vol( \ + ".set\tpush\n\t" \ ".set\tmips64\n\t" \ "dmfc0\t%L0, " #source ", " #sel "\n\t" \ "dsra\t%M0, %L0, 32\n\t" \ "sll\t%L0, %L0, 0\n\t" \ - ".set\tmips0" \ + ".set\tpop" \ : "=r" (__val)); \ local_irq_restore(__flags); \ \ @@ -1498,23 +1506,25 @@ do { \ : "+r" (__tmp)); \ else if (sel == 0) \ __asm__ __volatile__( \ + ".set\tpush\n\t" \ ".set\tmips64\n\t" \ "dsll\t%L0, %L0, 32\n\t" \ "dsrl\t%L0, %L0, 32\n\t" \ "dsll\t%M0, %M0, 32\n\t" \ "or\t%L0, %L0, %M0\n\t" \ "dmtc0\t%L0, " #source "\n\t" \ - ".set\tmips0" \ + ".set\tpop" \ : "+r" (__tmp)); \ else \ __asm__ __volatile__( \ + ".set\tpush\n\t" \ ".set\tmips64\n\t" \ "dsll\t%L0, %L0, 32\n\t" \ "dsrl\t%L0, %L0, 32\n\t" \ "dsll\t%M0, %M0, 32\n\t" \ "or\t%L0, %L0, %M0\n\t" \ "dmtc0\t%L0, " #source ", " #sel "\n\t" \ - ".set\tmips0" \ + ".set\tpop" \ : "+r" (__tmp)); \ local_irq_restore(__flags); \ } while (0) diff --git a/arch/mips/include/asm/mmu.h b/arch/mips/include/asm/mmu.h index 0740be7d5d4a..88a108ce62c1 100644 --- a/arch/mips/include/asm/mmu.h +++ b/arch/mips/include/asm/mmu.h @@ -7,9 +7,8 @@ #include <linux/wait.h> typedef struct { - unsigned long asid[NR_CPUS]; + u64 asid[NR_CPUS]; void *vdso; - atomic_t fp_mode_switching; /* lock to be held whilst modifying fp_bd_emupage_allocmap */ spinlock_t bd_emupage_lock; diff --git a/arch/mips/include/asm/mmu_context.h b/arch/mips/include/asm/mmu_context.h index 94414561de0e..a589585be21b 100644 --- a/arch/mips/include/asm/mmu_context.h +++ b/arch/mips/include/asm/mmu_context.h @@ -76,14 +76,14 @@ extern unsigned long pgd_current[]; * All unused by hardware upper bits will be considered * as a software asid extension. */ -static unsigned long asid_version_mask(unsigned int cpu) +static inline u64 asid_version_mask(unsigned int cpu) { unsigned long asid_mask = cpu_asid_mask(&cpu_data[cpu]); - return ~(asid_mask | (asid_mask - 1)); + return ~(u64)(asid_mask | (asid_mask - 1)); } -static unsigned long asid_first_version(unsigned int cpu) +static inline u64 asid_first_version(unsigned int cpu) { return ~asid_version_mask(cpu) + 1; } @@ -102,14 +102,12 @@ static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) static inline void get_new_mmu_context(struct mm_struct *mm, unsigned long cpu) { - unsigned long asid = asid_cache(cpu); + u64 asid = asid_cache(cpu); if (!((asid += cpu_asid_inc()) & cpu_asid_mask(&cpu_data[cpu]))) { if (cpu_has_vtag_icache) flush_icache_all(); local_flush_tlb_all(); /* start new asid cycle */ - if (!asid) /* fix version if needed */ - asid = asid_first_version(cpu); } cpu_context(cpu, mm) = asid_cache(cpu) = asid; diff --git a/arch/mips/include/asm/mmzone.h b/arch/mips/include/asm/mmzone.h index f085fba41da5..b826b8473e95 100644 --- a/arch/mips/include/asm/mmzone.h +++ b/arch/mips/include/asm/mmzone.h @@ -7,7 +7,18 @@ #define _ASM_MMZONE_H_ #include <asm/page.h> -#include <mmzone.h> + +#ifdef CONFIG_NEED_MULTIPLE_NODES +# include <mmzone.h> +#endif + +#ifndef pa_to_nid +#define pa_to_nid(addr) 0 +#endif + +#ifndef nid_to_addrbase +#define nid_to_addrbase(nid) 0 +#endif #ifdef CONFIG_DISCONTIGMEM diff --git a/arch/mips/include/asm/octeon/cvmx-agl-defs.h b/arch/mips/include/asm/octeon/cvmx-agl-defs.h index 542ee09510b3..3635ab384447 100644 --- a/arch/mips/include/asm/octeon/cvmx-agl-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-agl-defs.h @@ -171,7 +171,6 @@ union cvmx_agl_gmx_bad_reg { uint64_t reserved_38_63:26; #endif } cn52xx; - struct cvmx_agl_gmx_bad_reg_cn52xx cn52xxp1; struct cvmx_agl_gmx_bad_reg_cn56xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_35_63:29; @@ -199,13 +198,6 @@ union cvmx_agl_gmx_bad_reg { uint64_t reserved_35_63:29; #endif } cn56xx; - struct cvmx_agl_gmx_bad_reg_cn56xx cn56xxp1; - struct cvmx_agl_gmx_bad_reg_s cn61xx; - struct cvmx_agl_gmx_bad_reg_s cn63xx; - struct cvmx_agl_gmx_bad_reg_s cn63xxp1; - struct cvmx_agl_gmx_bad_reg_s cn66xx; - struct cvmx_agl_gmx_bad_reg_s cn68xx; - struct cvmx_agl_gmx_bad_reg_s cn68xxp1; }; union cvmx_agl_gmx_bist { @@ -228,15 +220,6 @@ union cvmx_agl_gmx_bist { uint64_t reserved_10_63:54; #endif } cn52xx; - struct cvmx_agl_gmx_bist_cn52xx cn52xxp1; - struct cvmx_agl_gmx_bist_cn52xx cn56xx; - struct cvmx_agl_gmx_bist_cn52xx cn56xxp1; - struct cvmx_agl_gmx_bist_s cn61xx; - struct cvmx_agl_gmx_bist_s cn63xx; - struct cvmx_agl_gmx_bist_s cn63xxp1; - struct cvmx_agl_gmx_bist_s cn66xx; - struct cvmx_agl_gmx_bist_s cn68xx; - struct cvmx_agl_gmx_bist_s cn68xxp1; }; union cvmx_agl_gmx_drv_ctl { @@ -270,8 +253,6 @@ union cvmx_agl_gmx_drv_ctl { uint64_t reserved_49_63:15; #endif } s; - struct cvmx_agl_gmx_drv_ctl_s cn52xx; - struct cvmx_agl_gmx_drv_ctl_s cn52xxp1; struct cvmx_agl_gmx_drv_ctl_cn56xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_17_63:47; @@ -289,7 +270,6 @@ union cvmx_agl_gmx_drv_ctl { uint64_t reserved_17_63:47; #endif } cn56xx; - struct cvmx_agl_gmx_drv_ctl_cn56xx cn56xxp1; }; union cvmx_agl_gmx_inf_mode { @@ -305,10 +285,6 @@ union cvmx_agl_gmx_inf_mode { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_agl_gmx_inf_mode_s cn52xx; - struct cvmx_agl_gmx_inf_mode_s cn52xxp1; - struct cvmx_agl_gmx_inf_mode_s cn56xx; - struct cvmx_agl_gmx_inf_mode_s cn56xxp1; }; union cvmx_agl_gmx_prtx_cfg { @@ -363,15 +339,6 @@ union cvmx_agl_gmx_prtx_cfg { uint64_t reserved_6_63:58; #endif } cn52xx; - struct cvmx_agl_gmx_prtx_cfg_cn52xx cn52xxp1; - struct cvmx_agl_gmx_prtx_cfg_cn52xx cn56xx; - struct cvmx_agl_gmx_prtx_cfg_cn52xx cn56xxp1; - struct cvmx_agl_gmx_prtx_cfg_s cn61xx; - struct cvmx_agl_gmx_prtx_cfg_s cn63xx; - struct cvmx_agl_gmx_prtx_cfg_s cn63xxp1; - struct cvmx_agl_gmx_prtx_cfg_s cn66xx; - struct cvmx_agl_gmx_prtx_cfg_s cn68xx; - struct cvmx_agl_gmx_prtx_cfg_s cn68xxp1; }; union cvmx_agl_gmx_rxx_adr_cam0 { @@ -383,16 +350,6 @@ union cvmx_agl_gmx_rxx_adr_cam0 { uint64_t adr:64; #endif } s; - struct cvmx_agl_gmx_rxx_adr_cam0_s cn52xx; - struct cvmx_agl_gmx_rxx_adr_cam0_s cn52xxp1; - struct cvmx_agl_gmx_rxx_adr_cam0_s cn56xx; - struct cvmx_agl_gmx_rxx_adr_cam0_s cn56xxp1; - struct cvmx_agl_gmx_rxx_adr_cam0_s cn61xx; - struct cvmx_agl_gmx_rxx_adr_cam0_s cn63xx; - struct cvmx_agl_gmx_rxx_adr_cam0_s cn63xxp1; - struct cvmx_agl_gmx_rxx_adr_cam0_s cn66xx; - struct cvmx_agl_gmx_rxx_adr_cam0_s cn68xx; - struct cvmx_agl_gmx_rxx_adr_cam0_s cn68xxp1; }; union cvmx_agl_gmx_rxx_adr_cam1 { @@ -404,16 +361,6 @@ union cvmx_agl_gmx_rxx_adr_cam1 { uint64_t adr:64; #endif } s; - struct cvmx_agl_gmx_rxx_adr_cam1_s cn52xx; - struct cvmx_agl_gmx_rxx_adr_cam1_s cn52xxp1; - struct cvmx_agl_gmx_rxx_adr_cam1_s cn56xx; - struct cvmx_agl_gmx_rxx_adr_cam1_s cn56xxp1; - struct cvmx_agl_gmx_rxx_adr_cam1_s cn61xx; - struct cvmx_agl_gmx_rxx_adr_cam1_s cn63xx; - struct cvmx_agl_gmx_rxx_adr_cam1_s cn63xxp1; - struct cvmx_agl_gmx_rxx_adr_cam1_s cn66xx; - struct cvmx_agl_gmx_rxx_adr_cam1_s cn68xx; - struct cvmx_agl_gmx_rxx_adr_cam1_s cn68xxp1; }; union cvmx_agl_gmx_rxx_adr_cam2 { @@ -425,16 +372,6 @@ union cvmx_agl_gmx_rxx_adr_cam2 { uint64_t adr:64; #endif } s; - struct cvmx_agl_gmx_rxx_adr_cam2_s cn52xx; - struct cvmx_agl_gmx_rxx_adr_cam2_s cn52xxp1; - struct cvmx_agl_gmx_rxx_adr_cam2_s cn56xx; - struct cvmx_agl_gmx_rxx_adr_cam2_s cn56xxp1; - struct cvmx_agl_gmx_rxx_adr_cam2_s cn61xx; - struct cvmx_agl_gmx_rxx_adr_cam2_s cn63xx; - struct cvmx_agl_gmx_rxx_adr_cam2_s cn63xxp1; - struct cvmx_agl_gmx_rxx_adr_cam2_s cn66xx; - struct cvmx_agl_gmx_rxx_adr_cam2_s cn68xx; - struct cvmx_agl_gmx_rxx_adr_cam2_s cn68xxp1; }; union cvmx_agl_gmx_rxx_adr_cam3 { @@ -446,16 +383,6 @@ union cvmx_agl_gmx_rxx_adr_cam3 { uint64_t adr:64; #endif } s; - struct cvmx_agl_gmx_rxx_adr_cam3_s cn52xx; - struct cvmx_agl_gmx_rxx_adr_cam3_s cn52xxp1; - struct cvmx_agl_gmx_rxx_adr_cam3_s cn56xx; - struct cvmx_agl_gmx_rxx_adr_cam3_s cn56xxp1; - struct cvmx_agl_gmx_rxx_adr_cam3_s cn61xx; - struct cvmx_agl_gmx_rxx_adr_cam3_s cn63xx; - struct cvmx_agl_gmx_rxx_adr_cam3_s cn63xxp1; - struct cvmx_agl_gmx_rxx_adr_cam3_s cn66xx; - struct cvmx_agl_gmx_rxx_adr_cam3_s cn68xx; - struct cvmx_agl_gmx_rxx_adr_cam3_s cn68xxp1; }; union cvmx_agl_gmx_rxx_adr_cam4 { @@ -467,16 +394,6 @@ union cvmx_agl_gmx_rxx_adr_cam4 { uint64_t adr:64; #endif } s; - struct cvmx_agl_gmx_rxx_adr_cam4_s cn52xx; - struct cvmx_agl_gmx_rxx_adr_cam4_s cn52xxp1; - struct cvmx_agl_gmx_rxx_adr_cam4_s cn56xx; - struct cvmx_agl_gmx_rxx_adr_cam4_s cn56xxp1; - struct cvmx_agl_gmx_rxx_adr_cam4_s cn61xx; - struct cvmx_agl_gmx_rxx_adr_cam4_s cn63xx; - struct cvmx_agl_gmx_rxx_adr_cam4_s cn63xxp1; - struct cvmx_agl_gmx_rxx_adr_cam4_s cn66xx; - struct cvmx_agl_gmx_rxx_adr_cam4_s cn68xx; - struct cvmx_agl_gmx_rxx_adr_cam4_s cn68xxp1; }; union cvmx_agl_gmx_rxx_adr_cam5 { @@ -488,16 +405,6 @@ union cvmx_agl_gmx_rxx_adr_cam5 { uint64_t adr:64; #endif } s; - struct cvmx_agl_gmx_rxx_adr_cam5_s cn52xx; - struct cvmx_agl_gmx_rxx_adr_cam5_s cn52xxp1; - struct cvmx_agl_gmx_rxx_adr_cam5_s cn56xx; - struct cvmx_agl_gmx_rxx_adr_cam5_s cn56xxp1; - struct cvmx_agl_gmx_rxx_adr_cam5_s cn61xx; - struct cvmx_agl_gmx_rxx_adr_cam5_s cn63xx; - struct cvmx_agl_gmx_rxx_adr_cam5_s cn63xxp1; - struct cvmx_agl_gmx_rxx_adr_cam5_s cn66xx; - struct cvmx_agl_gmx_rxx_adr_cam5_s cn68xx; - struct cvmx_agl_gmx_rxx_adr_cam5_s cn68xxp1; }; union cvmx_agl_gmx_rxx_adr_cam_en { @@ -511,16 +418,6 @@ union cvmx_agl_gmx_rxx_adr_cam_en { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_agl_gmx_rxx_adr_cam_en_s cn52xx; - struct cvmx_agl_gmx_rxx_adr_cam_en_s cn52xxp1; - struct cvmx_agl_gmx_rxx_adr_cam_en_s cn56xx; - struct cvmx_agl_gmx_rxx_adr_cam_en_s cn56xxp1; - struct cvmx_agl_gmx_rxx_adr_cam_en_s cn61xx; - struct cvmx_agl_gmx_rxx_adr_cam_en_s cn63xx; - struct cvmx_agl_gmx_rxx_adr_cam_en_s cn63xxp1; - struct cvmx_agl_gmx_rxx_adr_cam_en_s cn66xx; - struct cvmx_agl_gmx_rxx_adr_cam_en_s cn68xx; - struct cvmx_agl_gmx_rxx_adr_cam_en_s cn68xxp1; }; union cvmx_agl_gmx_rxx_adr_ctl { @@ -538,16 +435,6 @@ union cvmx_agl_gmx_rxx_adr_ctl { uint64_t reserved_4_63:60; #endif } s; - struct cvmx_agl_gmx_rxx_adr_ctl_s cn52xx; - struct cvmx_agl_gmx_rxx_adr_ctl_s cn52xxp1; - struct cvmx_agl_gmx_rxx_adr_ctl_s cn56xx; - struct cvmx_agl_gmx_rxx_adr_ctl_s cn56xxp1; - struct cvmx_agl_gmx_rxx_adr_ctl_s cn61xx; - struct cvmx_agl_gmx_rxx_adr_ctl_s cn63xx; - struct cvmx_agl_gmx_rxx_adr_ctl_s cn63xxp1; - struct cvmx_agl_gmx_rxx_adr_ctl_s cn66xx; - struct cvmx_agl_gmx_rxx_adr_ctl_s cn68xx; - struct cvmx_agl_gmx_rxx_adr_ctl_s cn68xxp1; }; union cvmx_agl_gmx_rxx_decision { @@ -561,16 +448,6 @@ union cvmx_agl_gmx_rxx_decision { uint64_t reserved_5_63:59; #endif } s; - struct cvmx_agl_gmx_rxx_decision_s cn52xx; - struct cvmx_agl_gmx_rxx_decision_s cn52xxp1; - struct cvmx_agl_gmx_rxx_decision_s cn56xx; - struct cvmx_agl_gmx_rxx_decision_s cn56xxp1; - struct cvmx_agl_gmx_rxx_decision_s cn61xx; - struct cvmx_agl_gmx_rxx_decision_s cn63xx; - struct cvmx_agl_gmx_rxx_decision_s cn63xxp1; - struct cvmx_agl_gmx_rxx_decision_s cn66xx; - struct cvmx_agl_gmx_rxx_decision_s cn68xx; - struct cvmx_agl_gmx_rxx_decision_s cn68xxp1; }; union cvmx_agl_gmx_rxx_frm_chk { @@ -627,15 +504,6 @@ union cvmx_agl_gmx_rxx_frm_chk { uint64_t reserved_9_63:55; #endif } cn52xx; - struct cvmx_agl_gmx_rxx_frm_chk_cn52xx cn52xxp1; - struct cvmx_agl_gmx_rxx_frm_chk_cn52xx cn56xx; - struct cvmx_agl_gmx_rxx_frm_chk_cn52xx cn56xxp1; - struct cvmx_agl_gmx_rxx_frm_chk_s cn61xx; - struct cvmx_agl_gmx_rxx_frm_chk_s cn63xx; - struct cvmx_agl_gmx_rxx_frm_chk_s cn63xxp1; - struct cvmx_agl_gmx_rxx_frm_chk_s cn66xx; - struct cvmx_agl_gmx_rxx_frm_chk_s cn68xx; - struct cvmx_agl_gmx_rxx_frm_chk_s cn68xxp1; }; union cvmx_agl_gmx_rxx_frm_ctl { @@ -700,15 +568,6 @@ union cvmx_agl_gmx_rxx_frm_ctl { uint64_t reserved_10_63:54; #endif } cn52xx; - struct cvmx_agl_gmx_rxx_frm_ctl_cn52xx cn52xxp1; - struct cvmx_agl_gmx_rxx_frm_ctl_cn52xx cn56xx; - struct cvmx_agl_gmx_rxx_frm_ctl_cn52xx cn56xxp1; - struct cvmx_agl_gmx_rxx_frm_ctl_s cn61xx; - struct cvmx_agl_gmx_rxx_frm_ctl_s cn63xx; - struct cvmx_agl_gmx_rxx_frm_ctl_s cn63xxp1; - struct cvmx_agl_gmx_rxx_frm_ctl_s cn66xx; - struct cvmx_agl_gmx_rxx_frm_ctl_s cn68xx; - struct cvmx_agl_gmx_rxx_frm_ctl_s cn68xxp1; }; union cvmx_agl_gmx_rxx_frm_max { @@ -722,16 +581,6 @@ union cvmx_agl_gmx_rxx_frm_max { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_agl_gmx_rxx_frm_max_s cn52xx; - struct cvmx_agl_gmx_rxx_frm_max_s cn52xxp1; - struct cvmx_agl_gmx_rxx_frm_max_s cn56xx; - struct cvmx_agl_gmx_rxx_frm_max_s cn56xxp1; - struct cvmx_agl_gmx_rxx_frm_max_s cn61xx; - struct cvmx_agl_gmx_rxx_frm_max_s cn63xx; - struct cvmx_agl_gmx_rxx_frm_max_s cn63xxp1; - struct cvmx_agl_gmx_rxx_frm_max_s cn66xx; - struct cvmx_agl_gmx_rxx_frm_max_s cn68xx; - struct cvmx_agl_gmx_rxx_frm_max_s cn68xxp1; }; union cvmx_agl_gmx_rxx_frm_min { @@ -745,16 +594,6 @@ union cvmx_agl_gmx_rxx_frm_min { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_agl_gmx_rxx_frm_min_s cn52xx; - struct cvmx_agl_gmx_rxx_frm_min_s cn52xxp1; - struct cvmx_agl_gmx_rxx_frm_min_s cn56xx; - struct cvmx_agl_gmx_rxx_frm_min_s cn56xxp1; - struct cvmx_agl_gmx_rxx_frm_min_s cn61xx; - struct cvmx_agl_gmx_rxx_frm_min_s cn63xx; - struct cvmx_agl_gmx_rxx_frm_min_s cn63xxp1; - struct cvmx_agl_gmx_rxx_frm_min_s cn66xx; - struct cvmx_agl_gmx_rxx_frm_min_s cn68xx; - struct cvmx_agl_gmx_rxx_frm_min_s cn68xxp1; }; union cvmx_agl_gmx_rxx_ifg { @@ -768,16 +607,6 @@ union cvmx_agl_gmx_rxx_ifg { uint64_t reserved_4_63:60; #endif } s; - struct cvmx_agl_gmx_rxx_ifg_s cn52xx; - struct cvmx_agl_gmx_rxx_ifg_s cn52xxp1; - struct cvmx_agl_gmx_rxx_ifg_s cn56xx; - struct cvmx_agl_gmx_rxx_ifg_s cn56xxp1; - struct cvmx_agl_gmx_rxx_ifg_s cn61xx; - struct cvmx_agl_gmx_rxx_ifg_s cn63xx; - struct cvmx_agl_gmx_rxx_ifg_s cn63xxp1; - struct cvmx_agl_gmx_rxx_ifg_s cn66xx; - struct cvmx_agl_gmx_rxx_ifg_s cn68xx; - struct cvmx_agl_gmx_rxx_ifg_s cn68xxp1; }; union cvmx_agl_gmx_rxx_int_en { @@ -872,15 +701,6 @@ union cvmx_agl_gmx_rxx_int_en { uint64_t reserved_20_63:44; #endif } cn52xx; - struct cvmx_agl_gmx_rxx_int_en_cn52xx cn52xxp1; - struct cvmx_agl_gmx_rxx_int_en_cn52xx cn56xx; - struct cvmx_agl_gmx_rxx_int_en_cn52xx cn56xxp1; - struct cvmx_agl_gmx_rxx_int_en_s cn61xx; - struct cvmx_agl_gmx_rxx_int_en_s cn63xx; - struct cvmx_agl_gmx_rxx_int_en_s cn63xxp1; - struct cvmx_agl_gmx_rxx_int_en_s cn66xx; - struct cvmx_agl_gmx_rxx_int_en_s cn68xx; - struct cvmx_agl_gmx_rxx_int_en_s cn68xxp1; }; union cvmx_agl_gmx_rxx_int_reg { @@ -975,15 +795,6 @@ union cvmx_agl_gmx_rxx_int_reg { uint64_t reserved_20_63:44; #endif } cn52xx; - struct cvmx_agl_gmx_rxx_int_reg_cn52xx cn52xxp1; - struct cvmx_agl_gmx_rxx_int_reg_cn52xx cn56xx; - struct cvmx_agl_gmx_rxx_int_reg_cn52xx cn56xxp1; - struct cvmx_agl_gmx_rxx_int_reg_s cn61xx; - struct cvmx_agl_gmx_rxx_int_reg_s cn63xx; - struct cvmx_agl_gmx_rxx_int_reg_s cn63xxp1; - struct cvmx_agl_gmx_rxx_int_reg_s cn66xx; - struct cvmx_agl_gmx_rxx_int_reg_s cn68xx; - struct cvmx_agl_gmx_rxx_int_reg_s cn68xxp1; }; union cvmx_agl_gmx_rxx_jabber { @@ -997,16 +808,6 @@ union cvmx_agl_gmx_rxx_jabber { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_agl_gmx_rxx_jabber_s cn52xx; - struct cvmx_agl_gmx_rxx_jabber_s cn52xxp1; - struct cvmx_agl_gmx_rxx_jabber_s cn56xx; - struct cvmx_agl_gmx_rxx_jabber_s cn56xxp1; - struct cvmx_agl_gmx_rxx_jabber_s cn61xx; - struct cvmx_agl_gmx_rxx_jabber_s cn63xx; - struct cvmx_agl_gmx_rxx_jabber_s cn63xxp1; - struct cvmx_agl_gmx_rxx_jabber_s cn66xx; - struct cvmx_agl_gmx_rxx_jabber_s cn68xx; - struct cvmx_agl_gmx_rxx_jabber_s cn68xxp1; }; union cvmx_agl_gmx_rxx_pause_drop_time { @@ -1020,16 +821,6 @@ union cvmx_agl_gmx_rxx_pause_drop_time { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_agl_gmx_rxx_pause_drop_time_s cn52xx; - struct cvmx_agl_gmx_rxx_pause_drop_time_s cn52xxp1; - struct cvmx_agl_gmx_rxx_pause_drop_time_s cn56xx; - struct cvmx_agl_gmx_rxx_pause_drop_time_s cn56xxp1; - struct cvmx_agl_gmx_rxx_pause_drop_time_s cn61xx; - struct cvmx_agl_gmx_rxx_pause_drop_time_s cn63xx; - struct cvmx_agl_gmx_rxx_pause_drop_time_s cn63xxp1; - struct cvmx_agl_gmx_rxx_pause_drop_time_s cn66xx; - struct cvmx_agl_gmx_rxx_pause_drop_time_s cn68xx; - struct cvmx_agl_gmx_rxx_pause_drop_time_s cn68xxp1; }; union cvmx_agl_gmx_rxx_rx_inbnd { @@ -1047,12 +838,6 @@ union cvmx_agl_gmx_rxx_rx_inbnd { uint64_t reserved_4_63:60; #endif } s; - struct cvmx_agl_gmx_rxx_rx_inbnd_s cn61xx; - struct cvmx_agl_gmx_rxx_rx_inbnd_s cn63xx; - struct cvmx_agl_gmx_rxx_rx_inbnd_s cn63xxp1; - struct cvmx_agl_gmx_rxx_rx_inbnd_s cn66xx; - struct cvmx_agl_gmx_rxx_rx_inbnd_s cn68xx; - struct cvmx_agl_gmx_rxx_rx_inbnd_s cn68xxp1; }; union cvmx_agl_gmx_rxx_stats_ctl { @@ -1066,16 +851,6 @@ union cvmx_agl_gmx_rxx_stats_ctl { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_agl_gmx_rxx_stats_ctl_s cn52xx; - struct cvmx_agl_gmx_rxx_stats_ctl_s cn52xxp1; - struct cvmx_agl_gmx_rxx_stats_ctl_s cn56xx; - struct cvmx_agl_gmx_rxx_stats_ctl_s cn56xxp1; - struct cvmx_agl_gmx_rxx_stats_ctl_s cn61xx; - struct cvmx_agl_gmx_rxx_stats_ctl_s cn63xx; - struct cvmx_agl_gmx_rxx_stats_ctl_s cn63xxp1; - struct cvmx_agl_gmx_rxx_stats_ctl_s cn66xx; - struct cvmx_agl_gmx_rxx_stats_ctl_s cn68xx; - struct cvmx_agl_gmx_rxx_stats_ctl_s cn68xxp1; }; union cvmx_agl_gmx_rxx_stats_octs { @@ -1089,16 +864,6 @@ union cvmx_agl_gmx_rxx_stats_octs { uint64_t reserved_48_63:16; #endif } s; - struct cvmx_agl_gmx_rxx_stats_octs_s cn52xx; - struct cvmx_agl_gmx_rxx_stats_octs_s cn52xxp1; - struct cvmx_agl_gmx_rxx_stats_octs_s cn56xx; - struct cvmx_agl_gmx_rxx_stats_octs_s cn56xxp1; - struct cvmx_agl_gmx_rxx_stats_octs_s cn61xx; - struct cvmx_agl_gmx_rxx_stats_octs_s cn63xx; - struct cvmx_agl_gmx_rxx_stats_octs_s cn63xxp1; - struct cvmx_agl_gmx_rxx_stats_octs_s cn66xx; - struct cvmx_agl_gmx_rxx_stats_octs_s cn68xx; - struct cvmx_agl_gmx_rxx_stats_octs_s cn68xxp1; }; union cvmx_agl_gmx_rxx_stats_octs_ctl { @@ -1112,16 +877,6 @@ union cvmx_agl_gmx_rxx_stats_octs_ctl { uint64_t reserved_48_63:16; #endif } s; - struct cvmx_agl_gmx_rxx_stats_octs_ctl_s cn52xx; - struct cvmx_agl_gmx_rxx_stats_octs_ctl_s cn52xxp1; - struct cvmx_agl_gmx_rxx_stats_octs_ctl_s cn56xx; - struct cvmx_agl_gmx_rxx_stats_octs_ctl_s cn56xxp1; - struct cvmx_agl_gmx_rxx_stats_octs_ctl_s cn61xx; - struct cvmx_agl_gmx_rxx_stats_octs_ctl_s cn63xx; - struct cvmx_agl_gmx_rxx_stats_octs_ctl_s cn63xxp1; - struct cvmx_agl_gmx_rxx_stats_octs_ctl_s cn66xx; - struct cvmx_agl_gmx_rxx_stats_octs_ctl_s cn68xx; - struct cvmx_agl_gmx_rxx_stats_octs_ctl_s cn68xxp1; }; union cvmx_agl_gmx_rxx_stats_octs_dmac { @@ -1135,16 +890,6 @@ union cvmx_agl_gmx_rxx_stats_octs_dmac { uint64_t reserved_48_63:16; #endif } s; - struct cvmx_agl_gmx_rxx_stats_octs_dmac_s cn52xx; - struct cvmx_agl_gmx_rxx_stats_octs_dmac_s cn52xxp1; - struct cvmx_agl_gmx_rxx_stats_octs_dmac_s cn56xx; - struct cvmx_agl_gmx_rxx_stats_octs_dmac_s cn56xxp1; - struct cvmx_agl_gmx_rxx_stats_octs_dmac_s cn61xx; - struct cvmx_agl_gmx_rxx_stats_octs_dmac_s cn63xx; - struct cvmx_agl_gmx_rxx_stats_octs_dmac_s cn63xxp1; - struct cvmx_agl_gmx_rxx_stats_octs_dmac_s cn66xx; - struct cvmx_agl_gmx_rxx_stats_octs_dmac_s cn68xx; - struct cvmx_agl_gmx_rxx_stats_octs_dmac_s cn68xxp1; }; union cvmx_agl_gmx_rxx_stats_octs_drp { @@ -1158,16 +903,6 @@ union cvmx_agl_gmx_rxx_stats_octs_drp { uint64_t reserved_48_63:16; #endif } s; - struct cvmx_agl_gmx_rxx_stats_octs_drp_s cn52xx; - struct cvmx_agl_gmx_rxx_stats_octs_drp_s cn52xxp1; - struct cvmx_agl_gmx_rxx_stats_octs_drp_s cn56xx; - struct cvmx_agl_gmx_rxx_stats_octs_drp_s cn56xxp1; - struct cvmx_agl_gmx_rxx_stats_octs_drp_s cn61xx; - struct cvmx_agl_gmx_rxx_stats_octs_drp_s cn63xx; - struct cvmx_agl_gmx_rxx_stats_octs_drp_s cn63xxp1; - struct cvmx_agl_gmx_rxx_stats_octs_drp_s cn66xx; - struct cvmx_agl_gmx_rxx_stats_octs_drp_s cn68xx; - struct cvmx_agl_gmx_rxx_stats_octs_drp_s cn68xxp1; }; union cvmx_agl_gmx_rxx_stats_pkts { @@ -1181,16 +916,6 @@ union cvmx_agl_gmx_rxx_stats_pkts { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_agl_gmx_rxx_stats_pkts_s cn52xx; - struct cvmx_agl_gmx_rxx_stats_pkts_s cn52xxp1; - struct cvmx_agl_gmx_rxx_stats_pkts_s cn56xx; - struct cvmx_agl_gmx_rxx_stats_pkts_s cn56xxp1; - struct cvmx_agl_gmx_rxx_stats_pkts_s cn61xx; - struct cvmx_agl_gmx_rxx_stats_pkts_s cn63xx; - struct cvmx_agl_gmx_rxx_stats_pkts_s cn63xxp1; - struct cvmx_agl_gmx_rxx_stats_pkts_s cn66xx; - struct cvmx_agl_gmx_rxx_stats_pkts_s cn68xx; - struct cvmx_agl_gmx_rxx_stats_pkts_s cn68xxp1; }; union cvmx_agl_gmx_rxx_stats_pkts_bad { @@ -1204,16 +929,6 @@ union cvmx_agl_gmx_rxx_stats_pkts_bad { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_agl_gmx_rxx_stats_pkts_bad_s cn52xx; - struct cvmx_agl_gmx_rxx_stats_pkts_bad_s cn52xxp1; - struct cvmx_agl_gmx_rxx_stats_pkts_bad_s cn56xx; - struct cvmx_agl_gmx_rxx_stats_pkts_bad_s cn56xxp1; - struct cvmx_agl_gmx_rxx_stats_pkts_bad_s cn61xx; - struct cvmx_agl_gmx_rxx_stats_pkts_bad_s cn63xx; - struct cvmx_agl_gmx_rxx_stats_pkts_bad_s cn63xxp1; - struct cvmx_agl_gmx_rxx_stats_pkts_bad_s cn66xx; - struct cvmx_agl_gmx_rxx_stats_pkts_bad_s cn68xx; - struct cvmx_agl_gmx_rxx_stats_pkts_bad_s cn68xxp1; }; union cvmx_agl_gmx_rxx_stats_pkts_ctl { @@ -1227,16 +942,6 @@ union cvmx_agl_gmx_rxx_stats_pkts_ctl { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_agl_gmx_rxx_stats_pkts_ctl_s cn52xx; - struct cvmx_agl_gmx_rxx_stats_pkts_ctl_s cn52xxp1; - struct cvmx_agl_gmx_rxx_stats_pkts_ctl_s cn56xx; - struct cvmx_agl_gmx_rxx_stats_pkts_ctl_s cn56xxp1; - struct cvmx_agl_gmx_rxx_stats_pkts_ctl_s cn61xx; - struct cvmx_agl_gmx_rxx_stats_pkts_ctl_s cn63xx; - struct cvmx_agl_gmx_rxx_stats_pkts_ctl_s cn63xxp1; - struct cvmx_agl_gmx_rxx_stats_pkts_ctl_s cn66xx; - struct cvmx_agl_gmx_rxx_stats_pkts_ctl_s cn68xx; - struct cvmx_agl_gmx_rxx_stats_pkts_ctl_s cn68xxp1; }; union cvmx_agl_gmx_rxx_stats_pkts_dmac { @@ -1250,16 +955,6 @@ union cvmx_agl_gmx_rxx_stats_pkts_dmac { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_agl_gmx_rxx_stats_pkts_dmac_s cn52xx; - struct cvmx_agl_gmx_rxx_stats_pkts_dmac_s cn52xxp1; - struct cvmx_agl_gmx_rxx_stats_pkts_dmac_s cn56xx; - struct cvmx_agl_gmx_rxx_stats_pkts_dmac_s cn56xxp1; - struct cvmx_agl_gmx_rxx_stats_pkts_dmac_s cn61xx; - struct cvmx_agl_gmx_rxx_stats_pkts_dmac_s cn63xx; - struct cvmx_agl_gmx_rxx_stats_pkts_dmac_s cn63xxp1; - struct cvmx_agl_gmx_rxx_stats_pkts_dmac_s cn66xx; - struct cvmx_agl_gmx_rxx_stats_pkts_dmac_s cn68xx; - struct cvmx_agl_gmx_rxx_stats_pkts_dmac_s cn68xxp1; }; union cvmx_agl_gmx_rxx_stats_pkts_drp { @@ -1273,16 +968,6 @@ union cvmx_agl_gmx_rxx_stats_pkts_drp { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_agl_gmx_rxx_stats_pkts_drp_s cn52xx; - struct cvmx_agl_gmx_rxx_stats_pkts_drp_s cn52xxp1; - struct cvmx_agl_gmx_rxx_stats_pkts_drp_s cn56xx; - struct cvmx_agl_gmx_rxx_stats_pkts_drp_s cn56xxp1; - struct cvmx_agl_gmx_rxx_stats_pkts_drp_s cn61xx; - struct cvmx_agl_gmx_rxx_stats_pkts_drp_s cn63xx; - struct cvmx_agl_gmx_rxx_stats_pkts_drp_s cn63xxp1; - struct cvmx_agl_gmx_rxx_stats_pkts_drp_s cn66xx; - struct cvmx_agl_gmx_rxx_stats_pkts_drp_s cn68xx; - struct cvmx_agl_gmx_rxx_stats_pkts_drp_s cn68xxp1; }; union cvmx_agl_gmx_rxx_udd_skp { @@ -1300,16 +985,6 @@ union cvmx_agl_gmx_rxx_udd_skp { uint64_t reserved_9_63:55; #endif } s; - struct cvmx_agl_gmx_rxx_udd_skp_s cn52xx; - struct cvmx_agl_gmx_rxx_udd_skp_s cn52xxp1; - struct cvmx_agl_gmx_rxx_udd_skp_s cn56xx; - struct cvmx_agl_gmx_rxx_udd_skp_s cn56xxp1; - struct cvmx_agl_gmx_rxx_udd_skp_s cn61xx; - struct cvmx_agl_gmx_rxx_udd_skp_s cn63xx; - struct cvmx_agl_gmx_rxx_udd_skp_s cn63xxp1; - struct cvmx_agl_gmx_rxx_udd_skp_s cn66xx; - struct cvmx_agl_gmx_rxx_udd_skp_s cn68xx; - struct cvmx_agl_gmx_rxx_udd_skp_s cn68xxp1; }; union cvmx_agl_gmx_rx_bp_dropx { @@ -1323,16 +998,6 @@ union cvmx_agl_gmx_rx_bp_dropx { uint64_t reserved_6_63:58; #endif } s; - struct cvmx_agl_gmx_rx_bp_dropx_s cn52xx; - struct cvmx_agl_gmx_rx_bp_dropx_s cn52xxp1; - struct cvmx_agl_gmx_rx_bp_dropx_s cn56xx; - struct cvmx_agl_gmx_rx_bp_dropx_s cn56xxp1; - struct cvmx_agl_gmx_rx_bp_dropx_s cn61xx; - struct cvmx_agl_gmx_rx_bp_dropx_s cn63xx; - struct cvmx_agl_gmx_rx_bp_dropx_s cn63xxp1; - struct cvmx_agl_gmx_rx_bp_dropx_s cn66xx; - struct cvmx_agl_gmx_rx_bp_dropx_s cn68xx; - struct cvmx_agl_gmx_rx_bp_dropx_s cn68xxp1; }; union cvmx_agl_gmx_rx_bp_offx { @@ -1346,16 +1011,6 @@ union cvmx_agl_gmx_rx_bp_offx { uint64_t reserved_6_63:58; #endif } s; - struct cvmx_agl_gmx_rx_bp_offx_s cn52xx; - struct cvmx_agl_gmx_rx_bp_offx_s cn52xxp1; - struct cvmx_agl_gmx_rx_bp_offx_s cn56xx; - struct cvmx_agl_gmx_rx_bp_offx_s cn56xxp1; - struct cvmx_agl_gmx_rx_bp_offx_s cn61xx; - struct cvmx_agl_gmx_rx_bp_offx_s cn63xx; - struct cvmx_agl_gmx_rx_bp_offx_s cn63xxp1; - struct cvmx_agl_gmx_rx_bp_offx_s cn66xx; - struct cvmx_agl_gmx_rx_bp_offx_s cn68xx; - struct cvmx_agl_gmx_rx_bp_offx_s cn68xxp1; }; union cvmx_agl_gmx_rx_bp_onx { @@ -1369,16 +1024,6 @@ union cvmx_agl_gmx_rx_bp_onx { uint64_t reserved_9_63:55; #endif } s; - struct cvmx_agl_gmx_rx_bp_onx_s cn52xx; - struct cvmx_agl_gmx_rx_bp_onx_s cn52xxp1; - struct cvmx_agl_gmx_rx_bp_onx_s cn56xx; - struct cvmx_agl_gmx_rx_bp_onx_s cn56xxp1; - struct cvmx_agl_gmx_rx_bp_onx_s cn61xx; - struct cvmx_agl_gmx_rx_bp_onx_s cn63xx; - struct cvmx_agl_gmx_rx_bp_onx_s cn63xxp1; - struct cvmx_agl_gmx_rx_bp_onx_s cn66xx; - struct cvmx_agl_gmx_rx_bp_onx_s cn68xx; - struct cvmx_agl_gmx_rx_bp_onx_s cn68xxp1; }; union cvmx_agl_gmx_rx_prt_info { @@ -1396,8 +1041,6 @@ union cvmx_agl_gmx_rx_prt_info { uint64_t reserved_18_63:46; #endif } s; - struct cvmx_agl_gmx_rx_prt_info_s cn52xx; - struct cvmx_agl_gmx_rx_prt_info_s cn52xxp1; struct cvmx_agl_gmx_rx_prt_info_cn56xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_17_63:47; @@ -1411,13 +1054,6 @@ union cvmx_agl_gmx_rx_prt_info { uint64_t reserved_17_63:47; #endif } cn56xx; - struct cvmx_agl_gmx_rx_prt_info_cn56xx cn56xxp1; - struct cvmx_agl_gmx_rx_prt_info_s cn61xx; - struct cvmx_agl_gmx_rx_prt_info_s cn63xx; - struct cvmx_agl_gmx_rx_prt_info_s cn63xxp1; - struct cvmx_agl_gmx_rx_prt_info_s cn66xx; - struct cvmx_agl_gmx_rx_prt_info_s cn68xx; - struct cvmx_agl_gmx_rx_prt_info_s cn68xxp1; }; union cvmx_agl_gmx_rx_tx_status { @@ -1435,8 +1071,6 @@ union cvmx_agl_gmx_rx_tx_status { uint64_t reserved_6_63:58; #endif } s; - struct cvmx_agl_gmx_rx_tx_status_s cn52xx; - struct cvmx_agl_gmx_rx_tx_status_s cn52xxp1; struct cvmx_agl_gmx_rx_tx_status_cn56xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_5_63:59; @@ -1450,13 +1084,6 @@ union cvmx_agl_gmx_rx_tx_status { uint64_t reserved_5_63:59; #endif } cn56xx; - struct cvmx_agl_gmx_rx_tx_status_cn56xx cn56xxp1; - struct cvmx_agl_gmx_rx_tx_status_s cn61xx; - struct cvmx_agl_gmx_rx_tx_status_s cn63xx; - struct cvmx_agl_gmx_rx_tx_status_s cn63xxp1; - struct cvmx_agl_gmx_rx_tx_status_s cn66xx; - struct cvmx_agl_gmx_rx_tx_status_s cn68xx; - struct cvmx_agl_gmx_rx_tx_status_s cn68xxp1; }; union cvmx_agl_gmx_smacx { @@ -1470,16 +1097,6 @@ union cvmx_agl_gmx_smacx { uint64_t reserved_48_63:16; #endif } s; - struct cvmx_agl_gmx_smacx_s cn52xx; - struct cvmx_agl_gmx_smacx_s cn52xxp1; - struct cvmx_agl_gmx_smacx_s cn56xx; - struct cvmx_agl_gmx_smacx_s cn56xxp1; - struct cvmx_agl_gmx_smacx_s cn61xx; - struct cvmx_agl_gmx_smacx_s cn63xx; - struct cvmx_agl_gmx_smacx_s cn63xxp1; - struct cvmx_agl_gmx_smacx_s cn66xx; - struct cvmx_agl_gmx_smacx_s cn68xx; - struct cvmx_agl_gmx_smacx_s cn68xxp1; }; union cvmx_agl_gmx_stat_bp { @@ -1495,16 +1112,6 @@ union cvmx_agl_gmx_stat_bp { uint64_t reserved_17_63:47; #endif } s; - struct cvmx_agl_gmx_stat_bp_s cn52xx; - struct cvmx_agl_gmx_stat_bp_s cn52xxp1; - struct cvmx_agl_gmx_stat_bp_s cn56xx; - struct cvmx_agl_gmx_stat_bp_s cn56xxp1; - struct cvmx_agl_gmx_stat_bp_s cn61xx; - struct cvmx_agl_gmx_stat_bp_s cn63xx; - struct cvmx_agl_gmx_stat_bp_s cn63xxp1; - struct cvmx_agl_gmx_stat_bp_s cn66xx; - struct cvmx_agl_gmx_stat_bp_s cn68xx; - struct cvmx_agl_gmx_stat_bp_s cn68xxp1; }; union cvmx_agl_gmx_txx_append { @@ -1524,16 +1131,6 @@ union cvmx_agl_gmx_txx_append { uint64_t reserved_4_63:60; #endif } s; - struct cvmx_agl_gmx_txx_append_s cn52xx; - struct cvmx_agl_gmx_txx_append_s cn52xxp1; - struct cvmx_agl_gmx_txx_append_s cn56xx; - struct cvmx_agl_gmx_txx_append_s cn56xxp1; - struct cvmx_agl_gmx_txx_append_s cn61xx; - struct cvmx_agl_gmx_txx_append_s cn63xx; - struct cvmx_agl_gmx_txx_append_s cn63xxp1; - struct cvmx_agl_gmx_txx_append_s cn66xx; - struct cvmx_agl_gmx_txx_append_s cn68xx; - struct cvmx_agl_gmx_txx_append_s cn68xxp1; }; union cvmx_agl_gmx_txx_clk { @@ -1547,12 +1144,6 @@ union cvmx_agl_gmx_txx_clk { uint64_t reserved_6_63:58; #endif } s; - struct cvmx_agl_gmx_txx_clk_s cn61xx; - struct cvmx_agl_gmx_txx_clk_s cn63xx; - struct cvmx_agl_gmx_txx_clk_s cn63xxp1; - struct cvmx_agl_gmx_txx_clk_s cn66xx; - struct cvmx_agl_gmx_txx_clk_s cn68xx; - struct cvmx_agl_gmx_txx_clk_s cn68xxp1; }; union cvmx_agl_gmx_txx_ctl { @@ -1568,16 +1159,6 @@ union cvmx_agl_gmx_txx_ctl { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_agl_gmx_txx_ctl_s cn52xx; - struct cvmx_agl_gmx_txx_ctl_s cn52xxp1; - struct cvmx_agl_gmx_txx_ctl_s cn56xx; - struct cvmx_agl_gmx_txx_ctl_s cn56xxp1; - struct cvmx_agl_gmx_txx_ctl_s cn61xx; - struct cvmx_agl_gmx_txx_ctl_s cn63xx; - struct cvmx_agl_gmx_txx_ctl_s cn63xxp1; - struct cvmx_agl_gmx_txx_ctl_s cn66xx; - struct cvmx_agl_gmx_txx_ctl_s cn68xx; - struct cvmx_agl_gmx_txx_ctl_s cn68xxp1; }; union cvmx_agl_gmx_txx_min_pkt { @@ -1591,16 +1172,6 @@ union cvmx_agl_gmx_txx_min_pkt { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_agl_gmx_txx_min_pkt_s cn52xx; - struct cvmx_agl_gmx_txx_min_pkt_s cn52xxp1; - struct cvmx_agl_gmx_txx_min_pkt_s cn56xx; - struct cvmx_agl_gmx_txx_min_pkt_s cn56xxp1; - struct cvmx_agl_gmx_txx_min_pkt_s cn61xx; - struct cvmx_agl_gmx_txx_min_pkt_s cn63xx; - struct cvmx_agl_gmx_txx_min_pkt_s cn63xxp1; - struct cvmx_agl_gmx_txx_min_pkt_s cn66xx; - struct cvmx_agl_gmx_txx_min_pkt_s cn68xx; - struct cvmx_agl_gmx_txx_min_pkt_s cn68xxp1; }; union cvmx_agl_gmx_txx_pause_pkt_interval { @@ -1614,16 +1185,6 @@ union cvmx_agl_gmx_txx_pause_pkt_interval { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_agl_gmx_txx_pause_pkt_interval_s cn52xx; - struct cvmx_agl_gmx_txx_pause_pkt_interval_s cn52xxp1; - struct cvmx_agl_gmx_txx_pause_pkt_interval_s cn56xx; - struct cvmx_agl_gmx_txx_pause_pkt_interval_s cn56xxp1; - struct cvmx_agl_gmx_txx_pause_pkt_interval_s cn61xx; - struct cvmx_agl_gmx_txx_pause_pkt_interval_s cn63xx; - struct cvmx_agl_gmx_txx_pause_pkt_interval_s cn63xxp1; - struct cvmx_agl_gmx_txx_pause_pkt_interval_s cn66xx; - struct cvmx_agl_gmx_txx_pause_pkt_interval_s cn68xx; - struct cvmx_agl_gmx_txx_pause_pkt_interval_s cn68xxp1; }; union cvmx_agl_gmx_txx_pause_pkt_time { @@ -1637,16 +1198,6 @@ union cvmx_agl_gmx_txx_pause_pkt_time { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_agl_gmx_txx_pause_pkt_time_s cn52xx; - struct cvmx_agl_gmx_txx_pause_pkt_time_s cn52xxp1; - struct cvmx_agl_gmx_txx_pause_pkt_time_s cn56xx; - struct cvmx_agl_gmx_txx_pause_pkt_time_s cn56xxp1; - struct cvmx_agl_gmx_txx_pause_pkt_time_s cn61xx; - struct cvmx_agl_gmx_txx_pause_pkt_time_s cn63xx; - struct cvmx_agl_gmx_txx_pause_pkt_time_s cn63xxp1; - struct cvmx_agl_gmx_txx_pause_pkt_time_s cn66xx; - struct cvmx_agl_gmx_txx_pause_pkt_time_s cn68xx; - struct cvmx_agl_gmx_txx_pause_pkt_time_s cn68xxp1; }; union cvmx_agl_gmx_txx_pause_togo { @@ -1660,16 +1211,6 @@ union cvmx_agl_gmx_txx_pause_togo { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_agl_gmx_txx_pause_togo_s cn52xx; - struct cvmx_agl_gmx_txx_pause_togo_s cn52xxp1; - struct cvmx_agl_gmx_txx_pause_togo_s cn56xx; - struct cvmx_agl_gmx_txx_pause_togo_s cn56xxp1; - struct cvmx_agl_gmx_txx_pause_togo_s cn61xx; - struct cvmx_agl_gmx_txx_pause_togo_s cn63xx; - struct cvmx_agl_gmx_txx_pause_togo_s cn63xxp1; - struct cvmx_agl_gmx_txx_pause_togo_s cn66xx; - struct cvmx_agl_gmx_txx_pause_togo_s cn68xx; - struct cvmx_agl_gmx_txx_pause_togo_s cn68xxp1; }; union cvmx_agl_gmx_txx_pause_zero { @@ -1683,16 +1224,6 @@ union cvmx_agl_gmx_txx_pause_zero { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_agl_gmx_txx_pause_zero_s cn52xx; - struct cvmx_agl_gmx_txx_pause_zero_s cn52xxp1; - struct cvmx_agl_gmx_txx_pause_zero_s cn56xx; - struct cvmx_agl_gmx_txx_pause_zero_s cn56xxp1; - struct cvmx_agl_gmx_txx_pause_zero_s cn61xx; - struct cvmx_agl_gmx_txx_pause_zero_s cn63xx; - struct cvmx_agl_gmx_txx_pause_zero_s cn63xxp1; - struct cvmx_agl_gmx_txx_pause_zero_s cn66xx; - struct cvmx_agl_gmx_txx_pause_zero_s cn68xx; - struct cvmx_agl_gmx_txx_pause_zero_s cn68xxp1; }; union cvmx_agl_gmx_txx_soft_pause { @@ -1706,16 +1237,6 @@ union cvmx_agl_gmx_txx_soft_pause { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_agl_gmx_txx_soft_pause_s cn52xx; - struct cvmx_agl_gmx_txx_soft_pause_s cn52xxp1; - struct cvmx_agl_gmx_txx_soft_pause_s cn56xx; - struct cvmx_agl_gmx_txx_soft_pause_s cn56xxp1; - struct cvmx_agl_gmx_txx_soft_pause_s cn61xx; - struct cvmx_agl_gmx_txx_soft_pause_s cn63xx; - struct cvmx_agl_gmx_txx_soft_pause_s cn63xxp1; - struct cvmx_agl_gmx_txx_soft_pause_s cn66xx; - struct cvmx_agl_gmx_txx_soft_pause_s cn68xx; - struct cvmx_agl_gmx_txx_soft_pause_s cn68xxp1; }; union cvmx_agl_gmx_txx_stat0 { @@ -1729,16 +1250,6 @@ union cvmx_agl_gmx_txx_stat0 { uint64_t xsdef:32; #endif } s; - struct cvmx_agl_gmx_txx_stat0_s cn52xx; - struct cvmx_agl_gmx_txx_stat0_s cn52xxp1; - struct cvmx_agl_gmx_txx_stat0_s cn56xx; - struct cvmx_agl_gmx_txx_stat0_s cn56xxp1; - struct cvmx_agl_gmx_txx_stat0_s cn61xx; - struct cvmx_agl_gmx_txx_stat0_s cn63xx; - struct cvmx_agl_gmx_txx_stat0_s cn63xxp1; - struct cvmx_agl_gmx_txx_stat0_s cn66xx; - struct cvmx_agl_gmx_txx_stat0_s cn68xx; - struct cvmx_agl_gmx_txx_stat0_s cn68xxp1; }; union cvmx_agl_gmx_txx_stat1 { @@ -1752,16 +1263,6 @@ union cvmx_agl_gmx_txx_stat1 { uint64_t scol:32; #endif } s; - struct cvmx_agl_gmx_txx_stat1_s cn52xx; - struct cvmx_agl_gmx_txx_stat1_s cn52xxp1; - struct cvmx_agl_gmx_txx_stat1_s cn56xx; - struct cvmx_agl_gmx_txx_stat1_s cn56xxp1; - struct cvmx_agl_gmx_txx_stat1_s cn61xx; - struct cvmx_agl_gmx_txx_stat1_s cn63xx; - struct cvmx_agl_gmx_txx_stat1_s cn63xxp1; - struct cvmx_agl_gmx_txx_stat1_s cn66xx; - struct cvmx_agl_gmx_txx_stat1_s cn68xx; - struct cvmx_agl_gmx_txx_stat1_s cn68xxp1; }; union cvmx_agl_gmx_txx_stat2 { @@ -1775,16 +1276,6 @@ union cvmx_agl_gmx_txx_stat2 { uint64_t reserved_48_63:16; #endif } s; - struct cvmx_agl_gmx_txx_stat2_s cn52xx; - struct cvmx_agl_gmx_txx_stat2_s cn52xxp1; - struct cvmx_agl_gmx_txx_stat2_s cn56xx; - struct cvmx_agl_gmx_txx_stat2_s cn56xxp1; - struct cvmx_agl_gmx_txx_stat2_s cn61xx; - struct cvmx_agl_gmx_txx_stat2_s cn63xx; - struct cvmx_agl_gmx_txx_stat2_s cn63xxp1; - struct cvmx_agl_gmx_txx_stat2_s cn66xx; - struct cvmx_agl_gmx_txx_stat2_s cn68xx; - struct cvmx_agl_gmx_txx_stat2_s cn68xxp1; }; union cvmx_agl_gmx_txx_stat3 { @@ -1798,16 +1289,6 @@ union cvmx_agl_gmx_txx_stat3 { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_agl_gmx_txx_stat3_s cn52xx; - struct cvmx_agl_gmx_txx_stat3_s cn52xxp1; - struct cvmx_agl_gmx_txx_stat3_s cn56xx; - struct cvmx_agl_gmx_txx_stat3_s cn56xxp1; - struct cvmx_agl_gmx_txx_stat3_s cn61xx; - struct cvmx_agl_gmx_txx_stat3_s cn63xx; - struct cvmx_agl_gmx_txx_stat3_s cn63xxp1; - struct cvmx_agl_gmx_txx_stat3_s cn66xx; - struct cvmx_agl_gmx_txx_stat3_s cn68xx; - struct cvmx_agl_gmx_txx_stat3_s cn68xxp1; }; union cvmx_agl_gmx_txx_stat4 { @@ -1821,16 +1302,6 @@ union cvmx_agl_gmx_txx_stat4 { uint64_t hist1:32; #endif } s; - struct cvmx_agl_gmx_txx_stat4_s cn52xx; - struct cvmx_agl_gmx_txx_stat4_s cn52xxp1; - struct cvmx_agl_gmx_txx_stat4_s cn56xx; - struct cvmx_agl_gmx_txx_stat4_s cn56xxp1; - struct cvmx_agl_gmx_txx_stat4_s cn61xx; - struct cvmx_agl_gmx_txx_stat4_s cn63xx; - struct cvmx_agl_gmx_txx_stat4_s cn63xxp1; - struct cvmx_agl_gmx_txx_stat4_s cn66xx; - struct cvmx_agl_gmx_txx_stat4_s cn68xx; - struct cvmx_agl_gmx_txx_stat4_s cn68xxp1; }; union cvmx_agl_gmx_txx_stat5 { @@ -1844,16 +1315,6 @@ union cvmx_agl_gmx_txx_stat5 { uint64_t hist3:32; #endif } s; - struct cvmx_agl_gmx_txx_stat5_s cn52xx; - struct cvmx_agl_gmx_txx_stat5_s cn52xxp1; - struct cvmx_agl_gmx_txx_stat5_s cn56xx; - struct cvmx_agl_gmx_txx_stat5_s cn56xxp1; - struct cvmx_agl_gmx_txx_stat5_s cn61xx; - struct cvmx_agl_gmx_txx_stat5_s cn63xx; - struct cvmx_agl_gmx_txx_stat5_s cn63xxp1; - struct cvmx_agl_gmx_txx_stat5_s cn66xx; - struct cvmx_agl_gmx_txx_stat5_s cn68xx; - struct cvmx_agl_gmx_txx_stat5_s cn68xxp1; }; union cvmx_agl_gmx_txx_stat6 { @@ -1867,16 +1328,6 @@ union cvmx_agl_gmx_txx_stat6 { uint64_t hist5:32; #endif } s; - struct cvmx_agl_gmx_txx_stat6_s cn52xx; - struct cvmx_agl_gmx_txx_stat6_s cn52xxp1; - struct cvmx_agl_gmx_txx_stat6_s cn56xx; - struct cvmx_agl_gmx_txx_stat6_s cn56xxp1; - struct cvmx_agl_gmx_txx_stat6_s cn61xx; - struct cvmx_agl_gmx_txx_stat6_s cn63xx; - struct cvmx_agl_gmx_txx_stat6_s cn63xxp1; - struct cvmx_agl_gmx_txx_stat6_s cn66xx; - struct cvmx_agl_gmx_txx_stat6_s cn68xx; - struct cvmx_agl_gmx_txx_stat6_s cn68xxp1; }; union cvmx_agl_gmx_txx_stat7 { @@ -1890,16 +1341,6 @@ union cvmx_agl_gmx_txx_stat7 { uint64_t hist7:32; #endif } s; - struct cvmx_agl_gmx_txx_stat7_s cn52xx; - struct cvmx_agl_gmx_txx_stat7_s cn52xxp1; - struct cvmx_agl_gmx_txx_stat7_s cn56xx; - struct cvmx_agl_gmx_txx_stat7_s cn56xxp1; - struct cvmx_agl_gmx_txx_stat7_s cn61xx; - struct cvmx_agl_gmx_txx_stat7_s cn63xx; - struct cvmx_agl_gmx_txx_stat7_s cn63xxp1; - struct cvmx_agl_gmx_txx_stat7_s cn66xx; - struct cvmx_agl_gmx_txx_stat7_s cn68xx; - struct cvmx_agl_gmx_txx_stat7_s cn68xxp1; }; union cvmx_agl_gmx_txx_stat8 { @@ -1913,16 +1354,6 @@ union cvmx_agl_gmx_txx_stat8 { uint64_t mcst:32; #endif } s; - struct cvmx_agl_gmx_txx_stat8_s cn52xx; - struct cvmx_agl_gmx_txx_stat8_s cn52xxp1; - struct cvmx_agl_gmx_txx_stat8_s cn56xx; - struct cvmx_agl_gmx_txx_stat8_s cn56xxp1; - struct cvmx_agl_gmx_txx_stat8_s cn61xx; - struct cvmx_agl_gmx_txx_stat8_s cn63xx; - struct cvmx_agl_gmx_txx_stat8_s cn63xxp1; - struct cvmx_agl_gmx_txx_stat8_s cn66xx; - struct cvmx_agl_gmx_txx_stat8_s cn68xx; - struct cvmx_agl_gmx_txx_stat8_s cn68xxp1; }; union cvmx_agl_gmx_txx_stat9 { @@ -1936,16 +1367,6 @@ union cvmx_agl_gmx_txx_stat9 { uint64_t undflw:32; #endif } s; - struct cvmx_agl_gmx_txx_stat9_s cn52xx; - struct cvmx_agl_gmx_txx_stat9_s cn52xxp1; - struct cvmx_agl_gmx_txx_stat9_s cn56xx; - struct cvmx_agl_gmx_txx_stat9_s cn56xxp1; - struct cvmx_agl_gmx_txx_stat9_s cn61xx; - struct cvmx_agl_gmx_txx_stat9_s cn63xx; - struct cvmx_agl_gmx_txx_stat9_s cn63xxp1; - struct cvmx_agl_gmx_txx_stat9_s cn66xx; - struct cvmx_agl_gmx_txx_stat9_s cn68xx; - struct cvmx_agl_gmx_txx_stat9_s cn68xxp1; }; union cvmx_agl_gmx_txx_stats_ctl { @@ -1959,16 +1380,6 @@ union cvmx_agl_gmx_txx_stats_ctl { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_agl_gmx_txx_stats_ctl_s cn52xx; - struct cvmx_agl_gmx_txx_stats_ctl_s cn52xxp1; - struct cvmx_agl_gmx_txx_stats_ctl_s cn56xx; - struct cvmx_agl_gmx_txx_stats_ctl_s cn56xxp1; - struct cvmx_agl_gmx_txx_stats_ctl_s cn61xx; - struct cvmx_agl_gmx_txx_stats_ctl_s cn63xx; - struct cvmx_agl_gmx_txx_stats_ctl_s cn63xxp1; - struct cvmx_agl_gmx_txx_stats_ctl_s cn66xx; - struct cvmx_agl_gmx_txx_stats_ctl_s cn68xx; - struct cvmx_agl_gmx_txx_stats_ctl_s cn68xxp1; }; union cvmx_agl_gmx_txx_thresh { @@ -1982,16 +1393,6 @@ union cvmx_agl_gmx_txx_thresh { uint64_t reserved_6_63:58; #endif } s; - struct cvmx_agl_gmx_txx_thresh_s cn52xx; - struct cvmx_agl_gmx_txx_thresh_s cn52xxp1; - struct cvmx_agl_gmx_txx_thresh_s cn56xx; - struct cvmx_agl_gmx_txx_thresh_s cn56xxp1; - struct cvmx_agl_gmx_txx_thresh_s cn61xx; - struct cvmx_agl_gmx_txx_thresh_s cn63xx; - struct cvmx_agl_gmx_txx_thresh_s cn63xxp1; - struct cvmx_agl_gmx_txx_thresh_s cn66xx; - struct cvmx_agl_gmx_txx_thresh_s cn68xx; - struct cvmx_agl_gmx_txx_thresh_s cn68xxp1; }; union cvmx_agl_gmx_tx_bp { @@ -2005,8 +1406,6 @@ union cvmx_agl_gmx_tx_bp { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_agl_gmx_tx_bp_s cn52xx; - struct cvmx_agl_gmx_tx_bp_s cn52xxp1; struct cvmx_agl_gmx_tx_bp_cn56xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_1_63:63; @@ -2016,13 +1415,6 @@ union cvmx_agl_gmx_tx_bp { uint64_t reserved_1_63:63; #endif } cn56xx; - struct cvmx_agl_gmx_tx_bp_cn56xx cn56xxp1; - struct cvmx_agl_gmx_tx_bp_s cn61xx; - struct cvmx_agl_gmx_tx_bp_s cn63xx; - struct cvmx_agl_gmx_tx_bp_s cn63xxp1; - struct cvmx_agl_gmx_tx_bp_s cn66xx; - struct cvmx_agl_gmx_tx_bp_s cn68xx; - struct cvmx_agl_gmx_tx_bp_s cn68xxp1; }; union cvmx_agl_gmx_tx_col_attempt { @@ -2036,16 +1428,6 @@ union cvmx_agl_gmx_tx_col_attempt { uint64_t reserved_5_63:59; #endif } s; - struct cvmx_agl_gmx_tx_col_attempt_s cn52xx; - struct cvmx_agl_gmx_tx_col_attempt_s cn52xxp1; - struct cvmx_agl_gmx_tx_col_attempt_s cn56xx; - struct cvmx_agl_gmx_tx_col_attempt_s cn56xxp1; - struct cvmx_agl_gmx_tx_col_attempt_s cn61xx; - struct cvmx_agl_gmx_tx_col_attempt_s cn63xx; - struct cvmx_agl_gmx_tx_col_attempt_s cn63xxp1; - struct cvmx_agl_gmx_tx_col_attempt_s cn66xx; - struct cvmx_agl_gmx_tx_col_attempt_s cn68xx; - struct cvmx_agl_gmx_tx_col_attempt_s cn68xxp1; }; union cvmx_agl_gmx_tx_ifg { @@ -2061,16 +1443,6 @@ union cvmx_agl_gmx_tx_ifg { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_agl_gmx_tx_ifg_s cn52xx; - struct cvmx_agl_gmx_tx_ifg_s cn52xxp1; - struct cvmx_agl_gmx_tx_ifg_s cn56xx; - struct cvmx_agl_gmx_tx_ifg_s cn56xxp1; - struct cvmx_agl_gmx_tx_ifg_s cn61xx; - struct cvmx_agl_gmx_tx_ifg_s cn63xx; - struct cvmx_agl_gmx_tx_ifg_s cn63xxp1; - struct cvmx_agl_gmx_tx_ifg_s cn66xx; - struct cvmx_agl_gmx_tx_ifg_s cn68xx; - struct cvmx_agl_gmx_tx_ifg_s cn68xxp1; }; union cvmx_agl_gmx_tx_int_en { @@ -2129,7 +1501,6 @@ union cvmx_agl_gmx_tx_int_en { uint64_t reserved_18_63:46; #endif } cn52xx; - struct cvmx_agl_gmx_tx_int_en_cn52xx cn52xxp1; struct cvmx_agl_gmx_tx_int_en_cn56xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_17_63:47; @@ -2155,13 +1526,6 @@ union cvmx_agl_gmx_tx_int_en { uint64_t reserved_17_63:47; #endif } cn56xx; - struct cvmx_agl_gmx_tx_int_en_cn56xx cn56xxp1; - struct cvmx_agl_gmx_tx_int_en_s cn61xx; - struct cvmx_agl_gmx_tx_int_en_s cn63xx; - struct cvmx_agl_gmx_tx_int_en_s cn63xxp1; - struct cvmx_agl_gmx_tx_int_en_s cn66xx; - struct cvmx_agl_gmx_tx_int_en_s cn68xx; - struct cvmx_agl_gmx_tx_int_en_s cn68xxp1; }; union cvmx_agl_gmx_tx_int_reg { @@ -2220,7 +1584,6 @@ union cvmx_agl_gmx_tx_int_reg { uint64_t reserved_18_63:46; #endif } cn52xx; - struct cvmx_agl_gmx_tx_int_reg_cn52xx cn52xxp1; struct cvmx_agl_gmx_tx_int_reg_cn56xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_17_63:47; @@ -2246,13 +1609,6 @@ union cvmx_agl_gmx_tx_int_reg { uint64_t reserved_17_63:47; #endif } cn56xx; - struct cvmx_agl_gmx_tx_int_reg_cn56xx cn56xxp1; - struct cvmx_agl_gmx_tx_int_reg_s cn61xx; - struct cvmx_agl_gmx_tx_int_reg_s cn63xx; - struct cvmx_agl_gmx_tx_int_reg_s cn63xxp1; - struct cvmx_agl_gmx_tx_int_reg_s cn66xx; - struct cvmx_agl_gmx_tx_int_reg_s cn68xx; - struct cvmx_agl_gmx_tx_int_reg_s cn68xxp1; }; union cvmx_agl_gmx_tx_jam { @@ -2266,16 +1622,6 @@ union cvmx_agl_gmx_tx_jam { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_agl_gmx_tx_jam_s cn52xx; - struct cvmx_agl_gmx_tx_jam_s cn52xxp1; - struct cvmx_agl_gmx_tx_jam_s cn56xx; - struct cvmx_agl_gmx_tx_jam_s cn56xxp1; - struct cvmx_agl_gmx_tx_jam_s cn61xx; - struct cvmx_agl_gmx_tx_jam_s cn63xx; - struct cvmx_agl_gmx_tx_jam_s cn63xxp1; - struct cvmx_agl_gmx_tx_jam_s cn66xx; - struct cvmx_agl_gmx_tx_jam_s cn68xx; - struct cvmx_agl_gmx_tx_jam_s cn68xxp1; }; union cvmx_agl_gmx_tx_lfsr { @@ -2289,16 +1635,6 @@ union cvmx_agl_gmx_tx_lfsr { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_agl_gmx_tx_lfsr_s cn52xx; - struct cvmx_agl_gmx_tx_lfsr_s cn52xxp1; - struct cvmx_agl_gmx_tx_lfsr_s cn56xx; - struct cvmx_agl_gmx_tx_lfsr_s cn56xxp1; - struct cvmx_agl_gmx_tx_lfsr_s cn61xx; - struct cvmx_agl_gmx_tx_lfsr_s cn63xx; - struct cvmx_agl_gmx_tx_lfsr_s cn63xxp1; - struct cvmx_agl_gmx_tx_lfsr_s cn66xx; - struct cvmx_agl_gmx_tx_lfsr_s cn68xx; - struct cvmx_agl_gmx_tx_lfsr_s cn68xxp1; }; union cvmx_agl_gmx_tx_ovr_bp { @@ -2320,8 +1656,6 @@ union cvmx_agl_gmx_tx_ovr_bp { uint64_t reserved_10_63:54; #endif } s; - struct cvmx_agl_gmx_tx_ovr_bp_s cn52xx; - struct cvmx_agl_gmx_tx_ovr_bp_s cn52xxp1; struct cvmx_agl_gmx_tx_ovr_bp_cn56xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_9_63:55; @@ -2339,13 +1673,6 @@ union cvmx_agl_gmx_tx_ovr_bp { uint64_t reserved_9_63:55; #endif } cn56xx; - struct cvmx_agl_gmx_tx_ovr_bp_cn56xx cn56xxp1; - struct cvmx_agl_gmx_tx_ovr_bp_s cn61xx; - struct cvmx_agl_gmx_tx_ovr_bp_s cn63xx; - struct cvmx_agl_gmx_tx_ovr_bp_s cn63xxp1; - struct cvmx_agl_gmx_tx_ovr_bp_s cn66xx; - struct cvmx_agl_gmx_tx_ovr_bp_s cn68xx; - struct cvmx_agl_gmx_tx_ovr_bp_s cn68xxp1; }; union cvmx_agl_gmx_tx_pause_pkt_dmac { @@ -2359,16 +1686,6 @@ union cvmx_agl_gmx_tx_pause_pkt_dmac { uint64_t reserved_48_63:16; #endif } s; - struct cvmx_agl_gmx_tx_pause_pkt_dmac_s cn52xx; - struct cvmx_agl_gmx_tx_pause_pkt_dmac_s cn52xxp1; - struct cvmx_agl_gmx_tx_pause_pkt_dmac_s cn56xx; - struct cvmx_agl_gmx_tx_pause_pkt_dmac_s cn56xxp1; - struct cvmx_agl_gmx_tx_pause_pkt_dmac_s cn61xx; - struct cvmx_agl_gmx_tx_pause_pkt_dmac_s cn63xx; - struct cvmx_agl_gmx_tx_pause_pkt_dmac_s cn63xxp1; - struct cvmx_agl_gmx_tx_pause_pkt_dmac_s cn66xx; - struct cvmx_agl_gmx_tx_pause_pkt_dmac_s cn68xx; - struct cvmx_agl_gmx_tx_pause_pkt_dmac_s cn68xxp1; }; union cvmx_agl_gmx_tx_pause_pkt_type { @@ -2382,16 +1699,6 @@ union cvmx_agl_gmx_tx_pause_pkt_type { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_agl_gmx_tx_pause_pkt_type_s cn52xx; - struct cvmx_agl_gmx_tx_pause_pkt_type_s cn52xxp1; - struct cvmx_agl_gmx_tx_pause_pkt_type_s cn56xx; - struct cvmx_agl_gmx_tx_pause_pkt_type_s cn56xxp1; - struct cvmx_agl_gmx_tx_pause_pkt_type_s cn61xx; - struct cvmx_agl_gmx_tx_pause_pkt_type_s cn63xx; - struct cvmx_agl_gmx_tx_pause_pkt_type_s cn63xxp1; - struct cvmx_agl_gmx_tx_pause_pkt_type_s cn66xx; - struct cvmx_agl_gmx_tx_pause_pkt_type_s cn68xx; - struct cvmx_agl_gmx_tx_pause_pkt_type_s cn68xxp1; }; union cvmx_agl_prtx_ctl { @@ -2447,12 +1754,6 @@ union cvmx_agl_prtx_ctl { uint64_t drv_byp:1; #endif } s; - struct cvmx_agl_prtx_ctl_s cn61xx; - struct cvmx_agl_prtx_ctl_s cn63xx; - struct cvmx_agl_prtx_ctl_s cn63xxp1; - struct cvmx_agl_prtx_ctl_s cn66xx; - struct cvmx_agl_prtx_ctl_s cn68xx; - struct cvmx_agl_prtx_ctl_s cn68xxp1; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-asxx-defs.h b/arch/mips/include/asm/octeon/cvmx-asxx-defs.h index 1eef155979f3..70f4a5729581 100644 --- a/arch/mips/include/asm/octeon/cvmx-asxx-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-asxx-defs.h @@ -68,9 +68,6 @@ union cvmx_asxx_gmii_rx_clk_set { uint64_t reserved_5_63:59; #endif } s; - struct cvmx_asxx_gmii_rx_clk_set_s cn30xx; - struct cvmx_asxx_gmii_rx_clk_set_s cn31xx; - struct cvmx_asxx_gmii_rx_clk_set_s cn50xx; }; union cvmx_asxx_gmii_rx_dat_set { @@ -84,9 +81,6 @@ union cvmx_asxx_gmii_rx_dat_set { uint64_t reserved_5_63:59; #endif } s; - struct cvmx_asxx_gmii_rx_dat_set_s cn30xx; - struct cvmx_asxx_gmii_rx_dat_set_s cn31xx; - struct cvmx_asxx_gmii_rx_dat_set_s cn50xx; }; union cvmx_asxx_int_en { @@ -121,12 +115,6 @@ union cvmx_asxx_int_en { uint64_t reserved_11_63:53; #endif } cn30xx; - struct cvmx_asxx_int_en_cn30xx cn31xx; - struct cvmx_asxx_int_en_s cn38xx; - struct cvmx_asxx_int_en_s cn38xxp2; - struct cvmx_asxx_int_en_cn30xx cn50xx; - struct cvmx_asxx_int_en_s cn58xx; - struct cvmx_asxx_int_en_s cn58xxp1; }; union cvmx_asxx_int_reg { @@ -161,12 +149,6 @@ union cvmx_asxx_int_reg { uint64_t reserved_11_63:53; #endif } cn30xx; - struct cvmx_asxx_int_reg_cn30xx cn31xx; - struct cvmx_asxx_int_reg_s cn38xx; - struct cvmx_asxx_int_reg_s cn38xxp2; - struct cvmx_asxx_int_reg_cn30xx cn50xx; - struct cvmx_asxx_int_reg_s cn58xx; - struct cvmx_asxx_int_reg_s cn58xxp1; }; union cvmx_asxx_mii_rx_dat_set { @@ -180,8 +162,6 @@ union cvmx_asxx_mii_rx_dat_set { uint64_t reserved_5_63:59; #endif } s; - struct cvmx_asxx_mii_rx_dat_set_s cn30xx; - struct cvmx_asxx_mii_rx_dat_set_s cn50xx; }; union cvmx_asxx_prt_loop { @@ -210,12 +190,6 @@ union cvmx_asxx_prt_loop { uint64_t reserved_7_63:57; #endif } cn30xx; - struct cvmx_asxx_prt_loop_cn30xx cn31xx; - struct cvmx_asxx_prt_loop_s cn38xx; - struct cvmx_asxx_prt_loop_s cn38xxp2; - struct cvmx_asxx_prt_loop_cn30xx cn50xx; - struct cvmx_asxx_prt_loop_s cn58xx; - struct cvmx_asxx_prt_loop_s cn58xxp1; }; union cvmx_asxx_rld_bypass { @@ -229,10 +203,6 @@ union cvmx_asxx_rld_bypass { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_asxx_rld_bypass_s cn38xx; - struct cvmx_asxx_rld_bypass_s cn38xxp2; - struct cvmx_asxx_rld_bypass_s cn58xx; - struct cvmx_asxx_rld_bypass_s cn58xxp1; }; union cvmx_asxx_rld_bypass_setting { @@ -246,10 +216,6 @@ union cvmx_asxx_rld_bypass_setting { uint64_t reserved_5_63:59; #endif } s; - struct cvmx_asxx_rld_bypass_setting_s cn38xx; - struct cvmx_asxx_rld_bypass_setting_s cn38xxp2; - struct cvmx_asxx_rld_bypass_setting_s cn58xx; - struct cvmx_asxx_rld_bypass_setting_s cn58xxp1; }; union cvmx_asxx_rld_comp { @@ -276,9 +242,6 @@ union cvmx_asxx_rld_comp { uint64_t reserved_8_63:56; #endif } cn38xx; - struct cvmx_asxx_rld_comp_cn38xx cn38xxp2; - struct cvmx_asxx_rld_comp_s cn58xx; - struct cvmx_asxx_rld_comp_s cn58xxp1; }; union cvmx_asxx_rld_data_drv { @@ -294,10 +257,6 @@ union cvmx_asxx_rld_data_drv { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_asxx_rld_data_drv_s cn38xx; - struct cvmx_asxx_rld_data_drv_s cn38xxp2; - struct cvmx_asxx_rld_data_drv_s cn58xx; - struct cvmx_asxx_rld_data_drv_s cn58xxp1; }; union cvmx_asxx_rld_fcram_mode { @@ -311,8 +270,6 @@ union cvmx_asxx_rld_fcram_mode { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_asxx_rld_fcram_mode_s cn38xx; - struct cvmx_asxx_rld_fcram_mode_s cn38xxp2; }; union cvmx_asxx_rld_nctl_strong { @@ -326,10 +283,6 @@ union cvmx_asxx_rld_nctl_strong { uint64_t reserved_5_63:59; #endif } s; - struct cvmx_asxx_rld_nctl_strong_s cn38xx; - struct cvmx_asxx_rld_nctl_strong_s cn38xxp2; - struct cvmx_asxx_rld_nctl_strong_s cn58xx; - struct cvmx_asxx_rld_nctl_strong_s cn58xxp1; }; union cvmx_asxx_rld_nctl_weak { @@ -343,10 +296,6 @@ union cvmx_asxx_rld_nctl_weak { uint64_t reserved_5_63:59; #endif } s; - struct cvmx_asxx_rld_nctl_weak_s cn38xx; - struct cvmx_asxx_rld_nctl_weak_s cn38xxp2; - struct cvmx_asxx_rld_nctl_weak_s cn58xx; - struct cvmx_asxx_rld_nctl_weak_s cn58xxp1; }; union cvmx_asxx_rld_pctl_strong { @@ -360,10 +309,6 @@ union cvmx_asxx_rld_pctl_strong { uint64_t reserved_5_63:59; #endif } s; - struct cvmx_asxx_rld_pctl_strong_s cn38xx; - struct cvmx_asxx_rld_pctl_strong_s cn38xxp2; - struct cvmx_asxx_rld_pctl_strong_s cn58xx; - struct cvmx_asxx_rld_pctl_strong_s cn58xxp1; }; union cvmx_asxx_rld_pctl_weak { @@ -377,10 +322,6 @@ union cvmx_asxx_rld_pctl_weak { uint64_t reserved_5_63:59; #endif } s; - struct cvmx_asxx_rld_pctl_weak_s cn38xx; - struct cvmx_asxx_rld_pctl_weak_s cn38xxp2; - struct cvmx_asxx_rld_pctl_weak_s cn58xx; - struct cvmx_asxx_rld_pctl_weak_s cn58xxp1; }; union cvmx_asxx_rld_setting { @@ -411,9 +352,6 @@ union cvmx_asxx_rld_setting { uint64_t reserved_5_63:59; #endif } cn38xx; - struct cvmx_asxx_rld_setting_cn38xx cn38xxp2; - struct cvmx_asxx_rld_setting_s cn58xx; - struct cvmx_asxx_rld_setting_s cn58xxp1; }; union cvmx_asxx_rx_clk_setx { @@ -427,13 +365,6 @@ union cvmx_asxx_rx_clk_setx { uint64_t reserved_5_63:59; #endif } s; - struct cvmx_asxx_rx_clk_setx_s cn30xx; - struct cvmx_asxx_rx_clk_setx_s cn31xx; - struct cvmx_asxx_rx_clk_setx_s cn38xx; - struct cvmx_asxx_rx_clk_setx_s cn38xxp2; - struct cvmx_asxx_rx_clk_setx_s cn50xx; - struct cvmx_asxx_rx_clk_setx_s cn58xx; - struct cvmx_asxx_rx_clk_setx_s cn58xxp1; }; union cvmx_asxx_rx_prt_en { @@ -456,12 +387,6 @@ union cvmx_asxx_rx_prt_en { uint64_t reserved_3_63:61; #endif } cn30xx; - struct cvmx_asxx_rx_prt_en_cn30xx cn31xx; - struct cvmx_asxx_rx_prt_en_s cn38xx; - struct cvmx_asxx_rx_prt_en_s cn38xxp2; - struct cvmx_asxx_rx_prt_en_cn30xx cn50xx; - struct cvmx_asxx_rx_prt_en_s cn58xx; - struct cvmx_asxx_rx_prt_en_s cn58xxp1; }; union cvmx_asxx_rx_wol { @@ -477,8 +402,6 @@ union cvmx_asxx_rx_wol { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_asxx_rx_wol_s cn38xx; - struct cvmx_asxx_rx_wol_s cn38xxp2; }; union cvmx_asxx_rx_wol_msk { @@ -490,8 +413,6 @@ union cvmx_asxx_rx_wol_msk { uint64_t msk:64; #endif } s; - struct cvmx_asxx_rx_wol_msk_s cn38xx; - struct cvmx_asxx_rx_wol_msk_s cn38xxp2; }; union cvmx_asxx_rx_wol_powok { @@ -505,8 +426,6 @@ union cvmx_asxx_rx_wol_powok { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_asxx_rx_wol_powok_s cn38xx; - struct cvmx_asxx_rx_wol_powok_s cn38xxp2; }; union cvmx_asxx_rx_wol_sig { @@ -520,8 +439,6 @@ union cvmx_asxx_rx_wol_sig { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_asxx_rx_wol_sig_s cn38xx; - struct cvmx_asxx_rx_wol_sig_s cn38xxp2; }; union cvmx_asxx_tx_clk_setx { @@ -535,13 +452,6 @@ union cvmx_asxx_tx_clk_setx { uint64_t reserved_5_63:59; #endif } s; - struct cvmx_asxx_tx_clk_setx_s cn30xx; - struct cvmx_asxx_tx_clk_setx_s cn31xx; - struct cvmx_asxx_tx_clk_setx_s cn38xx; - struct cvmx_asxx_tx_clk_setx_s cn38xxp2; - struct cvmx_asxx_tx_clk_setx_s cn50xx; - struct cvmx_asxx_tx_clk_setx_s cn58xx; - struct cvmx_asxx_tx_clk_setx_s cn58xxp1; }; union cvmx_asxx_tx_comp_byp { @@ -566,7 +476,6 @@ union cvmx_asxx_tx_comp_byp { uint64_t reserved_9_63:55; #endif } cn30xx; - struct cvmx_asxx_tx_comp_byp_cn30xx cn31xx; struct cvmx_asxx_tx_comp_byp_cn38xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_8_63:56; @@ -578,7 +487,6 @@ union cvmx_asxx_tx_comp_byp { uint64_t reserved_8_63:56; #endif } cn38xx; - struct cvmx_asxx_tx_comp_byp_cn38xx cn38xxp2; struct cvmx_asxx_tx_comp_byp_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_17_63:47; @@ -609,7 +517,6 @@ union cvmx_asxx_tx_comp_byp { uint64_t reserved_13_63:51; #endif } cn58xx; - struct cvmx_asxx_tx_comp_byp_cn58xx cn58xxp1; }; union cvmx_asxx_tx_hi_waterx { @@ -632,12 +539,6 @@ union cvmx_asxx_tx_hi_waterx { uint64_t reserved_3_63:61; #endif } cn30xx; - struct cvmx_asxx_tx_hi_waterx_cn30xx cn31xx; - struct cvmx_asxx_tx_hi_waterx_s cn38xx; - struct cvmx_asxx_tx_hi_waterx_s cn38xxp2; - struct cvmx_asxx_tx_hi_waterx_cn30xx cn50xx; - struct cvmx_asxx_tx_hi_waterx_s cn58xx; - struct cvmx_asxx_tx_hi_waterx_s cn58xxp1; }; union cvmx_asxx_tx_prt_en { @@ -660,12 +561,6 @@ union cvmx_asxx_tx_prt_en { uint64_t reserved_3_63:61; #endif } cn30xx; - struct cvmx_asxx_tx_prt_en_cn30xx cn31xx; - struct cvmx_asxx_tx_prt_en_s cn38xx; - struct cvmx_asxx_tx_prt_en_s cn38xxp2; - struct cvmx_asxx_tx_prt_en_cn30xx cn50xx; - struct cvmx_asxx_tx_prt_en_s cn58xx; - struct cvmx_asxx_tx_prt_en_s cn58xxp1; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-bootmem.h b/arch/mips/include/asm/octeon/cvmx-bootmem.h index 72d2e403a6e4..689a82cac740 100644 --- a/arch/mips/include/asm/octeon/cvmx-bootmem.h +++ b/arch/mips/include/asm/octeon/cvmx-bootmem.h @@ -146,18 +146,6 @@ struct cvmx_bootmem_desc { extern int cvmx_bootmem_init(void *mem_desc_ptr); /** - * Allocate a block of memory from the free list that was passed - * to the application by the bootloader. - * This is an allocate-only algorithm, so freeing memory is not possible. - * - * @size: Size in bytes of block to allocate - * @alignment: Alignment required - must be power of 2 - * - * Returns pointer to block of memory, NULL on error - */ -extern void *cvmx_bootmem_alloc(uint64_t size, uint64_t alignment); - -/** * Allocate a block of memory from the free list that was * passed to the application by the bootloader at a specific * address. This is an allocate-only algorithm, so @@ -174,22 +162,6 @@ extern void *cvmx_bootmem_alloc_address(uint64_t size, uint64_t address, uint64_t alignment); /** - * Allocate a block of memory from the free list that was - * passed to the application by the bootloader within a specified - * address range. This is an allocate-only algorithm, so - * freeing memory is not possible. Allocation will fail if - * memory cannot be allocated in the requested range. - * - * @size: Size in bytes of block to allocate - * @min_addr: defines the minimum address of the range - * @max_addr: defines the maximum address of the range - * @alignment: Alignment required - must be power of 2 - * Returns pointer to block of memory, NULL on error - */ -extern void *cvmx_bootmem_alloc_range(uint64_t size, uint64_t alignment, - uint64_t min_addr, uint64_t max_addr); - -/** * Frees a previously allocated named bootmem block. * * @name: name of block to free @@ -214,27 +186,6 @@ extern void *cvmx_bootmem_alloc_range(uint64_t size, uint64_t alignment, extern void *cvmx_bootmem_alloc_named(uint64_t size, uint64_t alignment, char *name); - - -/** - * Allocate a block of memory from the free list that was passed - * to the application by the bootloader, and assign it a name in the - * global named block table. (part of the cvmx_bootmem_descriptor_t structure) - * Named blocks can later be freed. - * - * @size: Size in bytes of block to allocate - * @address: Physical address to allocate memory at. If this - * memory is not available, the allocation fails. - * @name: name of block - must be less than CVMX_BOOTMEM_NAME_LEN - * bytes - * - * Returns a pointer to block of memory, NULL on error - */ -extern void *cvmx_bootmem_alloc_named_address(uint64_t size, uint64_t address, - char *name); - - - /** * Allocate a block of memory from a specific range of the free list * that was passed to the application by the bootloader, and assign it @@ -351,33 +302,6 @@ int64_t cvmx_bootmem_phy_named_block_alloc(uint64_t size, uint64_t min_addr, char *name, uint32_t flags); /** - * Finds a named memory block by name. - * Also used for finding an unused entry in the named block table. - * - * @name: Name of memory block to find. If NULL pointer given, then - * finds unused descriptor, if available. - * - * @flags: Flags to control options for the allocation. - * - * Returns Pointer to memory block descriptor, NULL if not found. - * If NULL returned when name parameter is NULL, then no memory - * block descriptors are available. - */ -struct cvmx_bootmem_named_block_desc * -cvmx_bootmem_phy_named_block_find(char *name, uint32_t flags); - -/** - * Frees a named block. - * - * @name: name of block to free - * @flags: flags for passing options - * - * Returns 0 on failure - * 1 on success - */ -int cvmx_bootmem_phy_named_block_free(char *name, uint32_t flags); - -/** * Frees a block to the bootmem allocator list. This must * be used with care, as the size provided must match the size * of the block that was allocated, or the list will become diff --git a/arch/mips/include/asm/octeon/cvmx-ciu2-defs.h b/arch/mips/include/asm/octeon/cvmx-ciu2-defs.h index 148bc9a0085d..5babd88d4110 100644 --- a/arch/mips/include/asm/octeon/cvmx-ciu2-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-ciu2-defs.h @@ -28,7081 +28,21 @@ #ifndef __CVMX_CIU2_DEFS_H__ #define __CVMX_CIU2_DEFS_H__ -#define CVMX_CIU2_ACK_IOX_INT(block_id) (CVMX_ADD_IO_SEG(0x00010701080C0800ull) + ((block_id) & 1) * 0x200000ull) #define CVMX_CIU2_ACK_PPX_IP2(block_id) (CVMX_ADD_IO_SEG(0x00010701000C0000ull) + ((block_id) & 31) * 0x200000ull) #define CVMX_CIU2_ACK_PPX_IP3(block_id) (CVMX_ADD_IO_SEG(0x00010701000C0200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_ACK_PPX_IP4(block_id) (CVMX_ADD_IO_SEG(0x00010701000C0400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_GPIO(block_id) (CVMX_ADD_IO_SEG(0x0001070108097800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_GPIO_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701080B7800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_GPIO_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701080A7800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_IO(block_id) (CVMX_ADD_IO_SEG(0x0001070108094800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_IO_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701080B4800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_IO_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701080A4800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_MBOX(block_id) (CVMX_ADD_IO_SEG(0x0001070108098800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_MBOX_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701080B8800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_MBOX_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701080A8800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_MEM(block_id) (CVMX_ADD_IO_SEG(0x0001070108095800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_MEM_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701080B5800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_MEM_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701080A5800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_MIO(block_id) (CVMX_ADD_IO_SEG(0x0001070108093800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_MIO_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701080B3800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_MIO_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701080A3800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_PKT(block_id) (CVMX_ADD_IO_SEG(0x0001070108096800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_PKT_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701080B6800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_PKT_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701080A6800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_RML(block_id) (CVMX_ADD_IO_SEG(0x0001070108092800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_RML_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701080B2800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_RML_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701080A2800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_WDOG(block_id) (CVMX_ADD_IO_SEG(0x0001070108091800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_WDOG_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701080B1800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_WDOG_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701080A1800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_WRKQ(block_id) (CVMX_ADD_IO_SEG(0x0001070108090800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_WRKQ_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701080B0800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_WRKQ_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701080A0800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP2_GPIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100097000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP2_GPIO_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B7000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP2_GPIO_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A7000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP2_IO(block_id) (CVMX_ADD_IO_SEG(0x0001070100094000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP2_IO_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B4000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP2_IO_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A4000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP2_MBOX(block_id) (CVMX_ADD_IO_SEG(0x0001070100098000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP2_MBOX_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B8000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP2_MBOX_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A8000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP2_MEM(block_id) (CVMX_ADD_IO_SEG(0x0001070100095000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP2_MEM_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B5000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP2_MEM_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A5000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP2_MIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100093000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP2_MIO_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B3000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP2_MIO_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A3000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP2_PKT(block_id) (CVMX_ADD_IO_SEG(0x0001070100096000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP2_PKT_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B6000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP2_PKT_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A6000ull) + ((block_id) & 31) * 0x200000ull) #define CVMX_CIU2_EN_PPX_IP2_RML(block_id) (CVMX_ADD_IO_SEG(0x0001070100092000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP2_RML_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B2000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP2_RML_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A2000ull) + ((block_id) & 31) * 0x200000ull) #define CVMX_CIU2_EN_PPX_IP2_WDOG(block_id) (CVMX_ADD_IO_SEG(0x0001070100091000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP2_WDOG_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B1000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP2_WDOG_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A1000ull) + ((block_id) & 31) * 0x200000ull) #define CVMX_CIU2_EN_PPX_IP2_WRKQ(block_id) (CVMX_ADD_IO_SEG(0x0001070100090000ull) + ((block_id) & 31) * 0x200000ull) #define CVMX_CIU2_EN_PPX_IP2_WRKQ_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B0000ull) + ((block_id) & 31) * 0x200000ull) #define CVMX_CIU2_EN_PPX_IP2_WRKQ_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A0000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_GPIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100097200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_GPIO_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B7200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_GPIO_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A7200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_IO(block_id) (CVMX_ADD_IO_SEG(0x0001070100094200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_IO_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B4200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_IO_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A4200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_MBOX(block_id) (CVMX_ADD_IO_SEG(0x0001070100098200ull) + ((block_id) & 31) * 0x200000ull) #define CVMX_CIU2_EN_PPX_IP3_MBOX_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B8200ull) + ((block_id) & 31) * 0x200000ull) #define CVMX_CIU2_EN_PPX_IP3_MBOX_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A8200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_MEM(block_id) (CVMX_ADD_IO_SEG(0x0001070100095200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_MEM_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B5200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_MEM_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A5200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_MIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100093200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_MIO_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B3200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_MIO_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A3200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_PKT(block_id) (CVMX_ADD_IO_SEG(0x0001070100096200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_PKT_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B6200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_PKT_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A6200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_RML(block_id) (CVMX_ADD_IO_SEG(0x0001070100092200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_RML_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B2200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_RML_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A2200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_WDOG(block_id) (CVMX_ADD_IO_SEG(0x0001070100091200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_WDOG_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B1200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_WDOG_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A1200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_WRKQ(block_id) (CVMX_ADD_IO_SEG(0x0001070100090200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_WRKQ_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B0200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_WRKQ_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A0200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_GPIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100097400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_GPIO_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B7400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_GPIO_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A7400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_IO(block_id) (CVMX_ADD_IO_SEG(0x0001070100094400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_IO_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B4400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_IO_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A4400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_MBOX(block_id) (CVMX_ADD_IO_SEG(0x0001070100098400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_MBOX_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B8400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_MBOX_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A8400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_MEM(block_id) (CVMX_ADD_IO_SEG(0x0001070100095400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_MEM_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B5400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_MEM_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A5400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_MIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100093400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_MIO_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B3400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_MIO_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A3400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_PKT(block_id) (CVMX_ADD_IO_SEG(0x0001070100096400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_PKT_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B6400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_PKT_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A6400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_RML(block_id) (CVMX_ADD_IO_SEG(0x0001070100092400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_RML_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B2400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_RML_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A2400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_WDOG(block_id) (CVMX_ADD_IO_SEG(0x0001070100091400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_WDOG_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B1400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_WDOG_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A1400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_WRKQ(block_id) (CVMX_ADD_IO_SEG(0x0001070100090400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_WRKQ_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B0400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_WRKQ_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A0400ull) + ((block_id) & 31) * 0x200000ull) #define CVMX_CIU2_INTR_CIU_READY (CVMX_ADD_IO_SEG(0x0001070100102008ull)) -#define CVMX_CIU2_INTR_RAM_ECC_CTL (CVMX_ADD_IO_SEG(0x0001070100102010ull)) -#define CVMX_CIU2_INTR_RAM_ECC_ST (CVMX_ADD_IO_SEG(0x0001070100102018ull)) -#define CVMX_CIU2_INTR_SLOWDOWN (CVMX_ADD_IO_SEG(0x0001070100102000ull)) -#define CVMX_CIU2_MSIRED_PPX_IP2(block_id) (CVMX_ADD_IO_SEG(0x00010701000C1000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_MSIRED_PPX_IP3(block_id) (CVMX_ADD_IO_SEG(0x00010701000C1200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_MSIRED_PPX_IP4(block_id) (CVMX_ADD_IO_SEG(0x00010701000C1400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_MSI_RCVX(offset) (CVMX_ADD_IO_SEG(0x00010701000C2000ull) + ((offset) & 255) * 8) -#define CVMX_CIU2_MSI_SELX(offset) (CVMX_ADD_IO_SEG(0x00010701000C3000ull) + ((offset) & 255) * 8) -#define CVMX_CIU2_RAW_IOX_INT_GPIO(block_id) (CVMX_ADD_IO_SEG(0x0001070108047800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_RAW_IOX_INT_IO(block_id) (CVMX_ADD_IO_SEG(0x0001070108044800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_RAW_IOX_INT_MEM(block_id) (CVMX_ADD_IO_SEG(0x0001070108045800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_RAW_IOX_INT_MIO(block_id) (CVMX_ADD_IO_SEG(0x0001070108043800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_RAW_IOX_INT_PKT(block_id) (CVMX_ADD_IO_SEG(0x0001070108046800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_RAW_IOX_INT_RML(block_id) (CVMX_ADD_IO_SEG(0x0001070108042800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_RAW_IOX_INT_WDOG(block_id) (CVMX_ADD_IO_SEG(0x0001070108041800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_RAW_IOX_INT_WRKQ(block_id) (CVMX_ADD_IO_SEG(0x0001070108040800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_RAW_PPX_IP2_GPIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100047000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_RAW_PPX_IP2_IO(block_id) (CVMX_ADD_IO_SEG(0x0001070100044000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_RAW_PPX_IP2_MEM(block_id) (CVMX_ADD_IO_SEG(0x0001070100045000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_RAW_PPX_IP2_MIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100043000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_RAW_PPX_IP2_PKT(block_id) (CVMX_ADD_IO_SEG(0x0001070100046000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_RAW_PPX_IP2_RML(block_id) (CVMX_ADD_IO_SEG(0x0001070100042000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_RAW_PPX_IP2_WDOG(block_id) (CVMX_ADD_IO_SEG(0x0001070100041000ull) + ((block_id) & 31) * 0x200000ull) #define CVMX_CIU2_RAW_PPX_IP2_WRKQ(block_id) (CVMX_ADD_IO_SEG(0x0001070100040000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_RAW_PPX_IP3_GPIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100047200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_RAW_PPX_IP3_IO(block_id) (CVMX_ADD_IO_SEG(0x0001070100044200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_RAW_PPX_IP3_MEM(block_id) (CVMX_ADD_IO_SEG(0x0001070100045200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_RAW_PPX_IP3_MIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100043200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_RAW_PPX_IP3_PKT(block_id) (CVMX_ADD_IO_SEG(0x0001070100046200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_RAW_PPX_IP3_RML(block_id) (CVMX_ADD_IO_SEG(0x0001070100042200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_RAW_PPX_IP3_WDOG(block_id) (CVMX_ADD_IO_SEG(0x0001070100041200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_RAW_PPX_IP3_WRKQ(block_id) (CVMX_ADD_IO_SEG(0x0001070100040200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_RAW_PPX_IP4_GPIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100047400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_RAW_PPX_IP4_IO(block_id) (CVMX_ADD_IO_SEG(0x0001070100044400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_RAW_PPX_IP4_MEM(block_id) (CVMX_ADD_IO_SEG(0x0001070100045400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_RAW_PPX_IP4_MIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100043400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_RAW_PPX_IP4_PKT(block_id) (CVMX_ADD_IO_SEG(0x0001070100046400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_RAW_PPX_IP4_RML(block_id) (CVMX_ADD_IO_SEG(0x0001070100042400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_RAW_PPX_IP4_WDOG(block_id) (CVMX_ADD_IO_SEG(0x0001070100041400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_RAW_PPX_IP4_WRKQ(block_id) (CVMX_ADD_IO_SEG(0x0001070100040400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SRC_IOX_INT_GPIO(block_id) (CVMX_ADD_IO_SEG(0x0001070108087800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_SRC_IOX_INT_IO(block_id) (CVMX_ADD_IO_SEG(0x0001070108084800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_SRC_IOX_INT_MBOX(block_id) (CVMX_ADD_IO_SEG(0x0001070108088800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_SRC_IOX_INT_MEM(block_id) (CVMX_ADD_IO_SEG(0x0001070108085800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_SRC_IOX_INT_MIO(block_id) (CVMX_ADD_IO_SEG(0x0001070108083800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_SRC_IOX_INT_PKT(block_id) (CVMX_ADD_IO_SEG(0x0001070108086800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_SRC_IOX_INT_RML(block_id) (CVMX_ADD_IO_SEG(0x0001070108082800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_SRC_IOX_INT_WDOG(block_id) (CVMX_ADD_IO_SEG(0x0001070108081800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_SRC_IOX_INT_WRKQ(block_id) (CVMX_ADD_IO_SEG(0x0001070108080800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_SRC_PPX_IP2_GPIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100087000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SRC_PPX_IP2_IO(block_id) (CVMX_ADD_IO_SEG(0x0001070100084000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SRC_PPX_IP2_MBOX(block_id) (CVMX_ADD_IO_SEG(0x0001070100088000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SRC_PPX_IP2_MEM(block_id) (CVMX_ADD_IO_SEG(0x0001070100085000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SRC_PPX_IP2_MIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100083000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SRC_PPX_IP2_PKT(block_id) (CVMX_ADD_IO_SEG(0x0001070100086000ull) + ((block_id) & 31) * 0x200000ull) #define CVMX_CIU2_SRC_PPX_IP2_RML(block_id) (CVMX_ADD_IO_SEG(0x0001070100082000ull) + ((block_id) & 31) * 0x200000ull) #define CVMX_CIU2_SRC_PPX_IP2_WDOG(block_id) (CVMX_ADD_IO_SEG(0x0001070100081000ull) + ((block_id) & 31) * 0x200000ull) #define CVMX_CIU2_SRC_PPX_IP2_WRKQ(block_id) (CVMX_ADD_IO_SEG(0x0001070100080000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SRC_PPX_IP3_GPIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100087200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SRC_PPX_IP3_IO(block_id) (CVMX_ADD_IO_SEG(0x0001070100084200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SRC_PPX_IP3_MBOX(block_id) (CVMX_ADD_IO_SEG(0x0001070100088200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SRC_PPX_IP3_MEM(block_id) (CVMX_ADD_IO_SEG(0x0001070100085200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SRC_PPX_IP3_MIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100083200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SRC_PPX_IP3_PKT(block_id) (CVMX_ADD_IO_SEG(0x0001070100086200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SRC_PPX_IP3_RML(block_id) (CVMX_ADD_IO_SEG(0x0001070100082200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SRC_PPX_IP3_WDOG(block_id) (CVMX_ADD_IO_SEG(0x0001070100081200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SRC_PPX_IP3_WRKQ(block_id) (CVMX_ADD_IO_SEG(0x0001070100080200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SRC_PPX_IP4_GPIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100087400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SRC_PPX_IP4_IO(block_id) (CVMX_ADD_IO_SEG(0x0001070100084400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SRC_PPX_IP4_MBOX(block_id) (CVMX_ADD_IO_SEG(0x0001070100088400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SRC_PPX_IP4_MEM(block_id) (CVMX_ADD_IO_SEG(0x0001070100085400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SRC_PPX_IP4_MIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100083400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SRC_PPX_IP4_PKT(block_id) (CVMX_ADD_IO_SEG(0x0001070100086400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SRC_PPX_IP4_RML(block_id) (CVMX_ADD_IO_SEG(0x0001070100082400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SRC_PPX_IP4_WDOG(block_id) (CVMX_ADD_IO_SEG(0x0001070100081400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SRC_PPX_IP4_WRKQ(block_id) (CVMX_ADD_IO_SEG(0x0001070100080400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SUM_IOX_INT(offset) (CVMX_ADD_IO_SEG(0x0001070100000800ull) + ((offset) & 1) * 8) #define CVMX_CIU2_SUM_PPX_IP2(offset) (CVMX_ADD_IO_SEG(0x0001070100000000ull) + ((offset) & 31) * 8) #define CVMX_CIU2_SUM_PPX_IP3(offset) (CVMX_ADD_IO_SEG(0x0001070100000200ull) + ((offset) & 31) * 8) -#define CVMX_CIU2_SUM_PPX_IP4(offset) (CVMX_ADD_IO_SEG(0x0001070100000400ull) + ((offset) & 31) * 8) - -union cvmx_ciu2_ack_iox_int { - uint64_t u64; - struct cvmx_ciu2_ack_iox_int_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_1_63:63; - uint64_t ack:1; -#else - uint64_t ack:1; - uint64_t reserved_1_63:63; -#endif - } s; - struct cvmx_ciu2_ack_iox_int_s cn68xx; - struct cvmx_ciu2_ack_iox_int_s cn68xxp1; -}; - -union cvmx_ciu2_ack_ppx_ip2 { - uint64_t u64; - struct cvmx_ciu2_ack_ppx_ip2_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_1_63:63; - uint64_t ack:1; -#else - uint64_t ack:1; - uint64_t reserved_1_63:63; -#endif - } s; - struct cvmx_ciu2_ack_ppx_ip2_s cn68xx; - struct cvmx_ciu2_ack_ppx_ip2_s cn68xxp1; -}; - -union cvmx_ciu2_ack_ppx_ip3 { - uint64_t u64; - struct cvmx_ciu2_ack_ppx_ip3_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_1_63:63; - uint64_t ack:1; -#else - uint64_t ack:1; - uint64_t reserved_1_63:63; -#endif - } s; - struct cvmx_ciu2_ack_ppx_ip3_s cn68xx; - struct cvmx_ciu2_ack_ppx_ip3_s cn68xxp1; -}; - -union cvmx_ciu2_ack_ppx_ip4 { - uint64_t u64; - struct cvmx_ciu2_ack_ppx_ip4_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_1_63:63; - uint64_t ack:1; -#else - uint64_t ack:1; - uint64_t reserved_1_63:63; -#endif - } s; - struct cvmx_ciu2_ack_ppx_ip4_s cn68xx; - struct cvmx_ciu2_ack_ppx_ip4_s cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_gpio { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_gpio_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t gpio:16; -#else - uint64_t gpio:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_ciu2_en_iox_int_gpio_s cn68xx; - struct cvmx_ciu2_en_iox_int_gpio_s cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_gpio_w1c { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_gpio_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t gpio:16; -#else - uint64_t gpio:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_ciu2_en_iox_int_gpio_w1c_s cn68xx; - struct cvmx_ciu2_en_iox_int_gpio_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_gpio_w1s { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_gpio_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t gpio:16; -#else - uint64_t gpio:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_ciu2_en_iox_int_gpio_w1s_s cn68xx; - struct cvmx_ciu2_en_iox_int_gpio_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_io { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_io_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_34_63:30; - uint64_t pem:2; - uint64_t reserved_18_31:14; - uint64_t pci_inta:2; - uint64_t reserved_13_15:3; - uint64_t msired:1; - uint64_t pci_msi:4; - uint64_t reserved_4_7:4; - uint64_t pci_intr:4; -#else - uint64_t pci_intr:4; - uint64_t reserved_4_7:4; - uint64_t pci_msi:4; - uint64_t msired:1; - uint64_t reserved_13_15:3; - uint64_t pci_inta:2; - uint64_t reserved_18_31:14; - uint64_t pem:2; - uint64_t reserved_34_63:30; -#endif - } s; - struct cvmx_ciu2_en_iox_int_io_s cn68xx; - struct cvmx_ciu2_en_iox_int_io_s cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_io_w1c { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_io_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_34_63:30; - uint64_t pem:2; - uint64_t reserved_18_31:14; - uint64_t pci_inta:2; - uint64_t reserved_13_15:3; - uint64_t msired:1; - uint64_t pci_msi:4; - uint64_t reserved_4_7:4; - uint64_t pci_intr:4; -#else - uint64_t pci_intr:4; - uint64_t reserved_4_7:4; - uint64_t pci_msi:4; - uint64_t msired:1; - uint64_t reserved_13_15:3; - uint64_t pci_inta:2; - uint64_t reserved_18_31:14; - uint64_t pem:2; - uint64_t reserved_34_63:30; -#endif - } s; - struct cvmx_ciu2_en_iox_int_io_w1c_s cn68xx; - struct cvmx_ciu2_en_iox_int_io_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_io_w1s { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_io_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_34_63:30; - uint64_t pem:2; - uint64_t reserved_18_31:14; - uint64_t pci_inta:2; - uint64_t reserved_13_15:3; - uint64_t msired:1; - uint64_t pci_msi:4; - uint64_t reserved_4_7:4; - uint64_t pci_intr:4; -#else - uint64_t pci_intr:4; - uint64_t reserved_4_7:4; - uint64_t pci_msi:4; - uint64_t msired:1; - uint64_t reserved_13_15:3; - uint64_t pci_inta:2; - uint64_t reserved_18_31:14; - uint64_t pem:2; - uint64_t reserved_34_63:30; -#endif - } s; - struct cvmx_ciu2_en_iox_int_io_w1s_s cn68xx; - struct cvmx_ciu2_en_iox_int_io_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_mbox { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_mbox_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t mbox:4; -#else - uint64_t mbox:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_en_iox_int_mbox_s cn68xx; - struct cvmx_ciu2_en_iox_int_mbox_s cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_mbox_w1c { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_mbox_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t mbox:4; -#else - uint64_t mbox:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_en_iox_int_mbox_w1c_s cn68xx; - struct cvmx_ciu2_en_iox_int_mbox_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_mbox_w1s { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_mbox_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t mbox:4; -#else - uint64_t mbox:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_en_iox_int_mbox_w1s_s cn68xx; - struct cvmx_ciu2_en_iox_int_mbox_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_mem { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_mem_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t lmc:4; -#else - uint64_t lmc:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_en_iox_int_mem_s cn68xx; - struct cvmx_ciu2_en_iox_int_mem_s cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_mem_w1c { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_mem_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t lmc:4; -#else - uint64_t lmc:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_en_iox_int_mem_w1c_s cn68xx; - struct cvmx_ciu2_en_iox_int_mem_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_mem_w1s { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_mem_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t lmc:4; -#else - uint64_t lmc:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_en_iox_int_mem_w1s_s cn68xx; - struct cvmx_ciu2_en_iox_int_mem_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_mio { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_mio_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t rst:1; - uint64_t reserved_49_62:14; - uint64_t ptp:1; - uint64_t reserved_45_47:3; - uint64_t usb_hci:1; - uint64_t reserved_41_43:3; - uint64_t usb_uctl:1; - uint64_t reserved_38_39:2; - uint64_t uart:2; - uint64_t reserved_34_35:2; - uint64_t twsi:2; - uint64_t reserved_19_31:13; - uint64_t bootdma:1; - uint64_t mio:1; - uint64_t nand:1; - uint64_t reserved_12_15:4; - uint64_t timer:4; - uint64_t reserved_3_7:5; - uint64_t ipd_drp:1; - uint64_t ssoiq:1; - uint64_t ipdppthr:1; -#else - uint64_t ipdppthr:1; - uint64_t ssoiq:1; - uint64_t ipd_drp:1; - uint64_t reserved_3_7:5; - uint64_t timer:4; - uint64_t reserved_12_15:4; - uint64_t nand:1; - uint64_t mio:1; - uint64_t bootdma:1; - uint64_t reserved_19_31:13; - uint64_t twsi:2; - uint64_t reserved_34_35:2; - uint64_t uart:2; - uint64_t reserved_38_39:2; - uint64_t usb_uctl:1; - uint64_t reserved_41_43:3; - uint64_t usb_hci:1; - uint64_t reserved_45_47:3; - uint64_t ptp:1; - uint64_t reserved_49_62:14; - uint64_t rst:1; -#endif - } s; - struct cvmx_ciu2_en_iox_int_mio_s cn68xx; - struct cvmx_ciu2_en_iox_int_mio_s cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_mio_w1c { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_mio_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t rst:1; - uint64_t reserved_49_62:14; - uint64_t ptp:1; - uint64_t reserved_45_47:3; - uint64_t usb_hci:1; - uint64_t reserved_41_43:3; - uint64_t usb_uctl:1; - uint64_t reserved_38_39:2; - uint64_t uart:2; - uint64_t reserved_34_35:2; - uint64_t twsi:2; - uint64_t reserved_19_31:13; - uint64_t bootdma:1; - uint64_t mio:1; - uint64_t nand:1; - uint64_t reserved_12_15:4; - uint64_t timer:4; - uint64_t reserved_3_7:5; - uint64_t ipd_drp:1; - uint64_t ssoiq:1; - uint64_t ipdppthr:1; -#else - uint64_t ipdppthr:1; - uint64_t ssoiq:1; - uint64_t ipd_drp:1; - uint64_t reserved_3_7:5; - uint64_t timer:4; - uint64_t reserved_12_15:4; - uint64_t nand:1; - uint64_t mio:1; - uint64_t bootdma:1; - uint64_t reserved_19_31:13; - uint64_t twsi:2; - uint64_t reserved_34_35:2; - uint64_t uart:2; - uint64_t reserved_38_39:2; - uint64_t usb_uctl:1; - uint64_t reserved_41_43:3; - uint64_t usb_hci:1; - uint64_t reserved_45_47:3; - uint64_t ptp:1; - uint64_t reserved_49_62:14; - uint64_t rst:1; -#endif - } s; - struct cvmx_ciu2_en_iox_int_mio_w1c_s cn68xx; - struct cvmx_ciu2_en_iox_int_mio_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_mio_w1s { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_mio_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t rst:1; - uint64_t reserved_49_62:14; - uint64_t ptp:1; - uint64_t reserved_45_47:3; - uint64_t usb_hci:1; - uint64_t reserved_41_43:3; - uint64_t usb_uctl:1; - uint64_t reserved_38_39:2; - uint64_t uart:2; - uint64_t reserved_34_35:2; - uint64_t twsi:2; - uint64_t reserved_19_31:13; - uint64_t bootdma:1; - uint64_t mio:1; - uint64_t nand:1; - uint64_t reserved_12_15:4; - uint64_t timer:4; - uint64_t reserved_3_7:5; - uint64_t ipd_drp:1; - uint64_t ssoiq:1; - uint64_t ipdppthr:1; -#else - uint64_t ipdppthr:1; - uint64_t ssoiq:1; - uint64_t ipd_drp:1; - uint64_t reserved_3_7:5; - uint64_t timer:4; - uint64_t reserved_12_15:4; - uint64_t nand:1; - uint64_t mio:1; - uint64_t bootdma:1; - uint64_t reserved_19_31:13; - uint64_t twsi:2; - uint64_t reserved_34_35:2; - uint64_t uart:2; - uint64_t reserved_38_39:2; - uint64_t usb_uctl:1; - uint64_t reserved_41_43:3; - uint64_t usb_hci:1; - uint64_t reserved_45_47:3; - uint64_t ptp:1; - uint64_t reserved_49_62:14; - uint64_t rst:1; -#endif - } s; - struct cvmx_ciu2_en_iox_int_mio_w1s_s cn68xx; - struct cvmx_ciu2_en_iox_int_mio_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_pkt { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_pkt_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_54_63:10; - uint64_t ilk_drp:2; - uint64_t reserved_49_51:3; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_51:3; - uint64_t ilk_drp:2; - uint64_t reserved_54_63:10; -#endif - } s; - struct cvmx_ciu2_en_iox_int_pkt_s cn68xx; - struct cvmx_ciu2_en_iox_int_pkt_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_49_63:15; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_63:15; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_pkt_w1c { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_pkt_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_54_63:10; - uint64_t ilk_drp:2; - uint64_t reserved_49_51:3; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_51:3; - uint64_t ilk_drp:2; - uint64_t reserved_54_63:10; -#endif - } s; - struct cvmx_ciu2_en_iox_int_pkt_w1c_s cn68xx; - struct cvmx_ciu2_en_iox_int_pkt_w1c_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_49_63:15; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_63:15; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_pkt_w1s { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_pkt_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_54_63:10; - uint64_t ilk_drp:2; - uint64_t reserved_49_51:3; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_51:3; - uint64_t ilk_drp:2; - uint64_t reserved_54_63:10; -#endif - } s; - struct cvmx_ciu2_en_iox_int_pkt_w1s_s cn68xx; - struct cvmx_ciu2_en_iox_int_pkt_w1s_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_49_63:15; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_63:15; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_rml { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_rml_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_37_39:3; - uint64_t dpi_dma:1; - uint64_t reserved_34_35:2; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_35:2; - uint64_t dpi_dma:1; - uint64_t reserved_37_39:3; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } s; - struct cvmx_ciu2_en_iox_int_rml_s cn68xx; - struct cvmx_ciu2_en_iox_int_rml_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_34_39:6; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_39:6; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_rml_w1c { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_rml_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_37_39:3; - uint64_t dpi_dma:1; - uint64_t reserved_34_35:2; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_35:2; - uint64_t dpi_dma:1; - uint64_t reserved_37_39:3; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } s; - struct cvmx_ciu2_en_iox_int_rml_w1c_s cn68xx; - struct cvmx_ciu2_en_iox_int_rml_w1c_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_34_39:6; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_39:6; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_rml_w1s { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_rml_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_37_39:3; - uint64_t dpi_dma:1; - uint64_t reserved_34_35:2; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_35:2; - uint64_t dpi_dma:1; - uint64_t reserved_37_39:3; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } s; - struct cvmx_ciu2_en_iox_int_rml_w1s_s cn68xx; - struct cvmx_ciu2_en_iox_int_rml_w1s_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_34_39:6; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_39:6; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_wdog { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_wdog_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t wdog:32; -#else - uint64_t wdog:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_ciu2_en_iox_int_wdog_s cn68xx; - struct cvmx_ciu2_en_iox_int_wdog_s cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_wdog_w1c { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_wdog_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t wdog:32; -#else - uint64_t wdog:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_ciu2_en_iox_int_wdog_w1c_s cn68xx; - struct cvmx_ciu2_en_iox_int_wdog_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_wdog_w1s { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_wdog_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t wdog:32; -#else - uint64_t wdog:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_ciu2_en_iox_int_wdog_w1s_s cn68xx; - struct cvmx_ciu2_en_iox_int_wdog_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_wrkq { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_wrkq_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t workq:64; -#else - uint64_t workq:64; -#endif - } s; - struct cvmx_ciu2_en_iox_int_wrkq_s cn68xx; - struct cvmx_ciu2_en_iox_int_wrkq_s cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_wrkq_w1c { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_wrkq_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t workq:64; -#else - uint64_t workq:64; -#endif - } s; - struct cvmx_ciu2_en_iox_int_wrkq_w1c_s cn68xx; - struct cvmx_ciu2_en_iox_int_wrkq_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_wrkq_w1s { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_wrkq_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t workq:64; -#else - uint64_t workq:64; -#endif - } s; - struct cvmx_ciu2_en_iox_int_wrkq_w1s_s cn68xx; - struct cvmx_ciu2_en_iox_int_wrkq_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_gpio { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_gpio_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t gpio:16; -#else - uint64_t gpio:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_gpio_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_gpio_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_gpio_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_gpio_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t gpio:16; -#else - uint64_t gpio:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_gpio_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_gpio_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_gpio_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_gpio_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t gpio:16; -#else - uint64_t gpio:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_gpio_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_gpio_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_io { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_io_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_34_63:30; - uint64_t pem:2; - uint64_t reserved_18_31:14; - uint64_t pci_inta:2; - uint64_t reserved_13_15:3; - uint64_t msired:1; - uint64_t pci_msi:4; - uint64_t reserved_4_7:4; - uint64_t pci_intr:4; -#else - uint64_t pci_intr:4; - uint64_t reserved_4_7:4; - uint64_t pci_msi:4; - uint64_t msired:1; - uint64_t reserved_13_15:3; - uint64_t pci_inta:2; - uint64_t reserved_18_31:14; - uint64_t pem:2; - uint64_t reserved_34_63:30; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_io_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_io_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_io_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_io_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_34_63:30; - uint64_t pem:2; - uint64_t reserved_18_31:14; - uint64_t pci_inta:2; - uint64_t reserved_13_15:3; - uint64_t msired:1; - uint64_t pci_msi:4; - uint64_t reserved_4_7:4; - uint64_t pci_intr:4; -#else - uint64_t pci_intr:4; - uint64_t reserved_4_7:4; - uint64_t pci_msi:4; - uint64_t msired:1; - uint64_t reserved_13_15:3; - uint64_t pci_inta:2; - uint64_t reserved_18_31:14; - uint64_t pem:2; - uint64_t reserved_34_63:30; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_io_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_io_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_io_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_io_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_34_63:30; - uint64_t pem:2; - uint64_t reserved_18_31:14; - uint64_t pci_inta:2; - uint64_t reserved_13_15:3; - uint64_t msired:1; - uint64_t pci_msi:4; - uint64_t reserved_4_7:4; - uint64_t pci_intr:4; -#else - uint64_t pci_intr:4; - uint64_t reserved_4_7:4; - uint64_t pci_msi:4; - uint64_t msired:1; - uint64_t reserved_13_15:3; - uint64_t pci_inta:2; - uint64_t reserved_18_31:14; - uint64_t pem:2; - uint64_t reserved_34_63:30; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_io_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_io_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_mbox { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_mbox_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t mbox:4; -#else - uint64_t mbox:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_mbox_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_mbox_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_mbox_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_mbox_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t mbox:4; -#else - uint64_t mbox:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_mbox_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_mbox_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_mbox_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_mbox_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t mbox:4; -#else - uint64_t mbox:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_mbox_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_mbox_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_mem { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_mem_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t lmc:4; -#else - uint64_t lmc:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_mem_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_mem_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_mem_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_mem_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t lmc:4; -#else - uint64_t lmc:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_mem_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_mem_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_mem_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_mem_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t lmc:4; -#else - uint64_t lmc:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_mem_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_mem_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_mio { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_mio_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t rst:1; - uint64_t reserved_49_62:14; - uint64_t ptp:1; - uint64_t reserved_45_47:3; - uint64_t usb_hci:1; - uint64_t reserved_41_43:3; - uint64_t usb_uctl:1; - uint64_t reserved_38_39:2; - uint64_t uart:2; - uint64_t reserved_34_35:2; - uint64_t twsi:2; - uint64_t reserved_19_31:13; - uint64_t bootdma:1; - uint64_t mio:1; - uint64_t nand:1; - uint64_t reserved_12_15:4; - uint64_t timer:4; - uint64_t reserved_3_7:5; - uint64_t ipd_drp:1; - uint64_t ssoiq:1; - uint64_t ipdppthr:1; -#else - uint64_t ipdppthr:1; - uint64_t ssoiq:1; - uint64_t ipd_drp:1; - uint64_t reserved_3_7:5; - uint64_t timer:4; - uint64_t reserved_12_15:4; - uint64_t nand:1; - uint64_t mio:1; - uint64_t bootdma:1; - uint64_t reserved_19_31:13; - uint64_t twsi:2; - uint64_t reserved_34_35:2; - uint64_t uart:2; - uint64_t reserved_38_39:2; - uint64_t usb_uctl:1; - uint64_t reserved_41_43:3; - uint64_t usb_hci:1; - uint64_t reserved_45_47:3; - uint64_t ptp:1; - uint64_t reserved_49_62:14; - uint64_t rst:1; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_mio_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_mio_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_mio_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_mio_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t rst:1; - uint64_t reserved_49_62:14; - uint64_t ptp:1; - uint64_t reserved_45_47:3; - uint64_t usb_hci:1; - uint64_t reserved_41_43:3; - uint64_t usb_uctl:1; - uint64_t reserved_38_39:2; - uint64_t uart:2; - uint64_t reserved_34_35:2; - uint64_t twsi:2; - uint64_t reserved_19_31:13; - uint64_t bootdma:1; - uint64_t mio:1; - uint64_t nand:1; - uint64_t reserved_12_15:4; - uint64_t timer:4; - uint64_t reserved_3_7:5; - uint64_t ipd_drp:1; - uint64_t ssoiq:1; - uint64_t ipdppthr:1; -#else - uint64_t ipdppthr:1; - uint64_t ssoiq:1; - uint64_t ipd_drp:1; - uint64_t reserved_3_7:5; - uint64_t timer:4; - uint64_t reserved_12_15:4; - uint64_t nand:1; - uint64_t mio:1; - uint64_t bootdma:1; - uint64_t reserved_19_31:13; - uint64_t twsi:2; - uint64_t reserved_34_35:2; - uint64_t uart:2; - uint64_t reserved_38_39:2; - uint64_t usb_uctl:1; - uint64_t reserved_41_43:3; - uint64_t usb_hci:1; - uint64_t reserved_45_47:3; - uint64_t ptp:1; - uint64_t reserved_49_62:14; - uint64_t rst:1; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_mio_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_mio_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_mio_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_mio_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t rst:1; - uint64_t reserved_49_62:14; - uint64_t ptp:1; - uint64_t reserved_45_47:3; - uint64_t usb_hci:1; - uint64_t reserved_41_43:3; - uint64_t usb_uctl:1; - uint64_t reserved_38_39:2; - uint64_t uart:2; - uint64_t reserved_34_35:2; - uint64_t twsi:2; - uint64_t reserved_19_31:13; - uint64_t bootdma:1; - uint64_t mio:1; - uint64_t nand:1; - uint64_t reserved_12_15:4; - uint64_t timer:4; - uint64_t reserved_3_7:5; - uint64_t ipd_drp:1; - uint64_t ssoiq:1; - uint64_t ipdppthr:1; -#else - uint64_t ipdppthr:1; - uint64_t ssoiq:1; - uint64_t ipd_drp:1; - uint64_t reserved_3_7:5; - uint64_t timer:4; - uint64_t reserved_12_15:4; - uint64_t nand:1; - uint64_t mio:1; - uint64_t bootdma:1; - uint64_t reserved_19_31:13; - uint64_t twsi:2; - uint64_t reserved_34_35:2; - uint64_t uart:2; - uint64_t reserved_38_39:2; - uint64_t usb_uctl:1; - uint64_t reserved_41_43:3; - uint64_t usb_hci:1; - uint64_t reserved_45_47:3; - uint64_t ptp:1; - uint64_t reserved_49_62:14; - uint64_t rst:1; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_mio_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_mio_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_pkt { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_pkt_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_54_63:10; - uint64_t ilk_drp:2; - uint64_t reserved_49_51:3; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_51:3; - uint64_t ilk_drp:2; - uint64_t reserved_54_63:10; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_pkt_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_pkt_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_49_63:15; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_63:15; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_pkt_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_pkt_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_54_63:10; - uint64_t ilk_drp:2; - uint64_t reserved_49_51:3; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_51:3; - uint64_t ilk_drp:2; - uint64_t reserved_54_63:10; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_pkt_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_pkt_w1c_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_49_63:15; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_63:15; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_pkt_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_pkt_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_54_63:10; - uint64_t ilk_drp:2; - uint64_t reserved_49_51:3; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_51:3; - uint64_t ilk_drp:2; - uint64_t reserved_54_63:10; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_pkt_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_pkt_w1s_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_49_63:15; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_63:15; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_rml { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_rml_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_37_39:3; - uint64_t dpi_dma:1; - uint64_t reserved_34_35:2; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_35:2; - uint64_t dpi_dma:1; - uint64_t reserved_37_39:3; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_rml_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_rml_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_34_39:6; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_39:6; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_rml_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_rml_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_37_39:3; - uint64_t dpi_dma:1; - uint64_t reserved_34_35:2; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_35:2; - uint64_t dpi_dma:1; - uint64_t reserved_37_39:3; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_rml_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_rml_w1c_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_34_39:6; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_39:6; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_rml_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_rml_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_37_39:3; - uint64_t dpi_dma:1; - uint64_t reserved_34_35:2; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_35:2; - uint64_t dpi_dma:1; - uint64_t reserved_37_39:3; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_rml_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_rml_w1s_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_34_39:6; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_39:6; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_wdog { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_wdog_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t wdog:32; -#else - uint64_t wdog:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_wdog_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_wdog_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_wdog_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_wdog_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t wdog:32; -#else - uint64_t wdog:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_wdog_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_wdog_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_wdog_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_wdog_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t wdog:32; -#else - uint64_t wdog:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_wdog_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_wdog_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_wrkq { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_wrkq_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t workq:64; -#else - uint64_t workq:64; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_wrkq_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_wrkq_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_wrkq_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_wrkq_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t workq:64; -#else - uint64_t workq:64; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_wrkq_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_wrkq_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_wrkq_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_wrkq_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t workq:64; -#else - uint64_t workq:64; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_wrkq_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_wrkq_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_gpio { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_gpio_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t gpio:16; -#else - uint64_t gpio:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_gpio_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_gpio_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_gpio_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_gpio_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t gpio:16; -#else - uint64_t gpio:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_gpio_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_gpio_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_gpio_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_gpio_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t gpio:16; -#else - uint64_t gpio:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_gpio_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_gpio_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_io { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_io_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_34_63:30; - uint64_t pem:2; - uint64_t reserved_18_31:14; - uint64_t pci_inta:2; - uint64_t reserved_13_15:3; - uint64_t msired:1; - uint64_t pci_msi:4; - uint64_t reserved_4_7:4; - uint64_t pci_intr:4; -#else - uint64_t pci_intr:4; - uint64_t reserved_4_7:4; - uint64_t pci_msi:4; - uint64_t msired:1; - uint64_t reserved_13_15:3; - uint64_t pci_inta:2; - uint64_t reserved_18_31:14; - uint64_t pem:2; - uint64_t reserved_34_63:30; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_io_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_io_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_io_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_io_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_34_63:30; - uint64_t pem:2; - uint64_t reserved_18_31:14; - uint64_t pci_inta:2; - uint64_t reserved_13_15:3; - uint64_t msired:1; - uint64_t pci_msi:4; - uint64_t reserved_4_7:4; - uint64_t pci_intr:4; -#else - uint64_t pci_intr:4; - uint64_t reserved_4_7:4; - uint64_t pci_msi:4; - uint64_t msired:1; - uint64_t reserved_13_15:3; - uint64_t pci_inta:2; - uint64_t reserved_18_31:14; - uint64_t pem:2; - uint64_t reserved_34_63:30; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_io_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_io_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_io_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_io_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_34_63:30; - uint64_t pem:2; - uint64_t reserved_18_31:14; - uint64_t pci_inta:2; - uint64_t reserved_13_15:3; - uint64_t msired:1; - uint64_t pci_msi:4; - uint64_t reserved_4_7:4; - uint64_t pci_intr:4; -#else - uint64_t pci_intr:4; - uint64_t reserved_4_7:4; - uint64_t pci_msi:4; - uint64_t msired:1; - uint64_t reserved_13_15:3; - uint64_t pci_inta:2; - uint64_t reserved_18_31:14; - uint64_t pem:2; - uint64_t reserved_34_63:30; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_io_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_io_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_mbox { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_mbox_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t mbox:4; -#else - uint64_t mbox:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_mbox_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_mbox_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_mbox_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_mbox_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t mbox:4; -#else - uint64_t mbox:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_mbox_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_mbox_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_mbox_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_mbox_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t mbox:4; -#else - uint64_t mbox:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_mbox_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_mbox_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_mem { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_mem_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t lmc:4; -#else - uint64_t lmc:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_mem_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_mem_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_mem_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_mem_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t lmc:4; -#else - uint64_t lmc:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_mem_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_mem_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_mem_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_mem_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t lmc:4; -#else - uint64_t lmc:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_mem_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_mem_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_mio { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_mio_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t rst:1; - uint64_t reserved_49_62:14; - uint64_t ptp:1; - uint64_t reserved_45_47:3; - uint64_t usb_hci:1; - uint64_t reserved_41_43:3; - uint64_t usb_uctl:1; - uint64_t reserved_38_39:2; - uint64_t uart:2; - uint64_t reserved_34_35:2; - uint64_t twsi:2; - uint64_t reserved_19_31:13; - uint64_t bootdma:1; - uint64_t mio:1; - uint64_t nand:1; - uint64_t reserved_12_15:4; - uint64_t timer:4; - uint64_t reserved_3_7:5; - uint64_t ipd_drp:1; - uint64_t ssoiq:1; - uint64_t ipdppthr:1; -#else - uint64_t ipdppthr:1; - uint64_t ssoiq:1; - uint64_t ipd_drp:1; - uint64_t reserved_3_7:5; - uint64_t timer:4; - uint64_t reserved_12_15:4; - uint64_t nand:1; - uint64_t mio:1; - uint64_t bootdma:1; - uint64_t reserved_19_31:13; - uint64_t twsi:2; - uint64_t reserved_34_35:2; - uint64_t uart:2; - uint64_t reserved_38_39:2; - uint64_t usb_uctl:1; - uint64_t reserved_41_43:3; - uint64_t usb_hci:1; - uint64_t reserved_45_47:3; - uint64_t ptp:1; - uint64_t reserved_49_62:14; - uint64_t rst:1; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_mio_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_mio_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_mio_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_mio_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t rst:1; - uint64_t reserved_49_62:14; - uint64_t ptp:1; - uint64_t reserved_45_47:3; - uint64_t usb_hci:1; - uint64_t reserved_41_43:3; - uint64_t usb_uctl:1; - uint64_t reserved_38_39:2; - uint64_t uart:2; - uint64_t reserved_34_35:2; - uint64_t twsi:2; - uint64_t reserved_19_31:13; - uint64_t bootdma:1; - uint64_t mio:1; - uint64_t nand:1; - uint64_t reserved_12_15:4; - uint64_t timer:4; - uint64_t reserved_3_7:5; - uint64_t ipd_drp:1; - uint64_t ssoiq:1; - uint64_t ipdppthr:1; -#else - uint64_t ipdppthr:1; - uint64_t ssoiq:1; - uint64_t ipd_drp:1; - uint64_t reserved_3_7:5; - uint64_t timer:4; - uint64_t reserved_12_15:4; - uint64_t nand:1; - uint64_t mio:1; - uint64_t bootdma:1; - uint64_t reserved_19_31:13; - uint64_t twsi:2; - uint64_t reserved_34_35:2; - uint64_t uart:2; - uint64_t reserved_38_39:2; - uint64_t usb_uctl:1; - uint64_t reserved_41_43:3; - uint64_t usb_hci:1; - uint64_t reserved_45_47:3; - uint64_t ptp:1; - uint64_t reserved_49_62:14; - uint64_t rst:1; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_mio_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_mio_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_mio_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_mio_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t rst:1; - uint64_t reserved_49_62:14; - uint64_t ptp:1; - uint64_t reserved_45_47:3; - uint64_t usb_hci:1; - uint64_t reserved_41_43:3; - uint64_t usb_uctl:1; - uint64_t reserved_38_39:2; - uint64_t uart:2; - uint64_t reserved_34_35:2; - uint64_t twsi:2; - uint64_t reserved_19_31:13; - uint64_t bootdma:1; - uint64_t mio:1; - uint64_t nand:1; - uint64_t reserved_12_15:4; - uint64_t timer:4; - uint64_t reserved_3_7:5; - uint64_t ipd_drp:1; - uint64_t ssoiq:1; - uint64_t ipdppthr:1; -#else - uint64_t ipdppthr:1; - uint64_t ssoiq:1; - uint64_t ipd_drp:1; - uint64_t reserved_3_7:5; - uint64_t timer:4; - uint64_t reserved_12_15:4; - uint64_t nand:1; - uint64_t mio:1; - uint64_t bootdma:1; - uint64_t reserved_19_31:13; - uint64_t twsi:2; - uint64_t reserved_34_35:2; - uint64_t uart:2; - uint64_t reserved_38_39:2; - uint64_t usb_uctl:1; - uint64_t reserved_41_43:3; - uint64_t usb_hci:1; - uint64_t reserved_45_47:3; - uint64_t ptp:1; - uint64_t reserved_49_62:14; - uint64_t rst:1; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_mio_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_mio_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_pkt { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_pkt_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_54_63:10; - uint64_t ilk_drp:2; - uint64_t reserved_49_51:3; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_51:3; - uint64_t ilk_drp:2; - uint64_t reserved_54_63:10; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_pkt_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_pkt_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_49_63:15; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_63:15; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_pkt_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_pkt_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_54_63:10; - uint64_t ilk_drp:2; - uint64_t reserved_49_51:3; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_51:3; - uint64_t ilk_drp:2; - uint64_t reserved_54_63:10; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_pkt_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_pkt_w1c_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_49_63:15; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_63:15; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_pkt_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_pkt_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_54_63:10; - uint64_t ilk_drp:2; - uint64_t reserved_49_51:3; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_51:3; - uint64_t ilk_drp:2; - uint64_t reserved_54_63:10; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_pkt_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_pkt_w1s_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_49_63:15; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_63:15; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_rml { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_rml_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_37_39:3; - uint64_t dpi_dma:1; - uint64_t reserved_34_35:2; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_35:2; - uint64_t dpi_dma:1; - uint64_t reserved_37_39:3; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_rml_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_rml_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_34_39:6; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_39:6; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_rml_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_rml_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_37_39:3; - uint64_t dpi_dma:1; - uint64_t reserved_34_35:2; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_35:2; - uint64_t dpi_dma:1; - uint64_t reserved_37_39:3; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_rml_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_rml_w1c_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_34_39:6; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_39:6; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_rml_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_rml_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_37_39:3; - uint64_t dpi_dma:1; - uint64_t reserved_34_35:2; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_35:2; - uint64_t dpi_dma:1; - uint64_t reserved_37_39:3; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_rml_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_rml_w1s_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_34_39:6; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_39:6; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_wdog { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_wdog_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t wdog:32; -#else - uint64_t wdog:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_wdog_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_wdog_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_wdog_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_wdog_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t wdog:32; -#else - uint64_t wdog:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_wdog_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_wdog_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_wdog_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_wdog_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t wdog:32; -#else - uint64_t wdog:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_wdog_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_wdog_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_wrkq { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_wrkq_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t workq:64; -#else - uint64_t workq:64; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_wrkq_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_wrkq_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_wrkq_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_wrkq_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t workq:64; -#else - uint64_t workq:64; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_wrkq_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_wrkq_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_wrkq_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_wrkq_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t workq:64; -#else - uint64_t workq:64; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_wrkq_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_wrkq_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_gpio { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_gpio_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t gpio:16; -#else - uint64_t gpio:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_gpio_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_gpio_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_gpio_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_gpio_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t gpio:16; -#else - uint64_t gpio:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_gpio_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_gpio_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_gpio_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_gpio_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t gpio:16; -#else - uint64_t gpio:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_gpio_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_gpio_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_io { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_io_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_34_63:30; - uint64_t pem:2; - uint64_t reserved_18_31:14; - uint64_t pci_inta:2; - uint64_t reserved_13_15:3; - uint64_t msired:1; - uint64_t pci_msi:4; - uint64_t reserved_4_7:4; - uint64_t pci_intr:4; -#else - uint64_t pci_intr:4; - uint64_t reserved_4_7:4; - uint64_t pci_msi:4; - uint64_t msired:1; - uint64_t reserved_13_15:3; - uint64_t pci_inta:2; - uint64_t reserved_18_31:14; - uint64_t pem:2; - uint64_t reserved_34_63:30; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_io_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_io_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_io_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_io_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_34_63:30; - uint64_t pem:2; - uint64_t reserved_18_31:14; - uint64_t pci_inta:2; - uint64_t reserved_13_15:3; - uint64_t msired:1; - uint64_t pci_msi:4; - uint64_t reserved_4_7:4; - uint64_t pci_intr:4; -#else - uint64_t pci_intr:4; - uint64_t reserved_4_7:4; - uint64_t pci_msi:4; - uint64_t msired:1; - uint64_t reserved_13_15:3; - uint64_t pci_inta:2; - uint64_t reserved_18_31:14; - uint64_t pem:2; - uint64_t reserved_34_63:30; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_io_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_io_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_io_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_io_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_34_63:30; - uint64_t pem:2; - uint64_t reserved_18_31:14; - uint64_t pci_inta:2; - uint64_t reserved_13_15:3; - uint64_t msired:1; - uint64_t pci_msi:4; - uint64_t reserved_4_7:4; - uint64_t pci_intr:4; -#else - uint64_t pci_intr:4; - uint64_t reserved_4_7:4; - uint64_t pci_msi:4; - uint64_t msired:1; - uint64_t reserved_13_15:3; - uint64_t pci_inta:2; - uint64_t reserved_18_31:14; - uint64_t pem:2; - uint64_t reserved_34_63:30; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_io_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_io_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_mbox { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_mbox_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t mbox:4; -#else - uint64_t mbox:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_mbox_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_mbox_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_mbox_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_mbox_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t mbox:4; -#else - uint64_t mbox:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_mbox_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_mbox_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_mbox_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_mbox_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t mbox:4; -#else - uint64_t mbox:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_mbox_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_mbox_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_mem { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_mem_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t lmc:4; -#else - uint64_t lmc:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_mem_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_mem_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_mem_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_mem_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t lmc:4; -#else - uint64_t lmc:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_mem_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_mem_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_mem_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_mem_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t lmc:4; -#else - uint64_t lmc:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_mem_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_mem_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_mio { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_mio_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t rst:1; - uint64_t reserved_49_62:14; - uint64_t ptp:1; - uint64_t reserved_45_47:3; - uint64_t usb_hci:1; - uint64_t reserved_41_43:3; - uint64_t usb_uctl:1; - uint64_t reserved_38_39:2; - uint64_t uart:2; - uint64_t reserved_34_35:2; - uint64_t twsi:2; - uint64_t reserved_19_31:13; - uint64_t bootdma:1; - uint64_t mio:1; - uint64_t nand:1; - uint64_t reserved_12_15:4; - uint64_t timer:4; - uint64_t reserved_3_7:5; - uint64_t ipd_drp:1; - uint64_t ssoiq:1; - uint64_t ipdppthr:1; -#else - uint64_t ipdppthr:1; - uint64_t ssoiq:1; - uint64_t ipd_drp:1; - uint64_t reserved_3_7:5; - uint64_t timer:4; - uint64_t reserved_12_15:4; - uint64_t nand:1; - uint64_t mio:1; - uint64_t bootdma:1; - uint64_t reserved_19_31:13; - uint64_t twsi:2; - uint64_t reserved_34_35:2; - uint64_t uart:2; - uint64_t reserved_38_39:2; - uint64_t usb_uctl:1; - uint64_t reserved_41_43:3; - uint64_t usb_hci:1; - uint64_t reserved_45_47:3; - uint64_t ptp:1; - uint64_t reserved_49_62:14; - uint64_t rst:1; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_mio_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_mio_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_mio_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_mio_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t rst:1; - uint64_t reserved_49_62:14; - uint64_t ptp:1; - uint64_t reserved_45_47:3; - uint64_t usb_hci:1; - uint64_t reserved_41_43:3; - uint64_t usb_uctl:1; - uint64_t reserved_38_39:2; - uint64_t uart:2; - uint64_t reserved_34_35:2; - uint64_t twsi:2; - uint64_t reserved_19_31:13; - uint64_t bootdma:1; - uint64_t mio:1; - uint64_t nand:1; - uint64_t reserved_12_15:4; - uint64_t timer:4; - uint64_t reserved_3_7:5; - uint64_t ipd_drp:1; - uint64_t ssoiq:1; - uint64_t ipdppthr:1; -#else - uint64_t ipdppthr:1; - uint64_t ssoiq:1; - uint64_t ipd_drp:1; - uint64_t reserved_3_7:5; - uint64_t timer:4; - uint64_t reserved_12_15:4; - uint64_t nand:1; - uint64_t mio:1; - uint64_t bootdma:1; - uint64_t reserved_19_31:13; - uint64_t twsi:2; - uint64_t reserved_34_35:2; - uint64_t uart:2; - uint64_t reserved_38_39:2; - uint64_t usb_uctl:1; - uint64_t reserved_41_43:3; - uint64_t usb_hci:1; - uint64_t reserved_45_47:3; - uint64_t ptp:1; - uint64_t reserved_49_62:14; - uint64_t rst:1; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_mio_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_mio_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_mio_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_mio_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t rst:1; - uint64_t reserved_49_62:14; - uint64_t ptp:1; - uint64_t reserved_45_47:3; - uint64_t usb_hci:1; - uint64_t reserved_41_43:3; - uint64_t usb_uctl:1; - uint64_t reserved_38_39:2; - uint64_t uart:2; - uint64_t reserved_34_35:2; - uint64_t twsi:2; - uint64_t reserved_19_31:13; - uint64_t bootdma:1; - uint64_t mio:1; - uint64_t nand:1; - uint64_t reserved_12_15:4; - uint64_t timer:4; - uint64_t reserved_3_7:5; - uint64_t ipd_drp:1; - uint64_t ssoiq:1; - uint64_t ipdppthr:1; -#else - uint64_t ipdppthr:1; - uint64_t ssoiq:1; - uint64_t ipd_drp:1; - uint64_t reserved_3_7:5; - uint64_t timer:4; - uint64_t reserved_12_15:4; - uint64_t nand:1; - uint64_t mio:1; - uint64_t bootdma:1; - uint64_t reserved_19_31:13; - uint64_t twsi:2; - uint64_t reserved_34_35:2; - uint64_t uart:2; - uint64_t reserved_38_39:2; - uint64_t usb_uctl:1; - uint64_t reserved_41_43:3; - uint64_t usb_hci:1; - uint64_t reserved_45_47:3; - uint64_t ptp:1; - uint64_t reserved_49_62:14; - uint64_t rst:1; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_mio_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_mio_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_pkt { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_pkt_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_54_63:10; - uint64_t ilk_drp:2; - uint64_t reserved_49_51:3; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_51:3; - uint64_t ilk_drp:2; - uint64_t reserved_54_63:10; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_pkt_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_pkt_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_49_63:15; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_63:15; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_pkt_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_pkt_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_54_63:10; - uint64_t ilk_drp:2; - uint64_t reserved_49_51:3; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_51:3; - uint64_t ilk_drp:2; - uint64_t reserved_54_63:10; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_pkt_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_pkt_w1c_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_49_63:15; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_63:15; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_pkt_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_pkt_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_54_63:10; - uint64_t ilk_drp:2; - uint64_t reserved_49_51:3; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_51:3; - uint64_t ilk_drp:2; - uint64_t reserved_54_63:10; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_pkt_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_pkt_w1s_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_49_63:15; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_63:15; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_rml { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_rml_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_37_39:3; - uint64_t dpi_dma:1; - uint64_t reserved_34_35:2; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_35:2; - uint64_t dpi_dma:1; - uint64_t reserved_37_39:3; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_rml_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_rml_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_34_39:6; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_39:6; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_rml_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_rml_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_37_39:3; - uint64_t dpi_dma:1; - uint64_t reserved_34_35:2; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_35:2; - uint64_t dpi_dma:1; - uint64_t reserved_37_39:3; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_rml_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_rml_w1c_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_34_39:6; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_39:6; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_rml_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_rml_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_37_39:3; - uint64_t dpi_dma:1; - uint64_t reserved_34_35:2; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_35:2; - uint64_t dpi_dma:1; - uint64_t reserved_37_39:3; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_rml_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_rml_w1s_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_34_39:6; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_39:6; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_wdog { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_wdog_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t wdog:32; -#else - uint64_t wdog:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_wdog_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_wdog_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_wdog_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_wdog_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t wdog:32; -#else - uint64_t wdog:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_wdog_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_wdog_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_wdog_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_wdog_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t wdog:32; -#else - uint64_t wdog:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_wdog_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_wdog_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_wrkq { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_wrkq_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t workq:64; -#else - uint64_t workq:64; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_wrkq_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_wrkq_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_wrkq_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_wrkq_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t workq:64; -#else - uint64_t workq:64; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_wrkq_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_wrkq_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_wrkq_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_wrkq_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t workq:64; -#else - uint64_t workq:64; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_wrkq_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_wrkq_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_intr_ciu_ready { - uint64_t u64; - struct cvmx_ciu2_intr_ciu_ready_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_1_63:63; - uint64_t ready:1; -#else - uint64_t ready:1; - uint64_t reserved_1_63:63; -#endif - } s; - struct cvmx_ciu2_intr_ciu_ready_s cn68xx; - struct cvmx_ciu2_intr_ciu_ready_s cn68xxp1; -}; - -union cvmx_ciu2_intr_ram_ecc_ctl { - uint64_t u64; - struct cvmx_ciu2_intr_ram_ecc_ctl_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_3_63:61; - uint64_t flip_synd:2; - uint64_t ecc_ena:1; -#else - uint64_t ecc_ena:1; - uint64_t flip_synd:2; - uint64_t reserved_3_63:61; -#endif - } s; - struct cvmx_ciu2_intr_ram_ecc_ctl_s cn68xx; - struct cvmx_ciu2_intr_ram_ecc_ctl_s cn68xxp1; -}; - -union cvmx_ciu2_intr_ram_ecc_st { - uint64_t u64; - struct cvmx_ciu2_intr_ram_ecc_st_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_23_63:41; - uint64_t addr:7; - uint64_t reserved_13_15:3; - uint64_t syndrom:9; - uint64_t reserved_2_3:2; - uint64_t dbe:1; - uint64_t sbe:1; -#else - uint64_t sbe:1; - uint64_t dbe:1; - uint64_t reserved_2_3:2; - uint64_t syndrom:9; - uint64_t reserved_13_15:3; - uint64_t addr:7; - uint64_t reserved_23_63:41; -#endif - } s; - struct cvmx_ciu2_intr_ram_ecc_st_s cn68xx; - struct cvmx_ciu2_intr_ram_ecc_st_s cn68xxp1; -}; - -union cvmx_ciu2_intr_slowdown { - uint64_t u64; - struct cvmx_ciu2_intr_slowdown_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_3_63:61; - uint64_t ctl:3; -#else - uint64_t ctl:3; - uint64_t reserved_3_63:61; -#endif - } s; - struct cvmx_ciu2_intr_slowdown_s cn68xx; - struct cvmx_ciu2_intr_slowdown_s cn68xxp1; -}; - -union cvmx_ciu2_msi_rcvx { - uint64_t u64; - struct cvmx_ciu2_msi_rcvx_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_1_63:63; - uint64_t msi_rcv:1; -#else - uint64_t msi_rcv:1; - uint64_t reserved_1_63:63; -#endif - } s; - struct cvmx_ciu2_msi_rcvx_s cn68xx; - struct cvmx_ciu2_msi_rcvx_s cn68xxp1; -}; - -union cvmx_ciu2_msi_selx { - uint64_t u64; - struct cvmx_ciu2_msi_selx_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_13_63:51; - uint64_t pp_num:5; - uint64_t reserved_6_7:2; - uint64_t ip_num:2; - uint64_t reserved_1_3:3; - uint64_t en:1; -#else - uint64_t en:1; - uint64_t reserved_1_3:3; - uint64_t ip_num:2; - uint64_t reserved_6_7:2; - uint64_t pp_num:5; - uint64_t reserved_13_63:51; -#endif - } s; - struct cvmx_ciu2_msi_selx_s cn68xx; - struct cvmx_ciu2_msi_selx_s cn68xxp1; -}; - -union cvmx_ciu2_msired_ppx_ip2 { - uint64_t u64; - struct cvmx_ciu2_msired_ppx_ip2_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_21_63:43; - uint64_t intr:1; - uint64_t reserved_17_19:3; - uint64_t newint:1; - uint64_t reserved_8_15:8; - uint64_t msi_num:8; -#else - uint64_t msi_num:8; - uint64_t reserved_8_15:8; - uint64_t newint:1; - uint64_t reserved_17_19:3; - uint64_t intr:1; - uint64_t reserved_21_63:43; -#endif - } s; - struct cvmx_ciu2_msired_ppx_ip2_s cn68xx; - struct cvmx_ciu2_msired_ppx_ip2_s cn68xxp1; -}; - -union cvmx_ciu2_msired_ppx_ip3 { - uint64_t u64; - struct cvmx_ciu2_msired_ppx_ip3_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_21_63:43; - uint64_t intr:1; - uint64_t reserved_17_19:3; - uint64_t newint:1; - uint64_t reserved_8_15:8; - uint64_t msi_num:8; -#else - uint64_t msi_num:8; - uint64_t reserved_8_15:8; - uint64_t newint:1; - uint64_t reserved_17_19:3; - uint64_t intr:1; - uint64_t reserved_21_63:43; -#endif - } s; - struct cvmx_ciu2_msired_ppx_ip3_s cn68xx; - struct cvmx_ciu2_msired_ppx_ip3_s cn68xxp1; -}; - -union cvmx_ciu2_msired_ppx_ip4 { - uint64_t u64; - struct cvmx_ciu2_msired_ppx_ip4_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_21_63:43; - uint64_t intr:1; - uint64_t reserved_17_19:3; - uint64_t newint:1; - uint64_t reserved_8_15:8; - uint64_t msi_num:8; -#else - uint64_t msi_num:8; - uint64_t reserved_8_15:8; - uint64_t newint:1; - uint64_t reserved_17_19:3; - uint64_t intr:1; - uint64_t reserved_21_63:43; -#endif - } s; - struct cvmx_ciu2_msired_ppx_ip4_s cn68xx; - struct cvmx_ciu2_msired_ppx_ip4_s cn68xxp1; -}; - -union cvmx_ciu2_raw_iox_int_gpio { - uint64_t u64; - struct cvmx_ciu2_raw_iox_int_gpio_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t gpio:16; -#else - uint64_t gpio:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_ciu2_raw_iox_int_gpio_s cn68xx; - struct cvmx_ciu2_raw_iox_int_gpio_s cn68xxp1; -}; - -union cvmx_ciu2_raw_iox_int_io { - uint64_t u64; - struct cvmx_ciu2_raw_iox_int_io_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_34_63:30; - uint64_t pem:2; - uint64_t reserved_18_31:14; - uint64_t pci_inta:2; - uint64_t reserved_13_15:3; - uint64_t msired:1; - uint64_t pci_msi:4; - uint64_t reserved_4_7:4; - uint64_t pci_intr:4; -#else - uint64_t pci_intr:4; - uint64_t reserved_4_7:4; - uint64_t pci_msi:4; - uint64_t msired:1; - uint64_t reserved_13_15:3; - uint64_t pci_inta:2; - uint64_t reserved_18_31:14; - uint64_t pem:2; - uint64_t reserved_34_63:30; -#endif - } s; - struct cvmx_ciu2_raw_iox_int_io_s cn68xx; - struct cvmx_ciu2_raw_iox_int_io_s cn68xxp1; -}; - -union cvmx_ciu2_raw_iox_int_mem { - uint64_t u64; - struct cvmx_ciu2_raw_iox_int_mem_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t lmc:4; -#else - uint64_t lmc:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_raw_iox_int_mem_s cn68xx; - struct cvmx_ciu2_raw_iox_int_mem_s cn68xxp1; -}; - -union cvmx_ciu2_raw_iox_int_mio { - uint64_t u64; - struct cvmx_ciu2_raw_iox_int_mio_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t rst:1; - uint64_t reserved_49_62:14; - uint64_t ptp:1; - uint64_t reserved_45_47:3; - uint64_t usb_hci:1; - uint64_t reserved_41_43:3; - uint64_t usb_uctl:1; - uint64_t reserved_38_39:2; - uint64_t uart:2; - uint64_t reserved_34_35:2; - uint64_t twsi:2; - uint64_t reserved_19_31:13; - uint64_t bootdma:1; - uint64_t mio:1; - uint64_t nand:1; - uint64_t reserved_12_15:4; - uint64_t timer:4; - uint64_t reserved_3_7:5; - uint64_t ipd_drp:1; - uint64_t ssoiq:1; - uint64_t ipdppthr:1; -#else - uint64_t ipdppthr:1; - uint64_t ssoiq:1; - uint64_t ipd_drp:1; - uint64_t reserved_3_7:5; - uint64_t timer:4; - uint64_t reserved_12_15:4; - uint64_t nand:1; - uint64_t mio:1; - uint64_t bootdma:1; - uint64_t reserved_19_31:13; - uint64_t twsi:2; - uint64_t reserved_34_35:2; - uint64_t uart:2; - uint64_t reserved_38_39:2; - uint64_t usb_uctl:1; - uint64_t reserved_41_43:3; - uint64_t usb_hci:1; - uint64_t reserved_45_47:3; - uint64_t ptp:1; - uint64_t reserved_49_62:14; - uint64_t rst:1; -#endif - } s; - struct cvmx_ciu2_raw_iox_int_mio_s cn68xx; - struct cvmx_ciu2_raw_iox_int_mio_s cn68xxp1; -}; - -union cvmx_ciu2_raw_iox_int_pkt { - uint64_t u64; - struct cvmx_ciu2_raw_iox_int_pkt_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_54_63:10; - uint64_t ilk_drp:2; - uint64_t reserved_49_51:3; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_51:3; - uint64_t ilk_drp:2; - uint64_t reserved_54_63:10; -#endif - } s; - struct cvmx_ciu2_raw_iox_int_pkt_s cn68xx; - struct cvmx_ciu2_raw_iox_int_pkt_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_49_63:15; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_63:15; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_raw_iox_int_rml { - uint64_t u64; - struct cvmx_ciu2_raw_iox_int_rml_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_37_39:3; - uint64_t dpi_dma:1; - uint64_t reserved_34_35:2; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_35:2; - uint64_t dpi_dma:1; - uint64_t reserved_37_39:3; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } s; - struct cvmx_ciu2_raw_iox_int_rml_s cn68xx; - struct cvmx_ciu2_raw_iox_int_rml_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_34_39:6; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_39:6; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_raw_iox_int_wdog { - uint64_t u64; - struct cvmx_ciu2_raw_iox_int_wdog_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t wdog:32; -#else - uint64_t wdog:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_ciu2_raw_iox_int_wdog_s cn68xx; - struct cvmx_ciu2_raw_iox_int_wdog_s cn68xxp1; -}; - -union cvmx_ciu2_raw_iox_int_wrkq { - uint64_t u64; - struct cvmx_ciu2_raw_iox_int_wrkq_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t workq:64; -#else - uint64_t workq:64; -#endif - } s; - struct cvmx_ciu2_raw_iox_int_wrkq_s cn68xx; - struct cvmx_ciu2_raw_iox_int_wrkq_s cn68xxp1; -}; - -union cvmx_ciu2_raw_ppx_ip2_gpio { - uint64_t u64; - struct cvmx_ciu2_raw_ppx_ip2_gpio_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t gpio:16; -#else - uint64_t gpio:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_ciu2_raw_ppx_ip2_gpio_s cn68xx; - struct cvmx_ciu2_raw_ppx_ip2_gpio_s cn68xxp1; -}; - -union cvmx_ciu2_raw_ppx_ip2_io { - uint64_t u64; - struct cvmx_ciu2_raw_ppx_ip2_io_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_34_63:30; - uint64_t pem:2; - uint64_t reserved_18_31:14; - uint64_t pci_inta:2; - uint64_t reserved_13_15:3; - uint64_t msired:1; - uint64_t pci_msi:4; - uint64_t reserved_4_7:4; - uint64_t pci_intr:4; -#else - uint64_t pci_intr:4; - uint64_t reserved_4_7:4; - uint64_t pci_msi:4; - uint64_t msired:1; - uint64_t reserved_13_15:3; - uint64_t pci_inta:2; - uint64_t reserved_18_31:14; - uint64_t pem:2; - uint64_t reserved_34_63:30; -#endif - } s; - struct cvmx_ciu2_raw_ppx_ip2_io_s cn68xx; - struct cvmx_ciu2_raw_ppx_ip2_io_s cn68xxp1; -}; - -union cvmx_ciu2_raw_ppx_ip2_mem { - uint64_t u64; - struct cvmx_ciu2_raw_ppx_ip2_mem_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t lmc:4; -#else - uint64_t lmc:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_raw_ppx_ip2_mem_s cn68xx; - struct cvmx_ciu2_raw_ppx_ip2_mem_s cn68xxp1; -}; - -union cvmx_ciu2_raw_ppx_ip2_mio { - uint64_t u64; - struct cvmx_ciu2_raw_ppx_ip2_mio_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t rst:1; - uint64_t reserved_49_62:14; - uint64_t ptp:1; - uint64_t reserved_45_47:3; - uint64_t usb_hci:1; - uint64_t reserved_41_43:3; - uint64_t usb_uctl:1; - uint64_t reserved_38_39:2; - uint64_t uart:2; - uint64_t reserved_34_35:2; - uint64_t twsi:2; - uint64_t reserved_19_31:13; - uint64_t bootdma:1; - uint64_t mio:1; - uint64_t nand:1; - uint64_t reserved_12_15:4; - uint64_t timer:4; - uint64_t reserved_3_7:5; - uint64_t ipd_drp:1; - uint64_t ssoiq:1; - uint64_t ipdppthr:1; -#else - uint64_t ipdppthr:1; - uint64_t ssoiq:1; - uint64_t ipd_drp:1; - uint64_t reserved_3_7:5; - uint64_t timer:4; - uint64_t reserved_12_15:4; - uint64_t nand:1; - uint64_t mio:1; - uint64_t bootdma:1; - uint64_t reserved_19_31:13; - uint64_t twsi:2; - uint64_t reserved_34_35:2; - uint64_t uart:2; - uint64_t reserved_38_39:2; - uint64_t usb_uctl:1; - uint64_t reserved_41_43:3; - uint64_t usb_hci:1; - uint64_t reserved_45_47:3; - uint64_t ptp:1; - uint64_t reserved_49_62:14; - uint64_t rst:1; -#endif - } s; - struct cvmx_ciu2_raw_ppx_ip2_mio_s cn68xx; - struct cvmx_ciu2_raw_ppx_ip2_mio_s cn68xxp1; -}; - -union cvmx_ciu2_raw_ppx_ip2_pkt { - uint64_t u64; - struct cvmx_ciu2_raw_ppx_ip2_pkt_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_54_63:10; - uint64_t ilk_drp:2; - uint64_t reserved_49_51:3; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_51:3; - uint64_t ilk_drp:2; - uint64_t reserved_54_63:10; -#endif - } s; - struct cvmx_ciu2_raw_ppx_ip2_pkt_s cn68xx; - struct cvmx_ciu2_raw_ppx_ip2_pkt_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_49_63:15; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_63:15; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_raw_ppx_ip2_rml { - uint64_t u64; - struct cvmx_ciu2_raw_ppx_ip2_rml_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_37_39:3; - uint64_t dpi_dma:1; - uint64_t reserved_34_35:2; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_35:2; - uint64_t dpi_dma:1; - uint64_t reserved_37_39:3; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } s; - struct cvmx_ciu2_raw_ppx_ip2_rml_s cn68xx; - struct cvmx_ciu2_raw_ppx_ip2_rml_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_34_39:6; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_39:6; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_raw_ppx_ip2_wdog { - uint64_t u64; - struct cvmx_ciu2_raw_ppx_ip2_wdog_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t wdog:32; -#else - uint64_t wdog:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_ciu2_raw_ppx_ip2_wdog_s cn68xx; - struct cvmx_ciu2_raw_ppx_ip2_wdog_s cn68xxp1; -}; - -union cvmx_ciu2_raw_ppx_ip2_wrkq { - uint64_t u64; - struct cvmx_ciu2_raw_ppx_ip2_wrkq_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t workq:64; -#else - uint64_t workq:64; -#endif - } s; - struct cvmx_ciu2_raw_ppx_ip2_wrkq_s cn68xx; - struct cvmx_ciu2_raw_ppx_ip2_wrkq_s cn68xxp1; -}; - -union cvmx_ciu2_raw_ppx_ip3_gpio { - uint64_t u64; - struct cvmx_ciu2_raw_ppx_ip3_gpio_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t gpio:16; -#else - uint64_t gpio:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_ciu2_raw_ppx_ip3_gpio_s cn68xx; - struct cvmx_ciu2_raw_ppx_ip3_gpio_s cn68xxp1; -}; - -union cvmx_ciu2_raw_ppx_ip3_io { - uint64_t u64; - struct cvmx_ciu2_raw_ppx_ip3_io_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_34_63:30; - uint64_t pem:2; - uint64_t reserved_18_31:14; - uint64_t pci_inta:2; - uint64_t reserved_13_15:3; - uint64_t msired:1; - uint64_t pci_msi:4; - uint64_t reserved_4_7:4; - uint64_t pci_intr:4; -#else - uint64_t pci_intr:4; - uint64_t reserved_4_7:4; - uint64_t pci_msi:4; - uint64_t msired:1; - uint64_t reserved_13_15:3; - uint64_t pci_inta:2; - uint64_t reserved_18_31:14; - uint64_t pem:2; - uint64_t reserved_34_63:30; -#endif - } s; - struct cvmx_ciu2_raw_ppx_ip3_io_s cn68xx; - struct cvmx_ciu2_raw_ppx_ip3_io_s cn68xxp1; -}; - -union cvmx_ciu2_raw_ppx_ip3_mem { - uint64_t u64; - struct cvmx_ciu2_raw_ppx_ip3_mem_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t lmc:4; -#else - uint64_t lmc:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_raw_ppx_ip3_mem_s cn68xx; - struct cvmx_ciu2_raw_ppx_ip3_mem_s cn68xxp1; -}; - -union cvmx_ciu2_raw_ppx_ip3_mio { - uint64_t u64; - struct cvmx_ciu2_raw_ppx_ip3_mio_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t rst:1; - uint64_t reserved_49_62:14; - uint64_t ptp:1; - uint64_t reserved_45_47:3; - uint64_t usb_hci:1; - uint64_t reserved_41_43:3; - uint64_t usb_uctl:1; - uint64_t reserved_38_39:2; - uint64_t uart:2; - uint64_t reserved_34_35:2; - uint64_t twsi:2; - uint64_t reserved_19_31:13; - uint64_t bootdma:1; - uint64_t mio:1; - uint64_t nand:1; - uint64_t reserved_12_15:4; - uint64_t timer:4; - uint64_t reserved_3_7:5; - uint64_t ipd_drp:1; - uint64_t ssoiq:1; - uint64_t ipdppthr:1; -#else - uint64_t ipdppthr:1; - uint64_t ssoiq:1; - uint64_t ipd_drp:1; - uint64_t reserved_3_7:5; - uint64_t timer:4; - uint64_t reserved_12_15:4; - uint64_t nand:1; - uint64_t mio:1; - uint64_t bootdma:1; - uint64_t reserved_19_31:13; - uint64_t twsi:2; - uint64_t reserved_34_35:2; - uint64_t uart:2; - uint64_t reserved_38_39:2; - uint64_t usb_uctl:1; - uint64_t reserved_41_43:3; - uint64_t usb_hci:1; - uint64_t reserved_45_47:3; - uint64_t ptp:1; - uint64_t reserved_49_62:14; - uint64_t rst:1; -#endif - } s; - struct cvmx_ciu2_raw_ppx_ip3_mio_s cn68xx; - struct cvmx_ciu2_raw_ppx_ip3_mio_s cn68xxp1; -}; - -union cvmx_ciu2_raw_ppx_ip3_pkt { - uint64_t u64; - struct cvmx_ciu2_raw_ppx_ip3_pkt_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_54_63:10; - uint64_t ilk_drp:2; - uint64_t reserved_49_51:3; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_51:3; - uint64_t ilk_drp:2; - uint64_t reserved_54_63:10; -#endif - } s; - struct cvmx_ciu2_raw_ppx_ip3_pkt_s cn68xx; - struct cvmx_ciu2_raw_ppx_ip3_pkt_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_49_63:15; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_63:15; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_raw_ppx_ip3_rml { - uint64_t u64; - struct cvmx_ciu2_raw_ppx_ip3_rml_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_37_39:3; - uint64_t dpi_dma:1; - uint64_t reserved_34_35:2; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_35:2; - uint64_t dpi_dma:1; - uint64_t reserved_37_39:3; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } s; - struct cvmx_ciu2_raw_ppx_ip3_rml_s cn68xx; - struct cvmx_ciu2_raw_ppx_ip3_rml_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_34_39:6; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_39:6; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_raw_ppx_ip3_wdog { - uint64_t u64; - struct cvmx_ciu2_raw_ppx_ip3_wdog_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t wdog:32; -#else - uint64_t wdog:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_ciu2_raw_ppx_ip3_wdog_s cn68xx; - struct cvmx_ciu2_raw_ppx_ip3_wdog_s cn68xxp1; -}; - -union cvmx_ciu2_raw_ppx_ip3_wrkq { - uint64_t u64; - struct cvmx_ciu2_raw_ppx_ip3_wrkq_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t workq:64; -#else - uint64_t workq:64; -#endif - } s; - struct cvmx_ciu2_raw_ppx_ip3_wrkq_s cn68xx; - struct cvmx_ciu2_raw_ppx_ip3_wrkq_s cn68xxp1; -}; - -union cvmx_ciu2_raw_ppx_ip4_gpio { - uint64_t u64; - struct cvmx_ciu2_raw_ppx_ip4_gpio_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t gpio:16; -#else - uint64_t gpio:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_ciu2_raw_ppx_ip4_gpio_s cn68xx; - struct cvmx_ciu2_raw_ppx_ip4_gpio_s cn68xxp1; -}; - -union cvmx_ciu2_raw_ppx_ip4_io { - uint64_t u64; - struct cvmx_ciu2_raw_ppx_ip4_io_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_34_63:30; - uint64_t pem:2; - uint64_t reserved_18_31:14; - uint64_t pci_inta:2; - uint64_t reserved_13_15:3; - uint64_t msired:1; - uint64_t pci_msi:4; - uint64_t reserved_4_7:4; - uint64_t pci_intr:4; -#else - uint64_t pci_intr:4; - uint64_t reserved_4_7:4; - uint64_t pci_msi:4; - uint64_t msired:1; - uint64_t reserved_13_15:3; - uint64_t pci_inta:2; - uint64_t reserved_18_31:14; - uint64_t pem:2; - uint64_t reserved_34_63:30; -#endif - } s; - struct cvmx_ciu2_raw_ppx_ip4_io_s cn68xx; - struct cvmx_ciu2_raw_ppx_ip4_io_s cn68xxp1; -}; - -union cvmx_ciu2_raw_ppx_ip4_mem { - uint64_t u64; - struct cvmx_ciu2_raw_ppx_ip4_mem_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t lmc:4; -#else - uint64_t lmc:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_raw_ppx_ip4_mem_s cn68xx; - struct cvmx_ciu2_raw_ppx_ip4_mem_s cn68xxp1; -}; - -union cvmx_ciu2_raw_ppx_ip4_mio { - uint64_t u64; - struct cvmx_ciu2_raw_ppx_ip4_mio_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t rst:1; - uint64_t reserved_49_62:14; - uint64_t ptp:1; - uint64_t reserved_45_47:3; - uint64_t usb_hci:1; - uint64_t reserved_41_43:3; - uint64_t usb_uctl:1; - uint64_t reserved_38_39:2; - uint64_t uart:2; - uint64_t reserved_34_35:2; - uint64_t twsi:2; - uint64_t reserved_19_31:13; - uint64_t bootdma:1; - uint64_t mio:1; - uint64_t nand:1; - uint64_t reserved_12_15:4; - uint64_t timer:4; - uint64_t reserved_3_7:5; - uint64_t ipd_drp:1; - uint64_t ssoiq:1; - uint64_t ipdppthr:1; -#else - uint64_t ipdppthr:1; - uint64_t ssoiq:1; - uint64_t ipd_drp:1; - uint64_t reserved_3_7:5; - uint64_t timer:4; - uint64_t reserved_12_15:4; - uint64_t nand:1; - uint64_t mio:1; - uint64_t bootdma:1; - uint64_t reserved_19_31:13; - uint64_t twsi:2; - uint64_t reserved_34_35:2; - uint64_t uart:2; - uint64_t reserved_38_39:2; - uint64_t usb_uctl:1; - uint64_t reserved_41_43:3; - uint64_t usb_hci:1; - uint64_t reserved_45_47:3; - uint64_t ptp:1; - uint64_t reserved_49_62:14; - uint64_t rst:1; -#endif - } s; - struct cvmx_ciu2_raw_ppx_ip4_mio_s cn68xx; - struct cvmx_ciu2_raw_ppx_ip4_mio_s cn68xxp1; -}; - -union cvmx_ciu2_raw_ppx_ip4_pkt { - uint64_t u64; - struct cvmx_ciu2_raw_ppx_ip4_pkt_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_54_63:10; - uint64_t ilk_drp:2; - uint64_t reserved_49_51:3; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_51:3; - uint64_t ilk_drp:2; - uint64_t reserved_54_63:10; -#endif - } s; - struct cvmx_ciu2_raw_ppx_ip4_pkt_s cn68xx; - struct cvmx_ciu2_raw_ppx_ip4_pkt_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_49_63:15; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_63:15; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_raw_ppx_ip4_rml { - uint64_t u64; - struct cvmx_ciu2_raw_ppx_ip4_rml_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_37_39:3; - uint64_t dpi_dma:1; - uint64_t reserved_34_35:2; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_35:2; - uint64_t dpi_dma:1; - uint64_t reserved_37_39:3; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } s; - struct cvmx_ciu2_raw_ppx_ip4_rml_s cn68xx; - struct cvmx_ciu2_raw_ppx_ip4_rml_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_34_39:6; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_39:6; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_raw_ppx_ip4_wdog { - uint64_t u64; - struct cvmx_ciu2_raw_ppx_ip4_wdog_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t wdog:32; -#else - uint64_t wdog:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_ciu2_raw_ppx_ip4_wdog_s cn68xx; - struct cvmx_ciu2_raw_ppx_ip4_wdog_s cn68xxp1; -}; - -union cvmx_ciu2_raw_ppx_ip4_wrkq { - uint64_t u64; - struct cvmx_ciu2_raw_ppx_ip4_wrkq_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t workq:64; -#else - uint64_t workq:64; -#endif - } s; - struct cvmx_ciu2_raw_ppx_ip4_wrkq_s cn68xx; - struct cvmx_ciu2_raw_ppx_ip4_wrkq_s cn68xxp1; -}; - -union cvmx_ciu2_src_iox_int_gpio { - uint64_t u64; - struct cvmx_ciu2_src_iox_int_gpio_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t gpio:16; -#else - uint64_t gpio:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_ciu2_src_iox_int_gpio_s cn68xx; - struct cvmx_ciu2_src_iox_int_gpio_s cn68xxp1; -}; - -union cvmx_ciu2_src_iox_int_io { - uint64_t u64; - struct cvmx_ciu2_src_iox_int_io_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_34_63:30; - uint64_t pem:2; - uint64_t reserved_18_31:14; - uint64_t pci_inta:2; - uint64_t reserved_13_15:3; - uint64_t msired:1; - uint64_t pci_msi:4; - uint64_t reserved_4_7:4; - uint64_t pci_intr:4; -#else - uint64_t pci_intr:4; - uint64_t reserved_4_7:4; - uint64_t pci_msi:4; - uint64_t msired:1; - uint64_t reserved_13_15:3; - uint64_t pci_inta:2; - uint64_t reserved_18_31:14; - uint64_t pem:2; - uint64_t reserved_34_63:30; -#endif - } s; - struct cvmx_ciu2_src_iox_int_io_s cn68xx; - struct cvmx_ciu2_src_iox_int_io_s cn68xxp1; -}; - -union cvmx_ciu2_src_iox_int_mbox { - uint64_t u64; - struct cvmx_ciu2_src_iox_int_mbox_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t mbox:4; -#else - uint64_t mbox:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_src_iox_int_mbox_s cn68xx; - struct cvmx_ciu2_src_iox_int_mbox_s cn68xxp1; -}; - -union cvmx_ciu2_src_iox_int_mem { - uint64_t u64; - struct cvmx_ciu2_src_iox_int_mem_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t lmc:4; -#else - uint64_t lmc:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_src_iox_int_mem_s cn68xx; - struct cvmx_ciu2_src_iox_int_mem_s cn68xxp1; -}; - -union cvmx_ciu2_src_iox_int_mio { - uint64_t u64; - struct cvmx_ciu2_src_iox_int_mio_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t rst:1; - uint64_t reserved_49_62:14; - uint64_t ptp:1; - uint64_t reserved_45_47:3; - uint64_t usb_hci:1; - uint64_t reserved_41_43:3; - uint64_t usb_uctl:1; - uint64_t reserved_38_39:2; - uint64_t uart:2; - uint64_t reserved_34_35:2; - uint64_t twsi:2; - uint64_t reserved_19_31:13; - uint64_t bootdma:1; - uint64_t mio:1; - uint64_t nand:1; - uint64_t reserved_12_15:4; - uint64_t timer:4; - uint64_t reserved_3_7:5; - uint64_t ipd_drp:1; - uint64_t ssoiq:1; - uint64_t ipdppthr:1; -#else - uint64_t ipdppthr:1; - uint64_t ssoiq:1; - uint64_t ipd_drp:1; - uint64_t reserved_3_7:5; - uint64_t timer:4; - uint64_t reserved_12_15:4; - uint64_t nand:1; - uint64_t mio:1; - uint64_t bootdma:1; - uint64_t reserved_19_31:13; - uint64_t twsi:2; - uint64_t reserved_34_35:2; - uint64_t uart:2; - uint64_t reserved_38_39:2; - uint64_t usb_uctl:1; - uint64_t reserved_41_43:3; - uint64_t usb_hci:1; - uint64_t reserved_45_47:3; - uint64_t ptp:1; - uint64_t reserved_49_62:14; - uint64_t rst:1; -#endif - } s; - struct cvmx_ciu2_src_iox_int_mio_s cn68xx; - struct cvmx_ciu2_src_iox_int_mio_s cn68xxp1; -}; - -union cvmx_ciu2_src_iox_int_pkt { - uint64_t u64; - struct cvmx_ciu2_src_iox_int_pkt_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_54_63:10; - uint64_t ilk_drp:2; - uint64_t reserved_49_51:3; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_51:3; - uint64_t ilk_drp:2; - uint64_t reserved_54_63:10; -#endif - } s; - struct cvmx_ciu2_src_iox_int_pkt_s cn68xx; - struct cvmx_ciu2_src_iox_int_pkt_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_49_63:15; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_63:15; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_src_iox_int_rml { - uint64_t u64; - struct cvmx_ciu2_src_iox_int_rml_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_37_39:3; - uint64_t dpi_dma:1; - uint64_t reserved_34_35:2; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_35:2; - uint64_t dpi_dma:1; - uint64_t reserved_37_39:3; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } s; - struct cvmx_ciu2_src_iox_int_rml_s cn68xx; - struct cvmx_ciu2_src_iox_int_rml_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_34_39:6; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_39:6; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_src_iox_int_wdog { - uint64_t u64; - struct cvmx_ciu2_src_iox_int_wdog_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t wdog:32; -#else - uint64_t wdog:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_ciu2_src_iox_int_wdog_s cn68xx; - struct cvmx_ciu2_src_iox_int_wdog_s cn68xxp1; -}; - -union cvmx_ciu2_src_iox_int_wrkq { - uint64_t u64; - struct cvmx_ciu2_src_iox_int_wrkq_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t workq:64; -#else - uint64_t workq:64; -#endif - } s; - struct cvmx_ciu2_src_iox_int_wrkq_s cn68xx; - struct cvmx_ciu2_src_iox_int_wrkq_s cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip2_gpio { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip2_gpio_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t gpio:16; -#else - uint64_t gpio:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip2_gpio_s cn68xx; - struct cvmx_ciu2_src_ppx_ip2_gpio_s cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip2_io { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip2_io_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_34_63:30; - uint64_t pem:2; - uint64_t reserved_18_31:14; - uint64_t pci_inta:2; - uint64_t reserved_13_15:3; - uint64_t msired:1; - uint64_t pci_msi:4; - uint64_t reserved_4_7:4; - uint64_t pci_intr:4; -#else - uint64_t pci_intr:4; - uint64_t reserved_4_7:4; - uint64_t pci_msi:4; - uint64_t msired:1; - uint64_t reserved_13_15:3; - uint64_t pci_inta:2; - uint64_t reserved_18_31:14; - uint64_t pem:2; - uint64_t reserved_34_63:30; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip2_io_s cn68xx; - struct cvmx_ciu2_src_ppx_ip2_io_s cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip2_mbox { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip2_mbox_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t mbox:4; -#else - uint64_t mbox:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip2_mbox_s cn68xx; - struct cvmx_ciu2_src_ppx_ip2_mbox_s cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip2_mem { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip2_mem_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t lmc:4; -#else - uint64_t lmc:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip2_mem_s cn68xx; - struct cvmx_ciu2_src_ppx_ip2_mem_s cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip2_mio { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip2_mio_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t rst:1; - uint64_t reserved_49_62:14; - uint64_t ptp:1; - uint64_t reserved_45_47:3; - uint64_t usb_hci:1; - uint64_t reserved_41_43:3; - uint64_t usb_uctl:1; - uint64_t reserved_38_39:2; - uint64_t uart:2; - uint64_t reserved_34_35:2; - uint64_t twsi:2; - uint64_t reserved_19_31:13; - uint64_t bootdma:1; - uint64_t mio:1; - uint64_t nand:1; - uint64_t reserved_12_15:4; - uint64_t timer:4; - uint64_t reserved_3_7:5; - uint64_t ipd_drp:1; - uint64_t ssoiq:1; - uint64_t ipdppthr:1; -#else - uint64_t ipdppthr:1; - uint64_t ssoiq:1; - uint64_t ipd_drp:1; - uint64_t reserved_3_7:5; - uint64_t timer:4; - uint64_t reserved_12_15:4; - uint64_t nand:1; - uint64_t mio:1; - uint64_t bootdma:1; - uint64_t reserved_19_31:13; - uint64_t twsi:2; - uint64_t reserved_34_35:2; - uint64_t uart:2; - uint64_t reserved_38_39:2; - uint64_t usb_uctl:1; - uint64_t reserved_41_43:3; - uint64_t usb_hci:1; - uint64_t reserved_45_47:3; - uint64_t ptp:1; - uint64_t reserved_49_62:14; - uint64_t rst:1; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip2_mio_s cn68xx; - struct cvmx_ciu2_src_ppx_ip2_mio_s cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip2_pkt { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip2_pkt_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_54_63:10; - uint64_t ilk_drp:2; - uint64_t reserved_49_51:3; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_51:3; - uint64_t ilk_drp:2; - uint64_t reserved_54_63:10; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip2_pkt_s cn68xx; - struct cvmx_ciu2_src_ppx_ip2_pkt_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_49_63:15; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_63:15; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip2_rml { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip2_rml_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_37_39:3; - uint64_t dpi_dma:1; - uint64_t reserved_34_35:2; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_35:2; - uint64_t dpi_dma:1; - uint64_t reserved_37_39:3; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip2_rml_s cn68xx; - struct cvmx_ciu2_src_ppx_ip2_rml_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_34_39:6; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_39:6; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip2_wdog { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip2_wdog_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t wdog:32; -#else - uint64_t wdog:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip2_wdog_s cn68xx; - struct cvmx_ciu2_src_ppx_ip2_wdog_s cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip2_wrkq { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip2_wrkq_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t workq:64; -#else - uint64_t workq:64; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip2_wrkq_s cn68xx; - struct cvmx_ciu2_src_ppx_ip2_wrkq_s cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip3_gpio { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip3_gpio_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t gpio:16; -#else - uint64_t gpio:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip3_gpio_s cn68xx; - struct cvmx_ciu2_src_ppx_ip3_gpio_s cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip3_io { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip3_io_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_34_63:30; - uint64_t pem:2; - uint64_t reserved_18_31:14; - uint64_t pci_inta:2; - uint64_t reserved_13_15:3; - uint64_t msired:1; - uint64_t pci_msi:4; - uint64_t reserved_4_7:4; - uint64_t pci_intr:4; -#else - uint64_t pci_intr:4; - uint64_t reserved_4_7:4; - uint64_t pci_msi:4; - uint64_t msired:1; - uint64_t reserved_13_15:3; - uint64_t pci_inta:2; - uint64_t reserved_18_31:14; - uint64_t pem:2; - uint64_t reserved_34_63:30; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip3_io_s cn68xx; - struct cvmx_ciu2_src_ppx_ip3_io_s cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip3_mbox { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip3_mbox_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t mbox:4; -#else - uint64_t mbox:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip3_mbox_s cn68xx; - struct cvmx_ciu2_src_ppx_ip3_mbox_s cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip3_mem { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip3_mem_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t lmc:4; -#else - uint64_t lmc:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip3_mem_s cn68xx; - struct cvmx_ciu2_src_ppx_ip3_mem_s cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip3_mio { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip3_mio_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t rst:1; - uint64_t reserved_49_62:14; - uint64_t ptp:1; - uint64_t reserved_45_47:3; - uint64_t usb_hci:1; - uint64_t reserved_41_43:3; - uint64_t usb_uctl:1; - uint64_t reserved_38_39:2; - uint64_t uart:2; - uint64_t reserved_34_35:2; - uint64_t twsi:2; - uint64_t reserved_19_31:13; - uint64_t bootdma:1; - uint64_t mio:1; - uint64_t nand:1; - uint64_t reserved_12_15:4; - uint64_t timer:4; - uint64_t reserved_3_7:5; - uint64_t ipd_drp:1; - uint64_t ssoiq:1; - uint64_t ipdppthr:1; -#else - uint64_t ipdppthr:1; - uint64_t ssoiq:1; - uint64_t ipd_drp:1; - uint64_t reserved_3_7:5; - uint64_t timer:4; - uint64_t reserved_12_15:4; - uint64_t nand:1; - uint64_t mio:1; - uint64_t bootdma:1; - uint64_t reserved_19_31:13; - uint64_t twsi:2; - uint64_t reserved_34_35:2; - uint64_t uart:2; - uint64_t reserved_38_39:2; - uint64_t usb_uctl:1; - uint64_t reserved_41_43:3; - uint64_t usb_hci:1; - uint64_t reserved_45_47:3; - uint64_t ptp:1; - uint64_t reserved_49_62:14; - uint64_t rst:1; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip3_mio_s cn68xx; - struct cvmx_ciu2_src_ppx_ip3_mio_s cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip3_pkt { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip3_pkt_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_54_63:10; - uint64_t ilk_drp:2; - uint64_t reserved_49_51:3; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_51:3; - uint64_t ilk_drp:2; - uint64_t reserved_54_63:10; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip3_pkt_s cn68xx; - struct cvmx_ciu2_src_ppx_ip3_pkt_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_49_63:15; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_63:15; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip3_rml { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip3_rml_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_37_39:3; - uint64_t dpi_dma:1; - uint64_t reserved_34_35:2; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_35:2; - uint64_t dpi_dma:1; - uint64_t reserved_37_39:3; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip3_rml_s cn68xx; - struct cvmx_ciu2_src_ppx_ip3_rml_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_34_39:6; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_39:6; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip3_wdog { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip3_wdog_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t wdog:32; -#else - uint64_t wdog:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip3_wdog_s cn68xx; - struct cvmx_ciu2_src_ppx_ip3_wdog_s cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip3_wrkq { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip3_wrkq_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t workq:64; -#else - uint64_t workq:64; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip3_wrkq_s cn68xx; - struct cvmx_ciu2_src_ppx_ip3_wrkq_s cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip4_gpio { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip4_gpio_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t gpio:16; -#else - uint64_t gpio:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip4_gpio_s cn68xx; - struct cvmx_ciu2_src_ppx_ip4_gpio_s cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip4_io { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip4_io_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_34_63:30; - uint64_t pem:2; - uint64_t reserved_18_31:14; - uint64_t pci_inta:2; - uint64_t reserved_13_15:3; - uint64_t msired:1; - uint64_t pci_msi:4; - uint64_t reserved_4_7:4; - uint64_t pci_intr:4; -#else - uint64_t pci_intr:4; - uint64_t reserved_4_7:4; - uint64_t pci_msi:4; - uint64_t msired:1; - uint64_t reserved_13_15:3; - uint64_t pci_inta:2; - uint64_t reserved_18_31:14; - uint64_t pem:2; - uint64_t reserved_34_63:30; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip4_io_s cn68xx; - struct cvmx_ciu2_src_ppx_ip4_io_s cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip4_mbox { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip4_mbox_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t mbox:4; -#else - uint64_t mbox:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip4_mbox_s cn68xx; - struct cvmx_ciu2_src_ppx_ip4_mbox_s cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip4_mem { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip4_mem_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t lmc:4; -#else - uint64_t lmc:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip4_mem_s cn68xx; - struct cvmx_ciu2_src_ppx_ip4_mem_s cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip4_mio { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip4_mio_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t rst:1; - uint64_t reserved_49_62:14; - uint64_t ptp:1; - uint64_t reserved_45_47:3; - uint64_t usb_hci:1; - uint64_t reserved_41_43:3; - uint64_t usb_uctl:1; - uint64_t reserved_38_39:2; - uint64_t uart:2; - uint64_t reserved_34_35:2; - uint64_t twsi:2; - uint64_t reserved_19_31:13; - uint64_t bootdma:1; - uint64_t mio:1; - uint64_t nand:1; - uint64_t reserved_12_15:4; - uint64_t timer:4; - uint64_t reserved_3_7:5; - uint64_t ipd_drp:1; - uint64_t ssoiq:1; - uint64_t ipdppthr:1; -#else - uint64_t ipdppthr:1; - uint64_t ssoiq:1; - uint64_t ipd_drp:1; - uint64_t reserved_3_7:5; - uint64_t timer:4; - uint64_t reserved_12_15:4; - uint64_t nand:1; - uint64_t mio:1; - uint64_t bootdma:1; - uint64_t reserved_19_31:13; - uint64_t twsi:2; - uint64_t reserved_34_35:2; - uint64_t uart:2; - uint64_t reserved_38_39:2; - uint64_t usb_uctl:1; - uint64_t reserved_41_43:3; - uint64_t usb_hci:1; - uint64_t reserved_45_47:3; - uint64_t ptp:1; - uint64_t reserved_49_62:14; - uint64_t rst:1; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip4_mio_s cn68xx; - struct cvmx_ciu2_src_ppx_ip4_mio_s cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip4_pkt { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip4_pkt_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_54_63:10; - uint64_t ilk_drp:2; - uint64_t reserved_49_51:3; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_51:3; - uint64_t ilk_drp:2; - uint64_t reserved_54_63:10; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip4_pkt_s cn68xx; - struct cvmx_ciu2_src_ppx_ip4_pkt_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_49_63:15; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_63:15; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip4_rml { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip4_rml_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_37_39:3; - uint64_t dpi_dma:1; - uint64_t reserved_34_35:2; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_35:2; - uint64_t dpi_dma:1; - uint64_t reserved_37_39:3; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip4_rml_s cn68xx; - struct cvmx_ciu2_src_ppx_ip4_rml_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_34_39:6; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_39:6; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip4_wdog { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip4_wdog_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t wdog:32; -#else - uint64_t wdog:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip4_wdog_s cn68xx; - struct cvmx_ciu2_src_ppx_ip4_wdog_s cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip4_wrkq { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip4_wrkq_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t workq:64; -#else - uint64_t workq:64; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip4_wrkq_s cn68xx; - struct cvmx_ciu2_src_ppx_ip4_wrkq_s cn68xxp1; -}; - -union cvmx_ciu2_sum_iox_int { - uint64_t u64; - struct cvmx_ciu2_sum_iox_int_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t mbox:4; - uint64_t reserved_8_59:52; - uint64_t gpio:1; - uint64_t pkt:1; - uint64_t mem:1; - uint64_t io:1; - uint64_t mio:1; - uint64_t rml:1; - uint64_t wdog:1; - uint64_t workq:1; -#else - uint64_t workq:1; - uint64_t wdog:1; - uint64_t rml:1; - uint64_t mio:1; - uint64_t io:1; - uint64_t mem:1; - uint64_t pkt:1; - uint64_t gpio:1; - uint64_t reserved_8_59:52; - uint64_t mbox:4; -#endif - } s; - struct cvmx_ciu2_sum_iox_int_s cn68xx; - struct cvmx_ciu2_sum_iox_int_s cn68xxp1; -}; - -union cvmx_ciu2_sum_ppx_ip2 { - uint64_t u64; - struct cvmx_ciu2_sum_ppx_ip2_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t mbox:4; - uint64_t reserved_8_59:52; - uint64_t gpio:1; - uint64_t pkt:1; - uint64_t mem:1; - uint64_t io:1; - uint64_t mio:1; - uint64_t rml:1; - uint64_t wdog:1; - uint64_t workq:1; -#else - uint64_t workq:1; - uint64_t wdog:1; - uint64_t rml:1; - uint64_t mio:1; - uint64_t io:1; - uint64_t mem:1; - uint64_t pkt:1; - uint64_t gpio:1; - uint64_t reserved_8_59:52; - uint64_t mbox:4; -#endif - } s; - struct cvmx_ciu2_sum_ppx_ip2_s cn68xx; - struct cvmx_ciu2_sum_ppx_ip2_s cn68xxp1; -}; - -union cvmx_ciu2_sum_ppx_ip3 { - uint64_t u64; - struct cvmx_ciu2_sum_ppx_ip3_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t mbox:4; - uint64_t reserved_8_59:52; - uint64_t gpio:1; - uint64_t pkt:1; - uint64_t mem:1; - uint64_t io:1; - uint64_t mio:1; - uint64_t rml:1; - uint64_t wdog:1; - uint64_t workq:1; -#else - uint64_t workq:1; - uint64_t wdog:1; - uint64_t rml:1; - uint64_t mio:1; - uint64_t io:1; - uint64_t mem:1; - uint64_t pkt:1; - uint64_t gpio:1; - uint64_t reserved_8_59:52; - uint64_t mbox:4; -#endif - } s; - struct cvmx_ciu2_sum_ppx_ip3_s cn68xx; - struct cvmx_ciu2_sum_ppx_ip3_s cn68xxp1; -}; - -union cvmx_ciu2_sum_ppx_ip4 { - uint64_t u64; - struct cvmx_ciu2_sum_ppx_ip4_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t mbox:4; - uint64_t reserved_8_59:52; - uint64_t gpio:1; - uint64_t pkt:1; - uint64_t mem:1; - uint64_t io:1; - uint64_t mio:1; - uint64_t rml:1; - uint64_t wdog:1; - uint64_t workq:1; -#else - uint64_t workq:1; - uint64_t wdog:1; - uint64_t rml:1; - uint64_t mio:1; - uint64_t io:1; - uint64_t mem:1; - uint64_t pkt:1; - uint64_t gpio:1; - uint64_t reserved_8_59:52; - uint64_t mbox:4; -#endif - } s; - struct cvmx_ciu2_sum_ppx_ip4_s cn68xx; - struct cvmx_ciu2_sum_ppx_ip4_s cn68xxp1; -}; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-dbg-defs.h b/arch/mips/include/asm/octeon/cvmx-dbg-defs.h index 40799cdae695..828d07d87f03 100644 --- a/arch/mips/include/asm/octeon/cvmx-dbg-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-dbg-defs.h @@ -62,7 +62,6 @@ union cvmx_dbg_data { uint64_t reserved_31_63:33; #endif } cn30xx; - struct cvmx_dbg_data_cn30xx cn31xx; struct cvmx_dbg_data_cn38xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_29_63:35; @@ -82,8 +81,6 @@ union cvmx_dbg_data { uint64_t reserved_29_63:35; #endif } cn38xx; - struct cvmx_dbg_data_cn38xx cn38xxp2; - struct cvmx_dbg_data_cn30xx cn50xx; struct cvmx_dbg_data_cn58xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_29_63:35; @@ -99,7 +96,6 @@ union cvmx_dbg_data { uint64_t reserved_29_63:35; #endif } cn58xx; - struct cvmx_dbg_data_cn58xx cn58xxp1; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-dpi-defs.h b/arch/mips/include/asm/octeon/cvmx-dpi-defs.h index dd5b0428de35..e8613e1f6930 100644 --- a/arch/mips/include/asm/octeon/cvmx-dpi-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-dpi-defs.h @@ -89,7 +89,6 @@ union cvmx_dpi_bist_status { uint64_t reserved_47_63:17; #endif } s; - struct cvmx_dpi_bist_status_s cn61xx; struct cvmx_dpi_bist_status_cn63xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_45_63:19; @@ -108,10 +107,6 @@ union cvmx_dpi_bist_status { uint64_t reserved_37_63:27; #endif } cn63xxp1; - struct cvmx_dpi_bist_status_s cn66xx; - struct cvmx_dpi_bist_status_cn63xx cn68xx; - struct cvmx_dpi_bist_status_cn63xx cn68xxp1; - struct cvmx_dpi_bist_status_s cnf71xx; }; union cvmx_dpi_ctl { @@ -136,12 +131,6 @@ union cvmx_dpi_ctl { uint64_t reserved_1_63:63; #endif } cn61xx; - struct cvmx_dpi_ctl_s cn63xx; - struct cvmx_dpi_ctl_s cn63xxp1; - struct cvmx_dpi_ctl_s cn66xx; - struct cvmx_dpi_ctl_s cn68xx; - struct cvmx_dpi_ctl_s cn68xxp1; - struct cvmx_dpi_ctl_cn61xx cnf71xx; }; union cvmx_dpi_dmax_counts { @@ -157,13 +146,6 @@ union cvmx_dpi_dmax_counts { uint64_t reserved_39_63:25; #endif } s; - struct cvmx_dpi_dmax_counts_s cn61xx; - struct cvmx_dpi_dmax_counts_s cn63xx; - struct cvmx_dpi_dmax_counts_s cn63xxp1; - struct cvmx_dpi_dmax_counts_s cn66xx; - struct cvmx_dpi_dmax_counts_s cn68xx; - struct cvmx_dpi_dmax_counts_s cn68xxp1; - struct cvmx_dpi_dmax_counts_s cnf71xx; }; union cvmx_dpi_dmax_dbell { @@ -177,13 +159,6 @@ union cvmx_dpi_dmax_dbell { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_dpi_dmax_dbell_s cn61xx; - struct cvmx_dpi_dmax_dbell_s cn63xx; - struct cvmx_dpi_dmax_dbell_s cn63xxp1; - struct cvmx_dpi_dmax_dbell_s cn66xx; - struct cvmx_dpi_dmax_dbell_s cn68xx; - struct cvmx_dpi_dmax_dbell_s cn68xxp1; - struct cvmx_dpi_dmax_dbell_s cnf71xx; }; union cvmx_dpi_dmax_err_rsp_status { @@ -197,11 +172,6 @@ union cvmx_dpi_dmax_err_rsp_status { uint64_t reserved_6_63:58; #endif } s; - struct cvmx_dpi_dmax_err_rsp_status_s cn61xx; - struct cvmx_dpi_dmax_err_rsp_status_s cn66xx; - struct cvmx_dpi_dmax_err_rsp_status_s cn68xx; - struct cvmx_dpi_dmax_err_rsp_status_s cn68xxp1; - struct cvmx_dpi_dmax_err_rsp_status_s cnf71xx; }; union cvmx_dpi_dmax_ibuff_saddr { @@ -242,12 +212,6 @@ union cvmx_dpi_dmax_ibuff_saddr { uint64_t reserved_62_63:2; #endif } cn61xx; - struct cvmx_dpi_dmax_ibuff_saddr_cn61xx cn63xx; - struct cvmx_dpi_dmax_ibuff_saddr_cn61xx cn63xxp1; - struct cvmx_dpi_dmax_ibuff_saddr_cn61xx cn66xx; - struct cvmx_dpi_dmax_ibuff_saddr_s cn68xx; - struct cvmx_dpi_dmax_ibuff_saddr_s cn68xxp1; - struct cvmx_dpi_dmax_ibuff_saddr_cn61xx cnf71xx; }; union cvmx_dpi_dmax_iflight { @@ -261,11 +225,6 @@ union cvmx_dpi_dmax_iflight { uint64_t reserved_3_63:61; #endif } s; - struct cvmx_dpi_dmax_iflight_s cn61xx; - struct cvmx_dpi_dmax_iflight_s cn66xx; - struct cvmx_dpi_dmax_iflight_s cn68xx; - struct cvmx_dpi_dmax_iflight_s cn68xxp1; - struct cvmx_dpi_dmax_iflight_s cnf71xx; }; union cvmx_dpi_dmax_naddr { @@ -288,12 +247,6 @@ union cvmx_dpi_dmax_naddr { uint64_t reserved_36_63:28; #endif } cn61xx; - struct cvmx_dpi_dmax_naddr_cn61xx cn63xx; - struct cvmx_dpi_dmax_naddr_cn61xx cn63xxp1; - struct cvmx_dpi_dmax_naddr_cn61xx cn66xx; - struct cvmx_dpi_dmax_naddr_s cn68xx; - struct cvmx_dpi_dmax_naddr_s cn68xxp1; - struct cvmx_dpi_dmax_naddr_cn61xx cnf71xx; }; union cvmx_dpi_dmax_reqbnk0 { @@ -305,13 +258,6 @@ union cvmx_dpi_dmax_reqbnk0 { uint64_t state:64; #endif } s; - struct cvmx_dpi_dmax_reqbnk0_s cn61xx; - struct cvmx_dpi_dmax_reqbnk0_s cn63xx; - struct cvmx_dpi_dmax_reqbnk0_s cn63xxp1; - struct cvmx_dpi_dmax_reqbnk0_s cn66xx; - struct cvmx_dpi_dmax_reqbnk0_s cn68xx; - struct cvmx_dpi_dmax_reqbnk0_s cn68xxp1; - struct cvmx_dpi_dmax_reqbnk0_s cnf71xx; }; union cvmx_dpi_dmax_reqbnk1 { @@ -323,13 +269,6 @@ union cvmx_dpi_dmax_reqbnk1 { uint64_t state:64; #endif } s; - struct cvmx_dpi_dmax_reqbnk1_s cn61xx; - struct cvmx_dpi_dmax_reqbnk1_s cn63xx; - struct cvmx_dpi_dmax_reqbnk1_s cn63xxp1; - struct cvmx_dpi_dmax_reqbnk1_s cn66xx; - struct cvmx_dpi_dmax_reqbnk1_s cn68xx; - struct cvmx_dpi_dmax_reqbnk1_s cn68xxp1; - struct cvmx_dpi_dmax_reqbnk1_s cnf71xx; }; union cvmx_dpi_dma_control { @@ -379,7 +318,6 @@ union cvmx_dpi_dma_control { uint64_t reserved_62_63:2; #endif } s; - struct cvmx_dpi_dma_control_s cn61xx; struct cvmx_dpi_dma_control_cn63xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_61_63:3; @@ -462,10 +400,6 @@ union cvmx_dpi_dma_control { uint64_t reserved_59_63:5; #endif } cn63xxp1; - struct cvmx_dpi_dma_control_cn63xx cn66xx; - struct cvmx_dpi_dma_control_s cn68xx; - struct cvmx_dpi_dma_control_cn63xx cn68xxp1; - struct cvmx_dpi_dma_control_s cnf71xx; }; union cvmx_dpi_dma_engx_en { @@ -479,13 +413,6 @@ union cvmx_dpi_dma_engx_en { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_dpi_dma_engx_en_s cn61xx; - struct cvmx_dpi_dma_engx_en_s cn63xx; - struct cvmx_dpi_dma_engx_en_s cn63xxp1; - struct cvmx_dpi_dma_engx_en_s cn66xx; - struct cvmx_dpi_dma_engx_en_s cn68xx; - struct cvmx_dpi_dma_engx_en_s cn68xxp1; - struct cvmx_dpi_dma_engx_en_s cnf71xx; }; union cvmx_dpi_dma_ppx_cnt { @@ -499,9 +426,6 @@ union cvmx_dpi_dma_ppx_cnt { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_dpi_dma_ppx_cnt_s cn61xx; - struct cvmx_dpi_dma_ppx_cnt_s cn68xx; - struct cvmx_dpi_dma_ppx_cnt_s cnf71xx; }; union cvmx_dpi_engx_buf { @@ -521,7 +445,6 @@ union cvmx_dpi_engx_buf { uint64_t reserved_37_63:27; #endif } s; - struct cvmx_dpi_engx_buf_s cn61xx; struct cvmx_dpi_engx_buf_cn63xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_8_63:56; @@ -533,11 +456,6 @@ union cvmx_dpi_engx_buf { uint64_t reserved_8_63:56; #endif } cn63xx; - struct cvmx_dpi_engx_buf_cn63xx cn63xxp1; - struct cvmx_dpi_engx_buf_s cn66xx; - struct cvmx_dpi_engx_buf_s cn68xx; - struct cvmx_dpi_engx_buf_s cn68xxp1; - struct cvmx_dpi_engx_buf_s cnf71xx; }; union cvmx_dpi_info_reg { @@ -557,8 +475,6 @@ union cvmx_dpi_info_reg { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_dpi_info_reg_s cn61xx; - struct cvmx_dpi_info_reg_s cn63xx; struct cvmx_dpi_info_reg_cn63xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_2_63:62; @@ -570,10 +486,6 @@ union cvmx_dpi_info_reg { uint64_t reserved_2_63:62; #endif } cn63xxp1; - struct cvmx_dpi_info_reg_s cn66xx; - struct cvmx_dpi_info_reg_s cn68xx; - struct cvmx_dpi_info_reg_s cn68xxp1; - struct cvmx_dpi_info_reg_s cnf71xx; }; union cvmx_dpi_int_en { @@ -617,7 +529,6 @@ union cvmx_dpi_int_en { uint64_t reserved_28_63:36; #endif } s; - struct cvmx_dpi_int_en_s cn61xx; struct cvmx_dpi_int_en_cn63xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_26_63:38; @@ -653,11 +564,6 @@ union cvmx_dpi_int_en { uint64_t reserved_26_63:38; #endif } cn63xx; - struct cvmx_dpi_int_en_cn63xx cn63xxp1; - struct cvmx_dpi_int_en_s cn66xx; - struct cvmx_dpi_int_en_cn63xx cn68xx; - struct cvmx_dpi_int_en_cn63xx cn68xxp1; - struct cvmx_dpi_int_en_s cnf71xx; }; union cvmx_dpi_int_reg { @@ -701,7 +607,6 @@ union cvmx_dpi_int_reg { uint64_t reserved_28_63:36; #endif } s; - struct cvmx_dpi_int_reg_s cn61xx; struct cvmx_dpi_int_reg_cn63xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_26_63:38; @@ -737,11 +642,6 @@ union cvmx_dpi_int_reg { uint64_t reserved_26_63:38; #endif } cn63xx; - struct cvmx_dpi_int_reg_cn63xx cn63xxp1; - struct cvmx_dpi_int_reg_s cn66xx; - struct cvmx_dpi_int_reg_cn63xx cn68xx; - struct cvmx_dpi_int_reg_cn63xx cn68xxp1; - struct cvmx_dpi_int_reg_s cnf71xx; }; union cvmx_dpi_ncbx_cfg { @@ -755,10 +655,6 @@ union cvmx_dpi_ncbx_cfg { uint64_t reserved_6_63:58; #endif } s; - struct cvmx_dpi_ncbx_cfg_s cn61xx; - struct cvmx_dpi_ncbx_cfg_s cn66xx; - struct cvmx_dpi_ncbx_cfg_s cn68xx; - struct cvmx_dpi_ncbx_cfg_s cnf71xx; }; union cvmx_dpi_pint_info { @@ -776,13 +672,6 @@ union cvmx_dpi_pint_info { uint64_t reserved_14_63:50; #endif } s; - struct cvmx_dpi_pint_info_s cn61xx; - struct cvmx_dpi_pint_info_s cn63xx; - struct cvmx_dpi_pint_info_s cn63xxp1; - struct cvmx_dpi_pint_info_s cn66xx; - struct cvmx_dpi_pint_info_s cn68xx; - struct cvmx_dpi_pint_info_s cn68xxp1; - struct cvmx_dpi_pint_info_s cnf71xx; }; union cvmx_dpi_pkt_err_rsp { @@ -796,13 +685,6 @@ union cvmx_dpi_pkt_err_rsp { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_dpi_pkt_err_rsp_s cn61xx; - struct cvmx_dpi_pkt_err_rsp_s cn63xx; - struct cvmx_dpi_pkt_err_rsp_s cn63xxp1; - struct cvmx_dpi_pkt_err_rsp_s cn66xx; - struct cvmx_dpi_pkt_err_rsp_s cn68xx; - struct cvmx_dpi_pkt_err_rsp_s cn68xxp1; - struct cvmx_dpi_pkt_err_rsp_s cnf71xx; }; union cvmx_dpi_req_err_rsp { @@ -816,13 +698,6 @@ union cvmx_dpi_req_err_rsp { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_dpi_req_err_rsp_s cn61xx; - struct cvmx_dpi_req_err_rsp_s cn63xx; - struct cvmx_dpi_req_err_rsp_s cn63xxp1; - struct cvmx_dpi_req_err_rsp_s cn66xx; - struct cvmx_dpi_req_err_rsp_s cn68xx; - struct cvmx_dpi_req_err_rsp_s cn68xxp1; - struct cvmx_dpi_req_err_rsp_s cnf71xx; }; union cvmx_dpi_req_err_rsp_en { @@ -836,13 +711,6 @@ union cvmx_dpi_req_err_rsp_en { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_dpi_req_err_rsp_en_s cn61xx; - struct cvmx_dpi_req_err_rsp_en_s cn63xx; - struct cvmx_dpi_req_err_rsp_en_s cn63xxp1; - struct cvmx_dpi_req_err_rsp_en_s cn66xx; - struct cvmx_dpi_req_err_rsp_en_s cn68xx; - struct cvmx_dpi_req_err_rsp_en_s cn68xxp1; - struct cvmx_dpi_req_err_rsp_en_s cnf71xx; }; union cvmx_dpi_req_err_rst { @@ -856,13 +724,6 @@ union cvmx_dpi_req_err_rst { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_dpi_req_err_rst_s cn61xx; - struct cvmx_dpi_req_err_rst_s cn63xx; - struct cvmx_dpi_req_err_rst_s cn63xxp1; - struct cvmx_dpi_req_err_rst_s cn66xx; - struct cvmx_dpi_req_err_rst_s cn68xx; - struct cvmx_dpi_req_err_rst_s cn68xxp1; - struct cvmx_dpi_req_err_rst_s cnf71xx; }; union cvmx_dpi_req_err_rst_en { @@ -876,13 +737,6 @@ union cvmx_dpi_req_err_rst_en { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_dpi_req_err_rst_en_s cn61xx; - struct cvmx_dpi_req_err_rst_en_s cn63xx; - struct cvmx_dpi_req_err_rst_en_s cn63xxp1; - struct cvmx_dpi_req_err_rst_en_s cn66xx; - struct cvmx_dpi_req_err_rst_en_s cn68xx; - struct cvmx_dpi_req_err_rst_en_s cn68xxp1; - struct cvmx_dpi_req_err_rst_en_s cnf71xx; }; union cvmx_dpi_req_err_skip_comp { @@ -900,11 +754,6 @@ union cvmx_dpi_req_err_skip_comp { uint64_t reserved_24_63:40; #endif } s; - struct cvmx_dpi_req_err_skip_comp_s cn61xx; - struct cvmx_dpi_req_err_skip_comp_s cn66xx; - struct cvmx_dpi_req_err_skip_comp_s cn68xx; - struct cvmx_dpi_req_err_skip_comp_s cn68xxp1; - struct cvmx_dpi_req_err_skip_comp_s cnf71xx; }; union cvmx_dpi_req_gbl_en { @@ -918,13 +767,6 @@ union cvmx_dpi_req_gbl_en { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_dpi_req_gbl_en_s cn61xx; - struct cvmx_dpi_req_gbl_en_s cn63xx; - struct cvmx_dpi_req_gbl_en_s cn63xxp1; - struct cvmx_dpi_req_gbl_en_s cn66xx; - struct cvmx_dpi_req_gbl_en_s cn68xx; - struct cvmx_dpi_req_gbl_en_s cn68xxp1; - struct cvmx_dpi_req_gbl_en_s cnf71xx; }; union cvmx_dpi_sli_prtx_cfg { @@ -960,7 +802,6 @@ union cvmx_dpi_sli_prtx_cfg { uint64_t reserved_25_63:39; #endif } s; - struct cvmx_dpi_sli_prtx_cfg_s cn61xx; struct cvmx_dpi_sli_prtx_cfg_cn63xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_25_63:39; @@ -994,11 +835,6 @@ union cvmx_dpi_sli_prtx_cfg { uint64_t reserved_25_63:39; #endif } cn63xx; - struct cvmx_dpi_sli_prtx_cfg_cn63xx cn63xxp1; - struct cvmx_dpi_sli_prtx_cfg_s cn66xx; - struct cvmx_dpi_sli_prtx_cfg_cn63xx cn68xx; - struct cvmx_dpi_sli_prtx_cfg_cn63xx cn68xxp1; - struct cvmx_dpi_sli_prtx_cfg_s cnf71xx; }; union cvmx_dpi_sli_prtx_err { @@ -1012,13 +848,6 @@ union cvmx_dpi_sli_prtx_err { uint64_t addr:61; #endif } s; - struct cvmx_dpi_sli_prtx_err_s cn61xx; - struct cvmx_dpi_sli_prtx_err_s cn63xx; - struct cvmx_dpi_sli_prtx_err_s cn63xxp1; - struct cvmx_dpi_sli_prtx_err_s cn66xx; - struct cvmx_dpi_sli_prtx_err_s cn68xx; - struct cvmx_dpi_sli_prtx_err_s cn68xxp1; - struct cvmx_dpi_sli_prtx_err_s cnf71xx; }; union cvmx_dpi_sli_prtx_err_info { @@ -1040,13 +869,6 @@ union cvmx_dpi_sli_prtx_err_info { uint64_t reserved_9_63:55; #endif } s; - struct cvmx_dpi_sli_prtx_err_info_s cn61xx; - struct cvmx_dpi_sli_prtx_err_info_s cn63xx; - struct cvmx_dpi_sli_prtx_err_info_s cn63xxp1; - struct cvmx_dpi_sli_prtx_err_info_s cn66xx; - struct cvmx_dpi_sli_prtx_err_info_s cn68xx; - struct cvmx_dpi_sli_prtx_err_info_s cn68xxp1; - struct cvmx_dpi_sli_prtx_err_info_s cnf71xx; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-fpa-defs.h b/arch/mips/include/asm/octeon/cvmx-fpa-defs.h index 887ff8e1f715..322943f7c4b6 100644 --- a/arch/mips/include/asm/octeon/cvmx-fpa-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-fpa-defs.h @@ -81,11 +81,6 @@ union cvmx_fpa_addr_range_error { uint64_t reserved_38_63:26; #endif } s; - struct cvmx_fpa_addr_range_error_s cn61xx; - struct cvmx_fpa_addr_range_error_s cn66xx; - struct cvmx_fpa_addr_range_error_s cn68xx; - struct cvmx_fpa_addr_range_error_s cn68xxp1; - struct cvmx_fpa_addr_range_error_s cnf71xx; }; union cvmx_fpa_bist_status { @@ -107,24 +102,6 @@ union cvmx_fpa_bist_status { uint64_t reserved_5_63:59; #endif } s; - struct cvmx_fpa_bist_status_s cn30xx; - struct cvmx_fpa_bist_status_s cn31xx; - struct cvmx_fpa_bist_status_s cn38xx; - struct cvmx_fpa_bist_status_s cn38xxp2; - struct cvmx_fpa_bist_status_s cn50xx; - struct cvmx_fpa_bist_status_s cn52xx; - struct cvmx_fpa_bist_status_s cn52xxp1; - struct cvmx_fpa_bist_status_s cn56xx; - struct cvmx_fpa_bist_status_s cn56xxp1; - struct cvmx_fpa_bist_status_s cn58xx; - struct cvmx_fpa_bist_status_s cn58xxp1; - struct cvmx_fpa_bist_status_s cn61xx; - struct cvmx_fpa_bist_status_s cn63xx; - struct cvmx_fpa_bist_status_s cn63xxp1; - struct cvmx_fpa_bist_status_s cn66xx; - struct cvmx_fpa_bist_status_s cn68xx; - struct cvmx_fpa_bist_status_s cn68xxp1; - struct cvmx_fpa_bist_status_s cnf71xx; }; union cvmx_fpa_ctl_status { @@ -173,23 +150,6 @@ union cvmx_fpa_ctl_status { uint64_t reserved_18_63:46; #endif } cn30xx; - struct cvmx_fpa_ctl_status_cn30xx cn31xx; - struct cvmx_fpa_ctl_status_cn30xx cn38xx; - struct cvmx_fpa_ctl_status_cn30xx cn38xxp2; - struct cvmx_fpa_ctl_status_cn30xx cn50xx; - struct cvmx_fpa_ctl_status_cn30xx cn52xx; - struct cvmx_fpa_ctl_status_cn30xx cn52xxp1; - struct cvmx_fpa_ctl_status_cn30xx cn56xx; - struct cvmx_fpa_ctl_status_cn30xx cn56xxp1; - struct cvmx_fpa_ctl_status_cn30xx cn58xx; - struct cvmx_fpa_ctl_status_cn30xx cn58xxp1; - struct cvmx_fpa_ctl_status_s cn61xx; - struct cvmx_fpa_ctl_status_s cn63xx; - struct cvmx_fpa_ctl_status_cn30xx cn63xxp1; - struct cvmx_fpa_ctl_status_s cn66xx; - struct cvmx_fpa_ctl_status_s cn68xx; - struct cvmx_fpa_ctl_status_s cn68xxp1; - struct cvmx_fpa_ctl_status_s cnf71xx; }; union cvmx_fpa_fpfx_marks { @@ -205,19 +165,6 @@ union cvmx_fpa_fpfx_marks { uint64_t reserved_22_63:42; #endif } s; - struct cvmx_fpa_fpfx_marks_s cn38xx; - struct cvmx_fpa_fpfx_marks_s cn38xxp2; - struct cvmx_fpa_fpfx_marks_s cn56xx; - struct cvmx_fpa_fpfx_marks_s cn56xxp1; - struct cvmx_fpa_fpfx_marks_s cn58xx; - struct cvmx_fpa_fpfx_marks_s cn58xxp1; - struct cvmx_fpa_fpfx_marks_s cn61xx; - struct cvmx_fpa_fpfx_marks_s cn63xx; - struct cvmx_fpa_fpfx_marks_s cn63xxp1; - struct cvmx_fpa_fpfx_marks_s cn66xx; - struct cvmx_fpa_fpfx_marks_s cn68xx; - struct cvmx_fpa_fpfx_marks_s cn68xxp1; - struct cvmx_fpa_fpfx_marks_s cnf71xx; }; union cvmx_fpa_fpfx_size { @@ -231,19 +178,6 @@ union cvmx_fpa_fpfx_size { uint64_t reserved_11_63:53; #endif } s; - struct cvmx_fpa_fpfx_size_s cn38xx; - struct cvmx_fpa_fpfx_size_s cn38xxp2; - struct cvmx_fpa_fpfx_size_s cn56xx; - struct cvmx_fpa_fpfx_size_s cn56xxp1; - struct cvmx_fpa_fpfx_size_s cn58xx; - struct cvmx_fpa_fpfx_size_s cn58xxp1; - struct cvmx_fpa_fpfx_size_s cn61xx; - struct cvmx_fpa_fpfx_size_s cn63xx; - struct cvmx_fpa_fpfx_size_s cn63xxp1; - struct cvmx_fpa_fpfx_size_s cn66xx; - struct cvmx_fpa_fpfx_size_s cn68xx; - struct cvmx_fpa_fpfx_size_s cn68xxp1; - struct cvmx_fpa_fpfx_size_s cnf71xx; }; union cvmx_fpa_fpf0_marks { @@ -259,19 +193,6 @@ union cvmx_fpa_fpf0_marks { uint64_t reserved_24_63:40; #endif } s; - struct cvmx_fpa_fpf0_marks_s cn38xx; - struct cvmx_fpa_fpf0_marks_s cn38xxp2; - struct cvmx_fpa_fpf0_marks_s cn56xx; - struct cvmx_fpa_fpf0_marks_s cn56xxp1; - struct cvmx_fpa_fpf0_marks_s cn58xx; - struct cvmx_fpa_fpf0_marks_s cn58xxp1; - struct cvmx_fpa_fpf0_marks_s cn61xx; - struct cvmx_fpa_fpf0_marks_s cn63xx; - struct cvmx_fpa_fpf0_marks_s cn63xxp1; - struct cvmx_fpa_fpf0_marks_s cn66xx; - struct cvmx_fpa_fpf0_marks_s cn68xx; - struct cvmx_fpa_fpf0_marks_s cn68xxp1; - struct cvmx_fpa_fpf0_marks_s cnf71xx; }; union cvmx_fpa_fpf0_size { @@ -285,19 +206,6 @@ union cvmx_fpa_fpf0_size { uint64_t reserved_12_63:52; #endif } s; - struct cvmx_fpa_fpf0_size_s cn38xx; - struct cvmx_fpa_fpf0_size_s cn38xxp2; - struct cvmx_fpa_fpf0_size_s cn56xx; - struct cvmx_fpa_fpf0_size_s cn56xxp1; - struct cvmx_fpa_fpf0_size_s cn58xx; - struct cvmx_fpa_fpf0_size_s cn58xxp1; - struct cvmx_fpa_fpf0_size_s cn61xx; - struct cvmx_fpa_fpf0_size_s cn63xx; - struct cvmx_fpa_fpf0_size_s cn63xxp1; - struct cvmx_fpa_fpf0_size_s cn66xx; - struct cvmx_fpa_fpf0_size_s cn68xx; - struct cvmx_fpa_fpf0_size_s cn68xxp1; - struct cvmx_fpa_fpf0_size_s cnf71xx; }; union cvmx_fpa_fpf8_marks { @@ -313,8 +221,6 @@ union cvmx_fpa_fpf8_marks { uint64_t reserved_22_63:42; #endif } s; - struct cvmx_fpa_fpf8_marks_s cn68xx; - struct cvmx_fpa_fpf8_marks_s cn68xxp1; }; union cvmx_fpa_fpf8_size { @@ -328,8 +234,6 @@ union cvmx_fpa_fpf8_size { uint64_t reserved_12_63:52; #endif } s; - struct cvmx_fpa_fpf8_size_s cn68xx; - struct cvmx_fpa_fpf8_size_s cn68xxp1; }; union cvmx_fpa_int_enb { @@ -496,16 +400,6 @@ union cvmx_fpa_int_enb { uint64_t reserved_28_63:36; #endif } cn30xx; - struct cvmx_fpa_int_enb_cn30xx cn31xx; - struct cvmx_fpa_int_enb_cn30xx cn38xx; - struct cvmx_fpa_int_enb_cn30xx cn38xxp2; - struct cvmx_fpa_int_enb_cn30xx cn50xx; - struct cvmx_fpa_int_enb_cn30xx cn52xx; - struct cvmx_fpa_int_enb_cn30xx cn52xxp1; - struct cvmx_fpa_int_enb_cn30xx cn56xx; - struct cvmx_fpa_int_enb_cn30xx cn56xxp1; - struct cvmx_fpa_int_enb_cn30xx cn58xx; - struct cvmx_fpa_int_enb_cn30xx cn58xxp1; struct cvmx_fpa_int_enb_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_50_63:14; @@ -700,8 +594,6 @@ union cvmx_fpa_int_enb { uint64_t reserved_44_63:20; #endif } cn63xx; - struct cvmx_fpa_int_enb_cn30xx cn63xxp1; - struct cvmx_fpa_int_enb_cn61xx cn66xx; struct cvmx_fpa_int_enb_cn68xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_50_63:14; @@ -809,8 +701,6 @@ union cvmx_fpa_int_enb { uint64_t reserved_50_63:14; #endif } cn68xx; - struct cvmx_fpa_int_enb_cn68xx cn68xxp1; - struct cvmx_fpa_int_enb_cn61xx cnf71xx; }; union cvmx_fpa_int_sum { @@ -985,16 +875,6 @@ union cvmx_fpa_int_sum { uint64_t reserved_28_63:36; #endif } cn30xx; - struct cvmx_fpa_int_sum_cn30xx cn31xx; - struct cvmx_fpa_int_sum_cn30xx cn38xx; - struct cvmx_fpa_int_sum_cn30xx cn38xxp2; - struct cvmx_fpa_int_sum_cn30xx cn50xx; - struct cvmx_fpa_int_sum_cn30xx cn52xx; - struct cvmx_fpa_int_sum_cn30xx cn52xxp1; - struct cvmx_fpa_int_sum_cn30xx cn56xx; - struct cvmx_fpa_int_sum_cn30xx cn56xxp1; - struct cvmx_fpa_int_sum_cn30xx cn58xx; - struct cvmx_fpa_int_sum_cn30xx cn58xxp1; struct cvmx_fpa_int_sum_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_50_63:14; @@ -1189,11 +1069,6 @@ union cvmx_fpa_int_sum { uint64_t reserved_44_63:20; #endif } cn63xx; - struct cvmx_fpa_int_sum_cn30xx cn63xxp1; - struct cvmx_fpa_int_sum_cn61xx cn66xx; - struct cvmx_fpa_int_sum_s cn68xx; - struct cvmx_fpa_int_sum_s cn68xxp1; - struct cvmx_fpa_int_sum_cn61xx cnf71xx; }; union cvmx_fpa_packet_threshold { @@ -1207,12 +1082,6 @@ union cvmx_fpa_packet_threshold { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_fpa_packet_threshold_s cn61xx; - struct cvmx_fpa_packet_threshold_s cn63xx; - struct cvmx_fpa_packet_threshold_s cn66xx; - struct cvmx_fpa_packet_threshold_s cn68xx; - struct cvmx_fpa_packet_threshold_s cn68xxp1; - struct cvmx_fpa_packet_threshold_s cnf71xx; }; union cvmx_fpa_poolx_end_addr { @@ -1226,11 +1095,6 @@ union cvmx_fpa_poolx_end_addr { uint64_t reserved_33_63:31; #endif } s; - struct cvmx_fpa_poolx_end_addr_s cn61xx; - struct cvmx_fpa_poolx_end_addr_s cn66xx; - struct cvmx_fpa_poolx_end_addr_s cn68xx; - struct cvmx_fpa_poolx_end_addr_s cn68xxp1; - struct cvmx_fpa_poolx_end_addr_s cnf71xx; }; union cvmx_fpa_poolx_start_addr { @@ -1244,11 +1108,6 @@ union cvmx_fpa_poolx_start_addr { uint64_t reserved_33_63:31; #endif } s; - struct cvmx_fpa_poolx_start_addr_s cn61xx; - struct cvmx_fpa_poolx_start_addr_s cn66xx; - struct cvmx_fpa_poolx_start_addr_s cn68xx; - struct cvmx_fpa_poolx_start_addr_s cn68xxp1; - struct cvmx_fpa_poolx_start_addr_s cnf71xx; }; union cvmx_fpa_poolx_threshold { @@ -1271,11 +1130,6 @@ union cvmx_fpa_poolx_threshold { uint64_t reserved_29_63:35; #endif } cn61xx; - struct cvmx_fpa_poolx_threshold_cn61xx cn63xx; - struct cvmx_fpa_poolx_threshold_cn61xx cn66xx; - struct cvmx_fpa_poolx_threshold_s cn68xx; - struct cvmx_fpa_poolx_threshold_s cn68xxp1; - struct cvmx_fpa_poolx_threshold_cn61xx cnf71xx; }; union cvmx_fpa_quex_available { @@ -1298,23 +1152,6 @@ union cvmx_fpa_quex_available { uint64_t reserved_29_63:35; #endif } cn30xx; - struct cvmx_fpa_quex_available_cn30xx cn31xx; - struct cvmx_fpa_quex_available_cn30xx cn38xx; - struct cvmx_fpa_quex_available_cn30xx cn38xxp2; - struct cvmx_fpa_quex_available_cn30xx cn50xx; - struct cvmx_fpa_quex_available_cn30xx cn52xx; - struct cvmx_fpa_quex_available_cn30xx cn52xxp1; - struct cvmx_fpa_quex_available_cn30xx cn56xx; - struct cvmx_fpa_quex_available_cn30xx cn56xxp1; - struct cvmx_fpa_quex_available_cn30xx cn58xx; - struct cvmx_fpa_quex_available_cn30xx cn58xxp1; - struct cvmx_fpa_quex_available_cn30xx cn61xx; - struct cvmx_fpa_quex_available_cn30xx cn63xx; - struct cvmx_fpa_quex_available_cn30xx cn63xxp1; - struct cvmx_fpa_quex_available_cn30xx cn66xx; - struct cvmx_fpa_quex_available_s cn68xx; - struct cvmx_fpa_quex_available_s cn68xxp1; - struct cvmx_fpa_quex_available_cn30xx cnf71xx; }; union cvmx_fpa_quex_page_index { @@ -1328,24 +1165,6 @@ union cvmx_fpa_quex_page_index { uint64_t reserved_25_63:39; #endif } s; - struct cvmx_fpa_quex_page_index_s cn30xx; - struct cvmx_fpa_quex_page_index_s cn31xx; - struct cvmx_fpa_quex_page_index_s cn38xx; - struct cvmx_fpa_quex_page_index_s cn38xxp2; - struct cvmx_fpa_quex_page_index_s cn50xx; - struct cvmx_fpa_quex_page_index_s cn52xx; - struct cvmx_fpa_quex_page_index_s cn52xxp1; - struct cvmx_fpa_quex_page_index_s cn56xx; - struct cvmx_fpa_quex_page_index_s cn56xxp1; - struct cvmx_fpa_quex_page_index_s cn58xx; - struct cvmx_fpa_quex_page_index_s cn58xxp1; - struct cvmx_fpa_quex_page_index_s cn61xx; - struct cvmx_fpa_quex_page_index_s cn63xx; - struct cvmx_fpa_quex_page_index_s cn63xxp1; - struct cvmx_fpa_quex_page_index_s cn66xx; - struct cvmx_fpa_quex_page_index_s cn68xx; - struct cvmx_fpa_quex_page_index_s cn68xxp1; - struct cvmx_fpa_quex_page_index_s cnf71xx; }; union cvmx_fpa_que8_page_index { @@ -1359,8 +1178,6 @@ union cvmx_fpa_que8_page_index { uint64_t reserved_25_63:39; #endif } s; - struct cvmx_fpa_que8_page_index_s cn68xx; - struct cvmx_fpa_que8_page_index_s cn68xxp1; }; union cvmx_fpa_que_act { @@ -1376,24 +1193,6 @@ union cvmx_fpa_que_act { uint64_t reserved_29_63:35; #endif } s; - struct cvmx_fpa_que_act_s cn30xx; - struct cvmx_fpa_que_act_s cn31xx; - struct cvmx_fpa_que_act_s cn38xx; - struct cvmx_fpa_que_act_s cn38xxp2; - struct cvmx_fpa_que_act_s cn50xx; - struct cvmx_fpa_que_act_s cn52xx; - struct cvmx_fpa_que_act_s cn52xxp1; - struct cvmx_fpa_que_act_s cn56xx; - struct cvmx_fpa_que_act_s cn56xxp1; - struct cvmx_fpa_que_act_s cn58xx; - struct cvmx_fpa_que_act_s cn58xxp1; - struct cvmx_fpa_que_act_s cn61xx; - struct cvmx_fpa_que_act_s cn63xx; - struct cvmx_fpa_que_act_s cn63xxp1; - struct cvmx_fpa_que_act_s cn66xx; - struct cvmx_fpa_que_act_s cn68xx; - struct cvmx_fpa_que_act_s cn68xxp1; - struct cvmx_fpa_que_act_s cnf71xx; }; union cvmx_fpa_que_exp { @@ -1409,24 +1208,6 @@ union cvmx_fpa_que_exp { uint64_t reserved_29_63:35; #endif } s; - struct cvmx_fpa_que_exp_s cn30xx; - struct cvmx_fpa_que_exp_s cn31xx; - struct cvmx_fpa_que_exp_s cn38xx; - struct cvmx_fpa_que_exp_s cn38xxp2; - struct cvmx_fpa_que_exp_s cn50xx; - struct cvmx_fpa_que_exp_s cn52xx; - struct cvmx_fpa_que_exp_s cn52xxp1; - struct cvmx_fpa_que_exp_s cn56xx; - struct cvmx_fpa_que_exp_s cn56xxp1; - struct cvmx_fpa_que_exp_s cn58xx; - struct cvmx_fpa_que_exp_s cn58xxp1; - struct cvmx_fpa_que_exp_s cn61xx; - struct cvmx_fpa_que_exp_s cn63xx; - struct cvmx_fpa_que_exp_s cn63xxp1; - struct cvmx_fpa_que_exp_s cn66xx; - struct cvmx_fpa_que_exp_s cn68xx; - struct cvmx_fpa_que_exp_s cn68xxp1; - struct cvmx_fpa_que_exp_s cnf71xx; }; union cvmx_fpa_wart_ctl { @@ -1440,17 +1221,6 @@ union cvmx_fpa_wart_ctl { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_fpa_wart_ctl_s cn30xx; - struct cvmx_fpa_wart_ctl_s cn31xx; - struct cvmx_fpa_wart_ctl_s cn38xx; - struct cvmx_fpa_wart_ctl_s cn38xxp2; - struct cvmx_fpa_wart_ctl_s cn50xx; - struct cvmx_fpa_wart_ctl_s cn52xx; - struct cvmx_fpa_wart_ctl_s cn52xxp1; - struct cvmx_fpa_wart_ctl_s cn56xx; - struct cvmx_fpa_wart_ctl_s cn56xxp1; - struct cvmx_fpa_wart_ctl_s cn58xx; - struct cvmx_fpa_wart_ctl_s cn58xxp1; }; union cvmx_fpa_wart_status { @@ -1464,17 +1234,6 @@ union cvmx_fpa_wart_status { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_fpa_wart_status_s cn30xx; - struct cvmx_fpa_wart_status_s cn31xx; - struct cvmx_fpa_wart_status_s cn38xx; - struct cvmx_fpa_wart_status_s cn38xxp2; - struct cvmx_fpa_wart_status_s cn50xx; - struct cvmx_fpa_wart_status_s cn52xx; - struct cvmx_fpa_wart_status_s cn52xxp1; - struct cvmx_fpa_wart_status_s cn56xx; - struct cvmx_fpa_wart_status_s cn56xxp1; - struct cvmx_fpa_wart_status_s cn58xx; - struct cvmx_fpa_wart_status_s cn58xxp1; }; union cvmx_fpa_wqe_threshold { @@ -1488,12 +1247,6 @@ union cvmx_fpa_wqe_threshold { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_fpa_wqe_threshold_s cn61xx; - struct cvmx_fpa_wqe_threshold_s cn63xx; - struct cvmx_fpa_wqe_threshold_s cn66xx; - struct cvmx_fpa_wqe_threshold_s cn68xx; - struct cvmx_fpa_wqe_threshold_s cn68xxp1; - struct cvmx_fpa_wqe_threshold_s cnf71xx; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-gmxx-defs.h b/arch/mips/include/asm/octeon/cvmx-gmxx-defs.h index 80e4f8358b81..bdba676f1f2c 100644 --- a/arch/mips/include/asm/octeon/cvmx-gmxx-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-gmxx-defs.h @@ -28,82 +28,9 @@ #ifndef __CVMX_GMXX_DEFS_H__ #define __CVMX_GMXX_DEFS_H__ -static inline uint64_t CVMX_GMXX_BAD_REG(unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000518ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000518ull) + (block_id) * 0x8000000ull; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000518ull) + (block_id) * 0x1000000ull; - } - return CVMX_ADD_IO_SEG(0x0001180008000518ull) + (block_id) * 0x8000000ull; -} - -static inline uint64_t CVMX_GMXX_BIST(unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000400ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000400ull) + (block_id) * 0x8000000ull; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000400ull) + (block_id) * 0x1000000ull; - } - return CVMX_ADD_IO_SEG(0x0001180008000400ull) + (block_id) * 0x8000000ull; -} - -#define CVMX_GMXX_BPID_MAPX(offset, block_id) (CVMX_ADD_IO_SEG(0x0001180008000680ull) + (((offset) & 15) + ((block_id) & 7) * 0x200000ull) * 8) -#define CVMX_GMXX_BPID_MSK(block_id) (CVMX_ADD_IO_SEG(0x0001180008000700ull) + ((block_id) & 7) * 0x1000000ull) -static inline uint64_t CVMX_GMXX_CLK_EN(unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080007F0ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080007F0ull) + (block_id) * 0x8000000ull; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080007F0ull) + (block_id) * 0x1000000ull; - } - return CVMX_ADD_IO_SEG(0x00011800080007F0ull) + (block_id) * 0x8000000ull; -} - -#define CVMX_GMXX_EBP_DIS(block_id) (CVMX_ADD_IO_SEG(0x0001180008000608ull) + ((block_id) & 7) * 0x1000000ull) -#define CVMX_GMXX_EBP_MSK(block_id) (CVMX_ADD_IO_SEG(0x0001180008000600ull) + ((block_id) & 7) * 0x1000000ull) static inline uint64_t CVMX_GMXX_HG2_CONTROL(unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000550ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000550ull) + (block_id) * 0x8000000ull; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000550ull) + (block_id) * 0x1000000ull; } @@ -113,82 +40,15 @@ static inline uint64_t CVMX_GMXX_HG2_CONTROL(unsigned long block_id) static inline uint64_t CVMX_GMXX_INF_MODE(unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080007F8ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080007F8ull) + (block_id) * 0x8000000ull; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x00011800080007F8ull) + (block_id) * 0x1000000ull; } return CVMX_ADD_IO_SEG(0x00011800080007F8ull) + (block_id) * 0x8000000ull; } -static inline uint64_t CVMX_GMXX_NXA_ADR(unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000510ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000510ull) + (block_id) * 0x8000000ull; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000510ull) + (block_id) * 0x1000000ull; - } - return CVMX_ADD_IO_SEG(0x0001180008000510ull) + (block_id) * 0x8000000ull; -} - -#define CVMX_GMXX_PIPE_STATUS(block_id) (CVMX_ADD_IO_SEG(0x0001180008000760ull) + ((block_id) & 7) * 0x1000000ull) -static inline uint64_t CVMX_GMXX_PRTX_CBFC_CTL(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000580ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000580ull) + (block_id) * 0x8000000ull; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000580ull) + (block_id) * 0x1000000ull; - } - return CVMX_ADD_IO_SEG(0x0001180008000580ull) + (block_id) * 0x8000000ull; -} - static inline uint64_t CVMX_GMXX_PRTX_CFG(unsigned long offset, unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000010ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000010ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000010ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000010ull) + ((offset) + (block_id) * 0x10000ull) * 2048; case OCTEON_CN31XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000010ull) + ((offset) + (block_id) * 0x0ull) * 2048; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: @@ -197,23 +57,9 @@ static inline uint64_t CVMX_GMXX_PRTX_CFG(unsigned long offset, unsigned long bl return CVMX_ADD_IO_SEG(0x0001180008000010ull) + ((offset) + (block_id) * 0x10000ull) * 2048; } -#define CVMX_GMXX_RXAUI_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180008000740ull) + ((block_id) & 7) * 0x1000000ull) static inline uint64_t CVMX_GMXX_RXX_ADR_CAM0(unsigned long offset, unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000180ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000180ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000180ull) + ((offset) + (block_id) * 0x10000ull) * 2048; case OCTEON_CN31XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000180ull) + ((offset) + (block_id) * 0x0ull) * 2048; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: @@ -225,19 +71,6 @@ static inline uint64_t CVMX_GMXX_RXX_ADR_CAM0(unsigned long offset, unsigned lon static inline uint64_t CVMX_GMXX_RXX_ADR_CAM1(unsigned long offset, unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000188ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000188ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000188ull) + ((offset) + (block_id) * 0x10000ull) * 2048; case OCTEON_CN31XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000188ull) + ((offset) + (block_id) * 0x0ull) * 2048; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: @@ -249,19 +82,6 @@ static inline uint64_t CVMX_GMXX_RXX_ADR_CAM1(unsigned long offset, unsigned lon static inline uint64_t CVMX_GMXX_RXX_ADR_CAM2(unsigned long offset, unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000190ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000190ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000190ull) + ((offset) + (block_id) * 0x10000ull) * 2048; case OCTEON_CN31XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000190ull) + ((offset) + (block_id) * 0x0ull) * 2048; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: @@ -273,19 +93,6 @@ static inline uint64_t CVMX_GMXX_RXX_ADR_CAM2(unsigned long offset, unsigned lon static inline uint64_t CVMX_GMXX_RXX_ADR_CAM3(unsigned long offset, unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000198ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000198ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000198ull) + ((offset) + (block_id) * 0x10000ull) * 2048; case OCTEON_CN31XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000198ull) + ((offset) + (block_id) * 0x0ull) * 2048; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: @@ -297,19 +104,6 @@ static inline uint64_t CVMX_GMXX_RXX_ADR_CAM3(unsigned long offset, unsigned lon static inline uint64_t CVMX_GMXX_RXX_ADR_CAM4(unsigned long offset, unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080001A0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080001A0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080001A0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; case OCTEON_CN31XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x00011800080001A0ull) + ((offset) + (block_id) * 0x0ull) * 2048; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: @@ -321,19 +115,6 @@ static inline uint64_t CVMX_GMXX_RXX_ADR_CAM4(unsigned long offset, unsigned lon static inline uint64_t CVMX_GMXX_RXX_ADR_CAM5(unsigned long offset, unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080001A8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080001A8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080001A8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; case OCTEON_CN31XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x00011800080001A8ull) + ((offset) + (block_id) * 0x0ull) * 2048; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: @@ -342,37 +123,9 @@ static inline uint64_t CVMX_GMXX_RXX_ADR_CAM5(unsigned long offset, unsigned lon return CVMX_ADD_IO_SEG(0x00011800080001A8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; } -static inline uint64_t CVMX_GMXX_RXX_ADR_CAM_ALL_EN(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000110ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000110ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000110ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x0001180008000110ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - static inline uint64_t CVMX_GMXX_RXX_ADR_CAM_EN(unsigned long offset, unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000108ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000108ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000108ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000108ull) + ((offset) + (block_id) * 0x10000ull) * 2048; case OCTEON_CN31XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000108ull) + ((offset) + (block_id) * 0x0ull) * 2048; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: @@ -384,20 +137,6 @@ static inline uint64_t CVMX_GMXX_RXX_ADR_CAM_EN(unsigned long offset, unsigned l static inline uint64_t CVMX_GMXX_RXX_ADR_CTL(unsigned long offset, unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000100ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000100ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000100ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000100ull) + ((offset) + (block_id) * 0x10000ull) * 2048; case OCTEON_CN31XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000100ull) + ((offset) + (block_id) * 0x0ull) * 2048; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: @@ -406,73 +145,9 @@ static inline uint64_t CVMX_GMXX_RXX_ADR_CTL(unsigned long offset, unsigned long return CVMX_ADD_IO_SEG(0x0001180008000100ull) + ((offset) + (block_id) * 0x10000ull) * 2048; } -static inline uint64_t CVMX_GMXX_RXX_DECISION(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000040ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000040ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000040ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000040ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000040ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000040ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x0001180008000040ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - -static inline uint64_t CVMX_GMXX_RXX_FRM_CHK(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000020ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000020ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000020ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000020ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000020ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000020ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x0001180008000020ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - static inline uint64_t CVMX_GMXX_RXX_FRM_CTL(unsigned long offset, unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000018ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000018ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000018ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000018ull) + ((offset) + (block_id) * 0x10000ull) * 2048; case OCTEON_CN31XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000018ull) + ((offset) + (block_id) * 0x0ull) * 2048; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: @@ -483,48 +158,10 @@ static inline uint64_t CVMX_GMXX_RXX_FRM_CTL(unsigned long offset, unsigned long #define CVMX_GMXX_RXX_FRM_MAX(offset, block_id) (CVMX_ADD_IO_SEG(0x0001180008000030ull) + (((offset) & 3) + ((block_id) & 1) * 0x10000ull) * 2048) #define CVMX_GMXX_RXX_FRM_MIN(offset, block_id) (CVMX_ADD_IO_SEG(0x0001180008000028ull) + (((offset) & 3) + ((block_id) & 1) * 0x10000ull) * 2048) -static inline uint64_t CVMX_GMXX_RXX_IFG(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000058ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000058ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000058ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000058ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000058ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000058ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x0001180008000058ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} static inline uint64_t CVMX_GMXX_RXX_INT_EN(unsigned long offset, unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000008ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000008ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000008ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000008ull) + ((offset) + (block_id) * 0x10000ull) * 2048; case OCTEON_CN31XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000008ull) + ((offset) + (block_id) * 0x0ull) * 2048; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: @@ -536,20 +173,6 @@ static inline uint64_t CVMX_GMXX_RXX_INT_EN(unsigned long offset, unsigned long static inline uint64_t CVMX_GMXX_RXX_INT_REG(unsigned long offset, unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000000ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000000ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000000ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000000ull) + ((offset) + (block_id) * 0x10000ull) * 2048; case OCTEON_CN31XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000000ull) + ((offset) + (block_id) * 0x0ull) * 2048; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: @@ -561,20 +184,6 @@ static inline uint64_t CVMX_GMXX_RXX_INT_REG(unsigned long offset, unsigned long static inline uint64_t CVMX_GMXX_RXX_JABBER(unsigned long offset, unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000038ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000038ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000038ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000038ull) + ((offset) + (block_id) * 0x10000ull) * 2048; case OCTEON_CN31XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000038ull) + ((offset) + (block_id) * 0x0ull) * 2048; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: @@ -583,471 +192,20 @@ static inline uint64_t CVMX_GMXX_RXX_JABBER(unsigned long offset, unsigned long return CVMX_ADD_IO_SEG(0x0001180008000038ull) + ((offset) + (block_id) * 0x10000ull) * 2048; } -static inline uint64_t CVMX_GMXX_RXX_PAUSE_DROP_TIME(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000068ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000068ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000068ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000068ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000068ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000068ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x0001180008000068ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - #define CVMX_GMXX_RXX_RX_INBND(offset, block_id) (CVMX_ADD_IO_SEG(0x0001180008000060ull) + (((offset) & 3) + ((block_id) & 1) * 0x10000ull) * 2048) -static inline uint64_t CVMX_GMXX_RXX_STATS_CTL(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000050ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000050ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000050ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000050ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000050ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000050ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x0001180008000050ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - -static inline uint64_t CVMX_GMXX_RXX_STATS_OCTS(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000088ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000088ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000088ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000088ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000088ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000088ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x0001180008000088ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - -static inline uint64_t CVMX_GMXX_RXX_STATS_OCTS_CTL(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000098ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000098ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000098ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000098ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000098ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000098ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x0001180008000098ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - -static inline uint64_t CVMX_GMXX_RXX_STATS_OCTS_DMAC(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000A8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000A8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000A8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000A8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000A8ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000A8ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x00011800080000A8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - -static inline uint64_t CVMX_GMXX_RXX_STATS_OCTS_DRP(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000B8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000B8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000B8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000B8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000B8ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000B8ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x00011800080000B8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - -static inline uint64_t CVMX_GMXX_RXX_STATS_PKTS(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000080ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000080ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000080ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000080ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000080ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000080ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x0001180008000080ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} -static inline uint64_t CVMX_GMXX_RXX_STATS_PKTS_BAD(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000C0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000C0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000C0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000C0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000C0ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000C0ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x00011800080000C0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - -static inline uint64_t CVMX_GMXX_RXX_STATS_PKTS_CTL(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000090ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000090ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000090ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000090ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000090ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000090ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x0001180008000090ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - -static inline uint64_t CVMX_GMXX_RXX_STATS_PKTS_DMAC(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000A0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000A0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000A0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000A0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000A0ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000A0ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x00011800080000A0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - -static inline uint64_t CVMX_GMXX_RXX_STATS_PKTS_DRP(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000B0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000B0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000B0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000B0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000B0ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000B0ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x00011800080000B0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - -static inline uint64_t CVMX_GMXX_RXX_UDD_SKP(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000048ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000048ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000048ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000048ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000048ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000048ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x0001180008000048ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - -static inline uint64_t CVMX_GMXX_RX_BP_DROPX(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000420ull) + ((offset) + (block_id) * 0x1000000ull) * 8; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000420ull) + ((offset) + (block_id) * 0x1000000ull) * 8; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000420ull) + ((offset) + (block_id) * 0x1000000ull) * 8; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000420ull) + ((offset) + (block_id) * 0x1000000ull) * 8; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000420ull) + ((offset) + (block_id) * 0x0ull) * 8; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000420ull) + ((offset) + (block_id) * 0x200000ull) * 8; - } - return CVMX_ADD_IO_SEG(0x0001180008000420ull) + ((offset) + (block_id) * 0x1000000ull) * 8; -} - -static inline uint64_t CVMX_GMXX_RX_BP_OFFX(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000460ull) + ((offset) + (block_id) * 0x1000000ull) * 8; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000460ull) + ((offset) + (block_id) * 0x1000000ull) * 8; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000460ull) + ((offset) + (block_id) * 0x1000000ull) * 8; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000460ull) + ((offset) + (block_id) * 0x1000000ull) * 8; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000460ull) + ((offset) + (block_id) * 0x0ull) * 8; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000460ull) + ((offset) + (block_id) * 0x200000ull) * 8; - } - return CVMX_ADD_IO_SEG(0x0001180008000460ull) + ((offset) + (block_id) * 0x1000000ull) * 8; -} - -static inline uint64_t CVMX_GMXX_RX_BP_ONX(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000440ull) + ((offset) + (block_id) * 0x1000000ull) * 8; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000440ull) + ((offset) + (block_id) * 0x1000000ull) * 8; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000440ull) + ((offset) + (block_id) * 0x1000000ull) * 8; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000440ull) + ((offset) + (block_id) * 0x1000000ull) * 8; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000440ull) + ((offset) + (block_id) * 0x0ull) * 8; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000440ull) + ((offset) + (block_id) * 0x200000ull) * 8; - } - return CVMX_ADD_IO_SEG(0x0001180008000440ull) + ((offset) + (block_id) * 0x1000000ull) * 8; -} - -static inline uint64_t CVMX_GMXX_RX_HG2_STATUS(unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000548ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000548ull) + (block_id) * 0x8000000ull; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000548ull) + (block_id) * 0x1000000ull; - } - return CVMX_ADD_IO_SEG(0x0001180008000548ull) + (block_id) * 0x8000000ull; -} - -#define CVMX_GMXX_RX_PASS_EN(block_id) (CVMX_ADD_IO_SEG(0x00011800080005F8ull) + ((block_id) & 1) * 0x8000000ull) -#define CVMX_GMXX_RX_PASS_MAPX(offset, block_id) (CVMX_ADD_IO_SEG(0x0001180008000600ull) + (((offset) & 15) + ((block_id) & 1) * 0x1000000ull) * 8) static inline uint64_t CVMX_GMXX_RX_PRTS(unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000410ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000410ull) + (block_id) * 0x8000000ull; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000410ull) + (block_id) * 0x1000000ull; } return CVMX_ADD_IO_SEG(0x0001180008000410ull) + (block_id) * 0x8000000ull; } -static inline uint64_t CVMX_GMXX_RX_PRT_INFO(unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080004E8ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080004E8ull) + (block_id) * 0x8000000ull; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080004E8ull) + (block_id) * 0x1000000ull; - } - return CVMX_ADD_IO_SEG(0x00011800080004E8ull) + (block_id) * 0x8000000ull; -} - -#define CVMX_GMXX_RX_TX_STATUS(block_id) (CVMX_ADD_IO_SEG(0x00011800080007E8ull)) -static inline uint64_t CVMX_GMXX_RX_XAUI_BAD_COL(unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000538ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000538ull) + (block_id) * 0x8000000ull; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000538ull) + (block_id) * 0x1000000ull; - } - return CVMX_ADD_IO_SEG(0x0001180008000538ull) + (block_id) * 0x8000000ull; -} - static inline uint64_t CVMX_GMXX_RX_XAUI_CTL(unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000530ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000530ull) + (block_id) * 0x8000000ull; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000530ull) + (block_id) * 0x1000000ull; } @@ -1057,20 +215,6 @@ static inline uint64_t CVMX_GMXX_RX_XAUI_CTL(unsigned long block_id) static inline uint64_t CVMX_GMXX_SMACX(unsigned long offset, unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000230ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000230ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000230ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000230ull) + ((offset) + (block_id) * 0x10000ull) * 2048; case OCTEON_CN31XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000230ull) + ((offset) + (block_id) * 0x0ull) * 2048; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: @@ -1079,97 +223,9 @@ static inline uint64_t CVMX_GMXX_SMACX(unsigned long offset, unsigned long block return CVMX_ADD_IO_SEG(0x0001180008000230ull) + ((offset) + (block_id) * 0x10000ull) * 2048; } -static inline uint64_t CVMX_GMXX_SOFT_BIST(unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080007E8ull) + (block_id) * 0x8000000ull; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080007E8ull) + (block_id) * 0x8000000ull; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080007E8ull) + (block_id) * 0x1000000ull; - } - return CVMX_ADD_IO_SEG(0x00011800080007E8ull) + (block_id) * 0x1000000ull; -} - -static inline uint64_t CVMX_GMXX_STAT_BP(unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000520ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000520ull) + (block_id) * 0x8000000ull; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000520ull) + (block_id) * 0x1000000ull; - } - return CVMX_ADD_IO_SEG(0x0001180008000520ull) + (block_id) * 0x8000000ull; -} - -static inline uint64_t CVMX_GMXX_TB_REG(unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080007E0ull) + (block_id) * 0x8000000ull; - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080007E0ull) + (block_id) * 0x8000000ull; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080007E0ull) + (block_id) * 0x1000000ull; - } - return CVMX_ADD_IO_SEG(0x00011800080007E0ull) + (block_id) * 0x8000000ull; -} - -static inline uint64_t CVMX_GMXX_TXX_APPEND(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000218ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000218ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000218ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000218ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000218ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000218ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x0001180008000218ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - static inline uint64_t CVMX_GMXX_TXX_BURST(unsigned long offset, unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000228ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000228ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000228ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000228ull) + ((offset) + (block_id) * 0x10000ull) * 2048; case OCTEON_CN31XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000228ull) + ((offset) + (block_id) * 0x0ull) * 2048; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: @@ -1178,58 +234,10 @@ static inline uint64_t CVMX_GMXX_TXX_BURST(unsigned long offset, unsigned long b return CVMX_ADD_IO_SEG(0x0001180008000228ull) + ((offset) + (block_id) * 0x10000ull) * 2048; } -static inline uint64_t CVMX_GMXX_TXX_CBFC_XOFF(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080005A0ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080005A0ull) + (block_id) * 0x8000000ull; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080005A0ull) + (block_id) * 0x1000000ull; - } - return CVMX_ADD_IO_SEG(0x00011800080005A0ull) + (block_id) * 0x8000000ull; -} - -static inline uint64_t CVMX_GMXX_TXX_CBFC_XON(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080005C0ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080005C0ull) + (block_id) * 0x8000000ull; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080005C0ull) + (block_id) * 0x1000000ull; - } - return CVMX_ADD_IO_SEG(0x00011800080005C0ull) + (block_id) * 0x8000000ull; -} - #define CVMX_GMXX_TXX_CLK(offset, block_id) (CVMX_ADD_IO_SEG(0x0001180008000208ull) + (((offset) & 3) + ((block_id) & 1) * 0x10000ull) * 2048) static inline uint64_t CVMX_GMXX_TXX_CTL(unsigned long offset, unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000270ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000270ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000270ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000270ull) + ((offset) + (block_id) * 0x10000ull) * 2048; case OCTEON_CN31XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000270ull) + ((offset) + (block_id) * 0x0ull) * 2048; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: @@ -1238,48 +246,9 @@ static inline uint64_t CVMX_GMXX_TXX_CTL(unsigned long offset, unsigned long blo return CVMX_ADD_IO_SEG(0x0001180008000270ull) + ((offset) + (block_id) * 0x10000ull) * 2048; } -static inline uint64_t CVMX_GMXX_TXX_MIN_PKT(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000240ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000240ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000240ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000240ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000240ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000240ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x0001180008000240ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - static inline uint64_t CVMX_GMXX_TXX_PAUSE_PKT_INTERVAL(unsigned long offset, unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000248ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000248ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000248ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000248ull) + ((offset) + (block_id) * 0x10000ull) * 2048; case OCTEON_CN31XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000248ull) + ((offset) + (block_id) * 0x0ull) * 2048; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: @@ -1291,20 +260,6 @@ static inline uint64_t CVMX_GMXX_TXX_PAUSE_PKT_INTERVAL(unsigned long offset, un static inline uint64_t CVMX_GMXX_TXX_PAUSE_PKT_TIME(unsigned long offset, unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000238ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000238ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000238ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000238ull) + ((offset) + (block_id) * 0x10000ull) * 2048; case OCTEON_CN31XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000238ull) + ((offset) + (block_id) * 0x0ull) * 2048; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: @@ -1313,92 +268,9 @@ static inline uint64_t CVMX_GMXX_TXX_PAUSE_PKT_TIME(unsigned long offset, unsign return CVMX_ADD_IO_SEG(0x0001180008000238ull) + ((offset) + (block_id) * 0x10000ull) * 2048; } -static inline uint64_t CVMX_GMXX_TXX_PAUSE_TOGO(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000258ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000258ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000258ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000258ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000258ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000258ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x0001180008000258ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - -static inline uint64_t CVMX_GMXX_TXX_PAUSE_ZERO(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000260ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000260ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000260ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000260ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000260ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000260ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x0001180008000260ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - -#define CVMX_GMXX_TXX_PIPE(offset, block_id) (CVMX_ADD_IO_SEG(0x0001180008000310ull) + (((offset) & 3) + ((block_id) & 7) * 0x2000ull) * 2048) -static inline uint64_t CVMX_GMXX_TXX_SGMII_CTL(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000300ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000300ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000300ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000300ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x0001180008000300ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - static inline uint64_t CVMX_GMXX_TXX_SLOT(unsigned long offset, unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000220ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000220ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000220ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000220ull) + ((offset) + (block_id) * 0x10000ull) * 2048; case OCTEON_CN31XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000220ull) + ((offset) + (block_id) * 0x0ull) * 2048; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: @@ -1407,323 +279,9 @@ static inline uint64_t CVMX_GMXX_TXX_SLOT(unsigned long offset, unsigned long bl return CVMX_ADD_IO_SEG(0x0001180008000220ull) + ((offset) + (block_id) * 0x10000ull) * 2048; } -static inline uint64_t CVMX_GMXX_TXX_SOFT_PAUSE(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000250ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000250ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000250ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000250ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000250ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000250ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x0001180008000250ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - -static inline uint64_t CVMX_GMXX_TXX_STAT0(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000280ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000280ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000280ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000280ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000280ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000280ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x0001180008000280ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - -static inline uint64_t CVMX_GMXX_TXX_STAT1(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000288ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000288ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000288ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000288ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000288ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000288ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x0001180008000288ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - -static inline uint64_t CVMX_GMXX_TXX_STAT2(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000290ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000290ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000290ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000290ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000290ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000290ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x0001180008000290ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - -static inline uint64_t CVMX_GMXX_TXX_STAT3(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000298ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000298ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000298ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000298ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000298ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000298ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x0001180008000298ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - -static inline uint64_t CVMX_GMXX_TXX_STAT4(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002A0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002A0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002A0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002A0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002A0ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002A0ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x00011800080002A0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - -static inline uint64_t CVMX_GMXX_TXX_STAT5(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002A8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002A8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002A8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002A8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002A8ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002A8ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x00011800080002A8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - -static inline uint64_t CVMX_GMXX_TXX_STAT6(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002B0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002B0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002B0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002B0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002B0ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002B0ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x00011800080002B0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - -static inline uint64_t CVMX_GMXX_TXX_STAT7(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002B8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002B8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002B8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002B8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002B8ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002B8ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x00011800080002B8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - -static inline uint64_t CVMX_GMXX_TXX_STAT8(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002C0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002C0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002C0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002C0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002C0ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002C0ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x00011800080002C0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - -static inline uint64_t CVMX_GMXX_TXX_STAT9(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002C8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002C8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002C8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002C8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002C8ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002C8ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x00011800080002C8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - -static inline uint64_t CVMX_GMXX_TXX_STATS_CTL(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000268ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000268ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000268ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000268ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000268ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000268ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x0001180008000268ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - static inline uint64_t CVMX_GMXX_TXX_THRESH(unsigned long offset, unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000210ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000210ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000210ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000210ull) + ((offset) + (block_id) * 0x10000ull) * 2048; case OCTEON_CN31XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000210ull) + ((offset) + (block_id) * 0x0ull) * 2048; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: @@ -1732,145 +290,9 @@ static inline uint64_t CVMX_GMXX_TXX_THRESH(unsigned long offset, unsigned long return CVMX_ADD_IO_SEG(0x0001180008000210ull) + ((offset) + (block_id) * 0x10000ull) * 2048; } -static inline uint64_t CVMX_GMXX_TX_BP(unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080004D0ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080004D0ull) + (block_id) * 0x8000000ull; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080004D0ull) + (block_id) * 0x1000000ull; - } - return CVMX_ADD_IO_SEG(0x00011800080004D0ull) + (block_id) * 0x8000000ull; -} - -#define CVMX_GMXX_TX_CLK_MSKX(offset, block_id) (CVMX_ADD_IO_SEG(0x0001180008000780ull) + (((offset) & 1) + ((block_id) & 0) * 0x0ull) * 8) -static inline uint64_t CVMX_GMXX_TX_COL_ATTEMPT(unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000498ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000498ull) + (block_id) * 0x8000000ull; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000498ull) + (block_id) * 0x1000000ull; - } - return CVMX_ADD_IO_SEG(0x0001180008000498ull) + (block_id) * 0x8000000ull; -} - -static inline uint64_t CVMX_GMXX_TX_CORRUPT(unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080004D8ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080004D8ull) + (block_id) * 0x8000000ull; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080004D8ull) + (block_id) * 0x1000000ull; - } - return CVMX_ADD_IO_SEG(0x00011800080004D8ull) + (block_id) * 0x8000000ull; -} - -static inline uint64_t CVMX_GMXX_TX_HG2_REG1(unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000558ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000558ull) + (block_id) * 0x8000000ull; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000558ull) + (block_id) * 0x1000000ull; - } - return CVMX_ADD_IO_SEG(0x0001180008000558ull) + (block_id) * 0x8000000ull; -} - -static inline uint64_t CVMX_GMXX_TX_HG2_REG2(unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000560ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000560ull) + (block_id) * 0x8000000ull; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000560ull) + (block_id) * 0x1000000ull; - } - return CVMX_ADD_IO_SEG(0x0001180008000560ull) + (block_id) * 0x8000000ull; -} - -static inline uint64_t CVMX_GMXX_TX_IFG(unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000488ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000488ull) + (block_id) * 0x8000000ull; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000488ull) + (block_id) * 0x1000000ull; - } - return CVMX_ADD_IO_SEG(0x0001180008000488ull) + (block_id) * 0x8000000ull; -} - static inline uint64_t CVMX_GMXX_TX_INT_EN(unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000508ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000508ull) + (block_id) * 0x8000000ull; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000508ull) + (block_id) * 0x1000000ull; } @@ -1880,151 +302,24 @@ static inline uint64_t CVMX_GMXX_TX_INT_EN(unsigned long block_id) static inline uint64_t CVMX_GMXX_TX_INT_REG(unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000500ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000500ull) + (block_id) * 0x8000000ull; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000500ull) + (block_id) * 0x1000000ull; } return CVMX_ADD_IO_SEG(0x0001180008000500ull) + (block_id) * 0x8000000ull; } -static inline uint64_t CVMX_GMXX_TX_JAM(unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000490ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000490ull) + (block_id) * 0x8000000ull; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000490ull) + (block_id) * 0x1000000ull; - } - return CVMX_ADD_IO_SEG(0x0001180008000490ull) + (block_id) * 0x8000000ull; -} - -static inline uint64_t CVMX_GMXX_TX_LFSR(unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080004F8ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080004F8ull) + (block_id) * 0x8000000ull; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080004F8ull) + (block_id) * 0x1000000ull; - } - return CVMX_ADD_IO_SEG(0x00011800080004F8ull) + (block_id) * 0x8000000ull; -} - static inline uint64_t CVMX_GMXX_TX_OVR_BP(unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080004C8ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080004C8ull) + (block_id) * 0x8000000ull; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x00011800080004C8ull) + (block_id) * 0x1000000ull; } return CVMX_ADD_IO_SEG(0x00011800080004C8ull) + (block_id) * 0x8000000ull; } -static inline uint64_t CVMX_GMXX_TX_PAUSE_PKT_DMAC(unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080004A0ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080004A0ull) + (block_id) * 0x8000000ull; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080004A0ull) + (block_id) * 0x1000000ull; - } - return CVMX_ADD_IO_SEG(0x00011800080004A0ull) + (block_id) * 0x8000000ull; -} - -static inline uint64_t CVMX_GMXX_TX_PAUSE_PKT_TYPE(unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080004A8ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080004A8ull) + (block_id) * 0x8000000ull; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080004A8ull) + (block_id) * 0x1000000ull; - } - return CVMX_ADD_IO_SEG(0x00011800080004A8ull) + (block_id) * 0x8000000ull; -} - static inline uint64_t CVMX_GMXX_TX_PRTS(unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000480ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000480ull) + (block_id) * 0x8000000ull; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000480ull) + (block_id) * 0x1000000ull; } @@ -2032,286 +327,19 @@ static inline uint64_t CVMX_GMXX_TX_PRTS(unsigned long block_id) } #define CVMX_GMXX_TX_SPI_CTL(block_id) (CVMX_ADD_IO_SEG(0x00011800080004C0ull) + ((block_id) & 1) * 0x8000000ull) -#define CVMX_GMXX_TX_SPI_DRAIN(block_id) (CVMX_ADD_IO_SEG(0x00011800080004E0ull) + ((block_id) & 1) * 0x8000000ull) #define CVMX_GMXX_TX_SPI_MAX(block_id) (CVMX_ADD_IO_SEG(0x00011800080004B0ull) + ((block_id) & 1) * 0x8000000ull) -#define CVMX_GMXX_TX_SPI_ROUNDX(offset, block_id) (CVMX_ADD_IO_SEG(0x0001180008000680ull) + (((offset) & 31) + ((block_id) & 1) * 0x1000000ull) * 8) #define CVMX_GMXX_TX_SPI_THRESH(block_id) (CVMX_ADD_IO_SEG(0x00011800080004B8ull) + ((block_id) & 1) * 0x8000000ull) static inline uint64_t CVMX_GMXX_TX_XAUI_CTL(unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000528ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000528ull) + (block_id) * 0x8000000ull; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000528ull) + (block_id) * 0x1000000ull; } return CVMX_ADD_IO_SEG(0x0001180008000528ull) + (block_id) * 0x8000000ull; } -static inline uint64_t CVMX_GMXX_XAUI_EXT_LOOPBACK(unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000540ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000540ull) + (block_id) * 0x8000000ull; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000540ull) + (block_id) * 0x1000000ull; - } - return CVMX_ADD_IO_SEG(0x0001180008000540ull) + (block_id) * 0x8000000ull; -} - void __cvmx_interrupt_gmxx_enable(int interface); -union cvmx_gmxx_bad_reg { - uint64_t u64; - struct cvmx_gmxx_bad_reg_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_31_63:33; - uint64_t inb_nxa:4; - uint64_t statovr:1; - uint64_t loststat:4; - uint64_t reserved_18_21:4; - uint64_t out_ovr:16; - uint64_t ncb_ovr:1; - uint64_t out_col:1; -#else - uint64_t out_col:1; - uint64_t ncb_ovr:1; - uint64_t out_ovr:16; - uint64_t reserved_18_21:4; - uint64_t loststat:4; - uint64_t statovr:1; - uint64_t inb_nxa:4; - uint64_t reserved_31_63:33; -#endif - } s; - struct cvmx_gmxx_bad_reg_cn30xx { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_31_63:33; - uint64_t inb_nxa:4; - uint64_t statovr:1; - uint64_t reserved_25_25:1; - uint64_t loststat:3; - uint64_t reserved_5_21:17; - uint64_t out_ovr:3; - uint64_t reserved_0_1:2; -#else - uint64_t reserved_0_1:2; - uint64_t out_ovr:3; - uint64_t reserved_5_21:17; - uint64_t loststat:3; - uint64_t reserved_25_25:1; - uint64_t statovr:1; - uint64_t inb_nxa:4; - uint64_t reserved_31_63:33; -#endif - } cn30xx; - struct cvmx_gmxx_bad_reg_cn30xx cn31xx; - struct cvmx_gmxx_bad_reg_s cn38xx; - struct cvmx_gmxx_bad_reg_s cn38xxp2; - struct cvmx_gmxx_bad_reg_cn30xx cn50xx; - struct cvmx_gmxx_bad_reg_cn52xx { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_31_63:33; - uint64_t inb_nxa:4; - uint64_t statovr:1; - uint64_t loststat:4; - uint64_t reserved_6_21:16; - uint64_t out_ovr:4; - uint64_t reserved_0_1:2; -#else - uint64_t reserved_0_1:2; - uint64_t out_ovr:4; - uint64_t reserved_6_21:16; - uint64_t loststat:4; - uint64_t statovr:1; - uint64_t inb_nxa:4; - uint64_t reserved_31_63:33; -#endif - } cn52xx; - struct cvmx_gmxx_bad_reg_cn52xx cn52xxp1; - struct cvmx_gmxx_bad_reg_cn52xx cn56xx; - struct cvmx_gmxx_bad_reg_cn52xx cn56xxp1; - struct cvmx_gmxx_bad_reg_s cn58xx; - struct cvmx_gmxx_bad_reg_s cn58xxp1; - struct cvmx_gmxx_bad_reg_cn52xx cn61xx; - struct cvmx_gmxx_bad_reg_cn52xx cn63xx; - struct cvmx_gmxx_bad_reg_cn52xx cn63xxp1; - struct cvmx_gmxx_bad_reg_cn52xx cn66xx; - struct cvmx_gmxx_bad_reg_cn52xx cn68xx; - struct cvmx_gmxx_bad_reg_cn52xx cn68xxp1; - struct cvmx_gmxx_bad_reg_cn52xx cnf71xx; -}; - -union cvmx_gmxx_bist { - uint64_t u64; - struct cvmx_gmxx_bist_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_25_63:39; - uint64_t status:25; -#else - uint64_t status:25; - uint64_t reserved_25_63:39; -#endif - } s; - struct cvmx_gmxx_bist_cn30xx { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_10_63:54; - uint64_t status:10; -#else - uint64_t status:10; - uint64_t reserved_10_63:54; -#endif - } cn30xx; - struct cvmx_gmxx_bist_cn30xx cn31xx; - struct cvmx_gmxx_bist_cn30xx cn38xx; - struct cvmx_gmxx_bist_cn30xx cn38xxp2; - struct cvmx_gmxx_bist_cn50xx { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_12_63:52; - uint64_t status:12; -#else - uint64_t status:12; - uint64_t reserved_12_63:52; -#endif - } cn50xx; - struct cvmx_gmxx_bist_cn52xx { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t status:16; -#else - uint64_t status:16; - uint64_t reserved_16_63:48; -#endif - } cn52xx; - struct cvmx_gmxx_bist_cn52xx cn52xxp1; - struct cvmx_gmxx_bist_cn52xx cn56xx; - struct cvmx_gmxx_bist_cn52xx cn56xxp1; - struct cvmx_gmxx_bist_cn58xx { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_17_63:47; - uint64_t status:17; -#else - uint64_t status:17; - uint64_t reserved_17_63:47; -#endif - } cn58xx; - struct cvmx_gmxx_bist_cn58xx cn58xxp1; - struct cvmx_gmxx_bist_s cn61xx; - struct cvmx_gmxx_bist_s cn63xx; - struct cvmx_gmxx_bist_s cn63xxp1; - struct cvmx_gmxx_bist_s cn66xx; - struct cvmx_gmxx_bist_s cn68xx; - struct cvmx_gmxx_bist_s cn68xxp1; - struct cvmx_gmxx_bist_s cnf71xx; -}; - -union cvmx_gmxx_bpid_mapx { - uint64_t u64; - struct cvmx_gmxx_bpid_mapx_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_17_63:47; - uint64_t status:1; - uint64_t reserved_9_15:7; - uint64_t val:1; - uint64_t reserved_6_7:2; - uint64_t bpid:6; -#else - uint64_t bpid:6; - uint64_t reserved_6_7:2; - uint64_t val:1; - uint64_t reserved_9_15:7; - uint64_t status:1; - uint64_t reserved_17_63:47; -#endif - } s; - struct cvmx_gmxx_bpid_mapx_s cn68xx; - struct cvmx_gmxx_bpid_mapx_s cn68xxp1; -}; - -union cvmx_gmxx_bpid_msk { - uint64_t u64; - struct cvmx_gmxx_bpid_msk_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_48_63:16; - uint64_t msk_or:16; - uint64_t reserved_16_31:16; - uint64_t msk_and:16; -#else - uint64_t msk_and:16; - uint64_t reserved_16_31:16; - uint64_t msk_or:16; - uint64_t reserved_48_63:16; -#endif - } s; - struct cvmx_gmxx_bpid_msk_s cn68xx; - struct cvmx_gmxx_bpid_msk_s cn68xxp1; -}; - -union cvmx_gmxx_clk_en { - uint64_t u64; - struct cvmx_gmxx_clk_en_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_1_63:63; - uint64_t clk_en:1; -#else - uint64_t clk_en:1; - uint64_t reserved_1_63:63; -#endif - } s; - struct cvmx_gmxx_clk_en_s cn52xx; - struct cvmx_gmxx_clk_en_s cn52xxp1; - struct cvmx_gmxx_clk_en_s cn56xx; - struct cvmx_gmxx_clk_en_s cn56xxp1; - struct cvmx_gmxx_clk_en_s cn61xx; - struct cvmx_gmxx_clk_en_s cn63xx; - struct cvmx_gmxx_clk_en_s cn63xxp1; - struct cvmx_gmxx_clk_en_s cn66xx; - struct cvmx_gmxx_clk_en_s cn68xx; - struct cvmx_gmxx_clk_en_s cn68xxp1; - struct cvmx_gmxx_clk_en_s cnf71xx; -}; - -union cvmx_gmxx_ebp_dis { - uint64_t u64; - struct cvmx_gmxx_ebp_dis_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t dis:16; -#else - uint64_t dis:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_gmxx_ebp_dis_s cn68xx; - struct cvmx_gmxx_ebp_dis_s cn68xxp1; -}; - -union cvmx_gmxx_ebp_msk { - uint64_t u64; - struct cvmx_gmxx_ebp_msk_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t msk:16; -#else - uint64_t msk:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_gmxx_ebp_msk_s cn68xx; - struct cvmx_gmxx_ebp_msk_s cn68xxp1; -}; - union cvmx_gmxx_hg2_control { uint64_t u64; struct cvmx_gmxx_hg2_control_s { @@ -2329,16 +357,6 @@ union cvmx_gmxx_hg2_control { uint64_t reserved_19_63:45; #endif } s; - struct cvmx_gmxx_hg2_control_s cn52xx; - struct cvmx_gmxx_hg2_control_s cn52xxp1; - struct cvmx_gmxx_hg2_control_s cn56xx; - struct cvmx_gmxx_hg2_control_s cn61xx; - struct cvmx_gmxx_hg2_control_s cn63xx; - struct cvmx_gmxx_hg2_control_s cn63xxp1; - struct cvmx_gmxx_hg2_control_s cn66xx; - struct cvmx_gmxx_hg2_control_s cn68xx; - struct cvmx_gmxx_hg2_control_s cn68xxp1; - struct cvmx_gmxx_hg2_control_s cnf71xx; }; union cvmx_gmxx_inf_mode { @@ -2392,9 +410,6 @@ union cvmx_gmxx_inf_mode { uint64_t reserved_2_63:62; #endif } cn31xx; - struct cvmx_gmxx_inf_mode_cn31xx cn38xx; - struct cvmx_gmxx_inf_mode_cn31xx cn38xxp2; - struct cvmx_gmxx_inf_mode_cn30xx cn50xx; struct cvmx_gmxx_inf_mode_cn52xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_10_63:54; @@ -2414,11 +429,6 @@ union cvmx_gmxx_inf_mode { uint64_t reserved_10_63:54; #endif } cn52xx; - struct cvmx_gmxx_inf_mode_cn52xx cn52xxp1; - struct cvmx_gmxx_inf_mode_cn52xx cn56xx; - struct cvmx_gmxx_inf_mode_cn52xx cn56xxp1; - struct cvmx_gmxx_inf_mode_cn31xx cn58xx; - struct cvmx_gmxx_inf_mode_cn31xx cn58xxp1; struct cvmx_gmxx_inf_mode_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_12_63:52; @@ -2438,8 +448,6 @@ union cvmx_gmxx_inf_mode { uint64_t reserved_12_63:52; #endif } cn61xx; - struct cvmx_gmxx_inf_mode_cn61xx cn63xx; - struct cvmx_gmxx_inf_mode_cn61xx cn63xxp1; struct cvmx_gmxx_inf_mode_cn66xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_20_63:44; @@ -2482,108 +490,6 @@ union cvmx_gmxx_inf_mode { uint64_t reserved_12_63:52; #endif } cn68xx; - struct cvmx_gmxx_inf_mode_cn68xx cn68xxp1; - struct cvmx_gmxx_inf_mode_cn61xx cnf71xx; -}; - -union cvmx_gmxx_nxa_adr { - uint64_t u64; - struct cvmx_gmxx_nxa_adr_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_23_63:41; - uint64_t pipe:7; - uint64_t reserved_6_15:10; - uint64_t prt:6; -#else - uint64_t prt:6; - uint64_t reserved_6_15:10; - uint64_t pipe:7; - uint64_t reserved_23_63:41; -#endif - } s; - struct cvmx_gmxx_nxa_adr_cn30xx { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_6_63:58; - uint64_t prt:6; -#else - uint64_t prt:6; - uint64_t reserved_6_63:58; -#endif - } cn30xx; - struct cvmx_gmxx_nxa_adr_cn30xx cn31xx; - struct cvmx_gmxx_nxa_adr_cn30xx cn38xx; - struct cvmx_gmxx_nxa_adr_cn30xx cn38xxp2; - struct cvmx_gmxx_nxa_adr_cn30xx cn50xx; - struct cvmx_gmxx_nxa_adr_cn30xx cn52xx; - struct cvmx_gmxx_nxa_adr_cn30xx cn52xxp1; - struct cvmx_gmxx_nxa_adr_cn30xx cn56xx; - struct cvmx_gmxx_nxa_adr_cn30xx cn56xxp1; - struct cvmx_gmxx_nxa_adr_cn30xx cn58xx; - struct cvmx_gmxx_nxa_adr_cn30xx cn58xxp1; - struct cvmx_gmxx_nxa_adr_cn30xx cn61xx; - struct cvmx_gmxx_nxa_adr_cn30xx cn63xx; - struct cvmx_gmxx_nxa_adr_cn30xx cn63xxp1; - struct cvmx_gmxx_nxa_adr_cn30xx cn66xx; - struct cvmx_gmxx_nxa_adr_s cn68xx; - struct cvmx_gmxx_nxa_adr_s cn68xxp1; - struct cvmx_gmxx_nxa_adr_cn30xx cnf71xx; -}; - -union cvmx_gmxx_pipe_status { - uint64_t u64; - struct cvmx_gmxx_pipe_status_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_20_63:44; - uint64_t ovr:4; - uint64_t reserved_12_15:4; - uint64_t bp:4; - uint64_t reserved_4_7:4; - uint64_t stop:4; -#else - uint64_t stop:4; - uint64_t reserved_4_7:4; - uint64_t bp:4; - uint64_t reserved_12_15:4; - uint64_t ovr:4; - uint64_t reserved_20_63:44; -#endif - } s; - struct cvmx_gmxx_pipe_status_s cn68xx; - struct cvmx_gmxx_pipe_status_s cn68xxp1; -}; - -union cvmx_gmxx_prtx_cbfc_ctl { - uint64_t u64; - struct cvmx_gmxx_prtx_cbfc_ctl_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t phys_en:16; - uint64_t logl_en:16; - uint64_t phys_bp:16; - uint64_t reserved_4_15:12; - uint64_t bck_en:1; - uint64_t drp_en:1; - uint64_t tx_en:1; - uint64_t rx_en:1; -#else - uint64_t rx_en:1; - uint64_t tx_en:1; - uint64_t drp_en:1; - uint64_t bck_en:1; - uint64_t reserved_4_15:12; - uint64_t phys_bp:16; - uint64_t logl_en:16; - uint64_t phys_en:16; -#endif - } s; - struct cvmx_gmxx_prtx_cbfc_ctl_s cn52xx; - struct cvmx_gmxx_prtx_cbfc_ctl_s cn56xx; - struct cvmx_gmxx_prtx_cbfc_ctl_s cn61xx; - struct cvmx_gmxx_prtx_cbfc_ctl_s cn63xx; - struct cvmx_gmxx_prtx_cbfc_ctl_s cn63xxp1; - struct cvmx_gmxx_prtx_cbfc_ctl_s cn66xx; - struct cvmx_gmxx_prtx_cbfc_ctl_s cn68xx; - struct cvmx_gmxx_prtx_cbfc_ctl_s cn68xxp1; - struct cvmx_gmxx_prtx_cbfc_ctl_s cnf71xx; }; union cvmx_gmxx_prtx_cfg { @@ -2632,10 +538,6 @@ union cvmx_gmxx_prtx_cfg { uint64_t reserved_4_63:60; #endif } cn30xx; - struct cvmx_gmxx_prtx_cfg_cn30xx cn31xx; - struct cvmx_gmxx_prtx_cfg_cn30xx cn38xx; - struct cvmx_gmxx_prtx_cfg_cn30xx cn38xxp2; - struct cvmx_gmxx_prtx_cfg_cn30xx cn50xx; struct cvmx_gmxx_prtx_cfg_cn52xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_14_63:50; @@ -2661,240 +563,6 @@ union cvmx_gmxx_prtx_cfg { uint64_t reserved_14_63:50; #endif } cn52xx; - struct cvmx_gmxx_prtx_cfg_cn52xx cn52xxp1; - struct cvmx_gmxx_prtx_cfg_cn52xx cn56xx; - struct cvmx_gmxx_prtx_cfg_cn52xx cn56xxp1; - struct cvmx_gmxx_prtx_cfg_cn30xx cn58xx; - struct cvmx_gmxx_prtx_cfg_cn30xx cn58xxp1; - struct cvmx_gmxx_prtx_cfg_cn52xx cn61xx; - struct cvmx_gmxx_prtx_cfg_cn52xx cn63xx; - struct cvmx_gmxx_prtx_cfg_cn52xx cn63xxp1; - struct cvmx_gmxx_prtx_cfg_cn52xx cn66xx; - struct cvmx_gmxx_prtx_cfg_s cn68xx; - struct cvmx_gmxx_prtx_cfg_s cn68xxp1; - struct cvmx_gmxx_prtx_cfg_cn52xx cnf71xx; -}; - -union cvmx_gmxx_rxx_adr_cam0 { - uint64_t u64; - struct cvmx_gmxx_rxx_adr_cam0_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t adr:64; -#else - uint64_t adr:64; -#endif - } s; - struct cvmx_gmxx_rxx_adr_cam0_s cn30xx; - struct cvmx_gmxx_rxx_adr_cam0_s cn31xx; - struct cvmx_gmxx_rxx_adr_cam0_s cn38xx; - struct cvmx_gmxx_rxx_adr_cam0_s cn38xxp2; - struct cvmx_gmxx_rxx_adr_cam0_s cn50xx; - struct cvmx_gmxx_rxx_adr_cam0_s cn52xx; - struct cvmx_gmxx_rxx_adr_cam0_s cn52xxp1; - struct cvmx_gmxx_rxx_adr_cam0_s cn56xx; - struct cvmx_gmxx_rxx_adr_cam0_s cn56xxp1; - struct cvmx_gmxx_rxx_adr_cam0_s cn58xx; - struct cvmx_gmxx_rxx_adr_cam0_s cn58xxp1; - struct cvmx_gmxx_rxx_adr_cam0_s cn61xx; - struct cvmx_gmxx_rxx_adr_cam0_s cn63xx; - struct cvmx_gmxx_rxx_adr_cam0_s cn63xxp1; - struct cvmx_gmxx_rxx_adr_cam0_s cn66xx; - struct cvmx_gmxx_rxx_adr_cam0_s cn68xx; - struct cvmx_gmxx_rxx_adr_cam0_s cn68xxp1; - struct cvmx_gmxx_rxx_adr_cam0_s cnf71xx; -}; - -union cvmx_gmxx_rxx_adr_cam1 { - uint64_t u64; - struct cvmx_gmxx_rxx_adr_cam1_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t adr:64; -#else - uint64_t adr:64; -#endif - } s; - struct cvmx_gmxx_rxx_adr_cam1_s cn30xx; - struct cvmx_gmxx_rxx_adr_cam1_s cn31xx; - struct cvmx_gmxx_rxx_adr_cam1_s cn38xx; - struct cvmx_gmxx_rxx_adr_cam1_s cn38xxp2; - struct cvmx_gmxx_rxx_adr_cam1_s cn50xx; - struct cvmx_gmxx_rxx_adr_cam1_s cn52xx; - struct cvmx_gmxx_rxx_adr_cam1_s cn52xxp1; - struct cvmx_gmxx_rxx_adr_cam1_s cn56xx; - struct cvmx_gmxx_rxx_adr_cam1_s cn56xxp1; - struct cvmx_gmxx_rxx_adr_cam1_s cn58xx; - struct cvmx_gmxx_rxx_adr_cam1_s cn58xxp1; - struct cvmx_gmxx_rxx_adr_cam1_s cn61xx; - struct cvmx_gmxx_rxx_adr_cam1_s cn63xx; - struct cvmx_gmxx_rxx_adr_cam1_s cn63xxp1; - struct cvmx_gmxx_rxx_adr_cam1_s cn66xx; - struct cvmx_gmxx_rxx_adr_cam1_s cn68xx; - struct cvmx_gmxx_rxx_adr_cam1_s cn68xxp1; - struct cvmx_gmxx_rxx_adr_cam1_s cnf71xx; -}; - -union cvmx_gmxx_rxx_adr_cam2 { - uint64_t u64; - struct cvmx_gmxx_rxx_adr_cam2_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t adr:64; -#else - uint64_t adr:64; -#endif - } s; - struct cvmx_gmxx_rxx_adr_cam2_s cn30xx; - struct cvmx_gmxx_rxx_adr_cam2_s cn31xx; - struct cvmx_gmxx_rxx_adr_cam2_s cn38xx; - struct cvmx_gmxx_rxx_adr_cam2_s cn38xxp2; - struct cvmx_gmxx_rxx_adr_cam2_s cn50xx; - struct cvmx_gmxx_rxx_adr_cam2_s cn52xx; - struct cvmx_gmxx_rxx_adr_cam2_s cn52xxp1; - struct cvmx_gmxx_rxx_adr_cam2_s cn56xx; - struct cvmx_gmxx_rxx_adr_cam2_s cn56xxp1; - struct cvmx_gmxx_rxx_adr_cam2_s cn58xx; - struct cvmx_gmxx_rxx_adr_cam2_s cn58xxp1; - struct cvmx_gmxx_rxx_adr_cam2_s cn61xx; - struct cvmx_gmxx_rxx_adr_cam2_s cn63xx; - struct cvmx_gmxx_rxx_adr_cam2_s cn63xxp1; - struct cvmx_gmxx_rxx_adr_cam2_s cn66xx; - struct cvmx_gmxx_rxx_adr_cam2_s cn68xx; - struct cvmx_gmxx_rxx_adr_cam2_s cn68xxp1; - struct cvmx_gmxx_rxx_adr_cam2_s cnf71xx; -}; - -union cvmx_gmxx_rxx_adr_cam3 { - uint64_t u64; - struct cvmx_gmxx_rxx_adr_cam3_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t adr:64; -#else - uint64_t adr:64; -#endif - } s; - struct cvmx_gmxx_rxx_adr_cam3_s cn30xx; - struct cvmx_gmxx_rxx_adr_cam3_s cn31xx; - struct cvmx_gmxx_rxx_adr_cam3_s cn38xx; - struct cvmx_gmxx_rxx_adr_cam3_s cn38xxp2; - struct cvmx_gmxx_rxx_adr_cam3_s cn50xx; - struct cvmx_gmxx_rxx_adr_cam3_s cn52xx; - struct cvmx_gmxx_rxx_adr_cam3_s cn52xxp1; - struct cvmx_gmxx_rxx_adr_cam3_s cn56xx; - struct cvmx_gmxx_rxx_adr_cam3_s cn56xxp1; - struct cvmx_gmxx_rxx_adr_cam3_s cn58xx; - struct cvmx_gmxx_rxx_adr_cam3_s cn58xxp1; - struct cvmx_gmxx_rxx_adr_cam3_s cn61xx; - struct cvmx_gmxx_rxx_adr_cam3_s cn63xx; - struct cvmx_gmxx_rxx_adr_cam3_s cn63xxp1; - struct cvmx_gmxx_rxx_adr_cam3_s cn66xx; - struct cvmx_gmxx_rxx_adr_cam3_s cn68xx; - struct cvmx_gmxx_rxx_adr_cam3_s cn68xxp1; - struct cvmx_gmxx_rxx_adr_cam3_s cnf71xx; -}; - -union cvmx_gmxx_rxx_adr_cam4 { - uint64_t u64; - struct cvmx_gmxx_rxx_adr_cam4_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t adr:64; -#else - uint64_t adr:64; -#endif - } s; - struct cvmx_gmxx_rxx_adr_cam4_s cn30xx; - struct cvmx_gmxx_rxx_adr_cam4_s cn31xx; - struct cvmx_gmxx_rxx_adr_cam4_s cn38xx; - struct cvmx_gmxx_rxx_adr_cam4_s cn38xxp2; - struct cvmx_gmxx_rxx_adr_cam4_s cn50xx; - struct cvmx_gmxx_rxx_adr_cam4_s cn52xx; - struct cvmx_gmxx_rxx_adr_cam4_s cn52xxp1; - struct cvmx_gmxx_rxx_adr_cam4_s cn56xx; - struct cvmx_gmxx_rxx_adr_cam4_s cn56xxp1; - struct cvmx_gmxx_rxx_adr_cam4_s cn58xx; - struct cvmx_gmxx_rxx_adr_cam4_s cn58xxp1; - struct cvmx_gmxx_rxx_adr_cam4_s cn61xx; - struct cvmx_gmxx_rxx_adr_cam4_s cn63xx; - struct cvmx_gmxx_rxx_adr_cam4_s cn63xxp1; - struct cvmx_gmxx_rxx_adr_cam4_s cn66xx; - struct cvmx_gmxx_rxx_adr_cam4_s cn68xx; - struct cvmx_gmxx_rxx_adr_cam4_s cn68xxp1; - struct cvmx_gmxx_rxx_adr_cam4_s cnf71xx; -}; - -union cvmx_gmxx_rxx_adr_cam5 { - uint64_t u64; - struct cvmx_gmxx_rxx_adr_cam5_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t adr:64; -#else - uint64_t adr:64; -#endif - } s; - struct cvmx_gmxx_rxx_adr_cam5_s cn30xx; - struct cvmx_gmxx_rxx_adr_cam5_s cn31xx; - struct cvmx_gmxx_rxx_adr_cam5_s cn38xx; - struct cvmx_gmxx_rxx_adr_cam5_s cn38xxp2; - struct cvmx_gmxx_rxx_adr_cam5_s cn50xx; - struct cvmx_gmxx_rxx_adr_cam5_s cn52xx; - struct cvmx_gmxx_rxx_adr_cam5_s cn52xxp1; - struct cvmx_gmxx_rxx_adr_cam5_s cn56xx; - struct cvmx_gmxx_rxx_adr_cam5_s cn56xxp1; - struct cvmx_gmxx_rxx_adr_cam5_s cn58xx; - struct cvmx_gmxx_rxx_adr_cam5_s cn58xxp1; - struct cvmx_gmxx_rxx_adr_cam5_s cn61xx; - struct cvmx_gmxx_rxx_adr_cam5_s cn63xx; - struct cvmx_gmxx_rxx_adr_cam5_s cn63xxp1; - struct cvmx_gmxx_rxx_adr_cam5_s cn66xx; - struct cvmx_gmxx_rxx_adr_cam5_s cn68xx; - struct cvmx_gmxx_rxx_adr_cam5_s cn68xxp1; - struct cvmx_gmxx_rxx_adr_cam5_s cnf71xx; -}; - -union cvmx_gmxx_rxx_adr_cam_all_en { - uint64_t u64; - struct cvmx_gmxx_rxx_adr_cam_all_en_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t en:32; -#else - uint64_t en:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_gmxx_rxx_adr_cam_all_en_s cn61xx; - struct cvmx_gmxx_rxx_adr_cam_all_en_s cn66xx; - struct cvmx_gmxx_rxx_adr_cam_all_en_s cn68xx; - struct cvmx_gmxx_rxx_adr_cam_all_en_s cnf71xx; -}; - -union cvmx_gmxx_rxx_adr_cam_en { - uint64_t u64; - struct cvmx_gmxx_rxx_adr_cam_en_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_8_63:56; - uint64_t en:8; -#else - uint64_t en:8; - uint64_t reserved_8_63:56; -#endif - } s; - struct cvmx_gmxx_rxx_adr_cam_en_s cn30xx; - struct cvmx_gmxx_rxx_adr_cam_en_s cn31xx; - struct cvmx_gmxx_rxx_adr_cam_en_s cn38xx; - struct cvmx_gmxx_rxx_adr_cam_en_s cn38xxp2; - struct cvmx_gmxx_rxx_adr_cam_en_s cn50xx; - struct cvmx_gmxx_rxx_adr_cam_en_s cn52xx; - struct cvmx_gmxx_rxx_adr_cam_en_s cn52xxp1; - struct cvmx_gmxx_rxx_adr_cam_en_s cn56xx; - struct cvmx_gmxx_rxx_adr_cam_en_s cn56xxp1; - struct cvmx_gmxx_rxx_adr_cam_en_s cn58xx; - struct cvmx_gmxx_rxx_adr_cam_en_s cn58xxp1; - struct cvmx_gmxx_rxx_adr_cam_en_s cn61xx; - struct cvmx_gmxx_rxx_adr_cam_en_s cn63xx; - struct cvmx_gmxx_rxx_adr_cam_en_s cn63xxp1; - struct cvmx_gmxx_rxx_adr_cam_en_s cn66xx; - struct cvmx_gmxx_rxx_adr_cam_en_s cn68xx; - struct cvmx_gmxx_rxx_adr_cam_en_s cn68xxp1; - struct cvmx_gmxx_rxx_adr_cam_en_s cnf71xx; }; union cvmx_gmxx_rxx_adr_ctl { @@ -2912,174 +580,6 @@ union cvmx_gmxx_rxx_adr_ctl { uint64_t reserved_4_63:60; #endif } s; - struct cvmx_gmxx_rxx_adr_ctl_s cn30xx; - struct cvmx_gmxx_rxx_adr_ctl_s cn31xx; - struct cvmx_gmxx_rxx_adr_ctl_s cn38xx; - struct cvmx_gmxx_rxx_adr_ctl_s cn38xxp2; - struct cvmx_gmxx_rxx_adr_ctl_s cn50xx; - struct cvmx_gmxx_rxx_adr_ctl_s cn52xx; - struct cvmx_gmxx_rxx_adr_ctl_s cn52xxp1; - struct cvmx_gmxx_rxx_adr_ctl_s cn56xx; - struct cvmx_gmxx_rxx_adr_ctl_s cn56xxp1; - struct cvmx_gmxx_rxx_adr_ctl_s cn58xx; - struct cvmx_gmxx_rxx_adr_ctl_s cn58xxp1; - struct cvmx_gmxx_rxx_adr_ctl_s cn61xx; - struct cvmx_gmxx_rxx_adr_ctl_s cn63xx; - struct cvmx_gmxx_rxx_adr_ctl_s cn63xxp1; - struct cvmx_gmxx_rxx_adr_ctl_s cn66xx; - struct cvmx_gmxx_rxx_adr_ctl_s cn68xx; - struct cvmx_gmxx_rxx_adr_ctl_s cn68xxp1; - struct cvmx_gmxx_rxx_adr_ctl_s cnf71xx; -}; - -union cvmx_gmxx_rxx_decision { - uint64_t u64; - struct cvmx_gmxx_rxx_decision_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_5_63:59; - uint64_t cnt:5; -#else - uint64_t cnt:5; - uint64_t reserved_5_63:59; -#endif - } s; - struct cvmx_gmxx_rxx_decision_s cn30xx; - struct cvmx_gmxx_rxx_decision_s cn31xx; - struct cvmx_gmxx_rxx_decision_s cn38xx; - struct cvmx_gmxx_rxx_decision_s cn38xxp2; - struct cvmx_gmxx_rxx_decision_s cn50xx; - struct cvmx_gmxx_rxx_decision_s cn52xx; - struct cvmx_gmxx_rxx_decision_s cn52xxp1; - struct cvmx_gmxx_rxx_decision_s cn56xx; - struct cvmx_gmxx_rxx_decision_s cn56xxp1; - struct cvmx_gmxx_rxx_decision_s cn58xx; - struct cvmx_gmxx_rxx_decision_s cn58xxp1; - struct cvmx_gmxx_rxx_decision_s cn61xx; - struct cvmx_gmxx_rxx_decision_s cn63xx; - struct cvmx_gmxx_rxx_decision_s cn63xxp1; - struct cvmx_gmxx_rxx_decision_s cn66xx; - struct cvmx_gmxx_rxx_decision_s cn68xx; - struct cvmx_gmxx_rxx_decision_s cn68xxp1; - struct cvmx_gmxx_rxx_decision_s cnf71xx; -}; - -union cvmx_gmxx_rxx_frm_chk { - uint64_t u64; - struct cvmx_gmxx_rxx_frm_chk_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_10_63:54; - uint64_t niberr:1; - uint64_t skperr:1; - uint64_t rcverr:1; - uint64_t lenerr:1; - uint64_t alnerr:1; - uint64_t fcserr:1; - uint64_t jabber:1; - uint64_t maxerr:1; - uint64_t carext:1; - uint64_t minerr:1; -#else - uint64_t minerr:1; - uint64_t carext:1; - uint64_t maxerr:1; - uint64_t jabber:1; - uint64_t fcserr:1; - uint64_t alnerr:1; - uint64_t lenerr:1; - uint64_t rcverr:1; - uint64_t skperr:1; - uint64_t niberr:1; - uint64_t reserved_10_63:54; -#endif - } s; - struct cvmx_gmxx_rxx_frm_chk_s cn30xx; - struct cvmx_gmxx_rxx_frm_chk_s cn31xx; - struct cvmx_gmxx_rxx_frm_chk_s cn38xx; - struct cvmx_gmxx_rxx_frm_chk_s cn38xxp2; - struct cvmx_gmxx_rxx_frm_chk_cn50xx { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_10_63:54; - uint64_t niberr:1; - uint64_t skperr:1; - uint64_t rcverr:1; - uint64_t reserved_6_6:1; - uint64_t alnerr:1; - uint64_t fcserr:1; - uint64_t jabber:1; - uint64_t reserved_2_2:1; - uint64_t carext:1; - uint64_t reserved_0_0:1; -#else - uint64_t reserved_0_0:1; - uint64_t carext:1; - uint64_t reserved_2_2:1; - uint64_t jabber:1; - uint64_t fcserr:1; - uint64_t alnerr:1; - uint64_t reserved_6_6:1; - uint64_t rcverr:1; - uint64_t skperr:1; - uint64_t niberr:1; - uint64_t reserved_10_63:54; -#endif - } cn50xx; - struct cvmx_gmxx_rxx_frm_chk_cn52xx { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_9_63:55; - uint64_t skperr:1; - uint64_t rcverr:1; - uint64_t reserved_5_6:2; - uint64_t fcserr:1; - uint64_t jabber:1; - uint64_t reserved_2_2:1; - uint64_t carext:1; - uint64_t reserved_0_0:1; -#else - uint64_t reserved_0_0:1; - uint64_t carext:1; - uint64_t reserved_2_2:1; - uint64_t jabber:1; - uint64_t fcserr:1; - uint64_t reserved_5_6:2; - uint64_t rcverr:1; - uint64_t skperr:1; - uint64_t reserved_9_63:55; -#endif - } cn52xx; - struct cvmx_gmxx_rxx_frm_chk_cn52xx cn52xxp1; - struct cvmx_gmxx_rxx_frm_chk_cn52xx cn56xx; - struct cvmx_gmxx_rxx_frm_chk_cn52xx cn56xxp1; - struct cvmx_gmxx_rxx_frm_chk_s cn58xx; - struct cvmx_gmxx_rxx_frm_chk_s cn58xxp1; - struct cvmx_gmxx_rxx_frm_chk_cn61xx { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_9_63:55; - uint64_t skperr:1; - uint64_t rcverr:1; - uint64_t reserved_5_6:2; - uint64_t fcserr:1; - uint64_t jabber:1; - uint64_t reserved_2_2:1; - uint64_t carext:1; - uint64_t minerr:1; -#else - uint64_t minerr:1; - uint64_t carext:1; - uint64_t reserved_2_2:1; - uint64_t jabber:1; - uint64_t fcserr:1; - uint64_t reserved_5_6:2; - uint64_t rcverr:1; - uint64_t skperr:1; - uint64_t reserved_9_63:55; -#endif - } cn61xx; - struct cvmx_gmxx_rxx_frm_chk_cn61xx cn63xx; - struct cvmx_gmxx_rxx_frm_chk_cn61xx cn63xxp1; - struct cvmx_gmxx_rxx_frm_chk_cn61xx cn66xx; - struct cvmx_gmxx_rxx_frm_chk_cn61xx cn68xx; - struct cvmx_gmxx_rxx_frm_chk_cn61xx cn68xxp1; - struct cvmx_gmxx_rxx_frm_chk_cn61xx cnf71xx; }; union cvmx_gmxx_rxx_frm_ctl { @@ -3165,8 +665,6 @@ union cvmx_gmxx_rxx_frm_ctl { uint64_t reserved_8_63:56; #endif } cn31xx; - struct cvmx_gmxx_rxx_frm_ctl_cn30xx cn38xx; - struct cvmx_gmxx_rxx_frm_ctl_cn31xx cn38xxp2; struct cvmx_gmxx_rxx_frm_ctl_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_11_63:53; @@ -3194,9 +692,6 @@ union cvmx_gmxx_rxx_frm_ctl { uint64_t reserved_11_63:53; #endif } cn50xx; - struct cvmx_gmxx_rxx_frm_ctl_cn50xx cn52xx; - struct cvmx_gmxx_rxx_frm_ctl_cn50xx cn52xxp1; - struct cvmx_gmxx_rxx_frm_ctl_cn50xx cn56xx; struct cvmx_gmxx_rxx_frm_ctl_cn56xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_10_63:54; @@ -3251,7 +746,6 @@ union cvmx_gmxx_rxx_frm_ctl { uint64_t reserved_11_63:53; #endif } cn58xx; - struct cvmx_gmxx_rxx_frm_ctl_cn30xx cn58xxp1; struct cvmx_gmxx_rxx_frm_ctl_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_13_63:51; @@ -3283,12 +777,6 @@ union cvmx_gmxx_rxx_frm_ctl { uint64_t reserved_13_63:51; #endif } cn61xx; - struct cvmx_gmxx_rxx_frm_ctl_cn61xx cn63xx; - struct cvmx_gmxx_rxx_frm_ctl_cn61xx cn63xxp1; - struct cvmx_gmxx_rxx_frm_ctl_cn61xx cn66xx; - struct cvmx_gmxx_rxx_frm_ctl_cn61xx cn68xx; - struct cvmx_gmxx_rxx_frm_ctl_cn61xx cn68xxp1; - struct cvmx_gmxx_rxx_frm_ctl_cn61xx cnf71xx; }; union cvmx_gmxx_rxx_frm_max { @@ -3302,12 +790,6 @@ union cvmx_gmxx_rxx_frm_max { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_gmxx_rxx_frm_max_s cn30xx; - struct cvmx_gmxx_rxx_frm_max_s cn31xx; - struct cvmx_gmxx_rxx_frm_max_s cn38xx; - struct cvmx_gmxx_rxx_frm_max_s cn38xxp2; - struct cvmx_gmxx_rxx_frm_max_s cn58xx; - struct cvmx_gmxx_rxx_frm_max_s cn58xxp1; }; union cvmx_gmxx_rxx_frm_min { @@ -3321,43 +803,6 @@ union cvmx_gmxx_rxx_frm_min { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_gmxx_rxx_frm_min_s cn30xx; - struct cvmx_gmxx_rxx_frm_min_s cn31xx; - struct cvmx_gmxx_rxx_frm_min_s cn38xx; - struct cvmx_gmxx_rxx_frm_min_s cn38xxp2; - struct cvmx_gmxx_rxx_frm_min_s cn58xx; - struct cvmx_gmxx_rxx_frm_min_s cn58xxp1; -}; - -union cvmx_gmxx_rxx_ifg { - uint64_t u64; - struct cvmx_gmxx_rxx_ifg_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t ifg:4; -#else - uint64_t ifg:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_gmxx_rxx_ifg_s cn30xx; - struct cvmx_gmxx_rxx_ifg_s cn31xx; - struct cvmx_gmxx_rxx_ifg_s cn38xx; - struct cvmx_gmxx_rxx_ifg_s cn38xxp2; - struct cvmx_gmxx_rxx_ifg_s cn50xx; - struct cvmx_gmxx_rxx_ifg_s cn52xx; - struct cvmx_gmxx_rxx_ifg_s cn52xxp1; - struct cvmx_gmxx_rxx_ifg_s cn56xx; - struct cvmx_gmxx_rxx_ifg_s cn56xxp1; - struct cvmx_gmxx_rxx_ifg_s cn58xx; - struct cvmx_gmxx_rxx_ifg_s cn58xxp1; - struct cvmx_gmxx_rxx_ifg_s cn61xx; - struct cvmx_gmxx_rxx_ifg_s cn63xx; - struct cvmx_gmxx_rxx_ifg_s cn63xxp1; - struct cvmx_gmxx_rxx_ifg_s cn66xx; - struct cvmx_gmxx_rxx_ifg_s cn68xx; - struct cvmx_gmxx_rxx_ifg_s cn68xxp1; - struct cvmx_gmxx_rxx_ifg_s cnf71xx; }; union cvmx_gmxx_rxx_int_en { @@ -3472,9 +917,6 @@ union cvmx_gmxx_rxx_int_en { uint64_t reserved_19_63:45; #endif } cn30xx; - struct cvmx_gmxx_rxx_int_en_cn30xx cn31xx; - struct cvmx_gmxx_rxx_int_en_cn30xx cn38xx; - struct cvmx_gmxx_rxx_int_en_cn30xx cn38xxp2; struct cvmx_gmxx_rxx_int_en_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_20_63:44; @@ -3581,8 +1023,6 @@ union cvmx_gmxx_rxx_int_en { uint64_t reserved_29_63:35; #endif } cn52xx; - struct cvmx_gmxx_rxx_int_en_cn52xx cn52xxp1; - struct cvmx_gmxx_rxx_int_en_cn52xx cn56xx; struct cvmx_gmxx_rxx_int_en_cn56xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_27_63:37; @@ -3685,7 +1125,6 @@ union cvmx_gmxx_rxx_int_en { uint64_t reserved_20_63:44; #endif } cn58xx; - struct cvmx_gmxx_rxx_int_en_cn58xx cn58xxp1; struct cvmx_gmxx_rxx_int_en_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_29_63:35; @@ -3745,12 +1184,6 @@ union cvmx_gmxx_rxx_int_en { uint64_t reserved_29_63:35; #endif } cn61xx; - struct cvmx_gmxx_rxx_int_en_cn61xx cn63xx; - struct cvmx_gmxx_rxx_int_en_cn61xx cn63xxp1; - struct cvmx_gmxx_rxx_int_en_cn61xx cn66xx; - struct cvmx_gmxx_rxx_int_en_cn61xx cn68xx; - struct cvmx_gmxx_rxx_int_en_cn61xx cn68xxp1; - struct cvmx_gmxx_rxx_int_en_cn61xx cnf71xx; }; union cvmx_gmxx_rxx_int_reg { @@ -3865,9 +1298,6 @@ union cvmx_gmxx_rxx_int_reg { uint64_t reserved_19_63:45; #endif } cn30xx; - struct cvmx_gmxx_rxx_int_reg_cn30xx cn31xx; - struct cvmx_gmxx_rxx_int_reg_cn30xx cn38xx; - struct cvmx_gmxx_rxx_int_reg_cn30xx cn38xxp2; struct cvmx_gmxx_rxx_int_reg_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_20_63:44; @@ -3974,8 +1404,6 @@ union cvmx_gmxx_rxx_int_reg { uint64_t reserved_29_63:35; #endif } cn52xx; - struct cvmx_gmxx_rxx_int_reg_cn52xx cn52xxp1; - struct cvmx_gmxx_rxx_int_reg_cn52xx cn56xx; struct cvmx_gmxx_rxx_int_reg_cn56xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_27_63:37; @@ -4078,7 +1506,6 @@ union cvmx_gmxx_rxx_int_reg { uint64_t reserved_20_63:44; #endif } cn58xx; - struct cvmx_gmxx_rxx_int_reg_cn58xx cn58xxp1; struct cvmx_gmxx_rxx_int_reg_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_29_63:35; @@ -4138,12 +1565,6 @@ union cvmx_gmxx_rxx_int_reg { uint64_t reserved_29_63:35; #endif } cn61xx; - struct cvmx_gmxx_rxx_int_reg_cn61xx cn63xx; - struct cvmx_gmxx_rxx_int_reg_cn61xx cn63xxp1; - struct cvmx_gmxx_rxx_int_reg_cn61xx cn66xx; - struct cvmx_gmxx_rxx_int_reg_cn61xx cn68xx; - struct cvmx_gmxx_rxx_int_reg_cn61xx cn68xxp1; - struct cvmx_gmxx_rxx_int_reg_cn61xx cnf71xx; }; union cvmx_gmxx_rxx_jabber { @@ -4157,51 +1578,6 @@ union cvmx_gmxx_rxx_jabber { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_gmxx_rxx_jabber_s cn30xx; - struct cvmx_gmxx_rxx_jabber_s cn31xx; - struct cvmx_gmxx_rxx_jabber_s cn38xx; - struct cvmx_gmxx_rxx_jabber_s cn38xxp2; - struct cvmx_gmxx_rxx_jabber_s cn50xx; - struct cvmx_gmxx_rxx_jabber_s cn52xx; - struct cvmx_gmxx_rxx_jabber_s cn52xxp1; - struct cvmx_gmxx_rxx_jabber_s cn56xx; - struct cvmx_gmxx_rxx_jabber_s cn56xxp1; - struct cvmx_gmxx_rxx_jabber_s cn58xx; - struct cvmx_gmxx_rxx_jabber_s cn58xxp1; - struct cvmx_gmxx_rxx_jabber_s cn61xx; - struct cvmx_gmxx_rxx_jabber_s cn63xx; - struct cvmx_gmxx_rxx_jabber_s cn63xxp1; - struct cvmx_gmxx_rxx_jabber_s cn66xx; - struct cvmx_gmxx_rxx_jabber_s cn68xx; - struct cvmx_gmxx_rxx_jabber_s cn68xxp1; - struct cvmx_gmxx_rxx_jabber_s cnf71xx; -}; - -union cvmx_gmxx_rxx_pause_drop_time { - uint64_t u64; - struct cvmx_gmxx_rxx_pause_drop_time_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t status:16; -#else - uint64_t status:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_gmxx_rxx_pause_drop_time_s cn50xx; - struct cvmx_gmxx_rxx_pause_drop_time_s cn52xx; - struct cvmx_gmxx_rxx_pause_drop_time_s cn52xxp1; - struct cvmx_gmxx_rxx_pause_drop_time_s cn56xx; - struct cvmx_gmxx_rxx_pause_drop_time_s cn56xxp1; - struct cvmx_gmxx_rxx_pause_drop_time_s cn58xx; - struct cvmx_gmxx_rxx_pause_drop_time_s cn58xxp1; - struct cvmx_gmxx_rxx_pause_drop_time_s cn61xx; - struct cvmx_gmxx_rxx_pause_drop_time_s cn63xx; - struct cvmx_gmxx_rxx_pause_drop_time_s cn63xxp1; - struct cvmx_gmxx_rxx_pause_drop_time_s cn66xx; - struct cvmx_gmxx_rxx_pause_drop_time_s cn68xx; - struct cvmx_gmxx_rxx_pause_drop_time_s cn68xxp1; - struct cvmx_gmxx_rxx_pause_drop_time_s cnf71xx; }; union cvmx_gmxx_rxx_rx_inbnd { @@ -4219,588 +1595,6 @@ union cvmx_gmxx_rxx_rx_inbnd { uint64_t reserved_4_63:60; #endif } s; - struct cvmx_gmxx_rxx_rx_inbnd_s cn30xx; - struct cvmx_gmxx_rxx_rx_inbnd_s cn31xx; - struct cvmx_gmxx_rxx_rx_inbnd_s cn38xx; - struct cvmx_gmxx_rxx_rx_inbnd_s cn38xxp2; - struct cvmx_gmxx_rxx_rx_inbnd_s cn50xx; - struct cvmx_gmxx_rxx_rx_inbnd_s cn58xx; - struct cvmx_gmxx_rxx_rx_inbnd_s cn58xxp1; -}; - -union cvmx_gmxx_rxx_stats_ctl { - uint64_t u64; - struct cvmx_gmxx_rxx_stats_ctl_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_1_63:63; - uint64_t rd_clr:1; -#else - uint64_t rd_clr:1; - uint64_t reserved_1_63:63; -#endif - } s; - struct cvmx_gmxx_rxx_stats_ctl_s cn30xx; - struct cvmx_gmxx_rxx_stats_ctl_s cn31xx; - struct cvmx_gmxx_rxx_stats_ctl_s cn38xx; - struct cvmx_gmxx_rxx_stats_ctl_s cn38xxp2; - struct cvmx_gmxx_rxx_stats_ctl_s cn50xx; - struct cvmx_gmxx_rxx_stats_ctl_s cn52xx; - struct cvmx_gmxx_rxx_stats_ctl_s cn52xxp1; - struct cvmx_gmxx_rxx_stats_ctl_s cn56xx; - struct cvmx_gmxx_rxx_stats_ctl_s cn56xxp1; - struct cvmx_gmxx_rxx_stats_ctl_s cn58xx; - struct cvmx_gmxx_rxx_stats_ctl_s cn58xxp1; - struct cvmx_gmxx_rxx_stats_ctl_s cn61xx; - struct cvmx_gmxx_rxx_stats_ctl_s cn63xx; - struct cvmx_gmxx_rxx_stats_ctl_s cn63xxp1; - struct cvmx_gmxx_rxx_stats_ctl_s cn66xx; - struct cvmx_gmxx_rxx_stats_ctl_s cn68xx; - struct cvmx_gmxx_rxx_stats_ctl_s cn68xxp1; - struct cvmx_gmxx_rxx_stats_ctl_s cnf71xx; -}; - -union cvmx_gmxx_rxx_stats_octs { - uint64_t u64; - struct cvmx_gmxx_rxx_stats_octs_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_48_63:16; - uint64_t cnt:48; -#else - uint64_t cnt:48; - uint64_t reserved_48_63:16; -#endif - } s; - struct cvmx_gmxx_rxx_stats_octs_s cn30xx; - struct cvmx_gmxx_rxx_stats_octs_s cn31xx; - struct cvmx_gmxx_rxx_stats_octs_s cn38xx; - struct cvmx_gmxx_rxx_stats_octs_s cn38xxp2; - struct cvmx_gmxx_rxx_stats_octs_s cn50xx; - struct cvmx_gmxx_rxx_stats_octs_s cn52xx; - struct cvmx_gmxx_rxx_stats_octs_s cn52xxp1; - struct cvmx_gmxx_rxx_stats_octs_s cn56xx; - struct cvmx_gmxx_rxx_stats_octs_s cn56xxp1; - struct cvmx_gmxx_rxx_stats_octs_s cn58xx; - struct cvmx_gmxx_rxx_stats_octs_s cn58xxp1; - struct cvmx_gmxx_rxx_stats_octs_s cn61xx; - struct cvmx_gmxx_rxx_stats_octs_s cn63xx; - struct cvmx_gmxx_rxx_stats_octs_s cn63xxp1; - struct cvmx_gmxx_rxx_stats_octs_s cn66xx; - struct cvmx_gmxx_rxx_stats_octs_s cn68xx; - struct cvmx_gmxx_rxx_stats_octs_s cn68xxp1; - struct cvmx_gmxx_rxx_stats_octs_s cnf71xx; -}; - -union cvmx_gmxx_rxx_stats_octs_ctl { - uint64_t u64; - struct cvmx_gmxx_rxx_stats_octs_ctl_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_48_63:16; - uint64_t cnt:48; -#else - uint64_t cnt:48; - uint64_t reserved_48_63:16; -#endif - } s; - struct cvmx_gmxx_rxx_stats_octs_ctl_s cn30xx; - struct cvmx_gmxx_rxx_stats_octs_ctl_s cn31xx; - struct cvmx_gmxx_rxx_stats_octs_ctl_s cn38xx; - struct cvmx_gmxx_rxx_stats_octs_ctl_s cn38xxp2; - struct cvmx_gmxx_rxx_stats_octs_ctl_s cn50xx; - struct cvmx_gmxx_rxx_stats_octs_ctl_s cn52xx; - struct cvmx_gmxx_rxx_stats_octs_ctl_s cn52xxp1; - struct cvmx_gmxx_rxx_stats_octs_ctl_s cn56xx; - struct cvmx_gmxx_rxx_stats_octs_ctl_s cn56xxp1; - struct cvmx_gmxx_rxx_stats_octs_ctl_s cn58xx; - struct cvmx_gmxx_rxx_stats_octs_ctl_s cn58xxp1; - struct cvmx_gmxx_rxx_stats_octs_ctl_s cn61xx; - struct cvmx_gmxx_rxx_stats_octs_ctl_s cn63xx; - struct cvmx_gmxx_rxx_stats_octs_ctl_s cn63xxp1; - struct cvmx_gmxx_rxx_stats_octs_ctl_s cn66xx; - struct cvmx_gmxx_rxx_stats_octs_ctl_s cn68xx; - struct cvmx_gmxx_rxx_stats_octs_ctl_s cn68xxp1; - struct cvmx_gmxx_rxx_stats_octs_ctl_s cnf71xx; -}; - -union cvmx_gmxx_rxx_stats_octs_dmac { - uint64_t u64; - struct cvmx_gmxx_rxx_stats_octs_dmac_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_48_63:16; - uint64_t cnt:48; -#else - uint64_t cnt:48; - uint64_t reserved_48_63:16; -#endif - } s; - struct cvmx_gmxx_rxx_stats_octs_dmac_s cn30xx; - struct cvmx_gmxx_rxx_stats_octs_dmac_s cn31xx; - struct cvmx_gmxx_rxx_stats_octs_dmac_s cn38xx; - struct cvmx_gmxx_rxx_stats_octs_dmac_s cn38xxp2; - struct cvmx_gmxx_rxx_stats_octs_dmac_s cn50xx; - struct cvmx_gmxx_rxx_stats_octs_dmac_s cn52xx; - struct cvmx_gmxx_rxx_stats_octs_dmac_s cn52xxp1; - struct cvmx_gmxx_rxx_stats_octs_dmac_s cn56xx; - struct cvmx_gmxx_rxx_stats_octs_dmac_s cn56xxp1; - struct cvmx_gmxx_rxx_stats_octs_dmac_s cn58xx; - struct cvmx_gmxx_rxx_stats_octs_dmac_s cn58xxp1; - struct cvmx_gmxx_rxx_stats_octs_dmac_s cn61xx; - struct cvmx_gmxx_rxx_stats_octs_dmac_s cn63xx; - struct cvmx_gmxx_rxx_stats_octs_dmac_s cn63xxp1; - struct cvmx_gmxx_rxx_stats_octs_dmac_s cn66xx; - struct cvmx_gmxx_rxx_stats_octs_dmac_s cn68xx; - struct cvmx_gmxx_rxx_stats_octs_dmac_s cn68xxp1; - struct cvmx_gmxx_rxx_stats_octs_dmac_s cnf71xx; -}; - -union cvmx_gmxx_rxx_stats_octs_drp { - uint64_t u64; - struct cvmx_gmxx_rxx_stats_octs_drp_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_48_63:16; - uint64_t cnt:48; -#else - uint64_t cnt:48; - uint64_t reserved_48_63:16; -#endif - } s; - struct cvmx_gmxx_rxx_stats_octs_drp_s cn30xx; - struct cvmx_gmxx_rxx_stats_octs_drp_s cn31xx; - struct cvmx_gmxx_rxx_stats_octs_drp_s cn38xx; - struct cvmx_gmxx_rxx_stats_octs_drp_s cn38xxp2; - struct cvmx_gmxx_rxx_stats_octs_drp_s cn50xx; - struct cvmx_gmxx_rxx_stats_octs_drp_s cn52xx; - struct cvmx_gmxx_rxx_stats_octs_drp_s cn52xxp1; - struct cvmx_gmxx_rxx_stats_octs_drp_s cn56xx; - struct cvmx_gmxx_rxx_stats_octs_drp_s cn56xxp1; - struct cvmx_gmxx_rxx_stats_octs_drp_s cn58xx; - struct cvmx_gmxx_rxx_stats_octs_drp_s cn58xxp1; - struct cvmx_gmxx_rxx_stats_octs_drp_s cn61xx; - struct cvmx_gmxx_rxx_stats_octs_drp_s cn63xx; - struct cvmx_gmxx_rxx_stats_octs_drp_s cn63xxp1; - struct cvmx_gmxx_rxx_stats_octs_drp_s cn66xx; - struct cvmx_gmxx_rxx_stats_octs_drp_s cn68xx; - struct cvmx_gmxx_rxx_stats_octs_drp_s cn68xxp1; - struct cvmx_gmxx_rxx_stats_octs_drp_s cnf71xx; -}; - -union cvmx_gmxx_rxx_stats_pkts { - uint64_t u64; - struct cvmx_gmxx_rxx_stats_pkts_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t cnt:32; -#else - uint64_t cnt:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_gmxx_rxx_stats_pkts_s cn30xx; - struct cvmx_gmxx_rxx_stats_pkts_s cn31xx; - struct cvmx_gmxx_rxx_stats_pkts_s cn38xx; - struct cvmx_gmxx_rxx_stats_pkts_s cn38xxp2; - struct cvmx_gmxx_rxx_stats_pkts_s cn50xx; - struct cvmx_gmxx_rxx_stats_pkts_s cn52xx; - struct cvmx_gmxx_rxx_stats_pkts_s cn52xxp1; - struct cvmx_gmxx_rxx_stats_pkts_s cn56xx; - struct cvmx_gmxx_rxx_stats_pkts_s cn56xxp1; - struct cvmx_gmxx_rxx_stats_pkts_s cn58xx; - struct cvmx_gmxx_rxx_stats_pkts_s cn58xxp1; - struct cvmx_gmxx_rxx_stats_pkts_s cn61xx; - struct cvmx_gmxx_rxx_stats_pkts_s cn63xx; - struct cvmx_gmxx_rxx_stats_pkts_s cn63xxp1; - struct cvmx_gmxx_rxx_stats_pkts_s cn66xx; - struct cvmx_gmxx_rxx_stats_pkts_s cn68xx; - struct cvmx_gmxx_rxx_stats_pkts_s cn68xxp1; - struct cvmx_gmxx_rxx_stats_pkts_s cnf71xx; -}; - -union cvmx_gmxx_rxx_stats_pkts_bad { - uint64_t u64; - struct cvmx_gmxx_rxx_stats_pkts_bad_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t cnt:32; -#else - uint64_t cnt:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_gmxx_rxx_stats_pkts_bad_s cn30xx; - struct cvmx_gmxx_rxx_stats_pkts_bad_s cn31xx; - struct cvmx_gmxx_rxx_stats_pkts_bad_s cn38xx; - struct cvmx_gmxx_rxx_stats_pkts_bad_s cn38xxp2; - struct cvmx_gmxx_rxx_stats_pkts_bad_s cn50xx; - struct cvmx_gmxx_rxx_stats_pkts_bad_s cn52xx; - struct cvmx_gmxx_rxx_stats_pkts_bad_s cn52xxp1; - struct cvmx_gmxx_rxx_stats_pkts_bad_s cn56xx; - struct cvmx_gmxx_rxx_stats_pkts_bad_s cn56xxp1; - struct cvmx_gmxx_rxx_stats_pkts_bad_s cn58xx; - struct cvmx_gmxx_rxx_stats_pkts_bad_s cn58xxp1; - struct cvmx_gmxx_rxx_stats_pkts_bad_s cn61xx; - struct cvmx_gmxx_rxx_stats_pkts_bad_s cn63xx; - struct cvmx_gmxx_rxx_stats_pkts_bad_s cn63xxp1; - struct cvmx_gmxx_rxx_stats_pkts_bad_s cn66xx; - struct cvmx_gmxx_rxx_stats_pkts_bad_s cn68xx; - struct cvmx_gmxx_rxx_stats_pkts_bad_s cn68xxp1; - struct cvmx_gmxx_rxx_stats_pkts_bad_s cnf71xx; -}; - -union cvmx_gmxx_rxx_stats_pkts_ctl { - uint64_t u64; - struct cvmx_gmxx_rxx_stats_pkts_ctl_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t cnt:32; -#else - uint64_t cnt:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_gmxx_rxx_stats_pkts_ctl_s cn30xx; - struct cvmx_gmxx_rxx_stats_pkts_ctl_s cn31xx; - struct cvmx_gmxx_rxx_stats_pkts_ctl_s cn38xx; - struct cvmx_gmxx_rxx_stats_pkts_ctl_s cn38xxp2; - struct cvmx_gmxx_rxx_stats_pkts_ctl_s cn50xx; - struct cvmx_gmxx_rxx_stats_pkts_ctl_s cn52xx; - struct cvmx_gmxx_rxx_stats_pkts_ctl_s cn52xxp1; - struct cvmx_gmxx_rxx_stats_pkts_ctl_s cn56xx; - struct cvmx_gmxx_rxx_stats_pkts_ctl_s cn56xxp1; - struct cvmx_gmxx_rxx_stats_pkts_ctl_s cn58xx; - struct cvmx_gmxx_rxx_stats_pkts_ctl_s cn58xxp1; - struct cvmx_gmxx_rxx_stats_pkts_ctl_s cn61xx; - struct cvmx_gmxx_rxx_stats_pkts_ctl_s cn63xx; - struct cvmx_gmxx_rxx_stats_pkts_ctl_s cn63xxp1; - struct cvmx_gmxx_rxx_stats_pkts_ctl_s cn66xx; - struct cvmx_gmxx_rxx_stats_pkts_ctl_s cn68xx; - struct cvmx_gmxx_rxx_stats_pkts_ctl_s cn68xxp1; - struct cvmx_gmxx_rxx_stats_pkts_ctl_s cnf71xx; -}; - -union cvmx_gmxx_rxx_stats_pkts_dmac { - uint64_t u64; - struct cvmx_gmxx_rxx_stats_pkts_dmac_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t cnt:32; -#else - uint64_t cnt:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_gmxx_rxx_stats_pkts_dmac_s cn30xx; - struct cvmx_gmxx_rxx_stats_pkts_dmac_s cn31xx; - struct cvmx_gmxx_rxx_stats_pkts_dmac_s cn38xx; - struct cvmx_gmxx_rxx_stats_pkts_dmac_s cn38xxp2; - struct cvmx_gmxx_rxx_stats_pkts_dmac_s cn50xx; - struct cvmx_gmxx_rxx_stats_pkts_dmac_s cn52xx; - struct cvmx_gmxx_rxx_stats_pkts_dmac_s cn52xxp1; - struct cvmx_gmxx_rxx_stats_pkts_dmac_s cn56xx; - struct cvmx_gmxx_rxx_stats_pkts_dmac_s cn56xxp1; - struct cvmx_gmxx_rxx_stats_pkts_dmac_s cn58xx; - struct cvmx_gmxx_rxx_stats_pkts_dmac_s cn58xxp1; - struct cvmx_gmxx_rxx_stats_pkts_dmac_s cn61xx; - struct cvmx_gmxx_rxx_stats_pkts_dmac_s cn63xx; - struct cvmx_gmxx_rxx_stats_pkts_dmac_s cn63xxp1; - struct cvmx_gmxx_rxx_stats_pkts_dmac_s cn66xx; - struct cvmx_gmxx_rxx_stats_pkts_dmac_s cn68xx; - struct cvmx_gmxx_rxx_stats_pkts_dmac_s cn68xxp1; - struct cvmx_gmxx_rxx_stats_pkts_dmac_s cnf71xx; -}; - -union cvmx_gmxx_rxx_stats_pkts_drp { - uint64_t u64; - struct cvmx_gmxx_rxx_stats_pkts_drp_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t cnt:32; -#else - uint64_t cnt:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_gmxx_rxx_stats_pkts_drp_s cn30xx; - struct cvmx_gmxx_rxx_stats_pkts_drp_s cn31xx; - struct cvmx_gmxx_rxx_stats_pkts_drp_s cn38xx; - struct cvmx_gmxx_rxx_stats_pkts_drp_s cn38xxp2; - struct cvmx_gmxx_rxx_stats_pkts_drp_s cn50xx; - struct cvmx_gmxx_rxx_stats_pkts_drp_s cn52xx; - struct cvmx_gmxx_rxx_stats_pkts_drp_s cn52xxp1; - struct cvmx_gmxx_rxx_stats_pkts_drp_s cn56xx; - struct cvmx_gmxx_rxx_stats_pkts_drp_s cn56xxp1; - struct cvmx_gmxx_rxx_stats_pkts_drp_s cn58xx; - struct cvmx_gmxx_rxx_stats_pkts_drp_s cn58xxp1; - struct cvmx_gmxx_rxx_stats_pkts_drp_s cn61xx; - struct cvmx_gmxx_rxx_stats_pkts_drp_s cn63xx; - struct cvmx_gmxx_rxx_stats_pkts_drp_s cn63xxp1; - struct cvmx_gmxx_rxx_stats_pkts_drp_s cn66xx; - struct cvmx_gmxx_rxx_stats_pkts_drp_s cn68xx; - struct cvmx_gmxx_rxx_stats_pkts_drp_s cn68xxp1; - struct cvmx_gmxx_rxx_stats_pkts_drp_s cnf71xx; -}; - -union cvmx_gmxx_rxx_udd_skp { - uint64_t u64; - struct cvmx_gmxx_rxx_udd_skp_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_9_63:55; - uint64_t fcssel:1; - uint64_t reserved_7_7:1; - uint64_t len:7; -#else - uint64_t len:7; - uint64_t reserved_7_7:1; - uint64_t fcssel:1; - uint64_t reserved_9_63:55; -#endif - } s; - struct cvmx_gmxx_rxx_udd_skp_s cn30xx; - struct cvmx_gmxx_rxx_udd_skp_s cn31xx; - struct cvmx_gmxx_rxx_udd_skp_s cn38xx; - struct cvmx_gmxx_rxx_udd_skp_s cn38xxp2; - struct cvmx_gmxx_rxx_udd_skp_s cn50xx; - struct cvmx_gmxx_rxx_udd_skp_s cn52xx; - struct cvmx_gmxx_rxx_udd_skp_s cn52xxp1; - struct cvmx_gmxx_rxx_udd_skp_s cn56xx; - struct cvmx_gmxx_rxx_udd_skp_s cn56xxp1; - struct cvmx_gmxx_rxx_udd_skp_s cn58xx; - struct cvmx_gmxx_rxx_udd_skp_s cn58xxp1; - struct cvmx_gmxx_rxx_udd_skp_s cn61xx; - struct cvmx_gmxx_rxx_udd_skp_s cn63xx; - struct cvmx_gmxx_rxx_udd_skp_s cn63xxp1; - struct cvmx_gmxx_rxx_udd_skp_s cn66xx; - struct cvmx_gmxx_rxx_udd_skp_s cn68xx; - struct cvmx_gmxx_rxx_udd_skp_s cn68xxp1; - struct cvmx_gmxx_rxx_udd_skp_s cnf71xx; -}; - -union cvmx_gmxx_rx_bp_dropx { - uint64_t u64; - struct cvmx_gmxx_rx_bp_dropx_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_6_63:58; - uint64_t mark:6; -#else - uint64_t mark:6; - uint64_t reserved_6_63:58; -#endif - } s; - struct cvmx_gmxx_rx_bp_dropx_s cn30xx; - struct cvmx_gmxx_rx_bp_dropx_s cn31xx; - struct cvmx_gmxx_rx_bp_dropx_s cn38xx; - struct cvmx_gmxx_rx_bp_dropx_s cn38xxp2; - struct cvmx_gmxx_rx_bp_dropx_s cn50xx; - struct cvmx_gmxx_rx_bp_dropx_s cn52xx; - struct cvmx_gmxx_rx_bp_dropx_s cn52xxp1; - struct cvmx_gmxx_rx_bp_dropx_s cn56xx; - struct cvmx_gmxx_rx_bp_dropx_s cn56xxp1; - struct cvmx_gmxx_rx_bp_dropx_s cn58xx; - struct cvmx_gmxx_rx_bp_dropx_s cn58xxp1; - struct cvmx_gmxx_rx_bp_dropx_s cn61xx; - struct cvmx_gmxx_rx_bp_dropx_s cn63xx; - struct cvmx_gmxx_rx_bp_dropx_s cn63xxp1; - struct cvmx_gmxx_rx_bp_dropx_s cn66xx; - struct cvmx_gmxx_rx_bp_dropx_s cn68xx; - struct cvmx_gmxx_rx_bp_dropx_s cn68xxp1; - struct cvmx_gmxx_rx_bp_dropx_s cnf71xx; -}; - -union cvmx_gmxx_rx_bp_offx { - uint64_t u64; - struct cvmx_gmxx_rx_bp_offx_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_6_63:58; - uint64_t mark:6; -#else - uint64_t mark:6; - uint64_t reserved_6_63:58; -#endif - } s; - struct cvmx_gmxx_rx_bp_offx_s cn30xx; - struct cvmx_gmxx_rx_bp_offx_s cn31xx; - struct cvmx_gmxx_rx_bp_offx_s cn38xx; - struct cvmx_gmxx_rx_bp_offx_s cn38xxp2; - struct cvmx_gmxx_rx_bp_offx_s cn50xx; - struct cvmx_gmxx_rx_bp_offx_s cn52xx; - struct cvmx_gmxx_rx_bp_offx_s cn52xxp1; - struct cvmx_gmxx_rx_bp_offx_s cn56xx; - struct cvmx_gmxx_rx_bp_offx_s cn56xxp1; - struct cvmx_gmxx_rx_bp_offx_s cn58xx; - struct cvmx_gmxx_rx_bp_offx_s cn58xxp1; - struct cvmx_gmxx_rx_bp_offx_s cn61xx; - struct cvmx_gmxx_rx_bp_offx_s cn63xx; - struct cvmx_gmxx_rx_bp_offx_s cn63xxp1; - struct cvmx_gmxx_rx_bp_offx_s cn66xx; - struct cvmx_gmxx_rx_bp_offx_s cn68xx; - struct cvmx_gmxx_rx_bp_offx_s cn68xxp1; - struct cvmx_gmxx_rx_bp_offx_s cnf71xx; -}; - -union cvmx_gmxx_rx_bp_onx { - uint64_t u64; - struct cvmx_gmxx_rx_bp_onx_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_11_63:53; - uint64_t mark:11; -#else - uint64_t mark:11; - uint64_t reserved_11_63:53; -#endif - } s; - struct cvmx_gmxx_rx_bp_onx_cn30xx { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_9_63:55; - uint64_t mark:9; -#else - uint64_t mark:9; - uint64_t reserved_9_63:55; -#endif - } cn30xx; - struct cvmx_gmxx_rx_bp_onx_cn30xx cn31xx; - struct cvmx_gmxx_rx_bp_onx_cn30xx cn38xx; - struct cvmx_gmxx_rx_bp_onx_cn30xx cn38xxp2; - struct cvmx_gmxx_rx_bp_onx_cn30xx cn50xx; - struct cvmx_gmxx_rx_bp_onx_cn30xx cn52xx; - struct cvmx_gmxx_rx_bp_onx_cn30xx cn52xxp1; - struct cvmx_gmxx_rx_bp_onx_cn30xx cn56xx; - struct cvmx_gmxx_rx_bp_onx_cn30xx cn56xxp1; - struct cvmx_gmxx_rx_bp_onx_cn30xx cn58xx; - struct cvmx_gmxx_rx_bp_onx_cn30xx cn58xxp1; - struct cvmx_gmxx_rx_bp_onx_cn30xx cn61xx; - struct cvmx_gmxx_rx_bp_onx_cn30xx cn63xx; - struct cvmx_gmxx_rx_bp_onx_cn30xx cn63xxp1; - struct cvmx_gmxx_rx_bp_onx_cn30xx cn66xx; - struct cvmx_gmxx_rx_bp_onx_s cn68xx; - struct cvmx_gmxx_rx_bp_onx_s cn68xxp1; - struct cvmx_gmxx_rx_bp_onx_cn30xx cnf71xx; -}; - -union cvmx_gmxx_rx_hg2_status { - uint64_t u64; - struct cvmx_gmxx_rx_hg2_status_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_48_63:16; - uint64_t phtim2go:16; - uint64_t xof:16; - uint64_t lgtim2go:16; -#else - uint64_t lgtim2go:16; - uint64_t xof:16; - uint64_t phtim2go:16; - uint64_t reserved_48_63:16; -#endif - } s; - struct cvmx_gmxx_rx_hg2_status_s cn52xx; - struct cvmx_gmxx_rx_hg2_status_s cn52xxp1; - struct cvmx_gmxx_rx_hg2_status_s cn56xx; - struct cvmx_gmxx_rx_hg2_status_s cn61xx; - struct cvmx_gmxx_rx_hg2_status_s cn63xx; - struct cvmx_gmxx_rx_hg2_status_s cn63xxp1; - struct cvmx_gmxx_rx_hg2_status_s cn66xx; - struct cvmx_gmxx_rx_hg2_status_s cn68xx; - struct cvmx_gmxx_rx_hg2_status_s cn68xxp1; - struct cvmx_gmxx_rx_hg2_status_s cnf71xx; -}; - -union cvmx_gmxx_rx_pass_en { - uint64_t u64; - struct cvmx_gmxx_rx_pass_en_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t en:16; -#else - uint64_t en:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_gmxx_rx_pass_en_s cn38xx; - struct cvmx_gmxx_rx_pass_en_s cn38xxp2; - struct cvmx_gmxx_rx_pass_en_s cn58xx; - struct cvmx_gmxx_rx_pass_en_s cn58xxp1; -}; - -union cvmx_gmxx_rx_pass_mapx { - uint64_t u64; - struct cvmx_gmxx_rx_pass_mapx_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t dprt:4; -#else - uint64_t dprt:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_gmxx_rx_pass_mapx_s cn38xx; - struct cvmx_gmxx_rx_pass_mapx_s cn38xxp2; - struct cvmx_gmxx_rx_pass_mapx_s cn58xx; - struct cvmx_gmxx_rx_pass_mapx_s cn58xxp1; -}; - -union cvmx_gmxx_rx_prt_info { - uint64_t u64; - struct cvmx_gmxx_rx_prt_info_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t drop:16; - uint64_t commit:16; -#else - uint64_t commit:16; - uint64_t drop:16; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_gmxx_rx_prt_info_cn30xx { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_19_63:45; - uint64_t drop:3; - uint64_t reserved_3_15:13; - uint64_t commit:3; -#else - uint64_t commit:3; - uint64_t reserved_3_15:13; - uint64_t drop:3; - uint64_t reserved_19_63:45; -#endif - } cn30xx; - struct cvmx_gmxx_rx_prt_info_cn30xx cn31xx; - struct cvmx_gmxx_rx_prt_info_s cn38xx; - struct cvmx_gmxx_rx_prt_info_cn30xx cn50xx; - struct cvmx_gmxx_rx_prt_info_cn52xx { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_20_63:44; - uint64_t drop:4; - uint64_t reserved_4_15:12; - uint64_t commit:4; -#else - uint64_t commit:4; - uint64_t reserved_4_15:12; - uint64_t drop:4; - uint64_t reserved_20_63:44; -#endif - } cn52xx; - struct cvmx_gmxx_rx_prt_info_cn52xx cn52xxp1; - struct cvmx_gmxx_rx_prt_info_cn52xx cn56xx; - struct cvmx_gmxx_rx_prt_info_cn52xx cn56xxp1; - struct cvmx_gmxx_rx_prt_info_s cn58xx; - struct cvmx_gmxx_rx_prt_info_s cn58xxp1; - struct cvmx_gmxx_rx_prt_info_cn52xx cn61xx; - struct cvmx_gmxx_rx_prt_info_cn52xx cn63xx; - struct cvmx_gmxx_rx_prt_info_cn52xx cn63xxp1; - struct cvmx_gmxx_rx_prt_info_cn52xx cn66xx; - struct cvmx_gmxx_rx_prt_info_cn52xx cn68xx; - struct cvmx_gmxx_rx_prt_info_cn52xx cn68xxp1; - struct cvmx_gmxx_rx_prt_info_cnf71xx { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_18_63:46; - uint64_t drop:2; - uint64_t reserved_2_15:14; - uint64_t commit:2; -#else - uint64_t commit:2; - uint64_t reserved_2_15:14; - uint64_t drop:2; - uint64_t reserved_18_63:46; -#endif - } cnf71xx; }; union cvmx_gmxx_rx_prts { @@ -4814,74 +1608,6 @@ union cvmx_gmxx_rx_prts { uint64_t reserved_3_63:61; #endif } s; - struct cvmx_gmxx_rx_prts_s cn30xx; - struct cvmx_gmxx_rx_prts_s cn31xx; - struct cvmx_gmxx_rx_prts_s cn38xx; - struct cvmx_gmxx_rx_prts_s cn38xxp2; - struct cvmx_gmxx_rx_prts_s cn50xx; - struct cvmx_gmxx_rx_prts_s cn52xx; - struct cvmx_gmxx_rx_prts_s cn52xxp1; - struct cvmx_gmxx_rx_prts_s cn56xx; - struct cvmx_gmxx_rx_prts_s cn56xxp1; - struct cvmx_gmxx_rx_prts_s cn58xx; - struct cvmx_gmxx_rx_prts_s cn58xxp1; - struct cvmx_gmxx_rx_prts_s cn61xx; - struct cvmx_gmxx_rx_prts_s cn63xx; - struct cvmx_gmxx_rx_prts_s cn63xxp1; - struct cvmx_gmxx_rx_prts_s cn66xx; - struct cvmx_gmxx_rx_prts_s cn68xx; - struct cvmx_gmxx_rx_prts_s cn68xxp1; - struct cvmx_gmxx_rx_prts_s cnf71xx; -}; - -union cvmx_gmxx_rx_tx_status { - uint64_t u64; - struct cvmx_gmxx_rx_tx_status_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_7_63:57; - uint64_t tx:3; - uint64_t reserved_3_3:1; - uint64_t rx:3; -#else - uint64_t rx:3; - uint64_t reserved_3_3:1; - uint64_t tx:3; - uint64_t reserved_7_63:57; -#endif - } s; - struct cvmx_gmxx_rx_tx_status_s cn30xx; - struct cvmx_gmxx_rx_tx_status_s cn31xx; - struct cvmx_gmxx_rx_tx_status_s cn50xx; -}; - -union cvmx_gmxx_rx_xaui_bad_col { - uint64_t u64; - struct cvmx_gmxx_rx_xaui_bad_col_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_40_63:24; - uint64_t val:1; - uint64_t state:3; - uint64_t lane_rxc:4; - uint64_t lane_rxd:32; -#else - uint64_t lane_rxd:32; - uint64_t lane_rxc:4; - uint64_t state:3; - uint64_t val:1; - uint64_t reserved_40_63:24; -#endif - } s; - struct cvmx_gmxx_rx_xaui_bad_col_s cn52xx; - struct cvmx_gmxx_rx_xaui_bad_col_s cn52xxp1; - struct cvmx_gmxx_rx_xaui_bad_col_s cn56xx; - struct cvmx_gmxx_rx_xaui_bad_col_s cn56xxp1; - struct cvmx_gmxx_rx_xaui_bad_col_s cn61xx; - struct cvmx_gmxx_rx_xaui_bad_col_s cn63xx; - struct cvmx_gmxx_rx_xaui_bad_col_s cn63xxp1; - struct cvmx_gmxx_rx_xaui_bad_col_s cn66xx; - struct cvmx_gmxx_rx_xaui_bad_col_s cn68xx; - struct cvmx_gmxx_rx_xaui_bad_col_s cn68xxp1; - struct cvmx_gmxx_rx_xaui_bad_col_s cnf71xx; }; union cvmx_gmxx_rx_xaui_ctl { @@ -4895,913 +1621,6 @@ union cvmx_gmxx_rx_xaui_ctl { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_gmxx_rx_xaui_ctl_s cn52xx; - struct cvmx_gmxx_rx_xaui_ctl_s cn52xxp1; - struct cvmx_gmxx_rx_xaui_ctl_s cn56xx; - struct cvmx_gmxx_rx_xaui_ctl_s cn56xxp1; - struct cvmx_gmxx_rx_xaui_ctl_s cn61xx; - struct cvmx_gmxx_rx_xaui_ctl_s cn63xx; - struct cvmx_gmxx_rx_xaui_ctl_s cn63xxp1; - struct cvmx_gmxx_rx_xaui_ctl_s cn66xx; - struct cvmx_gmxx_rx_xaui_ctl_s cn68xx; - struct cvmx_gmxx_rx_xaui_ctl_s cn68xxp1; - struct cvmx_gmxx_rx_xaui_ctl_s cnf71xx; -}; - -union cvmx_gmxx_rxaui_ctl { - uint64_t u64; - struct cvmx_gmxx_rxaui_ctl_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_1_63:63; - uint64_t disparity:1; -#else - uint64_t disparity:1; - uint64_t reserved_1_63:63; -#endif - } s; - struct cvmx_gmxx_rxaui_ctl_s cn68xx; - struct cvmx_gmxx_rxaui_ctl_s cn68xxp1; -}; - -union cvmx_gmxx_smacx { - uint64_t u64; - struct cvmx_gmxx_smacx_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_48_63:16; - uint64_t smac:48; -#else - uint64_t smac:48; - uint64_t reserved_48_63:16; -#endif - } s; - struct cvmx_gmxx_smacx_s cn30xx; - struct cvmx_gmxx_smacx_s cn31xx; - struct cvmx_gmxx_smacx_s cn38xx; - struct cvmx_gmxx_smacx_s cn38xxp2; - struct cvmx_gmxx_smacx_s cn50xx; - struct cvmx_gmxx_smacx_s cn52xx; - struct cvmx_gmxx_smacx_s cn52xxp1; - struct cvmx_gmxx_smacx_s cn56xx; - struct cvmx_gmxx_smacx_s cn56xxp1; - struct cvmx_gmxx_smacx_s cn58xx; - struct cvmx_gmxx_smacx_s cn58xxp1; - struct cvmx_gmxx_smacx_s cn61xx; - struct cvmx_gmxx_smacx_s cn63xx; - struct cvmx_gmxx_smacx_s cn63xxp1; - struct cvmx_gmxx_smacx_s cn66xx; - struct cvmx_gmxx_smacx_s cn68xx; - struct cvmx_gmxx_smacx_s cn68xxp1; - struct cvmx_gmxx_smacx_s cnf71xx; -}; - -union cvmx_gmxx_soft_bist { - uint64_t u64; - struct cvmx_gmxx_soft_bist_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_2_63:62; - uint64_t start_bist:1; - uint64_t clear_bist:1; -#else - uint64_t clear_bist:1; - uint64_t start_bist:1; - uint64_t reserved_2_63:62; -#endif - } s; - struct cvmx_gmxx_soft_bist_s cn63xx; - struct cvmx_gmxx_soft_bist_s cn63xxp1; - struct cvmx_gmxx_soft_bist_s cn66xx; - struct cvmx_gmxx_soft_bist_s cn68xx; - struct cvmx_gmxx_soft_bist_s cn68xxp1; -}; - -union cvmx_gmxx_stat_bp { - uint64_t u64; - struct cvmx_gmxx_stat_bp_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_17_63:47; - uint64_t bp:1; - uint64_t cnt:16; -#else - uint64_t cnt:16; - uint64_t bp:1; - uint64_t reserved_17_63:47; -#endif - } s; - struct cvmx_gmxx_stat_bp_s cn30xx; - struct cvmx_gmxx_stat_bp_s cn31xx; - struct cvmx_gmxx_stat_bp_s cn38xx; - struct cvmx_gmxx_stat_bp_s cn38xxp2; - struct cvmx_gmxx_stat_bp_s cn50xx; - struct cvmx_gmxx_stat_bp_s cn52xx; - struct cvmx_gmxx_stat_bp_s cn52xxp1; - struct cvmx_gmxx_stat_bp_s cn56xx; - struct cvmx_gmxx_stat_bp_s cn56xxp1; - struct cvmx_gmxx_stat_bp_s cn58xx; - struct cvmx_gmxx_stat_bp_s cn58xxp1; - struct cvmx_gmxx_stat_bp_s cn61xx; - struct cvmx_gmxx_stat_bp_s cn63xx; - struct cvmx_gmxx_stat_bp_s cn63xxp1; - struct cvmx_gmxx_stat_bp_s cn66xx; - struct cvmx_gmxx_stat_bp_s cn68xx; - struct cvmx_gmxx_stat_bp_s cn68xxp1; - struct cvmx_gmxx_stat_bp_s cnf71xx; -}; - -union cvmx_gmxx_tb_reg { - uint64_t u64; - struct cvmx_gmxx_tb_reg_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_1_63:63; - uint64_t wr_magic:1; -#else - uint64_t wr_magic:1; - uint64_t reserved_1_63:63; -#endif - } s; - struct cvmx_gmxx_tb_reg_s cn61xx; - struct cvmx_gmxx_tb_reg_s cn66xx; - struct cvmx_gmxx_tb_reg_s cn68xx; - struct cvmx_gmxx_tb_reg_s cnf71xx; -}; - -union cvmx_gmxx_txx_append { - uint64_t u64; - struct cvmx_gmxx_txx_append_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t force_fcs:1; - uint64_t fcs:1; - uint64_t pad:1; - uint64_t preamble:1; -#else - uint64_t preamble:1; - uint64_t pad:1; - uint64_t fcs:1; - uint64_t force_fcs:1; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_gmxx_txx_append_s cn30xx; - struct cvmx_gmxx_txx_append_s cn31xx; - struct cvmx_gmxx_txx_append_s cn38xx; - struct cvmx_gmxx_txx_append_s cn38xxp2; - struct cvmx_gmxx_txx_append_s cn50xx; - struct cvmx_gmxx_txx_append_s cn52xx; - struct cvmx_gmxx_txx_append_s cn52xxp1; - struct cvmx_gmxx_txx_append_s cn56xx; - struct cvmx_gmxx_txx_append_s cn56xxp1; - struct cvmx_gmxx_txx_append_s cn58xx; - struct cvmx_gmxx_txx_append_s cn58xxp1; - struct cvmx_gmxx_txx_append_s cn61xx; - struct cvmx_gmxx_txx_append_s cn63xx; - struct cvmx_gmxx_txx_append_s cn63xxp1; - struct cvmx_gmxx_txx_append_s cn66xx; - struct cvmx_gmxx_txx_append_s cn68xx; - struct cvmx_gmxx_txx_append_s cn68xxp1; - struct cvmx_gmxx_txx_append_s cnf71xx; -}; - -union cvmx_gmxx_txx_burst { - uint64_t u64; - struct cvmx_gmxx_txx_burst_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t burst:16; -#else - uint64_t burst:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_gmxx_txx_burst_s cn30xx; - struct cvmx_gmxx_txx_burst_s cn31xx; - struct cvmx_gmxx_txx_burst_s cn38xx; - struct cvmx_gmxx_txx_burst_s cn38xxp2; - struct cvmx_gmxx_txx_burst_s cn50xx; - struct cvmx_gmxx_txx_burst_s cn52xx; - struct cvmx_gmxx_txx_burst_s cn52xxp1; - struct cvmx_gmxx_txx_burst_s cn56xx; - struct cvmx_gmxx_txx_burst_s cn56xxp1; - struct cvmx_gmxx_txx_burst_s cn58xx; - struct cvmx_gmxx_txx_burst_s cn58xxp1; - struct cvmx_gmxx_txx_burst_s cn61xx; - struct cvmx_gmxx_txx_burst_s cn63xx; - struct cvmx_gmxx_txx_burst_s cn63xxp1; - struct cvmx_gmxx_txx_burst_s cn66xx; - struct cvmx_gmxx_txx_burst_s cn68xx; - struct cvmx_gmxx_txx_burst_s cn68xxp1; - struct cvmx_gmxx_txx_burst_s cnf71xx; -}; - -union cvmx_gmxx_txx_cbfc_xoff { - uint64_t u64; - struct cvmx_gmxx_txx_cbfc_xoff_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t xoff:16; -#else - uint64_t xoff:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_gmxx_txx_cbfc_xoff_s cn52xx; - struct cvmx_gmxx_txx_cbfc_xoff_s cn56xx; - struct cvmx_gmxx_txx_cbfc_xoff_s cn61xx; - struct cvmx_gmxx_txx_cbfc_xoff_s cn63xx; - struct cvmx_gmxx_txx_cbfc_xoff_s cn63xxp1; - struct cvmx_gmxx_txx_cbfc_xoff_s cn66xx; - struct cvmx_gmxx_txx_cbfc_xoff_s cn68xx; - struct cvmx_gmxx_txx_cbfc_xoff_s cn68xxp1; - struct cvmx_gmxx_txx_cbfc_xoff_s cnf71xx; -}; - -union cvmx_gmxx_txx_cbfc_xon { - uint64_t u64; - struct cvmx_gmxx_txx_cbfc_xon_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t xon:16; -#else - uint64_t xon:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_gmxx_txx_cbfc_xon_s cn52xx; - struct cvmx_gmxx_txx_cbfc_xon_s cn56xx; - struct cvmx_gmxx_txx_cbfc_xon_s cn61xx; - struct cvmx_gmxx_txx_cbfc_xon_s cn63xx; - struct cvmx_gmxx_txx_cbfc_xon_s cn63xxp1; - struct cvmx_gmxx_txx_cbfc_xon_s cn66xx; - struct cvmx_gmxx_txx_cbfc_xon_s cn68xx; - struct cvmx_gmxx_txx_cbfc_xon_s cn68xxp1; - struct cvmx_gmxx_txx_cbfc_xon_s cnf71xx; -}; - -union cvmx_gmxx_txx_clk { - uint64_t u64; - struct cvmx_gmxx_txx_clk_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_6_63:58; - uint64_t clk_cnt:6; -#else - uint64_t clk_cnt:6; - uint64_t reserved_6_63:58; -#endif - } s; - struct cvmx_gmxx_txx_clk_s cn30xx; - struct cvmx_gmxx_txx_clk_s cn31xx; - struct cvmx_gmxx_txx_clk_s cn38xx; - struct cvmx_gmxx_txx_clk_s cn38xxp2; - struct cvmx_gmxx_txx_clk_s cn50xx; - struct cvmx_gmxx_txx_clk_s cn58xx; - struct cvmx_gmxx_txx_clk_s cn58xxp1; -}; - -union cvmx_gmxx_txx_ctl { - uint64_t u64; - struct cvmx_gmxx_txx_ctl_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_2_63:62; - uint64_t xsdef_en:1; - uint64_t xscol_en:1; -#else - uint64_t xscol_en:1; - uint64_t xsdef_en:1; - uint64_t reserved_2_63:62; -#endif - } s; - struct cvmx_gmxx_txx_ctl_s cn30xx; - struct cvmx_gmxx_txx_ctl_s cn31xx; - struct cvmx_gmxx_txx_ctl_s cn38xx; - struct cvmx_gmxx_txx_ctl_s cn38xxp2; - struct cvmx_gmxx_txx_ctl_s cn50xx; - struct cvmx_gmxx_txx_ctl_s cn52xx; - struct cvmx_gmxx_txx_ctl_s cn52xxp1; - struct cvmx_gmxx_txx_ctl_s cn56xx; - struct cvmx_gmxx_txx_ctl_s cn56xxp1; - struct cvmx_gmxx_txx_ctl_s cn58xx; - struct cvmx_gmxx_txx_ctl_s cn58xxp1; - struct cvmx_gmxx_txx_ctl_s cn61xx; - struct cvmx_gmxx_txx_ctl_s cn63xx; - struct cvmx_gmxx_txx_ctl_s cn63xxp1; - struct cvmx_gmxx_txx_ctl_s cn66xx; - struct cvmx_gmxx_txx_ctl_s cn68xx; - struct cvmx_gmxx_txx_ctl_s cn68xxp1; - struct cvmx_gmxx_txx_ctl_s cnf71xx; -}; - -union cvmx_gmxx_txx_min_pkt { - uint64_t u64; - struct cvmx_gmxx_txx_min_pkt_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_8_63:56; - uint64_t min_size:8; -#else - uint64_t min_size:8; - uint64_t reserved_8_63:56; -#endif - } s; - struct cvmx_gmxx_txx_min_pkt_s cn30xx; - struct cvmx_gmxx_txx_min_pkt_s cn31xx; - struct cvmx_gmxx_txx_min_pkt_s cn38xx; - struct cvmx_gmxx_txx_min_pkt_s cn38xxp2; - struct cvmx_gmxx_txx_min_pkt_s cn50xx; - struct cvmx_gmxx_txx_min_pkt_s cn52xx; - struct cvmx_gmxx_txx_min_pkt_s cn52xxp1; - struct cvmx_gmxx_txx_min_pkt_s cn56xx; - struct cvmx_gmxx_txx_min_pkt_s cn56xxp1; - struct cvmx_gmxx_txx_min_pkt_s cn58xx; - struct cvmx_gmxx_txx_min_pkt_s cn58xxp1; - struct cvmx_gmxx_txx_min_pkt_s cn61xx; - struct cvmx_gmxx_txx_min_pkt_s cn63xx; - struct cvmx_gmxx_txx_min_pkt_s cn63xxp1; - struct cvmx_gmxx_txx_min_pkt_s cn66xx; - struct cvmx_gmxx_txx_min_pkt_s cn68xx; - struct cvmx_gmxx_txx_min_pkt_s cn68xxp1; - struct cvmx_gmxx_txx_min_pkt_s cnf71xx; -}; - -union cvmx_gmxx_txx_pause_pkt_interval { - uint64_t u64; - struct cvmx_gmxx_txx_pause_pkt_interval_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t interval:16; -#else - uint64_t interval:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_gmxx_txx_pause_pkt_interval_s cn30xx; - struct cvmx_gmxx_txx_pause_pkt_interval_s cn31xx; - struct cvmx_gmxx_txx_pause_pkt_interval_s cn38xx; - struct cvmx_gmxx_txx_pause_pkt_interval_s cn38xxp2; - struct cvmx_gmxx_txx_pause_pkt_interval_s cn50xx; - struct cvmx_gmxx_txx_pause_pkt_interval_s cn52xx; - struct cvmx_gmxx_txx_pause_pkt_interval_s cn52xxp1; - struct cvmx_gmxx_txx_pause_pkt_interval_s cn56xx; - struct cvmx_gmxx_txx_pause_pkt_interval_s cn56xxp1; - struct cvmx_gmxx_txx_pause_pkt_interval_s cn58xx; - struct cvmx_gmxx_txx_pause_pkt_interval_s cn58xxp1; - struct cvmx_gmxx_txx_pause_pkt_interval_s cn61xx; - struct cvmx_gmxx_txx_pause_pkt_interval_s cn63xx; - struct cvmx_gmxx_txx_pause_pkt_interval_s cn63xxp1; - struct cvmx_gmxx_txx_pause_pkt_interval_s cn66xx; - struct cvmx_gmxx_txx_pause_pkt_interval_s cn68xx; - struct cvmx_gmxx_txx_pause_pkt_interval_s cn68xxp1; - struct cvmx_gmxx_txx_pause_pkt_interval_s cnf71xx; -}; - -union cvmx_gmxx_txx_pause_pkt_time { - uint64_t u64; - struct cvmx_gmxx_txx_pause_pkt_time_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t time:16; -#else - uint64_t time:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_gmxx_txx_pause_pkt_time_s cn30xx; - struct cvmx_gmxx_txx_pause_pkt_time_s cn31xx; - struct cvmx_gmxx_txx_pause_pkt_time_s cn38xx; - struct cvmx_gmxx_txx_pause_pkt_time_s cn38xxp2; - struct cvmx_gmxx_txx_pause_pkt_time_s cn50xx; - struct cvmx_gmxx_txx_pause_pkt_time_s cn52xx; - struct cvmx_gmxx_txx_pause_pkt_time_s cn52xxp1; - struct cvmx_gmxx_txx_pause_pkt_time_s cn56xx; - struct cvmx_gmxx_txx_pause_pkt_time_s cn56xxp1; - struct cvmx_gmxx_txx_pause_pkt_time_s cn58xx; - struct cvmx_gmxx_txx_pause_pkt_time_s cn58xxp1; - struct cvmx_gmxx_txx_pause_pkt_time_s cn61xx; - struct cvmx_gmxx_txx_pause_pkt_time_s cn63xx; - struct cvmx_gmxx_txx_pause_pkt_time_s cn63xxp1; - struct cvmx_gmxx_txx_pause_pkt_time_s cn66xx; - struct cvmx_gmxx_txx_pause_pkt_time_s cn68xx; - struct cvmx_gmxx_txx_pause_pkt_time_s cn68xxp1; - struct cvmx_gmxx_txx_pause_pkt_time_s cnf71xx; -}; - -union cvmx_gmxx_txx_pause_togo { - uint64_t u64; - struct cvmx_gmxx_txx_pause_togo_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t msg_time:16; - uint64_t time:16; -#else - uint64_t time:16; - uint64_t msg_time:16; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_gmxx_txx_pause_togo_cn30xx { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t time:16; -#else - uint64_t time:16; - uint64_t reserved_16_63:48; -#endif - } cn30xx; - struct cvmx_gmxx_txx_pause_togo_cn30xx cn31xx; - struct cvmx_gmxx_txx_pause_togo_cn30xx cn38xx; - struct cvmx_gmxx_txx_pause_togo_cn30xx cn38xxp2; - struct cvmx_gmxx_txx_pause_togo_cn30xx cn50xx; - struct cvmx_gmxx_txx_pause_togo_s cn52xx; - struct cvmx_gmxx_txx_pause_togo_s cn52xxp1; - struct cvmx_gmxx_txx_pause_togo_s cn56xx; - struct cvmx_gmxx_txx_pause_togo_cn30xx cn56xxp1; - struct cvmx_gmxx_txx_pause_togo_cn30xx cn58xx; - struct cvmx_gmxx_txx_pause_togo_cn30xx cn58xxp1; - struct cvmx_gmxx_txx_pause_togo_s cn61xx; - struct cvmx_gmxx_txx_pause_togo_s cn63xx; - struct cvmx_gmxx_txx_pause_togo_s cn63xxp1; - struct cvmx_gmxx_txx_pause_togo_s cn66xx; - struct cvmx_gmxx_txx_pause_togo_s cn68xx; - struct cvmx_gmxx_txx_pause_togo_s cn68xxp1; - struct cvmx_gmxx_txx_pause_togo_s cnf71xx; -}; - -union cvmx_gmxx_txx_pause_zero { - uint64_t u64; - struct cvmx_gmxx_txx_pause_zero_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_1_63:63; - uint64_t send:1; -#else - uint64_t send:1; - uint64_t reserved_1_63:63; -#endif - } s; - struct cvmx_gmxx_txx_pause_zero_s cn30xx; - struct cvmx_gmxx_txx_pause_zero_s cn31xx; - struct cvmx_gmxx_txx_pause_zero_s cn38xx; - struct cvmx_gmxx_txx_pause_zero_s cn38xxp2; - struct cvmx_gmxx_txx_pause_zero_s cn50xx; - struct cvmx_gmxx_txx_pause_zero_s cn52xx; - struct cvmx_gmxx_txx_pause_zero_s cn52xxp1; - struct cvmx_gmxx_txx_pause_zero_s cn56xx; - struct cvmx_gmxx_txx_pause_zero_s cn56xxp1; - struct cvmx_gmxx_txx_pause_zero_s cn58xx; - struct cvmx_gmxx_txx_pause_zero_s cn58xxp1; - struct cvmx_gmxx_txx_pause_zero_s cn61xx; - struct cvmx_gmxx_txx_pause_zero_s cn63xx; - struct cvmx_gmxx_txx_pause_zero_s cn63xxp1; - struct cvmx_gmxx_txx_pause_zero_s cn66xx; - struct cvmx_gmxx_txx_pause_zero_s cn68xx; - struct cvmx_gmxx_txx_pause_zero_s cn68xxp1; - struct cvmx_gmxx_txx_pause_zero_s cnf71xx; -}; - -union cvmx_gmxx_txx_pipe { - uint64_t u64; - struct cvmx_gmxx_txx_pipe_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_33_63:31; - uint64_t ign_bp:1; - uint64_t reserved_21_31:11; - uint64_t nump:5; - uint64_t reserved_7_15:9; - uint64_t base:7; -#else - uint64_t base:7; - uint64_t reserved_7_15:9; - uint64_t nump:5; - uint64_t reserved_21_31:11; - uint64_t ign_bp:1; - uint64_t reserved_33_63:31; -#endif - } s; - struct cvmx_gmxx_txx_pipe_s cn68xx; - struct cvmx_gmxx_txx_pipe_s cn68xxp1; -}; - -union cvmx_gmxx_txx_sgmii_ctl { - uint64_t u64; - struct cvmx_gmxx_txx_sgmii_ctl_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_1_63:63; - uint64_t align:1; -#else - uint64_t align:1; - uint64_t reserved_1_63:63; -#endif - } s; - struct cvmx_gmxx_txx_sgmii_ctl_s cn52xx; - struct cvmx_gmxx_txx_sgmii_ctl_s cn52xxp1; - struct cvmx_gmxx_txx_sgmii_ctl_s cn56xx; - struct cvmx_gmxx_txx_sgmii_ctl_s cn56xxp1; - struct cvmx_gmxx_txx_sgmii_ctl_s cn61xx; - struct cvmx_gmxx_txx_sgmii_ctl_s cn63xx; - struct cvmx_gmxx_txx_sgmii_ctl_s cn63xxp1; - struct cvmx_gmxx_txx_sgmii_ctl_s cn66xx; - struct cvmx_gmxx_txx_sgmii_ctl_s cn68xx; - struct cvmx_gmxx_txx_sgmii_ctl_s cn68xxp1; - struct cvmx_gmxx_txx_sgmii_ctl_s cnf71xx; -}; - -union cvmx_gmxx_txx_slot { - uint64_t u64; - struct cvmx_gmxx_txx_slot_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_10_63:54; - uint64_t slot:10; -#else - uint64_t slot:10; - uint64_t reserved_10_63:54; -#endif - } s; - struct cvmx_gmxx_txx_slot_s cn30xx; - struct cvmx_gmxx_txx_slot_s cn31xx; - struct cvmx_gmxx_txx_slot_s cn38xx; - struct cvmx_gmxx_txx_slot_s cn38xxp2; - struct cvmx_gmxx_txx_slot_s cn50xx; - struct cvmx_gmxx_txx_slot_s cn52xx; - struct cvmx_gmxx_txx_slot_s cn52xxp1; - struct cvmx_gmxx_txx_slot_s cn56xx; - struct cvmx_gmxx_txx_slot_s cn56xxp1; - struct cvmx_gmxx_txx_slot_s cn58xx; - struct cvmx_gmxx_txx_slot_s cn58xxp1; - struct cvmx_gmxx_txx_slot_s cn61xx; - struct cvmx_gmxx_txx_slot_s cn63xx; - struct cvmx_gmxx_txx_slot_s cn63xxp1; - struct cvmx_gmxx_txx_slot_s cn66xx; - struct cvmx_gmxx_txx_slot_s cn68xx; - struct cvmx_gmxx_txx_slot_s cn68xxp1; - struct cvmx_gmxx_txx_slot_s cnf71xx; -}; - -union cvmx_gmxx_txx_soft_pause { - uint64_t u64; - struct cvmx_gmxx_txx_soft_pause_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t time:16; -#else - uint64_t time:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_gmxx_txx_soft_pause_s cn30xx; - struct cvmx_gmxx_txx_soft_pause_s cn31xx; - struct cvmx_gmxx_txx_soft_pause_s cn38xx; - struct cvmx_gmxx_txx_soft_pause_s cn38xxp2; - struct cvmx_gmxx_txx_soft_pause_s cn50xx; - struct cvmx_gmxx_txx_soft_pause_s cn52xx; - struct cvmx_gmxx_txx_soft_pause_s cn52xxp1; - struct cvmx_gmxx_txx_soft_pause_s cn56xx; - struct cvmx_gmxx_txx_soft_pause_s cn56xxp1; - struct cvmx_gmxx_txx_soft_pause_s cn58xx; - struct cvmx_gmxx_txx_soft_pause_s cn58xxp1; - struct cvmx_gmxx_txx_soft_pause_s cn61xx; - struct cvmx_gmxx_txx_soft_pause_s cn63xx; - struct cvmx_gmxx_txx_soft_pause_s cn63xxp1; - struct cvmx_gmxx_txx_soft_pause_s cn66xx; - struct cvmx_gmxx_txx_soft_pause_s cn68xx; - struct cvmx_gmxx_txx_soft_pause_s cn68xxp1; - struct cvmx_gmxx_txx_soft_pause_s cnf71xx; -}; - -union cvmx_gmxx_txx_stat0 { - uint64_t u64; - struct cvmx_gmxx_txx_stat0_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t xsdef:32; - uint64_t xscol:32; -#else - uint64_t xscol:32; - uint64_t xsdef:32; -#endif - } s; - struct cvmx_gmxx_txx_stat0_s cn30xx; - struct cvmx_gmxx_txx_stat0_s cn31xx; - struct cvmx_gmxx_txx_stat0_s cn38xx; - struct cvmx_gmxx_txx_stat0_s cn38xxp2; - struct cvmx_gmxx_txx_stat0_s cn50xx; - struct cvmx_gmxx_txx_stat0_s cn52xx; - struct cvmx_gmxx_txx_stat0_s cn52xxp1; - struct cvmx_gmxx_txx_stat0_s cn56xx; - struct cvmx_gmxx_txx_stat0_s cn56xxp1; - struct cvmx_gmxx_txx_stat0_s cn58xx; - struct cvmx_gmxx_txx_stat0_s cn58xxp1; - struct cvmx_gmxx_txx_stat0_s cn61xx; - struct cvmx_gmxx_txx_stat0_s cn63xx; - struct cvmx_gmxx_txx_stat0_s cn63xxp1; - struct cvmx_gmxx_txx_stat0_s cn66xx; - struct cvmx_gmxx_txx_stat0_s cn68xx; - struct cvmx_gmxx_txx_stat0_s cn68xxp1; - struct cvmx_gmxx_txx_stat0_s cnf71xx; -}; - -union cvmx_gmxx_txx_stat1 { - uint64_t u64; - struct cvmx_gmxx_txx_stat1_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t scol:32; - uint64_t mcol:32; -#else - uint64_t mcol:32; - uint64_t scol:32; -#endif - } s; - struct cvmx_gmxx_txx_stat1_s cn30xx; - struct cvmx_gmxx_txx_stat1_s cn31xx; - struct cvmx_gmxx_txx_stat1_s cn38xx; - struct cvmx_gmxx_txx_stat1_s cn38xxp2; - struct cvmx_gmxx_txx_stat1_s cn50xx; - struct cvmx_gmxx_txx_stat1_s cn52xx; - struct cvmx_gmxx_txx_stat1_s cn52xxp1; - struct cvmx_gmxx_txx_stat1_s cn56xx; - struct cvmx_gmxx_txx_stat1_s cn56xxp1; - struct cvmx_gmxx_txx_stat1_s cn58xx; - struct cvmx_gmxx_txx_stat1_s cn58xxp1; - struct cvmx_gmxx_txx_stat1_s cn61xx; - struct cvmx_gmxx_txx_stat1_s cn63xx; - struct cvmx_gmxx_txx_stat1_s cn63xxp1; - struct cvmx_gmxx_txx_stat1_s cn66xx; - struct cvmx_gmxx_txx_stat1_s cn68xx; - struct cvmx_gmxx_txx_stat1_s cn68xxp1; - struct cvmx_gmxx_txx_stat1_s cnf71xx; -}; - -union cvmx_gmxx_txx_stat2 { - uint64_t u64; - struct cvmx_gmxx_txx_stat2_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_48_63:16; - uint64_t octs:48; -#else - uint64_t octs:48; - uint64_t reserved_48_63:16; -#endif - } s; - struct cvmx_gmxx_txx_stat2_s cn30xx; - struct cvmx_gmxx_txx_stat2_s cn31xx; - struct cvmx_gmxx_txx_stat2_s cn38xx; - struct cvmx_gmxx_txx_stat2_s cn38xxp2; - struct cvmx_gmxx_txx_stat2_s cn50xx; - struct cvmx_gmxx_txx_stat2_s cn52xx; - struct cvmx_gmxx_txx_stat2_s cn52xxp1; - struct cvmx_gmxx_txx_stat2_s cn56xx; - struct cvmx_gmxx_txx_stat2_s cn56xxp1; - struct cvmx_gmxx_txx_stat2_s cn58xx; - struct cvmx_gmxx_txx_stat2_s cn58xxp1; - struct cvmx_gmxx_txx_stat2_s cn61xx; - struct cvmx_gmxx_txx_stat2_s cn63xx; - struct cvmx_gmxx_txx_stat2_s cn63xxp1; - struct cvmx_gmxx_txx_stat2_s cn66xx; - struct cvmx_gmxx_txx_stat2_s cn68xx; - struct cvmx_gmxx_txx_stat2_s cn68xxp1; - struct cvmx_gmxx_txx_stat2_s cnf71xx; -}; - -union cvmx_gmxx_txx_stat3 { - uint64_t u64; - struct cvmx_gmxx_txx_stat3_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t pkts:32; -#else - uint64_t pkts:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_gmxx_txx_stat3_s cn30xx; - struct cvmx_gmxx_txx_stat3_s cn31xx; - struct cvmx_gmxx_txx_stat3_s cn38xx; - struct cvmx_gmxx_txx_stat3_s cn38xxp2; - struct cvmx_gmxx_txx_stat3_s cn50xx; - struct cvmx_gmxx_txx_stat3_s cn52xx; - struct cvmx_gmxx_txx_stat3_s cn52xxp1; - struct cvmx_gmxx_txx_stat3_s cn56xx; - struct cvmx_gmxx_txx_stat3_s cn56xxp1; - struct cvmx_gmxx_txx_stat3_s cn58xx; - struct cvmx_gmxx_txx_stat3_s cn58xxp1; - struct cvmx_gmxx_txx_stat3_s cn61xx; - struct cvmx_gmxx_txx_stat3_s cn63xx; - struct cvmx_gmxx_txx_stat3_s cn63xxp1; - struct cvmx_gmxx_txx_stat3_s cn66xx; - struct cvmx_gmxx_txx_stat3_s cn68xx; - struct cvmx_gmxx_txx_stat3_s cn68xxp1; - struct cvmx_gmxx_txx_stat3_s cnf71xx; -}; - -union cvmx_gmxx_txx_stat4 { - uint64_t u64; - struct cvmx_gmxx_txx_stat4_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t hist1:32; - uint64_t hist0:32; -#else - uint64_t hist0:32; - uint64_t hist1:32; -#endif - } s; - struct cvmx_gmxx_txx_stat4_s cn30xx; - struct cvmx_gmxx_txx_stat4_s cn31xx; - struct cvmx_gmxx_txx_stat4_s cn38xx; - struct cvmx_gmxx_txx_stat4_s cn38xxp2; - struct cvmx_gmxx_txx_stat4_s cn50xx; - struct cvmx_gmxx_txx_stat4_s cn52xx; - struct cvmx_gmxx_txx_stat4_s cn52xxp1; - struct cvmx_gmxx_txx_stat4_s cn56xx; - struct cvmx_gmxx_txx_stat4_s cn56xxp1; - struct cvmx_gmxx_txx_stat4_s cn58xx; - struct cvmx_gmxx_txx_stat4_s cn58xxp1; - struct cvmx_gmxx_txx_stat4_s cn61xx; - struct cvmx_gmxx_txx_stat4_s cn63xx; - struct cvmx_gmxx_txx_stat4_s cn63xxp1; - struct cvmx_gmxx_txx_stat4_s cn66xx; - struct cvmx_gmxx_txx_stat4_s cn68xx; - struct cvmx_gmxx_txx_stat4_s cn68xxp1; - struct cvmx_gmxx_txx_stat4_s cnf71xx; -}; - -union cvmx_gmxx_txx_stat5 { - uint64_t u64; - struct cvmx_gmxx_txx_stat5_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t hist3:32; - uint64_t hist2:32; -#else - uint64_t hist2:32; - uint64_t hist3:32; -#endif - } s; - struct cvmx_gmxx_txx_stat5_s cn30xx; - struct cvmx_gmxx_txx_stat5_s cn31xx; - struct cvmx_gmxx_txx_stat5_s cn38xx; - struct cvmx_gmxx_txx_stat5_s cn38xxp2; - struct cvmx_gmxx_txx_stat5_s cn50xx; - struct cvmx_gmxx_txx_stat5_s cn52xx; - struct cvmx_gmxx_txx_stat5_s cn52xxp1; - struct cvmx_gmxx_txx_stat5_s cn56xx; - struct cvmx_gmxx_txx_stat5_s cn56xxp1; - struct cvmx_gmxx_txx_stat5_s cn58xx; - struct cvmx_gmxx_txx_stat5_s cn58xxp1; - struct cvmx_gmxx_txx_stat5_s cn61xx; - struct cvmx_gmxx_txx_stat5_s cn63xx; - struct cvmx_gmxx_txx_stat5_s cn63xxp1; - struct cvmx_gmxx_txx_stat5_s cn66xx; - struct cvmx_gmxx_txx_stat5_s cn68xx; - struct cvmx_gmxx_txx_stat5_s cn68xxp1; - struct cvmx_gmxx_txx_stat5_s cnf71xx; -}; - -union cvmx_gmxx_txx_stat6 { - uint64_t u64; - struct cvmx_gmxx_txx_stat6_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t hist5:32; - uint64_t hist4:32; -#else - uint64_t hist4:32; - uint64_t hist5:32; -#endif - } s; - struct cvmx_gmxx_txx_stat6_s cn30xx; - struct cvmx_gmxx_txx_stat6_s cn31xx; - struct cvmx_gmxx_txx_stat6_s cn38xx; - struct cvmx_gmxx_txx_stat6_s cn38xxp2; - struct cvmx_gmxx_txx_stat6_s cn50xx; - struct cvmx_gmxx_txx_stat6_s cn52xx; - struct cvmx_gmxx_txx_stat6_s cn52xxp1; - struct cvmx_gmxx_txx_stat6_s cn56xx; - struct cvmx_gmxx_txx_stat6_s cn56xxp1; - struct cvmx_gmxx_txx_stat6_s cn58xx; - struct cvmx_gmxx_txx_stat6_s cn58xxp1; - struct cvmx_gmxx_txx_stat6_s cn61xx; - struct cvmx_gmxx_txx_stat6_s cn63xx; - struct cvmx_gmxx_txx_stat6_s cn63xxp1; - struct cvmx_gmxx_txx_stat6_s cn66xx; - struct cvmx_gmxx_txx_stat6_s cn68xx; - struct cvmx_gmxx_txx_stat6_s cn68xxp1; - struct cvmx_gmxx_txx_stat6_s cnf71xx; -}; - -union cvmx_gmxx_txx_stat7 { - uint64_t u64; - struct cvmx_gmxx_txx_stat7_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t hist7:32; - uint64_t hist6:32; -#else - uint64_t hist6:32; - uint64_t hist7:32; -#endif - } s; - struct cvmx_gmxx_txx_stat7_s cn30xx; - struct cvmx_gmxx_txx_stat7_s cn31xx; - struct cvmx_gmxx_txx_stat7_s cn38xx; - struct cvmx_gmxx_txx_stat7_s cn38xxp2; - struct cvmx_gmxx_txx_stat7_s cn50xx; - struct cvmx_gmxx_txx_stat7_s cn52xx; - struct cvmx_gmxx_txx_stat7_s cn52xxp1; - struct cvmx_gmxx_txx_stat7_s cn56xx; - struct cvmx_gmxx_txx_stat7_s cn56xxp1; - struct cvmx_gmxx_txx_stat7_s cn58xx; - struct cvmx_gmxx_txx_stat7_s cn58xxp1; - struct cvmx_gmxx_txx_stat7_s cn61xx; - struct cvmx_gmxx_txx_stat7_s cn63xx; - struct cvmx_gmxx_txx_stat7_s cn63xxp1; - struct cvmx_gmxx_txx_stat7_s cn66xx; - struct cvmx_gmxx_txx_stat7_s cn68xx; - struct cvmx_gmxx_txx_stat7_s cn68xxp1; - struct cvmx_gmxx_txx_stat7_s cnf71xx; -}; - -union cvmx_gmxx_txx_stat8 { - uint64_t u64; - struct cvmx_gmxx_txx_stat8_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t mcst:32; - uint64_t bcst:32; -#else - uint64_t bcst:32; - uint64_t mcst:32; -#endif - } s; - struct cvmx_gmxx_txx_stat8_s cn30xx; - struct cvmx_gmxx_txx_stat8_s cn31xx; - struct cvmx_gmxx_txx_stat8_s cn38xx; - struct cvmx_gmxx_txx_stat8_s cn38xxp2; - struct cvmx_gmxx_txx_stat8_s cn50xx; - struct cvmx_gmxx_txx_stat8_s cn52xx; - struct cvmx_gmxx_txx_stat8_s cn52xxp1; - struct cvmx_gmxx_txx_stat8_s cn56xx; - struct cvmx_gmxx_txx_stat8_s cn56xxp1; - struct cvmx_gmxx_txx_stat8_s cn58xx; - struct cvmx_gmxx_txx_stat8_s cn58xxp1; - struct cvmx_gmxx_txx_stat8_s cn61xx; - struct cvmx_gmxx_txx_stat8_s cn63xx; - struct cvmx_gmxx_txx_stat8_s cn63xxp1; - struct cvmx_gmxx_txx_stat8_s cn66xx; - struct cvmx_gmxx_txx_stat8_s cn68xx; - struct cvmx_gmxx_txx_stat8_s cn68xxp1; - struct cvmx_gmxx_txx_stat8_s cnf71xx; -}; - -union cvmx_gmxx_txx_stat9 { - uint64_t u64; - struct cvmx_gmxx_txx_stat9_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t undflw:32; - uint64_t ctl:32; -#else - uint64_t ctl:32; - uint64_t undflw:32; -#endif - } s; - struct cvmx_gmxx_txx_stat9_s cn30xx; - struct cvmx_gmxx_txx_stat9_s cn31xx; - struct cvmx_gmxx_txx_stat9_s cn38xx; - struct cvmx_gmxx_txx_stat9_s cn38xxp2; - struct cvmx_gmxx_txx_stat9_s cn50xx; - struct cvmx_gmxx_txx_stat9_s cn52xx; - struct cvmx_gmxx_txx_stat9_s cn52xxp1; - struct cvmx_gmxx_txx_stat9_s cn56xx; - struct cvmx_gmxx_txx_stat9_s cn56xxp1; - struct cvmx_gmxx_txx_stat9_s cn58xx; - struct cvmx_gmxx_txx_stat9_s cn58xxp1; - struct cvmx_gmxx_txx_stat9_s cn61xx; - struct cvmx_gmxx_txx_stat9_s cn63xx; - struct cvmx_gmxx_txx_stat9_s cn63xxp1; - struct cvmx_gmxx_txx_stat9_s cn66xx; - struct cvmx_gmxx_txx_stat9_s cn68xx; - struct cvmx_gmxx_txx_stat9_s cn68xxp1; - struct cvmx_gmxx_txx_stat9_s cnf71xx; -}; - -union cvmx_gmxx_txx_stats_ctl { - uint64_t u64; - struct cvmx_gmxx_txx_stats_ctl_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_1_63:63; - uint64_t rd_clr:1; -#else - uint64_t rd_clr:1; - uint64_t reserved_1_63:63; -#endif - } s; - struct cvmx_gmxx_txx_stats_ctl_s cn30xx; - struct cvmx_gmxx_txx_stats_ctl_s cn31xx; - struct cvmx_gmxx_txx_stats_ctl_s cn38xx; - struct cvmx_gmxx_txx_stats_ctl_s cn38xxp2; - struct cvmx_gmxx_txx_stats_ctl_s cn50xx; - struct cvmx_gmxx_txx_stats_ctl_s cn52xx; - struct cvmx_gmxx_txx_stats_ctl_s cn52xxp1; - struct cvmx_gmxx_txx_stats_ctl_s cn56xx; - struct cvmx_gmxx_txx_stats_ctl_s cn56xxp1; - struct cvmx_gmxx_txx_stats_ctl_s cn58xx; - struct cvmx_gmxx_txx_stats_ctl_s cn58xxp1; - struct cvmx_gmxx_txx_stats_ctl_s cn61xx; - struct cvmx_gmxx_txx_stats_ctl_s cn63xx; - struct cvmx_gmxx_txx_stats_ctl_s cn63xxp1; - struct cvmx_gmxx_txx_stats_ctl_s cn66xx; - struct cvmx_gmxx_txx_stats_ctl_s cn68xx; - struct cvmx_gmxx_txx_stats_ctl_s cn68xxp1; - struct cvmx_gmxx_txx_stats_ctl_s cnf71xx; }; union cvmx_gmxx_txx_thresh { @@ -5824,7 +1643,6 @@ union cvmx_gmxx_txx_thresh { uint64_t reserved_7_63:57; #endif } cn30xx; - struct cvmx_gmxx_txx_thresh_cn30xx cn31xx; struct cvmx_gmxx_txx_thresh_cn38xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_9_63:55; @@ -5834,240 +1652,6 @@ union cvmx_gmxx_txx_thresh { uint64_t reserved_9_63:55; #endif } cn38xx; - struct cvmx_gmxx_txx_thresh_cn38xx cn38xxp2; - struct cvmx_gmxx_txx_thresh_cn30xx cn50xx; - struct cvmx_gmxx_txx_thresh_cn38xx cn52xx; - struct cvmx_gmxx_txx_thresh_cn38xx cn52xxp1; - struct cvmx_gmxx_txx_thresh_cn38xx cn56xx; - struct cvmx_gmxx_txx_thresh_cn38xx cn56xxp1; - struct cvmx_gmxx_txx_thresh_cn38xx cn58xx; - struct cvmx_gmxx_txx_thresh_cn38xx cn58xxp1; - struct cvmx_gmxx_txx_thresh_cn38xx cn61xx; - struct cvmx_gmxx_txx_thresh_cn38xx cn63xx; - struct cvmx_gmxx_txx_thresh_cn38xx cn63xxp1; - struct cvmx_gmxx_txx_thresh_cn38xx cn66xx; - struct cvmx_gmxx_txx_thresh_s cn68xx; - struct cvmx_gmxx_txx_thresh_s cn68xxp1; - struct cvmx_gmxx_txx_thresh_cn38xx cnf71xx; -}; - -union cvmx_gmxx_tx_bp { - uint64_t u64; - struct cvmx_gmxx_tx_bp_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t bp:4; -#else - uint64_t bp:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_gmxx_tx_bp_cn30xx { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_3_63:61; - uint64_t bp:3; -#else - uint64_t bp:3; - uint64_t reserved_3_63:61; -#endif - } cn30xx; - struct cvmx_gmxx_tx_bp_cn30xx cn31xx; - struct cvmx_gmxx_tx_bp_s cn38xx; - struct cvmx_gmxx_tx_bp_s cn38xxp2; - struct cvmx_gmxx_tx_bp_cn30xx cn50xx; - struct cvmx_gmxx_tx_bp_s cn52xx; - struct cvmx_gmxx_tx_bp_s cn52xxp1; - struct cvmx_gmxx_tx_bp_s cn56xx; - struct cvmx_gmxx_tx_bp_s cn56xxp1; - struct cvmx_gmxx_tx_bp_s cn58xx; - struct cvmx_gmxx_tx_bp_s cn58xxp1; - struct cvmx_gmxx_tx_bp_s cn61xx; - struct cvmx_gmxx_tx_bp_s cn63xx; - struct cvmx_gmxx_tx_bp_s cn63xxp1; - struct cvmx_gmxx_tx_bp_s cn66xx; - struct cvmx_gmxx_tx_bp_s cn68xx; - struct cvmx_gmxx_tx_bp_s cn68xxp1; - struct cvmx_gmxx_tx_bp_cnf71xx { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_2_63:62; - uint64_t bp:2; -#else - uint64_t bp:2; - uint64_t reserved_2_63:62; -#endif - } cnf71xx; -}; - -union cvmx_gmxx_tx_clk_mskx { - uint64_t u64; - struct cvmx_gmxx_tx_clk_mskx_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_1_63:63; - uint64_t msk:1; -#else - uint64_t msk:1; - uint64_t reserved_1_63:63; -#endif - } s; - struct cvmx_gmxx_tx_clk_mskx_s cn30xx; - struct cvmx_gmxx_tx_clk_mskx_s cn50xx; -}; - -union cvmx_gmxx_tx_col_attempt { - uint64_t u64; - struct cvmx_gmxx_tx_col_attempt_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_5_63:59; - uint64_t limit:5; -#else - uint64_t limit:5; - uint64_t reserved_5_63:59; -#endif - } s; - struct cvmx_gmxx_tx_col_attempt_s cn30xx; - struct cvmx_gmxx_tx_col_attempt_s cn31xx; - struct cvmx_gmxx_tx_col_attempt_s cn38xx; - struct cvmx_gmxx_tx_col_attempt_s cn38xxp2; - struct cvmx_gmxx_tx_col_attempt_s cn50xx; - struct cvmx_gmxx_tx_col_attempt_s cn52xx; - struct cvmx_gmxx_tx_col_attempt_s cn52xxp1; - struct cvmx_gmxx_tx_col_attempt_s cn56xx; - struct cvmx_gmxx_tx_col_attempt_s cn56xxp1; - struct cvmx_gmxx_tx_col_attempt_s cn58xx; - struct cvmx_gmxx_tx_col_attempt_s cn58xxp1; - struct cvmx_gmxx_tx_col_attempt_s cn61xx; - struct cvmx_gmxx_tx_col_attempt_s cn63xx; - struct cvmx_gmxx_tx_col_attempt_s cn63xxp1; - struct cvmx_gmxx_tx_col_attempt_s cn66xx; - struct cvmx_gmxx_tx_col_attempt_s cn68xx; - struct cvmx_gmxx_tx_col_attempt_s cn68xxp1; - struct cvmx_gmxx_tx_col_attempt_s cnf71xx; -}; - -union cvmx_gmxx_tx_corrupt { - uint64_t u64; - struct cvmx_gmxx_tx_corrupt_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t corrupt:4; -#else - uint64_t corrupt:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_gmxx_tx_corrupt_cn30xx { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_3_63:61; - uint64_t corrupt:3; -#else - uint64_t corrupt:3; - uint64_t reserved_3_63:61; -#endif - } cn30xx; - struct cvmx_gmxx_tx_corrupt_cn30xx cn31xx; - struct cvmx_gmxx_tx_corrupt_s cn38xx; - struct cvmx_gmxx_tx_corrupt_s cn38xxp2; - struct cvmx_gmxx_tx_corrupt_cn30xx cn50xx; - struct cvmx_gmxx_tx_corrupt_s cn52xx; - struct cvmx_gmxx_tx_corrupt_s cn52xxp1; - struct cvmx_gmxx_tx_corrupt_s cn56xx; - struct cvmx_gmxx_tx_corrupt_s cn56xxp1; - struct cvmx_gmxx_tx_corrupt_s cn58xx; - struct cvmx_gmxx_tx_corrupt_s cn58xxp1; - struct cvmx_gmxx_tx_corrupt_s cn61xx; - struct cvmx_gmxx_tx_corrupt_s cn63xx; - struct cvmx_gmxx_tx_corrupt_s cn63xxp1; - struct cvmx_gmxx_tx_corrupt_s cn66xx; - struct cvmx_gmxx_tx_corrupt_s cn68xx; - struct cvmx_gmxx_tx_corrupt_s cn68xxp1; - struct cvmx_gmxx_tx_corrupt_cnf71xx { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_2_63:62; - uint64_t corrupt:2; -#else - uint64_t corrupt:2; - uint64_t reserved_2_63:62; -#endif - } cnf71xx; -}; - -union cvmx_gmxx_tx_hg2_reg1 { - uint64_t u64; - struct cvmx_gmxx_tx_hg2_reg1_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t tx_xof:16; -#else - uint64_t tx_xof:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_gmxx_tx_hg2_reg1_s cn52xx; - struct cvmx_gmxx_tx_hg2_reg1_s cn52xxp1; - struct cvmx_gmxx_tx_hg2_reg1_s cn56xx; - struct cvmx_gmxx_tx_hg2_reg1_s cn61xx; - struct cvmx_gmxx_tx_hg2_reg1_s cn63xx; - struct cvmx_gmxx_tx_hg2_reg1_s cn63xxp1; - struct cvmx_gmxx_tx_hg2_reg1_s cn66xx; - struct cvmx_gmxx_tx_hg2_reg1_s cn68xx; - struct cvmx_gmxx_tx_hg2_reg1_s cn68xxp1; - struct cvmx_gmxx_tx_hg2_reg1_s cnf71xx; -}; - -union cvmx_gmxx_tx_hg2_reg2 { - uint64_t u64; - struct cvmx_gmxx_tx_hg2_reg2_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t tx_xon:16; -#else - uint64_t tx_xon:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_gmxx_tx_hg2_reg2_s cn52xx; - struct cvmx_gmxx_tx_hg2_reg2_s cn52xxp1; - struct cvmx_gmxx_tx_hg2_reg2_s cn56xx; - struct cvmx_gmxx_tx_hg2_reg2_s cn61xx; - struct cvmx_gmxx_tx_hg2_reg2_s cn63xx; - struct cvmx_gmxx_tx_hg2_reg2_s cn63xxp1; - struct cvmx_gmxx_tx_hg2_reg2_s cn66xx; - struct cvmx_gmxx_tx_hg2_reg2_s cn68xx; - struct cvmx_gmxx_tx_hg2_reg2_s cn68xxp1; - struct cvmx_gmxx_tx_hg2_reg2_s cnf71xx; -}; - -union cvmx_gmxx_tx_ifg { - uint64_t u64; - struct cvmx_gmxx_tx_ifg_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_8_63:56; - uint64_t ifg2:4; - uint64_t ifg1:4; -#else - uint64_t ifg1:4; - uint64_t ifg2:4; - uint64_t reserved_8_63:56; -#endif - } s; - struct cvmx_gmxx_tx_ifg_s cn30xx; - struct cvmx_gmxx_tx_ifg_s cn31xx; - struct cvmx_gmxx_tx_ifg_s cn38xx; - struct cvmx_gmxx_tx_ifg_s cn38xxp2; - struct cvmx_gmxx_tx_ifg_s cn50xx; - struct cvmx_gmxx_tx_ifg_s cn52xx; - struct cvmx_gmxx_tx_ifg_s cn52xxp1; - struct cvmx_gmxx_tx_ifg_s cn56xx; - struct cvmx_gmxx_tx_ifg_s cn56xxp1; - struct cvmx_gmxx_tx_ifg_s cn58xx; - struct cvmx_gmxx_tx_ifg_s cn58xxp1; - struct cvmx_gmxx_tx_ifg_s cn61xx; - struct cvmx_gmxx_tx_ifg_s cn63xx; - struct cvmx_gmxx_tx_ifg_s cn63xxp1; - struct cvmx_gmxx_tx_ifg_s cn66xx; - struct cvmx_gmxx_tx_ifg_s cn68xx; - struct cvmx_gmxx_tx_ifg_s cn68xxp1; - struct cvmx_gmxx_tx_ifg_s cnf71xx; }; union cvmx_gmxx_tx_int_en { @@ -6183,7 +1767,6 @@ union cvmx_gmxx_tx_int_en { uint64_t reserved_16_63:48; #endif } cn38xxp2; - struct cvmx_gmxx_tx_int_en_cn30xx cn50xx; struct cvmx_gmxx_tx_int_en_cn52xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_20_63:44; @@ -6205,12 +1788,6 @@ union cvmx_gmxx_tx_int_en { uint64_t reserved_20_63:44; #endif } cn52xx; - struct cvmx_gmxx_tx_int_en_cn52xx cn52xxp1; - struct cvmx_gmxx_tx_int_en_cn52xx cn56xx; - struct cvmx_gmxx_tx_int_en_cn52xx cn56xxp1; - struct cvmx_gmxx_tx_int_en_cn38xx cn58xx; - struct cvmx_gmxx_tx_int_en_cn38xx cn58xxp1; - struct cvmx_gmxx_tx_int_en_s cn61xx; struct cvmx_gmxx_tx_int_en_cn63xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_24_63:40; @@ -6234,8 +1811,6 @@ union cvmx_gmxx_tx_int_en { uint64_t reserved_24_63:40; #endif } cn63xx; - struct cvmx_gmxx_tx_int_en_cn63xx cn63xxp1; - struct cvmx_gmxx_tx_int_en_s cn66xx; struct cvmx_gmxx_tx_int_en_cn68xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_25_63:39; @@ -6261,7 +1836,6 @@ union cvmx_gmxx_tx_int_en { uint64_t reserved_25_63:39; #endif } cn68xx; - struct cvmx_gmxx_tx_int_en_cn68xx cn68xxp1; struct cvmx_gmxx_tx_int_en_cnf71xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_25_63:39; @@ -6410,7 +1984,6 @@ union cvmx_gmxx_tx_int_reg { uint64_t reserved_16_63:48; #endif } cn38xxp2; - struct cvmx_gmxx_tx_int_reg_cn30xx cn50xx; struct cvmx_gmxx_tx_int_reg_cn52xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_20_63:44; @@ -6432,12 +2005,6 @@ union cvmx_gmxx_tx_int_reg { uint64_t reserved_20_63:44; #endif } cn52xx; - struct cvmx_gmxx_tx_int_reg_cn52xx cn52xxp1; - struct cvmx_gmxx_tx_int_reg_cn52xx cn56xx; - struct cvmx_gmxx_tx_int_reg_cn52xx cn56xxp1; - struct cvmx_gmxx_tx_int_reg_cn38xx cn58xx; - struct cvmx_gmxx_tx_int_reg_cn38xx cn58xxp1; - struct cvmx_gmxx_tx_int_reg_s cn61xx; struct cvmx_gmxx_tx_int_reg_cn63xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_24_63:40; @@ -6461,8 +2028,6 @@ union cvmx_gmxx_tx_int_reg { uint64_t reserved_24_63:40; #endif } cn63xx; - struct cvmx_gmxx_tx_int_reg_cn63xx cn63xxp1; - struct cvmx_gmxx_tx_int_reg_s cn66xx; struct cvmx_gmxx_tx_int_reg_cn68xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_25_63:39; @@ -6488,7 +2053,6 @@ union cvmx_gmxx_tx_int_reg { uint64_t reserved_25_63:39; #endif } cn68xx; - struct cvmx_gmxx_tx_int_reg_cn68xx cn68xxp1; struct cvmx_gmxx_tx_int_reg_cnf71xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_25_63:39; @@ -6524,68 +2088,6 @@ union cvmx_gmxx_tx_int_reg { } cnf71xx; }; -union cvmx_gmxx_tx_jam { - uint64_t u64; - struct cvmx_gmxx_tx_jam_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_8_63:56; - uint64_t jam:8; -#else - uint64_t jam:8; - uint64_t reserved_8_63:56; -#endif - } s; - struct cvmx_gmxx_tx_jam_s cn30xx; - struct cvmx_gmxx_tx_jam_s cn31xx; - struct cvmx_gmxx_tx_jam_s cn38xx; - struct cvmx_gmxx_tx_jam_s cn38xxp2; - struct cvmx_gmxx_tx_jam_s cn50xx; - struct cvmx_gmxx_tx_jam_s cn52xx; - struct cvmx_gmxx_tx_jam_s cn52xxp1; - struct cvmx_gmxx_tx_jam_s cn56xx; - struct cvmx_gmxx_tx_jam_s cn56xxp1; - struct cvmx_gmxx_tx_jam_s cn58xx; - struct cvmx_gmxx_tx_jam_s cn58xxp1; - struct cvmx_gmxx_tx_jam_s cn61xx; - struct cvmx_gmxx_tx_jam_s cn63xx; - struct cvmx_gmxx_tx_jam_s cn63xxp1; - struct cvmx_gmxx_tx_jam_s cn66xx; - struct cvmx_gmxx_tx_jam_s cn68xx; - struct cvmx_gmxx_tx_jam_s cn68xxp1; - struct cvmx_gmxx_tx_jam_s cnf71xx; -}; - -union cvmx_gmxx_tx_lfsr { - uint64_t u64; - struct cvmx_gmxx_tx_lfsr_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t lfsr:16; -#else - uint64_t lfsr:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_gmxx_tx_lfsr_s cn30xx; - struct cvmx_gmxx_tx_lfsr_s cn31xx; - struct cvmx_gmxx_tx_lfsr_s cn38xx; - struct cvmx_gmxx_tx_lfsr_s cn38xxp2; - struct cvmx_gmxx_tx_lfsr_s cn50xx; - struct cvmx_gmxx_tx_lfsr_s cn52xx; - struct cvmx_gmxx_tx_lfsr_s cn52xxp1; - struct cvmx_gmxx_tx_lfsr_s cn56xx; - struct cvmx_gmxx_tx_lfsr_s cn56xxp1; - struct cvmx_gmxx_tx_lfsr_s cn58xx; - struct cvmx_gmxx_tx_lfsr_s cn58xxp1; - struct cvmx_gmxx_tx_lfsr_s cn61xx; - struct cvmx_gmxx_tx_lfsr_s cn63xx; - struct cvmx_gmxx_tx_lfsr_s cn63xxp1; - struct cvmx_gmxx_tx_lfsr_s cn66xx; - struct cvmx_gmxx_tx_lfsr_s cn68xx; - struct cvmx_gmxx_tx_lfsr_s cn68xxp1; - struct cvmx_gmxx_tx_lfsr_s cnf71xx; -}; - union cvmx_gmxx_tx_ovr_bp { uint64_t u64; struct cvmx_gmxx_tx_ovr_bp_s { @@ -6622,7 +2124,6 @@ union cvmx_gmxx_tx_ovr_bp { uint64_t reserved_11_63:53; #endif } cn30xx; - struct cvmx_gmxx_tx_ovr_bp_cn30xx cn31xx; struct cvmx_gmxx_tx_ovr_bp_cn38xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_12_63:52; @@ -6636,20 +2137,6 @@ union cvmx_gmxx_tx_ovr_bp { uint64_t reserved_12_63:52; #endif } cn38xx; - struct cvmx_gmxx_tx_ovr_bp_cn38xx cn38xxp2; - struct cvmx_gmxx_tx_ovr_bp_cn30xx cn50xx; - struct cvmx_gmxx_tx_ovr_bp_s cn52xx; - struct cvmx_gmxx_tx_ovr_bp_s cn52xxp1; - struct cvmx_gmxx_tx_ovr_bp_s cn56xx; - struct cvmx_gmxx_tx_ovr_bp_s cn56xxp1; - struct cvmx_gmxx_tx_ovr_bp_cn38xx cn58xx; - struct cvmx_gmxx_tx_ovr_bp_cn38xx cn58xxp1; - struct cvmx_gmxx_tx_ovr_bp_s cn61xx; - struct cvmx_gmxx_tx_ovr_bp_s cn63xx; - struct cvmx_gmxx_tx_ovr_bp_s cn63xxp1; - struct cvmx_gmxx_tx_ovr_bp_s cn66xx; - struct cvmx_gmxx_tx_ovr_bp_s cn68xx; - struct cvmx_gmxx_tx_ovr_bp_s cn68xxp1; struct cvmx_gmxx_tx_ovr_bp_cnf71xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_48_63:16; @@ -6673,68 +2160,6 @@ union cvmx_gmxx_tx_ovr_bp { } cnf71xx; }; -union cvmx_gmxx_tx_pause_pkt_dmac { - uint64_t u64; - struct cvmx_gmxx_tx_pause_pkt_dmac_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_48_63:16; - uint64_t dmac:48; -#else - uint64_t dmac:48; - uint64_t reserved_48_63:16; -#endif - } s; - struct cvmx_gmxx_tx_pause_pkt_dmac_s cn30xx; - struct cvmx_gmxx_tx_pause_pkt_dmac_s cn31xx; - struct cvmx_gmxx_tx_pause_pkt_dmac_s cn38xx; - struct cvmx_gmxx_tx_pause_pkt_dmac_s cn38xxp2; - struct cvmx_gmxx_tx_pause_pkt_dmac_s cn50xx; - struct cvmx_gmxx_tx_pause_pkt_dmac_s cn52xx; - struct cvmx_gmxx_tx_pause_pkt_dmac_s cn52xxp1; - struct cvmx_gmxx_tx_pause_pkt_dmac_s cn56xx; - struct cvmx_gmxx_tx_pause_pkt_dmac_s cn56xxp1; - struct cvmx_gmxx_tx_pause_pkt_dmac_s cn58xx; - struct cvmx_gmxx_tx_pause_pkt_dmac_s cn58xxp1; - struct cvmx_gmxx_tx_pause_pkt_dmac_s cn61xx; - struct cvmx_gmxx_tx_pause_pkt_dmac_s cn63xx; - struct cvmx_gmxx_tx_pause_pkt_dmac_s cn63xxp1; - struct cvmx_gmxx_tx_pause_pkt_dmac_s cn66xx; - struct cvmx_gmxx_tx_pause_pkt_dmac_s cn68xx; - struct cvmx_gmxx_tx_pause_pkt_dmac_s cn68xxp1; - struct cvmx_gmxx_tx_pause_pkt_dmac_s cnf71xx; -}; - -union cvmx_gmxx_tx_pause_pkt_type { - uint64_t u64; - struct cvmx_gmxx_tx_pause_pkt_type_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t type:16; -#else - uint64_t type:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_gmxx_tx_pause_pkt_type_s cn30xx; - struct cvmx_gmxx_tx_pause_pkt_type_s cn31xx; - struct cvmx_gmxx_tx_pause_pkt_type_s cn38xx; - struct cvmx_gmxx_tx_pause_pkt_type_s cn38xxp2; - struct cvmx_gmxx_tx_pause_pkt_type_s cn50xx; - struct cvmx_gmxx_tx_pause_pkt_type_s cn52xx; - struct cvmx_gmxx_tx_pause_pkt_type_s cn52xxp1; - struct cvmx_gmxx_tx_pause_pkt_type_s cn56xx; - struct cvmx_gmxx_tx_pause_pkt_type_s cn56xxp1; - struct cvmx_gmxx_tx_pause_pkt_type_s cn58xx; - struct cvmx_gmxx_tx_pause_pkt_type_s cn58xxp1; - struct cvmx_gmxx_tx_pause_pkt_type_s cn61xx; - struct cvmx_gmxx_tx_pause_pkt_type_s cn63xx; - struct cvmx_gmxx_tx_pause_pkt_type_s cn63xxp1; - struct cvmx_gmxx_tx_pause_pkt_type_s cn66xx; - struct cvmx_gmxx_tx_pause_pkt_type_s cn68xx; - struct cvmx_gmxx_tx_pause_pkt_type_s cn68xxp1; - struct cvmx_gmxx_tx_pause_pkt_type_s cnf71xx; -}; - union cvmx_gmxx_tx_prts { uint64_t u64; struct cvmx_gmxx_tx_prts_s { @@ -6746,24 +2171,6 @@ union cvmx_gmxx_tx_prts { uint64_t reserved_5_63:59; #endif } s; - struct cvmx_gmxx_tx_prts_s cn30xx; - struct cvmx_gmxx_tx_prts_s cn31xx; - struct cvmx_gmxx_tx_prts_s cn38xx; - struct cvmx_gmxx_tx_prts_s cn38xxp2; - struct cvmx_gmxx_tx_prts_s cn50xx; - struct cvmx_gmxx_tx_prts_s cn52xx; - struct cvmx_gmxx_tx_prts_s cn52xxp1; - struct cvmx_gmxx_tx_prts_s cn56xx; - struct cvmx_gmxx_tx_prts_s cn56xxp1; - struct cvmx_gmxx_tx_prts_s cn58xx; - struct cvmx_gmxx_tx_prts_s cn58xxp1; - struct cvmx_gmxx_tx_prts_s cn61xx; - struct cvmx_gmxx_tx_prts_s cn63xx; - struct cvmx_gmxx_tx_prts_s cn63xxp1; - struct cvmx_gmxx_tx_prts_s cn66xx; - struct cvmx_gmxx_tx_prts_s cn68xx; - struct cvmx_gmxx_tx_prts_s cn68xxp1; - struct cvmx_gmxx_tx_prts_s cnf71xx; }; union cvmx_gmxx_tx_spi_ctl { @@ -6779,26 +2186,6 @@ union cvmx_gmxx_tx_spi_ctl { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_gmxx_tx_spi_ctl_s cn38xx; - struct cvmx_gmxx_tx_spi_ctl_s cn38xxp2; - struct cvmx_gmxx_tx_spi_ctl_s cn58xx; - struct cvmx_gmxx_tx_spi_ctl_s cn58xxp1; -}; - -union cvmx_gmxx_tx_spi_drain { - uint64_t u64; - struct cvmx_gmxx_tx_spi_drain_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t drain:16; -#else - uint64_t drain:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_gmxx_tx_spi_drain_s cn38xx; - struct cvmx_gmxx_tx_spi_drain_s cn58xx; - struct cvmx_gmxx_tx_spi_drain_s cn58xxp1; }; union cvmx_gmxx_tx_spi_max { @@ -6827,24 +2214,6 @@ union cvmx_gmxx_tx_spi_max { uint64_t reserved_16_63:48; #endif } cn38xx; - struct cvmx_gmxx_tx_spi_max_cn38xx cn38xxp2; - struct cvmx_gmxx_tx_spi_max_s cn58xx; - struct cvmx_gmxx_tx_spi_max_s cn58xxp1; -}; - -union cvmx_gmxx_tx_spi_roundx { - uint64_t u64; - struct cvmx_gmxx_tx_spi_roundx_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t round:16; -#else - uint64_t round:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_gmxx_tx_spi_roundx_s cn58xx; - struct cvmx_gmxx_tx_spi_roundx_s cn58xxp1; }; union cvmx_gmxx_tx_spi_thresh { @@ -6858,10 +2227,6 @@ union cvmx_gmxx_tx_spi_thresh { uint64_t reserved_6_63:58; #endif } s; - struct cvmx_gmxx_tx_spi_thresh_s cn38xx; - struct cvmx_gmxx_tx_spi_thresh_s cn38xxp2; - struct cvmx_gmxx_tx_spi_thresh_s cn58xx; - struct cvmx_gmxx_tx_spi_thresh_s cn58xxp1; }; union cvmx_gmxx_tx_xaui_ctl { @@ -6889,43 +2254,6 @@ union cvmx_gmxx_tx_xaui_ctl { uint64_t reserved_11_63:53; #endif } s; - struct cvmx_gmxx_tx_xaui_ctl_s cn52xx; - struct cvmx_gmxx_tx_xaui_ctl_s cn52xxp1; - struct cvmx_gmxx_tx_xaui_ctl_s cn56xx; - struct cvmx_gmxx_tx_xaui_ctl_s cn56xxp1; - struct cvmx_gmxx_tx_xaui_ctl_s cn61xx; - struct cvmx_gmxx_tx_xaui_ctl_s cn63xx; - struct cvmx_gmxx_tx_xaui_ctl_s cn63xxp1; - struct cvmx_gmxx_tx_xaui_ctl_s cn66xx; - struct cvmx_gmxx_tx_xaui_ctl_s cn68xx; - struct cvmx_gmxx_tx_xaui_ctl_s cn68xxp1; - struct cvmx_gmxx_tx_xaui_ctl_s cnf71xx; -}; - -union cvmx_gmxx_xaui_ext_loopback { - uint64_t u64; - struct cvmx_gmxx_xaui_ext_loopback_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_5_63:59; - uint64_t en:1; - uint64_t thresh:4; -#else - uint64_t thresh:4; - uint64_t en:1; - uint64_t reserved_5_63:59; -#endif - } s; - struct cvmx_gmxx_xaui_ext_loopback_s cn52xx; - struct cvmx_gmxx_xaui_ext_loopback_s cn52xxp1; - struct cvmx_gmxx_xaui_ext_loopback_s cn56xx; - struct cvmx_gmxx_xaui_ext_loopback_s cn56xxp1; - struct cvmx_gmxx_xaui_ext_loopback_s cn61xx; - struct cvmx_gmxx_xaui_ext_loopback_s cn63xx; - struct cvmx_gmxx_xaui_ext_loopback_s cn63xxp1; - struct cvmx_gmxx_xaui_ext_loopback_s cn66xx; - struct cvmx_gmxx_xaui_ext_loopback_s cn68xx; - struct cvmx_gmxx_xaui_ext_loopback_s cn68xxp1; - struct cvmx_gmxx_xaui_ext_loopback_s cnf71xx; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-gpio-defs.h b/arch/mips/include/asm/octeon/cvmx-gpio-defs.h index 8123b8209369..5420fa667a9c 100644 --- a/arch/mips/include/asm/octeon/cvmx-gpio-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-gpio-defs.h @@ -90,10 +90,6 @@ union cvmx_gpio_bit_cfgx { uint64_t reserved_12_63:52; #endif } cn30xx; - struct cvmx_gpio_bit_cfgx_cn30xx cn31xx; - struct cvmx_gpio_bit_cfgx_cn30xx cn38xx; - struct cvmx_gpio_bit_cfgx_cn30xx cn38xxp2; - struct cvmx_gpio_bit_cfgx_cn30xx cn50xx; struct cvmx_gpio_bit_cfgx_cn52xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_15_63:49; @@ -117,20 +113,6 @@ union cvmx_gpio_bit_cfgx { uint64_t reserved_15_63:49; #endif } cn52xx; - struct cvmx_gpio_bit_cfgx_cn52xx cn52xxp1; - struct cvmx_gpio_bit_cfgx_cn52xx cn56xx; - struct cvmx_gpio_bit_cfgx_cn52xx cn56xxp1; - struct cvmx_gpio_bit_cfgx_cn30xx cn58xx; - struct cvmx_gpio_bit_cfgx_cn30xx cn58xxp1; - struct cvmx_gpio_bit_cfgx_s cn61xx; - struct cvmx_gpio_bit_cfgx_s cn63xx; - struct cvmx_gpio_bit_cfgx_s cn63xxp1; - struct cvmx_gpio_bit_cfgx_s cn66xx; - struct cvmx_gpio_bit_cfgx_s cn68xx; - struct cvmx_gpio_bit_cfgx_s cn68xxp1; - struct cvmx_gpio_bit_cfgx_s cn70xx; - struct cvmx_gpio_bit_cfgx_s cn73xx; - struct cvmx_gpio_bit_cfgx_s cnf71xx; }; union cvmx_gpio_boot_ena { @@ -146,9 +128,6 @@ union cvmx_gpio_boot_ena { uint64_t reserved_12_63:52; #endif } s; - struct cvmx_gpio_boot_ena_s cn30xx; - struct cvmx_gpio_boot_ena_s cn31xx; - struct cvmx_gpio_boot_ena_s cn50xx; }; union cvmx_gpio_clk_genx { @@ -162,17 +141,6 @@ union cvmx_gpio_clk_genx { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_gpio_clk_genx_s cn52xx; - struct cvmx_gpio_clk_genx_s cn52xxp1; - struct cvmx_gpio_clk_genx_s cn56xx; - struct cvmx_gpio_clk_genx_s cn56xxp1; - struct cvmx_gpio_clk_genx_s cn61xx; - struct cvmx_gpio_clk_genx_s cn63xx; - struct cvmx_gpio_clk_genx_s cn63xxp1; - struct cvmx_gpio_clk_genx_s cn66xx; - struct cvmx_gpio_clk_genx_s cn68xx; - struct cvmx_gpio_clk_genx_s cn68xxp1; - struct cvmx_gpio_clk_genx_s cnf71xx; }; union cvmx_gpio_clk_qlmx { @@ -218,11 +186,6 @@ union cvmx_gpio_clk_qlmx { uint64_t reserved_3_63:61; #endif } cn63xx; - struct cvmx_gpio_clk_qlmx_cn63xx cn63xxp1; - struct cvmx_gpio_clk_qlmx_cn61xx cn66xx; - struct cvmx_gpio_clk_qlmx_s cn68xx; - struct cvmx_gpio_clk_qlmx_s cn68xxp1; - struct cvmx_gpio_clk_qlmx_cn61xx cnf71xx; }; union cvmx_gpio_dbg_ena { @@ -236,9 +199,6 @@ union cvmx_gpio_dbg_ena { uint64_t reserved_21_63:43; #endif } s; - struct cvmx_gpio_dbg_ena_s cn30xx; - struct cvmx_gpio_dbg_ena_s cn31xx; - struct cvmx_gpio_dbg_ena_s cn50xx; }; union cvmx_gpio_int_clr { @@ -252,24 +212,6 @@ union cvmx_gpio_int_clr { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_gpio_int_clr_s cn30xx; - struct cvmx_gpio_int_clr_s cn31xx; - struct cvmx_gpio_int_clr_s cn38xx; - struct cvmx_gpio_int_clr_s cn38xxp2; - struct cvmx_gpio_int_clr_s cn50xx; - struct cvmx_gpio_int_clr_s cn52xx; - struct cvmx_gpio_int_clr_s cn52xxp1; - struct cvmx_gpio_int_clr_s cn56xx; - struct cvmx_gpio_int_clr_s cn56xxp1; - struct cvmx_gpio_int_clr_s cn58xx; - struct cvmx_gpio_int_clr_s cn58xxp1; - struct cvmx_gpio_int_clr_s cn61xx; - struct cvmx_gpio_int_clr_s cn63xx; - struct cvmx_gpio_int_clr_s cn63xxp1; - struct cvmx_gpio_int_clr_s cn66xx; - struct cvmx_gpio_int_clr_s cn68xx; - struct cvmx_gpio_int_clr_s cn68xxp1; - struct cvmx_gpio_int_clr_s cnf71xx; }; union cvmx_gpio_multi_cast { @@ -283,8 +225,6 @@ union cvmx_gpio_multi_cast { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_gpio_multi_cast_s cn61xx; - struct cvmx_gpio_multi_cast_s cnf71xx; }; union cvmx_gpio_pin_ena { @@ -302,7 +242,6 @@ union cvmx_gpio_pin_ena { uint64_t reserved_20_63:44; #endif } s; - struct cvmx_gpio_pin_ena_s cn66xx; }; union cvmx_gpio_rx_dat { @@ -316,8 +255,6 @@ union cvmx_gpio_rx_dat { uint64_t reserved_24_63:40; #endif } s; - struct cvmx_gpio_rx_dat_s cn30xx; - struct cvmx_gpio_rx_dat_s cn31xx; struct cvmx_gpio_rx_dat_cn38xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_16_63:48; @@ -327,14 +264,6 @@ union cvmx_gpio_rx_dat { uint64_t reserved_16_63:48; #endif } cn38xx; - struct cvmx_gpio_rx_dat_cn38xx cn38xxp2; - struct cvmx_gpio_rx_dat_s cn50xx; - struct cvmx_gpio_rx_dat_cn38xx cn52xx; - struct cvmx_gpio_rx_dat_cn38xx cn52xxp1; - struct cvmx_gpio_rx_dat_cn38xx cn56xx; - struct cvmx_gpio_rx_dat_cn38xx cn56xxp1; - struct cvmx_gpio_rx_dat_cn38xx cn58xx; - struct cvmx_gpio_rx_dat_cn38xx cn58xxp1; struct cvmx_gpio_rx_dat_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_20_63:44; @@ -344,12 +273,6 @@ union cvmx_gpio_rx_dat { uint64_t reserved_20_63:44; #endif } cn61xx; - struct cvmx_gpio_rx_dat_cn38xx cn63xx; - struct cvmx_gpio_rx_dat_cn38xx cn63xxp1; - struct cvmx_gpio_rx_dat_cn61xx cn66xx; - struct cvmx_gpio_rx_dat_cn38xx cn68xx; - struct cvmx_gpio_rx_dat_cn38xx cn68xxp1; - struct cvmx_gpio_rx_dat_cn61xx cnf71xx; }; union cvmx_gpio_tim_ctl { @@ -363,8 +286,6 @@ union cvmx_gpio_tim_ctl { uint64_t reserved_4_63:60; #endif } s; - struct cvmx_gpio_tim_ctl_s cn68xx; - struct cvmx_gpio_tim_ctl_s cn68xxp1; }; union cvmx_gpio_tx_clr { @@ -378,8 +299,6 @@ union cvmx_gpio_tx_clr { uint64_t reserved_24_63:40; #endif } s; - struct cvmx_gpio_tx_clr_s cn30xx; - struct cvmx_gpio_tx_clr_s cn31xx; struct cvmx_gpio_tx_clr_cn38xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_16_63:48; @@ -389,14 +308,6 @@ union cvmx_gpio_tx_clr { uint64_t reserved_16_63:48; #endif } cn38xx; - struct cvmx_gpio_tx_clr_cn38xx cn38xxp2; - struct cvmx_gpio_tx_clr_s cn50xx; - struct cvmx_gpio_tx_clr_cn38xx cn52xx; - struct cvmx_gpio_tx_clr_cn38xx cn52xxp1; - struct cvmx_gpio_tx_clr_cn38xx cn56xx; - struct cvmx_gpio_tx_clr_cn38xx cn56xxp1; - struct cvmx_gpio_tx_clr_cn38xx cn58xx; - struct cvmx_gpio_tx_clr_cn38xx cn58xxp1; struct cvmx_gpio_tx_clr_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_20_63:44; @@ -406,12 +317,6 @@ union cvmx_gpio_tx_clr { uint64_t reserved_20_63:44; #endif } cn61xx; - struct cvmx_gpio_tx_clr_cn38xx cn63xx; - struct cvmx_gpio_tx_clr_cn38xx cn63xxp1; - struct cvmx_gpio_tx_clr_cn61xx cn66xx; - struct cvmx_gpio_tx_clr_cn38xx cn68xx; - struct cvmx_gpio_tx_clr_cn38xx cn68xxp1; - struct cvmx_gpio_tx_clr_cn61xx cnf71xx; }; union cvmx_gpio_tx_set { @@ -425,8 +330,6 @@ union cvmx_gpio_tx_set { uint64_t reserved_24_63:40; #endif } s; - struct cvmx_gpio_tx_set_s cn30xx; - struct cvmx_gpio_tx_set_s cn31xx; struct cvmx_gpio_tx_set_cn38xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_16_63:48; @@ -436,14 +339,6 @@ union cvmx_gpio_tx_set { uint64_t reserved_16_63:48; #endif } cn38xx; - struct cvmx_gpio_tx_set_cn38xx cn38xxp2; - struct cvmx_gpio_tx_set_s cn50xx; - struct cvmx_gpio_tx_set_cn38xx cn52xx; - struct cvmx_gpio_tx_set_cn38xx cn52xxp1; - struct cvmx_gpio_tx_set_cn38xx cn56xx; - struct cvmx_gpio_tx_set_cn38xx cn56xxp1; - struct cvmx_gpio_tx_set_cn38xx cn58xx; - struct cvmx_gpio_tx_set_cn38xx cn58xxp1; struct cvmx_gpio_tx_set_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_20_63:44; @@ -453,12 +348,6 @@ union cvmx_gpio_tx_set { uint64_t reserved_20_63:44; #endif } cn61xx; - struct cvmx_gpio_tx_set_cn38xx cn63xx; - struct cvmx_gpio_tx_set_cn38xx cn63xxp1; - struct cvmx_gpio_tx_set_cn61xx cn66xx; - struct cvmx_gpio_tx_set_cn38xx cn68xx; - struct cvmx_gpio_tx_set_cn38xx cn68xxp1; - struct cvmx_gpio_tx_set_cn61xx cnf71xx; }; union cvmx_gpio_xbit_cfgx { @@ -505,11 +394,6 @@ union cvmx_gpio_xbit_cfgx { uint64_t reserved_12_63:52; #endif } cn30xx; - struct cvmx_gpio_xbit_cfgx_cn30xx cn31xx; - struct cvmx_gpio_xbit_cfgx_cn30xx cn50xx; - struct cvmx_gpio_xbit_cfgx_s cn61xx; - struct cvmx_gpio_xbit_cfgx_s cn66xx; - struct cvmx_gpio_xbit_cfgx_s cnf71xx; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-helper-rgmii.h b/arch/mips/include/asm/octeon/cvmx-helper-rgmii.h index f7a95d7de140..ac42b5066bd9 100644 --- a/arch/mips/include/asm/octeon/cvmx-helper-rgmii.h +++ b/arch/mips/include/asm/octeon/cvmx-helper-rgmii.h @@ -90,21 +90,4 @@ extern cvmx_helper_link_info_t __cvmx_helper_rgmii_link_get(int ipd_port); extern int __cvmx_helper_rgmii_link_set(int ipd_port, cvmx_helper_link_info_t link_info); -/** - * Configure a port for internal and/or external loopback. Internal loopback - * causes packets sent by the port to be received by Octeon. External loopback - * causes packets received from the wire to sent out again. - * - * @ipd_port: IPD/PKO port to loopback. - * @enable_internal: - * Non zero if you want internal loopback - * @enable_external: - * Non zero if you want external loopback - * - * Returns Zero on success, negative on failure. - */ -extern int __cvmx_helper_rgmii_configure_loopback(int ipd_port, - int enable_internal, - int enable_external); - #endif diff --git a/arch/mips/include/asm/octeon/cvmx-helper-sgmii.h b/arch/mips/include/asm/octeon/cvmx-helper-sgmii.h index 63fd21335e4b..3a54dea58c0a 100644 --- a/arch/mips/include/asm/octeon/cvmx-helper-sgmii.h +++ b/arch/mips/include/asm/octeon/cvmx-helper-sgmii.h @@ -84,21 +84,4 @@ extern cvmx_helper_link_info_t __cvmx_helper_sgmii_link_get(int ipd_port); extern int __cvmx_helper_sgmii_link_set(int ipd_port, cvmx_helper_link_info_t link_info); -/** - * Configure a port for internal and/or external loopback. Internal loopback - * causes packets sent by the port to be received by Octeon. External loopback - * causes packets received from the wire to sent out again. - * - * @ipd_port: IPD/PKO port to loopback. - * @enable_internal: - * Non zero if you want internal loopback - * @enable_external: - * Non zero if you want external loopback - * - * Returns Zero on success, negative on failure. - */ -extern int __cvmx_helper_sgmii_configure_loopback(int ipd_port, - int enable_internal, - int enable_external); - #endif diff --git a/arch/mips/include/asm/octeon/cvmx-helper-util.h b/arch/mips/include/asm/octeon/cvmx-helper-util.h index f446f212bbd4..e9a97e7ee604 100644 --- a/arch/mips/include/asm/octeon/cvmx-helper-util.h +++ b/arch/mips/include/asm/octeon/cvmx-helper-util.h @@ -45,29 +45,6 @@ extern const char *cvmx_helper_interface_mode_to_string(cvmx_helper_interface_mode_t mode); /** - * Debug routine to dump the packet structure to the console - * - * @work: Work queue entry containing the packet to dump - * Returns - */ -extern int cvmx_helper_dump_packet(cvmx_wqe_t *work); - -/** - * Setup Random Early Drop on a specific input queue - * - * @queue: Input queue to setup RED on (0-7) - * @pass_thresh: - * Packets will begin slowly dropping when there are less than - * this many packet buffers free in FPA 0. - * @drop_thresh: - * All incoming packets will be dropped when there are less - * than this many free packet buffers in FPA 0. - * Returns Zero on success. Negative on failure - */ -extern int cvmx_helper_setup_red_queue(int queue, int pass_thresh, - int drop_thresh); - -/** * Setup Random Early Drop to automatically begin dropping packets. * * @pass_thresh: diff --git a/arch/mips/include/asm/octeon/cvmx-helper-xaui.h b/arch/mips/include/asm/octeon/cvmx-helper-xaui.h index f8ce53f6f28f..51f45b495680 100644 --- a/arch/mips/include/asm/octeon/cvmx-helper-xaui.h +++ b/arch/mips/include/asm/octeon/cvmx-helper-xaui.h @@ -84,20 +84,4 @@ extern cvmx_helper_link_info_t __cvmx_helper_xaui_link_get(int ipd_port); extern int __cvmx_helper_xaui_link_set(int ipd_port, cvmx_helper_link_info_t link_info); -/** - * Configure a port for internal and/or external loopback. Internal loopback - * causes packets sent by the port to be received by Octeon. External loopback - * causes packets received from the wire to sent out again. - * - * @ipd_port: IPD/PKO port to loopback. - * @enable_internal: - * Non zero if you want internal loopback - * @enable_external: - * Non zero if you want external loopback - * - * Returns Zero on success, negative on failure. - */ -extern int __cvmx_helper_xaui_configure_loopback(int ipd_port, - int enable_internal, - int enable_external); #endif diff --git a/arch/mips/include/asm/octeon/cvmx-helper.h b/arch/mips/include/asm/octeon/cvmx-helper.h index 0ed87cb67e7f..ba0e76f578e0 100644 --- a/arch/mips/include/asm/octeon/cvmx-helper.h +++ b/arch/mips/include/asm/octeon/cvmx-helper.h @@ -71,26 +71,6 @@ typedef union { #include <asm/octeon/cvmx-helper-xaui.h> /** - * cvmx_override_pko_queue_priority(int ipd_port, uint64_t - * priorities[16]) is a function pointer. It is meant to allow - * customization of the PKO queue priorities based on the port - * number. Users should set this pointer to a function before - * calling any cvmx-helper operations. - */ -extern void (*cvmx_override_pko_queue_priority) (int pko_port, - uint64_t priorities[16]); - -/** - * cvmx_override_ipd_port_setup(int ipd_port) is a function - * pointer. It is meant to allow customization of the IPD port - * setup before packet input/output comes online. It is called - * after cvmx-helper does the default IPD configuration, but - * before IPD is enabled. Users should set this pointer to a - * function before calling any cvmx-helper operations. - */ -extern void (*cvmx_override_ipd_port_setup) (int ipd_port); - -/** * This function enables the IPD and also enables the packet interfaces. * The packet interfaces (RGMII and SPI) must be enabled after the * IPD. This should be called by the user program after any additional @@ -195,20 +175,4 @@ extern int cvmx_helper_link_set(int ipd_port, extern int cvmx_helper_interface_probe(int interface); extern int cvmx_helper_interface_enumerate(int interface); -/** - * Configure a port for internal and/or external loopback. Internal loopback - * causes packets sent by the port to be received by Octeon. External loopback - * causes packets received from the wire to sent out again. - * - * @ipd_port: IPD/PKO port to loopback. - * @enable_internal: - * Non zero if you want internal loopback - * @enable_external: - * Non zero if you want external loopback - * - * Returns Zero on success, negative on failure. - */ -extern int cvmx_helper_configure_loopback(int ipd_port, int enable_internal, - int enable_external); - #endif /* __CVMX_HELPER_H__ */ diff --git a/arch/mips/include/asm/octeon/cvmx-iob-defs.h b/arch/mips/include/asm/octeon/cvmx-iob-defs.h index 7936f816e93e..989b67bbac5b 100644 --- a/arch/mips/include/asm/octeon/cvmx-iob-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-iob-defs.h @@ -119,16 +119,6 @@ union cvmx_iob_bist_status { uint64_t reserved_18_63:46; #endif } cn30xx; - struct cvmx_iob_bist_status_cn30xx cn31xx; - struct cvmx_iob_bist_status_cn30xx cn38xx; - struct cvmx_iob_bist_status_cn30xx cn38xxp2; - struct cvmx_iob_bist_status_cn30xx cn50xx; - struct cvmx_iob_bist_status_cn30xx cn52xx; - struct cvmx_iob_bist_status_cn30xx cn52xxp1; - struct cvmx_iob_bist_status_cn30xx cn56xx; - struct cvmx_iob_bist_status_cn30xx cn56xxp1; - struct cvmx_iob_bist_status_cn30xx cn58xx; - struct cvmx_iob_bist_status_cn30xx cn58xxp1; struct cvmx_iob_bist_status_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_23_63:41; @@ -182,9 +172,6 @@ union cvmx_iob_bist_status { uint64_t reserved_23_63:41; #endif } cn61xx; - struct cvmx_iob_bist_status_cn61xx cn63xx; - struct cvmx_iob_bist_status_cn61xx cn63xxp1; - struct cvmx_iob_bist_status_cn61xx cn66xx; struct cvmx_iob_bist_status_cn68xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_18_63:46; @@ -228,8 +215,6 @@ union cvmx_iob_bist_status { uint64_t reserved_18_63:46; #endif } cn68xx; - struct cvmx_iob_bist_status_cn68xx cn68xxp1; - struct cvmx_iob_bist_status_cn61xx cnf71xx; }; union cvmx_iob_ctl_status { @@ -274,10 +259,6 @@ union cvmx_iob_ctl_status { uint64_t reserved_5_63:59; #endif } cn30xx; - struct cvmx_iob_ctl_status_cn30xx cn31xx; - struct cvmx_iob_ctl_status_cn30xx cn38xx; - struct cvmx_iob_ctl_status_cn30xx cn38xxp2; - struct cvmx_iob_ctl_status_cn30xx cn50xx; struct cvmx_iob_ctl_status_cn52xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_6_63:58; @@ -297,11 +278,6 @@ union cvmx_iob_ctl_status { uint64_t reserved_6_63:58; #endif } cn52xx; - struct cvmx_iob_ctl_status_cn30xx cn52xxp1; - struct cvmx_iob_ctl_status_cn30xx cn56xx; - struct cvmx_iob_ctl_status_cn30xx cn56xxp1; - struct cvmx_iob_ctl_status_cn30xx cn58xx; - struct cvmx_iob_ctl_status_cn30xx cn58xxp1; struct cvmx_iob_ctl_status_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_11_63:53; @@ -346,8 +322,6 @@ union cvmx_iob_ctl_status { uint64_t reserved_10_63:54; #endif } cn63xx; - struct cvmx_iob_ctl_status_cn63xx cn63xxp1; - struct cvmx_iob_ctl_status_cn61xx cn66xx; struct cvmx_iob_ctl_status_cn68xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_11_63:53; @@ -371,8 +345,6 @@ union cvmx_iob_ctl_status { uint64_t reserved_11_63:53; #endif } cn68xx; - struct cvmx_iob_ctl_status_cn68xx cn68xxp1; - struct cvmx_iob_ctl_status_cn61xx cnf71xx; }; union cvmx_iob_dwb_pri_cnt { @@ -388,19 +360,6 @@ union cvmx_iob_dwb_pri_cnt { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_iob_dwb_pri_cnt_s cn38xx; - struct cvmx_iob_dwb_pri_cnt_s cn38xxp2; - struct cvmx_iob_dwb_pri_cnt_s cn52xx; - struct cvmx_iob_dwb_pri_cnt_s cn52xxp1; - struct cvmx_iob_dwb_pri_cnt_s cn56xx; - struct cvmx_iob_dwb_pri_cnt_s cn56xxp1; - struct cvmx_iob_dwb_pri_cnt_s cn58xx; - struct cvmx_iob_dwb_pri_cnt_s cn58xxp1; - struct cvmx_iob_dwb_pri_cnt_s cn61xx; - struct cvmx_iob_dwb_pri_cnt_s cn63xx; - struct cvmx_iob_dwb_pri_cnt_s cn63xxp1; - struct cvmx_iob_dwb_pri_cnt_s cn66xx; - struct cvmx_iob_dwb_pri_cnt_s cnf71xx; }; union cvmx_iob_fau_timeout { @@ -416,24 +375,6 @@ union cvmx_iob_fau_timeout { uint64_t reserved_13_63:51; #endif } s; - struct cvmx_iob_fau_timeout_s cn30xx; - struct cvmx_iob_fau_timeout_s cn31xx; - struct cvmx_iob_fau_timeout_s cn38xx; - struct cvmx_iob_fau_timeout_s cn38xxp2; - struct cvmx_iob_fau_timeout_s cn50xx; - struct cvmx_iob_fau_timeout_s cn52xx; - struct cvmx_iob_fau_timeout_s cn52xxp1; - struct cvmx_iob_fau_timeout_s cn56xx; - struct cvmx_iob_fau_timeout_s cn56xxp1; - struct cvmx_iob_fau_timeout_s cn58xx; - struct cvmx_iob_fau_timeout_s cn58xxp1; - struct cvmx_iob_fau_timeout_s cn61xx; - struct cvmx_iob_fau_timeout_s cn63xx; - struct cvmx_iob_fau_timeout_s cn63xxp1; - struct cvmx_iob_fau_timeout_s cn66xx; - struct cvmx_iob_fau_timeout_s cn68xx; - struct cvmx_iob_fau_timeout_s cn68xxp1; - struct cvmx_iob_fau_timeout_s cnf71xx; }; union cvmx_iob_i2c_pri_cnt { @@ -449,19 +390,6 @@ union cvmx_iob_i2c_pri_cnt { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_iob_i2c_pri_cnt_s cn38xx; - struct cvmx_iob_i2c_pri_cnt_s cn38xxp2; - struct cvmx_iob_i2c_pri_cnt_s cn52xx; - struct cvmx_iob_i2c_pri_cnt_s cn52xxp1; - struct cvmx_iob_i2c_pri_cnt_s cn56xx; - struct cvmx_iob_i2c_pri_cnt_s cn56xxp1; - struct cvmx_iob_i2c_pri_cnt_s cn58xx; - struct cvmx_iob_i2c_pri_cnt_s cn58xxp1; - struct cvmx_iob_i2c_pri_cnt_s cn61xx; - struct cvmx_iob_i2c_pri_cnt_s cn63xx; - struct cvmx_iob_i2c_pri_cnt_s cn63xxp1; - struct cvmx_iob_i2c_pri_cnt_s cn66xx; - struct cvmx_iob_i2c_pri_cnt_s cnf71xx; }; union cvmx_iob_inb_control_match { @@ -481,24 +409,6 @@ union cvmx_iob_inb_control_match { uint64_t reserved_29_63:35; #endif } s; - struct cvmx_iob_inb_control_match_s cn30xx; - struct cvmx_iob_inb_control_match_s cn31xx; - struct cvmx_iob_inb_control_match_s cn38xx; - struct cvmx_iob_inb_control_match_s cn38xxp2; - struct cvmx_iob_inb_control_match_s cn50xx; - struct cvmx_iob_inb_control_match_s cn52xx; - struct cvmx_iob_inb_control_match_s cn52xxp1; - struct cvmx_iob_inb_control_match_s cn56xx; - struct cvmx_iob_inb_control_match_s cn56xxp1; - struct cvmx_iob_inb_control_match_s cn58xx; - struct cvmx_iob_inb_control_match_s cn58xxp1; - struct cvmx_iob_inb_control_match_s cn61xx; - struct cvmx_iob_inb_control_match_s cn63xx; - struct cvmx_iob_inb_control_match_s cn63xxp1; - struct cvmx_iob_inb_control_match_s cn66xx; - struct cvmx_iob_inb_control_match_s cn68xx; - struct cvmx_iob_inb_control_match_s cn68xxp1; - struct cvmx_iob_inb_control_match_s cnf71xx; }; union cvmx_iob_inb_control_match_enb { @@ -518,24 +428,6 @@ union cvmx_iob_inb_control_match_enb { uint64_t reserved_29_63:35; #endif } s; - struct cvmx_iob_inb_control_match_enb_s cn30xx; - struct cvmx_iob_inb_control_match_enb_s cn31xx; - struct cvmx_iob_inb_control_match_enb_s cn38xx; - struct cvmx_iob_inb_control_match_enb_s cn38xxp2; - struct cvmx_iob_inb_control_match_enb_s cn50xx; - struct cvmx_iob_inb_control_match_enb_s cn52xx; - struct cvmx_iob_inb_control_match_enb_s cn52xxp1; - struct cvmx_iob_inb_control_match_enb_s cn56xx; - struct cvmx_iob_inb_control_match_enb_s cn56xxp1; - struct cvmx_iob_inb_control_match_enb_s cn58xx; - struct cvmx_iob_inb_control_match_enb_s cn58xxp1; - struct cvmx_iob_inb_control_match_enb_s cn61xx; - struct cvmx_iob_inb_control_match_enb_s cn63xx; - struct cvmx_iob_inb_control_match_enb_s cn63xxp1; - struct cvmx_iob_inb_control_match_enb_s cn66xx; - struct cvmx_iob_inb_control_match_enb_s cn68xx; - struct cvmx_iob_inb_control_match_enb_s cn68xxp1; - struct cvmx_iob_inb_control_match_enb_s cnf71xx; }; union cvmx_iob_inb_data_match { @@ -547,24 +439,6 @@ union cvmx_iob_inb_data_match { uint64_t data:64; #endif } s; - struct cvmx_iob_inb_data_match_s cn30xx; - struct cvmx_iob_inb_data_match_s cn31xx; - struct cvmx_iob_inb_data_match_s cn38xx; - struct cvmx_iob_inb_data_match_s cn38xxp2; - struct cvmx_iob_inb_data_match_s cn50xx; - struct cvmx_iob_inb_data_match_s cn52xx; - struct cvmx_iob_inb_data_match_s cn52xxp1; - struct cvmx_iob_inb_data_match_s cn56xx; - struct cvmx_iob_inb_data_match_s cn56xxp1; - struct cvmx_iob_inb_data_match_s cn58xx; - struct cvmx_iob_inb_data_match_s cn58xxp1; - struct cvmx_iob_inb_data_match_s cn61xx; - struct cvmx_iob_inb_data_match_s cn63xx; - struct cvmx_iob_inb_data_match_s cn63xxp1; - struct cvmx_iob_inb_data_match_s cn66xx; - struct cvmx_iob_inb_data_match_s cn68xx; - struct cvmx_iob_inb_data_match_s cn68xxp1; - struct cvmx_iob_inb_data_match_s cnf71xx; }; union cvmx_iob_inb_data_match_enb { @@ -576,24 +450,6 @@ union cvmx_iob_inb_data_match_enb { uint64_t data:64; #endif } s; - struct cvmx_iob_inb_data_match_enb_s cn30xx; - struct cvmx_iob_inb_data_match_enb_s cn31xx; - struct cvmx_iob_inb_data_match_enb_s cn38xx; - struct cvmx_iob_inb_data_match_enb_s cn38xxp2; - struct cvmx_iob_inb_data_match_enb_s cn50xx; - struct cvmx_iob_inb_data_match_enb_s cn52xx; - struct cvmx_iob_inb_data_match_enb_s cn52xxp1; - struct cvmx_iob_inb_data_match_enb_s cn56xx; - struct cvmx_iob_inb_data_match_enb_s cn56xxp1; - struct cvmx_iob_inb_data_match_enb_s cn58xx; - struct cvmx_iob_inb_data_match_enb_s cn58xxp1; - struct cvmx_iob_inb_data_match_enb_s cn61xx; - struct cvmx_iob_inb_data_match_enb_s cn63xx; - struct cvmx_iob_inb_data_match_enb_s cn63xxp1; - struct cvmx_iob_inb_data_match_enb_s cn66xx; - struct cvmx_iob_inb_data_match_enb_s cn68xx; - struct cvmx_iob_inb_data_match_enb_s cn68xxp1; - struct cvmx_iob_inb_data_match_enb_s cnf71xx; }; union cvmx_iob_int_enb { @@ -632,20 +488,6 @@ union cvmx_iob_int_enb { uint64_t reserved_4_63:60; #endif } cn30xx; - struct cvmx_iob_int_enb_cn30xx cn31xx; - struct cvmx_iob_int_enb_cn30xx cn38xx; - struct cvmx_iob_int_enb_cn30xx cn38xxp2; - struct cvmx_iob_int_enb_s cn50xx; - struct cvmx_iob_int_enb_s cn52xx; - struct cvmx_iob_int_enb_s cn52xxp1; - struct cvmx_iob_int_enb_s cn56xx; - struct cvmx_iob_int_enb_s cn56xxp1; - struct cvmx_iob_int_enb_s cn58xx; - struct cvmx_iob_int_enb_s cn58xxp1; - struct cvmx_iob_int_enb_s cn61xx; - struct cvmx_iob_int_enb_s cn63xx; - struct cvmx_iob_int_enb_s cn63xxp1; - struct cvmx_iob_int_enb_s cn66xx; struct cvmx_iob_int_enb_cn68xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_0_63:64; @@ -653,8 +495,6 @@ union cvmx_iob_int_enb { uint64_t reserved_0_63:64; #endif } cn68xx; - struct cvmx_iob_int_enb_cn68xx cn68xxp1; - struct cvmx_iob_int_enb_s cnf71xx; }; union cvmx_iob_int_sum { @@ -693,20 +533,6 @@ union cvmx_iob_int_sum { uint64_t reserved_4_63:60; #endif } cn30xx; - struct cvmx_iob_int_sum_cn30xx cn31xx; - struct cvmx_iob_int_sum_cn30xx cn38xx; - struct cvmx_iob_int_sum_cn30xx cn38xxp2; - struct cvmx_iob_int_sum_s cn50xx; - struct cvmx_iob_int_sum_s cn52xx; - struct cvmx_iob_int_sum_s cn52xxp1; - struct cvmx_iob_int_sum_s cn56xx; - struct cvmx_iob_int_sum_s cn56xxp1; - struct cvmx_iob_int_sum_s cn58xx; - struct cvmx_iob_int_sum_s cn58xxp1; - struct cvmx_iob_int_sum_s cn61xx; - struct cvmx_iob_int_sum_s cn63xx; - struct cvmx_iob_int_sum_s cn63xxp1; - struct cvmx_iob_int_sum_s cn66xx; struct cvmx_iob_int_sum_cn68xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_0_63:64; @@ -714,8 +540,6 @@ union cvmx_iob_int_sum { uint64_t reserved_0_63:64; #endif } cn68xx; - struct cvmx_iob_int_sum_cn68xx cn68xxp1; - struct cvmx_iob_int_sum_s cnf71xx; }; union cvmx_iob_n2c_l2c_pri_cnt { @@ -731,19 +555,6 @@ union cvmx_iob_n2c_l2c_pri_cnt { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_iob_n2c_l2c_pri_cnt_s cn38xx; - struct cvmx_iob_n2c_l2c_pri_cnt_s cn38xxp2; - struct cvmx_iob_n2c_l2c_pri_cnt_s cn52xx; - struct cvmx_iob_n2c_l2c_pri_cnt_s cn52xxp1; - struct cvmx_iob_n2c_l2c_pri_cnt_s cn56xx; - struct cvmx_iob_n2c_l2c_pri_cnt_s cn56xxp1; - struct cvmx_iob_n2c_l2c_pri_cnt_s cn58xx; - struct cvmx_iob_n2c_l2c_pri_cnt_s cn58xxp1; - struct cvmx_iob_n2c_l2c_pri_cnt_s cn61xx; - struct cvmx_iob_n2c_l2c_pri_cnt_s cn63xx; - struct cvmx_iob_n2c_l2c_pri_cnt_s cn63xxp1; - struct cvmx_iob_n2c_l2c_pri_cnt_s cn66xx; - struct cvmx_iob_n2c_l2c_pri_cnt_s cnf71xx; }; union cvmx_iob_n2c_rsp_pri_cnt { @@ -759,19 +570,6 @@ union cvmx_iob_n2c_rsp_pri_cnt { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_iob_n2c_rsp_pri_cnt_s cn38xx; - struct cvmx_iob_n2c_rsp_pri_cnt_s cn38xxp2; - struct cvmx_iob_n2c_rsp_pri_cnt_s cn52xx; - struct cvmx_iob_n2c_rsp_pri_cnt_s cn52xxp1; - struct cvmx_iob_n2c_rsp_pri_cnt_s cn56xx; - struct cvmx_iob_n2c_rsp_pri_cnt_s cn56xxp1; - struct cvmx_iob_n2c_rsp_pri_cnt_s cn58xx; - struct cvmx_iob_n2c_rsp_pri_cnt_s cn58xxp1; - struct cvmx_iob_n2c_rsp_pri_cnt_s cn61xx; - struct cvmx_iob_n2c_rsp_pri_cnt_s cn63xx; - struct cvmx_iob_n2c_rsp_pri_cnt_s cn63xxp1; - struct cvmx_iob_n2c_rsp_pri_cnt_s cn66xx; - struct cvmx_iob_n2c_rsp_pri_cnt_s cnf71xx; }; union cvmx_iob_outb_com_pri_cnt { @@ -787,21 +585,6 @@ union cvmx_iob_outb_com_pri_cnt { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_iob_outb_com_pri_cnt_s cn38xx; - struct cvmx_iob_outb_com_pri_cnt_s cn38xxp2; - struct cvmx_iob_outb_com_pri_cnt_s cn52xx; - struct cvmx_iob_outb_com_pri_cnt_s cn52xxp1; - struct cvmx_iob_outb_com_pri_cnt_s cn56xx; - struct cvmx_iob_outb_com_pri_cnt_s cn56xxp1; - struct cvmx_iob_outb_com_pri_cnt_s cn58xx; - struct cvmx_iob_outb_com_pri_cnt_s cn58xxp1; - struct cvmx_iob_outb_com_pri_cnt_s cn61xx; - struct cvmx_iob_outb_com_pri_cnt_s cn63xx; - struct cvmx_iob_outb_com_pri_cnt_s cn63xxp1; - struct cvmx_iob_outb_com_pri_cnt_s cn66xx; - struct cvmx_iob_outb_com_pri_cnt_s cn68xx; - struct cvmx_iob_outb_com_pri_cnt_s cn68xxp1; - struct cvmx_iob_outb_com_pri_cnt_s cnf71xx; }; union cvmx_iob_outb_control_match { @@ -821,24 +604,6 @@ union cvmx_iob_outb_control_match { uint64_t reserved_26_63:38; #endif } s; - struct cvmx_iob_outb_control_match_s cn30xx; - struct cvmx_iob_outb_control_match_s cn31xx; - struct cvmx_iob_outb_control_match_s cn38xx; - struct cvmx_iob_outb_control_match_s cn38xxp2; - struct cvmx_iob_outb_control_match_s cn50xx; - struct cvmx_iob_outb_control_match_s cn52xx; - struct cvmx_iob_outb_control_match_s cn52xxp1; - struct cvmx_iob_outb_control_match_s cn56xx; - struct cvmx_iob_outb_control_match_s cn56xxp1; - struct cvmx_iob_outb_control_match_s cn58xx; - struct cvmx_iob_outb_control_match_s cn58xxp1; - struct cvmx_iob_outb_control_match_s cn61xx; - struct cvmx_iob_outb_control_match_s cn63xx; - struct cvmx_iob_outb_control_match_s cn63xxp1; - struct cvmx_iob_outb_control_match_s cn66xx; - struct cvmx_iob_outb_control_match_s cn68xx; - struct cvmx_iob_outb_control_match_s cn68xxp1; - struct cvmx_iob_outb_control_match_s cnf71xx; }; union cvmx_iob_outb_control_match_enb { @@ -858,24 +623,6 @@ union cvmx_iob_outb_control_match_enb { uint64_t reserved_26_63:38; #endif } s; - struct cvmx_iob_outb_control_match_enb_s cn30xx; - struct cvmx_iob_outb_control_match_enb_s cn31xx; - struct cvmx_iob_outb_control_match_enb_s cn38xx; - struct cvmx_iob_outb_control_match_enb_s cn38xxp2; - struct cvmx_iob_outb_control_match_enb_s cn50xx; - struct cvmx_iob_outb_control_match_enb_s cn52xx; - struct cvmx_iob_outb_control_match_enb_s cn52xxp1; - struct cvmx_iob_outb_control_match_enb_s cn56xx; - struct cvmx_iob_outb_control_match_enb_s cn56xxp1; - struct cvmx_iob_outb_control_match_enb_s cn58xx; - struct cvmx_iob_outb_control_match_enb_s cn58xxp1; - struct cvmx_iob_outb_control_match_enb_s cn61xx; - struct cvmx_iob_outb_control_match_enb_s cn63xx; - struct cvmx_iob_outb_control_match_enb_s cn63xxp1; - struct cvmx_iob_outb_control_match_enb_s cn66xx; - struct cvmx_iob_outb_control_match_enb_s cn68xx; - struct cvmx_iob_outb_control_match_enb_s cn68xxp1; - struct cvmx_iob_outb_control_match_enb_s cnf71xx; }; union cvmx_iob_outb_data_match { @@ -887,24 +634,6 @@ union cvmx_iob_outb_data_match { uint64_t data:64; #endif } s; - struct cvmx_iob_outb_data_match_s cn30xx; - struct cvmx_iob_outb_data_match_s cn31xx; - struct cvmx_iob_outb_data_match_s cn38xx; - struct cvmx_iob_outb_data_match_s cn38xxp2; - struct cvmx_iob_outb_data_match_s cn50xx; - struct cvmx_iob_outb_data_match_s cn52xx; - struct cvmx_iob_outb_data_match_s cn52xxp1; - struct cvmx_iob_outb_data_match_s cn56xx; - struct cvmx_iob_outb_data_match_s cn56xxp1; - struct cvmx_iob_outb_data_match_s cn58xx; - struct cvmx_iob_outb_data_match_s cn58xxp1; - struct cvmx_iob_outb_data_match_s cn61xx; - struct cvmx_iob_outb_data_match_s cn63xx; - struct cvmx_iob_outb_data_match_s cn63xxp1; - struct cvmx_iob_outb_data_match_s cn66xx; - struct cvmx_iob_outb_data_match_s cn68xx; - struct cvmx_iob_outb_data_match_s cn68xxp1; - struct cvmx_iob_outb_data_match_s cnf71xx; }; union cvmx_iob_outb_data_match_enb { @@ -916,24 +645,6 @@ union cvmx_iob_outb_data_match_enb { uint64_t data:64; #endif } s; - struct cvmx_iob_outb_data_match_enb_s cn30xx; - struct cvmx_iob_outb_data_match_enb_s cn31xx; - struct cvmx_iob_outb_data_match_enb_s cn38xx; - struct cvmx_iob_outb_data_match_enb_s cn38xxp2; - struct cvmx_iob_outb_data_match_enb_s cn50xx; - struct cvmx_iob_outb_data_match_enb_s cn52xx; - struct cvmx_iob_outb_data_match_enb_s cn52xxp1; - struct cvmx_iob_outb_data_match_enb_s cn56xx; - struct cvmx_iob_outb_data_match_enb_s cn56xxp1; - struct cvmx_iob_outb_data_match_enb_s cn58xx; - struct cvmx_iob_outb_data_match_enb_s cn58xxp1; - struct cvmx_iob_outb_data_match_enb_s cn61xx; - struct cvmx_iob_outb_data_match_enb_s cn63xx; - struct cvmx_iob_outb_data_match_enb_s cn63xxp1; - struct cvmx_iob_outb_data_match_enb_s cn66xx; - struct cvmx_iob_outb_data_match_enb_s cn68xx; - struct cvmx_iob_outb_data_match_enb_s cn68xxp1; - struct cvmx_iob_outb_data_match_enb_s cnf71xx; }; union cvmx_iob_outb_fpa_pri_cnt { @@ -949,21 +660,6 @@ union cvmx_iob_outb_fpa_pri_cnt { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_iob_outb_fpa_pri_cnt_s cn38xx; - struct cvmx_iob_outb_fpa_pri_cnt_s cn38xxp2; - struct cvmx_iob_outb_fpa_pri_cnt_s cn52xx; - struct cvmx_iob_outb_fpa_pri_cnt_s cn52xxp1; - struct cvmx_iob_outb_fpa_pri_cnt_s cn56xx; - struct cvmx_iob_outb_fpa_pri_cnt_s cn56xxp1; - struct cvmx_iob_outb_fpa_pri_cnt_s cn58xx; - struct cvmx_iob_outb_fpa_pri_cnt_s cn58xxp1; - struct cvmx_iob_outb_fpa_pri_cnt_s cn61xx; - struct cvmx_iob_outb_fpa_pri_cnt_s cn63xx; - struct cvmx_iob_outb_fpa_pri_cnt_s cn63xxp1; - struct cvmx_iob_outb_fpa_pri_cnt_s cn66xx; - struct cvmx_iob_outb_fpa_pri_cnt_s cn68xx; - struct cvmx_iob_outb_fpa_pri_cnt_s cn68xxp1; - struct cvmx_iob_outb_fpa_pri_cnt_s cnf71xx; }; union cvmx_iob_outb_req_pri_cnt { @@ -979,21 +675,6 @@ union cvmx_iob_outb_req_pri_cnt { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_iob_outb_req_pri_cnt_s cn38xx; - struct cvmx_iob_outb_req_pri_cnt_s cn38xxp2; - struct cvmx_iob_outb_req_pri_cnt_s cn52xx; - struct cvmx_iob_outb_req_pri_cnt_s cn52xxp1; - struct cvmx_iob_outb_req_pri_cnt_s cn56xx; - struct cvmx_iob_outb_req_pri_cnt_s cn56xxp1; - struct cvmx_iob_outb_req_pri_cnt_s cn58xx; - struct cvmx_iob_outb_req_pri_cnt_s cn58xxp1; - struct cvmx_iob_outb_req_pri_cnt_s cn61xx; - struct cvmx_iob_outb_req_pri_cnt_s cn63xx; - struct cvmx_iob_outb_req_pri_cnt_s cn63xxp1; - struct cvmx_iob_outb_req_pri_cnt_s cn66xx; - struct cvmx_iob_outb_req_pri_cnt_s cn68xx; - struct cvmx_iob_outb_req_pri_cnt_s cn68xxp1; - struct cvmx_iob_outb_req_pri_cnt_s cnf71xx; }; union cvmx_iob_p2c_req_pri_cnt { @@ -1009,19 +690,6 @@ union cvmx_iob_p2c_req_pri_cnt { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_iob_p2c_req_pri_cnt_s cn38xx; - struct cvmx_iob_p2c_req_pri_cnt_s cn38xxp2; - struct cvmx_iob_p2c_req_pri_cnt_s cn52xx; - struct cvmx_iob_p2c_req_pri_cnt_s cn52xxp1; - struct cvmx_iob_p2c_req_pri_cnt_s cn56xx; - struct cvmx_iob_p2c_req_pri_cnt_s cn56xxp1; - struct cvmx_iob_p2c_req_pri_cnt_s cn58xx; - struct cvmx_iob_p2c_req_pri_cnt_s cn58xxp1; - struct cvmx_iob_p2c_req_pri_cnt_s cn61xx; - struct cvmx_iob_p2c_req_pri_cnt_s cn63xx; - struct cvmx_iob_p2c_req_pri_cnt_s cn63xxp1; - struct cvmx_iob_p2c_req_pri_cnt_s cn66xx; - struct cvmx_iob_p2c_req_pri_cnt_s cnf71xx; }; union cvmx_iob_pkt_err { @@ -1046,21 +714,6 @@ union cvmx_iob_pkt_err { uint64_t reserved_6_63:58; #endif } cn30xx; - struct cvmx_iob_pkt_err_cn30xx cn31xx; - struct cvmx_iob_pkt_err_cn30xx cn38xx; - struct cvmx_iob_pkt_err_cn30xx cn38xxp2; - struct cvmx_iob_pkt_err_cn30xx cn50xx; - struct cvmx_iob_pkt_err_cn30xx cn52xx; - struct cvmx_iob_pkt_err_cn30xx cn52xxp1; - struct cvmx_iob_pkt_err_cn30xx cn56xx; - struct cvmx_iob_pkt_err_cn30xx cn56xxp1; - struct cvmx_iob_pkt_err_cn30xx cn58xx; - struct cvmx_iob_pkt_err_cn30xx cn58xxp1; - struct cvmx_iob_pkt_err_s cn61xx; - struct cvmx_iob_pkt_err_s cn63xx; - struct cvmx_iob_pkt_err_s cn63xxp1; - struct cvmx_iob_pkt_err_s cn66xx; - struct cvmx_iob_pkt_err_s cnf71xx; }; union cvmx_iob_to_cmb_credits { @@ -1089,10 +742,6 @@ union cvmx_iob_to_cmb_credits { uint64_t reserved_9_63:55; #endif } cn52xx; - struct cvmx_iob_to_cmb_credits_cn52xx cn61xx; - struct cvmx_iob_to_cmb_credits_cn52xx cn63xx; - struct cvmx_iob_to_cmb_credits_cn52xx cn63xxp1; - struct cvmx_iob_to_cmb_credits_cn52xx cn66xx; struct cvmx_iob_to_cmb_credits_cn68xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_9_63:55; @@ -1106,8 +755,6 @@ union cvmx_iob_to_cmb_credits { uint64_t reserved_9_63:55; #endif } cn68xx; - struct cvmx_iob_to_cmb_credits_cn68xx cn68xxp1; - struct cvmx_iob_to_cmb_credits_cn52xx cnf71xx; }; union cvmx_iob_to_ncb_did_00_credits { @@ -1121,8 +768,6 @@ union cvmx_iob_to_ncb_did_00_credits { uint64_t reserved_7_63:57; #endif } s; - struct cvmx_iob_to_ncb_did_00_credits_s cn68xx; - struct cvmx_iob_to_ncb_did_00_credits_s cn68xxp1; }; union cvmx_iob_to_ncb_did_111_credits { @@ -1136,8 +781,6 @@ union cvmx_iob_to_ncb_did_111_credits { uint64_t reserved_7_63:57; #endif } s; - struct cvmx_iob_to_ncb_did_111_credits_s cn68xx; - struct cvmx_iob_to_ncb_did_111_credits_s cn68xxp1; }; union cvmx_iob_to_ncb_did_223_credits { @@ -1151,8 +794,6 @@ union cvmx_iob_to_ncb_did_223_credits { uint64_t reserved_7_63:57; #endif } s; - struct cvmx_iob_to_ncb_did_223_credits_s cn68xx; - struct cvmx_iob_to_ncb_did_223_credits_s cn68xxp1; }; union cvmx_iob_to_ncb_did_24_credits { @@ -1166,8 +807,6 @@ union cvmx_iob_to_ncb_did_24_credits { uint64_t reserved_7_63:57; #endif } s; - struct cvmx_iob_to_ncb_did_24_credits_s cn68xx; - struct cvmx_iob_to_ncb_did_24_credits_s cn68xxp1; }; union cvmx_iob_to_ncb_did_32_credits { @@ -1181,8 +820,6 @@ union cvmx_iob_to_ncb_did_32_credits { uint64_t reserved_7_63:57; #endif } s; - struct cvmx_iob_to_ncb_did_32_credits_s cn68xx; - struct cvmx_iob_to_ncb_did_32_credits_s cn68xxp1; }; union cvmx_iob_to_ncb_did_40_credits { @@ -1196,8 +833,6 @@ union cvmx_iob_to_ncb_did_40_credits { uint64_t reserved_7_63:57; #endif } s; - struct cvmx_iob_to_ncb_did_40_credits_s cn68xx; - struct cvmx_iob_to_ncb_did_40_credits_s cn68xxp1; }; union cvmx_iob_to_ncb_did_55_credits { @@ -1211,8 +846,6 @@ union cvmx_iob_to_ncb_did_55_credits { uint64_t reserved_7_63:57; #endif } s; - struct cvmx_iob_to_ncb_did_55_credits_s cn68xx; - struct cvmx_iob_to_ncb_did_55_credits_s cn68xxp1; }; union cvmx_iob_to_ncb_did_64_credits { @@ -1226,8 +859,6 @@ union cvmx_iob_to_ncb_did_64_credits { uint64_t reserved_7_63:57; #endif } s; - struct cvmx_iob_to_ncb_did_64_credits_s cn68xx; - struct cvmx_iob_to_ncb_did_64_credits_s cn68xxp1; }; union cvmx_iob_to_ncb_did_79_credits { @@ -1241,8 +872,6 @@ union cvmx_iob_to_ncb_did_79_credits { uint64_t reserved_7_63:57; #endif } s; - struct cvmx_iob_to_ncb_did_79_credits_s cn68xx; - struct cvmx_iob_to_ncb_did_79_credits_s cn68xxp1; }; union cvmx_iob_to_ncb_did_96_credits { @@ -1256,8 +885,6 @@ union cvmx_iob_to_ncb_did_96_credits { uint64_t reserved_7_63:57; #endif } s; - struct cvmx_iob_to_ncb_did_96_credits_s cn68xx; - struct cvmx_iob_to_ncb_did_96_credits_s cn68xxp1; }; union cvmx_iob_to_ncb_did_98_credits { @@ -1271,8 +898,6 @@ union cvmx_iob_to_ncb_did_98_credits { uint64_t reserved_7_63:57; #endif } s; - struct cvmx_iob_to_ncb_did_98_credits_s cn68xx; - struct cvmx_iob_to_ncb_did_98_credits_s cn68xxp1; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-ipd-defs.h b/arch/mips/include/asm/octeon/cvmx-ipd-defs.h index 1193f73bb74a..c0a4ac7b41fb 100644 --- a/arch/mips/include/asm/octeon/cvmx-ipd-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-ipd-defs.h @@ -108,24 +108,6 @@ union cvmx_ipd_1st_mbuff_skip { uint64_t reserved_6_63:58; #endif } s; - struct cvmx_ipd_1st_mbuff_skip_s cn30xx; - struct cvmx_ipd_1st_mbuff_skip_s cn31xx; - struct cvmx_ipd_1st_mbuff_skip_s cn38xx; - struct cvmx_ipd_1st_mbuff_skip_s cn38xxp2; - struct cvmx_ipd_1st_mbuff_skip_s cn50xx; - struct cvmx_ipd_1st_mbuff_skip_s cn52xx; - struct cvmx_ipd_1st_mbuff_skip_s cn52xxp1; - struct cvmx_ipd_1st_mbuff_skip_s cn56xx; - struct cvmx_ipd_1st_mbuff_skip_s cn56xxp1; - struct cvmx_ipd_1st_mbuff_skip_s cn58xx; - struct cvmx_ipd_1st_mbuff_skip_s cn58xxp1; - struct cvmx_ipd_1st_mbuff_skip_s cn61xx; - struct cvmx_ipd_1st_mbuff_skip_s cn63xx; - struct cvmx_ipd_1st_mbuff_skip_s cn63xxp1; - struct cvmx_ipd_1st_mbuff_skip_s cn66xx; - struct cvmx_ipd_1st_mbuff_skip_s cn68xx; - struct cvmx_ipd_1st_mbuff_skip_s cn68xxp1; - struct cvmx_ipd_1st_mbuff_skip_s cnf71xx; }; union cvmx_ipd_1st_next_ptr_back { @@ -139,24 +121,6 @@ union cvmx_ipd_1st_next_ptr_back { uint64_t reserved_4_63:60; #endif } s; - struct cvmx_ipd_1st_next_ptr_back_s cn30xx; - struct cvmx_ipd_1st_next_ptr_back_s cn31xx; - struct cvmx_ipd_1st_next_ptr_back_s cn38xx; - struct cvmx_ipd_1st_next_ptr_back_s cn38xxp2; - struct cvmx_ipd_1st_next_ptr_back_s cn50xx; - struct cvmx_ipd_1st_next_ptr_back_s cn52xx; - struct cvmx_ipd_1st_next_ptr_back_s cn52xxp1; - struct cvmx_ipd_1st_next_ptr_back_s cn56xx; - struct cvmx_ipd_1st_next_ptr_back_s cn56xxp1; - struct cvmx_ipd_1st_next_ptr_back_s cn58xx; - struct cvmx_ipd_1st_next_ptr_back_s cn58xxp1; - struct cvmx_ipd_1st_next_ptr_back_s cn61xx; - struct cvmx_ipd_1st_next_ptr_back_s cn63xx; - struct cvmx_ipd_1st_next_ptr_back_s cn63xxp1; - struct cvmx_ipd_1st_next_ptr_back_s cn66xx; - struct cvmx_ipd_1st_next_ptr_back_s cn68xx; - struct cvmx_ipd_1st_next_ptr_back_s cn68xxp1; - struct cvmx_ipd_1st_next_ptr_back_s cnf71xx; }; union cvmx_ipd_2nd_next_ptr_back { @@ -170,24 +134,6 @@ union cvmx_ipd_2nd_next_ptr_back { uint64_t reserved_4_63:60; #endif } s; - struct cvmx_ipd_2nd_next_ptr_back_s cn30xx; - struct cvmx_ipd_2nd_next_ptr_back_s cn31xx; - struct cvmx_ipd_2nd_next_ptr_back_s cn38xx; - struct cvmx_ipd_2nd_next_ptr_back_s cn38xxp2; - struct cvmx_ipd_2nd_next_ptr_back_s cn50xx; - struct cvmx_ipd_2nd_next_ptr_back_s cn52xx; - struct cvmx_ipd_2nd_next_ptr_back_s cn52xxp1; - struct cvmx_ipd_2nd_next_ptr_back_s cn56xx; - struct cvmx_ipd_2nd_next_ptr_back_s cn56xxp1; - struct cvmx_ipd_2nd_next_ptr_back_s cn58xx; - struct cvmx_ipd_2nd_next_ptr_back_s cn58xxp1; - struct cvmx_ipd_2nd_next_ptr_back_s cn61xx; - struct cvmx_ipd_2nd_next_ptr_back_s cn63xx; - struct cvmx_ipd_2nd_next_ptr_back_s cn63xxp1; - struct cvmx_ipd_2nd_next_ptr_back_s cn66xx; - struct cvmx_ipd_2nd_next_ptr_back_s cn68xx; - struct cvmx_ipd_2nd_next_ptr_back_s cn68xxp1; - struct cvmx_ipd_2nd_next_ptr_back_s cnf71xx; }; union cvmx_ipd_bist_status { @@ -284,10 +230,6 @@ union cvmx_ipd_bist_status { uint64_t reserved_16_63:48; #endif } cn30xx; - struct cvmx_ipd_bist_status_cn30xx cn31xx; - struct cvmx_ipd_bist_status_cn30xx cn38xx; - struct cvmx_ipd_bist_status_cn30xx cn38xxp2; - struct cvmx_ipd_bist_status_cn30xx cn50xx; struct cvmx_ipd_bist_status_cn52xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_18_63:46; @@ -331,18 +273,6 @@ union cvmx_ipd_bist_status { uint64_t reserved_18_63:46; #endif } cn52xx; - struct cvmx_ipd_bist_status_cn52xx cn52xxp1; - struct cvmx_ipd_bist_status_cn52xx cn56xx; - struct cvmx_ipd_bist_status_cn52xx cn56xxp1; - struct cvmx_ipd_bist_status_cn30xx cn58xx; - struct cvmx_ipd_bist_status_cn30xx cn58xxp1; - struct cvmx_ipd_bist_status_cn52xx cn61xx; - struct cvmx_ipd_bist_status_cn52xx cn63xx; - struct cvmx_ipd_bist_status_cn52xx cn63xxp1; - struct cvmx_ipd_bist_status_cn52xx cn66xx; - struct cvmx_ipd_bist_status_s cn68xx; - struct cvmx_ipd_bist_status_s cn68xxp1; - struct cvmx_ipd_bist_status_cn52xx cnf71xx; }; union cvmx_ipd_bp_prt_red_end { @@ -365,10 +295,6 @@ union cvmx_ipd_bp_prt_red_end { uint64_t reserved_36_63:28; #endif } cn30xx; - struct cvmx_ipd_bp_prt_red_end_cn30xx cn31xx; - struct cvmx_ipd_bp_prt_red_end_cn30xx cn38xx; - struct cvmx_ipd_bp_prt_red_end_cn30xx cn38xxp2; - struct cvmx_ipd_bp_prt_red_end_cn30xx cn50xx; struct cvmx_ipd_bp_prt_red_end_cn52xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_40_63:24; @@ -378,12 +304,6 @@ union cvmx_ipd_bp_prt_red_end { uint64_t reserved_40_63:24; #endif } cn52xx; - struct cvmx_ipd_bp_prt_red_end_cn52xx cn52xxp1; - struct cvmx_ipd_bp_prt_red_end_cn52xx cn56xx; - struct cvmx_ipd_bp_prt_red_end_cn52xx cn56xxp1; - struct cvmx_ipd_bp_prt_red_end_cn30xx cn58xx; - struct cvmx_ipd_bp_prt_red_end_cn30xx cn58xxp1; - struct cvmx_ipd_bp_prt_red_end_s cn61xx; struct cvmx_ipd_bp_prt_red_end_cn63xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_44_63:20; @@ -393,9 +313,6 @@ union cvmx_ipd_bp_prt_red_end { uint64_t reserved_44_63:20; #endif } cn63xx; - struct cvmx_ipd_bp_prt_red_end_cn63xx cn63xxp1; - struct cvmx_ipd_bp_prt_red_end_s cn66xx; - struct cvmx_ipd_bp_prt_red_end_s cnf71xx; }; union cvmx_ipd_bpidx_mbuf_th { @@ -411,8 +328,6 @@ union cvmx_ipd_bpidx_mbuf_th { uint64_t reserved_18_63:46; #endif } s; - struct cvmx_ipd_bpidx_mbuf_th_s cn68xx; - struct cvmx_ipd_bpidx_mbuf_th_s cn68xxp1; }; union cvmx_ipd_bpid_bp_counterx { @@ -426,8 +341,6 @@ union cvmx_ipd_bpid_bp_counterx { uint64_t reserved_25_63:39; #endif } s; - struct cvmx_ipd_bpid_bp_counterx_s cn68xx; - struct cvmx_ipd_bpid_bp_counterx_s cn68xxp1; }; union cvmx_ipd_clk_count { @@ -439,24 +352,6 @@ union cvmx_ipd_clk_count { uint64_t clk_cnt:64; #endif } s; - struct cvmx_ipd_clk_count_s cn30xx; - struct cvmx_ipd_clk_count_s cn31xx; - struct cvmx_ipd_clk_count_s cn38xx; - struct cvmx_ipd_clk_count_s cn38xxp2; - struct cvmx_ipd_clk_count_s cn50xx; - struct cvmx_ipd_clk_count_s cn52xx; - struct cvmx_ipd_clk_count_s cn52xxp1; - struct cvmx_ipd_clk_count_s cn56xx; - struct cvmx_ipd_clk_count_s cn56xxp1; - struct cvmx_ipd_clk_count_s cn58xx; - struct cvmx_ipd_clk_count_s cn58xxp1; - struct cvmx_ipd_clk_count_s cn61xx; - struct cvmx_ipd_clk_count_s cn63xx; - struct cvmx_ipd_clk_count_s cn63xxp1; - struct cvmx_ipd_clk_count_s cn66xx; - struct cvmx_ipd_clk_count_s cn68xx; - struct cvmx_ipd_clk_count_s cn68xxp1; - struct cvmx_ipd_clk_count_s cnf71xx; }; union cvmx_ipd_credits { @@ -472,8 +367,6 @@ union cvmx_ipd_credits { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_ipd_credits_s cn68xx; - struct cvmx_ipd_credits_s cn68xxp1; }; union cvmx_ipd_ctl_status { @@ -544,8 +437,6 @@ union cvmx_ipd_ctl_status { uint64_t reserved_10_63:54; #endif } cn30xx; - struct cvmx_ipd_ctl_status_cn30xx cn31xx; - struct cvmx_ipd_ctl_status_cn30xx cn38xx; struct cvmx_ipd_ctl_status_cn38xxp2 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_9_63:55; @@ -604,10 +495,6 @@ union cvmx_ipd_ctl_status { uint64_t reserved_15_63:49; #endif } cn50xx; - struct cvmx_ipd_ctl_status_cn50xx cn52xx; - struct cvmx_ipd_ctl_status_cn50xx cn52xxp1; - struct cvmx_ipd_ctl_status_cn50xx cn56xx; - struct cvmx_ipd_ctl_status_cn50xx cn56xxp1; struct cvmx_ipd_ctl_status_cn58xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_12_63:52; @@ -637,9 +524,6 @@ union cvmx_ipd_ctl_status { uint64_t reserved_12_63:52; #endif } cn58xx; - struct cvmx_ipd_ctl_status_cn58xx cn58xxp1; - struct cvmx_ipd_ctl_status_s cn61xx; - struct cvmx_ipd_ctl_status_s cn63xx; struct cvmx_ipd_ctl_status_cn63xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_16_63:48; @@ -677,10 +561,6 @@ union cvmx_ipd_ctl_status { uint64_t reserved_16_63:48; #endif } cn63xxp1; - struct cvmx_ipd_ctl_status_s cn66xx; - struct cvmx_ipd_ctl_status_s cn68xx; - struct cvmx_ipd_ctl_status_s cn68xxp1; - struct cvmx_ipd_ctl_status_s cnf71xx; }; union cvmx_ipd_ecc_ctl { @@ -700,8 +580,6 @@ union cvmx_ipd_ecc_ctl { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_ipd_ecc_ctl_s cn68xx; - struct cvmx_ipd_ecc_ctl_s cn68xxp1; }; union cvmx_ipd_free_ptr_fifo_ctl { @@ -723,8 +601,6 @@ union cvmx_ipd_free_ptr_fifo_ctl { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_ipd_free_ptr_fifo_ctl_s cn68xx; - struct cvmx_ipd_free_ptr_fifo_ctl_s cn68xxp1; }; union cvmx_ipd_free_ptr_value { @@ -738,8 +614,6 @@ union cvmx_ipd_free_ptr_value { uint64_t reserved_33_63:31; #endif } s; - struct cvmx_ipd_free_ptr_value_s cn68xx; - struct cvmx_ipd_free_ptr_value_s cn68xxp1; }; union cvmx_ipd_hold_ptr_fifo_ctl { @@ -761,8 +635,6 @@ union cvmx_ipd_hold_ptr_fifo_ctl { uint64_t reserved_43_63:21; #endif } s; - struct cvmx_ipd_hold_ptr_fifo_ctl_s cn68xx; - struct cvmx_ipd_hold_ptr_fifo_ctl_s cn68xxp1; }; union cvmx_ipd_int_enb { @@ -837,7 +709,6 @@ union cvmx_ipd_int_enb { uint64_t reserved_5_63:59; #endif } cn30xx; - struct cvmx_ipd_int_enb_cn30xx cn31xx; struct cvmx_ipd_int_enb_cn38xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_10_63:54; @@ -865,8 +736,6 @@ union cvmx_ipd_int_enb { uint64_t reserved_10_63:54; #endif } cn38xx; - struct cvmx_ipd_int_enb_cn30xx cn38xxp2; - struct cvmx_ipd_int_enb_cn38xx cn50xx; struct cvmx_ipd_int_enb_cn52xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_12_63:52; @@ -898,18 +767,6 @@ union cvmx_ipd_int_enb { uint64_t reserved_12_63:52; #endif } cn52xx; - struct cvmx_ipd_int_enb_cn52xx cn52xxp1; - struct cvmx_ipd_int_enb_cn52xx cn56xx; - struct cvmx_ipd_int_enb_cn52xx cn56xxp1; - struct cvmx_ipd_int_enb_cn38xx cn58xx; - struct cvmx_ipd_int_enb_cn38xx cn58xxp1; - struct cvmx_ipd_int_enb_cn52xx cn61xx; - struct cvmx_ipd_int_enb_cn52xx cn63xx; - struct cvmx_ipd_int_enb_cn52xx cn63xxp1; - struct cvmx_ipd_int_enb_cn52xx cn66xx; - struct cvmx_ipd_int_enb_s cn68xx; - struct cvmx_ipd_int_enb_s cn68xxp1; - struct cvmx_ipd_int_enb_cn52xx cnf71xx; }; union cvmx_ipd_int_sum { @@ -984,7 +841,6 @@ union cvmx_ipd_int_sum { uint64_t reserved_5_63:59; #endif } cn30xx; - struct cvmx_ipd_int_sum_cn30xx cn31xx; struct cvmx_ipd_int_sum_cn38xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_10_63:54; @@ -1012,8 +868,6 @@ union cvmx_ipd_int_sum { uint64_t reserved_10_63:54; #endif } cn38xx; - struct cvmx_ipd_int_sum_cn30xx cn38xxp2; - struct cvmx_ipd_int_sum_cn38xx cn50xx; struct cvmx_ipd_int_sum_cn52xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_12_63:52; @@ -1045,18 +899,6 @@ union cvmx_ipd_int_sum { uint64_t reserved_12_63:52; #endif } cn52xx; - struct cvmx_ipd_int_sum_cn52xx cn52xxp1; - struct cvmx_ipd_int_sum_cn52xx cn56xx; - struct cvmx_ipd_int_sum_cn52xx cn56xxp1; - struct cvmx_ipd_int_sum_cn38xx cn58xx; - struct cvmx_ipd_int_sum_cn38xx cn58xxp1; - struct cvmx_ipd_int_sum_cn52xx cn61xx; - struct cvmx_ipd_int_sum_cn52xx cn63xx; - struct cvmx_ipd_int_sum_cn52xx cn63xxp1; - struct cvmx_ipd_int_sum_cn52xx cn66xx; - struct cvmx_ipd_int_sum_s cn68xx; - struct cvmx_ipd_int_sum_s cn68xxp1; - struct cvmx_ipd_int_sum_cn52xx cnf71xx; }; union cvmx_ipd_next_pkt_ptr { @@ -1070,8 +912,6 @@ union cvmx_ipd_next_pkt_ptr { uint64_t reserved_33_63:31; #endif } s; - struct cvmx_ipd_next_pkt_ptr_s cn68xx; - struct cvmx_ipd_next_pkt_ptr_s cn68xxp1; }; union cvmx_ipd_next_wqe_ptr { @@ -1085,8 +925,6 @@ union cvmx_ipd_next_wqe_ptr { uint64_t reserved_33_63:31; #endif } s; - struct cvmx_ipd_next_wqe_ptr_s cn68xx; - struct cvmx_ipd_next_wqe_ptr_s cn68xxp1; }; union cvmx_ipd_not_1st_mbuff_skip { @@ -1100,24 +938,6 @@ union cvmx_ipd_not_1st_mbuff_skip { uint64_t reserved_6_63:58; #endif } s; - struct cvmx_ipd_not_1st_mbuff_skip_s cn30xx; - struct cvmx_ipd_not_1st_mbuff_skip_s cn31xx; - struct cvmx_ipd_not_1st_mbuff_skip_s cn38xx; - struct cvmx_ipd_not_1st_mbuff_skip_s cn38xxp2; - struct cvmx_ipd_not_1st_mbuff_skip_s cn50xx; - struct cvmx_ipd_not_1st_mbuff_skip_s cn52xx; - struct cvmx_ipd_not_1st_mbuff_skip_s cn52xxp1; - struct cvmx_ipd_not_1st_mbuff_skip_s cn56xx; - struct cvmx_ipd_not_1st_mbuff_skip_s cn56xxp1; - struct cvmx_ipd_not_1st_mbuff_skip_s cn58xx; - struct cvmx_ipd_not_1st_mbuff_skip_s cn58xxp1; - struct cvmx_ipd_not_1st_mbuff_skip_s cn61xx; - struct cvmx_ipd_not_1st_mbuff_skip_s cn63xx; - struct cvmx_ipd_not_1st_mbuff_skip_s cn63xxp1; - struct cvmx_ipd_not_1st_mbuff_skip_s cn66xx; - struct cvmx_ipd_not_1st_mbuff_skip_s cn68xx; - struct cvmx_ipd_not_1st_mbuff_skip_s cn68xxp1; - struct cvmx_ipd_not_1st_mbuff_skip_s cnf71xx; }; union cvmx_ipd_on_bp_drop_pktx { @@ -1129,8 +949,6 @@ union cvmx_ipd_on_bp_drop_pktx { uint64_t prt_enb:64; #endif } s; - struct cvmx_ipd_on_bp_drop_pktx_s cn68xx; - struct cvmx_ipd_on_bp_drop_pktx_s cn68xxp1; }; union cvmx_ipd_packet_mbuff_size { @@ -1144,24 +962,6 @@ union cvmx_ipd_packet_mbuff_size { uint64_t reserved_12_63:52; #endif } s; - struct cvmx_ipd_packet_mbuff_size_s cn30xx; - struct cvmx_ipd_packet_mbuff_size_s cn31xx; - struct cvmx_ipd_packet_mbuff_size_s cn38xx; - struct cvmx_ipd_packet_mbuff_size_s cn38xxp2; - struct cvmx_ipd_packet_mbuff_size_s cn50xx; - struct cvmx_ipd_packet_mbuff_size_s cn52xx; - struct cvmx_ipd_packet_mbuff_size_s cn52xxp1; - struct cvmx_ipd_packet_mbuff_size_s cn56xx; - struct cvmx_ipd_packet_mbuff_size_s cn56xxp1; - struct cvmx_ipd_packet_mbuff_size_s cn58xx; - struct cvmx_ipd_packet_mbuff_size_s cn58xxp1; - struct cvmx_ipd_packet_mbuff_size_s cn61xx; - struct cvmx_ipd_packet_mbuff_size_s cn63xx; - struct cvmx_ipd_packet_mbuff_size_s cn63xxp1; - struct cvmx_ipd_packet_mbuff_size_s cn66xx; - struct cvmx_ipd_packet_mbuff_size_s cn68xx; - struct cvmx_ipd_packet_mbuff_size_s cn68xxp1; - struct cvmx_ipd_packet_mbuff_size_s cnf71xx; }; union cvmx_ipd_pkt_err { @@ -1175,8 +975,6 @@ union cvmx_ipd_pkt_err { uint64_t reserved_6_63:58; #endif } s; - struct cvmx_ipd_pkt_err_s cn68xx; - struct cvmx_ipd_pkt_err_s cn68xxp1; }; union cvmx_ipd_pkt_ptr_valid { @@ -1190,21 +988,6 @@ union cvmx_ipd_pkt_ptr_valid { uint64_t reserved_29_63:35; #endif } s; - struct cvmx_ipd_pkt_ptr_valid_s cn30xx; - struct cvmx_ipd_pkt_ptr_valid_s cn31xx; - struct cvmx_ipd_pkt_ptr_valid_s cn38xx; - struct cvmx_ipd_pkt_ptr_valid_s cn50xx; - struct cvmx_ipd_pkt_ptr_valid_s cn52xx; - struct cvmx_ipd_pkt_ptr_valid_s cn52xxp1; - struct cvmx_ipd_pkt_ptr_valid_s cn56xx; - struct cvmx_ipd_pkt_ptr_valid_s cn56xxp1; - struct cvmx_ipd_pkt_ptr_valid_s cn58xx; - struct cvmx_ipd_pkt_ptr_valid_s cn58xxp1; - struct cvmx_ipd_pkt_ptr_valid_s cn61xx; - struct cvmx_ipd_pkt_ptr_valid_s cn63xx; - struct cvmx_ipd_pkt_ptr_valid_s cn63xxp1; - struct cvmx_ipd_pkt_ptr_valid_s cn66xx; - struct cvmx_ipd_pkt_ptr_valid_s cnf71xx; }; union cvmx_ipd_portx_bp_page_cnt { @@ -1220,22 +1003,6 @@ union cvmx_ipd_portx_bp_page_cnt { uint64_t reserved_18_63:46; #endif } s; - struct cvmx_ipd_portx_bp_page_cnt_s cn30xx; - struct cvmx_ipd_portx_bp_page_cnt_s cn31xx; - struct cvmx_ipd_portx_bp_page_cnt_s cn38xx; - struct cvmx_ipd_portx_bp_page_cnt_s cn38xxp2; - struct cvmx_ipd_portx_bp_page_cnt_s cn50xx; - struct cvmx_ipd_portx_bp_page_cnt_s cn52xx; - struct cvmx_ipd_portx_bp_page_cnt_s cn52xxp1; - struct cvmx_ipd_portx_bp_page_cnt_s cn56xx; - struct cvmx_ipd_portx_bp_page_cnt_s cn56xxp1; - struct cvmx_ipd_portx_bp_page_cnt_s cn58xx; - struct cvmx_ipd_portx_bp_page_cnt_s cn58xxp1; - struct cvmx_ipd_portx_bp_page_cnt_s cn61xx; - struct cvmx_ipd_portx_bp_page_cnt_s cn63xx; - struct cvmx_ipd_portx_bp_page_cnt_s cn63xxp1; - struct cvmx_ipd_portx_bp_page_cnt_s cn66xx; - struct cvmx_ipd_portx_bp_page_cnt_s cnf71xx; }; union cvmx_ipd_portx_bp_page_cnt2 { @@ -1251,15 +1018,6 @@ union cvmx_ipd_portx_bp_page_cnt2 { uint64_t reserved_18_63:46; #endif } s; - struct cvmx_ipd_portx_bp_page_cnt2_s cn52xx; - struct cvmx_ipd_portx_bp_page_cnt2_s cn52xxp1; - struct cvmx_ipd_portx_bp_page_cnt2_s cn56xx; - struct cvmx_ipd_portx_bp_page_cnt2_s cn56xxp1; - struct cvmx_ipd_portx_bp_page_cnt2_s cn61xx; - struct cvmx_ipd_portx_bp_page_cnt2_s cn63xx; - struct cvmx_ipd_portx_bp_page_cnt2_s cn63xxp1; - struct cvmx_ipd_portx_bp_page_cnt2_s cn66xx; - struct cvmx_ipd_portx_bp_page_cnt2_s cnf71xx; }; union cvmx_ipd_portx_bp_page_cnt3 { @@ -1275,11 +1033,6 @@ union cvmx_ipd_portx_bp_page_cnt3 { uint64_t reserved_18_63:46; #endif } s; - struct cvmx_ipd_portx_bp_page_cnt3_s cn61xx; - struct cvmx_ipd_portx_bp_page_cnt3_s cn63xx; - struct cvmx_ipd_portx_bp_page_cnt3_s cn63xxp1; - struct cvmx_ipd_portx_bp_page_cnt3_s cn66xx; - struct cvmx_ipd_portx_bp_page_cnt3_s cnf71xx; }; union cvmx_ipd_port_bp_counters2_pairx { @@ -1293,15 +1046,6 @@ union cvmx_ipd_port_bp_counters2_pairx { uint64_t reserved_25_63:39; #endif } s; - struct cvmx_ipd_port_bp_counters2_pairx_s cn52xx; - struct cvmx_ipd_port_bp_counters2_pairx_s cn52xxp1; - struct cvmx_ipd_port_bp_counters2_pairx_s cn56xx; - struct cvmx_ipd_port_bp_counters2_pairx_s cn56xxp1; - struct cvmx_ipd_port_bp_counters2_pairx_s cn61xx; - struct cvmx_ipd_port_bp_counters2_pairx_s cn63xx; - struct cvmx_ipd_port_bp_counters2_pairx_s cn63xxp1; - struct cvmx_ipd_port_bp_counters2_pairx_s cn66xx; - struct cvmx_ipd_port_bp_counters2_pairx_s cnf71xx; }; union cvmx_ipd_port_bp_counters3_pairx { @@ -1315,11 +1059,6 @@ union cvmx_ipd_port_bp_counters3_pairx { uint64_t reserved_25_63:39; #endif } s; - struct cvmx_ipd_port_bp_counters3_pairx_s cn61xx; - struct cvmx_ipd_port_bp_counters3_pairx_s cn63xx; - struct cvmx_ipd_port_bp_counters3_pairx_s cn63xxp1; - struct cvmx_ipd_port_bp_counters3_pairx_s cn66xx; - struct cvmx_ipd_port_bp_counters3_pairx_s cnf71xx; }; union cvmx_ipd_port_bp_counters4_pairx { @@ -1333,9 +1072,6 @@ union cvmx_ipd_port_bp_counters4_pairx { uint64_t reserved_25_63:39; #endif } s; - struct cvmx_ipd_port_bp_counters4_pairx_s cn61xx; - struct cvmx_ipd_port_bp_counters4_pairx_s cn66xx; - struct cvmx_ipd_port_bp_counters4_pairx_s cnf71xx; }; union cvmx_ipd_port_bp_counters_pairx { @@ -1349,22 +1085,6 @@ union cvmx_ipd_port_bp_counters_pairx { uint64_t reserved_25_63:39; #endif } s; - struct cvmx_ipd_port_bp_counters_pairx_s cn30xx; - struct cvmx_ipd_port_bp_counters_pairx_s cn31xx; - struct cvmx_ipd_port_bp_counters_pairx_s cn38xx; - struct cvmx_ipd_port_bp_counters_pairx_s cn38xxp2; - struct cvmx_ipd_port_bp_counters_pairx_s cn50xx; - struct cvmx_ipd_port_bp_counters_pairx_s cn52xx; - struct cvmx_ipd_port_bp_counters_pairx_s cn52xxp1; - struct cvmx_ipd_port_bp_counters_pairx_s cn56xx; - struct cvmx_ipd_port_bp_counters_pairx_s cn56xxp1; - struct cvmx_ipd_port_bp_counters_pairx_s cn58xx; - struct cvmx_ipd_port_bp_counters_pairx_s cn58xxp1; - struct cvmx_ipd_port_bp_counters_pairx_s cn61xx; - struct cvmx_ipd_port_bp_counters_pairx_s cn63xx; - struct cvmx_ipd_port_bp_counters_pairx_s cn63xxp1; - struct cvmx_ipd_port_bp_counters_pairx_s cn66xx; - struct cvmx_ipd_port_bp_counters_pairx_s cnf71xx; }; union cvmx_ipd_port_ptr_fifo_ctl { @@ -1384,8 +1104,6 @@ union cvmx_ipd_port_ptr_fifo_ctl { uint64_t reserved_48_63:16; #endif } s; - struct cvmx_ipd_port_ptr_fifo_ctl_s cn68xx; - struct cvmx_ipd_port_ptr_fifo_ctl_s cn68xxp1; }; union cvmx_ipd_port_qos_x_cnt { @@ -1399,17 +1117,6 @@ union cvmx_ipd_port_qos_x_cnt { uint64_t wmark:32; #endif } s; - struct cvmx_ipd_port_qos_x_cnt_s cn52xx; - struct cvmx_ipd_port_qos_x_cnt_s cn52xxp1; - struct cvmx_ipd_port_qos_x_cnt_s cn56xx; - struct cvmx_ipd_port_qos_x_cnt_s cn56xxp1; - struct cvmx_ipd_port_qos_x_cnt_s cn61xx; - struct cvmx_ipd_port_qos_x_cnt_s cn63xx; - struct cvmx_ipd_port_qos_x_cnt_s cn63xxp1; - struct cvmx_ipd_port_qos_x_cnt_s cn66xx; - struct cvmx_ipd_port_qos_x_cnt_s cn68xx; - struct cvmx_ipd_port_qos_x_cnt_s cn68xxp1; - struct cvmx_ipd_port_qos_x_cnt_s cnf71xx; }; union cvmx_ipd_port_qos_intx { @@ -1421,17 +1128,6 @@ union cvmx_ipd_port_qos_intx { uint64_t intr:64; #endif } s; - struct cvmx_ipd_port_qos_intx_s cn52xx; - struct cvmx_ipd_port_qos_intx_s cn52xxp1; - struct cvmx_ipd_port_qos_intx_s cn56xx; - struct cvmx_ipd_port_qos_intx_s cn56xxp1; - struct cvmx_ipd_port_qos_intx_s cn61xx; - struct cvmx_ipd_port_qos_intx_s cn63xx; - struct cvmx_ipd_port_qos_intx_s cn63xxp1; - struct cvmx_ipd_port_qos_intx_s cn66xx; - struct cvmx_ipd_port_qos_intx_s cn68xx; - struct cvmx_ipd_port_qos_intx_s cn68xxp1; - struct cvmx_ipd_port_qos_intx_s cnf71xx; }; union cvmx_ipd_port_qos_int_enbx { @@ -1443,17 +1139,6 @@ union cvmx_ipd_port_qos_int_enbx { uint64_t enb:64; #endif } s; - struct cvmx_ipd_port_qos_int_enbx_s cn52xx; - struct cvmx_ipd_port_qos_int_enbx_s cn52xxp1; - struct cvmx_ipd_port_qos_int_enbx_s cn56xx; - struct cvmx_ipd_port_qos_int_enbx_s cn56xxp1; - struct cvmx_ipd_port_qos_int_enbx_s cn61xx; - struct cvmx_ipd_port_qos_int_enbx_s cn63xx; - struct cvmx_ipd_port_qos_int_enbx_s cn63xxp1; - struct cvmx_ipd_port_qos_int_enbx_s cn66xx; - struct cvmx_ipd_port_qos_int_enbx_s cn68xx; - struct cvmx_ipd_port_qos_int_enbx_s cn68xxp1; - struct cvmx_ipd_port_qos_int_enbx_s cnf71xx; }; union cvmx_ipd_port_sopx { @@ -1465,8 +1150,6 @@ union cvmx_ipd_port_sopx { uint64_t sop:64; #endif } s; - struct cvmx_ipd_port_sopx_s cn68xx; - struct cvmx_ipd_port_sopx_s cn68xxp1; }; union cvmx_ipd_prc_hold_ptr_fifo_ctl { @@ -1488,21 +1171,6 @@ union cvmx_ipd_prc_hold_ptr_fifo_ctl { uint64_t reserved_39_63:25; #endif } s; - struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn30xx; - struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn31xx; - struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn38xx; - struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn50xx; - struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn52xx; - struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn52xxp1; - struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn56xx; - struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn56xxp1; - struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn58xx; - struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn58xxp1; - struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn61xx; - struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn63xx; - struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn63xxp1; - struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn66xx; - struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cnf71xx; }; union cvmx_ipd_prc_port_ptr_fifo_ctl { @@ -1522,21 +1190,6 @@ union cvmx_ipd_prc_port_ptr_fifo_ctl { uint64_t reserved_44_63:20; #endif } s; - struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn30xx; - struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn31xx; - struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn38xx; - struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn50xx; - struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn52xx; - struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn52xxp1; - struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn56xx; - struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn56xxp1; - struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn58xx; - struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn58xxp1; - struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn61xx; - struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn63xx; - struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn63xxp1; - struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn66xx; - struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cnf71xx; }; union cvmx_ipd_ptr_count { @@ -1558,24 +1211,6 @@ union cvmx_ipd_ptr_count { uint64_t reserved_19_63:45; #endif } s; - struct cvmx_ipd_ptr_count_s cn30xx; - struct cvmx_ipd_ptr_count_s cn31xx; - struct cvmx_ipd_ptr_count_s cn38xx; - struct cvmx_ipd_ptr_count_s cn38xxp2; - struct cvmx_ipd_ptr_count_s cn50xx; - struct cvmx_ipd_ptr_count_s cn52xx; - struct cvmx_ipd_ptr_count_s cn52xxp1; - struct cvmx_ipd_ptr_count_s cn56xx; - struct cvmx_ipd_ptr_count_s cn56xxp1; - struct cvmx_ipd_ptr_count_s cn58xx; - struct cvmx_ipd_ptr_count_s cn58xxp1; - struct cvmx_ipd_ptr_count_s cn61xx; - struct cvmx_ipd_ptr_count_s cn63xx; - struct cvmx_ipd_ptr_count_s cn63xxp1; - struct cvmx_ipd_ptr_count_s cn66xx; - struct cvmx_ipd_ptr_count_s cn68xx; - struct cvmx_ipd_ptr_count_s cn68xxp1; - struct cvmx_ipd_ptr_count_s cnf71xx; }; union cvmx_ipd_pwp_ptr_fifo_ctl { @@ -1599,21 +1234,6 @@ union cvmx_ipd_pwp_ptr_fifo_ctl { uint64_t reserved_61_63:3; #endif } s; - struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn30xx; - struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn31xx; - struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn38xx; - struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn50xx; - struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn52xx; - struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn52xxp1; - struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn56xx; - struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn56xxp1; - struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn58xx; - struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn58xxp1; - struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn61xx; - struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn63xx; - struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn63xxp1; - struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn66xx; - struct cvmx_ipd_pwp_ptr_fifo_ctl_s cnf71xx; }; union cvmx_ipd_qosx_red_marks { @@ -1627,24 +1247,6 @@ union cvmx_ipd_qosx_red_marks { uint64_t drop:32; #endif } s; - struct cvmx_ipd_qosx_red_marks_s cn30xx; - struct cvmx_ipd_qosx_red_marks_s cn31xx; - struct cvmx_ipd_qosx_red_marks_s cn38xx; - struct cvmx_ipd_qosx_red_marks_s cn38xxp2; - struct cvmx_ipd_qosx_red_marks_s cn50xx; - struct cvmx_ipd_qosx_red_marks_s cn52xx; - struct cvmx_ipd_qosx_red_marks_s cn52xxp1; - struct cvmx_ipd_qosx_red_marks_s cn56xx; - struct cvmx_ipd_qosx_red_marks_s cn56xxp1; - struct cvmx_ipd_qosx_red_marks_s cn58xx; - struct cvmx_ipd_qosx_red_marks_s cn58xxp1; - struct cvmx_ipd_qosx_red_marks_s cn61xx; - struct cvmx_ipd_qosx_red_marks_s cn63xx; - struct cvmx_ipd_qosx_red_marks_s cn63xxp1; - struct cvmx_ipd_qosx_red_marks_s cn66xx; - struct cvmx_ipd_qosx_red_marks_s cn68xx; - struct cvmx_ipd_qosx_red_marks_s cn68xxp1; - struct cvmx_ipd_qosx_red_marks_s cnf71xx; }; union cvmx_ipd_que0_free_page_cnt { @@ -1658,24 +1260,6 @@ union cvmx_ipd_que0_free_page_cnt { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_ipd_que0_free_page_cnt_s cn30xx; - struct cvmx_ipd_que0_free_page_cnt_s cn31xx; - struct cvmx_ipd_que0_free_page_cnt_s cn38xx; - struct cvmx_ipd_que0_free_page_cnt_s cn38xxp2; - struct cvmx_ipd_que0_free_page_cnt_s cn50xx; - struct cvmx_ipd_que0_free_page_cnt_s cn52xx; - struct cvmx_ipd_que0_free_page_cnt_s cn52xxp1; - struct cvmx_ipd_que0_free_page_cnt_s cn56xx; - struct cvmx_ipd_que0_free_page_cnt_s cn56xxp1; - struct cvmx_ipd_que0_free_page_cnt_s cn58xx; - struct cvmx_ipd_que0_free_page_cnt_s cn58xxp1; - struct cvmx_ipd_que0_free_page_cnt_s cn61xx; - struct cvmx_ipd_que0_free_page_cnt_s cn63xx; - struct cvmx_ipd_que0_free_page_cnt_s cn63xxp1; - struct cvmx_ipd_que0_free_page_cnt_s cn66xx; - struct cvmx_ipd_que0_free_page_cnt_s cn68xx; - struct cvmx_ipd_que0_free_page_cnt_s cn68xxp1; - struct cvmx_ipd_que0_free_page_cnt_s cnf71xx; }; union cvmx_ipd_red_bpid_enablex { @@ -1687,8 +1271,6 @@ union cvmx_ipd_red_bpid_enablex { uint64_t prt_enb:64; #endif } s; - struct cvmx_ipd_red_bpid_enablex_s cn68xx; - struct cvmx_ipd_red_bpid_enablex_s cn68xxp1; }; union cvmx_ipd_red_delay { @@ -1704,8 +1286,6 @@ union cvmx_ipd_red_delay { uint64_t reserved_28_63:36; #endif } s; - struct cvmx_ipd_red_delay_s cn68xx; - struct cvmx_ipd_red_delay_s cn68xxp1; }; union cvmx_ipd_red_port_enable { @@ -1721,22 +1301,6 @@ union cvmx_ipd_red_port_enable { uint64_t prb_dly:14; #endif } s; - struct cvmx_ipd_red_port_enable_s cn30xx; - struct cvmx_ipd_red_port_enable_s cn31xx; - struct cvmx_ipd_red_port_enable_s cn38xx; - struct cvmx_ipd_red_port_enable_s cn38xxp2; - struct cvmx_ipd_red_port_enable_s cn50xx; - struct cvmx_ipd_red_port_enable_s cn52xx; - struct cvmx_ipd_red_port_enable_s cn52xxp1; - struct cvmx_ipd_red_port_enable_s cn56xx; - struct cvmx_ipd_red_port_enable_s cn56xxp1; - struct cvmx_ipd_red_port_enable_s cn58xx; - struct cvmx_ipd_red_port_enable_s cn58xxp1; - struct cvmx_ipd_red_port_enable_s cn61xx; - struct cvmx_ipd_red_port_enable_s cn63xx; - struct cvmx_ipd_red_port_enable_s cn63xxp1; - struct cvmx_ipd_red_port_enable_s cn66xx; - struct cvmx_ipd_red_port_enable_s cnf71xx; }; union cvmx_ipd_red_port_enable2 { @@ -1759,10 +1323,6 @@ union cvmx_ipd_red_port_enable2 { uint64_t reserved_4_63:60; #endif } cn52xx; - struct cvmx_ipd_red_port_enable2_cn52xx cn52xxp1; - struct cvmx_ipd_red_port_enable2_cn52xx cn56xx; - struct cvmx_ipd_red_port_enable2_cn52xx cn56xxp1; - struct cvmx_ipd_red_port_enable2_s cn61xx; struct cvmx_ipd_red_port_enable2_cn63xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_8_63:56; @@ -1772,9 +1332,6 @@ union cvmx_ipd_red_port_enable2 { uint64_t reserved_8_63:56; #endif } cn63xx; - struct cvmx_ipd_red_port_enable2_cn63xx cn63xxp1; - struct cvmx_ipd_red_port_enable2_s cn66xx; - struct cvmx_ipd_red_port_enable2_s cnf71xx; }; union cvmx_ipd_red_quex_param { @@ -1794,24 +1351,6 @@ union cvmx_ipd_red_quex_param { uint64_t reserved_49_63:15; #endif } s; - struct cvmx_ipd_red_quex_param_s cn30xx; - struct cvmx_ipd_red_quex_param_s cn31xx; - struct cvmx_ipd_red_quex_param_s cn38xx; - struct cvmx_ipd_red_quex_param_s cn38xxp2; - struct cvmx_ipd_red_quex_param_s cn50xx; - struct cvmx_ipd_red_quex_param_s cn52xx; - struct cvmx_ipd_red_quex_param_s cn52xxp1; - struct cvmx_ipd_red_quex_param_s cn56xx; - struct cvmx_ipd_red_quex_param_s cn56xxp1; - struct cvmx_ipd_red_quex_param_s cn58xx; - struct cvmx_ipd_red_quex_param_s cn58xxp1; - struct cvmx_ipd_red_quex_param_s cn61xx; - struct cvmx_ipd_red_quex_param_s cn63xx; - struct cvmx_ipd_red_quex_param_s cn63xxp1; - struct cvmx_ipd_red_quex_param_s cn66xx; - struct cvmx_ipd_red_quex_param_s cn68xx; - struct cvmx_ipd_red_quex_param_s cn68xxp1; - struct cvmx_ipd_red_quex_param_s cnf71xx; }; union cvmx_ipd_req_wgt { @@ -1837,7 +1376,6 @@ union cvmx_ipd_req_wgt { uint64_t wgt7:8; #endif } s; - struct cvmx_ipd_req_wgt_s cn68xx; }; union cvmx_ipd_sub_port_bp_page_cnt { @@ -1853,24 +1391,6 @@ union cvmx_ipd_sub_port_bp_page_cnt { uint64_t reserved_31_63:33; #endif } s; - struct cvmx_ipd_sub_port_bp_page_cnt_s cn30xx; - struct cvmx_ipd_sub_port_bp_page_cnt_s cn31xx; - struct cvmx_ipd_sub_port_bp_page_cnt_s cn38xx; - struct cvmx_ipd_sub_port_bp_page_cnt_s cn38xxp2; - struct cvmx_ipd_sub_port_bp_page_cnt_s cn50xx; - struct cvmx_ipd_sub_port_bp_page_cnt_s cn52xx; - struct cvmx_ipd_sub_port_bp_page_cnt_s cn52xxp1; - struct cvmx_ipd_sub_port_bp_page_cnt_s cn56xx; - struct cvmx_ipd_sub_port_bp_page_cnt_s cn56xxp1; - struct cvmx_ipd_sub_port_bp_page_cnt_s cn58xx; - struct cvmx_ipd_sub_port_bp_page_cnt_s cn58xxp1; - struct cvmx_ipd_sub_port_bp_page_cnt_s cn61xx; - struct cvmx_ipd_sub_port_bp_page_cnt_s cn63xx; - struct cvmx_ipd_sub_port_bp_page_cnt_s cn63xxp1; - struct cvmx_ipd_sub_port_bp_page_cnt_s cn66xx; - struct cvmx_ipd_sub_port_bp_page_cnt_s cn68xx; - struct cvmx_ipd_sub_port_bp_page_cnt_s cn68xxp1; - struct cvmx_ipd_sub_port_bp_page_cnt_s cnf71xx; }; union cvmx_ipd_sub_port_fcs { @@ -1897,7 +1417,6 @@ union cvmx_ipd_sub_port_fcs { uint64_t reserved_3_63:61; #endif } cn30xx; - struct cvmx_ipd_sub_port_fcs_cn30xx cn31xx; struct cvmx_ipd_sub_port_fcs_cn38xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_32_63:32; @@ -1907,19 +1426,6 @@ union cvmx_ipd_sub_port_fcs { uint64_t reserved_32_63:32; #endif } cn38xx; - struct cvmx_ipd_sub_port_fcs_cn38xx cn38xxp2; - struct cvmx_ipd_sub_port_fcs_cn30xx cn50xx; - struct cvmx_ipd_sub_port_fcs_s cn52xx; - struct cvmx_ipd_sub_port_fcs_s cn52xxp1; - struct cvmx_ipd_sub_port_fcs_s cn56xx; - struct cvmx_ipd_sub_port_fcs_s cn56xxp1; - struct cvmx_ipd_sub_port_fcs_cn38xx cn58xx; - struct cvmx_ipd_sub_port_fcs_cn38xx cn58xxp1; - struct cvmx_ipd_sub_port_fcs_s cn61xx; - struct cvmx_ipd_sub_port_fcs_s cn63xx; - struct cvmx_ipd_sub_port_fcs_s cn63xxp1; - struct cvmx_ipd_sub_port_fcs_s cn66xx; - struct cvmx_ipd_sub_port_fcs_s cnf71xx; }; union cvmx_ipd_sub_port_qos_cnt { @@ -1935,17 +1441,6 @@ union cvmx_ipd_sub_port_qos_cnt { uint64_t reserved_41_63:23; #endif } s; - struct cvmx_ipd_sub_port_qos_cnt_s cn52xx; - struct cvmx_ipd_sub_port_qos_cnt_s cn52xxp1; - struct cvmx_ipd_sub_port_qos_cnt_s cn56xx; - struct cvmx_ipd_sub_port_qos_cnt_s cn56xxp1; - struct cvmx_ipd_sub_port_qos_cnt_s cn61xx; - struct cvmx_ipd_sub_port_qos_cnt_s cn63xx; - struct cvmx_ipd_sub_port_qos_cnt_s cn63xxp1; - struct cvmx_ipd_sub_port_qos_cnt_s cn66xx; - struct cvmx_ipd_sub_port_qos_cnt_s cn68xx; - struct cvmx_ipd_sub_port_qos_cnt_s cn68xxp1; - struct cvmx_ipd_sub_port_qos_cnt_s cnf71xx; }; union cvmx_ipd_wqe_fpa_queue { @@ -1959,24 +1454,6 @@ union cvmx_ipd_wqe_fpa_queue { uint64_t reserved_3_63:61; #endif } s; - struct cvmx_ipd_wqe_fpa_queue_s cn30xx; - struct cvmx_ipd_wqe_fpa_queue_s cn31xx; - struct cvmx_ipd_wqe_fpa_queue_s cn38xx; - struct cvmx_ipd_wqe_fpa_queue_s cn38xxp2; - struct cvmx_ipd_wqe_fpa_queue_s cn50xx; - struct cvmx_ipd_wqe_fpa_queue_s cn52xx; - struct cvmx_ipd_wqe_fpa_queue_s cn52xxp1; - struct cvmx_ipd_wqe_fpa_queue_s cn56xx; - struct cvmx_ipd_wqe_fpa_queue_s cn56xxp1; - struct cvmx_ipd_wqe_fpa_queue_s cn58xx; - struct cvmx_ipd_wqe_fpa_queue_s cn58xxp1; - struct cvmx_ipd_wqe_fpa_queue_s cn61xx; - struct cvmx_ipd_wqe_fpa_queue_s cn63xx; - struct cvmx_ipd_wqe_fpa_queue_s cn63xxp1; - struct cvmx_ipd_wqe_fpa_queue_s cn66xx; - struct cvmx_ipd_wqe_fpa_queue_s cn68xx; - struct cvmx_ipd_wqe_fpa_queue_s cn68xxp1; - struct cvmx_ipd_wqe_fpa_queue_s cnf71xx; }; union cvmx_ipd_wqe_ptr_valid { @@ -1990,21 +1467,6 @@ union cvmx_ipd_wqe_ptr_valid { uint64_t reserved_29_63:35; #endif } s; - struct cvmx_ipd_wqe_ptr_valid_s cn30xx; - struct cvmx_ipd_wqe_ptr_valid_s cn31xx; - struct cvmx_ipd_wqe_ptr_valid_s cn38xx; - struct cvmx_ipd_wqe_ptr_valid_s cn50xx; - struct cvmx_ipd_wqe_ptr_valid_s cn52xx; - struct cvmx_ipd_wqe_ptr_valid_s cn52xxp1; - struct cvmx_ipd_wqe_ptr_valid_s cn56xx; - struct cvmx_ipd_wqe_ptr_valid_s cn56xxp1; - struct cvmx_ipd_wqe_ptr_valid_s cn58xx; - struct cvmx_ipd_wqe_ptr_valid_s cn58xxp1; - struct cvmx_ipd_wqe_ptr_valid_s cn61xx; - struct cvmx_ipd_wqe_ptr_valid_s cn63xx; - struct cvmx_ipd_wqe_ptr_valid_s cn63xxp1; - struct cvmx_ipd_wqe_ptr_valid_s cn66xx; - struct cvmx_ipd_wqe_ptr_valid_s cnf71xx; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-l2t-defs.h b/arch/mips/include/asm/octeon/cvmx-l2t-defs.h index fe50671fd1bb..06ea13251448 100644 --- a/arch/mips/include/asm/octeon/cvmx-l2t-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-l2t-defs.h @@ -104,7 +104,6 @@ union cvmx_l2t_err { __BITFIELD_FIELD(uint64_t ecc_ena:1, ;))))))))))))) } cn38xx; - struct cvmx_l2t_err_cn38xx cn38xxp2; struct cvmx_l2t_err_cn50xx { __BITFIELD_FIELD(uint64_t reserved_28_63:36, __BITFIELD_FIELD(uint64_t lck_intena2:1, @@ -139,11 +138,6 @@ union cvmx_l2t_err { __BITFIELD_FIELD(uint64_t ecc_ena:1, ;)))))))))))))) } cn52xx; - struct cvmx_l2t_err_cn52xx cn52xxp1; - struct cvmx_l2t_err_s cn56xx; - struct cvmx_l2t_err_s cn56xxp1; - struct cvmx_l2t_err_s cn58xx; - struct cvmx_l2t_err_s cn58xxp1; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-led-defs.h b/arch/mips/include/asm/octeon/cvmx-led-defs.h index d36d42b8307b..0237907522cb 100644 --- a/arch/mips/include/asm/octeon/cvmx-led-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-led-defs.h @@ -53,12 +53,6 @@ union cvmx_led_blink { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_led_blink_s cn38xx; - struct cvmx_led_blink_s cn38xxp2; - struct cvmx_led_blink_s cn56xx; - struct cvmx_led_blink_s cn56xxp1; - struct cvmx_led_blink_s cn58xx; - struct cvmx_led_blink_s cn58xxp1; }; union cvmx_led_clk_phase { @@ -72,12 +66,6 @@ union cvmx_led_clk_phase { uint64_t reserved_7_63:57; #endif } s; - struct cvmx_led_clk_phase_s cn38xx; - struct cvmx_led_clk_phase_s cn38xxp2; - struct cvmx_led_clk_phase_s cn56xx; - struct cvmx_led_clk_phase_s cn56xxp1; - struct cvmx_led_clk_phase_s cn58xx; - struct cvmx_led_clk_phase_s cn58xxp1; }; union cvmx_led_cylon { @@ -91,12 +79,6 @@ union cvmx_led_cylon { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_led_cylon_s cn38xx; - struct cvmx_led_cylon_s cn38xxp2; - struct cvmx_led_cylon_s cn56xx; - struct cvmx_led_cylon_s cn56xxp1; - struct cvmx_led_cylon_s cn58xx; - struct cvmx_led_cylon_s cn58xxp1; }; union cvmx_led_dbg { @@ -110,12 +92,6 @@ union cvmx_led_dbg { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_led_dbg_s cn38xx; - struct cvmx_led_dbg_s cn38xxp2; - struct cvmx_led_dbg_s cn56xx; - struct cvmx_led_dbg_s cn56xxp1; - struct cvmx_led_dbg_s cn58xx; - struct cvmx_led_dbg_s cn58xxp1; }; union cvmx_led_en { @@ -129,12 +105,6 @@ union cvmx_led_en { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_led_en_s cn38xx; - struct cvmx_led_en_s cn38xxp2; - struct cvmx_led_en_s cn56xx; - struct cvmx_led_en_s cn56xxp1; - struct cvmx_led_en_s cn58xx; - struct cvmx_led_en_s cn58xxp1; }; union cvmx_led_polarity { @@ -148,12 +118,6 @@ union cvmx_led_polarity { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_led_polarity_s cn38xx; - struct cvmx_led_polarity_s cn38xxp2; - struct cvmx_led_polarity_s cn56xx; - struct cvmx_led_polarity_s cn56xxp1; - struct cvmx_led_polarity_s cn58xx; - struct cvmx_led_polarity_s cn58xxp1; }; union cvmx_led_prt { @@ -167,12 +131,6 @@ union cvmx_led_prt { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_led_prt_s cn38xx; - struct cvmx_led_prt_s cn38xxp2; - struct cvmx_led_prt_s cn56xx; - struct cvmx_led_prt_s cn56xxp1; - struct cvmx_led_prt_s cn58xx; - struct cvmx_led_prt_s cn58xxp1; }; union cvmx_led_prt_fmt { @@ -186,12 +144,6 @@ union cvmx_led_prt_fmt { uint64_t reserved_4_63:60; #endif } s; - struct cvmx_led_prt_fmt_s cn38xx; - struct cvmx_led_prt_fmt_s cn38xxp2; - struct cvmx_led_prt_fmt_s cn56xx; - struct cvmx_led_prt_fmt_s cn56xxp1; - struct cvmx_led_prt_fmt_s cn58xx; - struct cvmx_led_prt_fmt_s cn58xxp1; }; union cvmx_led_prt_statusx { @@ -205,12 +157,6 @@ union cvmx_led_prt_statusx { uint64_t reserved_6_63:58; #endif } s; - struct cvmx_led_prt_statusx_s cn38xx; - struct cvmx_led_prt_statusx_s cn38xxp2; - struct cvmx_led_prt_statusx_s cn56xx; - struct cvmx_led_prt_statusx_s cn56xxp1; - struct cvmx_led_prt_statusx_s cn58xx; - struct cvmx_led_prt_statusx_s cn58xxp1; }; union cvmx_led_udd_cntx { @@ -224,12 +170,6 @@ union cvmx_led_udd_cntx { uint64_t reserved_6_63:58; #endif } s; - struct cvmx_led_udd_cntx_s cn38xx; - struct cvmx_led_udd_cntx_s cn38xxp2; - struct cvmx_led_udd_cntx_s cn56xx; - struct cvmx_led_udd_cntx_s cn56xxp1; - struct cvmx_led_udd_cntx_s cn58xx; - struct cvmx_led_udd_cntx_s cn58xxp1; }; union cvmx_led_udd_datx { @@ -243,12 +183,6 @@ union cvmx_led_udd_datx { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_led_udd_datx_s cn38xx; - struct cvmx_led_udd_datx_s cn38xxp2; - struct cvmx_led_udd_datx_s cn56xx; - struct cvmx_led_udd_datx_s cn56xxp1; - struct cvmx_led_udd_datx_s cn58xx; - struct cvmx_led_udd_datx_s cn58xxp1; }; union cvmx_led_udd_dat_clrx { @@ -262,12 +196,6 @@ union cvmx_led_udd_dat_clrx { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_led_udd_dat_clrx_s cn38xx; - struct cvmx_led_udd_dat_clrx_s cn38xxp2; - struct cvmx_led_udd_dat_clrx_s cn56xx; - struct cvmx_led_udd_dat_clrx_s cn56xxp1; - struct cvmx_led_udd_dat_clrx_s cn58xx; - struct cvmx_led_udd_dat_clrx_s cn58xxp1; }; union cvmx_led_udd_dat_setx { @@ -281,12 +209,6 @@ union cvmx_led_udd_dat_setx { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_led_udd_dat_setx_s cn38xx; - struct cvmx_led_udd_dat_setx_s cn38xxp2; - struct cvmx_led_udd_dat_setx_s cn56xx; - struct cvmx_led_udd_dat_setx_s cn56xxp1; - struct cvmx_led_udd_dat_setx_s cn58xx; - struct cvmx_led_udd_dat_setx_s cn58xxp1; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-lmcx-defs.h b/arch/mips/include/asm/octeon/cvmx-lmcx-defs.h index 36f510721141..4167a4c7a28d 100644 --- a/arch/mips/include/asm/octeon/cvmx-lmcx-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-lmcx-defs.h @@ -189,11 +189,6 @@ union cvmx_lmcx_bist_ctl { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_lmcx_bist_ctl_s cn50xx; - struct cvmx_lmcx_bist_ctl_s cn52xx; - struct cvmx_lmcx_bist_ctl_s cn52xxp1; - struct cvmx_lmcx_bist_ctl_s cn56xx; - struct cvmx_lmcx_bist_ctl_s cn56xxp1; }; union cvmx_lmcx_bist_result { @@ -236,10 +231,6 @@ union cvmx_lmcx_bist_result { uint64_t reserved_9_63:55; #endif } cn50xx; - struct cvmx_lmcx_bist_result_s cn52xx; - struct cvmx_lmcx_bist_result_s cn52xxp1; - struct cvmx_lmcx_bist_result_s cn56xx; - struct cvmx_lmcx_bist_result_s cn56xxp1; }; union cvmx_lmcx_char_ctl { @@ -263,7 +254,6 @@ union cvmx_lmcx_char_ctl { uint64_t reserved_44_63:20; #endif } s; - struct cvmx_lmcx_char_ctl_s cn61xx; struct cvmx_lmcx_char_ctl_cn63xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_42_63:22; @@ -279,11 +269,6 @@ union cvmx_lmcx_char_ctl { uint64_t reserved_42_63:22; #endif } cn63xx; - struct cvmx_lmcx_char_ctl_cn63xx cn63xxp1; - struct cvmx_lmcx_char_ctl_s cn66xx; - struct cvmx_lmcx_char_ctl_s cn68xx; - struct cvmx_lmcx_char_ctl_cn63xx cn68xxp1; - struct cvmx_lmcx_char_ctl_s cnf71xx; }; union cvmx_lmcx_char_mask0 { @@ -295,13 +280,6 @@ union cvmx_lmcx_char_mask0 { uint64_t mask:64; #endif } s; - struct cvmx_lmcx_char_mask0_s cn61xx; - struct cvmx_lmcx_char_mask0_s cn63xx; - struct cvmx_lmcx_char_mask0_s cn63xxp1; - struct cvmx_lmcx_char_mask0_s cn66xx; - struct cvmx_lmcx_char_mask0_s cn68xx; - struct cvmx_lmcx_char_mask0_s cn68xxp1; - struct cvmx_lmcx_char_mask0_s cnf71xx; }; union cvmx_lmcx_char_mask1 { @@ -315,13 +293,6 @@ union cvmx_lmcx_char_mask1 { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_lmcx_char_mask1_s cn61xx; - struct cvmx_lmcx_char_mask1_s cn63xx; - struct cvmx_lmcx_char_mask1_s cn63xxp1; - struct cvmx_lmcx_char_mask1_s cn66xx; - struct cvmx_lmcx_char_mask1_s cn68xx; - struct cvmx_lmcx_char_mask1_s cn68xxp1; - struct cvmx_lmcx_char_mask1_s cnf71xx; }; union cvmx_lmcx_char_mask2 { @@ -333,13 +304,6 @@ union cvmx_lmcx_char_mask2 { uint64_t mask:64; #endif } s; - struct cvmx_lmcx_char_mask2_s cn61xx; - struct cvmx_lmcx_char_mask2_s cn63xx; - struct cvmx_lmcx_char_mask2_s cn63xxp1; - struct cvmx_lmcx_char_mask2_s cn66xx; - struct cvmx_lmcx_char_mask2_s cn68xx; - struct cvmx_lmcx_char_mask2_s cn68xxp1; - struct cvmx_lmcx_char_mask2_s cnf71xx; }; union cvmx_lmcx_char_mask3 { @@ -353,13 +317,6 @@ union cvmx_lmcx_char_mask3 { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_lmcx_char_mask3_s cn61xx; - struct cvmx_lmcx_char_mask3_s cn63xx; - struct cvmx_lmcx_char_mask3_s cn63xxp1; - struct cvmx_lmcx_char_mask3_s cn66xx; - struct cvmx_lmcx_char_mask3_s cn68xx; - struct cvmx_lmcx_char_mask3_s cn68xxp1; - struct cvmx_lmcx_char_mask3_s cnf71xx; }; union cvmx_lmcx_char_mask4 { @@ -393,13 +350,6 @@ union cvmx_lmcx_char_mask4 { uint64_t reserved_33_63:31; #endif } s; - struct cvmx_lmcx_char_mask4_s cn61xx; - struct cvmx_lmcx_char_mask4_s cn63xx; - struct cvmx_lmcx_char_mask4_s cn63xxp1; - struct cvmx_lmcx_char_mask4_s cn66xx; - struct cvmx_lmcx_char_mask4_s cn68xx; - struct cvmx_lmcx_char_mask4_s cn68xxp1; - struct cvmx_lmcx_char_mask4_s cnf71xx; }; union cvmx_lmcx_comp_ctl { @@ -448,9 +398,6 @@ union cvmx_lmcx_comp_ctl { uint64_t reserved_32_63:32; #endif } cn30xx; - struct cvmx_lmcx_comp_ctl_cn30xx cn31xx; - struct cvmx_lmcx_comp_ctl_cn30xx cn38xx; - struct cvmx_lmcx_comp_ctl_cn30xx cn38xxp2; struct cvmx_lmcx_comp_ctl_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_32_63:32; @@ -470,11 +417,6 @@ union cvmx_lmcx_comp_ctl { uint64_t reserved_32_63:32; #endif } cn50xx; - struct cvmx_lmcx_comp_ctl_cn50xx cn52xx; - struct cvmx_lmcx_comp_ctl_cn50xx cn52xxp1; - struct cvmx_lmcx_comp_ctl_cn50xx cn56xx; - struct cvmx_lmcx_comp_ctl_cn50xx cn56xxp1; - struct cvmx_lmcx_comp_ctl_cn50xx cn58xx; struct cvmx_lmcx_comp_ctl_cn58xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_32_63:32; @@ -525,13 +467,6 @@ union cvmx_lmcx_comp_ctl2 { uint64_t reserved_34_63:30; #endif } s; - struct cvmx_lmcx_comp_ctl2_s cn61xx; - struct cvmx_lmcx_comp_ctl2_s cn63xx; - struct cvmx_lmcx_comp_ctl2_s cn63xxp1; - struct cvmx_lmcx_comp_ctl2_s cn66xx; - struct cvmx_lmcx_comp_ctl2_s cn68xx; - struct cvmx_lmcx_comp_ctl2_s cn68xxp1; - struct cvmx_lmcx_comp_ctl2_s cnf71xx; }; union cvmx_lmcx_config { @@ -587,7 +522,6 @@ union cvmx_lmcx_config { uint64_t reserved_61_63:3; #endif } s; - struct cvmx_lmcx_config_s cn61xx; struct cvmx_lmcx_config_cn63xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_59_63:5; @@ -723,9 +657,6 @@ union cvmx_lmcx_config { uint64_t reserved_60_63:4; #endif } cn66xx; - struct cvmx_lmcx_config_cn63xx cn68xx; - struct cvmx_lmcx_config_cn63xx cn68xxp1; - struct cvmx_lmcx_config_s cnf71xx; }; union cvmx_lmcx_control { @@ -787,7 +718,6 @@ union cvmx_lmcx_control { uint64_t scramble_ena:1; #endif } s; - struct cvmx_lmcx_control_s cn61xx; struct cvmx_lmcx_control_cn63xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_24_63:40; @@ -833,7 +763,6 @@ union cvmx_lmcx_control { uint64_t reserved_24_63:40; #endif } cn63xx; - struct cvmx_lmcx_control_cn63xx cn63xxp1; struct cvmx_lmcx_control_cn66xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t scramble_ena:1; @@ -938,8 +867,6 @@ union cvmx_lmcx_control { uint64_t reserved_63_63:1; #endif } cn68xx; - struct cvmx_lmcx_control_cn68xx cn68xxp1; - struct cvmx_lmcx_control_cn66xx cnf71xx; }; union cvmx_lmcx_ctl { @@ -1032,7 +959,6 @@ union cvmx_lmcx_ctl { uint64_t reserved_32_63:32; #endif } cn30xx; - struct cvmx_lmcx_ctl_cn30xx cn31xx; struct cvmx_lmcx_ctl_cn38xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_32_63:32; @@ -1076,7 +1002,6 @@ union cvmx_lmcx_ctl { uint64_t reserved_32_63:32; #endif } cn38xx; - struct cvmx_lmcx_ctl_cn38xx cn38xxp2; struct cvmx_lmcx_ctl_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_32_63:32; @@ -1165,9 +1090,6 @@ union cvmx_lmcx_ctl { uint64_t reserved_32_63:32; #endif } cn52xx; - struct cvmx_lmcx_ctl_cn52xx cn52xxp1; - struct cvmx_lmcx_ctl_cn52xx cn56xx; - struct cvmx_lmcx_ctl_cn52xx cn56xxp1; struct cvmx_lmcx_ctl_cn58xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_32_63:32; @@ -1211,7 +1133,6 @@ union cvmx_lmcx_ctl { uint64_t reserved_32_63:32; #endif } cn58xx; - struct cvmx_lmcx_ctl_cn58xx cn58xxp1; }; union cvmx_lmcx_ctl1 { @@ -1284,9 +1205,6 @@ union cvmx_lmcx_ctl1 { uint64_t reserved_21_63:43; #endif } cn52xx; - struct cvmx_lmcx_ctl1_cn52xx cn52xxp1; - struct cvmx_lmcx_ctl1_cn52xx cn56xx; - struct cvmx_lmcx_ctl1_cn52xx cn56xxp1; struct cvmx_lmcx_ctl1_cn58xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_10_63:54; @@ -1300,7 +1218,6 @@ union cvmx_lmcx_ctl1 { uint64_t reserved_10_63:54; #endif } cn58xx; - struct cvmx_lmcx_ctl1_cn58xx cn58xxp1; }; union cvmx_lmcx_dclk_cnt { @@ -1312,13 +1229,6 @@ union cvmx_lmcx_dclk_cnt { uint64_t dclkcnt:64; #endif } s; - struct cvmx_lmcx_dclk_cnt_s cn61xx; - struct cvmx_lmcx_dclk_cnt_s cn63xx; - struct cvmx_lmcx_dclk_cnt_s cn63xxp1; - struct cvmx_lmcx_dclk_cnt_s cn66xx; - struct cvmx_lmcx_dclk_cnt_s cn68xx; - struct cvmx_lmcx_dclk_cnt_s cn68xxp1; - struct cvmx_lmcx_dclk_cnt_s cnf71xx; }; union cvmx_lmcx_dclk_cnt_hi { @@ -1332,17 +1242,6 @@ union cvmx_lmcx_dclk_cnt_hi { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_lmcx_dclk_cnt_hi_s cn30xx; - struct cvmx_lmcx_dclk_cnt_hi_s cn31xx; - struct cvmx_lmcx_dclk_cnt_hi_s cn38xx; - struct cvmx_lmcx_dclk_cnt_hi_s cn38xxp2; - struct cvmx_lmcx_dclk_cnt_hi_s cn50xx; - struct cvmx_lmcx_dclk_cnt_hi_s cn52xx; - struct cvmx_lmcx_dclk_cnt_hi_s cn52xxp1; - struct cvmx_lmcx_dclk_cnt_hi_s cn56xx; - struct cvmx_lmcx_dclk_cnt_hi_s cn56xxp1; - struct cvmx_lmcx_dclk_cnt_hi_s cn58xx; - struct cvmx_lmcx_dclk_cnt_hi_s cn58xxp1; }; union cvmx_lmcx_dclk_cnt_lo { @@ -1356,17 +1255,6 @@ union cvmx_lmcx_dclk_cnt_lo { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_lmcx_dclk_cnt_lo_s cn30xx; - struct cvmx_lmcx_dclk_cnt_lo_s cn31xx; - struct cvmx_lmcx_dclk_cnt_lo_s cn38xx; - struct cvmx_lmcx_dclk_cnt_lo_s cn38xxp2; - struct cvmx_lmcx_dclk_cnt_lo_s cn50xx; - struct cvmx_lmcx_dclk_cnt_lo_s cn52xx; - struct cvmx_lmcx_dclk_cnt_lo_s cn52xxp1; - struct cvmx_lmcx_dclk_cnt_lo_s cn56xx; - struct cvmx_lmcx_dclk_cnt_lo_s cn56xxp1; - struct cvmx_lmcx_dclk_cnt_lo_s cn58xx; - struct cvmx_lmcx_dclk_cnt_lo_s cn58xxp1; }; union cvmx_lmcx_dclk_ctl { @@ -1386,8 +1274,6 @@ union cvmx_lmcx_dclk_ctl { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_lmcx_dclk_ctl_s cn56xx; - struct cvmx_lmcx_dclk_ctl_s cn56xxp1; }; union cvmx_lmcx_ddr2_ctl { @@ -1474,16 +1360,6 @@ union cvmx_lmcx_ddr2_ctl { uint64_t reserved_32_63:32; #endif } cn30xx; - struct cvmx_lmcx_ddr2_ctl_cn30xx cn31xx; - struct cvmx_lmcx_ddr2_ctl_s cn38xx; - struct cvmx_lmcx_ddr2_ctl_s cn38xxp2; - struct cvmx_lmcx_ddr2_ctl_s cn50xx; - struct cvmx_lmcx_ddr2_ctl_s cn52xx; - struct cvmx_lmcx_ddr2_ctl_s cn52xxp1; - struct cvmx_lmcx_ddr2_ctl_s cn56xx; - struct cvmx_lmcx_ddr2_ctl_s cn56xxp1; - struct cvmx_lmcx_ddr2_ctl_s cn58xx; - struct cvmx_lmcx_ddr2_ctl_s cn58xxp1; }; union cvmx_lmcx_ddr_pll_ctl { @@ -1515,13 +1391,6 @@ union cvmx_lmcx_ddr_pll_ctl { uint64_t reserved_27_63:37; #endif } s; - struct cvmx_lmcx_ddr_pll_ctl_s cn61xx; - struct cvmx_lmcx_ddr_pll_ctl_s cn63xx; - struct cvmx_lmcx_ddr_pll_ctl_s cn63xxp1; - struct cvmx_lmcx_ddr_pll_ctl_s cn66xx; - struct cvmx_lmcx_ddr_pll_ctl_s cn68xx; - struct cvmx_lmcx_ddr_pll_ctl_s cn68xxp1; - struct cvmx_lmcx_ddr_pll_ctl_s cnf71xx; }; union cvmx_lmcx_delay_cfg { @@ -1539,7 +1408,6 @@ union cvmx_lmcx_delay_cfg { uint64_t reserved_15_63:49; #endif } s; - struct cvmx_lmcx_delay_cfg_s cn30xx; struct cvmx_lmcx_delay_cfg_cn38xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_14_63:50; @@ -1557,13 +1425,6 @@ union cvmx_lmcx_delay_cfg { uint64_t reserved_14_63:50; #endif } cn38xx; - struct cvmx_lmcx_delay_cfg_cn38xx cn50xx; - struct cvmx_lmcx_delay_cfg_cn38xx cn52xx; - struct cvmx_lmcx_delay_cfg_cn38xx cn52xxp1; - struct cvmx_lmcx_delay_cfg_cn38xx cn56xx; - struct cvmx_lmcx_delay_cfg_cn38xx cn56xxp1; - struct cvmx_lmcx_delay_cfg_cn38xx cn58xx; - struct cvmx_lmcx_delay_cfg_cn38xx cn58xxp1; }; union cvmx_lmcx_dimmx_params { @@ -1605,13 +1466,6 @@ union cvmx_lmcx_dimmx_params { uint64_t rc15:4; #endif } s; - struct cvmx_lmcx_dimmx_params_s cn61xx; - struct cvmx_lmcx_dimmx_params_s cn63xx; - struct cvmx_lmcx_dimmx_params_s cn63xxp1; - struct cvmx_lmcx_dimmx_params_s cn66xx; - struct cvmx_lmcx_dimmx_params_s cn68xx; - struct cvmx_lmcx_dimmx_params_s cn68xxp1; - struct cvmx_lmcx_dimmx_params_s cnf71xx; }; union cvmx_lmcx_dimm_ctl { @@ -1631,13 +1485,6 @@ union cvmx_lmcx_dimm_ctl { uint64_t reserved_46_63:18; #endif } s; - struct cvmx_lmcx_dimm_ctl_s cn61xx; - struct cvmx_lmcx_dimm_ctl_s cn63xx; - struct cvmx_lmcx_dimm_ctl_s cn63xxp1; - struct cvmx_lmcx_dimm_ctl_s cn66xx; - struct cvmx_lmcx_dimm_ctl_s cn68xx; - struct cvmx_lmcx_dimm_ctl_s cn68xxp1; - struct cvmx_lmcx_dimm_ctl_s cnf71xx; }; union cvmx_lmcx_dll_ctl { @@ -1657,10 +1504,6 @@ union cvmx_lmcx_dll_ctl { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_lmcx_dll_ctl_s cn52xx; - struct cvmx_lmcx_dll_ctl_s cn52xxp1; - struct cvmx_lmcx_dll_ctl_s cn56xx; - struct cvmx_lmcx_dll_ctl_s cn56xxp1; }; union cvmx_lmcx_dll_ctl2 { @@ -1684,7 +1527,6 @@ union cvmx_lmcx_dll_ctl2 { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_lmcx_dll_ctl2_s cn61xx; struct cvmx_lmcx_dll_ctl2_cn63xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_15_63:49; @@ -1702,11 +1544,6 @@ union cvmx_lmcx_dll_ctl2 { uint64_t reserved_15_63:49; #endif } cn63xx; - struct cvmx_lmcx_dll_ctl2_cn63xx cn63xxp1; - struct cvmx_lmcx_dll_ctl2_cn63xx cn66xx; - struct cvmx_lmcx_dll_ctl2_s cn68xx; - struct cvmx_lmcx_dll_ctl2_s cn68xxp1; - struct cvmx_lmcx_dll_ctl2_s cnf71xx; }; union cvmx_lmcx_dll_ctl3 { @@ -1748,7 +1585,6 @@ union cvmx_lmcx_dll_ctl3 { uint64_t reserved_41_63:23; #endif } s; - struct cvmx_lmcx_dll_ctl3_s cn61xx; struct cvmx_lmcx_dll_ctl3_cn63xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_29_63:35; @@ -1776,11 +1612,6 @@ union cvmx_lmcx_dll_ctl3 { uint64_t reserved_29_63:35; #endif } cn63xx; - struct cvmx_lmcx_dll_ctl3_cn63xx cn63xxp1; - struct cvmx_lmcx_dll_ctl3_cn63xx cn66xx; - struct cvmx_lmcx_dll_ctl3_s cn68xx; - struct cvmx_lmcx_dll_ctl3_s cn68xxp1; - struct cvmx_lmcx_dll_ctl3_s cnf71xx; }; union cvmx_lmcx_dual_memcfg { @@ -1800,13 +1631,6 @@ union cvmx_lmcx_dual_memcfg { uint64_t reserved_20_63:44; #endif } s; - struct cvmx_lmcx_dual_memcfg_s cn50xx; - struct cvmx_lmcx_dual_memcfg_s cn52xx; - struct cvmx_lmcx_dual_memcfg_s cn52xxp1; - struct cvmx_lmcx_dual_memcfg_s cn56xx; - struct cvmx_lmcx_dual_memcfg_s cn56xxp1; - struct cvmx_lmcx_dual_memcfg_s cn58xx; - struct cvmx_lmcx_dual_memcfg_s cn58xxp1; struct cvmx_lmcx_dual_memcfg_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_19_63:45; @@ -1820,12 +1644,6 @@ union cvmx_lmcx_dual_memcfg { uint64_t reserved_19_63:45; #endif } cn61xx; - struct cvmx_lmcx_dual_memcfg_cn61xx cn63xx; - struct cvmx_lmcx_dual_memcfg_cn61xx cn63xxp1; - struct cvmx_lmcx_dual_memcfg_cn61xx cn66xx; - struct cvmx_lmcx_dual_memcfg_cn61xx cn68xx; - struct cvmx_lmcx_dual_memcfg_cn61xx cn68xxp1; - struct cvmx_lmcx_dual_memcfg_cn61xx cnf71xx; }; union cvmx_lmcx_ecc_synd { @@ -1845,24 +1663,6 @@ union cvmx_lmcx_ecc_synd { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_lmcx_ecc_synd_s cn30xx; - struct cvmx_lmcx_ecc_synd_s cn31xx; - struct cvmx_lmcx_ecc_synd_s cn38xx; - struct cvmx_lmcx_ecc_synd_s cn38xxp2; - struct cvmx_lmcx_ecc_synd_s cn50xx; - struct cvmx_lmcx_ecc_synd_s cn52xx; - struct cvmx_lmcx_ecc_synd_s cn52xxp1; - struct cvmx_lmcx_ecc_synd_s cn56xx; - struct cvmx_lmcx_ecc_synd_s cn56xxp1; - struct cvmx_lmcx_ecc_synd_s cn58xx; - struct cvmx_lmcx_ecc_synd_s cn58xxp1; - struct cvmx_lmcx_ecc_synd_s cn61xx; - struct cvmx_lmcx_ecc_synd_s cn63xx; - struct cvmx_lmcx_ecc_synd_s cn63xxp1; - struct cvmx_lmcx_ecc_synd_s cn66xx; - struct cvmx_lmcx_ecc_synd_s cn68xx; - struct cvmx_lmcx_ecc_synd_s cn68xxp1; - struct cvmx_lmcx_ecc_synd_s cnf71xx; }; union cvmx_lmcx_fadr { @@ -1891,16 +1691,6 @@ union cvmx_lmcx_fadr { uint64_t reserved_32_63:32; #endif } cn30xx; - struct cvmx_lmcx_fadr_cn30xx cn31xx; - struct cvmx_lmcx_fadr_cn30xx cn38xx; - struct cvmx_lmcx_fadr_cn30xx cn38xxp2; - struct cvmx_lmcx_fadr_cn30xx cn50xx; - struct cvmx_lmcx_fadr_cn30xx cn52xx; - struct cvmx_lmcx_fadr_cn30xx cn52xxp1; - struct cvmx_lmcx_fadr_cn30xx cn56xx; - struct cvmx_lmcx_fadr_cn30xx cn56xxp1; - struct cvmx_lmcx_fadr_cn30xx cn58xx; - struct cvmx_lmcx_fadr_cn30xx cn58xxp1; struct cvmx_lmcx_fadr_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_36_63:28; @@ -1918,12 +1708,6 @@ union cvmx_lmcx_fadr { uint64_t reserved_36_63:28; #endif } cn61xx; - struct cvmx_lmcx_fadr_cn61xx cn63xx; - struct cvmx_lmcx_fadr_cn61xx cn63xxp1; - struct cvmx_lmcx_fadr_cn61xx cn66xx; - struct cvmx_lmcx_fadr_cn61xx cn68xx; - struct cvmx_lmcx_fadr_cn61xx cn68xxp1; - struct cvmx_lmcx_fadr_cn61xx cnf71xx; }; union cvmx_lmcx_ifb_cnt { @@ -1935,13 +1719,6 @@ union cvmx_lmcx_ifb_cnt { uint64_t ifbcnt:64; #endif } s; - struct cvmx_lmcx_ifb_cnt_s cn61xx; - struct cvmx_lmcx_ifb_cnt_s cn63xx; - struct cvmx_lmcx_ifb_cnt_s cn63xxp1; - struct cvmx_lmcx_ifb_cnt_s cn66xx; - struct cvmx_lmcx_ifb_cnt_s cn68xx; - struct cvmx_lmcx_ifb_cnt_s cn68xxp1; - struct cvmx_lmcx_ifb_cnt_s cnf71xx; }; union cvmx_lmcx_ifb_cnt_hi { @@ -1955,17 +1732,6 @@ union cvmx_lmcx_ifb_cnt_hi { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_lmcx_ifb_cnt_hi_s cn30xx; - struct cvmx_lmcx_ifb_cnt_hi_s cn31xx; - struct cvmx_lmcx_ifb_cnt_hi_s cn38xx; - struct cvmx_lmcx_ifb_cnt_hi_s cn38xxp2; - struct cvmx_lmcx_ifb_cnt_hi_s cn50xx; - struct cvmx_lmcx_ifb_cnt_hi_s cn52xx; - struct cvmx_lmcx_ifb_cnt_hi_s cn52xxp1; - struct cvmx_lmcx_ifb_cnt_hi_s cn56xx; - struct cvmx_lmcx_ifb_cnt_hi_s cn56xxp1; - struct cvmx_lmcx_ifb_cnt_hi_s cn58xx; - struct cvmx_lmcx_ifb_cnt_hi_s cn58xxp1; }; union cvmx_lmcx_ifb_cnt_lo { @@ -1979,17 +1745,6 @@ union cvmx_lmcx_ifb_cnt_lo { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_lmcx_ifb_cnt_lo_s cn30xx; - struct cvmx_lmcx_ifb_cnt_lo_s cn31xx; - struct cvmx_lmcx_ifb_cnt_lo_s cn38xx; - struct cvmx_lmcx_ifb_cnt_lo_s cn38xxp2; - struct cvmx_lmcx_ifb_cnt_lo_s cn50xx; - struct cvmx_lmcx_ifb_cnt_lo_s cn52xx; - struct cvmx_lmcx_ifb_cnt_lo_s cn52xxp1; - struct cvmx_lmcx_ifb_cnt_lo_s cn56xx; - struct cvmx_lmcx_ifb_cnt_lo_s cn56xxp1; - struct cvmx_lmcx_ifb_cnt_lo_s cn58xx; - struct cvmx_lmcx_ifb_cnt_lo_s cn58xxp1; }; union cvmx_lmcx_int { @@ -2007,13 +1762,6 @@ union cvmx_lmcx_int { uint64_t reserved_9_63:55; #endif } s; - struct cvmx_lmcx_int_s cn61xx; - struct cvmx_lmcx_int_s cn63xx; - struct cvmx_lmcx_int_s cn63xxp1; - struct cvmx_lmcx_int_s cn66xx; - struct cvmx_lmcx_int_s cn68xx; - struct cvmx_lmcx_int_s cn68xxp1; - struct cvmx_lmcx_int_s cnf71xx; }; union cvmx_lmcx_int_en { @@ -2031,13 +1779,6 @@ union cvmx_lmcx_int_en { uint64_t reserved_3_63:61; #endif } s; - struct cvmx_lmcx_int_en_s cn61xx; - struct cvmx_lmcx_int_en_s cn63xx; - struct cvmx_lmcx_int_en_s cn63xxp1; - struct cvmx_lmcx_int_en_s cn66xx; - struct cvmx_lmcx_int_en_s cn68xx; - struct cvmx_lmcx_int_en_s cn68xxp1; - struct cvmx_lmcx_int_en_s cnf71xx; }; union cvmx_lmcx_mem_cfg0 { @@ -2075,17 +1816,6 @@ union cvmx_lmcx_mem_cfg0 { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_lmcx_mem_cfg0_s cn30xx; - struct cvmx_lmcx_mem_cfg0_s cn31xx; - struct cvmx_lmcx_mem_cfg0_s cn38xx; - struct cvmx_lmcx_mem_cfg0_s cn38xxp2; - struct cvmx_lmcx_mem_cfg0_s cn50xx; - struct cvmx_lmcx_mem_cfg0_s cn52xx; - struct cvmx_lmcx_mem_cfg0_s cn52xxp1; - struct cvmx_lmcx_mem_cfg0_s cn56xx; - struct cvmx_lmcx_mem_cfg0_s cn56xxp1; - struct cvmx_lmcx_mem_cfg0_s cn58xx; - struct cvmx_lmcx_mem_cfg0_s cn58xxp1; }; union cvmx_lmcx_mem_cfg1 { @@ -2115,8 +1845,6 @@ union cvmx_lmcx_mem_cfg1 { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_lmcx_mem_cfg1_s cn30xx; - struct cvmx_lmcx_mem_cfg1_s cn31xx; struct cvmx_lmcx_mem_cfg1_cn38xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_31_63:33; @@ -2140,14 +1868,6 @@ union cvmx_lmcx_mem_cfg1 { uint64_t reserved_31_63:33; #endif } cn38xx; - struct cvmx_lmcx_mem_cfg1_cn38xx cn38xxp2; - struct cvmx_lmcx_mem_cfg1_s cn50xx; - struct cvmx_lmcx_mem_cfg1_cn38xx cn52xx; - struct cvmx_lmcx_mem_cfg1_cn38xx cn52xxp1; - struct cvmx_lmcx_mem_cfg1_cn38xx cn56xx; - struct cvmx_lmcx_mem_cfg1_cn38xx cn56xxp1; - struct cvmx_lmcx_mem_cfg1_cn38xx cn58xx; - struct cvmx_lmcx_mem_cfg1_cn38xx cn58xxp1; }; union cvmx_lmcx_modereg_params0 { @@ -2189,13 +1909,6 @@ union cvmx_lmcx_modereg_params0 { uint64_t reserved_25_63:39; #endif } s; - struct cvmx_lmcx_modereg_params0_s cn61xx; - struct cvmx_lmcx_modereg_params0_s cn63xx; - struct cvmx_lmcx_modereg_params0_s cn63xxp1; - struct cvmx_lmcx_modereg_params0_s cn66xx; - struct cvmx_lmcx_modereg_params0_s cn68xx; - struct cvmx_lmcx_modereg_params0_s cn68xxp1; - struct cvmx_lmcx_modereg_params0_s cnf71xx; }; union cvmx_lmcx_modereg_params1 { @@ -2255,13 +1968,6 @@ union cvmx_lmcx_modereg_params1 { uint64_t reserved_48_63:16; #endif } s; - struct cvmx_lmcx_modereg_params1_s cn61xx; - struct cvmx_lmcx_modereg_params1_s cn63xx; - struct cvmx_lmcx_modereg_params1_s cn63xxp1; - struct cvmx_lmcx_modereg_params1_s cn66xx; - struct cvmx_lmcx_modereg_params1_s cn68xx; - struct cvmx_lmcx_modereg_params1_s cn68xxp1; - struct cvmx_lmcx_modereg_params1_s cnf71xx; }; union cvmx_lmcx_nxm { @@ -2300,15 +2006,6 @@ union cvmx_lmcx_nxm { uint64_t reserved_8_63:56; #endif } cn52xx; - struct cvmx_lmcx_nxm_cn52xx cn56xx; - struct cvmx_lmcx_nxm_cn52xx cn58xx; - struct cvmx_lmcx_nxm_s cn61xx; - struct cvmx_lmcx_nxm_s cn63xx; - struct cvmx_lmcx_nxm_s cn63xxp1; - struct cvmx_lmcx_nxm_s cn66xx; - struct cvmx_lmcx_nxm_s cn68xx; - struct cvmx_lmcx_nxm_s cn68xxp1; - struct cvmx_lmcx_nxm_s cnf71xx; }; union cvmx_lmcx_ops_cnt { @@ -2320,13 +2017,6 @@ union cvmx_lmcx_ops_cnt { uint64_t opscnt:64; #endif } s; - struct cvmx_lmcx_ops_cnt_s cn61xx; - struct cvmx_lmcx_ops_cnt_s cn63xx; - struct cvmx_lmcx_ops_cnt_s cn63xxp1; - struct cvmx_lmcx_ops_cnt_s cn66xx; - struct cvmx_lmcx_ops_cnt_s cn68xx; - struct cvmx_lmcx_ops_cnt_s cn68xxp1; - struct cvmx_lmcx_ops_cnt_s cnf71xx; }; union cvmx_lmcx_ops_cnt_hi { @@ -2340,17 +2030,6 @@ union cvmx_lmcx_ops_cnt_hi { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_lmcx_ops_cnt_hi_s cn30xx; - struct cvmx_lmcx_ops_cnt_hi_s cn31xx; - struct cvmx_lmcx_ops_cnt_hi_s cn38xx; - struct cvmx_lmcx_ops_cnt_hi_s cn38xxp2; - struct cvmx_lmcx_ops_cnt_hi_s cn50xx; - struct cvmx_lmcx_ops_cnt_hi_s cn52xx; - struct cvmx_lmcx_ops_cnt_hi_s cn52xxp1; - struct cvmx_lmcx_ops_cnt_hi_s cn56xx; - struct cvmx_lmcx_ops_cnt_hi_s cn56xxp1; - struct cvmx_lmcx_ops_cnt_hi_s cn58xx; - struct cvmx_lmcx_ops_cnt_hi_s cn58xxp1; }; union cvmx_lmcx_ops_cnt_lo { @@ -2364,17 +2043,6 @@ union cvmx_lmcx_ops_cnt_lo { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_lmcx_ops_cnt_lo_s cn30xx; - struct cvmx_lmcx_ops_cnt_lo_s cn31xx; - struct cvmx_lmcx_ops_cnt_lo_s cn38xx; - struct cvmx_lmcx_ops_cnt_lo_s cn38xxp2; - struct cvmx_lmcx_ops_cnt_lo_s cn50xx; - struct cvmx_lmcx_ops_cnt_lo_s cn52xx; - struct cvmx_lmcx_ops_cnt_lo_s cn52xxp1; - struct cvmx_lmcx_ops_cnt_lo_s cn56xx; - struct cvmx_lmcx_ops_cnt_lo_s cn56xxp1; - struct cvmx_lmcx_ops_cnt_lo_s cn58xx; - struct cvmx_lmcx_ops_cnt_lo_s cn58xxp1; }; union cvmx_lmcx_phy_ctl { @@ -2404,8 +2072,6 @@ union cvmx_lmcx_phy_ctl { uint64_t reserved_15_63:49; #endif } s; - struct cvmx_lmcx_phy_ctl_s cn61xx; - struct cvmx_lmcx_phy_ctl_s cn63xx; struct cvmx_lmcx_phy_ctl_cn63xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_14_63:50; @@ -2429,10 +2095,6 @@ union cvmx_lmcx_phy_ctl { uint64_t reserved_14_63:50; #endif } cn63xxp1; - struct cvmx_lmcx_phy_ctl_s cn66xx; - struct cvmx_lmcx_phy_ctl_s cn68xx; - struct cvmx_lmcx_phy_ctl_s cn68xxp1; - struct cvmx_lmcx_phy_ctl_s cnf71xx; }; union cvmx_lmcx_pll_bwctl { @@ -2448,10 +2110,6 @@ union cvmx_lmcx_pll_bwctl { uint64_t reserved_5_63:59; #endif } s; - struct cvmx_lmcx_pll_bwctl_s cn30xx; - struct cvmx_lmcx_pll_bwctl_s cn31xx; - struct cvmx_lmcx_pll_bwctl_s cn38xx; - struct cvmx_lmcx_pll_bwctl_s cn38xxp2; }; union cvmx_lmcx_pll_ctl { @@ -2520,9 +2178,6 @@ union cvmx_lmcx_pll_ctl { uint64_t reserved_29_63:35; #endif } cn50xx; - struct cvmx_lmcx_pll_ctl_s cn52xx; - struct cvmx_lmcx_pll_ctl_s cn52xxp1; - struct cvmx_lmcx_pll_ctl_cn50xx cn56xx; struct cvmx_lmcx_pll_ctl_cn56xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_28_63:36; @@ -2552,8 +2207,6 @@ union cvmx_lmcx_pll_ctl { uint64_t reserved_28_63:36; #endif } cn56xxp1; - struct cvmx_lmcx_pll_ctl_cn56xxp1 cn58xx; - struct cvmx_lmcx_pll_ctl_cn56xxp1 cn58xxp1; }; union cvmx_lmcx_pll_status { @@ -2575,12 +2228,6 @@ union cvmx_lmcx_pll_status { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_lmcx_pll_status_s cn50xx; - struct cvmx_lmcx_pll_status_s cn52xx; - struct cvmx_lmcx_pll_status_s cn52xxp1; - struct cvmx_lmcx_pll_status_s cn56xx; - struct cvmx_lmcx_pll_status_s cn56xxp1; - struct cvmx_lmcx_pll_status_s cn58xx; struct cvmx_lmcx_pll_status_cn58xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_2_63:62; @@ -2615,10 +2262,6 @@ union cvmx_lmcx_read_level_ctl { uint64_t reserved_44_63:20; #endif } s; - struct cvmx_lmcx_read_level_ctl_s cn52xx; - struct cvmx_lmcx_read_level_ctl_s cn52xxp1; - struct cvmx_lmcx_read_level_ctl_s cn56xx; - struct cvmx_lmcx_read_level_ctl_s cn56xxp1; }; union cvmx_lmcx_read_level_dbg { @@ -2636,10 +2279,6 @@ union cvmx_lmcx_read_level_dbg { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_lmcx_read_level_dbg_s cn52xx; - struct cvmx_lmcx_read_level_dbg_s cn52xxp1; - struct cvmx_lmcx_read_level_dbg_s cn56xx; - struct cvmx_lmcx_read_level_dbg_s cn56xxp1; }; union cvmx_lmcx_read_level_rankx { @@ -2671,10 +2310,6 @@ union cvmx_lmcx_read_level_rankx { uint64_t reserved_38_63:26; #endif } s; - struct cvmx_lmcx_read_level_rankx_s cn52xx; - struct cvmx_lmcx_read_level_rankx_s cn52xxp1; - struct cvmx_lmcx_read_level_rankx_s cn56xx; - struct cvmx_lmcx_read_level_rankx_s cn56xxp1; }; union cvmx_lmcx_reset_ctl { @@ -2694,13 +2329,6 @@ union cvmx_lmcx_reset_ctl { uint64_t reserved_4_63:60; #endif } s; - struct cvmx_lmcx_reset_ctl_s cn61xx; - struct cvmx_lmcx_reset_ctl_s cn63xx; - struct cvmx_lmcx_reset_ctl_s cn63xxp1; - struct cvmx_lmcx_reset_ctl_s cn66xx; - struct cvmx_lmcx_reset_ctl_s cn68xx; - struct cvmx_lmcx_reset_ctl_s cn68xxp1; - struct cvmx_lmcx_reset_ctl_s cnf71xx; }; union cvmx_lmcx_rlevel_ctl { @@ -2730,8 +2358,6 @@ union cvmx_lmcx_rlevel_ctl { uint64_t reserved_22_63:42; #endif } s; - struct cvmx_lmcx_rlevel_ctl_s cn61xx; - struct cvmx_lmcx_rlevel_ctl_s cn63xx; struct cvmx_lmcx_rlevel_ctl_cn63xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_9_63:55; @@ -2745,10 +2371,6 @@ union cvmx_lmcx_rlevel_ctl { uint64_t reserved_9_63:55; #endif } cn63xxp1; - struct cvmx_lmcx_rlevel_ctl_s cn66xx; - struct cvmx_lmcx_rlevel_ctl_s cn68xx; - struct cvmx_lmcx_rlevel_ctl_s cn68xxp1; - struct cvmx_lmcx_rlevel_ctl_s cnf71xx; }; union cvmx_lmcx_rlevel_dbg { @@ -2760,13 +2382,6 @@ union cvmx_lmcx_rlevel_dbg { uint64_t bitmask:64; #endif } s; - struct cvmx_lmcx_rlevel_dbg_s cn61xx; - struct cvmx_lmcx_rlevel_dbg_s cn63xx; - struct cvmx_lmcx_rlevel_dbg_s cn63xxp1; - struct cvmx_lmcx_rlevel_dbg_s cn66xx; - struct cvmx_lmcx_rlevel_dbg_s cn68xx; - struct cvmx_lmcx_rlevel_dbg_s cn68xxp1; - struct cvmx_lmcx_rlevel_dbg_s cnf71xx; }; union cvmx_lmcx_rlevel_rankx { @@ -2798,13 +2413,6 @@ union cvmx_lmcx_rlevel_rankx { uint64_t reserved_56_63:8; #endif } s; - struct cvmx_lmcx_rlevel_rankx_s cn61xx; - struct cvmx_lmcx_rlevel_rankx_s cn63xx; - struct cvmx_lmcx_rlevel_rankx_s cn63xxp1; - struct cvmx_lmcx_rlevel_rankx_s cn66xx; - struct cvmx_lmcx_rlevel_rankx_s cn68xx; - struct cvmx_lmcx_rlevel_rankx_s cn68xxp1; - struct cvmx_lmcx_rlevel_rankx_s cnf71xx; }; union cvmx_lmcx_rodt_comp_ctl { @@ -2826,13 +2434,6 @@ union cvmx_lmcx_rodt_comp_ctl { uint64_t reserved_17_63:47; #endif } s; - struct cvmx_lmcx_rodt_comp_ctl_s cn50xx; - struct cvmx_lmcx_rodt_comp_ctl_s cn52xx; - struct cvmx_lmcx_rodt_comp_ctl_s cn52xxp1; - struct cvmx_lmcx_rodt_comp_ctl_s cn56xx; - struct cvmx_lmcx_rodt_comp_ctl_s cn56xxp1; - struct cvmx_lmcx_rodt_comp_ctl_s cn58xx; - struct cvmx_lmcx_rodt_comp_ctl_s cn58xxp1; }; union cvmx_lmcx_rodt_ctl { @@ -2860,17 +2461,6 @@ union cvmx_lmcx_rodt_ctl { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_lmcx_rodt_ctl_s cn30xx; - struct cvmx_lmcx_rodt_ctl_s cn31xx; - struct cvmx_lmcx_rodt_ctl_s cn38xx; - struct cvmx_lmcx_rodt_ctl_s cn38xxp2; - struct cvmx_lmcx_rodt_ctl_s cn50xx; - struct cvmx_lmcx_rodt_ctl_s cn52xx; - struct cvmx_lmcx_rodt_ctl_s cn52xxp1; - struct cvmx_lmcx_rodt_ctl_s cn56xx; - struct cvmx_lmcx_rodt_ctl_s cn56xxp1; - struct cvmx_lmcx_rodt_ctl_s cn58xx; - struct cvmx_lmcx_rodt_ctl_s cn58xxp1; }; union cvmx_lmcx_rodt_mask { @@ -2896,13 +2486,6 @@ union cvmx_lmcx_rodt_mask { uint64_t rodt_d3_r1:8; #endif } s; - struct cvmx_lmcx_rodt_mask_s cn61xx; - struct cvmx_lmcx_rodt_mask_s cn63xx; - struct cvmx_lmcx_rodt_mask_s cn63xxp1; - struct cvmx_lmcx_rodt_mask_s cn66xx; - struct cvmx_lmcx_rodt_mask_s cn68xx; - struct cvmx_lmcx_rodt_mask_s cn68xxp1; - struct cvmx_lmcx_rodt_mask_s cnf71xx; }; union cvmx_lmcx_scramble_cfg0 { @@ -2914,9 +2497,6 @@ union cvmx_lmcx_scramble_cfg0 { uint64_t key:64; #endif } s; - struct cvmx_lmcx_scramble_cfg0_s cn61xx; - struct cvmx_lmcx_scramble_cfg0_s cn66xx; - struct cvmx_lmcx_scramble_cfg0_s cnf71xx; }; union cvmx_lmcx_scramble_cfg1 { @@ -2928,9 +2508,6 @@ union cvmx_lmcx_scramble_cfg1 { uint64_t key:64; #endif } s; - struct cvmx_lmcx_scramble_cfg1_s cn61xx; - struct cvmx_lmcx_scramble_cfg1_s cn66xx; - struct cvmx_lmcx_scramble_cfg1_s cnf71xx; }; union cvmx_lmcx_scrambled_fadr { @@ -2952,9 +2529,6 @@ union cvmx_lmcx_scrambled_fadr { uint64_t reserved_36_63:28; #endif } s; - struct cvmx_lmcx_scrambled_fadr_s cn61xx; - struct cvmx_lmcx_scrambled_fadr_s cn66xx; - struct cvmx_lmcx_scrambled_fadr_s cnf71xx; }; union cvmx_lmcx_slot_ctl0 { @@ -2974,13 +2548,6 @@ union cvmx_lmcx_slot_ctl0 { uint64_t reserved_24_63:40; #endif } s; - struct cvmx_lmcx_slot_ctl0_s cn61xx; - struct cvmx_lmcx_slot_ctl0_s cn63xx; - struct cvmx_lmcx_slot_ctl0_s cn63xxp1; - struct cvmx_lmcx_slot_ctl0_s cn66xx; - struct cvmx_lmcx_slot_ctl0_s cn68xx; - struct cvmx_lmcx_slot_ctl0_s cn68xxp1; - struct cvmx_lmcx_slot_ctl0_s cnf71xx; }; union cvmx_lmcx_slot_ctl1 { @@ -3000,13 +2567,6 @@ union cvmx_lmcx_slot_ctl1 { uint64_t reserved_24_63:40; #endif } s; - struct cvmx_lmcx_slot_ctl1_s cn61xx; - struct cvmx_lmcx_slot_ctl1_s cn63xx; - struct cvmx_lmcx_slot_ctl1_s cn63xxp1; - struct cvmx_lmcx_slot_ctl1_s cn66xx; - struct cvmx_lmcx_slot_ctl1_s cn68xx; - struct cvmx_lmcx_slot_ctl1_s cn68xxp1; - struct cvmx_lmcx_slot_ctl1_s cnf71xx; }; union cvmx_lmcx_slot_ctl2 { @@ -3026,13 +2586,6 @@ union cvmx_lmcx_slot_ctl2 { uint64_t reserved_24_63:40; #endif } s; - struct cvmx_lmcx_slot_ctl2_s cn61xx; - struct cvmx_lmcx_slot_ctl2_s cn63xx; - struct cvmx_lmcx_slot_ctl2_s cn63xxp1; - struct cvmx_lmcx_slot_ctl2_s cn66xx; - struct cvmx_lmcx_slot_ctl2_s cn68xx; - struct cvmx_lmcx_slot_ctl2_s cn68xxp1; - struct cvmx_lmcx_slot_ctl2_s cnf71xx; }; union cvmx_lmcx_timing_params0 { @@ -3095,7 +2648,6 @@ union cvmx_lmcx_timing_params0 { uint64_t reserved_47_63:17; #endif } cn61xx; - struct cvmx_lmcx_timing_params0_cn61xx cn63xx; struct cvmx_lmcx_timing_params0_cn63xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_46_63:18; @@ -3123,10 +2675,6 @@ union cvmx_lmcx_timing_params0 { uint64_t reserved_46_63:18; #endif } cn63xxp1; - struct cvmx_lmcx_timing_params0_cn61xx cn66xx; - struct cvmx_lmcx_timing_params0_cn61xx cn68xx; - struct cvmx_lmcx_timing_params0_cn61xx cn68xxp1; - struct cvmx_lmcx_timing_params0_cn61xx cnf71xx; }; union cvmx_lmcx_timing_params1 { @@ -3162,8 +2710,6 @@ union cvmx_lmcx_timing_params1 { uint64_t reserved_47_63:17; #endif } s; - struct cvmx_lmcx_timing_params1_s cn61xx; - struct cvmx_lmcx_timing_params1_s cn63xx; struct cvmx_lmcx_timing_params1_cn63xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_46_63:18; @@ -3193,10 +2739,6 @@ union cvmx_lmcx_timing_params1 { uint64_t reserved_46_63:18; #endif } cn63xxp1; - struct cvmx_lmcx_timing_params1_s cn66xx; - struct cvmx_lmcx_timing_params1_s cn68xx; - struct cvmx_lmcx_timing_params1_s cn68xxp1; - struct cvmx_lmcx_timing_params1_s cnf71xx; }; union cvmx_lmcx_tro_ctl { @@ -3212,13 +2754,6 @@ union cvmx_lmcx_tro_ctl { uint64_t reserved_33_63:31; #endif } s; - struct cvmx_lmcx_tro_ctl_s cn61xx; - struct cvmx_lmcx_tro_ctl_s cn63xx; - struct cvmx_lmcx_tro_ctl_s cn63xxp1; - struct cvmx_lmcx_tro_ctl_s cn66xx; - struct cvmx_lmcx_tro_ctl_s cn68xx; - struct cvmx_lmcx_tro_ctl_s cn68xxp1; - struct cvmx_lmcx_tro_ctl_s cnf71xx; }; union cvmx_lmcx_tro_stat { @@ -3232,13 +2767,6 @@ union cvmx_lmcx_tro_stat { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_lmcx_tro_stat_s cn61xx; - struct cvmx_lmcx_tro_stat_s cn63xx; - struct cvmx_lmcx_tro_stat_s cn63xxp1; - struct cvmx_lmcx_tro_stat_s cn66xx; - struct cvmx_lmcx_tro_stat_s cn68xx; - struct cvmx_lmcx_tro_stat_s cn68xxp1; - struct cvmx_lmcx_tro_stat_s cnf71xx; }; union cvmx_lmcx_wlevel_ctl { @@ -3260,8 +2788,6 @@ union cvmx_lmcx_wlevel_ctl { uint64_t reserved_22_63:42; #endif } s; - struct cvmx_lmcx_wlevel_ctl_s cn61xx; - struct cvmx_lmcx_wlevel_ctl_s cn63xx; struct cvmx_lmcx_wlevel_ctl_cn63xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_10_63:54; @@ -3273,10 +2799,6 @@ union cvmx_lmcx_wlevel_ctl { uint64_t reserved_10_63:54; #endif } cn63xxp1; - struct cvmx_lmcx_wlevel_ctl_s cn66xx; - struct cvmx_lmcx_wlevel_ctl_s cn68xx; - struct cvmx_lmcx_wlevel_ctl_s cn68xxp1; - struct cvmx_lmcx_wlevel_ctl_s cnf71xx; }; union cvmx_lmcx_wlevel_dbg { @@ -3292,13 +2814,6 @@ union cvmx_lmcx_wlevel_dbg { uint64_t reserved_12_63:52; #endif } s; - struct cvmx_lmcx_wlevel_dbg_s cn61xx; - struct cvmx_lmcx_wlevel_dbg_s cn63xx; - struct cvmx_lmcx_wlevel_dbg_s cn63xxp1; - struct cvmx_lmcx_wlevel_dbg_s cn66xx; - struct cvmx_lmcx_wlevel_dbg_s cn68xx; - struct cvmx_lmcx_wlevel_dbg_s cn68xxp1; - struct cvmx_lmcx_wlevel_dbg_s cnf71xx; }; union cvmx_lmcx_wlevel_rankx { @@ -3330,13 +2845,6 @@ union cvmx_lmcx_wlevel_rankx { uint64_t reserved_47_63:17; #endif } s; - struct cvmx_lmcx_wlevel_rankx_s cn61xx; - struct cvmx_lmcx_wlevel_rankx_s cn63xx; - struct cvmx_lmcx_wlevel_rankx_s cn63xxp1; - struct cvmx_lmcx_wlevel_rankx_s cn66xx; - struct cvmx_lmcx_wlevel_rankx_s cn68xx; - struct cvmx_lmcx_wlevel_rankx_s cn68xxp1; - struct cvmx_lmcx_wlevel_rankx_s cnf71xx; }; union cvmx_lmcx_wodt_ctl0 { @@ -3363,7 +2871,6 @@ union cvmx_lmcx_wodt_ctl0 { uint64_t reserved_32_63:32; #endif } cn30xx; - struct cvmx_lmcx_wodt_ctl0_cn30xx cn31xx; struct cvmx_lmcx_wodt_ctl0_cn38xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_32_63:32; @@ -3387,14 +2894,6 @@ union cvmx_lmcx_wodt_ctl0 { uint64_t reserved_32_63:32; #endif } cn38xx; - struct cvmx_lmcx_wodt_ctl0_cn38xx cn38xxp2; - struct cvmx_lmcx_wodt_ctl0_cn38xx cn50xx; - struct cvmx_lmcx_wodt_ctl0_cn30xx cn52xx; - struct cvmx_lmcx_wodt_ctl0_cn30xx cn52xxp1; - struct cvmx_lmcx_wodt_ctl0_cn30xx cn56xx; - struct cvmx_lmcx_wodt_ctl0_cn30xx cn56xxp1; - struct cvmx_lmcx_wodt_ctl0_cn38xx cn58xx; - struct cvmx_lmcx_wodt_ctl0_cn38xx cn58xxp1; }; union cvmx_lmcx_wodt_ctl1 { @@ -3414,12 +2913,6 @@ union cvmx_lmcx_wodt_ctl1 { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_lmcx_wodt_ctl1_s cn30xx; - struct cvmx_lmcx_wodt_ctl1_s cn31xx; - struct cvmx_lmcx_wodt_ctl1_s cn52xx; - struct cvmx_lmcx_wodt_ctl1_s cn52xxp1; - struct cvmx_lmcx_wodt_ctl1_s cn56xx; - struct cvmx_lmcx_wodt_ctl1_s cn56xxp1; }; union cvmx_lmcx_wodt_mask { @@ -3445,13 +2938,6 @@ union cvmx_lmcx_wodt_mask { uint64_t wodt_d3_r1:8; #endif } s; - struct cvmx_lmcx_wodt_mask_s cn61xx; - struct cvmx_lmcx_wodt_mask_s cn63xx; - struct cvmx_lmcx_wodt_mask_s cn63xxp1; - struct cvmx_lmcx_wodt_mask_s cn66xx; - struct cvmx_lmcx_wodt_mask_s cn68xx; - struct cvmx_lmcx_wodt_mask_s cn68xxp1; - struct cvmx_lmcx_wodt_mask_s cnf71xx; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-mio-defs.h b/arch/mips/include/asm/octeon/cvmx-mio-defs.h index 5196c04eee41..4ad95d040bb1 100644 --- a/arch/mips/include/asm/octeon/cvmx-mio-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-mio-defs.h @@ -188,7 +188,6 @@ union cvmx_mio_boot_bist_stat { uint64_t reserved_4_63:60; #endif } cn30xx; - struct cvmx_mio_boot_bist_stat_cn30xx cn31xx; struct cvmx_mio_boot_bist_stat_cn38xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_3_63:61; @@ -202,7 +201,6 @@ union cvmx_mio_boot_bist_stat { uint64_t reserved_3_63:61; #endif } cn38xx; - struct cvmx_mio_boot_bist_stat_cn38xx cn38xxp2; struct cvmx_mio_boot_bist_stat_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_6_63:58; @@ -254,10 +252,6 @@ union cvmx_mio_boot_bist_stat { uint64_t reserved_4_63:60; #endif } cn52xxp1; - struct cvmx_mio_boot_bist_stat_cn52xxp1 cn56xx; - struct cvmx_mio_boot_bist_stat_cn52xxp1 cn56xxp1; - struct cvmx_mio_boot_bist_stat_cn38xx cn58xx; - struct cvmx_mio_boot_bist_stat_cn38xx cn58xxp1; struct cvmx_mio_boot_bist_stat_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_12_63:52; @@ -276,7 +270,6 @@ union cvmx_mio_boot_bist_stat { uint64_t reserved_9_63:55; #endif } cn63xx; - struct cvmx_mio_boot_bist_stat_cn63xx cn63xxp1; struct cvmx_mio_boot_bist_stat_cn66xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_10_63:54; @@ -286,9 +279,6 @@ union cvmx_mio_boot_bist_stat { uint64_t reserved_10_63:54; #endif } cn66xx; - struct cvmx_mio_boot_bist_stat_cn66xx cn68xx; - struct cvmx_mio_boot_bist_stat_cn66xx cn68xxp1; - struct cvmx_mio_boot_bist_stat_cn61xx cnf71xx; }; union cvmx_mio_boot_comp { @@ -311,10 +301,6 @@ union cvmx_mio_boot_comp { uint64_t reserved_10_63:54; #endif } cn50xx; - struct cvmx_mio_boot_comp_cn50xx cn52xx; - struct cvmx_mio_boot_comp_cn50xx cn52xxp1; - struct cvmx_mio_boot_comp_cn50xx cn56xx; - struct cvmx_mio_boot_comp_cn50xx cn56xxp1; struct cvmx_mio_boot_comp_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_12_63:52; @@ -326,12 +312,6 @@ union cvmx_mio_boot_comp { uint64_t reserved_12_63:52; #endif } cn61xx; - struct cvmx_mio_boot_comp_cn61xx cn63xx; - struct cvmx_mio_boot_comp_cn61xx cn63xxp1; - struct cvmx_mio_boot_comp_cn61xx cn66xx; - struct cvmx_mio_boot_comp_cn61xx cn68xx; - struct cvmx_mio_boot_comp_cn61xx cn68xxp1; - struct cvmx_mio_boot_comp_cn61xx cnf71xx; }; union cvmx_mio_boot_dma_cfgx { @@ -361,17 +341,6 @@ union cvmx_mio_boot_dma_cfgx { uint64_t en:1; #endif } s; - struct cvmx_mio_boot_dma_cfgx_s cn52xx; - struct cvmx_mio_boot_dma_cfgx_s cn52xxp1; - struct cvmx_mio_boot_dma_cfgx_s cn56xx; - struct cvmx_mio_boot_dma_cfgx_s cn56xxp1; - struct cvmx_mio_boot_dma_cfgx_s cn61xx; - struct cvmx_mio_boot_dma_cfgx_s cn63xx; - struct cvmx_mio_boot_dma_cfgx_s cn63xxp1; - struct cvmx_mio_boot_dma_cfgx_s cn66xx; - struct cvmx_mio_boot_dma_cfgx_s cn68xx; - struct cvmx_mio_boot_dma_cfgx_s cn68xxp1; - struct cvmx_mio_boot_dma_cfgx_s cnf71xx; }; union cvmx_mio_boot_dma_intx { @@ -387,17 +356,6 @@ union cvmx_mio_boot_dma_intx { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_mio_boot_dma_intx_s cn52xx; - struct cvmx_mio_boot_dma_intx_s cn52xxp1; - struct cvmx_mio_boot_dma_intx_s cn56xx; - struct cvmx_mio_boot_dma_intx_s cn56xxp1; - struct cvmx_mio_boot_dma_intx_s cn61xx; - struct cvmx_mio_boot_dma_intx_s cn63xx; - struct cvmx_mio_boot_dma_intx_s cn63xxp1; - struct cvmx_mio_boot_dma_intx_s cn66xx; - struct cvmx_mio_boot_dma_intx_s cn68xx; - struct cvmx_mio_boot_dma_intx_s cn68xxp1; - struct cvmx_mio_boot_dma_intx_s cnf71xx; }; union cvmx_mio_boot_dma_int_enx { @@ -413,17 +371,6 @@ union cvmx_mio_boot_dma_int_enx { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_mio_boot_dma_int_enx_s cn52xx; - struct cvmx_mio_boot_dma_int_enx_s cn52xxp1; - struct cvmx_mio_boot_dma_int_enx_s cn56xx; - struct cvmx_mio_boot_dma_int_enx_s cn56xxp1; - struct cvmx_mio_boot_dma_int_enx_s cn61xx; - struct cvmx_mio_boot_dma_int_enx_s cn63xx; - struct cvmx_mio_boot_dma_int_enx_s cn63xxp1; - struct cvmx_mio_boot_dma_int_enx_s cn66xx; - struct cvmx_mio_boot_dma_int_enx_s cn68xx; - struct cvmx_mio_boot_dma_int_enx_s cn68xxp1; - struct cvmx_mio_boot_dma_int_enx_s cnf71xx; }; union cvmx_mio_boot_dma_timx { @@ -463,17 +410,6 @@ union cvmx_mio_boot_dma_timx { uint64_t dmack_pi:1; #endif } s; - struct cvmx_mio_boot_dma_timx_s cn52xx; - struct cvmx_mio_boot_dma_timx_s cn52xxp1; - struct cvmx_mio_boot_dma_timx_s cn56xx; - struct cvmx_mio_boot_dma_timx_s cn56xxp1; - struct cvmx_mio_boot_dma_timx_s cn61xx; - struct cvmx_mio_boot_dma_timx_s cn63xx; - struct cvmx_mio_boot_dma_timx_s cn63xxp1; - struct cvmx_mio_boot_dma_timx_s cn66xx; - struct cvmx_mio_boot_dma_timx_s cn68xx; - struct cvmx_mio_boot_dma_timx_s cn68xxp1; - struct cvmx_mio_boot_dma_timx_s cnf71xx; }; union cvmx_mio_boot_err { @@ -489,24 +425,6 @@ union cvmx_mio_boot_err { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_mio_boot_err_s cn30xx; - struct cvmx_mio_boot_err_s cn31xx; - struct cvmx_mio_boot_err_s cn38xx; - struct cvmx_mio_boot_err_s cn38xxp2; - struct cvmx_mio_boot_err_s cn50xx; - struct cvmx_mio_boot_err_s cn52xx; - struct cvmx_mio_boot_err_s cn52xxp1; - struct cvmx_mio_boot_err_s cn56xx; - struct cvmx_mio_boot_err_s cn56xxp1; - struct cvmx_mio_boot_err_s cn58xx; - struct cvmx_mio_boot_err_s cn58xxp1; - struct cvmx_mio_boot_err_s cn61xx; - struct cvmx_mio_boot_err_s cn63xx; - struct cvmx_mio_boot_err_s cn63xxp1; - struct cvmx_mio_boot_err_s cn66xx; - struct cvmx_mio_boot_err_s cn68xx; - struct cvmx_mio_boot_err_s cn68xxp1; - struct cvmx_mio_boot_err_s cnf71xx; }; union cvmx_mio_boot_int { @@ -522,24 +440,6 @@ union cvmx_mio_boot_int { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_mio_boot_int_s cn30xx; - struct cvmx_mio_boot_int_s cn31xx; - struct cvmx_mio_boot_int_s cn38xx; - struct cvmx_mio_boot_int_s cn38xxp2; - struct cvmx_mio_boot_int_s cn50xx; - struct cvmx_mio_boot_int_s cn52xx; - struct cvmx_mio_boot_int_s cn52xxp1; - struct cvmx_mio_boot_int_s cn56xx; - struct cvmx_mio_boot_int_s cn56xxp1; - struct cvmx_mio_boot_int_s cn58xx; - struct cvmx_mio_boot_int_s cn58xxp1; - struct cvmx_mio_boot_int_s cn61xx; - struct cvmx_mio_boot_int_s cn63xx; - struct cvmx_mio_boot_int_s cn63xxp1; - struct cvmx_mio_boot_int_s cn66xx; - struct cvmx_mio_boot_int_s cn68xx; - struct cvmx_mio_boot_int_s cn68xxp1; - struct cvmx_mio_boot_int_s cnf71xx; }; union cvmx_mio_boot_loc_adr { @@ -555,24 +455,6 @@ union cvmx_mio_boot_loc_adr { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_boot_loc_adr_s cn30xx; - struct cvmx_mio_boot_loc_adr_s cn31xx; - struct cvmx_mio_boot_loc_adr_s cn38xx; - struct cvmx_mio_boot_loc_adr_s cn38xxp2; - struct cvmx_mio_boot_loc_adr_s cn50xx; - struct cvmx_mio_boot_loc_adr_s cn52xx; - struct cvmx_mio_boot_loc_adr_s cn52xxp1; - struct cvmx_mio_boot_loc_adr_s cn56xx; - struct cvmx_mio_boot_loc_adr_s cn56xxp1; - struct cvmx_mio_boot_loc_adr_s cn58xx; - struct cvmx_mio_boot_loc_adr_s cn58xxp1; - struct cvmx_mio_boot_loc_adr_s cn61xx; - struct cvmx_mio_boot_loc_adr_s cn63xx; - struct cvmx_mio_boot_loc_adr_s cn63xxp1; - struct cvmx_mio_boot_loc_adr_s cn66xx; - struct cvmx_mio_boot_loc_adr_s cn68xx; - struct cvmx_mio_boot_loc_adr_s cn68xxp1; - struct cvmx_mio_boot_loc_adr_s cnf71xx; }; union cvmx_mio_boot_loc_cfgx { @@ -592,24 +474,6 @@ union cvmx_mio_boot_loc_cfgx { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_mio_boot_loc_cfgx_s cn30xx; - struct cvmx_mio_boot_loc_cfgx_s cn31xx; - struct cvmx_mio_boot_loc_cfgx_s cn38xx; - struct cvmx_mio_boot_loc_cfgx_s cn38xxp2; - struct cvmx_mio_boot_loc_cfgx_s cn50xx; - struct cvmx_mio_boot_loc_cfgx_s cn52xx; - struct cvmx_mio_boot_loc_cfgx_s cn52xxp1; - struct cvmx_mio_boot_loc_cfgx_s cn56xx; - struct cvmx_mio_boot_loc_cfgx_s cn56xxp1; - struct cvmx_mio_boot_loc_cfgx_s cn58xx; - struct cvmx_mio_boot_loc_cfgx_s cn58xxp1; - struct cvmx_mio_boot_loc_cfgx_s cn61xx; - struct cvmx_mio_boot_loc_cfgx_s cn63xx; - struct cvmx_mio_boot_loc_cfgx_s cn63xxp1; - struct cvmx_mio_boot_loc_cfgx_s cn66xx; - struct cvmx_mio_boot_loc_cfgx_s cn68xx; - struct cvmx_mio_boot_loc_cfgx_s cn68xxp1; - struct cvmx_mio_boot_loc_cfgx_s cnf71xx; }; union cvmx_mio_boot_loc_dat { @@ -621,24 +485,6 @@ union cvmx_mio_boot_loc_dat { uint64_t data:64; #endif } s; - struct cvmx_mio_boot_loc_dat_s cn30xx; - struct cvmx_mio_boot_loc_dat_s cn31xx; - struct cvmx_mio_boot_loc_dat_s cn38xx; - struct cvmx_mio_boot_loc_dat_s cn38xxp2; - struct cvmx_mio_boot_loc_dat_s cn50xx; - struct cvmx_mio_boot_loc_dat_s cn52xx; - struct cvmx_mio_boot_loc_dat_s cn52xxp1; - struct cvmx_mio_boot_loc_dat_s cn56xx; - struct cvmx_mio_boot_loc_dat_s cn56xxp1; - struct cvmx_mio_boot_loc_dat_s cn58xx; - struct cvmx_mio_boot_loc_dat_s cn58xxp1; - struct cvmx_mio_boot_loc_dat_s cn61xx; - struct cvmx_mio_boot_loc_dat_s cn63xx; - struct cvmx_mio_boot_loc_dat_s cn63xxp1; - struct cvmx_mio_boot_loc_dat_s cn66xx; - struct cvmx_mio_boot_loc_dat_s cn68xx; - struct cvmx_mio_boot_loc_dat_s cn68xxp1; - struct cvmx_mio_boot_loc_dat_s cnf71xx; }; union cvmx_mio_boot_pin_defs { @@ -737,12 +583,6 @@ union cvmx_mio_boot_pin_defs { uint64_t reserved_32_63:32; #endif } cn61xx; - struct cvmx_mio_boot_pin_defs_cn52xx cn63xx; - struct cvmx_mio_boot_pin_defs_cn52xx cn63xxp1; - struct cvmx_mio_boot_pin_defs_cn52xx cn66xx; - struct cvmx_mio_boot_pin_defs_cn52xx cn68xx; - struct cvmx_mio_boot_pin_defs_cn52xx cn68xxp1; - struct cvmx_mio_boot_pin_defs_cn61xx cnf71xx; }; union cvmx_mio_boot_reg_cfgx { @@ -803,7 +643,6 @@ union cvmx_mio_boot_reg_cfgx { uint64_t reserved_37_63:27; #endif } cn30xx; - struct cvmx_mio_boot_reg_cfgx_cn30xx cn31xx; struct cvmx_mio_boot_reg_cfgx_cn38xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_32_63:32; @@ -821,7 +660,6 @@ union cvmx_mio_boot_reg_cfgx { uint64_t reserved_32_63:32; #endif } cn38xx; - struct cvmx_mio_boot_reg_cfgx_cn38xx cn38xxp2; struct cvmx_mio_boot_reg_cfgx_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_42_63:22; @@ -851,19 +689,6 @@ union cvmx_mio_boot_reg_cfgx { uint64_t reserved_42_63:22; #endif } cn50xx; - struct cvmx_mio_boot_reg_cfgx_s cn52xx; - struct cvmx_mio_boot_reg_cfgx_s cn52xxp1; - struct cvmx_mio_boot_reg_cfgx_s cn56xx; - struct cvmx_mio_boot_reg_cfgx_s cn56xxp1; - struct cvmx_mio_boot_reg_cfgx_cn30xx cn58xx; - struct cvmx_mio_boot_reg_cfgx_cn30xx cn58xxp1; - struct cvmx_mio_boot_reg_cfgx_s cn61xx; - struct cvmx_mio_boot_reg_cfgx_s cn63xx; - struct cvmx_mio_boot_reg_cfgx_s cn63xxp1; - struct cvmx_mio_boot_reg_cfgx_s cn66xx; - struct cvmx_mio_boot_reg_cfgx_s cn68xx; - struct cvmx_mio_boot_reg_cfgx_s cn68xxp1; - struct cvmx_mio_boot_reg_cfgx_s cnf71xx; }; union cvmx_mio_boot_reg_timx { @@ -899,8 +724,6 @@ union cvmx_mio_boot_reg_timx { uint64_t pagem:1; #endif } s; - struct cvmx_mio_boot_reg_timx_s cn30xx; - struct cvmx_mio_boot_reg_timx_s cn31xx; struct cvmx_mio_boot_reg_timx_cn38xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t pagem:1; @@ -932,21 +755,6 @@ union cvmx_mio_boot_reg_timx { uint64_t pagem:1; #endif } cn38xx; - struct cvmx_mio_boot_reg_timx_cn38xx cn38xxp2; - struct cvmx_mio_boot_reg_timx_s cn50xx; - struct cvmx_mio_boot_reg_timx_s cn52xx; - struct cvmx_mio_boot_reg_timx_s cn52xxp1; - struct cvmx_mio_boot_reg_timx_s cn56xx; - struct cvmx_mio_boot_reg_timx_s cn56xxp1; - struct cvmx_mio_boot_reg_timx_s cn58xx; - struct cvmx_mio_boot_reg_timx_s cn58xxp1; - struct cvmx_mio_boot_reg_timx_s cn61xx; - struct cvmx_mio_boot_reg_timx_s cn63xx; - struct cvmx_mio_boot_reg_timx_s cn63xxp1; - struct cvmx_mio_boot_reg_timx_s cn66xx; - struct cvmx_mio_boot_reg_timx_s cn68xx; - struct cvmx_mio_boot_reg_timx_s cn68xxp1; - struct cvmx_mio_boot_reg_timx_s cnf71xx; }; union cvmx_mio_boot_thr { @@ -981,23 +789,6 @@ union cvmx_mio_boot_thr { uint64_t reserved_14_63:50; #endif } cn30xx; - struct cvmx_mio_boot_thr_cn30xx cn31xx; - struct cvmx_mio_boot_thr_cn30xx cn38xx; - struct cvmx_mio_boot_thr_cn30xx cn38xxp2; - struct cvmx_mio_boot_thr_cn30xx cn50xx; - struct cvmx_mio_boot_thr_s cn52xx; - struct cvmx_mio_boot_thr_s cn52xxp1; - struct cvmx_mio_boot_thr_s cn56xx; - struct cvmx_mio_boot_thr_s cn56xxp1; - struct cvmx_mio_boot_thr_cn30xx cn58xx; - struct cvmx_mio_boot_thr_cn30xx cn58xxp1; - struct cvmx_mio_boot_thr_s cn61xx; - struct cvmx_mio_boot_thr_s cn63xx; - struct cvmx_mio_boot_thr_s cn63xxp1; - struct cvmx_mio_boot_thr_s cn66xx; - struct cvmx_mio_boot_thr_s cn68xx; - struct cvmx_mio_boot_thr_s cn68xxp1; - struct cvmx_mio_boot_thr_s cnf71xx; }; union cvmx_mio_emm_buf_dat { @@ -1009,8 +800,6 @@ union cvmx_mio_emm_buf_dat { uint64_t dat:64; #endif } s; - struct cvmx_mio_emm_buf_dat_s cn61xx; - struct cvmx_mio_emm_buf_dat_s cnf71xx; }; union cvmx_mio_emm_buf_idx { @@ -1030,8 +819,6 @@ union cvmx_mio_emm_buf_idx { uint64_t reserved_17_63:47; #endif } s; - struct cvmx_mio_emm_buf_idx_s cn61xx; - struct cvmx_mio_emm_buf_idx_s cnf71xx; }; union cvmx_mio_emm_cfg { @@ -1049,8 +836,6 @@ union cvmx_mio_emm_cfg { uint64_t reserved_17_63:47; #endif } s; - struct cvmx_mio_emm_cfg_s cn61xx; - struct cvmx_mio_emm_cfg_s cnf71xx; }; union cvmx_mio_emm_cmd { @@ -1082,8 +867,6 @@ union cvmx_mio_emm_cmd { uint64_t reserved_62_63:2; #endif } s; - struct cvmx_mio_emm_cmd_s cn61xx; - struct cvmx_mio_emm_cmd_s cnf71xx; }; union cvmx_mio_emm_dma { @@ -1115,8 +898,6 @@ union cvmx_mio_emm_dma { uint64_t reserved_62_63:2; #endif } s; - struct cvmx_mio_emm_dma_s cn61xx; - struct cvmx_mio_emm_dma_s cnf71xx; }; union cvmx_mio_emm_int { @@ -1142,8 +923,6 @@ union cvmx_mio_emm_int { uint64_t reserved_7_63:57; #endif } s; - struct cvmx_mio_emm_int_s cn61xx; - struct cvmx_mio_emm_int_s cnf71xx; }; union cvmx_mio_emm_int_en { @@ -1169,8 +948,6 @@ union cvmx_mio_emm_int_en { uint64_t reserved_7_63:57; #endif } s; - struct cvmx_mio_emm_int_en_s cn61xx; - struct cvmx_mio_emm_int_en_s cnf71xx; }; union cvmx_mio_emm_modex { @@ -1196,8 +973,6 @@ union cvmx_mio_emm_modex { uint64_t reserved_49_63:15; #endif } s; - struct cvmx_mio_emm_modex_s cn61xx; - struct cvmx_mio_emm_modex_s cnf71xx; }; union cvmx_mio_emm_rca { @@ -1211,8 +986,6 @@ union cvmx_mio_emm_rca { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_mio_emm_rca_s cn61xx; - struct cvmx_mio_emm_rca_s cnf71xx; }; union cvmx_mio_emm_rsp_hi { @@ -1224,8 +997,6 @@ union cvmx_mio_emm_rsp_hi { uint64_t dat:64; #endif } s; - struct cvmx_mio_emm_rsp_hi_s cn61xx; - struct cvmx_mio_emm_rsp_hi_s cnf71xx; }; union cvmx_mio_emm_rsp_lo { @@ -1237,8 +1008,6 @@ union cvmx_mio_emm_rsp_lo { uint64_t dat:64; #endif } s; - struct cvmx_mio_emm_rsp_lo_s cn61xx; - struct cvmx_mio_emm_rsp_lo_s cnf71xx; }; union cvmx_mio_emm_rsp_sts { @@ -1298,8 +1067,6 @@ union cvmx_mio_emm_rsp_sts { uint64_t reserved_62_63:2; #endif } s; - struct cvmx_mio_emm_rsp_sts_s cn61xx; - struct cvmx_mio_emm_rsp_sts_s cnf71xx; }; union cvmx_mio_emm_sample { @@ -1317,8 +1084,6 @@ union cvmx_mio_emm_sample { uint64_t reserved_26_63:38; #endif } s; - struct cvmx_mio_emm_sample_s cn61xx; - struct cvmx_mio_emm_sample_s cnf71xx; }; union cvmx_mio_emm_sts_mask { @@ -1332,8 +1097,6 @@ union cvmx_mio_emm_sts_mask { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_mio_emm_sts_mask_s cn61xx; - struct cvmx_mio_emm_sts_mask_s cnf71xx; }; union cvmx_mio_emm_switch { @@ -1371,8 +1134,6 @@ union cvmx_mio_emm_switch { uint64_t reserved_62_63:2; #endif } s; - struct cvmx_mio_emm_switch_s cn61xx; - struct cvmx_mio_emm_switch_s cnf71xx; }; union cvmx_mio_emm_wdog { @@ -1386,8 +1147,6 @@ union cvmx_mio_emm_wdog { uint64_t reserved_26_63:38; #endif } s; - struct cvmx_mio_emm_wdog_s cn61xx; - struct cvmx_mio_emm_wdog_s cnf71xx; }; union cvmx_mio_fus_bnk_datx { @@ -1399,20 +1158,6 @@ union cvmx_mio_fus_bnk_datx { uint64_t dat:64; #endif } s; - struct cvmx_mio_fus_bnk_datx_s cn50xx; - struct cvmx_mio_fus_bnk_datx_s cn52xx; - struct cvmx_mio_fus_bnk_datx_s cn52xxp1; - struct cvmx_mio_fus_bnk_datx_s cn56xx; - struct cvmx_mio_fus_bnk_datx_s cn56xxp1; - struct cvmx_mio_fus_bnk_datx_s cn58xx; - struct cvmx_mio_fus_bnk_datx_s cn58xxp1; - struct cvmx_mio_fus_bnk_datx_s cn61xx; - struct cvmx_mio_fus_bnk_datx_s cn63xx; - struct cvmx_mio_fus_bnk_datx_s cn63xxp1; - struct cvmx_mio_fus_bnk_datx_s cn66xx; - struct cvmx_mio_fus_bnk_datx_s cn68xx; - struct cvmx_mio_fus_bnk_datx_s cn68xxp1; - struct cvmx_mio_fus_bnk_datx_s cnf71xx; }; union cvmx_mio_fus_dat0 { @@ -1426,24 +1171,6 @@ union cvmx_mio_fus_dat0 { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_mio_fus_dat0_s cn30xx; - struct cvmx_mio_fus_dat0_s cn31xx; - struct cvmx_mio_fus_dat0_s cn38xx; - struct cvmx_mio_fus_dat0_s cn38xxp2; - struct cvmx_mio_fus_dat0_s cn50xx; - struct cvmx_mio_fus_dat0_s cn52xx; - struct cvmx_mio_fus_dat0_s cn52xxp1; - struct cvmx_mio_fus_dat0_s cn56xx; - struct cvmx_mio_fus_dat0_s cn56xxp1; - struct cvmx_mio_fus_dat0_s cn58xx; - struct cvmx_mio_fus_dat0_s cn58xxp1; - struct cvmx_mio_fus_dat0_s cn61xx; - struct cvmx_mio_fus_dat0_s cn63xx; - struct cvmx_mio_fus_dat0_s cn63xxp1; - struct cvmx_mio_fus_dat0_s cn66xx; - struct cvmx_mio_fus_dat0_s cn68xx; - struct cvmx_mio_fus_dat0_s cn68xxp1; - struct cvmx_mio_fus_dat0_s cnf71xx; }; union cvmx_mio_fus_dat1 { @@ -1457,24 +1184,6 @@ union cvmx_mio_fus_dat1 { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_mio_fus_dat1_s cn30xx; - struct cvmx_mio_fus_dat1_s cn31xx; - struct cvmx_mio_fus_dat1_s cn38xx; - struct cvmx_mio_fus_dat1_s cn38xxp2; - struct cvmx_mio_fus_dat1_s cn50xx; - struct cvmx_mio_fus_dat1_s cn52xx; - struct cvmx_mio_fus_dat1_s cn52xxp1; - struct cvmx_mio_fus_dat1_s cn56xx; - struct cvmx_mio_fus_dat1_s cn56xxp1; - struct cvmx_mio_fus_dat1_s cn58xx; - struct cvmx_mio_fus_dat1_s cn58xxp1; - struct cvmx_mio_fus_dat1_s cn61xx; - struct cvmx_mio_fus_dat1_s cn63xx; - struct cvmx_mio_fus_dat1_s cn63xxp1; - struct cvmx_mio_fus_dat1_s cn66xx; - struct cvmx_mio_fus_dat1_s cn68xx; - struct cvmx_mio_fus_dat1_s cn68xxp1; - struct cvmx_mio_fus_dat1_s cnf71xx; }; union cvmx_mio_fus_dat2 { @@ -1591,7 +1300,6 @@ union cvmx_mio_fus_dat2 { uint64_t reserved_29_63:35; #endif } cn38xx; - struct cvmx_mio_fus_dat2_cn38xx cn38xxp2; struct cvmx_mio_fus_dat2_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_34_63:30; @@ -1654,7 +1362,6 @@ union cvmx_mio_fus_dat2 { uint64_t reserved_34_63:30; #endif } cn52xx; - struct cvmx_mio_fus_dat2_cn52xx cn52xxp1; struct cvmx_mio_fus_dat2_cn56xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_34_63:30; @@ -1686,7 +1393,6 @@ union cvmx_mio_fus_dat2 { uint64_t reserved_34_63:30; #endif } cn56xx; - struct cvmx_mio_fus_dat2_cn56xx cn56xxp1; struct cvmx_mio_fus_dat2_cn58xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_30_63:34; @@ -1710,7 +1416,6 @@ union cvmx_mio_fus_dat2 { uint64_t reserved_30_63:34; #endif } cn58xx; - struct cvmx_mio_fus_dat2_cn58xx cn58xxp1; struct cvmx_mio_fus_dat2_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_48_63:16; @@ -1775,7 +1480,6 @@ union cvmx_mio_fus_dat2 { uint64_t reserved_35_63:29; #endif } cn63xx; - struct cvmx_mio_fus_dat2_cn63xx cn63xxp1; struct cvmx_mio_fus_dat2_cn66xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_48_63:16; @@ -1840,7 +1544,6 @@ union cvmx_mio_fus_dat2 { uint64_t reserved_37_63:27; #endif } cn68xx; - struct cvmx_mio_fus_dat2_cn68xx cn68xxp1; struct cvmx_mio_fus_dat2_cn70xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_48_63:16; @@ -1874,7 +1577,6 @@ union cvmx_mio_fus_dat2 { uint64_t reserved_48_63:16; #endif } cn70xx; - struct cvmx_mio_fus_dat2_cn70xx cn70xxp1; struct cvmx_mio_fus_dat2_cn73xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_59_63:5; @@ -1986,8 +1688,6 @@ union cvmx_mio_fus_dat2 { uint64_t reserved_59_63:5; #endif } cn78xxp2; - struct cvmx_mio_fus_dat2_cn61xx cnf71xx; - struct cvmx_mio_fus_dat2_cn73xx cnf75xx; }; union cvmx_mio_fus_dat3 { @@ -2115,13 +1815,6 @@ union cvmx_mio_fus_dat3 { uint64_t reserved_29_63:35; #endif } cn38xxp2; - struct cvmx_mio_fus_dat3_cn38xx cn50xx; - struct cvmx_mio_fus_dat3_cn38xx cn52xx; - struct cvmx_mio_fus_dat3_cn38xx cn52xxp1; - struct cvmx_mio_fus_dat3_cn38xx cn56xx; - struct cvmx_mio_fus_dat3_cn38xx cn56xxp1; - struct cvmx_mio_fus_dat3_cn38xx cn58xx; - struct cvmx_mio_fus_dat3_cn38xx cn58xxp1; struct cvmx_mio_fus_dat3_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_58_63:6; @@ -2163,11 +1856,6 @@ union cvmx_mio_fus_dat3 { uint64_t reserved_58_63:6; #endif } cn61xx; - struct cvmx_mio_fus_dat3_cn61xx cn63xx; - struct cvmx_mio_fus_dat3_cn61xx cn63xxp1; - struct cvmx_mio_fus_dat3_cn61xx cn66xx; - struct cvmx_mio_fus_dat3_cn61xx cn68xx; - struct cvmx_mio_fus_dat3_cn61xx cn68xxp1; struct cvmx_mio_fus_dat3_cn70xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t ema0:6; @@ -2352,8 +2040,6 @@ union cvmx_mio_fus_dat3 { uint64_t ema0:6; #endif } cn78xx; - struct cvmx_mio_fus_dat3_cn73xx cn78xxp2; - struct cvmx_mio_fus_dat3_cn61xx cnf71xx; struct cvmx_mio_fus_dat3_cnf75xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t ema0:6; @@ -2418,11 +2104,6 @@ union cvmx_mio_fus_ema { uint64_t reserved_7_63:57; #endif } s; - struct cvmx_mio_fus_ema_s cn50xx; - struct cvmx_mio_fus_ema_s cn52xx; - struct cvmx_mio_fus_ema_s cn52xxp1; - struct cvmx_mio_fus_ema_s cn56xx; - struct cvmx_mio_fus_ema_s cn56xxp1; struct cvmx_mio_fus_ema_cn58xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_2_63:62; @@ -2432,14 +2113,6 @@ union cvmx_mio_fus_ema { uint64_t reserved_2_63:62; #endif } cn58xx; - struct cvmx_mio_fus_ema_cn58xx cn58xxp1; - struct cvmx_mio_fus_ema_s cn61xx; - struct cvmx_mio_fus_ema_s cn63xx; - struct cvmx_mio_fus_ema_s cn63xxp1; - struct cvmx_mio_fus_ema_s cn66xx; - struct cvmx_mio_fus_ema_s cn68xx; - struct cvmx_mio_fus_ema_s cn68xxp1; - struct cvmx_mio_fus_ema_s cnf71xx; }; union cvmx_mio_fus_pdf { @@ -2451,19 +2124,6 @@ union cvmx_mio_fus_pdf { uint64_t pdf:64; #endif } s; - struct cvmx_mio_fus_pdf_s cn50xx; - struct cvmx_mio_fus_pdf_s cn52xx; - struct cvmx_mio_fus_pdf_s cn52xxp1; - struct cvmx_mio_fus_pdf_s cn56xx; - struct cvmx_mio_fus_pdf_s cn56xxp1; - struct cvmx_mio_fus_pdf_s cn58xx; - struct cvmx_mio_fus_pdf_s cn61xx; - struct cvmx_mio_fus_pdf_s cn63xx; - struct cvmx_mio_fus_pdf_s cn63xxp1; - struct cvmx_mio_fus_pdf_s cn66xx; - struct cvmx_mio_fus_pdf_s cn68xx; - struct cvmx_mio_fus_pdf_s cn68xxp1; - struct cvmx_mio_fus_pdf_s cnf71xx; }; union cvmx_mio_fus_pll { @@ -2504,12 +2164,6 @@ union cvmx_mio_fus_pll { uint64_t reserved_2_63:62; #endif } cn50xx; - struct cvmx_mio_fus_pll_cn50xx cn52xx; - struct cvmx_mio_fus_pll_cn50xx cn52xxp1; - struct cvmx_mio_fus_pll_cn50xx cn56xx; - struct cvmx_mio_fus_pll_cn50xx cn56xxp1; - struct cvmx_mio_fus_pll_cn50xx cn58xx; - struct cvmx_mio_fus_pll_cn50xx cn58xxp1; struct cvmx_mio_fus_pll_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_8_63:56; @@ -2529,12 +2183,6 @@ union cvmx_mio_fus_pll { uint64_t reserved_8_63:56; #endif } cn61xx; - struct cvmx_mio_fus_pll_cn61xx cn63xx; - struct cvmx_mio_fus_pll_cn61xx cn63xxp1; - struct cvmx_mio_fus_pll_cn61xx cn66xx; - struct cvmx_mio_fus_pll_s cn68xx; - struct cvmx_mio_fus_pll_s cn68xxp1; - struct cvmx_mio_fus_pll_cn61xx cnf71xx; }; union cvmx_mio_fus_prog { @@ -2559,23 +2207,6 @@ union cvmx_mio_fus_prog { uint64_t reserved_1_63:63; #endif } cn30xx; - struct cvmx_mio_fus_prog_cn30xx cn31xx; - struct cvmx_mio_fus_prog_cn30xx cn38xx; - struct cvmx_mio_fus_prog_cn30xx cn38xxp2; - struct cvmx_mio_fus_prog_cn30xx cn50xx; - struct cvmx_mio_fus_prog_cn30xx cn52xx; - struct cvmx_mio_fus_prog_cn30xx cn52xxp1; - struct cvmx_mio_fus_prog_cn30xx cn56xx; - struct cvmx_mio_fus_prog_cn30xx cn56xxp1; - struct cvmx_mio_fus_prog_cn30xx cn58xx; - struct cvmx_mio_fus_prog_cn30xx cn58xxp1; - struct cvmx_mio_fus_prog_s cn61xx; - struct cvmx_mio_fus_prog_s cn63xx; - struct cvmx_mio_fus_prog_s cn63xxp1; - struct cvmx_mio_fus_prog_s cn66xx; - struct cvmx_mio_fus_prog_s cn68xx; - struct cvmx_mio_fus_prog_s cn68xxp1; - struct cvmx_mio_fus_prog_s cnf71xx; }; union cvmx_mio_fus_prog_times { @@ -2614,12 +2245,6 @@ union cvmx_mio_fus_prog_times { uint64_t reserved_33_63:31; #endif } cn50xx; - struct cvmx_mio_fus_prog_times_cn50xx cn52xx; - struct cvmx_mio_fus_prog_times_cn50xx cn52xxp1; - struct cvmx_mio_fus_prog_times_cn50xx cn56xx; - struct cvmx_mio_fus_prog_times_cn50xx cn56xxp1; - struct cvmx_mio_fus_prog_times_cn50xx cn58xx; - struct cvmx_mio_fus_prog_times_cn50xx cn58xxp1; struct cvmx_mio_fus_prog_times_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_35_63:29; @@ -2641,12 +2266,6 @@ union cvmx_mio_fus_prog_times { uint64_t reserved_35_63:29; #endif } cn61xx; - struct cvmx_mio_fus_prog_times_cn61xx cn63xx; - struct cvmx_mio_fus_prog_times_cn61xx cn63xxp1; - struct cvmx_mio_fus_prog_times_cn61xx cn66xx; - struct cvmx_mio_fus_prog_times_cn61xx cn68xx; - struct cvmx_mio_fus_prog_times_cn61xx cn68xxp1; - struct cvmx_mio_fus_prog_times_cn61xx cnf71xx; }; union cvmx_mio_fus_rcmd { @@ -2691,23 +2310,6 @@ union cvmx_mio_fus_rcmd { uint64_t reserved_24_63:40; #endif } cn30xx; - struct cvmx_mio_fus_rcmd_cn30xx cn31xx; - struct cvmx_mio_fus_rcmd_cn30xx cn38xx; - struct cvmx_mio_fus_rcmd_cn30xx cn38xxp2; - struct cvmx_mio_fus_rcmd_cn30xx cn50xx; - struct cvmx_mio_fus_rcmd_s cn52xx; - struct cvmx_mio_fus_rcmd_s cn52xxp1; - struct cvmx_mio_fus_rcmd_s cn56xx; - struct cvmx_mio_fus_rcmd_s cn56xxp1; - struct cvmx_mio_fus_rcmd_cn30xx cn58xx; - struct cvmx_mio_fus_rcmd_cn30xx cn58xxp1; - struct cvmx_mio_fus_rcmd_s cn61xx; - struct cvmx_mio_fus_rcmd_s cn63xx; - struct cvmx_mio_fus_rcmd_s cn63xxp1; - struct cvmx_mio_fus_rcmd_s cn66xx; - struct cvmx_mio_fus_rcmd_s cn68xx; - struct cvmx_mio_fus_rcmd_s cn68xxp1; - struct cvmx_mio_fus_rcmd_s cnf71xx; }; union cvmx_mio_fus_read_times { @@ -2729,13 +2331,6 @@ union cvmx_mio_fus_read_times { uint64_t reserved_26_63:38; #endif } s; - struct cvmx_mio_fus_read_times_s cn61xx; - struct cvmx_mio_fus_read_times_s cn63xx; - struct cvmx_mio_fus_read_times_s cn63xxp1; - struct cvmx_mio_fus_read_times_s cn66xx; - struct cvmx_mio_fus_read_times_s cn68xx; - struct cvmx_mio_fus_read_times_s cn68xxp1; - struct cvmx_mio_fus_read_times_s cnf71xx; }; union cvmx_mio_fus_repair_res0 { @@ -2755,13 +2350,6 @@ union cvmx_mio_fus_repair_res0 { uint64_t reserved_55_63:9; #endif } s; - struct cvmx_mio_fus_repair_res0_s cn61xx; - struct cvmx_mio_fus_repair_res0_s cn63xx; - struct cvmx_mio_fus_repair_res0_s cn63xxp1; - struct cvmx_mio_fus_repair_res0_s cn66xx; - struct cvmx_mio_fus_repair_res0_s cn68xx; - struct cvmx_mio_fus_repair_res0_s cn68xxp1; - struct cvmx_mio_fus_repair_res0_s cnf71xx; }; union cvmx_mio_fus_repair_res1 { @@ -2779,13 +2367,6 @@ union cvmx_mio_fus_repair_res1 { uint64_t reserved_54_63:10; #endif } s; - struct cvmx_mio_fus_repair_res1_s cn61xx; - struct cvmx_mio_fus_repair_res1_s cn63xx; - struct cvmx_mio_fus_repair_res1_s cn63xxp1; - struct cvmx_mio_fus_repair_res1_s cn66xx; - struct cvmx_mio_fus_repair_res1_s cn68xx; - struct cvmx_mio_fus_repair_res1_s cn68xxp1; - struct cvmx_mio_fus_repair_res1_s cnf71xx; }; union cvmx_mio_fus_repair_res2 { @@ -2799,13 +2380,6 @@ union cvmx_mio_fus_repair_res2 { uint64_t reserved_18_63:46; #endif } s; - struct cvmx_mio_fus_repair_res2_s cn61xx; - struct cvmx_mio_fus_repair_res2_s cn63xx; - struct cvmx_mio_fus_repair_res2_s cn63xxp1; - struct cvmx_mio_fus_repair_res2_s cn66xx; - struct cvmx_mio_fus_repair_res2_s cn68xx; - struct cvmx_mio_fus_repair_res2_s cn68xxp1; - struct cvmx_mio_fus_repair_res2_s cnf71xx; }; union cvmx_mio_fus_spr_repair_res { @@ -2823,23 +2397,6 @@ union cvmx_mio_fus_spr_repair_res { uint64_t reserved_42_63:22; #endif } s; - struct cvmx_mio_fus_spr_repair_res_s cn30xx; - struct cvmx_mio_fus_spr_repair_res_s cn31xx; - struct cvmx_mio_fus_spr_repair_res_s cn38xx; - struct cvmx_mio_fus_spr_repair_res_s cn50xx; - struct cvmx_mio_fus_spr_repair_res_s cn52xx; - struct cvmx_mio_fus_spr_repair_res_s cn52xxp1; - struct cvmx_mio_fus_spr_repair_res_s cn56xx; - struct cvmx_mio_fus_spr_repair_res_s cn56xxp1; - struct cvmx_mio_fus_spr_repair_res_s cn58xx; - struct cvmx_mio_fus_spr_repair_res_s cn58xxp1; - struct cvmx_mio_fus_spr_repair_res_s cn61xx; - struct cvmx_mio_fus_spr_repair_res_s cn63xx; - struct cvmx_mio_fus_spr_repair_res_s cn63xxp1; - struct cvmx_mio_fus_spr_repair_res_s cn66xx; - struct cvmx_mio_fus_spr_repair_res_s cn68xx; - struct cvmx_mio_fus_spr_repair_res_s cn68xxp1; - struct cvmx_mio_fus_spr_repair_res_s cnf71xx; }; union cvmx_mio_fus_spr_repair_sum { @@ -2853,23 +2410,6 @@ union cvmx_mio_fus_spr_repair_sum { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_mio_fus_spr_repair_sum_s cn30xx; - struct cvmx_mio_fus_spr_repair_sum_s cn31xx; - struct cvmx_mio_fus_spr_repair_sum_s cn38xx; - struct cvmx_mio_fus_spr_repair_sum_s cn50xx; - struct cvmx_mio_fus_spr_repair_sum_s cn52xx; - struct cvmx_mio_fus_spr_repair_sum_s cn52xxp1; - struct cvmx_mio_fus_spr_repair_sum_s cn56xx; - struct cvmx_mio_fus_spr_repair_sum_s cn56xxp1; - struct cvmx_mio_fus_spr_repair_sum_s cn58xx; - struct cvmx_mio_fus_spr_repair_sum_s cn58xxp1; - struct cvmx_mio_fus_spr_repair_sum_s cn61xx; - struct cvmx_mio_fus_spr_repair_sum_s cn63xx; - struct cvmx_mio_fus_spr_repair_sum_s cn63xxp1; - struct cvmx_mio_fus_spr_repair_sum_s cn66xx; - struct cvmx_mio_fus_spr_repair_sum_s cn68xx; - struct cvmx_mio_fus_spr_repair_sum_s cn68xxp1; - struct cvmx_mio_fus_spr_repair_sum_s cnf71xx; }; union cvmx_mio_fus_tgg { @@ -2883,9 +2423,6 @@ union cvmx_mio_fus_tgg { uint64_t val:1; #endif } s; - struct cvmx_mio_fus_tgg_s cn61xx; - struct cvmx_mio_fus_tgg_s cn66xx; - struct cvmx_mio_fus_tgg_s cnf71xx; }; union cvmx_mio_fus_unlock { @@ -2899,8 +2436,6 @@ union cvmx_mio_fus_unlock { uint64_t reserved_24_63:40; #endif } s; - struct cvmx_mio_fus_unlock_s cn30xx; - struct cvmx_mio_fus_unlock_s cn31xx; }; union cvmx_mio_fus_wadr { @@ -2914,10 +2449,6 @@ union cvmx_mio_fus_wadr { uint64_t reserved_10_63:54; #endif } s; - struct cvmx_mio_fus_wadr_s cn30xx; - struct cvmx_mio_fus_wadr_s cn31xx; - struct cvmx_mio_fus_wadr_s cn38xx; - struct cvmx_mio_fus_wadr_s cn38xxp2; struct cvmx_mio_fus_wadr_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_2_63:62; @@ -2936,11 +2467,6 @@ union cvmx_mio_fus_wadr { uint64_t reserved_3_63:61; #endif } cn52xx; - struct cvmx_mio_fus_wadr_cn52xx cn52xxp1; - struct cvmx_mio_fus_wadr_cn52xx cn56xx; - struct cvmx_mio_fus_wadr_cn52xx cn56xxp1; - struct cvmx_mio_fus_wadr_cn50xx cn58xx; - struct cvmx_mio_fus_wadr_cn50xx cn58xxp1; struct cvmx_mio_fus_wadr_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_4_63:60; @@ -2950,12 +2476,6 @@ union cvmx_mio_fus_wadr { uint64_t reserved_4_63:60; #endif } cn61xx; - struct cvmx_mio_fus_wadr_cn61xx cn63xx; - struct cvmx_mio_fus_wadr_cn61xx cn63xxp1; - struct cvmx_mio_fus_wadr_cn61xx cn66xx; - struct cvmx_mio_fus_wadr_cn61xx cn68xx; - struct cvmx_mio_fus_wadr_cn61xx cn68xxp1; - struct cvmx_mio_fus_wadr_cn61xx cnf71xx; }; union cvmx_mio_gpio_comp { @@ -2971,13 +2491,6 @@ union cvmx_mio_gpio_comp { uint64_t reserved_12_63:52; #endif } s; - struct cvmx_mio_gpio_comp_s cn61xx; - struct cvmx_mio_gpio_comp_s cn63xx; - struct cvmx_mio_gpio_comp_s cn63xxp1; - struct cvmx_mio_gpio_comp_s cn66xx; - struct cvmx_mio_gpio_comp_s cn68xx; - struct cvmx_mio_gpio_comp_s cn68xxp1; - struct cvmx_mio_gpio_comp_s cnf71xx; }; union cvmx_mio_ndf_dma_cfg { @@ -3007,14 +2520,6 @@ union cvmx_mio_ndf_dma_cfg { uint64_t en:1; #endif } s; - struct cvmx_mio_ndf_dma_cfg_s cn52xx; - struct cvmx_mio_ndf_dma_cfg_s cn61xx; - struct cvmx_mio_ndf_dma_cfg_s cn63xx; - struct cvmx_mio_ndf_dma_cfg_s cn63xxp1; - struct cvmx_mio_ndf_dma_cfg_s cn66xx; - struct cvmx_mio_ndf_dma_cfg_s cn68xx; - struct cvmx_mio_ndf_dma_cfg_s cn68xxp1; - struct cvmx_mio_ndf_dma_cfg_s cnf71xx; }; union cvmx_mio_ndf_dma_int { @@ -3028,14 +2533,6 @@ union cvmx_mio_ndf_dma_int { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_mio_ndf_dma_int_s cn52xx; - struct cvmx_mio_ndf_dma_int_s cn61xx; - struct cvmx_mio_ndf_dma_int_s cn63xx; - struct cvmx_mio_ndf_dma_int_s cn63xxp1; - struct cvmx_mio_ndf_dma_int_s cn66xx; - struct cvmx_mio_ndf_dma_int_s cn68xx; - struct cvmx_mio_ndf_dma_int_s cn68xxp1; - struct cvmx_mio_ndf_dma_int_s cnf71xx; }; union cvmx_mio_ndf_dma_int_en { @@ -3049,14 +2546,6 @@ union cvmx_mio_ndf_dma_int_en { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_mio_ndf_dma_int_en_s cn52xx; - struct cvmx_mio_ndf_dma_int_en_s cn61xx; - struct cvmx_mio_ndf_dma_int_en_s cn63xx; - struct cvmx_mio_ndf_dma_int_en_s cn63xxp1; - struct cvmx_mio_ndf_dma_int_en_s cn66xx; - struct cvmx_mio_ndf_dma_int_en_s cn68xx; - struct cvmx_mio_ndf_dma_int_en_s cn68xxp1; - struct cvmx_mio_ndf_dma_int_en_s cnf71xx; }; union cvmx_mio_pll_ctl { @@ -3070,8 +2559,6 @@ union cvmx_mio_pll_ctl { uint64_t reserved_5_63:59; #endif } s; - struct cvmx_mio_pll_ctl_s cn30xx; - struct cvmx_mio_pll_ctl_s cn31xx; }; union cvmx_mio_pll_setting { @@ -3085,8 +2572,6 @@ union cvmx_mio_pll_setting { uint64_t reserved_17_63:47; #endif } s; - struct cvmx_mio_pll_setting_s cn30xx; - struct cvmx_mio_pll_setting_s cn31xx; }; union cvmx_mio_ptp_ckout_hi_incr { @@ -3100,10 +2585,6 @@ union cvmx_mio_ptp_ckout_hi_incr { uint64_t nanosec:32; #endif } s; - struct cvmx_mio_ptp_ckout_hi_incr_s cn61xx; - struct cvmx_mio_ptp_ckout_hi_incr_s cn66xx; - struct cvmx_mio_ptp_ckout_hi_incr_s cn68xx; - struct cvmx_mio_ptp_ckout_hi_incr_s cnf71xx; }; union cvmx_mio_ptp_ckout_lo_incr { @@ -3117,10 +2598,6 @@ union cvmx_mio_ptp_ckout_lo_incr { uint64_t nanosec:32; #endif } s; - struct cvmx_mio_ptp_ckout_lo_incr_s cn61xx; - struct cvmx_mio_ptp_ckout_lo_incr_s cn66xx; - struct cvmx_mio_ptp_ckout_lo_incr_s cn68xx; - struct cvmx_mio_ptp_ckout_lo_incr_s cnf71xx; }; union cvmx_mio_ptp_ckout_thresh_hi { @@ -3132,10 +2609,6 @@ union cvmx_mio_ptp_ckout_thresh_hi { uint64_t nanosec:64; #endif } s; - struct cvmx_mio_ptp_ckout_thresh_hi_s cn61xx; - struct cvmx_mio_ptp_ckout_thresh_hi_s cn66xx; - struct cvmx_mio_ptp_ckout_thresh_hi_s cn68xx; - struct cvmx_mio_ptp_ckout_thresh_hi_s cnf71xx; }; union cvmx_mio_ptp_ckout_thresh_lo { @@ -3149,10 +2622,6 @@ union cvmx_mio_ptp_ckout_thresh_lo { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_mio_ptp_ckout_thresh_lo_s cn61xx; - struct cvmx_mio_ptp_ckout_thresh_lo_s cn66xx; - struct cvmx_mio_ptp_ckout_thresh_lo_s cn68xx; - struct cvmx_mio_ptp_ckout_thresh_lo_s cnf71xx; }; union cvmx_mio_ptp_clock_cfg { @@ -3202,7 +2671,6 @@ union cvmx_mio_ptp_clock_cfg { uint64_t reserved_42_63:22; #endif } s; - struct cvmx_mio_ptp_clock_cfg_s cn61xx; struct cvmx_mio_ptp_clock_cfg_cn63xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_24_63:40; @@ -3228,7 +2696,6 @@ union cvmx_mio_ptp_clock_cfg { uint64_t reserved_24_63:40; #endif } cn63xx; - struct cvmx_mio_ptp_clock_cfg_cn63xx cn63xxp1; struct cvmx_mio_ptp_clock_cfg_cn66xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_40_63:24; @@ -3270,9 +2737,6 @@ union cvmx_mio_ptp_clock_cfg { uint64_t reserved_40_63:24; #endif } cn66xx; - struct cvmx_mio_ptp_clock_cfg_s cn68xx; - struct cvmx_mio_ptp_clock_cfg_cn63xx cn68xxp1; - struct cvmx_mio_ptp_clock_cfg_s cnf71xx; }; union cvmx_mio_ptp_clock_comp { @@ -3286,13 +2750,6 @@ union cvmx_mio_ptp_clock_comp { uint64_t nanosec:32; #endif } s; - struct cvmx_mio_ptp_clock_comp_s cn61xx; - struct cvmx_mio_ptp_clock_comp_s cn63xx; - struct cvmx_mio_ptp_clock_comp_s cn63xxp1; - struct cvmx_mio_ptp_clock_comp_s cn66xx; - struct cvmx_mio_ptp_clock_comp_s cn68xx; - struct cvmx_mio_ptp_clock_comp_s cn68xxp1; - struct cvmx_mio_ptp_clock_comp_s cnf71xx; }; union cvmx_mio_ptp_clock_hi { @@ -3304,13 +2761,6 @@ union cvmx_mio_ptp_clock_hi { uint64_t nanosec:64; #endif } s; - struct cvmx_mio_ptp_clock_hi_s cn61xx; - struct cvmx_mio_ptp_clock_hi_s cn63xx; - struct cvmx_mio_ptp_clock_hi_s cn63xxp1; - struct cvmx_mio_ptp_clock_hi_s cn66xx; - struct cvmx_mio_ptp_clock_hi_s cn68xx; - struct cvmx_mio_ptp_clock_hi_s cn68xxp1; - struct cvmx_mio_ptp_clock_hi_s cnf71xx; }; union cvmx_mio_ptp_clock_lo { @@ -3324,13 +2774,6 @@ union cvmx_mio_ptp_clock_lo { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_mio_ptp_clock_lo_s cn61xx; - struct cvmx_mio_ptp_clock_lo_s cn63xx; - struct cvmx_mio_ptp_clock_lo_s cn63xxp1; - struct cvmx_mio_ptp_clock_lo_s cn66xx; - struct cvmx_mio_ptp_clock_lo_s cn68xx; - struct cvmx_mio_ptp_clock_lo_s cn68xxp1; - struct cvmx_mio_ptp_clock_lo_s cnf71xx; }; union cvmx_mio_ptp_evt_cnt { @@ -3342,13 +2785,6 @@ union cvmx_mio_ptp_evt_cnt { uint64_t cntr:64; #endif } s; - struct cvmx_mio_ptp_evt_cnt_s cn61xx; - struct cvmx_mio_ptp_evt_cnt_s cn63xx; - struct cvmx_mio_ptp_evt_cnt_s cn63xxp1; - struct cvmx_mio_ptp_evt_cnt_s cn66xx; - struct cvmx_mio_ptp_evt_cnt_s cn68xx; - struct cvmx_mio_ptp_evt_cnt_s cn68xxp1; - struct cvmx_mio_ptp_evt_cnt_s cnf71xx; }; union cvmx_mio_ptp_phy_1pps_in { @@ -3362,7 +2798,6 @@ union cvmx_mio_ptp_phy_1pps_in { uint64_t reserved_5_63:59; #endif } s; - struct cvmx_mio_ptp_phy_1pps_in_s cnf71xx; }; union cvmx_mio_ptp_pps_hi_incr { @@ -3376,10 +2811,6 @@ union cvmx_mio_ptp_pps_hi_incr { uint64_t nanosec:32; #endif } s; - struct cvmx_mio_ptp_pps_hi_incr_s cn61xx; - struct cvmx_mio_ptp_pps_hi_incr_s cn66xx; - struct cvmx_mio_ptp_pps_hi_incr_s cn68xx; - struct cvmx_mio_ptp_pps_hi_incr_s cnf71xx; }; union cvmx_mio_ptp_pps_lo_incr { @@ -3393,10 +2824,6 @@ union cvmx_mio_ptp_pps_lo_incr { uint64_t nanosec:32; #endif } s; - struct cvmx_mio_ptp_pps_lo_incr_s cn61xx; - struct cvmx_mio_ptp_pps_lo_incr_s cn66xx; - struct cvmx_mio_ptp_pps_lo_incr_s cn68xx; - struct cvmx_mio_ptp_pps_lo_incr_s cnf71xx; }; union cvmx_mio_ptp_pps_thresh_hi { @@ -3408,10 +2835,6 @@ union cvmx_mio_ptp_pps_thresh_hi { uint64_t nanosec:64; #endif } s; - struct cvmx_mio_ptp_pps_thresh_hi_s cn61xx; - struct cvmx_mio_ptp_pps_thresh_hi_s cn66xx; - struct cvmx_mio_ptp_pps_thresh_hi_s cn68xx; - struct cvmx_mio_ptp_pps_thresh_hi_s cnf71xx; }; union cvmx_mio_ptp_pps_thresh_lo { @@ -3425,10 +2848,6 @@ union cvmx_mio_ptp_pps_thresh_lo { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_mio_ptp_pps_thresh_lo_s cn61xx; - struct cvmx_mio_ptp_pps_thresh_lo_s cn66xx; - struct cvmx_mio_ptp_pps_thresh_lo_s cn68xx; - struct cvmx_mio_ptp_pps_thresh_lo_s cnf71xx; }; union cvmx_mio_ptp_timestamp { @@ -3440,13 +2859,6 @@ union cvmx_mio_ptp_timestamp { uint64_t nanosec:64; #endif } s; - struct cvmx_mio_ptp_timestamp_s cn61xx; - struct cvmx_mio_ptp_timestamp_s cn63xx; - struct cvmx_mio_ptp_timestamp_s cn63xxp1; - struct cvmx_mio_ptp_timestamp_s cn66xx; - struct cvmx_mio_ptp_timestamp_s cn68xx; - struct cvmx_mio_ptp_timestamp_s cn68xxp1; - struct cvmx_mio_ptp_timestamp_s cnf71xx; }; union cvmx_mio_qlmx_cfg { @@ -3511,8 +2923,6 @@ union cvmx_mio_qlmx_cfg { uint64_t reserved_12_63:52; #endif } cn68xx; - struct cvmx_mio_qlmx_cfg_cn68xx cn68xxp1; - struct cvmx_mio_qlmx_cfg_cn61xx cnf71xx; }; union cvmx_mio_rst_boot { @@ -3622,7 +3032,6 @@ union cvmx_mio_rst_boot { uint64_t reserved_36_63:28; #endif } cn63xx; - struct cvmx_mio_rst_boot_cn63xx cn63xxp1; struct cvmx_mio_rst_boot_cn66xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t chipkill:1; @@ -3718,7 +3127,6 @@ union cvmx_mio_rst_boot { uint64_t reserved_44_63:20; #endif } cn68xxp1; - struct cvmx_mio_rst_boot_cn61xx cnf71xx; }; union cvmx_mio_rst_cfg { @@ -3751,7 +3159,6 @@ union cvmx_mio_rst_cfg { uint64_t bist_delay:58; #endif } cn61xx; - struct cvmx_mio_rst_cfg_cn61xx cn63xx; struct cvmx_mio_rst_cfg_cn63xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t bist_delay:58; @@ -3765,7 +3172,6 @@ union cvmx_mio_rst_cfg { uint64_t bist_delay:58; #endif } cn63xxp1; - struct cvmx_mio_rst_cfg_cn61xx cn66xx; struct cvmx_mio_rst_cfg_cn68xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t bist_delay:56; @@ -3781,8 +3187,6 @@ union cvmx_mio_rst_cfg { uint64_t bist_delay:56; #endif } cn68xx; - struct cvmx_mio_rst_cfg_cn68xx cn68xxp1; - struct cvmx_mio_rst_cfg_cn61xx cnf71xx; }; union cvmx_mio_rst_ckill { @@ -3796,9 +3200,6 @@ union cvmx_mio_rst_ckill { uint64_t reserved_47_63:17; #endif } s; - struct cvmx_mio_rst_ckill_s cn61xx; - struct cvmx_mio_rst_ckill_s cn66xx; - struct cvmx_mio_rst_ckill_s cnf71xx; }; union cvmx_mio_rst_cntlx { @@ -3834,7 +3235,6 @@ union cvmx_mio_rst_cntlx { uint64_t reserved_13_63:51; #endif } s; - struct cvmx_mio_rst_cntlx_s cn61xx; struct cvmx_mio_rst_cntlx_cn66xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_10_63:54; @@ -3860,8 +3260,6 @@ union cvmx_mio_rst_cntlx { uint64_t reserved_10_63:54; #endif } cn66xx; - struct cvmx_mio_rst_cntlx_cn66xx cn68xx; - struct cvmx_mio_rst_cntlx_s cnf71xx; }; union cvmx_mio_rst_ctlx { @@ -3897,7 +3295,6 @@ union cvmx_mio_rst_ctlx { uint64_t reserved_13_63:51; #endif } s; - struct cvmx_mio_rst_ctlx_s cn61xx; struct cvmx_mio_rst_ctlx_cn63xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_10_63:54; @@ -3946,10 +3343,6 @@ union cvmx_mio_rst_ctlx { uint64_t reserved_9_63:55; #endif } cn63xxp1; - struct cvmx_mio_rst_ctlx_cn63xx cn66xx; - struct cvmx_mio_rst_ctlx_cn63xx cn68xx; - struct cvmx_mio_rst_ctlx_cn63xx cn68xxp1; - struct cvmx_mio_rst_ctlx_s cnf71xx; }; union cvmx_mio_rst_delay { @@ -3965,13 +3358,6 @@ union cvmx_mio_rst_delay { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_mio_rst_delay_s cn61xx; - struct cvmx_mio_rst_delay_s cn63xx; - struct cvmx_mio_rst_delay_s cn63xxp1; - struct cvmx_mio_rst_delay_s cn66xx; - struct cvmx_mio_rst_delay_s cn68xx; - struct cvmx_mio_rst_delay_s cn68xxp1; - struct cvmx_mio_rst_delay_s cnf71xx; }; union cvmx_mio_rst_int { @@ -4014,12 +3400,6 @@ union cvmx_mio_rst_int { uint64_t reserved_10_63:54; #endif } cn61xx; - struct cvmx_mio_rst_int_cn61xx cn63xx; - struct cvmx_mio_rst_int_cn61xx cn63xxp1; - struct cvmx_mio_rst_int_s cn66xx; - struct cvmx_mio_rst_int_cn61xx cn68xx; - struct cvmx_mio_rst_int_cn61xx cn68xxp1; - struct cvmx_mio_rst_int_cn61xx cnf71xx; }; union cvmx_mio_rst_int_en { @@ -4062,12 +3442,6 @@ union cvmx_mio_rst_int_en { uint64_t reserved_10_63:54; #endif } cn61xx; - struct cvmx_mio_rst_int_en_cn61xx cn63xx; - struct cvmx_mio_rst_int_en_cn61xx cn63xxp1; - struct cvmx_mio_rst_int_en_s cn66xx; - struct cvmx_mio_rst_int_en_cn61xx cn68xx; - struct cvmx_mio_rst_int_en_cn61xx cn68xxp1; - struct cvmx_mio_rst_int_en_cn61xx cnf71xx; }; union cvmx_mio_twsx_int { @@ -4103,9 +3477,6 @@ union cvmx_mio_twsx_int { uint64_t reserved_12_63:52; #endif } s; - struct cvmx_mio_twsx_int_s cn30xx; - struct cvmx_mio_twsx_int_s cn31xx; - struct cvmx_mio_twsx_int_s cn38xx; struct cvmx_mio_twsx_int_cn38xxp2 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_7_63:57; @@ -4127,20 +3498,6 @@ union cvmx_mio_twsx_int { uint64_t reserved_7_63:57; #endif } cn38xxp2; - struct cvmx_mio_twsx_int_s cn50xx; - struct cvmx_mio_twsx_int_s cn52xx; - struct cvmx_mio_twsx_int_s cn52xxp1; - struct cvmx_mio_twsx_int_s cn56xx; - struct cvmx_mio_twsx_int_s cn56xxp1; - struct cvmx_mio_twsx_int_s cn58xx; - struct cvmx_mio_twsx_int_s cn58xxp1; - struct cvmx_mio_twsx_int_s cn61xx; - struct cvmx_mio_twsx_int_s cn63xx; - struct cvmx_mio_twsx_int_s cn63xxp1; - struct cvmx_mio_twsx_int_s cn66xx; - struct cvmx_mio_twsx_int_s cn68xx; - struct cvmx_mio_twsx_int_s cn68xxp1; - struct cvmx_mio_twsx_int_s cnf71xx; }; union cvmx_mio_twsx_sw_twsi { @@ -4174,24 +3531,6 @@ union cvmx_mio_twsx_sw_twsi { uint64_t v:1; #endif } s; - struct cvmx_mio_twsx_sw_twsi_s cn30xx; - struct cvmx_mio_twsx_sw_twsi_s cn31xx; - struct cvmx_mio_twsx_sw_twsi_s cn38xx; - struct cvmx_mio_twsx_sw_twsi_s cn38xxp2; - struct cvmx_mio_twsx_sw_twsi_s cn50xx; - struct cvmx_mio_twsx_sw_twsi_s cn52xx; - struct cvmx_mio_twsx_sw_twsi_s cn52xxp1; - struct cvmx_mio_twsx_sw_twsi_s cn56xx; - struct cvmx_mio_twsx_sw_twsi_s cn56xxp1; - struct cvmx_mio_twsx_sw_twsi_s cn58xx; - struct cvmx_mio_twsx_sw_twsi_s cn58xxp1; - struct cvmx_mio_twsx_sw_twsi_s cn61xx; - struct cvmx_mio_twsx_sw_twsi_s cn63xx; - struct cvmx_mio_twsx_sw_twsi_s cn63xxp1; - struct cvmx_mio_twsx_sw_twsi_s cn66xx; - struct cvmx_mio_twsx_sw_twsi_s cn68xx; - struct cvmx_mio_twsx_sw_twsi_s cn68xxp1; - struct cvmx_mio_twsx_sw_twsi_s cnf71xx; }; union cvmx_mio_twsx_sw_twsi_ext { @@ -4207,24 +3546,6 @@ union cvmx_mio_twsx_sw_twsi_ext { uint64_t reserved_40_63:24; #endif } s; - struct cvmx_mio_twsx_sw_twsi_ext_s cn30xx; - struct cvmx_mio_twsx_sw_twsi_ext_s cn31xx; - struct cvmx_mio_twsx_sw_twsi_ext_s cn38xx; - struct cvmx_mio_twsx_sw_twsi_ext_s cn38xxp2; - struct cvmx_mio_twsx_sw_twsi_ext_s cn50xx; - struct cvmx_mio_twsx_sw_twsi_ext_s cn52xx; - struct cvmx_mio_twsx_sw_twsi_ext_s cn52xxp1; - struct cvmx_mio_twsx_sw_twsi_ext_s cn56xx; - struct cvmx_mio_twsx_sw_twsi_ext_s cn56xxp1; - struct cvmx_mio_twsx_sw_twsi_ext_s cn58xx; - struct cvmx_mio_twsx_sw_twsi_ext_s cn58xxp1; - struct cvmx_mio_twsx_sw_twsi_ext_s cn61xx; - struct cvmx_mio_twsx_sw_twsi_ext_s cn63xx; - struct cvmx_mio_twsx_sw_twsi_ext_s cn63xxp1; - struct cvmx_mio_twsx_sw_twsi_ext_s cn66xx; - struct cvmx_mio_twsx_sw_twsi_ext_s cn68xx; - struct cvmx_mio_twsx_sw_twsi_ext_s cn68xxp1; - struct cvmx_mio_twsx_sw_twsi_ext_s cnf71xx; }; union cvmx_mio_twsx_twsi_sw { @@ -4240,24 +3561,6 @@ union cvmx_mio_twsx_twsi_sw { uint64_t v:2; #endif } s; - struct cvmx_mio_twsx_twsi_sw_s cn30xx; - struct cvmx_mio_twsx_twsi_sw_s cn31xx; - struct cvmx_mio_twsx_twsi_sw_s cn38xx; - struct cvmx_mio_twsx_twsi_sw_s cn38xxp2; - struct cvmx_mio_twsx_twsi_sw_s cn50xx; - struct cvmx_mio_twsx_twsi_sw_s cn52xx; - struct cvmx_mio_twsx_twsi_sw_s cn52xxp1; - struct cvmx_mio_twsx_twsi_sw_s cn56xx; - struct cvmx_mio_twsx_twsi_sw_s cn56xxp1; - struct cvmx_mio_twsx_twsi_sw_s cn58xx; - struct cvmx_mio_twsx_twsi_sw_s cn58xxp1; - struct cvmx_mio_twsx_twsi_sw_s cn61xx; - struct cvmx_mio_twsx_twsi_sw_s cn63xx; - struct cvmx_mio_twsx_twsi_sw_s cn63xxp1; - struct cvmx_mio_twsx_twsi_sw_s cn66xx; - struct cvmx_mio_twsx_twsi_sw_s cn68xx; - struct cvmx_mio_twsx_twsi_sw_s cn68xxp1; - struct cvmx_mio_twsx_twsi_sw_s cnf71xx; }; union cvmx_mio_uartx_dlh { @@ -4271,24 +3574,6 @@ union cvmx_mio_uartx_dlh { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_uartx_dlh_s cn30xx; - struct cvmx_mio_uartx_dlh_s cn31xx; - struct cvmx_mio_uartx_dlh_s cn38xx; - struct cvmx_mio_uartx_dlh_s cn38xxp2; - struct cvmx_mio_uartx_dlh_s cn50xx; - struct cvmx_mio_uartx_dlh_s cn52xx; - struct cvmx_mio_uartx_dlh_s cn52xxp1; - struct cvmx_mio_uartx_dlh_s cn56xx; - struct cvmx_mio_uartx_dlh_s cn56xxp1; - struct cvmx_mio_uartx_dlh_s cn58xx; - struct cvmx_mio_uartx_dlh_s cn58xxp1; - struct cvmx_mio_uartx_dlh_s cn61xx; - struct cvmx_mio_uartx_dlh_s cn63xx; - struct cvmx_mio_uartx_dlh_s cn63xxp1; - struct cvmx_mio_uartx_dlh_s cn66xx; - struct cvmx_mio_uartx_dlh_s cn68xx; - struct cvmx_mio_uartx_dlh_s cn68xxp1; - struct cvmx_mio_uartx_dlh_s cnf71xx; }; union cvmx_mio_uartx_dll { @@ -4302,24 +3587,6 @@ union cvmx_mio_uartx_dll { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_uartx_dll_s cn30xx; - struct cvmx_mio_uartx_dll_s cn31xx; - struct cvmx_mio_uartx_dll_s cn38xx; - struct cvmx_mio_uartx_dll_s cn38xxp2; - struct cvmx_mio_uartx_dll_s cn50xx; - struct cvmx_mio_uartx_dll_s cn52xx; - struct cvmx_mio_uartx_dll_s cn52xxp1; - struct cvmx_mio_uartx_dll_s cn56xx; - struct cvmx_mio_uartx_dll_s cn56xxp1; - struct cvmx_mio_uartx_dll_s cn58xx; - struct cvmx_mio_uartx_dll_s cn58xxp1; - struct cvmx_mio_uartx_dll_s cn61xx; - struct cvmx_mio_uartx_dll_s cn63xx; - struct cvmx_mio_uartx_dll_s cn63xxp1; - struct cvmx_mio_uartx_dll_s cn66xx; - struct cvmx_mio_uartx_dll_s cn68xx; - struct cvmx_mio_uartx_dll_s cn68xxp1; - struct cvmx_mio_uartx_dll_s cnf71xx; }; union cvmx_mio_uartx_far { @@ -4333,24 +3600,6 @@ union cvmx_mio_uartx_far { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_mio_uartx_far_s cn30xx; - struct cvmx_mio_uartx_far_s cn31xx; - struct cvmx_mio_uartx_far_s cn38xx; - struct cvmx_mio_uartx_far_s cn38xxp2; - struct cvmx_mio_uartx_far_s cn50xx; - struct cvmx_mio_uartx_far_s cn52xx; - struct cvmx_mio_uartx_far_s cn52xxp1; - struct cvmx_mio_uartx_far_s cn56xx; - struct cvmx_mio_uartx_far_s cn56xxp1; - struct cvmx_mio_uartx_far_s cn58xx; - struct cvmx_mio_uartx_far_s cn58xxp1; - struct cvmx_mio_uartx_far_s cn61xx; - struct cvmx_mio_uartx_far_s cn63xx; - struct cvmx_mio_uartx_far_s cn63xxp1; - struct cvmx_mio_uartx_far_s cn66xx; - struct cvmx_mio_uartx_far_s cn68xx; - struct cvmx_mio_uartx_far_s cn68xxp1; - struct cvmx_mio_uartx_far_s cnf71xx; }; union cvmx_mio_uartx_fcr { @@ -4374,24 +3623,6 @@ union cvmx_mio_uartx_fcr { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_uartx_fcr_s cn30xx; - struct cvmx_mio_uartx_fcr_s cn31xx; - struct cvmx_mio_uartx_fcr_s cn38xx; - struct cvmx_mio_uartx_fcr_s cn38xxp2; - struct cvmx_mio_uartx_fcr_s cn50xx; - struct cvmx_mio_uartx_fcr_s cn52xx; - struct cvmx_mio_uartx_fcr_s cn52xxp1; - struct cvmx_mio_uartx_fcr_s cn56xx; - struct cvmx_mio_uartx_fcr_s cn56xxp1; - struct cvmx_mio_uartx_fcr_s cn58xx; - struct cvmx_mio_uartx_fcr_s cn58xxp1; - struct cvmx_mio_uartx_fcr_s cn61xx; - struct cvmx_mio_uartx_fcr_s cn63xx; - struct cvmx_mio_uartx_fcr_s cn63xxp1; - struct cvmx_mio_uartx_fcr_s cn66xx; - struct cvmx_mio_uartx_fcr_s cn68xx; - struct cvmx_mio_uartx_fcr_s cn68xxp1; - struct cvmx_mio_uartx_fcr_s cnf71xx; }; union cvmx_mio_uartx_htx { @@ -4405,24 +3636,6 @@ union cvmx_mio_uartx_htx { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_mio_uartx_htx_s cn30xx; - struct cvmx_mio_uartx_htx_s cn31xx; - struct cvmx_mio_uartx_htx_s cn38xx; - struct cvmx_mio_uartx_htx_s cn38xxp2; - struct cvmx_mio_uartx_htx_s cn50xx; - struct cvmx_mio_uartx_htx_s cn52xx; - struct cvmx_mio_uartx_htx_s cn52xxp1; - struct cvmx_mio_uartx_htx_s cn56xx; - struct cvmx_mio_uartx_htx_s cn56xxp1; - struct cvmx_mio_uartx_htx_s cn58xx; - struct cvmx_mio_uartx_htx_s cn58xxp1; - struct cvmx_mio_uartx_htx_s cn61xx; - struct cvmx_mio_uartx_htx_s cn63xx; - struct cvmx_mio_uartx_htx_s cn63xxp1; - struct cvmx_mio_uartx_htx_s cn66xx; - struct cvmx_mio_uartx_htx_s cn68xx; - struct cvmx_mio_uartx_htx_s cn68xxp1; - struct cvmx_mio_uartx_htx_s cnf71xx; }; union cvmx_mio_uartx_ier { @@ -4446,24 +3659,6 @@ union cvmx_mio_uartx_ier { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_uartx_ier_s cn30xx; - struct cvmx_mio_uartx_ier_s cn31xx; - struct cvmx_mio_uartx_ier_s cn38xx; - struct cvmx_mio_uartx_ier_s cn38xxp2; - struct cvmx_mio_uartx_ier_s cn50xx; - struct cvmx_mio_uartx_ier_s cn52xx; - struct cvmx_mio_uartx_ier_s cn52xxp1; - struct cvmx_mio_uartx_ier_s cn56xx; - struct cvmx_mio_uartx_ier_s cn56xxp1; - struct cvmx_mio_uartx_ier_s cn58xx; - struct cvmx_mio_uartx_ier_s cn58xxp1; - struct cvmx_mio_uartx_ier_s cn61xx; - struct cvmx_mio_uartx_ier_s cn63xx; - struct cvmx_mio_uartx_ier_s cn63xxp1; - struct cvmx_mio_uartx_ier_s cn66xx; - struct cvmx_mio_uartx_ier_s cn68xx; - struct cvmx_mio_uartx_ier_s cn68xxp1; - struct cvmx_mio_uartx_ier_s cnf71xx; }; union cvmx_mio_uartx_iir { @@ -4481,24 +3676,6 @@ union cvmx_mio_uartx_iir { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_uartx_iir_s cn30xx; - struct cvmx_mio_uartx_iir_s cn31xx; - struct cvmx_mio_uartx_iir_s cn38xx; - struct cvmx_mio_uartx_iir_s cn38xxp2; - struct cvmx_mio_uartx_iir_s cn50xx; - struct cvmx_mio_uartx_iir_s cn52xx; - struct cvmx_mio_uartx_iir_s cn52xxp1; - struct cvmx_mio_uartx_iir_s cn56xx; - struct cvmx_mio_uartx_iir_s cn56xxp1; - struct cvmx_mio_uartx_iir_s cn58xx; - struct cvmx_mio_uartx_iir_s cn58xxp1; - struct cvmx_mio_uartx_iir_s cn61xx; - struct cvmx_mio_uartx_iir_s cn63xx; - struct cvmx_mio_uartx_iir_s cn63xxp1; - struct cvmx_mio_uartx_iir_s cn66xx; - struct cvmx_mio_uartx_iir_s cn68xx; - struct cvmx_mio_uartx_iir_s cn68xxp1; - struct cvmx_mio_uartx_iir_s cnf71xx; }; union cvmx_mio_uartx_lcr { @@ -4524,24 +3701,6 @@ union cvmx_mio_uartx_lcr { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_uartx_lcr_s cn30xx; - struct cvmx_mio_uartx_lcr_s cn31xx; - struct cvmx_mio_uartx_lcr_s cn38xx; - struct cvmx_mio_uartx_lcr_s cn38xxp2; - struct cvmx_mio_uartx_lcr_s cn50xx; - struct cvmx_mio_uartx_lcr_s cn52xx; - struct cvmx_mio_uartx_lcr_s cn52xxp1; - struct cvmx_mio_uartx_lcr_s cn56xx; - struct cvmx_mio_uartx_lcr_s cn56xxp1; - struct cvmx_mio_uartx_lcr_s cn58xx; - struct cvmx_mio_uartx_lcr_s cn58xxp1; - struct cvmx_mio_uartx_lcr_s cn61xx; - struct cvmx_mio_uartx_lcr_s cn63xx; - struct cvmx_mio_uartx_lcr_s cn63xxp1; - struct cvmx_mio_uartx_lcr_s cn66xx; - struct cvmx_mio_uartx_lcr_s cn68xx; - struct cvmx_mio_uartx_lcr_s cn68xxp1; - struct cvmx_mio_uartx_lcr_s cnf71xx; }; union cvmx_mio_uartx_lsr { @@ -4569,24 +3728,6 @@ union cvmx_mio_uartx_lsr { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_uartx_lsr_s cn30xx; - struct cvmx_mio_uartx_lsr_s cn31xx; - struct cvmx_mio_uartx_lsr_s cn38xx; - struct cvmx_mio_uartx_lsr_s cn38xxp2; - struct cvmx_mio_uartx_lsr_s cn50xx; - struct cvmx_mio_uartx_lsr_s cn52xx; - struct cvmx_mio_uartx_lsr_s cn52xxp1; - struct cvmx_mio_uartx_lsr_s cn56xx; - struct cvmx_mio_uartx_lsr_s cn56xxp1; - struct cvmx_mio_uartx_lsr_s cn58xx; - struct cvmx_mio_uartx_lsr_s cn58xxp1; - struct cvmx_mio_uartx_lsr_s cn61xx; - struct cvmx_mio_uartx_lsr_s cn63xx; - struct cvmx_mio_uartx_lsr_s cn63xxp1; - struct cvmx_mio_uartx_lsr_s cn66xx; - struct cvmx_mio_uartx_lsr_s cn68xx; - struct cvmx_mio_uartx_lsr_s cn68xxp1; - struct cvmx_mio_uartx_lsr_s cnf71xx; }; union cvmx_mio_uartx_mcr { @@ -4610,24 +3751,6 @@ union cvmx_mio_uartx_mcr { uint64_t reserved_6_63:58; #endif } s; - struct cvmx_mio_uartx_mcr_s cn30xx; - struct cvmx_mio_uartx_mcr_s cn31xx; - struct cvmx_mio_uartx_mcr_s cn38xx; - struct cvmx_mio_uartx_mcr_s cn38xxp2; - struct cvmx_mio_uartx_mcr_s cn50xx; - struct cvmx_mio_uartx_mcr_s cn52xx; - struct cvmx_mio_uartx_mcr_s cn52xxp1; - struct cvmx_mio_uartx_mcr_s cn56xx; - struct cvmx_mio_uartx_mcr_s cn56xxp1; - struct cvmx_mio_uartx_mcr_s cn58xx; - struct cvmx_mio_uartx_mcr_s cn58xxp1; - struct cvmx_mio_uartx_mcr_s cn61xx; - struct cvmx_mio_uartx_mcr_s cn63xx; - struct cvmx_mio_uartx_mcr_s cn63xxp1; - struct cvmx_mio_uartx_mcr_s cn66xx; - struct cvmx_mio_uartx_mcr_s cn68xx; - struct cvmx_mio_uartx_mcr_s cn68xxp1; - struct cvmx_mio_uartx_mcr_s cnf71xx; }; union cvmx_mio_uartx_msr { @@ -4655,24 +3778,6 @@ union cvmx_mio_uartx_msr { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_uartx_msr_s cn30xx; - struct cvmx_mio_uartx_msr_s cn31xx; - struct cvmx_mio_uartx_msr_s cn38xx; - struct cvmx_mio_uartx_msr_s cn38xxp2; - struct cvmx_mio_uartx_msr_s cn50xx; - struct cvmx_mio_uartx_msr_s cn52xx; - struct cvmx_mio_uartx_msr_s cn52xxp1; - struct cvmx_mio_uartx_msr_s cn56xx; - struct cvmx_mio_uartx_msr_s cn56xxp1; - struct cvmx_mio_uartx_msr_s cn58xx; - struct cvmx_mio_uartx_msr_s cn58xxp1; - struct cvmx_mio_uartx_msr_s cn61xx; - struct cvmx_mio_uartx_msr_s cn63xx; - struct cvmx_mio_uartx_msr_s cn63xxp1; - struct cvmx_mio_uartx_msr_s cn66xx; - struct cvmx_mio_uartx_msr_s cn68xx; - struct cvmx_mio_uartx_msr_s cn68xxp1; - struct cvmx_mio_uartx_msr_s cnf71xx; }; union cvmx_mio_uartx_rbr { @@ -4686,24 +3791,6 @@ union cvmx_mio_uartx_rbr { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_uartx_rbr_s cn30xx; - struct cvmx_mio_uartx_rbr_s cn31xx; - struct cvmx_mio_uartx_rbr_s cn38xx; - struct cvmx_mio_uartx_rbr_s cn38xxp2; - struct cvmx_mio_uartx_rbr_s cn50xx; - struct cvmx_mio_uartx_rbr_s cn52xx; - struct cvmx_mio_uartx_rbr_s cn52xxp1; - struct cvmx_mio_uartx_rbr_s cn56xx; - struct cvmx_mio_uartx_rbr_s cn56xxp1; - struct cvmx_mio_uartx_rbr_s cn58xx; - struct cvmx_mio_uartx_rbr_s cn58xxp1; - struct cvmx_mio_uartx_rbr_s cn61xx; - struct cvmx_mio_uartx_rbr_s cn63xx; - struct cvmx_mio_uartx_rbr_s cn63xxp1; - struct cvmx_mio_uartx_rbr_s cn66xx; - struct cvmx_mio_uartx_rbr_s cn68xx; - struct cvmx_mio_uartx_rbr_s cn68xxp1; - struct cvmx_mio_uartx_rbr_s cnf71xx; }; union cvmx_mio_uartx_rfl { @@ -4717,24 +3804,6 @@ union cvmx_mio_uartx_rfl { uint64_t reserved_7_63:57; #endif } s; - struct cvmx_mio_uartx_rfl_s cn30xx; - struct cvmx_mio_uartx_rfl_s cn31xx; - struct cvmx_mio_uartx_rfl_s cn38xx; - struct cvmx_mio_uartx_rfl_s cn38xxp2; - struct cvmx_mio_uartx_rfl_s cn50xx; - struct cvmx_mio_uartx_rfl_s cn52xx; - struct cvmx_mio_uartx_rfl_s cn52xxp1; - struct cvmx_mio_uartx_rfl_s cn56xx; - struct cvmx_mio_uartx_rfl_s cn56xxp1; - struct cvmx_mio_uartx_rfl_s cn58xx; - struct cvmx_mio_uartx_rfl_s cn58xxp1; - struct cvmx_mio_uartx_rfl_s cn61xx; - struct cvmx_mio_uartx_rfl_s cn63xx; - struct cvmx_mio_uartx_rfl_s cn63xxp1; - struct cvmx_mio_uartx_rfl_s cn66xx; - struct cvmx_mio_uartx_rfl_s cn68xx; - struct cvmx_mio_uartx_rfl_s cn68xxp1; - struct cvmx_mio_uartx_rfl_s cnf71xx; }; union cvmx_mio_uartx_rfw { @@ -4752,24 +3821,6 @@ union cvmx_mio_uartx_rfw { uint64_t reserved_10_63:54; #endif } s; - struct cvmx_mio_uartx_rfw_s cn30xx; - struct cvmx_mio_uartx_rfw_s cn31xx; - struct cvmx_mio_uartx_rfw_s cn38xx; - struct cvmx_mio_uartx_rfw_s cn38xxp2; - struct cvmx_mio_uartx_rfw_s cn50xx; - struct cvmx_mio_uartx_rfw_s cn52xx; - struct cvmx_mio_uartx_rfw_s cn52xxp1; - struct cvmx_mio_uartx_rfw_s cn56xx; - struct cvmx_mio_uartx_rfw_s cn56xxp1; - struct cvmx_mio_uartx_rfw_s cn58xx; - struct cvmx_mio_uartx_rfw_s cn58xxp1; - struct cvmx_mio_uartx_rfw_s cn61xx; - struct cvmx_mio_uartx_rfw_s cn63xx; - struct cvmx_mio_uartx_rfw_s cn63xxp1; - struct cvmx_mio_uartx_rfw_s cn66xx; - struct cvmx_mio_uartx_rfw_s cn68xx; - struct cvmx_mio_uartx_rfw_s cn68xxp1; - struct cvmx_mio_uartx_rfw_s cnf71xx; }; union cvmx_mio_uartx_sbcr { @@ -4783,24 +3834,6 @@ union cvmx_mio_uartx_sbcr { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_mio_uartx_sbcr_s cn30xx; - struct cvmx_mio_uartx_sbcr_s cn31xx; - struct cvmx_mio_uartx_sbcr_s cn38xx; - struct cvmx_mio_uartx_sbcr_s cn38xxp2; - struct cvmx_mio_uartx_sbcr_s cn50xx; - struct cvmx_mio_uartx_sbcr_s cn52xx; - struct cvmx_mio_uartx_sbcr_s cn52xxp1; - struct cvmx_mio_uartx_sbcr_s cn56xx; - struct cvmx_mio_uartx_sbcr_s cn56xxp1; - struct cvmx_mio_uartx_sbcr_s cn58xx; - struct cvmx_mio_uartx_sbcr_s cn58xxp1; - struct cvmx_mio_uartx_sbcr_s cn61xx; - struct cvmx_mio_uartx_sbcr_s cn63xx; - struct cvmx_mio_uartx_sbcr_s cn63xxp1; - struct cvmx_mio_uartx_sbcr_s cn66xx; - struct cvmx_mio_uartx_sbcr_s cn68xx; - struct cvmx_mio_uartx_sbcr_s cn68xxp1; - struct cvmx_mio_uartx_sbcr_s cnf71xx; }; union cvmx_mio_uartx_scr { @@ -4814,24 +3847,6 @@ union cvmx_mio_uartx_scr { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_uartx_scr_s cn30xx; - struct cvmx_mio_uartx_scr_s cn31xx; - struct cvmx_mio_uartx_scr_s cn38xx; - struct cvmx_mio_uartx_scr_s cn38xxp2; - struct cvmx_mio_uartx_scr_s cn50xx; - struct cvmx_mio_uartx_scr_s cn52xx; - struct cvmx_mio_uartx_scr_s cn52xxp1; - struct cvmx_mio_uartx_scr_s cn56xx; - struct cvmx_mio_uartx_scr_s cn56xxp1; - struct cvmx_mio_uartx_scr_s cn58xx; - struct cvmx_mio_uartx_scr_s cn58xxp1; - struct cvmx_mio_uartx_scr_s cn61xx; - struct cvmx_mio_uartx_scr_s cn63xx; - struct cvmx_mio_uartx_scr_s cn63xxp1; - struct cvmx_mio_uartx_scr_s cn66xx; - struct cvmx_mio_uartx_scr_s cn68xx; - struct cvmx_mio_uartx_scr_s cn68xxp1; - struct cvmx_mio_uartx_scr_s cnf71xx; }; union cvmx_mio_uartx_sfe { @@ -4845,24 +3860,6 @@ union cvmx_mio_uartx_sfe { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_mio_uartx_sfe_s cn30xx; - struct cvmx_mio_uartx_sfe_s cn31xx; - struct cvmx_mio_uartx_sfe_s cn38xx; - struct cvmx_mio_uartx_sfe_s cn38xxp2; - struct cvmx_mio_uartx_sfe_s cn50xx; - struct cvmx_mio_uartx_sfe_s cn52xx; - struct cvmx_mio_uartx_sfe_s cn52xxp1; - struct cvmx_mio_uartx_sfe_s cn56xx; - struct cvmx_mio_uartx_sfe_s cn56xxp1; - struct cvmx_mio_uartx_sfe_s cn58xx; - struct cvmx_mio_uartx_sfe_s cn58xxp1; - struct cvmx_mio_uartx_sfe_s cn61xx; - struct cvmx_mio_uartx_sfe_s cn63xx; - struct cvmx_mio_uartx_sfe_s cn63xxp1; - struct cvmx_mio_uartx_sfe_s cn66xx; - struct cvmx_mio_uartx_sfe_s cn68xx; - struct cvmx_mio_uartx_sfe_s cn68xxp1; - struct cvmx_mio_uartx_sfe_s cnf71xx; }; union cvmx_mio_uartx_srr { @@ -4880,24 +3877,6 @@ union cvmx_mio_uartx_srr { uint64_t reserved_3_63:61; #endif } s; - struct cvmx_mio_uartx_srr_s cn30xx; - struct cvmx_mio_uartx_srr_s cn31xx; - struct cvmx_mio_uartx_srr_s cn38xx; - struct cvmx_mio_uartx_srr_s cn38xxp2; - struct cvmx_mio_uartx_srr_s cn50xx; - struct cvmx_mio_uartx_srr_s cn52xx; - struct cvmx_mio_uartx_srr_s cn52xxp1; - struct cvmx_mio_uartx_srr_s cn56xx; - struct cvmx_mio_uartx_srr_s cn56xxp1; - struct cvmx_mio_uartx_srr_s cn58xx; - struct cvmx_mio_uartx_srr_s cn58xxp1; - struct cvmx_mio_uartx_srr_s cn61xx; - struct cvmx_mio_uartx_srr_s cn63xx; - struct cvmx_mio_uartx_srr_s cn63xxp1; - struct cvmx_mio_uartx_srr_s cn66xx; - struct cvmx_mio_uartx_srr_s cn68xx; - struct cvmx_mio_uartx_srr_s cn68xxp1; - struct cvmx_mio_uartx_srr_s cnf71xx; }; union cvmx_mio_uartx_srt { @@ -4911,24 +3890,6 @@ union cvmx_mio_uartx_srt { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_mio_uartx_srt_s cn30xx; - struct cvmx_mio_uartx_srt_s cn31xx; - struct cvmx_mio_uartx_srt_s cn38xx; - struct cvmx_mio_uartx_srt_s cn38xxp2; - struct cvmx_mio_uartx_srt_s cn50xx; - struct cvmx_mio_uartx_srt_s cn52xx; - struct cvmx_mio_uartx_srt_s cn52xxp1; - struct cvmx_mio_uartx_srt_s cn56xx; - struct cvmx_mio_uartx_srt_s cn56xxp1; - struct cvmx_mio_uartx_srt_s cn58xx; - struct cvmx_mio_uartx_srt_s cn58xxp1; - struct cvmx_mio_uartx_srt_s cn61xx; - struct cvmx_mio_uartx_srt_s cn63xx; - struct cvmx_mio_uartx_srt_s cn63xxp1; - struct cvmx_mio_uartx_srt_s cn66xx; - struct cvmx_mio_uartx_srt_s cn68xx; - struct cvmx_mio_uartx_srt_s cn68xxp1; - struct cvmx_mio_uartx_srt_s cnf71xx; }; union cvmx_mio_uartx_srts { @@ -4942,24 +3903,6 @@ union cvmx_mio_uartx_srts { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_mio_uartx_srts_s cn30xx; - struct cvmx_mio_uartx_srts_s cn31xx; - struct cvmx_mio_uartx_srts_s cn38xx; - struct cvmx_mio_uartx_srts_s cn38xxp2; - struct cvmx_mio_uartx_srts_s cn50xx; - struct cvmx_mio_uartx_srts_s cn52xx; - struct cvmx_mio_uartx_srts_s cn52xxp1; - struct cvmx_mio_uartx_srts_s cn56xx; - struct cvmx_mio_uartx_srts_s cn56xxp1; - struct cvmx_mio_uartx_srts_s cn58xx; - struct cvmx_mio_uartx_srts_s cn58xxp1; - struct cvmx_mio_uartx_srts_s cn61xx; - struct cvmx_mio_uartx_srts_s cn63xx; - struct cvmx_mio_uartx_srts_s cn63xxp1; - struct cvmx_mio_uartx_srts_s cn66xx; - struct cvmx_mio_uartx_srts_s cn68xx; - struct cvmx_mio_uartx_srts_s cn68xxp1; - struct cvmx_mio_uartx_srts_s cnf71xx; }; union cvmx_mio_uartx_stt { @@ -4973,24 +3916,6 @@ union cvmx_mio_uartx_stt { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_mio_uartx_stt_s cn30xx; - struct cvmx_mio_uartx_stt_s cn31xx; - struct cvmx_mio_uartx_stt_s cn38xx; - struct cvmx_mio_uartx_stt_s cn38xxp2; - struct cvmx_mio_uartx_stt_s cn50xx; - struct cvmx_mio_uartx_stt_s cn52xx; - struct cvmx_mio_uartx_stt_s cn52xxp1; - struct cvmx_mio_uartx_stt_s cn56xx; - struct cvmx_mio_uartx_stt_s cn56xxp1; - struct cvmx_mio_uartx_stt_s cn58xx; - struct cvmx_mio_uartx_stt_s cn58xxp1; - struct cvmx_mio_uartx_stt_s cn61xx; - struct cvmx_mio_uartx_stt_s cn63xx; - struct cvmx_mio_uartx_stt_s cn63xxp1; - struct cvmx_mio_uartx_stt_s cn66xx; - struct cvmx_mio_uartx_stt_s cn68xx; - struct cvmx_mio_uartx_stt_s cn68xxp1; - struct cvmx_mio_uartx_stt_s cnf71xx; }; union cvmx_mio_uartx_tfl { @@ -5004,24 +3929,6 @@ union cvmx_mio_uartx_tfl { uint64_t reserved_7_63:57; #endif } s; - struct cvmx_mio_uartx_tfl_s cn30xx; - struct cvmx_mio_uartx_tfl_s cn31xx; - struct cvmx_mio_uartx_tfl_s cn38xx; - struct cvmx_mio_uartx_tfl_s cn38xxp2; - struct cvmx_mio_uartx_tfl_s cn50xx; - struct cvmx_mio_uartx_tfl_s cn52xx; - struct cvmx_mio_uartx_tfl_s cn52xxp1; - struct cvmx_mio_uartx_tfl_s cn56xx; - struct cvmx_mio_uartx_tfl_s cn56xxp1; - struct cvmx_mio_uartx_tfl_s cn58xx; - struct cvmx_mio_uartx_tfl_s cn58xxp1; - struct cvmx_mio_uartx_tfl_s cn61xx; - struct cvmx_mio_uartx_tfl_s cn63xx; - struct cvmx_mio_uartx_tfl_s cn63xxp1; - struct cvmx_mio_uartx_tfl_s cn66xx; - struct cvmx_mio_uartx_tfl_s cn68xx; - struct cvmx_mio_uartx_tfl_s cn68xxp1; - struct cvmx_mio_uartx_tfl_s cnf71xx; }; union cvmx_mio_uartx_tfr { @@ -5035,24 +3942,6 @@ union cvmx_mio_uartx_tfr { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_uartx_tfr_s cn30xx; - struct cvmx_mio_uartx_tfr_s cn31xx; - struct cvmx_mio_uartx_tfr_s cn38xx; - struct cvmx_mio_uartx_tfr_s cn38xxp2; - struct cvmx_mio_uartx_tfr_s cn50xx; - struct cvmx_mio_uartx_tfr_s cn52xx; - struct cvmx_mio_uartx_tfr_s cn52xxp1; - struct cvmx_mio_uartx_tfr_s cn56xx; - struct cvmx_mio_uartx_tfr_s cn56xxp1; - struct cvmx_mio_uartx_tfr_s cn58xx; - struct cvmx_mio_uartx_tfr_s cn58xxp1; - struct cvmx_mio_uartx_tfr_s cn61xx; - struct cvmx_mio_uartx_tfr_s cn63xx; - struct cvmx_mio_uartx_tfr_s cn63xxp1; - struct cvmx_mio_uartx_tfr_s cn66xx; - struct cvmx_mio_uartx_tfr_s cn68xx; - struct cvmx_mio_uartx_tfr_s cn68xxp1; - struct cvmx_mio_uartx_tfr_s cnf71xx; }; union cvmx_mio_uartx_thr { @@ -5066,24 +3955,6 @@ union cvmx_mio_uartx_thr { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_uartx_thr_s cn30xx; - struct cvmx_mio_uartx_thr_s cn31xx; - struct cvmx_mio_uartx_thr_s cn38xx; - struct cvmx_mio_uartx_thr_s cn38xxp2; - struct cvmx_mio_uartx_thr_s cn50xx; - struct cvmx_mio_uartx_thr_s cn52xx; - struct cvmx_mio_uartx_thr_s cn52xxp1; - struct cvmx_mio_uartx_thr_s cn56xx; - struct cvmx_mio_uartx_thr_s cn56xxp1; - struct cvmx_mio_uartx_thr_s cn58xx; - struct cvmx_mio_uartx_thr_s cn58xxp1; - struct cvmx_mio_uartx_thr_s cn61xx; - struct cvmx_mio_uartx_thr_s cn63xx; - struct cvmx_mio_uartx_thr_s cn63xxp1; - struct cvmx_mio_uartx_thr_s cn66xx; - struct cvmx_mio_uartx_thr_s cn68xx; - struct cvmx_mio_uartx_thr_s cn68xxp1; - struct cvmx_mio_uartx_thr_s cnf71xx; }; union cvmx_mio_uartx_usr { @@ -5105,24 +3976,6 @@ union cvmx_mio_uartx_usr { uint64_t reserved_5_63:59; #endif } s; - struct cvmx_mio_uartx_usr_s cn30xx; - struct cvmx_mio_uartx_usr_s cn31xx; - struct cvmx_mio_uartx_usr_s cn38xx; - struct cvmx_mio_uartx_usr_s cn38xxp2; - struct cvmx_mio_uartx_usr_s cn50xx; - struct cvmx_mio_uartx_usr_s cn52xx; - struct cvmx_mio_uartx_usr_s cn52xxp1; - struct cvmx_mio_uartx_usr_s cn56xx; - struct cvmx_mio_uartx_usr_s cn56xxp1; - struct cvmx_mio_uartx_usr_s cn58xx; - struct cvmx_mio_uartx_usr_s cn58xxp1; - struct cvmx_mio_uartx_usr_s cn61xx; - struct cvmx_mio_uartx_usr_s cn63xx; - struct cvmx_mio_uartx_usr_s cn63xxp1; - struct cvmx_mio_uartx_usr_s cn66xx; - struct cvmx_mio_uartx_usr_s cn68xx; - struct cvmx_mio_uartx_usr_s cn68xxp1; - struct cvmx_mio_uartx_usr_s cnf71xx; }; union cvmx_mio_uart2_dlh { @@ -5136,8 +3989,6 @@ union cvmx_mio_uart2_dlh { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_uart2_dlh_s cn52xx; - struct cvmx_mio_uart2_dlh_s cn52xxp1; }; union cvmx_mio_uart2_dll { @@ -5151,8 +4002,6 @@ union cvmx_mio_uart2_dll { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_uart2_dll_s cn52xx; - struct cvmx_mio_uart2_dll_s cn52xxp1; }; union cvmx_mio_uart2_far { @@ -5166,8 +4015,6 @@ union cvmx_mio_uart2_far { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_mio_uart2_far_s cn52xx; - struct cvmx_mio_uart2_far_s cn52xxp1; }; union cvmx_mio_uart2_fcr { @@ -5191,8 +4038,6 @@ union cvmx_mio_uart2_fcr { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_uart2_fcr_s cn52xx; - struct cvmx_mio_uart2_fcr_s cn52xxp1; }; union cvmx_mio_uart2_htx { @@ -5206,8 +4051,6 @@ union cvmx_mio_uart2_htx { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_mio_uart2_htx_s cn52xx; - struct cvmx_mio_uart2_htx_s cn52xxp1; }; union cvmx_mio_uart2_ier { @@ -5231,8 +4074,6 @@ union cvmx_mio_uart2_ier { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_uart2_ier_s cn52xx; - struct cvmx_mio_uart2_ier_s cn52xxp1; }; union cvmx_mio_uart2_iir { @@ -5250,8 +4091,6 @@ union cvmx_mio_uart2_iir { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_uart2_iir_s cn52xx; - struct cvmx_mio_uart2_iir_s cn52xxp1; }; union cvmx_mio_uart2_lcr { @@ -5277,8 +4116,6 @@ union cvmx_mio_uart2_lcr { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_uart2_lcr_s cn52xx; - struct cvmx_mio_uart2_lcr_s cn52xxp1; }; union cvmx_mio_uart2_lsr { @@ -5306,8 +4143,6 @@ union cvmx_mio_uart2_lsr { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_uart2_lsr_s cn52xx; - struct cvmx_mio_uart2_lsr_s cn52xxp1; }; union cvmx_mio_uart2_mcr { @@ -5331,8 +4166,6 @@ union cvmx_mio_uart2_mcr { uint64_t reserved_6_63:58; #endif } s; - struct cvmx_mio_uart2_mcr_s cn52xx; - struct cvmx_mio_uart2_mcr_s cn52xxp1; }; union cvmx_mio_uart2_msr { @@ -5360,8 +4193,6 @@ union cvmx_mio_uart2_msr { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_uart2_msr_s cn52xx; - struct cvmx_mio_uart2_msr_s cn52xxp1; }; union cvmx_mio_uart2_rbr { @@ -5375,8 +4206,6 @@ union cvmx_mio_uart2_rbr { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_uart2_rbr_s cn52xx; - struct cvmx_mio_uart2_rbr_s cn52xxp1; }; union cvmx_mio_uart2_rfl { @@ -5390,8 +4219,6 @@ union cvmx_mio_uart2_rfl { uint64_t reserved_7_63:57; #endif } s; - struct cvmx_mio_uart2_rfl_s cn52xx; - struct cvmx_mio_uart2_rfl_s cn52xxp1; }; union cvmx_mio_uart2_rfw { @@ -5409,8 +4236,6 @@ union cvmx_mio_uart2_rfw { uint64_t reserved_10_63:54; #endif } s; - struct cvmx_mio_uart2_rfw_s cn52xx; - struct cvmx_mio_uart2_rfw_s cn52xxp1; }; union cvmx_mio_uart2_sbcr { @@ -5424,8 +4249,6 @@ union cvmx_mio_uart2_sbcr { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_mio_uart2_sbcr_s cn52xx; - struct cvmx_mio_uart2_sbcr_s cn52xxp1; }; union cvmx_mio_uart2_scr { @@ -5439,8 +4262,6 @@ union cvmx_mio_uart2_scr { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_uart2_scr_s cn52xx; - struct cvmx_mio_uart2_scr_s cn52xxp1; }; union cvmx_mio_uart2_sfe { @@ -5454,8 +4275,6 @@ union cvmx_mio_uart2_sfe { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_mio_uart2_sfe_s cn52xx; - struct cvmx_mio_uart2_sfe_s cn52xxp1; }; union cvmx_mio_uart2_srr { @@ -5473,8 +4292,6 @@ union cvmx_mio_uart2_srr { uint64_t reserved_3_63:61; #endif } s; - struct cvmx_mio_uart2_srr_s cn52xx; - struct cvmx_mio_uart2_srr_s cn52xxp1; }; union cvmx_mio_uart2_srt { @@ -5488,8 +4305,6 @@ union cvmx_mio_uart2_srt { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_mio_uart2_srt_s cn52xx; - struct cvmx_mio_uart2_srt_s cn52xxp1; }; union cvmx_mio_uart2_srts { @@ -5503,8 +4318,6 @@ union cvmx_mio_uart2_srts { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_mio_uart2_srts_s cn52xx; - struct cvmx_mio_uart2_srts_s cn52xxp1; }; union cvmx_mio_uart2_stt { @@ -5518,8 +4331,6 @@ union cvmx_mio_uart2_stt { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_mio_uart2_stt_s cn52xx; - struct cvmx_mio_uart2_stt_s cn52xxp1; }; union cvmx_mio_uart2_tfl { @@ -5533,8 +4344,6 @@ union cvmx_mio_uart2_tfl { uint64_t reserved_7_63:57; #endif } s; - struct cvmx_mio_uart2_tfl_s cn52xx; - struct cvmx_mio_uart2_tfl_s cn52xxp1; }; union cvmx_mio_uart2_tfr { @@ -5548,8 +4357,6 @@ union cvmx_mio_uart2_tfr { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_uart2_tfr_s cn52xx; - struct cvmx_mio_uart2_tfr_s cn52xxp1; }; union cvmx_mio_uart2_thr { @@ -5563,8 +4370,6 @@ union cvmx_mio_uart2_thr { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_uart2_thr_s cn52xx; - struct cvmx_mio_uart2_thr_s cn52xxp1; }; union cvmx_mio_uart2_usr { @@ -5586,8 +4391,6 @@ union cvmx_mio_uart2_usr { uint64_t reserved_5_63:59; #endif } s; - struct cvmx_mio_uart2_usr_s cn52xx; - struct cvmx_mio_uart2_usr_s cn52xxp1; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-mixx-defs.h b/arch/mips/include/asm/octeon/cvmx-mixx-defs.h index 3155e6019dc8..cd60d43e809a 100644 --- a/arch/mips/include/asm/octeon/cvmx-mixx-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-mixx-defs.h @@ -80,15 +80,6 @@ union cvmx_mixx_bist { uint64_t reserved_4_63:60; #endif } cn52xx; - struct cvmx_mixx_bist_cn52xx cn52xxp1; - struct cvmx_mixx_bist_cn52xx cn56xx; - struct cvmx_mixx_bist_cn52xx cn56xxp1; - struct cvmx_mixx_bist_s cn61xx; - struct cvmx_mixx_bist_s cn63xx; - struct cvmx_mixx_bist_s cn63xxp1; - struct cvmx_mixx_bist_s cn66xx; - struct cvmx_mixx_bist_s cn68xx; - struct cvmx_mixx_bist_s cn68xxp1; }; union cvmx_mixx_ctl { @@ -137,15 +128,6 @@ union cvmx_mixx_ctl { uint64_t reserved_8_63:56; #endif } cn52xx; - struct cvmx_mixx_ctl_cn52xx cn52xxp1; - struct cvmx_mixx_ctl_cn52xx cn56xx; - struct cvmx_mixx_ctl_cn52xx cn56xxp1; - struct cvmx_mixx_ctl_s cn61xx; - struct cvmx_mixx_ctl_s cn63xx; - struct cvmx_mixx_ctl_s cn63xxp1; - struct cvmx_mixx_ctl_s cn66xx; - struct cvmx_mixx_ctl_s cn68xx; - struct cvmx_mixx_ctl_s cn68xxp1; }; union cvmx_mixx_intena { @@ -194,15 +176,6 @@ union cvmx_mixx_intena { uint64_t reserved_7_63:57; #endif } cn52xx; - struct cvmx_mixx_intena_cn52xx cn52xxp1; - struct cvmx_mixx_intena_cn52xx cn56xx; - struct cvmx_mixx_intena_cn52xx cn56xxp1; - struct cvmx_mixx_intena_s cn61xx; - struct cvmx_mixx_intena_s cn63xx; - struct cvmx_mixx_intena_s cn63xxp1; - struct cvmx_mixx_intena_s cn66xx; - struct cvmx_mixx_intena_s cn68xx; - struct cvmx_mixx_intena_s cn68xxp1; }; union cvmx_mixx_ircnt { @@ -216,16 +189,6 @@ union cvmx_mixx_ircnt { uint64_t reserved_20_63:44; #endif } s; - struct cvmx_mixx_ircnt_s cn52xx; - struct cvmx_mixx_ircnt_s cn52xxp1; - struct cvmx_mixx_ircnt_s cn56xx; - struct cvmx_mixx_ircnt_s cn56xxp1; - struct cvmx_mixx_ircnt_s cn61xx; - struct cvmx_mixx_ircnt_s cn63xx; - struct cvmx_mixx_ircnt_s cn63xxp1; - struct cvmx_mixx_ircnt_s cn66xx; - struct cvmx_mixx_ircnt_s cn68xx; - struct cvmx_mixx_ircnt_s cn68xxp1; }; union cvmx_mixx_irhwm { @@ -241,16 +204,6 @@ union cvmx_mixx_irhwm { uint64_t reserved_40_63:24; #endif } s; - struct cvmx_mixx_irhwm_s cn52xx; - struct cvmx_mixx_irhwm_s cn52xxp1; - struct cvmx_mixx_irhwm_s cn56xx; - struct cvmx_mixx_irhwm_s cn56xxp1; - struct cvmx_mixx_irhwm_s cn61xx; - struct cvmx_mixx_irhwm_s cn63xx; - struct cvmx_mixx_irhwm_s cn63xxp1; - struct cvmx_mixx_irhwm_s cn66xx; - struct cvmx_mixx_irhwm_s cn68xx; - struct cvmx_mixx_irhwm_s cn68xxp1; }; union cvmx_mixx_iring1 { @@ -283,15 +236,6 @@ union cvmx_mixx_iring1 { uint64_t reserved_60_63:4; #endif } cn52xx; - struct cvmx_mixx_iring1_cn52xx cn52xxp1; - struct cvmx_mixx_iring1_cn52xx cn56xx; - struct cvmx_mixx_iring1_cn52xx cn56xxp1; - struct cvmx_mixx_iring1_s cn61xx; - struct cvmx_mixx_iring1_s cn63xx; - struct cvmx_mixx_iring1_s cn63xxp1; - struct cvmx_mixx_iring1_s cn66xx; - struct cvmx_mixx_iring1_s cn68xx; - struct cvmx_mixx_iring1_s cn68xxp1; }; union cvmx_mixx_iring2 { @@ -309,16 +253,6 @@ union cvmx_mixx_iring2 { uint64_t reserved_52_63:12; #endif } s; - struct cvmx_mixx_iring2_s cn52xx; - struct cvmx_mixx_iring2_s cn52xxp1; - struct cvmx_mixx_iring2_s cn56xx; - struct cvmx_mixx_iring2_s cn56xxp1; - struct cvmx_mixx_iring2_s cn61xx; - struct cvmx_mixx_iring2_s cn63xx; - struct cvmx_mixx_iring2_s cn63xxp1; - struct cvmx_mixx_iring2_s cn66xx; - struct cvmx_mixx_iring2_s cn68xx; - struct cvmx_mixx_iring2_s cn68xxp1; }; union cvmx_mixx_isr { @@ -367,15 +301,6 @@ union cvmx_mixx_isr { uint64_t reserved_7_63:57; #endif } cn52xx; - struct cvmx_mixx_isr_cn52xx cn52xxp1; - struct cvmx_mixx_isr_cn52xx cn56xx; - struct cvmx_mixx_isr_cn52xx cn56xxp1; - struct cvmx_mixx_isr_s cn61xx; - struct cvmx_mixx_isr_s cn63xx; - struct cvmx_mixx_isr_s cn63xxp1; - struct cvmx_mixx_isr_s cn66xx; - struct cvmx_mixx_isr_s cn68xx; - struct cvmx_mixx_isr_s cn68xxp1; }; union cvmx_mixx_orcnt { @@ -389,16 +314,6 @@ union cvmx_mixx_orcnt { uint64_t reserved_20_63:44; #endif } s; - struct cvmx_mixx_orcnt_s cn52xx; - struct cvmx_mixx_orcnt_s cn52xxp1; - struct cvmx_mixx_orcnt_s cn56xx; - struct cvmx_mixx_orcnt_s cn56xxp1; - struct cvmx_mixx_orcnt_s cn61xx; - struct cvmx_mixx_orcnt_s cn63xx; - struct cvmx_mixx_orcnt_s cn63xxp1; - struct cvmx_mixx_orcnt_s cn66xx; - struct cvmx_mixx_orcnt_s cn68xx; - struct cvmx_mixx_orcnt_s cn68xxp1; }; union cvmx_mixx_orhwm { @@ -412,16 +327,6 @@ union cvmx_mixx_orhwm { uint64_t reserved_20_63:44; #endif } s; - struct cvmx_mixx_orhwm_s cn52xx; - struct cvmx_mixx_orhwm_s cn52xxp1; - struct cvmx_mixx_orhwm_s cn56xx; - struct cvmx_mixx_orhwm_s cn56xxp1; - struct cvmx_mixx_orhwm_s cn61xx; - struct cvmx_mixx_orhwm_s cn63xx; - struct cvmx_mixx_orhwm_s cn63xxp1; - struct cvmx_mixx_orhwm_s cn66xx; - struct cvmx_mixx_orhwm_s cn68xx; - struct cvmx_mixx_orhwm_s cn68xxp1; }; union cvmx_mixx_oring1 { @@ -454,15 +359,6 @@ union cvmx_mixx_oring1 { uint64_t reserved_60_63:4; #endif } cn52xx; - struct cvmx_mixx_oring1_cn52xx cn52xxp1; - struct cvmx_mixx_oring1_cn52xx cn56xx; - struct cvmx_mixx_oring1_cn52xx cn56xxp1; - struct cvmx_mixx_oring1_s cn61xx; - struct cvmx_mixx_oring1_s cn63xx; - struct cvmx_mixx_oring1_s cn63xxp1; - struct cvmx_mixx_oring1_s cn66xx; - struct cvmx_mixx_oring1_s cn68xx; - struct cvmx_mixx_oring1_s cn68xxp1; }; union cvmx_mixx_oring2 { @@ -480,16 +376,6 @@ union cvmx_mixx_oring2 { uint64_t reserved_52_63:12; #endif } s; - struct cvmx_mixx_oring2_s cn52xx; - struct cvmx_mixx_oring2_s cn52xxp1; - struct cvmx_mixx_oring2_s cn56xx; - struct cvmx_mixx_oring2_s cn56xxp1; - struct cvmx_mixx_oring2_s cn61xx; - struct cvmx_mixx_oring2_s cn63xx; - struct cvmx_mixx_oring2_s cn63xxp1; - struct cvmx_mixx_oring2_s cn66xx; - struct cvmx_mixx_oring2_s cn68xx; - struct cvmx_mixx_oring2_s cn68xxp1; }; union cvmx_mixx_remcnt { @@ -507,16 +393,6 @@ union cvmx_mixx_remcnt { uint64_t reserved_52_63:12; #endif } s; - struct cvmx_mixx_remcnt_s cn52xx; - struct cvmx_mixx_remcnt_s cn52xxp1; - struct cvmx_mixx_remcnt_s cn56xx; - struct cvmx_mixx_remcnt_s cn56xxp1; - struct cvmx_mixx_remcnt_s cn61xx; - struct cvmx_mixx_remcnt_s cn63xx; - struct cvmx_mixx_remcnt_s cn63xxp1; - struct cvmx_mixx_remcnt_s cn66xx; - struct cvmx_mixx_remcnt_s cn68xx; - struct cvmx_mixx_remcnt_s cn68xxp1; }; union cvmx_mixx_tsctl { @@ -538,12 +414,6 @@ union cvmx_mixx_tsctl { uint64_t reserved_21_63:43; #endif } s; - struct cvmx_mixx_tsctl_s cn61xx; - struct cvmx_mixx_tsctl_s cn63xx; - struct cvmx_mixx_tsctl_s cn63xxp1; - struct cvmx_mixx_tsctl_s cn66xx; - struct cvmx_mixx_tsctl_s cn68xx; - struct cvmx_mixx_tsctl_s cn68xxp1; }; union cvmx_mixx_tstamp { @@ -555,12 +425,6 @@ union cvmx_mixx_tstamp { uint64_t tstamp:64; #endif } s; - struct cvmx_mixx_tstamp_s cn61xx; - struct cvmx_mixx_tstamp_s cn63xx; - struct cvmx_mixx_tstamp_s cn63xxp1; - struct cvmx_mixx_tstamp_s cn66xx; - struct cvmx_mixx_tstamp_s cn68xx; - struct cvmx_mixx_tstamp_s cn68xxp1; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-npei-defs.h b/arch/mips/include/asm/octeon/cvmx-npei-defs.h index 58114d414356..6a51b1ef8c9b 100644 --- a/arch/mips/include/asm/octeon/cvmx-npei-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-npei-defs.h @@ -154,10 +154,6 @@ union cvmx_npei_bar1_indexx { uint32_t reserved_18_31:14; #endif } s; - struct cvmx_npei_bar1_indexx_s cn52xx; - struct cvmx_npei_bar1_indexx_s cn52xxp1; - struct cvmx_npei_bar1_indexx_s cn56xx; - struct cvmx_npei_bar1_indexx_s cn56xxp1; }; union cvmx_npei_bist_status { @@ -485,7 +481,6 @@ union cvmx_npei_bist_status { uint64_t reserved_46_63:18; #endif } cn52xxp1; - struct cvmx_npei_bist_status_cn52xx cn56xx; struct cvmx_npei_bist_status_cn56xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_58_63:6; @@ -648,8 +643,6 @@ union cvmx_npei_bist_status2 { uint64_t reserved_14_63:50; #endif } s; - struct cvmx_npei_bist_status2_s cn52xx; - struct cvmx_npei_bist_status2_s cn56xx; }; union cvmx_npei_ctl_port0 { @@ -693,10 +686,6 @@ union cvmx_npei_ctl_port0 { uint64_t reserved_21_63:43; #endif } s; - struct cvmx_npei_ctl_port0_s cn52xx; - struct cvmx_npei_ctl_port0_s cn52xxp1; - struct cvmx_npei_ctl_port0_s cn56xx; - struct cvmx_npei_ctl_port0_s cn56xxp1; }; union cvmx_npei_ctl_port1 { @@ -740,10 +729,6 @@ union cvmx_npei_ctl_port1 { uint64_t reserved_21_63:43; #endif } s; - struct cvmx_npei_ctl_port1_s cn52xx; - struct cvmx_npei_ctl_port1_s cn52xxp1; - struct cvmx_npei_ctl_port1_s cn56xx; - struct cvmx_npei_ctl_port1_s cn56xxp1; }; union cvmx_npei_ctl_status { @@ -773,7 +758,6 @@ union cvmx_npei_ctl_status { uint64_t reserved_44_63:20; #endif } s; - struct cvmx_npei_ctl_status_s cn52xx; struct cvmx_npei_ctl_status_cn52xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_44_63:20; @@ -799,7 +783,6 @@ union cvmx_npei_ctl_status { uint64_t reserved_44_63:20; #endif } cn52xxp1; - struct cvmx_npei_ctl_status_s cn56xx; struct cvmx_npei_ctl_status_cn56xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_15_63:49; @@ -848,10 +831,6 @@ union cvmx_npei_ctl_status2 { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_npei_ctl_status2_s cn52xx; - struct cvmx_npei_ctl_status2_s cn52xxp1; - struct cvmx_npei_ctl_status2_s cn56xx; - struct cvmx_npei_ctl_status2_s cn56xxp1; }; union cvmx_npei_data_out_cnt { @@ -871,10 +850,6 @@ union cvmx_npei_data_out_cnt { uint64_t reserved_44_63:20; #endif } s; - struct cvmx_npei_data_out_cnt_s cn52xx; - struct cvmx_npei_data_out_cnt_s cn52xxp1; - struct cvmx_npei_data_out_cnt_s cn56xx; - struct cvmx_npei_data_out_cnt_s cn56xxp1; }; union cvmx_npei_dbg_data { @@ -919,7 +894,6 @@ union cvmx_npei_dbg_data { uint64_t reserved_29_63:35; #endif } cn52xx; - struct cvmx_npei_dbg_data_cn52xx cn52xxp1; struct cvmx_npei_dbg_data_cn56xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_29_63:35; @@ -941,7 +915,6 @@ union cvmx_npei_dbg_data { uint64_t reserved_29_63:35; #endif } cn56xx; - struct cvmx_npei_dbg_data_cn56xx cn56xxp1; }; union cvmx_npei_dbg_select { @@ -955,10 +928,6 @@ union cvmx_npei_dbg_select { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_npei_dbg_select_s cn52xx; - struct cvmx_npei_dbg_select_s cn52xxp1; - struct cvmx_npei_dbg_select_s cn56xx; - struct cvmx_npei_dbg_select_s cn56xxp1; }; union cvmx_npei_dmax_counts { @@ -974,10 +943,6 @@ union cvmx_npei_dmax_counts { uint64_t reserved_39_63:25; #endif } s; - struct cvmx_npei_dmax_counts_s cn52xx; - struct cvmx_npei_dmax_counts_s cn52xxp1; - struct cvmx_npei_dmax_counts_s cn56xx; - struct cvmx_npei_dmax_counts_s cn56xxp1; }; union cvmx_npei_dmax_dbell { @@ -991,10 +956,6 @@ union cvmx_npei_dmax_dbell { uint32_t reserved_16_31:16; #endif } s; - struct cvmx_npei_dmax_dbell_s cn52xx; - struct cvmx_npei_dmax_dbell_s cn52xxp1; - struct cvmx_npei_dmax_dbell_s cn56xx; - struct cvmx_npei_dmax_dbell_s cn56xxp1; }; union cvmx_npei_dmax_ibuff_saddr { @@ -1012,7 +973,6 @@ union cvmx_npei_dmax_ibuff_saddr { uint64_t reserved_37_63:27; #endif } s; - struct cvmx_npei_dmax_ibuff_saddr_s cn52xx; struct cvmx_npei_dmax_ibuff_saddr_cn52xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_36_63:28; @@ -1024,8 +984,6 @@ union cvmx_npei_dmax_ibuff_saddr { uint64_t reserved_36_63:28; #endif } cn52xxp1; - struct cvmx_npei_dmax_ibuff_saddr_s cn56xx; - struct cvmx_npei_dmax_ibuff_saddr_cn52xxp1 cn56xxp1; }; union cvmx_npei_dmax_naddr { @@ -1039,10 +997,6 @@ union cvmx_npei_dmax_naddr { uint64_t reserved_36_63:28; #endif } s; - struct cvmx_npei_dmax_naddr_s cn52xx; - struct cvmx_npei_dmax_naddr_s cn52xxp1; - struct cvmx_npei_dmax_naddr_s cn56xx; - struct cvmx_npei_dmax_naddr_s cn56xxp1; }; union cvmx_npei_dma0_int_level { @@ -1056,10 +1010,6 @@ union cvmx_npei_dma0_int_level { uint64_t time:32; #endif } s; - struct cvmx_npei_dma0_int_level_s cn52xx; - struct cvmx_npei_dma0_int_level_s cn52xxp1; - struct cvmx_npei_dma0_int_level_s cn56xx; - struct cvmx_npei_dma0_int_level_s cn56xxp1; }; union cvmx_npei_dma1_int_level { @@ -1073,10 +1023,6 @@ union cvmx_npei_dma1_int_level { uint64_t time:32; #endif } s; - struct cvmx_npei_dma1_int_level_s cn52xx; - struct cvmx_npei_dma1_int_level_s cn52xxp1; - struct cvmx_npei_dma1_int_level_s cn56xx; - struct cvmx_npei_dma1_int_level_s cn56xxp1; }; union cvmx_npei_dma_cnts { @@ -1090,10 +1036,6 @@ union cvmx_npei_dma_cnts { uint64_t dma1:32; #endif } s; - struct cvmx_npei_dma_cnts_s cn52xx; - struct cvmx_npei_dma_cnts_s cn52xxp1; - struct cvmx_npei_dma_cnts_s cn56xx; - struct cvmx_npei_dma_cnts_s cn56xxp1; }; union cvmx_npei_dma_control { @@ -1137,7 +1079,6 @@ union cvmx_npei_dma_control { uint64_t reserved_40_63:24; #endif } s; - struct cvmx_npei_dma_control_s cn52xx; struct cvmx_npei_dma_control_cn52xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_38_63:26; @@ -1173,7 +1114,6 @@ union cvmx_npei_dma_control { uint64_t reserved_38_63:26; #endif } cn52xxp1; - struct cvmx_npei_dma_control_s cn56xx; struct cvmx_npei_dma_control_cn56xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_39_63:25; @@ -1250,8 +1190,6 @@ union cvmx_npei_dma_pcie_req_num { uint64_t dma_arb:1; #endif } s; - struct cvmx_npei_dma_pcie_req_num_s cn52xx; - struct cvmx_npei_dma_pcie_req_num_s cn56xx; }; union cvmx_npei_dma_state1 { @@ -1273,7 +1211,6 @@ union cvmx_npei_dma_state1 { uint64_t reserved_40_63:24; #endif } s; - struct cvmx_npei_dma_state1_s cn52xx; }; union cvmx_npei_dma_state1_p1 { @@ -1332,7 +1269,6 @@ union cvmx_npei_dma_state1_p1 { uint64_t reserved_60_63:4; #endif } cn52xxp1; - struct cvmx_npei_dma_state1_p1_s cn56xxp1; }; union cvmx_npei_dma_state2 { @@ -1354,7 +1290,6 @@ union cvmx_npei_dma_state2 { uint64_t reserved_28_63:36; #endif } s; - struct cvmx_npei_dma_state2_s cn52xx; }; union cvmx_npei_dma_state2_p1 { @@ -1393,7 +1328,6 @@ union cvmx_npei_dma_state2_p1 { uint64_t reserved_45_63:19; #endif } cn52xxp1; - struct cvmx_npei_dma_state2_p1_s cn56xxp1; }; union cvmx_npei_dma_state3_p1 { @@ -1413,8 +1347,6 @@ union cvmx_npei_dma_state3_p1 { uint64_t reserved_60_63:4; #endif } s; - struct cvmx_npei_dma_state3_p1_s cn52xxp1; - struct cvmx_npei_dma_state3_p1_s cn56xxp1; }; union cvmx_npei_dma_state4_p1 { @@ -1434,8 +1366,6 @@ union cvmx_npei_dma_state4_p1 { uint64_t reserved_52_63:12; #endif } s; - struct cvmx_npei_dma_state4_p1_s cn52xxp1; - struct cvmx_npei_dma_state4_p1_s cn56xxp1; }; union cvmx_npei_dma_state5_p1 { @@ -1451,7 +1381,6 @@ union cvmx_npei_dma_state5_p1 { uint64_t reserved_28_63:36; #endif } s; - struct cvmx_npei_dma_state5_p1_s cn56xxp1; }; union cvmx_npei_int_a_enb { @@ -1483,7 +1412,6 @@ union cvmx_npei_int_a_enb { uint64_t reserved_10_63:54; #endif } s; - struct cvmx_npei_int_a_enb_s cn52xx; struct cvmx_npei_int_a_enb_cn52xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_2_63:62; @@ -1495,7 +1423,6 @@ union cvmx_npei_int_a_enb { uint64_t reserved_2_63:62; #endif } cn52xxp1; - struct cvmx_npei_int_a_enb_s cn56xx; }; union cvmx_npei_int_a_enb2 { @@ -1527,7 +1454,6 @@ union cvmx_npei_int_a_enb2 { uint64_t reserved_10_63:54; #endif } s; - struct cvmx_npei_int_a_enb2_s cn52xx; struct cvmx_npei_int_a_enb2_cn52xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_2_63:62; @@ -1539,7 +1465,6 @@ union cvmx_npei_int_a_enb2 { uint64_t reserved_2_63:62; #endif } cn52xxp1; - struct cvmx_npei_int_a_enb2_s cn56xx; }; union cvmx_npei_int_a_sum { @@ -1571,7 +1496,6 @@ union cvmx_npei_int_a_sum { uint64_t reserved_10_63:54; #endif } s; - struct cvmx_npei_int_a_sum_s cn52xx; struct cvmx_npei_int_a_sum_cn52xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_2_63:62; @@ -1583,7 +1507,6 @@ union cvmx_npei_int_a_sum { uint64_t reserved_2_63:62; #endif } cn52xxp1; - struct cvmx_npei_int_a_sum_s cn56xx; }; union cvmx_npei_int_enb { @@ -1721,7 +1644,6 @@ union cvmx_npei_int_enb { uint64_t mio_inta:1; #endif } s; - struct cvmx_npei_int_enb_s cn52xx; struct cvmx_npei_int_enb_cn52xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t mio_inta:1; @@ -1855,7 +1777,6 @@ union cvmx_npei_int_enb { uint64_t mio_inta:1; #endif } cn52xxp1; - struct cvmx_npei_int_enb_s cn56xx; struct cvmx_npei_int_enb_cn56xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t mio_inta:1; @@ -2122,7 +2043,6 @@ union cvmx_npei_int_enb2 { uint64_t reserved_62_63:2; #endif } s; - struct cvmx_npei_int_enb2_s cn52xx; struct cvmx_npei_int_enb2_cn52xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_62_63:2; @@ -2254,7 +2174,6 @@ union cvmx_npei_int_enb2 { uint64_t reserved_62_63:2; #endif } cn52xxp1; - struct cvmx_npei_int_enb2_s cn56xx; struct cvmx_npei_int_enb2_cn56xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_61_63:3; @@ -2399,9 +2318,6 @@ union cvmx_npei_int_info { uint64_t reserved_12_63:52; #endif } s; - struct cvmx_npei_int_info_s cn52xx; - struct cvmx_npei_int_info_s cn56xx; - struct cvmx_npei_int_info_s cn56xxp1; }; union cvmx_npei_int_sum { @@ -2539,7 +2455,6 @@ union cvmx_npei_int_sum { uint64_t mio_inta:1; #endif } s; - struct cvmx_npei_int_sum_s cn52xx; struct cvmx_npei_int_sum_cn52xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t mio_inta:1; @@ -2667,7 +2582,6 @@ union cvmx_npei_int_sum { uint64_t mio_inta:1; #endif } cn52xxp1; - struct cvmx_npei_int_sum_s cn56xx; struct cvmx_npei_int_sum_cn56xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t mio_inta:1; @@ -2924,9 +2838,6 @@ union cvmx_npei_int_sum2 { uint64_t mio_inta:1; #endif } s; - struct cvmx_npei_int_sum2_s cn52xx; - struct cvmx_npei_int_sum2_s cn52xxp1; - struct cvmx_npei_int_sum2_s cn56xx; }; union cvmx_npei_last_win_rdata0 { @@ -2938,10 +2849,6 @@ union cvmx_npei_last_win_rdata0 { uint64_t data:64; #endif } s; - struct cvmx_npei_last_win_rdata0_s cn52xx; - struct cvmx_npei_last_win_rdata0_s cn52xxp1; - struct cvmx_npei_last_win_rdata0_s cn56xx; - struct cvmx_npei_last_win_rdata0_s cn56xxp1; }; union cvmx_npei_last_win_rdata1 { @@ -2953,10 +2860,6 @@ union cvmx_npei_last_win_rdata1 { uint64_t data:64; #endif } s; - struct cvmx_npei_last_win_rdata1_s cn52xx; - struct cvmx_npei_last_win_rdata1_s cn52xxp1; - struct cvmx_npei_last_win_rdata1_s cn56xx; - struct cvmx_npei_last_win_rdata1_s cn56xxp1; }; union cvmx_npei_mem_access_ctl { @@ -2972,10 +2875,6 @@ union cvmx_npei_mem_access_ctl { uint64_t reserved_14_63:50; #endif } s; - struct cvmx_npei_mem_access_ctl_s cn52xx; - struct cvmx_npei_mem_access_ctl_s cn52xxp1; - struct cvmx_npei_mem_access_ctl_s cn56xx; - struct cvmx_npei_mem_access_ctl_s cn56xxp1; }; union cvmx_npei_mem_access_subidx { @@ -3007,10 +2906,6 @@ union cvmx_npei_mem_access_subidx { uint64_t reserved_42_63:22; #endif } s; - struct cvmx_npei_mem_access_subidx_s cn52xx; - struct cvmx_npei_mem_access_subidx_s cn52xxp1; - struct cvmx_npei_mem_access_subidx_s cn56xx; - struct cvmx_npei_mem_access_subidx_s cn56xxp1; }; union cvmx_npei_msi_enb0 { @@ -3022,10 +2917,6 @@ union cvmx_npei_msi_enb0 { uint64_t enb:64; #endif } s; - struct cvmx_npei_msi_enb0_s cn52xx; - struct cvmx_npei_msi_enb0_s cn52xxp1; - struct cvmx_npei_msi_enb0_s cn56xx; - struct cvmx_npei_msi_enb0_s cn56xxp1; }; union cvmx_npei_msi_enb1 { @@ -3037,10 +2928,6 @@ union cvmx_npei_msi_enb1 { uint64_t enb:64; #endif } s; - struct cvmx_npei_msi_enb1_s cn52xx; - struct cvmx_npei_msi_enb1_s cn52xxp1; - struct cvmx_npei_msi_enb1_s cn56xx; - struct cvmx_npei_msi_enb1_s cn56xxp1; }; union cvmx_npei_msi_enb2 { @@ -3052,10 +2939,6 @@ union cvmx_npei_msi_enb2 { uint64_t enb:64; #endif } s; - struct cvmx_npei_msi_enb2_s cn52xx; - struct cvmx_npei_msi_enb2_s cn52xxp1; - struct cvmx_npei_msi_enb2_s cn56xx; - struct cvmx_npei_msi_enb2_s cn56xxp1; }; union cvmx_npei_msi_enb3 { @@ -3067,10 +2950,6 @@ union cvmx_npei_msi_enb3 { uint64_t enb:64; #endif } s; - struct cvmx_npei_msi_enb3_s cn52xx; - struct cvmx_npei_msi_enb3_s cn52xxp1; - struct cvmx_npei_msi_enb3_s cn56xx; - struct cvmx_npei_msi_enb3_s cn56xxp1; }; union cvmx_npei_msi_rcv0 { @@ -3082,10 +2961,6 @@ union cvmx_npei_msi_rcv0 { uint64_t intr:64; #endif } s; - struct cvmx_npei_msi_rcv0_s cn52xx; - struct cvmx_npei_msi_rcv0_s cn52xxp1; - struct cvmx_npei_msi_rcv0_s cn56xx; - struct cvmx_npei_msi_rcv0_s cn56xxp1; }; union cvmx_npei_msi_rcv1 { @@ -3097,10 +2972,6 @@ union cvmx_npei_msi_rcv1 { uint64_t intr:64; #endif } s; - struct cvmx_npei_msi_rcv1_s cn52xx; - struct cvmx_npei_msi_rcv1_s cn52xxp1; - struct cvmx_npei_msi_rcv1_s cn56xx; - struct cvmx_npei_msi_rcv1_s cn56xxp1; }; union cvmx_npei_msi_rcv2 { @@ -3112,10 +2983,6 @@ union cvmx_npei_msi_rcv2 { uint64_t intr:64; #endif } s; - struct cvmx_npei_msi_rcv2_s cn52xx; - struct cvmx_npei_msi_rcv2_s cn52xxp1; - struct cvmx_npei_msi_rcv2_s cn56xx; - struct cvmx_npei_msi_rcv2_s cn56xxp1; }; union cvmx_npei_msi_rcv3 { @@ -3127,10 +2994,6 @@ union cvmx_npei_msi_rcv3 { uint64_t intr:64; #endif } s; - struct cvmx_npei_msi_rcv3_s cn52xx; - struct cvmx_npei_msi_rcv3_s cn52xxp1; - struct cvmx_npei_msi_rcv3_s cn56xx; - struct cvmx_npei_msi_rcv3_s cn56xxp1; }; union cvmx_npei_msi_rd_map { @@ -3146,10 +3009,6 @@ union cvmx_npei_msi_rd_map { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_npei_msi_rd_map_s cn52xx; - struct cvmx_npei_msi_rd_map_s cn52xxp1; - struct cvmx_npei_msi_rd_map_s cn56xx; - struct cvmx_npei_msi_rd_map_s cn56xxp1; }; union cvmx_npei_msi_w1c_enb0 { @@ -3161,8 +3020,6 @@ union cvmx_npei_msi_w1c_enb0 { uint64_t clr:64; #endif } s; - struct cvmx_npei_msi_w1c_enb0_s cn52xx; - struct cvmx_npei_msi_w1c_enb0_s cn56xx; }; union cvmx_npei_msi_w1c_enb1 { @@ -3174,8 +3031,6 @@ union cvmx_npei_msi_w1c_enb1 { uint64_t clr:64; #endif } s; - struct cvmx_npei_msi_w1c_enb1_s cn52xx; - struct cvmx_npei_msi_w1c_enb1_s cn56xx; }; union cvmx_npei_msi_w1c_enb2 { @@ -3187,8 +3042,6 @@ union cvmx_npei_msi_w1c_enb2 { uint64_t clr:64; #endif } s; - struct cvmx_npei_msi_w1c_enb2_s cn52xx; - struct cvmx_npei_msi_w1c_enb2_s cn56xx; }; union cvmx_npei_msi_w1c_enb3 { @@ -3200,8 +3053,6 @@ union cvmx_npei_msi_w1c_enb3 { uint64_t clr:64; #endif } s; - struct cvmx_npei_msi_w1c_enb3_s cn52xx; - struct cvmx_npei_msi_w1c_enb3_s cn56xx; }; union cvmx_npei_msi_w1s_enb0 { @@ -3213,8 +3064,6 @@ union cvmx_npei_msi_w1s_enb0 { uint64_t set:64; #endif } s; - struct cvmx_npei_msi_w1s_enb0_s cn52xx; - struct cvmx_npei_msi_w1s_enb0_s cn56xx; }; union cvmx_npei_msi_w1s_enb1 { @@ -3226,8 +3075,6 @@ union cvmx_npei_msi_w1s_enb1 { uint64_t set:64; #endif } s; - struct cvmx_npei_msi_w1s_enb1_s cn52xx; - struct cvmx_npei_msi_w1s_enb1_s cn56xx; }; union cvmx_npei_msi_w1s_enb2 { @@ -3239,8 +3086,6 @@ union cvmx_npei_msi_w1s_enb2 { uint64_t set:64; #endif } s; - struct cvmx_npei_msi_w1s_enb2_s cn52xx; - struct cvmx_npei_msi_w1s_enb2_s cn56xx; }; union cvmx_npei_msi_w1s_enb3 { @@ -3252,8 +3097,6 @@ union cvmx_npei_msi_w1s_enb3 { uint64_t set:64; #endif } s; - struct cvmx_npei_msi_w1s_enb3_s cn52xx; - struct cvmx_npei_msi_w1s_enb3_s cn56xx; }; union cvmx_npei_msi_wr_map { @@ -3269,10 +3112,6 @@ union cvmx_npei_msi_wr_map { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_npei_msi_wr_map_s cn52xx; - struct cvmx_npei_msi_wr_map_s cn52xxp1; - struct cvmx_npei_msi_wr_map_s cn56xx; - struct cvmx_npei_msi_wr_map_s cn56xxp1; }; union cvmx_npei_pcie_credit_cnt { @@ -3296,8 +3135,6 @@ union cvmx_npei_pcie_credit_cnt { uint64_t reserved_48_63:16; #endif } s; - struct cvmx_npei_pcie_credit_cnt_s cn52xx; - struct cvmx_npei_pcie_credit_cnt_s cn56xx; }; union cvmx_npei_pcie_msi_rcv { @@ -3311,10 +3148,6 @@ union cvmx_npei_pcie_msi_rcv { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_npei_pcie_msi_rcv_s cn52xx; - struct cvmx_npei_pcie_msi_rcv_s cn52xxp1; - struct cvmx_npei_pcie_msi_rcv_s cn56xx; - struct cvmx_npei_pcie_msi_rcv_s cn56xxp1; }; union cvmx_npei_pcie_msi_rcv_b1 { @@ -3330,10 +3163,6 @@ union cvmx_npei_pcie_msi_rcv_b1 { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_npei_pcie_msi_rcv_b1_s cn52xx; - struct cvmx_npei_pcie_msi_rcv_b1_s cn52xxp1; - struct cvmx_npei_pcie_msi_rcv_b1_s cn56xx; - struct cvmx_npei_pcie_msi_rcv_b1_s cn56xxp1; }; union cvmx_npei_pcie_msi_rcv_b2 { @@ -3349,10 +3178,6 @@ union cvmx_npei_pcie_msi_rcv_b2 { uint64_t reserved_24_63:40; #endif } s; - struct cvmx_npei_pcie_msi_rcv_b2_s cn52xx; - struct cvmx_npei_pcie_msi_rcv_b2_s cn52xxp1; - struct cvmx_npei_pcie_msi_rcv_b2_s cn56xx; - struct cvmx_npei_pcie_msi_rcv_b2_s cn56xxp1; }; union cvmx_npei_pcie_msi_rcv_b3 { @@ -3368,10 +3193,6 @@ union cvmx_npei_pcie_msi_rcv_b3 { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_npei_pcie_msi_rcv_b3_s cn52xx; - struct cvmx_npei_pcie_msi_rcv_b3_s cn52xxp1; - struct cvmx_npei_pcie_msi_rcv_b3_s cn56xx; - struct cvmx_npei_pcie_msi_rcv_b3_s cn56xxp1; }; union cvmx_npei_pktx_cnts { @@ -3387,8 +3208,6 @@ union cvmx_npei_pktx_cnts { uint64_t reserved_54_63:10; #endif } s; - struct cvmx_npei_pktx_cnts_s cn52xx; - struct cvmx_npei_pktx_cnts_s cn56xx; }; union cvmx_npei_pktx_in_bp { @@ -3402,8 +3221,6 @@ union cvmx_npei_pktx_in_bp { uint64_t wmark:32; #endif } s; - struct cvmx_npei_pktx_in_bp_s cn52xx; - struct cvmx_npei_pktx_in_bp_s cn56xx; }; union cvmx_npei_pktx_instr_baddr { @@ -3417,8 +3234,6 @@ union cvmx_npei_pktx_instr_baddr { uint64_t addr:61; #endif } s; - struct cvmx_npei_pktx_instr_baddr_s cn52xx; - struct cvmx_npei_pktx_instr_baddr_s cn56xx; }; union cvmx_npei_pktx_instr_baoff_dbell { @@ -3432,8 +3247,6 @@ union cvmx_npei_pktx_instr_baoff_dbell { uint64_t aoff:32; #endif } s; - struct cvmx_npei_pktx_instr_baoff_dbell_s cn52xx; - struct cvmx_npei_pktx_instr_baoff_dbell_s cn56xx; }; union cvmx_npei_pktx_instr_fifo_rsize { @@ -3453,8 +3266,6 @@ union cvmx_npei_pktx_instr_fifo_rsize { uint64_t max:9; #endif } s; - struct cvmx_npei_pktx_instr_fifo_rsize_s cn52xx; - struct cvmx_npei_pktx_instr_fifo_rsize_s cn56xx; }; union cvmx_npei_pktx_instr_header { @@ -3490,8 +3301,6 @@ union cvmx_npei_pktx_instr_header { uint64_t reserved_44_63:20; #endif } s; - struct cvmx_npei_pktx_instr_header_s cn52xx; - struct cvmx_npei_pktx_instr_header_s cn56xx; }; union cvmx_npei_pktx_slist_baddr { @@ -3505,8 +3314,6 @@ union cvmx_npei_pktx_slist_baddr { uint64_t addr:60; #endif } s; - struct cvmx_npei_pktx_slist_baddr_s cn52xx; - struct cvmx_npei_pktx_slist_baddr_s cn56xx; }; union cvmx_npei_pktx_slist_baoff_dbell { @@ -3520,8 +3327,6 @@ union cvmx_npei_pktx_slist_baoff_dbell { uint64_t aoff:32; #endif } s; - struct cvmx_npei_pktx_slist_baoff_dbell_s cn52xx; - struct cvmx_npei_pktx_slist_baoff_dbell_s cn56xx; }; union cvmx_npei_pktx_slist_fifo_rsize { @@ -3535,8 +3340,6 @@ union cvmx_npei_pktx_slist_fifo_rsize { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_npei_pktx_slist_fifo_rsize_s cn52xx; - struct cvmx_npei_pktx_slist_fifo_rsize_s cn56xx; }; union cvmx_npei_pkt_cnt_int { @@ -3550,8 +3353,6 @@ union cvmx_npei_pkt_cnt_int { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_npei_pkt_cnt_int_s cn52xx; - struct cvmx_npei_pkt_cnt_int_s cn56xx; }; union cvmx_npei_pkt_cnt_int_enb { @@ -3565,8 +3366,6 @@ union cvmx_npei_pkt_cnt_int_enb { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_npei_pkt_cnt_int_enb_s cn52xx; - struct cvmx_npei_pkt_cnt_int_enb_s cn56xx; }; union cvmx_npei_pkt_data_out_es { @@ -3578,8 +3377,6 @@ union cvmx_npei_pkt_data_out_es { uint64_t es:64; #endif } s; - struct cvmx_npei_pkt_data_out_es_s cn52xx; - struct cvmx_npei_pkt_data_out_es_s cn56xx; }; union cvmx_npei_pkt_data_out_ns { @@ -3593,8 +3390,6 @@ union cvmx_npei_pkt_data_out_ns { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_npei_pkt_data_out_ns_s cn52xx; - struct cvmx_npei_pkt_data_out_ns_s cn56xx; }; union cvmx_npei_pkt_data_out_ror { @@ -3608,8 +3403,6 @@ union cvmx_npei_pkt_data_out_ror { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_npei_pkt_data_out_ror_s cn52xx; - struct cvmx_npei_pkt_data_out_ror_s cn56xx; }; union cvmx_npei_pkt_dpaddr { @@ -3623,8 +3416,6 @@ union cvmx_npei_pkt_dpaddr { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_npei_pkt_dpaddr_s cn52xx; - struct cvmx_npei_pkt_dpaddr_s cn56xx; }; union cvmx_npei_pkt_in_bp { @@ -3638,8 +3429,6 @@ union cvmx_npei_pkt_in_bp { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_npei_pkt_in_bp_s cn52xx; - struct cvmx_npei_pkt_in_bp_s cn56xx; }; union cvmx_npei_pkt_in_donex_cnts { @@ -3653,8 +3442,6 @@ union cvmx_npei_pkt_in_donex_cnts { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_npei_pkt_in_donex_cnts_s cn52xx; - struct cvmx_npei_pkt_in_donex_cnts_s cn56xx; }; union cvmx_npei_pkt_in_instr_counts { @@ -3668,8 +3455,6 @@ union cvmx_npei_pkt_in_instr_counts { uint64_t wr_cnt:32; #endif } s; - struct cvmx_npei_pkt_in_instr_counts_s cn52xx; - struct cvmx_npei_pkt_in_instr_counts_s cn56xx; }; union cvmx_npei_pkt_in_pcie_port { @@ -3681,8 +3466,6 @@ union cvmx_npei_pkt_in_pcie_port { uint64_t pp:64; #endif } s; - struct cvmx_npei_pkt_in_pcie_port_s cn52xx; - struct cvmx_npei_pkt_in_pcie_port_s cn56xx; }; union cvmx_npei_pkt_input_control { @@ -3712,8 +3495,6 @@ union cvmx_npei_pkt_input_control { uint64_t reserved_23_63:41; #endif } s; - struct cvmx_npei_pkt_input_control_s cn52xx; - struct cvmx_npei_pkt_input_control_s cn56xx; }; union cvmx_npei_pkt_instr_enb { @@ -3727,8 +3508,6 @@ union cvmx_npei_pkt_instr_enb { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_npei_pkt_instr_enb_s cn52xx; - struct cvmx_npei_pkt_instr_enb_s cn56xx; }; union cvmx_npei_pkt_instr_rd_size { @@ -3740,8 +3519,6 @@ union cvmx_npei_pkt_instr_rd_size { uint64_t rdsize:64; #endif } s; - struct cvmx_npei_pkt_instr_rd_size_s cn52xx; - struct cvmx_npei_pkt_instr_rd_size_s cn56xx; }; union cvmx_npei_pkt_instr_size { @@ -3755,8 +3532,6 @@ union cvmx_npei_pkt_instr_size { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_npei_pkt_instr_size_s cn52xx; - struct cvmx_npei_pkt_instr_size_s cn56xx; }; union cvmx_npei_pkt_int_levels { @@ -3772,8 +3547,6 @@ union cvmx_npei_pkt_int_levels { uint64_t reserved_54_63:10; #endif } s; - struct cvmx_npei_pkt_int_levels_s cn52xx; - struct cvmx_npei_pkt_int_levels_s cn56xx; }; union cvmx_npei_pkt_iptr { @@ -3787,8 +3560,6 @@ union cvmx_npei_pkt_iptr { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_npei_pkt_iptr_s cn52xx; - struct cvmx_npei_pkt_iptr_s cn56xx; }; union cvmx_npei_pkt_out_bmode { @@ -3802,8 +3573,6 @@ union cvmx_npei_pkt_out_bmode { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_npei_pkt_out_bmode_s cn52xx; - struct cvmx_npei_pkt_out_bmode_s cn56xx; }; union cvmx_npei_pkt_out_enb { @@ -3817,8 +3586,6 @@ union cvmx_npei_pkt_out_enb { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_npei_pkt_out_enb_s cn52xx; - struct cvmx_npei_pkt_out_enb_s cn56xx; }; union cvmx_npei_pkt_output_wmark { @@ -3832,8 +3599,6 @@ union cvmx_npei_pkt_output_wmark { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_npei_pkt_output_wmark_s cn52xx; - struct cvmx_npei_pkt_output_wmark_s cn56xx; }; union cvmx_npei_pkt_pcie_port { @@ -3845,8 +3610,6 @@ union cvmx_npei_pkt_pcie_port { uint64_t pp:64; #endif } s; - struct cvmx_npei_pkt_pcie_port_s cn52xx; - struct cvmx_npei_pkt_pcie_port_s cn56xx; }; union cvmx_npei_pkt_port_in_rst { @@ -3860,8 +3623,6 @@ union cvmx_npei_pkt_port_in_rst { uint64_t in_rst:32; #endif } s; - struct cvmx_npei_pkt_port_in_rst_s cn52xx; - struct cvmx_npei_pkt_port_in_rst_s cn56xx; }; union cvmx_npei_pkt_slist_es { @@ -3873,8 +3634,6 @@ union cvmx_npei_pkt_slist_es { uint64_t es:64; #endif } s; - struct cvmx_npei_pkt_slist_es_s cn52xx; - struct cvmx_npei_pkt_slist_es_s cn56xx; }; union cvmx_npei_pkt_slist_id_size { @@ -3890,8 +3649,6 @@ union cvmx_npei_pkt_slist_id_size { uint64_t reserved_23_63:41; #endif } s; - struct cvmx_npei_pkt_slist_id_size_s cn52xx; - struct cvmx_npei_pkt_slist_id_size_s cn56xx; }; union cvmx_npei_pkt_slist_ns { @@ -3905,8 +3662,6 @@ union cvmx_npei_pkt_slist_ns { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_npei_pkt_slist_ns_s cn52xx; - struct cvmx_npei_pkt_slist_ns_s cn56xx; }; union cvmx_npei_pkt_slist_ror { @@ -3920,8 +3675,6 @@ union cvmx_npei_pkt_slist_ror { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_npei_pkt_slist_ror_s cn52xx; - struct cvmx_npei_pkt_slist_ror_s cn56xx; }; union cvmx_npei_pkt_time_int { @@ -3935,8 +3688,6 @@ union cvmx_npei_pkt_time_int { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_npei_pkt_time_int_s cn52xx; - struct cvmx_npei_pkt_time_int_s cn56xx; }; union cvmx_npei_pkt_time_int_enb { @@ -3950,8 +3701,6 @@ union cvmx_npei_pkt_time_int_enb { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_npei_pkt_time_int_enb_s cn52xx; - struct cvmx_npei_pkt_time_int_enb_s cn56xx; }; union cvmx_npei_rsl_int_blocks { @@ -4019,10 +3768,6 @@ union cvmx_npei_rsl_int_blocks { uint64_t reserved_31_63:33; #endif } s; - struct cvmx_npei_rsl_int_blocks_s cn52xx; - struct cvmx_npei_rsl_int_blocks_s cn52xxp1; - struct cvmx_npei_rsl_int_blocks_s cn56xx; - struct cvmx_npei_rsl_int_blocks_s cn56xxp1; }; union cvmx_npei_scratch_1 { @@ -4034,10 +3779,6 @@ union cvmx_npei_scratch_1 { uint64_t data:64; #endif } s; - struct cvmx_npei_scratch_1_s cn52xx; - struct cvmx_npei_scratch_1_s cn52xxp1; - struct cvmx_npei_scratch_1_s cn56xx; - struct cvmx_npei_scratch_1_s cn56xxp1; }; union cvmx_npei_state1 { @@ -4055,10 +3796,6 @@ union cvmx_npei_state1 { uint64_t cpl1:12; #endif } s; - struct cvmx_npei_state1_s cn52xx; - struct cvmx_npei_state1_s cn52xxp1; - struct cvmx_npei_state1_s cn56xx; - struct cvmx_npei_state1_s cn56xxp1; }; union cvmx_npei_state2 { @@ -4082,10 +3819,6 @@ union cvmx_npei_state2 { uint64_t reserved_48_63:16; #endif } s; - struct cvmx_npei_state2_s cn52xx; - struct cvmx_npei_state2_s cn52xxp1; - struct cvmx_npei_state2_s cn56xx; - struct cvmx_npei_state2_s cn56xxp1; }; union cvmx_npei_state3 { @@ -4105,10 +3838,6 @@ union cvmx_npei_state3 { uint64_t reserved_56_63:8; #endif } s; - struct cvmx_npei_state3_s cn52xx; - struct cvmx_npei_state3_s cn52xxp1; - struct cvmx_npei_state3_s cn56xx; - struct cvmx_npei_state3_s cn56xxp1; }; union cvmx_npei_win_rd_addr { @@ -4126,10 +3855,6 @@ union cvmx_npei_win_rd_addr { uint64_t reserved_51_63:13; #endif } s; - struct cvmx_npei_win_rd_addr_s cn52xx; - struct cvmx_npei_win_rd_addr_s cn52xxp1; - struct cvmx_npei_win_rd_addr_s cn56xx; - struct cvmx_npei_win_rd_addr_s cn56xxp1; }; union cvmx_npei_win_rd_data { @@ -4141,10 +3866,6 @@ union cvmx_npei_win_rd_data { uint64_t rd_data:64; #endif } s; - struct cvmx_npei_win_rd_data_s cn52xx; - struct cvmx_npei_win_rd_data_s cn52xxp1; - struct cvmx_npei_win_rd_data_s cn56xx; - struct cvmx_npei_win_rd_data_s cn56xxp1; }; union cvmx_npei_win_wr_addr { @@ -4162,10 +3883,6 @@ union cvmx_npei_win_wr_addr { uint64_t reserved_49_63:15; #endif } s; - struct cvmx_npei_win_wr_addr_s cn52xx; - struct cvmx_npei_win_wr_addr_s cn52xxp1; - struct cvmx_npei_win_wr_addr_s cn56xx; - struct cvmx_npei_win_wr_addr_s cn56xxp1; }; union cvmx_npei_win_wr_data { @@ -4177,10 +3894,6 @@ union cvmx_npei_win_wr_data { uint64_t wr_data:64; #endif } s; - struct cvmx_npei_win_wr_data_s cn52xx; - struct cvmx_npei_win_wr_data_s cn52xxp1; - struct cvmx_npei_win_wr_data_s cn56xx; - struct cvmx_npei_win_wr_data_s cn56xxp1; }; union cvmx_npei_win_wr_mask { @@ -4194,10 +3907,6 @@ union cvmx_npei_win_wr_mask { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_npei_win_wr_mask_s cn52xx; - struct cvmx_npei_win_wr_mask_s cn52xxp1; - struct cvmx_npei_win_wr_mask_s cn56xx; - struct cvmx_npei_win_wr_mask_s cn56xxp1; }; union cvmx_npei_window_ctl { @@ -4211,10 +3920,6 @@ union cvmx_npei_window_ctl { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_npei_window_ctl_s cn52xx; - struct cvmx_npei_window_ctl_s cn52xxp1; - struct cvmx_npei_window_ctl_s cn56xx; - struct cvmx_npei_window_ctl_s cn56xxp1; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-npi-defs.h b/arch/mips/include/asm/octeon/cvmx-npi-defs.h index 129bb250e534..ba4967fda480 100644 --- a/arch/mips/include/asm/octeon/cvmx-npi-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-npi-defs.h @@ -160,13 +160,6 @@ union cvmx_npi_base_addr_inputx { uint64_t baddr:61; #endif } s; - struct cvmx_npi_base_addr_inputx_s cn30xx; - struct cvmx_npi_base_addr_inputx_s cn31xx; - struct cvmx_npi_base_addr_inputx_s cn38xx; - struct cvmx_npi_base_addr_inputx_s cn38xxp2; - struct cvmx_npi_base_addr_inputx_s cn50xx; - struct cvmx_npi_base_addr_inputx_s cn58xx; - struct cvmx_npi_base_addr_inputx_s cn58xxp1; }; union cvmx_npi_base_addr_outputx { @@ -180,13 +173,6 @@ union cvmx_npi_base_addr_outputx { uint64_t baddr:61; #endif } s; - struct cvmx_npi_base_addr_outputx_s cn30xx; - struct cvmx_npi_base_addr_outputx_s cn31xx; - struct cvmx_npi_base_addr_outputx_s cn38xx; - struct cvmx_npi_base_addr_outputx_s cn38xxp2; - struct cvmx_npi_base_addr_outputx_s cn50xx; - struct cvmx_npi_base_addr_outputx_s cn58xx; - struct cvmx_npi_base_addr_outputx_s cn58xxp1; }; union cvmx_npi_bist_status { @@ -281,9 +267,6 @@ union cvmx_npi_bist_status { uint64_t reserved_20_63:44; #endif } cn30xx; - struct cvmx_npi_bist_status_s cn31xx; - struct cvmx_npi_bist_status_s cn38xx; - struct cvmx_npi_bist_status_s cn38xxp2; struct cvmx_npi_bist_status_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_20_63:44; @@ -329,8 +312,6 @@ union cvmx_npi_bist_status { uint64_t reserved_20_63:44; #endif } cn50xx; - struct cvmx_npi_bist_status_s cn58xx; - struct cvmx_npi_bist_status_s cn58xxp1; }; union cvmx_npi_buff_size_outputx { @@ -346,13 +327,6 @@ union cvmx_npi_buff_size_outputx { uint64_t reserved_23_63:41; #endif } s; - struct cvmx_npi_buff_size_outputx_s cn30xx; - struct cvmx_npi_buff_size_outputx_s cn31xx; - struct cvmx_npi_buff_size_outputx_s cn38xx; - struct cvmx_npi_buff_size_outputx_s cn38xxp2; - struct cvmx_npi_buff_size_outputx_s cn50xx; - struct cvmx_npi_buff_size_outputx_s cn58xx; - struct cvmx_npi_buff_size_outputx_s cn58xxp1; }; union cvmx_npi_comp_ctl { @@ -368,9 +342,6 @@ union cvmx_npi_comp_ctl { uint64_t reserved_10_63:54; #endif } s; - struct cvmx_npi_comp_ctl_s cn50xx; - struct cvmx_npi_comp_ctl_s cn58xx; - struct cvmx_npi_comp_ctl_s cn58xxp1; }; union cvmx_npi_ctl_status { @@ -498,11 +469,6 @@ union cvmx_npi_ctl_status { uint64_t reserved_63_63:1; #endif } cn31xx; - struct cvmx_npi_ctl_status_s cn38xx; - struct cvmx_npi_ctl_status_s cn38xxp2; - struct cvmx_npi_ctl_status_cn31xx cn50xx; - struct cvmx_npi_ctl_status_s cn58xx; - struct cvmx_npi_ctl_status_s cn58xxp1; }; union cvmx_npi_dbg_select { @@ -516,13 +482,6 @@ union cvmx_npi_dbg_select { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_npi_dbg_select_s cn30xx; - struct cvmx_npi_dbg_select_s cn31xx; - struct cvmx_npi_dbg_select_s cn38xx; - struct cvmx_npi_dbg_select_s cn38xxp2; - struct cvmx_npi_dbg_select_s cn50xx; - struct cvmx_npi_dbg_select_s cn58xx; - struct cvmx_npi_dbg_select_s cn58xxp1; }; union cvmx_npi_dma_control { @@ -558,13 +517,6 @@ union cvmx_npi_dma_control { uint64_t reserved_36_63:28; #endif } s; - struct cvmx_npi_dma_control_s cn30xx; - struct cvmx_npi_dma_control_s cn31xx; - struct cvmx_npi_dma_control_s cn38xx; - struct cvmx_npi_dma_control_s cn38xxp2; - struct cvmx_npi_dma_control_s cn50xx; - struct cvmx_npi_dma_control_s cn58xx; - struct cvmx_npi_dma_control_s cn58xxp1; }; union cvmx_npi_dma_highp_counts { @@ -580,13 +532,6 @@ union cvmx_npi_dma_highp_counts { uint64_t reserved_39_63:25; #endif } s; - struct cvmx_npi_dma_highp_counts_s cn30xx; - struct cvmx_npi_dma_highp_counts_s cn31xx; - struct cvmx_npi_dma_highp_counts_s cn38xx; - struct cvmx_npi_dma_highp_counts_s cn38xxp2; - struct cvmx_npi_dma_highp_counts_s cn50xx; - struct cvmx_npi_dma_highp_counts_s cn58xx; - struct cvmx_npi_dma_highp_counts_s cn58xxp1; }; union cvmx_npi_dma_highp_naddr { @@ -602,13 +547,6 @@ union cvmx_npi_dma_highp_naddr { uint64_t reserved_40_63:24; #endif } s; - struct cvmx_npi_dma_highp_naddr_s cn30xx; - struct cvmx_npi_dma_highp_naddr_s cn31xx; - struct cvmx_npi_dma_highp_naddr_s cn38xx; - struct cvmx_npi_dma_highp_naddr_s cn38xxp2; - struct cvmx_npi_dma_highp_naddr_s cn50xx; - struct cvmx_npi_dma_highp_naddr_s cn58xx; - struct cvmx_npi_dma_highp_naddr_s cn58xxp1; }; union cvmx_npi_dma_lowp_counts { @@ -624,13 +562,6 @@ union cvmx_npi_dma_lowp_counts { uint64_t reserved_39_63:25; #endif } s; - struct cvmx_npi_dma_lowp_counts_s cn30xx; - struct cvmx_npi_dma_lowp_counts_s cn31xx; - struct cvmx_npi_dma_lowp_counts_s cn38xx; - struct cvmx_npi_dma_lowp_counts_s cn38xxp2; - struct cvmx_npi_dma_lowp_counts_s cn50xx; - struct cvmx_npi_dma_lowp_counts_s cn58xx; - struct cvmx_npi_dma_lowp_counts_s cn58xxp1; }; union cvmx_npi_dma_lowp_naddr { @@ -646,13 +577,6 @@ union cvmx_npi_dma_lowp_naddr { uint64_t reserved_40_63:24; #endif } s; - struct cvmx_npi_dma_lowp_naddr_s cn30xx; - struct cvmx_npi_dma_lowp_naddr_s cn31xx; - struct cvmx_npi_dma_lowp_naddr_s cn38xx; - struct cvmx_npi_dma_lowp_naddr_s cn38xxp2; - struct cvmx_npi_dma_lowp_naddr_s cn50xx; - struct cvmx_npi_dma_lowp_naddr_s cn58xx; - struct cvmx_npi_dma_lowp_naddr_s cn58xxp1; }; union cvmx_npi_highp_dbell { @@ -666,13 +590,6 @@ union cvmx_npi_highp_dbell { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_npi_highp_dbell_s cn30xx; - struct cvmx_npi_highp_dbell_s cn31xx; - struct cvmx_npi_highp_dbell_s cn38xx; - struct cvmx_npi_highp_dbell_s cn38xxp2; - struct cvmx_npi_highp_dbell_s cn50xx; - struct cvmx_npi_highp_dbell_s cn58xx; - struct cvmx_npi_highp_dbell_s cn58xxp1; }; union cvmx_npi_highp_ibuff_saddr { @@ -686,13 +603,6 @@ union cvmx_npi_highp_ibuff_saddr { uint64_t reserved_36_63:28; #endif } s; - struct cvmx_npi_highp_ibuff_saddr_s cn30xx; - struct cvmx_npi_highp_ibuff_saddr_s cn31xx; - struct cvmx_npi_highp_ibuff_saddr_s cn38xx; - struct cvmx_npi_highp_ibuff_saddr_s cn38xxp2; - struct cvmx_npi_highp_ibuff_saddr_s cn50xx; - struct cvmx_npi_highp_ibuff_saddr_s cn58xx; - struct cvmx_npi_highp_ibuff_saddr_s cn58xxp1; }; union cvmx_npi_input_control { @@ -745,12 +655,6 @@ union cvmx_npi_input_control { uint64_t reserved_22_63:42; #endif } cn30xx; - struct cvmx_npi_input_control_cn30xx cn31xx; - struct cvmx_npi_input_control_s cn38xx; - struct cvmx_npi_input_control_cn30xx cn38xxp2; - struct cvmx_npi_input_control_s cn50xx; - struct cvmx_npi_input_control_s cn58xx; - struct cvmx_npi_input_control_s cn58xxp1; }; union cvmx_npi_int_enb { @@ -1094,7 +998,6 @@ union cvmx_npi_int_enb { uint64_t reserved_62_63:2; #endif } cn31xx; - struct cvmx_npi_int_enb_s cn38xx; struct cvmx_npi_int_enb_cn38xxp2 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_42_63:22; @@ -1186,9 +1089,6 @@ union cvmx_npi_int_enb { uint64_t reserved_42_63:22; #endif } cn38xxp2; - struct cvmx_npi_int_enb_cn31xx cn50xx; - struct cvmx_npi_int_enb_s cn58xx; - struct cvmx_npi_int_enb_s cn58xxp1; }; union cvmx_npi_int_sum { @@ -1532,7 +1432,6 @@ union cvmx_npi_int_sum { uint64_t reserved_62_63:2; #endif } cn31xx; - struct cvmx_npi_int_sum_s cn38xx; struct cvmx_npi_int_sum_cn38xxp2 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_42_63:22; @@ -1624,9 +1523,6 @@ union cvmx_npi_int_sum { uint64_t reserved_42_63:22; #endif } cn38xxp2; - struct cvmx_npi_int_sum_cn31xx cn50xx; - struct cvmx_npi_int_sum_s cn58xx; - struct cvmx_npi_int_sum_s cn58xxp1; }; union cvmx_npi_lowp_dbell { @@ -1640,13 +1536,6 @@ union cvmx_npi_lowp_dbell { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_npi_lowp_dbell_s cn30xx; - struct cvmx_npi_lowp_dbell_s cn31xx; - struct cvmx_npi_lowp_dbell_s cn38xx; - struct cvmx_npi_lowp_dbell_s cn38xxp2; - struct cvmx_npi_lowp_dbell_s cn50xx; - struct cvmx_npi_lowp_dbell_s cn58xx; - struct cvmx_npi_lowp_dbell_s cn58xxp1; }; union cvmx_npi_lowp_ibuff_saddr { @@ -1660,13 +1549,6 @@ union cvmx_npi_lowp_ibuff_saddr { uint64_t reserved_36_63:28; #endif } s; - struct cvmx_npi_lowp_ibuff_saddr_s cn30xx; - struct cvmx_npi_lowp_ibuff_saddr_s cn31xx; - struct cvmx_npi_lowp_ibuff_saddr_s cn38xx; - struct cvmx_npi_lowp_ibuff_saddr_s cn38xxp2; - struct cvmx_npi_lowp_ibuff_saddr_s cn50xx; - struct cvmx_npi_lowp_ibuff_saddr_s cn58xx; - struct cvmx_npi_lowp_ibuff_saddr_s cn58xxp1; }; union cvmx_npi_mem_access_subidx { @@ -1696,7 +1578,6 @@ union cvmx_npi_mem_access_subidx { uint64_t reserved_38_63:26; #endif } s; - struct cvmx_npi_mem_access_subidx_s cn30xx; struct cvmx_npi_mem_access_subidx_cn31xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_36_63:28; @@ -1718,11 +1599,6 @@ union cvmx_npi_mem_access_subidx { uint64_t reserved_36_63:28; #endif } cn31xx; - struct cvmx_npi_mem_access_subidx_s cn38xx; - struct cvmx_npi_mem_access_subidx_cn31xx cn38xxp2; - struct cvmx_npi_mem_access_subidx_s cn50xx; - struct cvmx_npi_mem_access_subidx_s cn58xx; - struct cvmx_npi_mem_access_subidx_s cn58xxp1; }; union cvmx_npi_msi_rcv { @@ -1734,13 +1610,6 @@ union cvmx_npi_msi_rcv { uint64_t int_vec:64; #endif } s; - struct cvmx_npi_msi_rcv_s cn30xx; - struct cvmx_npi_msi_rcv_s cn31xx; - struct cvmx_npi_msi_rcv_s cn38xx; - struct cvmx_npi_msi_rcv_s cn38xxp2; - struct cvmx_npi_msi_rcv_s cn50xx; - struct cvmx_npi_msi_rcv_s cn58xx; - struct cvmx_npi_msi_rcv_s cn58xxp1; }; union cvmx_npi_num_desc_outputx { @@ -1754,13 +1623,6 @@ union cvmx_npi_num_desc_outputx { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_npi_num_desc_outputx_s cn30xx; - struct cvmx_npi_num_desc_outputx_s cn31xx; - struct cvmx_npi_num_desc_outputx_s cn38xx; - struct cvmx_npi_num_desc_outputx_s cn38xxp2; - struct cvmx_npi_num_desc_outputx_s cn50xx; - struct cvmx_npi_num_desc_outputx_s cn58xx; - struct cvmx_npi_num_desc_outputx_s cn58xxp1; }; union cvmx_npi_output_control { @@ -1932,7 +1794,6 @@ union cvmx_npi_output_control { uint64_t reserved_46_63:18; #endif } cn31xx; - struct cvmx_npi_output_control_s cn38xx; struct cvmx_npi_output_control_cn38xxp2 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_48_63:16; @@ -2069,8 +1930,6 @@ union cvmx_npi_output_control { uint64_t reserved_49_63:15; #endif } cn50xx; - struct cvmx_npi_output_control_s cn58xx; - struct cvmx_npi_output_control_s cn58xxp1; }; union cvmx_npi_px_dbpair_addr { @@ -2086,13 +1945,6 @@ union cvmx_npi_px_dbpair_addr { uint64_t reserved_63_63:1; #endif } s; - struct cvmx_npi_px_dbpair_addr_s cn30xx; - struct cvmx_npi_px_dbpair_addr_s cn31xx; - struct cvmx_npi_px_dbpair_addr_s cn38xx; - struct cvmx_npi_px_dbpair_addr_s cn38xxp2; - struct cvmx_npi_px_dbpair_addr_s cn50xx; - struct cvmx_npi_px_dbpair_addr_s cn58xx; - struct cvmx_npi_px_dbpair_addr_s cn58xxp1; }; union cvmx_npi_px_instr_addr { @@ -2106,13 +1958,6 @@ union cvmx_npi_px_instr_addr { uint64_t state:3; #endif } s; - struct cvmx_npi_px_instr_addr_s cn30xx; - struct cvmx_npi_px_instr_addr_s cn31xx; - struct cvmx_npi_px_instr_addr_s cn38xx; - struct cvmx_npi_px_instr_addr_s cn38xxp2; - struct cvmx_npi_px_instr_addr_s cn50xx; - struct cvmx_npi_px_instr_addr_s cn58xx; - struct cvmx_npi_px_instr_addr_s cn58xxp1; }; union cvmx_npi_px_instr_cnts { @@ -2128,13 +1973,6 @@ union cvmx_npi_px_instr_cnts { uint64_t reserved_38_63:26; #endif } s; - struct cvmx_npi_px_instr_cnts_s cn30xx; - struct cvmx_npi_px_instr_cnts_s cn31xx; - struct cvmx_npi_px_instr_cnts_s cn38xx; - struct cvmx_npi_px_instr_cnts_s cn38xxp2; - struct cvmx_npi_px_instr_cnts_s cn50xx; - struct cvmx_npi_px_instr_cnts_s cn58xx; - struct cvmx_npi_px_instr_cnts_s cn58xxp1; }; union cvmx_npi_px_pair_cnts { @@ -2150,13 +1988,6 @@ union cvmx_npi_px_pair_cnts { uint64_t reserved_37_63:27; #endif } s; - struct cvmx_npi_px_pair_cnts_s cn30xx; - struct cvmx_npi_px_pair_cnts_s cn31xx; - struct cvmx_npi_px_pair_cnts_s cn38xx; - struct cvmx_npi_px_pair_cnts_s cn38xxp2; - struct cvmx_npi_px_pair_cnts_s cn50xx; - struct cvmx_npi_px_pair_cnts_s cn58xx; - struct cvmx_npi_px_pair_cnts_s cn58xxp1; }; union cvmx_npi_pci_burst_size { @@ -2172,13 +2003,6 @@ union cvmx_npi_pci_burst_size { uint64_t reserved_14_63:50; #endif } s; - struct cvmx_npi_pci_burst_size_s cn30xx; - struct cvmx_npi_pci_burst_size_s cn31xx; - struct cvmx_npi_pci_burst_size_s cn38xx; - struct cvmx_npi_pci_burst_size_s cn38xxp2; - struct cvmx_npi_pci_burst_size_s cn50xx; - struct cvmx_npi_pci_burst_size_s cn58xx; - struct cvmx_npi_pci_burst_size_s cn58xxp1; }; union cvmx_npi_pci_int_arb_cfg { @@ -2215,12 +2039,6 @@ union cvmx_npi_pci_int_arb_cfg { uint64_t reserved_5_63:59; #endif } cn30xx; - struct cvmx_npi_pci_int_arb_cfg_cn30xx cn31xx; - struct cvmx_npi_pci_int_arb_cfg_cn30xx cn38xx; - struct cvmx_npi_pci_int_arb_cfg_cn30xx cn38xxp2; - struct cvmx_npi_pci_int_arb_cfg_s cn50xx; - struct cvmx_npi_pci_int_arb_cfg_s cn58xx; - struct cvmx_npi_pci_int_arb_cfg_s cn58xxp1; }; union cvmx_npi_pci_read_cmd { @@ -2234,13 +2052,6 @@ union cvmx_npi_pci_read_cmd { uint64_t reserved_11_63:53; #endif } s; - struct cvmx_npi_pci_read_cmd_s cn30xx; - struct cvmx_npi_pci_read_cmd_s cn31xx; - struct cvmx_npi_pci_read_cmd_s cn38xx; - struct cvmx_npi_pci_read_cmd_s cn38xxp2; - struct cvmx_npi_pci_read_cmd_s cn50xx; - struct cvmx_npi_pci_read_cmd_s cn58xx; - struct cvmx_npi_pci_read_cmd_s cn58xxp1; }; union cvmx_npi_port32_instr_hdr { @@ -2276,13 +2087,6 @@ union cvmx_npi_port32_instr_hdr { uint64_t reserved_44_63:20; #endif } s; - struct cvmx_npi_port32_instr_hdr_s cn30xx; - struct cvmx_npi_port32_instr_hdr_s cn31xx; - struct cvmx_npi_port32_instr_hdr_s cn38xx; - struct cvmx_npi_port32_instr_hdr_s cn38xxp2; - struct cvmx_npi_port32_instr_hdr_s cn50xx; - struct cvmx_npi_port32_instr_hdr_s cn58xx; - struct cvmx_npi_port32_instr_hdr_s cn58xxp1; }; union cvmx_npi_port33_instr_hdr { @@ -2318,12 +2122,6 @@ union cvmx_npi_port33_instr_hdr { uint64_t reserved_44_63:20; #endif } s; - struct cvmx_npi_port33_instr_hdr_s cn31xx; - struct cvmx_npi_port33_instr_hdr_s cn38xx; - struct cvmx_npi_port33_instr_hdr_s cn38xxp2; - struct cvmx_npi_port33_instr_hdr_s cn50xx; - struct cvmx_npi_port33_instr_hdr_s cn58xx; - struct cvmx_npi_port33_instr_hdr_s cn58xxp1; }; union cvmx_npi_port34_instr_hdr { @@ -2359,10 +2157,6 @@ union cvmx_npi_port34_instr_hdr { uint64_t reserved_44_63:20; #endif } s; - struct cvmx_npi_port34_instr_hdr_s cn38xx; - struct cvmx_npi_port34_instr_hdr_s cn38xxp2; - struct cvmx_npi_port34_instr_hdr_s cn58xx; - struct cvmx_npi_port34_instr_hdr_s cn58xxp1; }; union cvmx_npi_port35_instr_hdr { @@ -2398,10 +2192,6 @@ union cvmx_npi_port35_instr_hdr { uint64_t reserved_44_63:20; #endif } s; - struct cvmx_npi_port35_instr_hdr_s cn38xx; - struct cvmx_npi_port35_instr_hdr_s cn38xxp2; - struct cvmx_npi_port35_instr_hdr_s cn58xx; - struct cvmx_npi_port35_instr_hdr_s cn58xxp1; }; union cvmx_npi_port_bp_control { @@ -2417,13 +2207,6 @@ union cvmx_npi_port_bp_control { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_npi_port_bp_control_s cn30xx; - struct cvmx_npi_port_bp_control_s cn31xx; - struct cvmx_npi_port_bp_control_s cn38xx; - struct cvmx_npi_port_bp_control_s cn38xxp2; - struct cvmx_npi_port_bp_control_s cn50xx; - struct cvmx_npi_port_bp_control_s cn58xx; - struct cvmx_npi_port_bp_control_s cn58xxp1; }; union cvmx_npi_rsl_int_blocks { @@ -2566,7 +2349,6 @@ union cvmx_npi_rsl_int_blocks { uint64_t reserved_32_63:32; #endif } cn30xx; - struct cvmx_npi_rsl_int_blocks_cn30xx cn31xx; struct cvmx_npi_rsl_int_blocks_cn38xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_32_63:32; @@ -2638,7 +2420,6 @@ union cvmx_npi_rsl_int_blocks { uint64_t reserved_32_63:32; #endif } cn38xx; - struct cvmx_npi_rsl_int_blocks_cn38xx cn38xxp2; struct cvmx_npi_rsl_int_blocks_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_31_63:33; @@ -2702,8 +2483,6 @@ union cvmx_npi_rsl_int_blocks { uint64_t reserved_31_63:33; #endif } cn50xx; - struct cvmx_npi_rsl_int_blocks_cn38xx cn58xx; - struct cvmx_npi_rsl_int_blocks_cn38xx cn58xxp1; }; union cvmx_npi_size_inputx { @@ -2717,13 +2496,6 @@ union cvmx_npi_size_inputx { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_npi_size_inputx_s cn30xx; - struct cvmx_npi_size_inputx_s cn31xx; - struct cvmx_npi_size_inputx_s cn38xx; - struct cvmx_npi_size_inputx_s cn38xxp2; - struct cvmx_npi_size_inputx_s cn50xx; - struct cvmx_npi_size_inputx_s cn58xx; - struct cvmx_npi_size_inputx_s cn58xxp1; }; union cvmx_npi_win_read_to { @@ -2737,13 +2509,6 @@ union cvmx_npi_win_read_to { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_npi_win_read_to_s cn30xx; - struct cvmx_npi_win_read_to_s cn31xx; - struct cvmx_npi_win_read_to_s cn38xx; - struct cvmx_npi_win_read_to_s cn38xxp2; - struct cvmx_npi_win_read_to_s cn50xx; - struct cvmx_npi_win_read_to_s cn58xx; - struct cvmx_npi_win_read_to_s cn58xxp1; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-pci-defs.h b/arch/mips/include/asm/octeon/cvmx-pci-defs.h index 25d603f18298..be56b693b53b 100644 --- a/arch/mips/include/asm/octeon/cvmx-pci-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-pci-defs.h @@ -131,13 +131,6 @@ union cvmx_pci_bar1_indexx { uint32_t reserved_18_31:14; #endif } s; - struct cvmx_pci_bar1_indexx_s cn30xx; - struct cvmx_pci_bar1_indexx_s cn31xx; - struct cvmx_pci_bar1_indexx_s cn38xx; - struct cvmx_pci_bar1_indexx_s cn38xxp2; - struct cvmx_pci_bar1_indexx_s cn50xx; - struct cvmx_pci_bar1_indexx_s cn58xx; - struct cvmx_pci_bar1_indexx_s cn58xxp1; }; union cvmx_pci_bist_reg { @@ -169,7 +162,6 @@ union cvmx_pci_bist_reg { uint64_t reserved_10_63:54; #endif } s; - struct cvmx_pci_bist_reg_s cn50xx; }; union cvmx_pci_cfg00 { @@ -183,13 +175,6 @@ union cvmx_pci_cfg00 { uint32_t devid:16; #endif } s; - struct cvmx_pci_cfg00_s cn30xx; - struct cvmx_pci_cfg00_s cn31xx; - struct cvmx_pci_cfg00_s cn38xx; - struct cvmx_pci_cfg00_s cn38xxp2; - struct cvmx_pci_cfg00_s cn50xx; - struct cvmx_pci_cfg00_s cn58xx; - struct cvmx_pci_cfg00_s cn58xxp1; }; union cvmx_pci_cfg01 { @@ -247,13 +232,6 @@ union cvmx_pci_cfg01 { uint32_t dpe:1; #endif } s; - struct cvmx_pci_cfg01_s cn30xx; - struct cvmx_pci_cfg01_s cn31xx; - struct cvmx_pci_cfg01_s cn38xx; - struct cvmx_pci_cfg01_s cn38xxp2; - struct cvmx_pci_cfg01_s cn50xx; - struct cvmx_pci_cfg01_s cn58xx; - struct cvmx_pci_cfg01_s cn58xxp1; }; union cvmx_pci_cfg02 { @@ -267,13 +245,6 @@ union cvmx_pci_cfg02 { uint32_t cc:24; #endif } s; - struct cvmx_pci_cfg02_s cn30xx; - struct cvmx_pci_cfg02_s cn31xx; - struct cvmx_pci_cfg02_s cn38xx; - struct cvmx_pci_cfg02_s cn38xxp2; - struct cvmx_pci_cfg02_s cn50xx; - struct cvmx_pci_cfg02_s cn58xx; - struct cvmx_pci_cfg02_s cn58xxp1; }; union cvmx_pci_cfg03 { @@ -297,13 +268,6 @@ union cvmx_pci_cfg03 { uint32_t bcap:1; #endif } s; - struct cvmx_pci_cfg03_s cn30xx; - struct cvmx_pci_cfg03_s cn31xx; - struct cvmx_pci_cfg03_s cn38xx; - struct cvmx_pci_cfg03_s cn38xxp2; - struct cvmx_pci_cfg03_s cn50xx; - struct cvmx_pci_cfg03_s cn58xx; - struct cvmx_pci_cfg03_s cn58xxp1; }; union cvmx_pci_cfg04 { @@ -323,13 +287,6 @@ union cvmx_pci_cfg04 { uint32_t lbase:20; #endif } s; - struct cvmx_pci_cfg04_s cn30xx; - struct cvmx_pci_cfg04_s cn31xx; - struct cvmx_pci_cfg04_s cn38xx; - struct cvmx_pci_cfg04_s cn38xxp2; - struct cvmx_pci_cfg04_s cn50xx; - struct cvmx_pci_cfg04_s cn58xx; - struct cvmx_pci_cfg04_s cn58xxp1; }; union cvmx_pci_cfg05 { @@ -341,13 +298,6 @@ union cvmx_pci_cfg05 { uint32_t hbase:32; #endif } s; - struct cvmx_pci_cfg05_s cn30xx; - struct cvmx_pci_cfg05_s cn31xx; - struct cvmx_pci_cfg05_s cn38xx; - struct cvmx_pci_cfg05_s cn38xxp2; - struct cvmx_pci_cfg05_s cn50xx; - struct cvmx_pci_cfg05_s cn58xx; - struct cvmx_pci_cfg05_s cn58xxp1; }; union cvmx_pci_cfg06 { @@ -367,13 +317,6 @@ union cvmx_pci_cfg06 { uint32_t lbase:5; #endif } s; - struct cvmx_pci_cfg06_s cn30xx; - struct cvmx_pci_cfg06_s cn31xx; - struct cvmx_pci_cfg06_s cn38xx; - struct cvmx_pci_cfg06_s cn38xxp2; - struct cvmx_pci_cfg06_s cn50xx; - struct cvmx_pci_cfg06_s cn58xx; - struct cvmx_pci_cfg06_s cn58xxp1; }; union cvmx_pci_cfg07 { @@ -385,13 +328,6 @@ union cvmx_pci_cfg07 { uint32_t hbase:32; #endif } s; - struct cvmx_pci_cfg07_s cn30xx; - struct cvmx_pci_cfg07_s cn31xx; - struct cvmx_pci_cfg07_s cn38xx; - struct cvmx_pci_cfg07_s cn38xxp2; - struct cvmx_pci_cfg07_s cn50xx; - struct cvmx_pci_cfg07_s cn58xx; - struct cvmx_pci_cfg07_s cn58xxp1; }; union cvmx_pci_cfg08 { @@ -409,13 +345,6 @@ union cvmx_pci_cfg08 { uint32_t lbasez:28; #endif } s; - struct cvmx_pci_cfg08_s cn30xx; - struct cvmx_pci_cfg08_s cn31xx; - struct cvmx_pci_cfg08_s cn38xx; - struct cvmx_pci_cfg08_s cn38xxp2; - struct cvmx_pci_cfg08_s cn50xx; - struct cvmx_pci_cfg08_s cn58xx; - struct cvmx_pci_cfg08_s cn58xxp1; }; union cvmx_pci_cfg09 { @@ -429,13 +358,6 @@ union cvmx_pci_cfg09 { uint32_t hbase:25; #endif } s; - struct cvmx_pci_cfg09_s cn30xx; - struct cvmx_pci_cfg09_s cn31xx; - struct cvmx_pci_cfg09_s cn38xx; - struct cvmx_pci_cfg09_s cn38xxp2; - struct cvmx_pci_cfg09_s cn50xx; - struct cvmx_pci_cfg09_s cn58xx; - struct cvmx_pci_cfg09_s cn58xxp1; }; union cvmx_pci_cfg10 { @@ -447,13 +369,6 @@ union cvmx_pci_cfg10 { uint32_t cisp:32; #endif } s; - struct cvmx_pci_cfg10_s cn30xx; - struct cvmx_pci_cfg10_s cn31xx; - struct cvmx_pci_cfg10_s cn38xx; - struct cvmx_pci_cfg10_s cn38xxp2; - struct cvmx_pci_cfg10_s cn50xx; - struct cvmx_pci_cfg10_s cn58xx; - struct cvmx_pci_cfg10_s cn58xxp1; }; union cvmx_pci_cfg11 { @@ -467,13 +382,6 @@ union cvmx_pci_cfg11 { uint32_t ssid:16; #endif } s; - struct cvmx_pci_cfg11_s cn30xx; - struct cvmx_pci_cfg11_s cn31xx; - struct cvmx_pci_cfg11_s cn38xx; - struct cvmx_pci_cfg11_s cn38xxp2; - struct cvmx_pci_cfg11_s cn50xx; - struct cvmx_pci_cfg11_s cn58xx; - struct cvmx_pci_cfg11_s cn58xxp1; }; union cvmx_pci_cfg12 { @@ -491,13 +399,6 @@ union cvmx_pci_cfg12 { uint32_t erbar:16; #endif } s; - struct cvmx_pci_cfg12_s cn30xx; - struct cvmx_pci_cfg12_s cn31xx; - struct cvmx_pci_cfg12_s cn38xx; - struct cvmx_pci_cfg12_s cn38xxp2; - struct cvmx_pci_cfg12_s cn50xx; - struct cvmx_pci_cfg12_s cn58xx; - struct cvmx_pci_cfg12_s cn58xxp1; }; union cvmx_pci_cfg13 { @@ -511,13 +412,6 @@ union cvmx_pci_cfg13 { uint32_t reserved_8_31:24; #endif } s; - struct cvmx_pci_cfg13_s cn30xx; - struct cvmx_pci_cfg13_s cn31xx; - struct cvmx_pci_cfg13_s cn38xx; - struct cvmx_pci_cfg13_s cn38xxp2; - struct cvmx_pci_cfg13_s cn50xx; - struct cvmx_pci_cfg13_s cn58xx; - struct cvmx_pci_cfg13_s cn58xxp1; }; union cvmx_pci_cfg15 { @@ -535,13 +429,6 @@ union cvmx_pci_cfg15 { uint32_t ml:8; #endif } s; - struct cvmx_pci_cfg15_s cn30xx; - struct cvmx_pci_cfg15_s cn31xx; - struct cvmx_pci_cfg15_s cn38xx; - struct cvmx_pci_cfg15_s cn38xxp2; - struct cvmx_pci_cfg15_s cn50xx; - struct cvmx_pci_cfg15_s cn58xx; - struct cvmx_pci_cfg15_s cn58xxp1; }; union cvmx_pci_cfg16 { @@ -583,13 +470,6 @@ union cvmx_pci_cfg16 { uint32_t trdnpr:1; #endif } s; - struct cvmx_pci_cfg16_s cn30xx; - struct cvmx_pci_cfg16_s cn31xx; - struct cvmx_pci_cfg16_s cn38xx; - struct cvmx_pci_cfg16_s cn38xxp2; - struct cvmx_pci_cfg16_s cn50xx; - struct cvmx_pci_cfg16_s cn58xx; - struct cvmx_pci_cfg16_s cn58xxp1; }; union cvmx_pci_cfg17 { @@ -601,13 +481,6 @@ union cvmx_pci_cfg17 { uint32_t tscme:32; #endif } s; - struct cvmx_pci_cfg17_s cn30xx; - struct cvmx_pci_cfg17_s cn31xx; - struct cvmx_pci_cfg17_s cn38xx; - struct cvmx_pci_cfg17_s cn38xxp2; - struct cvmx_pci_cfg17_s cn50xx; - struct cvmx_pci_cfg17_s cn58xx; - struct cvmx_pci_cfg17_s cn58xxp1; }; union cvmx_pci_cfg18 { @@ -619,13 +492,6 @@ union cvmx_pci_cfg18 { uint32_t tdsrps:32; #endif } s; - struct cvmx_pci_cfg18_s cn30xx; - struct cvmx_pci_cfg18_s cn31xx; - struct cvmx_pci_cfg18_s cn38xx; - struct cvmx_pci_cfg18_s cn38xxp2; - struct cvmx_pci_cfg18_s cn50xx; - struct cvmx_pci_cfg18_s cn58xx; - struct cvmx_pci_cfg18_s cn58xxp1; }; union cvmx_pci_cfg19 { @@ -671,13 +537,6 @@ union cvmx_pci_cfg19 { uint32_t mrbcm:1; #endif } s; - struct cvmx_pci_cfg19_s cn30xx; - struct cvmx_pci_cfg19_s cn31xx; - struct cvmx_pci_cfg19_s cn38xx; - struct cvmx_pci_cfg19_s cn38xxp2; - struct cvmx_pci_cfg19_s cn50xx; - struct cvmx_pci_cfg19_s cn58xx; - struct cvmx_pci_cfg19_s cn58xxp1; }; union cvmx_pci_cfg20 { @@ -689,13 +548,6 @@ union cvmx_pci_cfg20 { uint32_t mdsp:32; #endif } s; - struct cvmx_pci_cfg20_s cn30xx; - struct cvmx_pci_cfg20_s cn31xx; - struct cvmx_pci_cfg20_s cn38xx; - struct cvmx_pci_cfg20_s cn38xxp2; - struct cvmx_pci_cfg20_s cn50xx; - struct cvmx_pci_cfg20_s cn58xx; - struct cvmx_pci_cfg20_s cn58xxp1; }; union cvmx_pci_cfg21 { @@ -707,13 +559,6 @@ union cvmx_pci_cfg21 { uint32_t scmre:32; #endif } s; - struct cvmx_pci_cfg21_s cn30xx; - struct cvmx_pci_cfg21_s cn31xx; - struct cvmx_pci_cfg21_s cn38xx; - struct cvmx_pci_cfg21_s cn38xxp2; - struct cvmx_pci_cfg21_s cn50xx; - struct cvmx_pci_cfg21_s cn58xx; - struct cvmx_pci_cfg21_s cn58xxp1; }; union cvmx_pci_cfg22 { @@ -737,13 +582,6 @@ union cvmx_pci_cfg22 { uint32_t mac:7; #endif } s; - struct cvmx_pci_cfg22_s cn30xx; - struct cvmx_pci_cfg22_s cn31xx; - struct cvmx_pci_cfg22_s cn38xx; - struct cvmx_pci_cfg22_s cn38xxp2; - struct cvmx_pci_cfg22_s cn50xx; - struct cvmx_pci_cfg22_s cn58xx; - struct cvmx_pci_cfg22_s cn58xxp1; }; union cvmx_pci_cfg56 { @@ -767,13 +605,6 @@ union cvmx_pci_cfg56 { uint32_t reserved_23_31:9; #endif } s; - struct cvmx_pci_cfg56_s cn30xx; - struct cvmx_pci_cfg56_s cn31xx; - struct cvmx_pci_cfg56_s cn38xx; - struct cvmx_pci_cfg56_s cn38xxp2; - struct cvmx_pci_cfg56_s cn50xx; - struct cvmx_pci_cfg56_s cn58xx; - struct cvmx_pci_cfg56_s cn58xxp1; }; union cvmx_pci_cfg57 { @@ -809,13 +640,6 @@ union cvmx_pci_cfg57 { uint32_t reserved_30_31:2; #endif } s; - struct cvmx_pci_cfg57_s cn30xx; - struct cvmx_pci_cfg57_s cn31xx; - struct cvmx_pci_cfg57_s cn38xx; - struct cvmx_pci_cfg57_s cn38xxp2; - struct cvmx_pci_cfg57_s cn50xx; - struct cvmx_pci_cfg57_s cn58xx; - struct cvmx_pci_cfg57_s cn58xxp1; }; union cvmx_pci_cfg58 { @@ -845,13 +669,6 @@ union cvmx_pci_cfg58 { uint32_t pmes:5; #endif } s; - struct cvmx_pci_cfg58_s cn30xx; - struct cvmx_pci_cfg58_s cn31xx; - struct cvmx_pci_cfg58_s cn38xx; - struct cvmx_pci_cfg58_s cn38xxp2; - struct cvmx_pci_cfg58_s cn50xx; - struct cvmx_pci_cfg58_s cn58xx; - struct cvmx_pci_cfg58_s cn58xxp1; }; union cvmx_pci_cfg59 { @@ -881,13 +698,6 @@ union cvmx_pci_cfg59 { uint32_t pmdia:8; #endif } s; - struct cvmx_pci_cfg59_s cn30xx; - struct cvmx_pci_cfg59_s cn31xx; - struct cvmx_pci_cfg59_s cn38xx; - struct cvmx_pci_cfg59_s cn38xxp2; - struct cvmx_pci_cfg59_s cn50xx; - struct cvmx_pci_cfg59_s cn58xx; - struct cvmx_pci_cfg59_s cn58xxp1; }; union cvmx_pci_cfg60 { @@ -911,13 +721,6 @@ union cvmx_pci_cfg60 { uint32_t reserved_24_31:8; #endif } s; - struct cvmx_pci_cfg60_s cn30xx; - struct cvmx_pci_cfg60_s cn31xx; - struct cvmx_pci_cfg60_s cn38xx; - struct cvmx_pci_cfg60_s cn38xxp2; - struct cvmx_pci_cfg60_s cn50xx; - struct cvmx_pci_cfg60_s cn58xx; - struct cvmx_pci_cfg60_s cn58xxp1; }; union cvmx_pci_cfg61 { @@ -931,13 +734,6 @@ union cvmx_pci_cfg61 { uint32_t msi31t2:30; #endif } s; - struct cvmx_pci_cfg61_s cn30xx; - struct cvmx_pci_cfg61_s cn31xx; - struct cvmx_pci_cfg61_s cn38xx; - struct cvmx_pci_cfg61_s cn38xxp2; - struct cvmx_pci_cfg61_s cn50xx; - struct cvmx_pci_cfg61_s cn58xx; - struct cvmx_pci_cfg61_s cn58xxp1; }; union cvmx_pci_cfg62 { @@ -949,13 +745,6 @@ union cvmx_pci_cfg62 { uint32_t msi:32; #endif } s; - struct cvmx_pci_cfg62_s cn30xx; - struct cvmx_pci_cfg62_s cn31xx; - struct cvmx_pci_cfg62_s cn38xx; - struct cvmx_pci_cfg62_s cn38xxp2; - struct cvmx_pci_cfg62_s cn50xx; - struct cvmx_pci_cfg62_s cn58xx; - struct cvmx_pci_cfg62_s cn58xxp1; }; union cvmx_pci_cfg63 { @@ -969,13 +758,6 @@ union cvmx_pci_cfg63 { uint32_t reserved_16_31:16; #endif } s; - struct cvmx_pci_cfg63_s cn30xx; - struct cvmx_pci_cfg63_s cn31xx; - struct cvmx_pci_cfg63_s cn38xx; - struct cvmx_pci_cfg63_s cn38xxp2; - struct cvmx_pci_cfg63_s cn50xx; - struct cvmx_pci_cfg63_s cn58xx; - struct cvmx_pci_cfg63_s cn58xxp1; }; union cvmx_pci_cnt_reg { @@ -997,9 +779,6 @@ union cvmx_pci_cnt_reg { uint64_t reserved_38_63:26; #endif } s; - struct cvmx_pci_cnt_reg_s cn50xx; - struct cvmx_pci_cnt_reg_s cn58xx; - struct cvmx_pci_cnt_reg_s cn58xxp1; }; union cvmx_pci_ctl_status_2 { @@ -1053,7 +832,6 @@ union cvmx_pci_ctl_status_2 { uint32_t reserved_29_31:3; #endif } s; - struct cvmx_pci_ctl_status_2_s cn30xx; struct cvmx_pci_ctl_status_2_cn31xx { #ifdef __BIG_ENDIAN_BITFIELD uint32_t reserved_20_31:12; @@ -1091,11 +869,6 @@ union cvmx_pci_ctl_status_2 { uint32_t reserved_20_31:12; #endif } cn31xx; - struct cvmx_pci_ctl_status_2_s cn38xx; - struct cvmx_pci_ctl_status_2_cn31xx cn38xxp2; - struct cvmx_pci_ctl_status_2_s cn50xx; - struct cvmx_pci_ctl_status_2_s cn58xx; - struct cvmx_pci_ctl_status_2_s cn58xxp1; }; union cvmx_pci_dbellx { @@ -1109,13 +882,6 @@ union cvmx_pci_dbellx { uint32_t reserved_16_31:16; #endif } s; - struct cvmx_pci_dbellx_s cn30xx; - struct cvmx_pci_dbellx_s cn31xx; - struct cvmx_pci_dbellx_s cn38xx; - struct cvmx_pci_dbellx_s cn38xxp2; - struct cvmx_pci_dbellx_s cn50xx; - struct cvmx_pci_dbellx_s cn58xx; - struct cvmx_pci_dbellx_s cn58xxp1; }; union cvmx_pci_dma_cntx { @@ -1127,13 +893,6 @@ union cvmx_pci_dma_cntx { uint32_t dma_cnt:32; #endif } s; - struct cvmx_pci_dma_cntx_s cn30xx; - struct cvmx_pci_dma_cntx_s cn31xx; - struct cvmx_pci_dma_cntx_s cn38xx; - struct cvmx_pci_dma_cntx_s cn38xxp2; - struct cvmx_pci_dma_cntx_s cn50xx; - struct cvmx_pci_dma_cntx_s cn58xx; - struct cvmx_pci_dma_cntx_s cn58xxp1; }; union cvmx_pci_dma_int_levx { @@ -1145,13 +904,6 @@ union cvmx_pci_dma_int_levx { uint32_t pkt_cnt:32; #endif } s; - struct cvmx_pci_dma_int_levx_s cn30xx; - struct cvmx_pci_dma_int_levx_s cn31xx; - struct cvmx_pci_dma_int_levx_s cn38xx; - struct cvmx_pci_dma_int_levx_s cn38xxp2; - struct cvmx_pci_dma_int_levx_s cn50xx; - struct cvmx_pci_dma_int_levx_s cn58xx; - struct cvmx_pci_dma_int_levx_s cn58xxp1; }; union cvmx_pci_dma_timex { @@ -1163,13 +915,6 @@ union cvmx_pci_dma_timex { uint32_t dma_time:32; #endif } s; - struct cvmx_pci_dma_timex_s cn30xx; - struct cvmx_pci_dma_timex_s cn31xx; - struct cvmx_pci_dma_timex_s cn38xx; - struct cvmx_pci_dma_timex_s cn38xxp2; - struct cvmx_pci_dma_timex_s cn50xx; - struct cvmx_pci_dma_timex_s cn58xx; - struct cvmx_pci_dma_timex_s cn58xxp1; }; union cvmx_pci_instr_countx { @@ -1181,13 +926,6 @@ union cvmx_pci_instr_countx { uint32_t icnt:32; #endif } s; - struct cvmx_pci_instr_countx_s cn30xx; - struct cvmx_pci_instr_countx_s cn31xx; - struct cvmx_pci_instr_countx_s cn38xx; - struct cvmx_pci_instr_countx_s cn38xxp2; - struct cvmx_pci_instr_countx_s cn50xx; - struct cvmx_pci_instr_countx_s cn58xx; - struct cvmx_pci_instr_countx_s cn58xxp1; }; union cvmx_pci_int_enb { @@ -1405,11 +1143,6 @@ union cvmx_pci_int_enb { uint64_t reserved_34_63:30; #endif } cn31xx; - struct cvmx_pci_int_enb_s cn38xx; - struct cvmx_pci_int_enb_s cn38xxp2; - struct cvmx_pci_int_enb_cn31xx cn50xx; - struct cvmx_pci_int_enb_s cn58xx; - struct cvmx_pci_int_enb_s cn58xxp1; }; union cvmx_pci_int_enb2 { @@ -1627,11 +1360,6 @@ union cvmx_pci_int_enb2 { uint64_t reserved_34_63:30; #endif } cn31xx; - struct cvmx_pci_int_enb2_s cn38xx; - struct cvmx_pci_int_enb2_s cn38xxp2; - struct cvmx_pci_int_enb2_cn31xx cn50xx; - struct cvmx_pci_int_enb2_s cn58xx; - struct cvmx_pci_int_enb2_s cn58xxp1; }; union cvmx_pci_int_sum { @@ -1849,11 +1577,6 @@ union cvmx_pci_int_sum { uint64_t reserved_34_63:30; #endif } cn31xx; - struct cvmx_pci_int_sum_s cn38xx; - struct cvmx_pci_int_sum_s cn38xxp2; - struct cvmx_pci_int_sum_cn31xx cn50xx; - struct cvmx_pci_int_sum_s cn58xx; - struct cvmx_pci_int_sum_s cn58xxp1; }; union cvmx_pci_int_sum2 { @@ -2071,11 +1794,6 @@ union cvmx_pci_int_sum2 { uint64_t reserved_34_63:30; #endif } cn31xx; - struct cvmx_pci_int_sum2_s cn38xx; - struct cvmx_pci_int_sum2_s cn38xxp2; - struct cvmx_pci_int_sum2_cn31xx cn50xx; - struct cvmx_pci_int_sum2_s cn58xx; - struct cvmx_pci_int_sum2_s cn58xxp1; }; union cvmx_pci_msi_rcv { @@ -2089,13 +1807,6 @@ union cvmx_pci_msi_rcv { uint32_t reserved_6_31:26; #endif } s; - struct cvmx_pci_msi_rcv_s cn30xx; - struct cvmx_pci_msi_rcv_s cn31xx; - struct cvmx_pci_msi_rcv_s cn38xx; - struct cvmx_pci_msi_rcv_s cn38xxp2; - struct cvmx_pci_msi_rcv_s cn50xx; - struct cvmx_pci_msi_rcv_s cn58xx; - struct cvmx_pci_msi_rcv_s cn58xxp1; }; union cvmx_pci_pkt_creditsx { @@ -2109,13 +1820,6 @@ union cvmx_pci_pkt_creditsx { uint32_t pkt_cnt:16; #endif } s; - struct cvmx_pci_pkt_creditsx_s cn30xx; - struct cvmx_pci_pkt_creditsx_s cn31xx; - struct cvmx_pci_pkt_creditsx_s cn38xx; - struct cvmx_pci_pkt_creditsx_s cn38xxp2; - struct cvmx_pci_pkt_creditsx_s cn50xx; - struct cvmx_pci_pkt_creditsx_s cn58xx; - struct cvmx_pci_pkt_creditsx_s cn58xxp1; }; union cvmx_pci_pkts_sentx { @@ -2127,13 +1831,6 @@ union cvmx_pci_pkts_sentx { uint32_t pkt_cnt:32; #endif } s; - struct cvmx_pci_pkts_sentx_s cn30xx; - struct cvmx_pci_pkts_sentx_s cn31xx; - struct cvmx_pci_pkts_sentx_s cn38xx; - struct cvmx_pci_pkts_sentx_s cn38xxp2; - struct cvmx_pci_pkts_sentx_s cn50xx; - struct cvmx_pci_pkts_sentx_s cn58xx; - struct cvmx_pci_pkts_sentx_s cn58xxp1; }; union cvmx_pci_pkts_sent_int_levx { @@ -2145,13 +1842,6 @@ union cvmx_pci_pkts_sent_int_levx { uint32_t pkt_cnt:32; #endif } s; - struct cvmx_pci_pkts_sent_int_levx_s cn30xx; - struct cvmx_pci_pkts_sent_int_levx_s cn31xx; - struct cvmx_pci_pkts_sent_int_levx_s cn38xx; - struct cvmx_pci_pkts_sent_int_levx_s cn38xxp2; - struct cvmx_pci_pkts_sent_int_levx_s cn50xx; - struct cvmx_pci_pkts_sent_int_levx_s cn58xx; - struct cvmx_pci_pkts_sent_int_levx_s cn58xxp1; }; union cvmx_pci_pkts_sent_timex { @@ -2163,13 +1853,6 @@ union cvmx_pci_pkts_sent_timex { uint32_t pkt_time:32; #endif } s; - struct cvmx_pci_pkts_sent_timex_s cn30xx; - struct cvmx_pci_pkts_sent_timex_s cn31xx; - struct cvmx_pci_pkts_sent_timex_s cn38xx; - struct cvmx_pci_pkts_sent_timex_s cn38xxp2; - struct cvmx_pci_pkts_sent_timex_s cn50xx; - struct cvmx_pci_pkts_sent_timex_s cn58xx; - struct cvmx_pci_pkts_sent_timex_s cn58xxp1; }; union cvmx_pci_read_cmd_6 { @@ -2185,13 +1868,6 @@ union cvmx_pci_read_cmd_6 { uint32_t reserved_9_31:23; #endif } s; - struct cvmx_pci_read_cmd_6_s cn30xx; - struct cvmx_pci_read_cmd_6_s cn31xx; - struct cvmx_pci_read_cmd_6_s cn38xx; - struct cvmx_pci_read_cmd_6_s cn38xxp2; - struct cvmx_pci_read_cmd_6_s cn50xx; - struct cvmx_pci_read_cmd_6_s cn58xx; - struct cvmx_pci_read_cmd_6_s cn58xxp1; }; union cvmx_pci_read_cmd_c { @@ -2207,13 +1883,6 @@ union cvmx_pci_read_cmd_c { uint32_t reserved_9_31:23; #endif } s; - struct cvmx_pci_read_cmd_c_s cn30xx; - struct cvmx_pci_read_cmd_c_s cn31xx; - struct cvmx_pci_read_cmd_c_s cn38xx; - struct cvmx_pci_read_cmd_c_s cn38xxp2; - struct cvmx_pci_read_cmd_c_s cn50xx; - struct cvmx_pci_read_cmd_c_s cn58xx; - struct cvmx_pci_read_cmd_c_s cn58xxp1; }; union cvmx_pci_read_cmd_e { @@ -2229,13 +1898,6 @@ union cvmx_pci_read_cmd_e { uint32_t reserved_9_31:23; #endif } s; - struct cvmx_pci_read_cmd_e_s cn30xx; - struct cvmx_pci_read_cmd_e_s cn31xx; - struct cvmx_pci_read_cmd_e_s cn38xx; - struct cvmx_pci_read_cmd_e_s cn38xxp2; - struct cvmx_pci_read_cmd_e_s cn50xx; - struct cvmx_pci_read_cmd_e_s cn58xx; - struct cvmx_pci_read_cmd_e_s cn58xxp1; }; union cvmx_pci_read_timeout { @@ -2251,13 +1913,6 @@ union cvmx_pci_read_timeout { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_pci_read_timeout_s cn30xx; - struct cvmx_pci_read_timeout_s cn31xx; - struct cvmx_pci_read_timeout_s cn38xx; - struct cvmx_pci_read_timeout_s cn38xxp2; - struct cvmx_pci_read_timeout_s cn50xx; - struct cvmx_pci_read_timeout_s cn58xx; - struct cvmx_pci_read_timeout_s cn58xxp1; }; union cvmx_pci_scm_reg { @@ -2271,13 +1926,6 @@ union cvmx_pci_scm_reg { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_pci_scm_reg_s cn30xx; - struct cvmx_pci_scm_reg_s cn31xx; - struct cvmx_pci_scm_reg_s cn38xx; - struct cvmx_pci_scm_reg_s cn38xxp2; - struct cvmx_pci_scm_reg_s cn50xx; - struct cvmx_pci_scm_reg_s cn58xx; - struct cvmx_pci_scm_reg_s cn58xxp1; }; union cvmx_pci_tsr_reg { @@ -2291,13 +1939,6 @@ union cvmx_pci_tsr_reg { uint64_t reserved_36_63:28; #endif } s; - struct cvmx_pci_tsr_reg_s cn30xx; - struct cvmx_pci_tsr_reg_s cn31xx; - struct cvmx_pci_tsr_reg_s cn38xx; - struct cvmx_pci_tsr_reg_s cn38xxp2; - struct cvmx_pci_tsr_reg_s cn50xx; - struct cvmx_pci_tsr_reg_s cn58xx; - struct cvmx_pci_tsr_reg_s cn58xxp1; }; union cvmx_pci_win_rd_addr { @@ -2326,7 +1967,6 @@ union cvmx_pci_win_rd_addr { uint64_t reserved_49_63:15; #endif } cn30xx; - struct cvmx_pci_win_rd_addr_cn30xx cn31xx; struct cvmx_pci_win_rd_addr_cn38xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_49_63:15; @@ -2340,10 +1980,6 @@ union cvmx_pci_win_rd_addr { uint64_t reserved_49_63:15; #endif } cn38xx; - struct cvmx_pci_win_rd_addr_cn38xx cn38xxp2; - struct cvmx_pci_win_rd_addr_cn30xx cn50xx; - struct cvmx_pci_win_rd_addr_cn38xx cn58xx; - struct cvmx_pci_win_rd_addr_cn38xx cn58xxp1; }; union cvmx_pci_win_rd_data { @@ -2355,13 +1991,6 @@ union cvmx_pci_win_rd_data { uint64_t rd_data:64; #endif } s; - struct cvmx_pci_win_rd_data_s cn30xx; - struct cvmx_pci_win_rd_data_s cn31xx; - struct cvmx_pci_win_rd_data_s cn38xx; - struct cvmx_pci_win_rd_data_s cn38xxp2; - struct cvmx_pci_win_rd_data_s cn50xx; - struct cvmx_pci_win_rd_data_s cn58xx; - struct cvmx_pci_win_rd_data_s cn58xxp1; }; union cvmx_pci_win_wr_addr { @@ -2379,13 +2008,6 @@ union cvmx_pci_win_wr_addr { uint64_t reserved_49_63:15; #endif } s; - struct cvmx_pci_win_wr_addr_s cn30xx; - struct cvmx_pci_win_wr_addr_s cn31xx; - struct cvmx_pci_win_wr_addr_s cn38xx; - struct cvmx_pci_win_wr_addr_s cn38xxp2; - struct cvmx_pci_win_wr_addr_s cn50xx; - struct cvmx_pci_win_wr_addr_s cn58xx; - struct cvmx_pci_win_wr_addr_s cn58xxp1; }; union cvmx_pci_win_wr_data { @@ -2397,13 +2019,6 @@ union cvmx_pci_win_wr_data { uint64_t wr_data:64; #endif } s; - struct cvmx_pci_win_wr_data_s cn30xx; - struct cvmx_pci_win_wr_data_s cn31xx; - struct cvmx_pci_win_wr_data_s cn38xx; - struct cvmx_pci_win_wr_data_s cn38xxp2; - struct cvmx_pci_win_wr_data_s cn50xx; - struct cvmx_pci_win_wr_data_s cn58xx; - struct cvmx_pci_win_wr_data_s cn58xxp1; }; union cvmx_pci_win_wr_mask { @@ -2417,13 +2032,6 @@ union cvmx_pci_win_wr_mask { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_pci_win_wr_mask_s cn30xx; - struct cvmx_pci_win_wr_mask_s cn31xx; - struct cvmx_pci_win_wr_mask_s cn38xx; - struct cvmx_pci_win_wr_mask_s cn38xxp2; - struct cvmx_pci_win_wr_mask_s cn50xx; - struct cvmx_pci_win_wr_mask_s cn58xx; - struct cvmx_pci_win_wr_mask_s cn58xxp1; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-pcsx-defs.h b/arch/mips/include/asm/octeon/cvmx-pcsx-defs.h index 39da7f9d7b3f..5f013269a89d 100644 --- a/arch/mips/include/asm/octeon/cvmx-pcsx-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-pcsx-defs.h @@ -361,17 +361,6 @@ union cvmx_pcsx_anx_adv_reg { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_pcsx_anx_adv_reg_s cn52xx; - struct cvmx_pcsx_anx_adv_reg_s cn52xxp1; - struct cvmx_pcsx_anx_adv_reg_s cn56xx; - struct cvmx_pcsx_anx_adv_reg_s cn56xxp1; - struct cvmx_pcsx_anx_adv_reg_s cn61xx; - struct cvmx_pcsx_anx_adv_reg_s cn63xx; - struct cvmx_pcsx_anx_adv_reg_s cn63xxp1; - struct cvmx_pcsx_anx_adv_reg_s cn66xx; - struct cvmx_pcsx_anx_adv_reg_s cn68xx; - struct cvmx_pcsx_anx_adv_reg_s cn68xxp1; - struct cvmx_pcsx_anx_adv_reg_s cnf71xx; }; union cvmx_pcsx_anx_ext_st_reg { @@ -393,17 +382,6 @@ union cvmx_pcsx_anx_ext_st_reg { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_pcsx_anx_ext_st_reg_s cn52xx; - struct cvmx_pcsx_anx_ext_st_reg_s cn52xxp1; - struct cvmx_pcsx_anx_ext_st_reg_s cn56xx; - struct cvmx_pcsx_anx_ext_st_reg_s cn56xxp1; - struct cvmx_pcsx_anx_ext_st_reg_s cn61xx; - struct cvmx_pcsx_anx_ext_st_reg_s cn63xx; - struct cvmx_pcsx_anx_ext_st_reg_s cn63xxp1; - struct cvmx_pcsx_anx_ext_st_reg_s cn66xx; - struct cvmx_pcsx_anx_ext_st_reg_s cn68xx; - struct cvmx_pcsx_anx_ext_st_reg_s cn68xxp1; - struct cvmx_pcsx_anx_ext_st_reg_s cnf71xx; }; union cvmx_pcsx_anx_lp_abil_reg { @@ -431,17 +409,6 @@ union cvmx_pcsx_anx_lp_abil_reg { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_pcsx_anx_lp_abil_reg_s cn52xx; - struct cvmx_pcsx_anx_lp_abil_reg_s cn52xxp1; - struct cvmx_pcsx_anx_lp_abil_reg_s cn56xx; - struct cvmx_pcsx_anx_lp_abil_reg_s cn56xxp1; - struct cvmx_pcsx_anx_lp_abil_reg_s cn61xx; - struct cvmx_pcsx_anx_lp_abil_reg_s cn63xx; - struct cvmx_pcsx_anx_lp_abil_reg_s cn63xxp1; - struct cvmx_pcsx_anx_lp_abil_reg_s cn66xx; - struct cvmx_pcsx_anx_lp_abil_reg_s cn68xx; - struct cvmx_pcsx_anx_lp_abil_reg_s cn68xxp1; - struct cvmx_pcsx_anx_lp_abil_reg_s cnf71xx; }; union cvmx_pcsx_anx_results_reg { @@ -463,17 +430,6 @@ union cvmx_pcsx_anx_results_reg { uint64_t reserved_7_63:57; #endif } s; - struct cvmx_pcsx_anx_results_reg_s cn52xx; - struct cvmx_pcsx_anx_results_reg_s cn52xxp1; - struct cvmx_pcsx_anx_results_reg_s cn56xx; - struct cvmx_pcsx_anx_results_reg_s cn56xxp1; - struct cvmx_pcsx_anx_results_reg_s cn61xx; - struct cvmx_pcsx_anx_results_reg_s cn63xx; - struct cvmx_pcsx_anx_results_reg_s cn63xxp1; - struct cvmx_pcsx_anx_results_reg_s cn66xx; - struct cvmx_pcsx_anx_results_reg_s cn68xx; - struct cvmx_pcsx_anx_results_reg_s cn68xxp1; - struct cvmx_pcsx_anx_results_reg_s cnf71xx; }; union cvmx_pcsx_intx_en_reg { @@ -542,16 +498,6 @@ union cvmx_pcsx_intx_en_reg { uint64_t reserved_12_63:52; #endif } cn52xx; - struct cvmx_pcsx_intx_en_reg_cn52xx cn52xxp1; - struct cvmx_pcsx_intx_en_reg_cn52xx cn56xx; - struct cvmx_pcsx_intx_en_reg_cn52xx cn56xxp1; - struct cvmx_pcsx_intx_en_reg_s cn61xx; - struct cvmx_pcsx_intx_en_reg_s cn63xx; - struct cvmx_pcsx_intx_en_reg_s cn63xxp1; - struct cvmx_pcsx_intx_en_reg_s cn66xx; - struct cvmx_pcsx_intx_en_reg_s cn68xx; - struct cvmx_pcsx_intx_en_reg_s cn68xxp1; - struct cvmx_pcsx_intx_en_reg_s cnf71xx; }; union cvmx_pcsx_intx_reg { @@ -620,16 +566,6 @@ union cvmx_pcsx_intx_reg { uint64_t reserved_12_63:52; #endif } cn52xx; - struct cvmx_pcsx_intx_reg_cn52xx cn52xxp1; - struct cvmx_pcsx_intx_reg_cn52xx cn56xx; - struct cvmx_pcsx_intx_reg_cn52xx cn56xxp1; - struct cvmx_pcsx_intx_reg_s cn61xx; - struct cvmx_pcsx_intx_reg_s cn63xx; - struct cvmx_pcsx_intx_reg_s cn63xxp1; - struct cvmx_pcsx_intx_reg_s cn66xx; - struct cvmx_pcsx_intx_reg_s cn68xx; - struct cvmx_pcsx_intx_reg_s cn68xxp1; - struct cvmx_pcsx_intx_reg_s cnf71xx; }; union cvmx_pcsx_linkx_timer_count_reg { @@ -643,17 +579,6 @@ union cvmx_pcsx_linkx_timer_count_reg { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_pcsx_linkx_timer_count_reg_s cn52xx; - struct cvmx_pcsx_linkx_timer_count_reg_s cn52xxp1; - struct cvmx_pcsx_linkx_timer_count_reg_s cn56xx; - struct cvmx_pcsx_linkx_timer_count_reg_s cn56xxp1; - struct cvmx_pcsx_linkx_timer_count_reg_s cn61xx; - struct cvmx_pcsx_linkx_timer_count_reg_s cn63xx; - struct cvmx_pcsx_linkx_timer_count_reg_s cn63xxp1; - struct cvmx_pcsx_linkx_timer_count_reg_s cn66xx; - struct cvmx_pcsx_linkx_timer_count_reg_s cn68xx; - struct cvmx_pcsx_linkx_timer_count_reg_s cn68xxp1; - struct cvmx_pcsx_linkx_timer_count_reg_s cnf71xx; }; union cvmx_pcsx_log_anlx_reg { @@ -671,17 +596,6 @@ union cvmx_pcsx_log_anlx_reg { uint64_t reserved_4_63:60; #endif } s; - struct cvmx_pcsx_log_anlx_reg_s cn52xx; - struct cvmx_pcsx_log_anlx_reg_s cn52xxp1; - struct cvmx_pcsx_log_anlx_reg_s cn56xx; - struct cvmx_pcsx_log_anlx_reg_s cn56xxp1; - struct cvmx_pcsx_log_anlx_reg_s cn61xx; - struct cvmx_pcsx_log_anlx_reg_s cn63xx; - struct cvmx_pcsx_log_anlx_reg_s cn63xxp1; - struct cvmx_pcsx_log_anlx_reg_s cn66xx; - struct cvmx_pcsx_log_anlx_reg_s cn68xx; - struct cvmx_pcsx_log_anlx_reg_s cn68xxp1; - struct cvmx_pcsx_log_anlx_reg_s cnf71xx; }; union cvmx_pcsx_miscx_ctl_reg { @@ -707,17 +621,6 @@ union cvmx_pcsx_miscx_ctl_reg { uint64_t reserved_13_63:51; #endif } s; - struct cvmx_pcsx_miscx_ctl_reg_s cn52xx; - struct cvmx_pcsx_miscx_ctl_reg_s cn52xxp1; - struct cvmx_pcsx_miscx_ctl_reg_s cn56xx; - struct cvmx_pcsx_miscx_ctl_reg_s cn56xxp1; - struct cvmx_pcsx_miscx_ctl_reg_s cn61xx; - struct cvmx_pcsx_miscx_ctl_reg_s cn63xx; - struct cvmx_pcsx_miscx_ctl_reg_s cn63xxp1; - struct cvmx_pcsx_miscx_ctl_reg_s cn66xx; - struct cvmx_pcsx_miscx_ctl_reg_s cn68xx; - struct cvmx_pcsx_miscx_ctl_reg_s cn68xxp1; - struct cvmx_pcsx_miscx_ctl_reg_s cnf71xx; }; union cvmx_pcsx_mrx_control_reg { @@ -753,17 +656,6 @@ union cvmx_pcsx_mrx_control_reg { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_pcsx_mrx_control_reg_s cn52xx; - struct cvmx_pcsx_mrx_control_reg_s cn52xxp1; - struct cvmx_pcsx_mrx_control_reg_s cn56xx; - struct cvmx_pcsx_mrx_control_reg_s cn56xxp1; - struct cvmx_pcsx_mrx_control_reg_s cn61xx; - struct cvmx_pcsx_mrx_control_reg_s cn63xx; - struct cvmx_pcsx_mrx_control_reg_s cn63xxp1; - struct cvmx_pcsx_mrx_control_reg_s cn66xx; - struct cvmx_pcsx_mrx_control_reg_s cn68xx; - struct cvmx_pcsx_mrx_control_reg_s cn68xxp1; - struct cvmx_pcsx_mrx_control_reg_s cnf71xx; }; union cvmx_pcsx_mrx_status_reg { @@ -807,17 +699,6 @@ union cvmx_pcsx_mrx_status_reg { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_pcsx_mrx_status_reg_s cn52xx; - struct cvmx_pcsx_mrx_status_reg_s cn52xxp1; - struct cvmx_pcsx_mrx_status_reg_s cn56xx; - struct cvmx_pcsx_mrx_status_reg_s cn56xxp1; - struct cvmx_pcsx_mrx_status_reg_s cn61xx; - struct cvmx_pcsx_mrx_status_reg_s cn63xx; - struct cvmx_pcsx_mrx_status_reg_s cn63xxp1; - struct cvmx_pcsx_mrx_status_reg_s cn66xx; - struct cvmx_pcsx_mrx_status_reg_s cn68xx; - struct cvmx_pcsx_mrx_status_reg_s cn68xxp1; - struct cvmx_pcsx_mrx_status_reg_s cnf71xx; }; union cvmx_pcsx_rxx_states_reg { @@ -841,17 +722,6 @@ union cvmx_pcsx_rxx_states_reg { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_pcsx_rxx_states_reg_s cn52xx; - struct cvmx_pcsx_rxx_states_reg_s cn52xxp1; - struct cvmx_pcsx_rxx_states_reg_s cn56xx; - struct cvmx_pcsx_rxx_states_reg_s cn56xxp1; - struct cvmx_pcsx_rxx_states_reg_s cn61xx; - struct cvmx_pcsx_rxx_states_reg_s cn63xx; - struct cvmx_pcsx_rxx_states_reg_s cn63xxp1; - struct cvmx_pcsx_rxx_states_reg_s cn66xx; - struct cvmx_pcsx_rxx_states_reg_s cn68xx; - struct cvmx_pcsx_rxx_states_reg_s cn68xxp1; - struct cvmx_pcsx_rxx_states_reg_s cnf71xx; }; union cvmx_pcsx_rxx_sync_reg { @@ -867,17 +737,6 @@ union cvmx_pcsx_rxx_sync_reg { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_pcsx_rxx_sync_reg_s cn52xx; - struct cvmx_pcsx_rxx_sync_reg_s cn52xxp1; - struct cvmx_pcsx_rxx_sync_reg_s cn56xx; - struct cvmx_pcsx_rxx_sync_reg_s cn56xxp1; - struct cvmx_pcsx_rxx_sync_reg_s cn61xx; - struct cvmx_pcsx_rxx_sync_reg_s cn63xx; - struct cvmx_pcsx_rxx_sync_reg_s cn63xxp1; - struct cvmx_pcsx_rxx_sync_reg_s cn66xx; - struct cvmx_pcsx_rxx_sync_reg_s cn68xx; - struct cvmx_pcsx_rxx_sync_reg_s cn68xxp1; - struct cvmx_pcsx_rxx_sync_reg_s cnf71xx; }; union cvmx_pcsx_sgmx_an_adv_reg { @@ -903,17 +762,6 @@ union cvmx_pcsx_sgmx_an_adv_reg { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_pcsx_sgmx_an_adv_reg_s cn52xx; - struct cvmx_pcsx_sgmx_an_adv_reg_s cn52xxp1; - struct cvmx_pcsx_sgmx_an_adv_reg_s cn56xx; - struct cvmx_pcsx_sgmx_an_adv_reg_s cn56xxp1; - struct cvmx_pcsx_sgmx_an_adv_reg_s cn61xx; - struct cvmx_pcsx_sgmx_an_adv_reg_s cn63xx; - struct cvmx_pcsx_sgmx_an_adv_reg_s cn63xxp1; - struct cvmx_pcsx_sgmx_an_adv_reg_s cn66xx; - struct cvmx_pcsx_sgmx_an_adv_reg_s cn68xx; - struct cvmx_pcsx_sgmx_an_adv_reg_s cn68xxp1; - struct cvmx_pcsx_sgmx_an_adv_reg_s cnf71xx; }; union cvmx_pcsx_sgmx_lp_adv_reg { @@ -937,17 +785,6 @@ union cvmx_pcsx_sgmx_lp_adv_reg { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_pcsx_sgmx_lp_adv_reg_s cn52xx; - struct cvmx_pcsx_sgmx_lp_adv_reg_s cn52xxp1; - struct cvmx_pcsx_sgmx_lp_adv_reg_s cn56xx; - struct cvmx_pcsx_sgmx_lp_adv_reg_s cn56xxp1; - struct cvmx_pcsx_sgmx_lp_adv_reg_s cn61xx; - struct cvmx_pcsx_sgmx_lp_adv_reg_s cn63xx; - struct cvmx_pcsx_sgmx_lp_adv_reg_s cn63xxp1; - struct cvmx_pcsx_sgmx_lp_adv_reg_s cn66xx; - struct cvmx_pcsx_sgmx_lp_adv_reg_s cn68xx; - struct cvmx_pcsx_sgmx_lp_adv_reg_s cn68xxp1; - struct cvmx_pcsx_sgmx_lp_adv_reg_s cnf71xx; }; union cvmx_pcsx_txx_states_reg { @@ -965,17 +802,6 @@ union cvmx_pcsx_txx_states_reg { uint64_t reserved_7_63:57; #endif } s; - struct cvmx_pcsx_txx_states_reg_s cn52xx; - struct cvmx_pcsx_txx_states_reg_s cn52xxp1; - struct cvmx_pcsx_txx_states_reg_s cn56xx; - struct cvmx_pcsx_txx_states_reg_s cn56xxp1; - struct cvmx_pcsx_txx_states_reg_s cn61xx; - struct cvmx_pcsx_txx_states_reg_s cn63xx; - struct cvmx_pcsx_txx_states_reg_s cn63xxp1; - struct cvmx_pcsx_txx_states_reg_s cn66xx; - struct cvmx_pcsx_txx_states_reg_s cn68xx; - struct cvmx_pcsx_txx_states_reg_s cn68xxp1; - struct cvmx_pcsx_txx_states_reg_s cnf71xx; }; union cvmx_pcsx_tx_rxx_polarity_reg { @@ -995,17 +821,6 @@ union cvmx_pcsx_tx_rxx_polarity_reg { uint64_t reserved_4_63:60; #endif } s; - struct cvmx_pcsx_tx_rxx_polarity_reg_s cn52xx; - struct cvmx_pcsx_tx_rxx_polarity_reg_s cn52xxp1; - struct cvmx_pcsx_tx_rxx_polarity_reg_s cn56xx; - struct cvmx_pcsx_tx_rxx_polarity_reg_s cn56xxp1; - struct cvmx_pcsx_tx_rxx_polarity_reg_s cn61xx; - struct cvmx_pcsx_tx_rxx_polarity_reg_s cn63xx; - struct cvmx_pcsx_tx_rxx_polarity_reg_s cn63xxp1; - struct cvmx_pcsx_tx_rxx_polarity_reg_s cn66xx; - struct cvmx_pcsx_tx_rxx_polarity_reg_s cn68xx; - struct cvmx_pcsx_tx_rxx_polarity_reg_s cn68xxp1; - struct cvmx_pcsx_tx_rxx_polarity_reg_s cnf71xx; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h b/arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h index 847dd9dca6ea..b353775eeeb6 100644 --- a/arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h @@ -293,16 +293,6 @@ union cvmx_pcsxx_10gbx_status_reg { uint64_t reserved_13_63:51; #endif } s; - struct cvmx_pcsxx_10gbx_status_reg_s cn52xx; - struct cvmx_pcsxx_10gbx_status_reg_s cn52xxp1; - struct cvmx_pcsxx_10gbx_status_reg_s cn56xx; - struct cvmx_pcsxx_10gbx_status_reg_s cn56xxp1; - struct cvmx_pcsxx_10gbx_status_reg_s cn61xx; - struct cvmx_pcsxx_10gbx_status_reg_s cn63xx; - struct cvmx_pcsxx_10gbx_status_reg_s cn63xxp1; - struct cvmx_pcsxx_10gbx_status_reg_s cn66xx; - struct cvmx_pcsxx_10gbx_status_reg_s cn68xx; - struct cvmx_pcsxx_10gbx_status_reg_s cn68xxp1; }; union cvmx_pcsxx_bist_status_reg { @@ -316,16 +306,6 @@ union cvmx_pcsxx_bist_status_reg { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_pcsxx_bist_status_reg_s cn52xx; - struct cvmx_pcsxx_bist_status_reg_s cn52xxp1; - struct cvmx_pcsxx_bist_status_reg_s cn56xx; - struct cvmx_pcsxx_bist_status_reg_s cn56xxp1; - struct cvmx_pcsxx_bist_status_reg_s cn61xx; - struct cvmx_pcsxx_bist_status_reg_s cn63xx; - struct cvmx_pcsxx_bist_status_reg_s cn63xxp1; - struct cvmx_pcsxx_bist_status_reg_s cn66xx; - struct cvmx_pcsxx_bist_status_reg_s cn68xx; - struct cvmx_pcsxx_bist_status_reg_s cn68xxp1; }; union cvmx_pcsxx_bit_lock_status_reg { @@ -345,16 +325,6 @@ union cvmx_pcsxx_bit_lock_status_reg { uint64_t reserved_4_63:60; #endif } s; - struct cvmx_pcsxx_bit_lock_status_reg_s cn52xx; - struct cvmx_pcsxx_bit_lock_status_reg_s cn52xxp1; - struct cvmx_pcsxx_bit_lock_status_reg_s cn56xx; - struct cvmx_pcsxx_bit_lock_status_reg_s cn56xxp1; - struct cvmx_pcsxx_bit_lock_status_reg_s cn61xx; - struct cvmx_pcsxx_bit_lock_status_reg_s cn63xx; - struct cvmx_pcsxx_bit_lock_status_reg_s cn63xxp1; - struct cvmx_pcsxx_bit_lock_status_reg_s cn66xx; - struct cvmx_pcsxx_bit_lock_status_reg_s cn68xx; - struct cvmx_pcsxx_bit_lock_status_reg_s cn68xxp1; }; union cvmx_pcsxx_control1_reg { @@ -384,16 +354,6 @@ union cvmx_pcsxx_control1_reg { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_pcsxx_control1_reg_s cn52xx; - struct cvmx_pcsxx_control1_reg_s cn52xxp1; - struct cvmx_pcsxx_control1_reg_s cn56xx; - struct cvmx_pcsxx_control1_reg_s cn56xxp1; - struct cvmx_pcsxx_control1_reg_s cn61xx; - struct cvmx_pcsxx_control1_reg_s cn63xx; - struct cvmx_pcsxx_control1_reg_s cn63xxp1; - struct cvmx_pcsxx_control1_reg_s cn66xx; - struct cvmx_pcsxx_control1_reg_s cn68xx; - struct cvmx_pcsxx_control1_reg_s cn68xxp1; }; union cvmx_pcsxx_control2_reg { @@ -407,16 +367,6 @@ union cvmx_pcsxx_control2_reg { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_pcsxx_control2_reg_s cn52xx; - struct cvmx_pcsxx_control2_reg_s cn52xxp1; - struct cvmx_pcsxx_control2_reg_s cn56xx; - struct cvmx_pcsxx_control2_reg_s cn56xxp1; - struct cvmx_pcsxx_control2_reg_s cn61xx; - struct cvmx_pcsxx_control2_reg_s cn63xx; - struct cvmx_pcsxx_control2_reg_s cn63xxp1; - struct cvmx_pcsxx_control2_reg_s cn66xx; - struct cvmx_pcsxx_control2_reg_s cn68xx; - struct cvmx_pcsxx_control2_reg_s cn68xxp1; }; union cvmx_pcsxx_int_en_reg { @@ -461,15 +411,6 @@ union cvmx_pcsxx_int_en_reg { uint64_t reserved_6_63:58; #endif } cn52xx; - struct cvmx_pcsxx_int_en_reg_cn52xx cn52xxp1; - struct cvmx_pcsxx_int_en_reg_cn52xx cn56xx; - struct cvmx_pcsxx_int_en_reg_cn52xx cn56xxp1; - struct cvmx_pcsxx_int_en_reg_s cn61xx; - struct cvmx_pcsxx_int_en_reg_s cn63xx; - struct cvmx_pcsxx_int_en_reg_s cn63xxp1; - struct cvmx_pcsxx_int_en_reg_s cn66xx; - struct cvmx_pcsxx_int_en_reg_s cn68xx; - struct cvmx_pcsxx_int_en_reg_s cn68xxp1; }; union cvmx_pcsxx_int_reg { @@ -514,15 +455,6 @@ union cvmx_pcsxx_int_reg { uint64_t reserved_6_63:58; #endif } cn52xx; - struct cvmx_pcsxx_int_reg_cn52xx cn52xxp1; - struct cvmx_pcsxx_int_reg_cn52xx cn56xx; - struct cvmx_pcsxx_int_reg_cn52xx cn56xxp1; - struct cvmx_pcsxx_int_reg_s cn61xx; - struct cvmx_pcsxx_int_reg_s cn63xx; - struct cvmx_pcsxx_int_reg_s cn63xxp1; - struct cvmx_pcsxx_int_reg_s cn66xx; - struct cvmx_pcsxx_int_reg_s cn68xx; - struct cvmx_pcsxx_int_reg_s cn68xxp1; }; union cvmx_pcsxx_log_anl_reg { @@ -544,16 +476,6 @@ union cvmx_pcsxx_log_anl_reg { uint64_t reserved_7_63:57; #endif } s; - struct cvmx_pcsxx_log_anl_reg_s cn52xx; - struct cvmx_pcsxx_log_anl_reg_s cn52xxp1; - struct cvmx_pcsxx_log_anl_reg_s cn56xx; - struct cvmx_pcsxx_log_anl_reg_s cn56xxp1; - struct cvmx_pcsxx_log_anl_reg_s cn61xx; - struct cvmx_pcsxx_log_anl_reg_s cn63xx; - struct cvmx_pcsxx_log_anl_reg_s cn63xxp1; - struct cvmx_pcsxx_log_anl_reg_s cn66xx; - struct cvmx_pcsxx_log_anl_reg_s cn68xx; - struct cvmx_pcsxx_log_anl_reg_s cn68xxp1; }; union cvmx_pcsxx_misc_ctl_reg { @@ -573,16 +495,6 @@ union cvmx_pcsxx_misc_ctl_reg { uint64_t reserved_4_63:60; #endif } s; - struct cvmx_pcsxx_misc_ctl_reg_s cn52xx; - struct cvmx_pcsxx_misc_ctl_reg_s cn52xxp1; - struct cvmx_pcsxx_misc_ctl_reg_s cn56xx; - struct cvmx_pcsxx_misc_ctl_reg_s cn56xxp1; - struct cvmx_pcsxx_misc_ctl_reg_s cn61xx; - struct cvmx_pcsxx_misc_ctl_reg_s cn63xx; - struct cvmx_pcsxx_misc_ctl_reg_s cn63xxp1; - struct cvmx_pcsxx_misc_ctl_reg_s cn66xx; - struct cvmx_pcsxx_misc_ctl_reg_s cn68xx; - struct cvmx_pcsxx_misc_ctl_reg_s cn68xxp1; }; union cvmx_pcsxx_rx_sync_states_reg { @@ -602,16 +514,6 @@ union cvmx_pcsxx_rx_sync_states_reg { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_pcsxx_rx_sync_states_reg_s cn52xx; - struct cvmx_pcsxx_rx_sync_states_reg_s cn52xxp1; - struct cvmx_pcsxx_rx_sync_states_reg_s cn56xx; - struct cvmx_pcsxx_rx_sync_states_reg_s cn56xxp1; - struct cvmx_pcsxx_rx_sync_states_reg_s cn61xx; - struct cvmx_pcsxx_rx_sync_states_reg_s cn63xx; - struct cvmx_pcsxx_rx_sync_states_reg_s cn63xxp1; - struct cvmx_pcsxx_rx_sync_states_reg_s cn66xx; - struct cvmx_pcsxx_rx_sync_states_reg_s cn68xx; - struct cvmx_pcsxx_rx_sync_states_reg_s cn68xxp1; }; union cvmx_pcsxx_spd_abil_reg { @@ -627,16 +529,6 @@ union cvmx_pcsxx_spd_abil_reg { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_pcsxx_spd_abil_reg_s cn52xx; - struct cvmx_pcsxx_spd_abil_reg_s cn52xxp1; - struct cvmx_pcsxx_spd_abil_reg_s cn56xx; - struct cvmx_pcsxx_spd_abil_reg_s cn56xxp1; - struct cvmx_pcsxx_spd_abil_reg_s cn61xx; - struct cvmx_pcsxx_spd_abil_reg_s cn63xx; - struct cvmx_pcsxx_spd_abil_reg_s cn63xxp1; - struct cvmx_pcsxx_spd_abil_reg_s cn66xx; - struct cvmx_pcsxx_spd_abil_reg_s cn68xx; - struct cvmx_pcsxx_spd_abil_reg_s cn68xxp1; }; union cvmx_pcsxx_status1_reg { @@ -658,16 +550,6 @@ union cvmx_pcsxx_status1_reg { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_pcsxx_status1_reg_s cn52xx; - struct cvmx_pcsxx_status1_reg_s cn52xxp1; - struct cvmx_pcsxx_status1_reg_s cn56xx; - struct cvmx_pcsxx_status1_reg_s cn56xxp1; - struct cvmx_pcsxx_status1_reg_s cn61xx; - struct cvmx_pcsxx_status1_reg_s cn63xx; - struct cvmx_pcsxx_status1_reg_s cn63xxp1; - struct cvmx_pcsxx_status1_reg_s cn66xx; - struct cvmx_pcsxx_status1_reg_s cn68xx; - struct cvmx_pcsxx_status1_reg_s cn68xxp1; }; union cvmx_pcsxx_status2_reg { @@ -695,16 +577,6 @@ union cvmx_pcsxx_status2_reg { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_pcsxx_status2_reg_s cn52xx; - struct cvmx_pcsxx_status2_reg_s cn52xxp1; - struct cvmx_pcsxx_status2_reg_s cn56xx; - struct cvmx_pcsxx_status2_reg_s cn56xxp1; - struct cvmx_pcsxx_status2_reg_s cn61xx; - struct cvmx_pcsxx_status2_reg_s cn63xx; - struct cvmx_pcsxx_status2_reg_s cn63xxp1; - struct cvmx_pcsxx_status2_reg_s cn66xx; - struct cvmx_pcsxx_status2_reg_s cn68xx; - struct cvmx_pcsxx_status2_reg_s cn68xxp1; }; union cvmx_pcsxx_tx_rx_polarity_reg { @@ -724,7 +596,6 @@ union cvmx_pcsxx_tx_rx_polarity_reg { uint64_t reserved_10_63:54; #endif } s; - struct cvmx_pcsxx_tx_rx_polarity_reg_s cn52xx; struct cvmx_pcsxx_tx_rx_polarity_reg_cn52xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_2_63:62; @@ -736,14 +607,6 @@ union cvmx_pcsxx_tx_rx_polarity_reg { uint64_t reserved_2_63:62; #endif } cn52xxp1; - struct cvmx_pcsxx_tx_rx_polarity_reg_s cn56xx; - struct cvmx_pcsxx_tx_rx_polarity_reg_cn52xxp1 cn56xxp1; - struct cvmx_pcsxx_tx_rx_polarity_reg_s cn61xx; - struct cvmx_pcsxx_tx_rx_polarity_reg_s cn63xx; - struct cvmx_pcsxx_tx_rx_polarity_reg_s cn63xxp1; - struct cvmx_pcsxx_tx_rx_polarity_reg_s cn66xx; - struct cvmx_pcsxx_tx_rx_polarity_reg_s cn68xx; - struct cvmx_pcsxx_tx_rx_polarity_reg_s cn68xxp1; }; union cvmx_pcsxx_tx_rx_states_reg { @@ -773,7 +636,6 @@ union cvmx_pcsxx_tx_rx_states_reg { uint64_t reserved_14_63:50; #endif } s; - struct cvmx_pcsxx_tx_rx_states_reg_s cn52xx; struct cvmx_pcsxx_tx_rx_states_reg_cn52xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_13_63:51; @@ -797,14 +659,6 @@ union cvmx_pcsxx_tx_rx_states_reg { uint64_t reserved_13_63:51; #endif } cn52xxp1; - struct cvmx_pcsxx_tx_rx_states_reg_s cn56xx; - struct cvmx_pcsxx_tx_rx_states_reg_cn52xxp1 cn56xxp1; - struct cvmx_pcsxx_tx_rx_states_reg_s cn61xx; - struct cvmx_pcsxx_tx_rx_states_reg_s cn63xx; - struct cvmx_pcsxx_tx_rx_states_reg_s cn63xxp1; - struct cvmx_pcsxx_tx_rx_states_reg_s cn66xx; - struct cvmx_pcsxx_tx_rx_states_reg_s cn68xx; - struct cvmx_pcsxx_tx_rx_states_reg_s cn68xxp1; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-pemx-defs.h b/arch/mips/include/asm/octeon/cvmx-pemx-defs.h index 50a916f892fa..d2d6dba938e9 100644 --- a/arch/mips/include/asm/octeon/cvmx-pemx-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-pemx-defs.h @@ -68,13 +68,6 @@ union cvmx_pemx_bar1_indexx { uint64_t reserved_20_63:44; #endif } s; - struct cvmx_pemx_bar1_indexx_s cn61xx; - struct cvmx_pemx_bar1_indexx_s cn63xx; - struct cvmx_pemx_bar1_indexx_s cn63xxp1; - struct cvmx_pemx_bar1_indexx_s cn66xx; - struct cvmx_pemx_bar1_indexx_s cn68xx; - struct cvmx_pemx_bar1_indexx_s cn68xxp1; - struct cvmx_pemx_bar1_indexx_s cnf71xx; }; union cvmx_pemx_bar2_mask { @@ -90,11 +83,6 @@ union cvmx_pemx_bar2_mask { uint64_t reserved_38_63:26; #endif } s; - struct cvmx_pemx_bar2_mask_s cn61xx; - struct cvmx_pemx_bar2_mask_s cn66xx; - struct cvmx_pemx_bar2_mask_s cn68xx; - struct cvmx_pemx_bar2_mask_s cn68xxp1; - struct cvmx_pemx_bar2_mask_s cnf71xx; }; union cvmx_pemx_bar_ctl { @@ -114,13 +102,6 @@ union cvmx_pemx_bar_ctl { uint64_t reserved_7_63:57; #endif } s; - struct cvmx_pemx_bar_ctl_s cn61xx; - struct cvmx_pemx_bar_ctl_s cn63xx; - struct cvmx_pemx_bar_ctl_s cn63xxp1; - struct cvmx_pemx_bar_ctl_s cn66xx; - struct cvmx_pemx_bar_ctl_s cn68xx; - struct cvmx_pemx_bar_ctl_s cn68xxp1; - struct cvmx_pemx_bar_ctl_s cnf71xx; }; union cvmx_pemx_bist_status { @@ -148,13 +129,6 @@ union cvmx_pemx_bist_status { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_pemx_bist_status_s cn61xx; - struct cvmx_pemx_bist_status_s cn63xx; - struct cvmx_pemx_bist_status_s cn63xxp1; - struct cvmx_pemx_bist_status_s cn66xx; - struct cvmx_pemx_bist_status_s cn68xx; - struct cvmx_pemx_bist_status_s cn68xxp1; - struct cvmx_pemx_bist_status_s cnf71xx; }; union cvmx_pemx_bist_status2 { @@ -186,13 +160,6 @@ union cvmx_pemx_bist_status2 { uint64_t reserved_10_63:54; #endif } s; - struct cvmx_pemx_bist_status2_s cn61xx; - struct cvmx_pemx_bist_status2_s cn63xx; - struct cvmx_pemx_bist_status2_s cn63xxp1; - struct cvmx_pemx_bist_status2_s cn66xx; - struct cvmx_pemx_bist_status2_s cn68xx; - struct cvmx_pemx_bist_status2_s cn68xxp1; - struct cvmx_pemx_bist_status2_s cnf71xx; }; union cvmx_pemx_cfg_rd { @@ -206,13 +173,6 @@ union cvmx_pemx_cfg_rd { uint64_t data:32; #endif } s; - struct cvmx_pemx_cfg_rd_s cn61xx; - struct cvmx_pemx_cfg_rd_s cn63xx; - struct cvmx_pemx_cfg_rd_s cn63xxp1; - struct cvmx_pemx_cfg_rd_s cn66xx; - struct cvmx_pemx_cfg_rd_s cn68xx; - struct cvmx_pemx_cfg_rd_s cn68xxp1; - struct cvmx_pemx_cfg_rd_s cnf71xx; }; union cvmx_pemx_cfg_wr { @@ -226,13 +186,6 @@ union cvmx_pemx_cfg_wr { uint64_t data:32; #endif } s; - struct cvmx_pemx_cfg_wr_s cn61xx; - struct cvmx_pemx_cfg_wr_s cn63xx; - struct cvmx_pemx_cfg_wr_s cn63xxp1; - struct cvmx_pemx_cfg_wr_s cn66xx; - struct cvmx_pemx_cfg_wr_s cn68xx; - struct cvmx_pemx_cfg_wr_s cn68xxp1; - struct cvmx_pemx_cfg_wr_s cnf71xx; }; union cvmx_pemx_cpl_lut_valid { @@ -246,13 +199,6 @@ union cvmx_pemx_cpl_lut_valid { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_pemx_cpl_lut_valid_s cn61xx; - struct cvmx_pemx_cpl_lut_valid_s cn63xx; - struct cvmx_pemx_cpl_lut_valid_s cn63xxp1; - struct cvmx_pemx_cpl_lut_valid_s cn66xx; - struct cvmx_pemx_cpl_lut_valid_s cn68xx; - struct cvmx_pemx_cpl_lut_valid_s cn68xxp1; - struct cvmx_pemx_cpl_lut_valid_s cnf71xx; }; union cvmx_pemx_ctl_status { @@ -298,13 +244,6 @@ union cvmx_pemx_ctl_status { uint64_t reserved_48_63:16; #endif } s; - struct cvmx_pemx_ctl_status_s cn61xx; - struct cvmx_pemx_ctl_status_s cn63xx; - struct cvmx_pemx_ctl_status_s cn63xxp1; - struct cvmx_pemx_ctl_status_s cn66xx; - struct cvmx_pemx_ctl_status_s cn68xx; - struct cvmx_pemx_ctl_status_s cn68xxp1; - struct cvmx_pemx_ctl_status_s cnf71xx; }; union cvmx_pemx_dbg_info { @@ -378,13 +317,6 @@ union cvmx_pemx_dbg_info { uint64_t reserved_31_63:33; #endif } s; - struct cvmx_pemx_dbg_info_s cn61xx; - struct cvmx_pemx_dbg_info_s cn63xx; - struct cvmx_pemx_dbg_info_s cn63xxp1; - struct cvmx_pemx_dbg_info_s cn66xx; - struct cvmx_pemx_dbg_info_s cn68xx; - struct cvmx_pemx_dbg_info_s cn68xxp1; - struct cvmx_pemx_dbg_info_s cnf71xx; }; union cvmx_pemx_dbg_info_en { @@ -458,13 +390,6 @@ union cvmx_pemx_dbg_info_en { uint64_t reserved_31_63:33; #endif } s; - struct cvmx_pemx_dbg_info_en_s cn61xx; - struct cvmx_pemx_dbg_info_en_s cn63xx; - struct cvmx_pemx_dbg_info_en_s cn63xxp1; - struct cvmx_pemx_dbg_info_en_s cn66xx; - struct cvmx_pemx_dbg_info_en_s cn68xx; - struct cvmx_pemx_dbg_info_en_s cn68xxp1; - struct cvmx_pemx_dbg_info_en_s cnf71xx; }; union cvmx_pemx_diag_status { @@ -484,13 +409,6 @@ union cvmx_pemx_diag_status { uint64_t reserved_4_63:60; #endif } s; - struct cvmx_pemx_diag_status_s cn61xx; - struct cvmx_pemx_diag_status_s cn63xx; - struct cvmx_pemx_diag_status_s cn63xxp1; - struct cvmx_pemx_diag_status_s cn66xx; - struct cvmx_pemx_diag_status_s cn68xx; - struct cvmx_pemx_diag_status_s cn68xxp1; - struct cvmx_pemx_diag_status_s cnf71xx; }; union cvmx_pemx_inb_read_credits { @@ -504,10 +422,6 @@ union cvmx_pemx_inb_read_credits { uint64_t reserved_6_63:58; #endif } s; - struct cvmx_pemx_inb_read_credits_s cn61xx; - struct cvmx_pemx_inb_read_credits_s cn66xx; - struct cvmx_pemx_inb_read_credits_s cn68xx; - struct cvmx_pemx_inb_read_credits_s cnf71xx; }; union cvmx_pemx_int_enb { @@ -547,13 +461,6 @@ union cvmx_pemx_int_enb { uint64_t reserved_14_63:50; #endif } s; - struct cvmx_pemx_int_enb_s cn61xx; - struct cvmx_pemx_int_enb_s cn63xx; - struct cvmx_pemx_int_enb_s cn63xxp1; - struct cvmx_pemx_int_enb_s cn66xx; - struct cvmx_pemx_int_enb_s cn68xx; - struct cvmx_pemx_int_enb_s cn68xxp1; - struct cvmx_pemx_int_enb_s cnf71xx; }; union cvmx_pemx_int_enb_int { @@ -593,13 +500,6 @@ union cvmx_pemx_int_enb_int { uint64_t reserved_14_63:50; #endif } s; - struct cvmx_pemx_int_enb_int_s cn61xx; - struct cvmx_pemx_int_enb_int_s cn63xx; - struct cvmx_pemx_int_enb_int_s cn63xxp1; - struct cvmx_pemx_int_enb_int_s cn66xx; - struct cvmx_pemx_int_enb_int_s cn68xx; - struct cvmx_pemx_int_enb_int_s cn68xxp1; - struct cvmx_pemx_int_enb_int_s cnf71xx; }; union cvmx_pemx_int_sum { @@ -639,13 +539,6 @@ union cvmx_pemx_int_sum { uint64_t reserved_14_63:50; #endif } s; - struct cvmx_pemx_int_sum_s cn61xx; - struct cvmx_pemx_int_sum_s cn63xx; - struct cvmx_pemx_int_sum_s cn63xxp1; - struct cvmx_pemx_int_sum_s cn66xx; - struct cvmx_pemx_int_sum_s cn68xx; - struct cvmx_pemx_int_sum_s cn68xxp1; - struct cvmx_pemx_int_sum_s cnf71xx; }; union cvmx_pemx_p2n_bar0_start { @@ -659,13 +552,6 @@ union cvmx_pemx_p2n_bar0_start { uint64_t addr:50; #endif } s; - struct cvmx_pemx_p2n_bar0_start_s cn61xx; - struct cvmx_pemx_p2n_bar0_start_s cn63xx; - struct cvmx_pemx_p2n_bar0_start_s cn63xxp1; - struct cvmx_pemx_p2n_bar0_start_s cn66xx; - struct cvmx_pemx_p2n_bar0_start_s cn68xx; - struct cvmx_pemx_p2n_bar0_start_s cn68xxp1; - struct cvmx_pemx_p2n_bar0_start_s cnf71xx; }; union cvmx_pemx_p2n_bar1_start { @@ -679,13 +565,6 @@ union cvmx_pemx_p2n_bar1_start { uint64_t addr:38; #endif } s; - struct cvmx_pemx_p2n_bar1_start_s cn61xx; - struct cvmx_pemx_p2n_bar1_start_s cn63xx; - struct cvmx_pemx_p2n_bar1_start_s cn63xxp1; - struct cvmx_pemx_p2n_bar1_start_s cn66xx; - struct cvmx_pemx_p2n_bar1_start_s cn68xx; - struct cvmx_pemx_p2n_bar1_start_s cn68xxp1; - struct cvmx_pemx_p2n_bar1_start_s cnf71xx; }; union cvmx_pemx_p2n_bar2_start { @@ -699,13 +578,6 @@ union cvmx_pemx_p2n_bar2_start { uint64_t addr:23; #endif } s; - struct cvmx_pemx_p2n_bar2_start_s cn61xx; - struct cvmx_pemx_p2n_bar2_start_s cn63xx; - struct cvmx_pemx_p2n_bar2_start_s cn63xxp1; - struct cvmx_pemx_p2n_bar2_start_s cn66xx; - struct cvmx_pemx_p2n_bar2_start_s cn68xx; - struct cvmx_pemx_p2n_bar2_start_s cn68xxp1; - struct cvmx_pemx_p2n_bar2_start_s cnf71xx; }; union cvmx_pemx_p2p_barx_end { @@ -719,11 +591,6 @@ union cvmx_pemx_p2p_barx_end { uint64_t addr:52; #endif } s; - struct cvmx_pemx_p2p_barx_end_s cn63xx; - struct cvmx_pemx_p2p_barx_end_s cn63xxp1; - struct cvmx_pemx_p2p_barx_end_s cn66xx; - struct cvmx_pemx_p2p_barx_end_s cn68xx; - struct cvmx_pemx_p2p_barx_end_s cn68xxp1; }; union cvmx_pemx_p2p_barx_start { @@ -737,11 +604,6 @@ union cvmx_pemx_p2p_barx_start { uint64_t addr:52; #endif } s; - struct cvmx_pemx_p2p_barx_start_s cn63xx; - struct cvmx_pemx_p2p_barx_start_s cn63xxp1; - struct cvmx_pemx_p2p_barx_start_s cn66xx; - struct cvmx_pemx_p2p_barx_start_s cn68xx; - struct cvmx_pemx_p2p_barx_start_s cn68xxp1; }; union cvmx_pemx_tlp_credits { @@ -784,12 +646,6 @@ union cvmx_pemx_tlp_credits { uint64_t reserved_56_63:8; #endif } cn61xx; - struct cvmx_pemx_tlp_credits_s cn63xx; - struct cvmx_pemx_tlp_credits_s cn63xxp1; - struct cvmx_pemx_tlp_credits_s cn66xx; - struct cvmx_pemx_tlp_credits_s cn68xx; - struct cvmx_pemx_tlp_credits_s cn68xxp1; - struct cvmx_pemx_tlp_credits_cn61xx cnf71xx; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-pescx-defs.h b/arch/mips/include/asm/octeon/cvmx-pescx-defs.h index 59b3dc565442..66561082529e 100644 --- a/arch/mips/include/asm/octeon/cvmx-pescx-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-pescx-defs.h @@ -80,7 +80,6 @@ union cvmx_pescx_bist_status { uint64_t reserved_13_63:51; #endif } s; - struct cvmx_pescx_bist_status_s cn52xx; struct cvmx_pescx_bist_status_cn52xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_12_63:52; @@ -112,8 +111,6 @@ union cvmx_pescx_bist_status { uint64_t reserved_12_63:52; #endif } cn52xxp1; - struct cvmx_pescx_bist_status_s cn56xx; - struct cvmx_pescx_bist_status_cn52xxp1 cn56xxp1; }; union cvmx_pescx_bist_status2 { @@ -153,10 +150,6 @@ union cvmx_pescx_bist_status2 { uint64_t reserved_14_63:50; #endif } s; - struct cvmx_pescx_bist_status2_s cn52xx; - struct cvmx_pescx_bist_status2_s cn52xxp1; - struct cvmx_pescx_bist_status2_s cn56xx; - struct cvmx_pescx_bist_status2_s cn56xxp1; }; union cvmx_pescx_cfg_rd { @@ -170,10 +163,6 @@ union cvmx_pescx_cfg_rd { uint64_t data:32; #endif } s; - struct cvmx_pescx_cfg_rd_s cn52xx; - struct cvmx_pescx_cfg_rd_s cn52xxp1; - struct cvmx_pescx_cfg_rd_s cn56xx; - struct cvmx_pescx_cfg_rd_s cn56xxp1; }; union cvmx_pescx_cfg_wr { @@ -187,10 +176,6 @@ union cvmx_pescx_cfg_wr { uint64_t data:32; #endif } s; - struct cvmx_pescx_cfg_wr_s cn52xx; - struct cvmx_pescx_cfg_wr_s cn52xxp1; - struct cvmx_pescx_cfg_wr_s cn56xx; - struct cvmx_pescx_cfg_wr_s cn56xxp1; }; union cvmx_pescx_cpl_lut_valid { @@ -204,10 +189,6 @@ union cvmx_pescx_cpl_lut_valid { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_pescx_cpl_lut_valid_s cn52xx; - struct cvmx_pescx_cpl_lut_valid_s cn52xxp1; - struct cvmx_pescx_cpl_lut_valid_s cn56xx; - struct cvmx_pescx_cpl_lut_valid_s cn56xxp1; }; union cvmx_pescx_ctl_status { @@ -249,8 +230,6 @@ union cvmx_pescx_ctl_status { uint64_t reserved_28_63:36; #endif } s; - struct cvmx_pescx_ctl_status_s cn52xx; - struct cvmx_pescx_ctl_status_s cn52xxp1; struct cvmx_pescx_ctl_status_cn56xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_28_63:36; @@ -288,7 +267,6 @@ union cvmx_pescx_ctl_status { uint64_t reserved_28_63:36; #endif } cn56xx; - struct cvmx_pescx_ctl_status_cn56xx cn56xxp1; }; union cvmx_pescx_ctl_status2 { @@ -304,7 +282,6 @@ union cvmx_pescx_ctl_status2 { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_pescx_ctl_status2_s cn52xx; struct cvmx_pescx_ctl_status2_cn52xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_1_63:63; @@ -314,8 +291,6 @@ union cvmx_pescx_ctl_status2 { uint64_t reserved_1_63:63; #endif } cn52xxp1; - struct cvmx_pescx_ctl_status2_s cn56xx; - struct cvmx_pescx_ctl_status2_cn52xxp1 cn56xxp1; }; union cvmx_pescx_dbg_info { @@ -389,10 +364,6 @@ union cvmx_pescx_dbg_info { uint64_t reserved_31_63:33; #endif } s; - struct cvmx_pescx_dbg_info_s cn52xx; - struct cvmx_pescx_dbg_info_s cn52xxp1; - struct cvmx_pescx_dbg_info_s cn56xx; - struct cvmx_pescx_dbg_info_s cn56xxp1; }; union cvmx_pescx_dbg_info_en { @@ -466,10 +437,6 @@ union cvmx_pescx_dbg_info_en { uint64_t reserved_31_63:33; #endif } s; - struct cvmx_pescx_dbg_info_en_s cn52xx; - struct cvmx_pescx_dbg_info_en_s cn52xxp1; - struct cvmx_pescx_dbg_info_en_s cn56xx; - struct cvmx_pescx_dbg_info_en_s cn56xxp1; }; union cvmx_pescx_diag_status { @@ -489,10 +456,6 @@ union cvmx_pescx_diag_status { uint64_t reserved_4_63:60; #endif } s; - struct cvmx_pescx_diag_status_s cn52xx; - struct cvmx_pescx_diag_status_s cn52xxp1; - struct cvmx_pescx_diag_status_s cn56xx; - struct cvmx_pescx_diag_status_s cn56xxp1; }; union cvmx_pescx_p2n_bar0_start { @@ -506,10 +469,6 @@ union cvmx_pescx_p2n_bar0_start { uint64_t addr:50; #endif } s; - struct cvmx_pescx_p2n_bar0_start_s cn52xx; - struct cvmx_pescx_p2n_bar0_start_s cn52xxp1; - struct cvmx_pescx_p2n_bar0_start_s cn56xx; - struct cvmx_pescx_p2n_bar0_start_s cn56xxp1; }; union cvmx_pescx_p2n_bar1_start { @@ -523,10 +482,6 @@ union cvmx_pescx_p2n_bar1_start { uint64_t addr:38; #endif } s; - struct cvmx_pescx_p2n_bar1_start_s cn52xx; - struct cvmx_pescx_p2n_bar1_start_s cn52xxp1; - struct cvmx_pescx_p2n_bar1_start_s cn56xx; - struct cvmx_pescx_p2n_bar1_start_s cn56xxp1; }; union cvmx_pescx_p2n_bar2_start { @@ -540,10 +495,6 @@ union cvmx_pescx_p2n_bar2_start { uint64_t addr:25; #endif } s; - struct cvmx_pescx_p2n_bar2_start_s cn52xx; - struct cvmx_pescx_p2n_bar2_start_s cn52xxp1; - struct cvmx_pescx_p2n_bar2_start_s cn56xx; - struct cvmx_pescx_p2n_bar2_start_s cn56xxp1; }; union cvmx_pescx_p2p_barx_end { @@ -557,10 +508,6 @@ union cvmx_pescx_p2p_barx_end { uint64_t addr:52; #endif } s; - struct cvmx_pescx_p2p_barx_end_s cn52xx; - struct cvmx_pescx_p2p_barx_end_s cn52xxp1; - struct cvmx_pescx_p2p_barx_end_s cn56xx; - struct cvmx_pescx_p2p_barx_end_s cn56xxp1; }; union cvmx_pescx_p2p_barx_start { @@ -574,10 +521,6 @@ union cvmx_pescx_p2p_barx_start { uint64_t addr:52; #endif } s; - struct cvmx_pescx_p2p_barx_start_s cn52xx; - struct cvmx_pescx_p2p_barx_start_s cn52xxp1; - struct cvmx_pescx_p2p_barx_start_s cn56xx; - struct cvmx_pescx_p2p_barx_start_s cn56xxp1; }; union cvmx_pescx_tlp_credits { @@ -631,8 +574,6 @@ union cvmx_pescx_tlp_credits { uint64_t reserved_38_63:26; #endif } cn52xxp1; - struct cvmx_pescx_tlp_credits_cn52xx cn56xx; - struct cvmx_pescx_tlp_credits_cn52xxp1 cn56xxp1; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-pip-defs.h b/arch/mips/include/asm/octeon/cvmx-pip-defs.h index e975c7d2e485..e42f411bd2de 100644 --- a/arch/mips/include/asm/octeon/cvmx-pip-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-pip-defs.h @@ -160,10 +160,6 @@ union cvmx_pip_alt_skip_cfgx { uint64_t reserved_57_63:7; #endif } s; - struct cvmx_pip_alt_skip_cfgx_s cn61xx; - struct cvmx_pip_alt_skip_cfgx_s cn66xx; - struct cvmx_pip_alt_skip_cfgx_s cn68xx; - struct cvmx_pip_alt_skip_cfgx_s cnf71xx; }; union cvmx_pip_bck_prs { @@ -183,19 +179,6 @@ union cvmx_pip_bck_prs { uint64_t bckprs:1; #endif } s; - struct cvmx_pip_bck_prs_s cn38xx; - struct cvmx_pip_bck_prs_s cn38xxp2; - struct cvmx_pip_bck_prs_s cn56xx; - struct cvmx_pip_bck_prs_s cn56xxp1; - struct cvmx_pip_bck_prs_s cn58xx; - struct cvmx_pip_bck_prs_s cn58xxp1; - struct cvmx_pip_bck_prs_s cn61xx; - struct cvmx_pip_bck_prs_s cn63xx; - struct cvmx_pip_bck_prs_s cn63xxp1; - struct cvmx_pip_bck_prs_s cn66xx; - struct cvmx_pip_bck_prs_s cn68xx; - struct cvmx_pip_bck_prs_s cn68xxp1; - struct cvmx_pip_bck_prs_s cnf71xx; }; union cvmx_pip_bist_status { @@ -218,9 +201,6 @@ union cvmx_pip_bist_status { uint64_t reserved_18_63:46; #endif } cn30xx; - struct cvmx_pip_bist_status_cn30xx cn31xx; - struct cvmx_pip_bist_status_cn30xx cn38xx; - struct cvmx_pip_bist_status_cn30xx cn38xxp2; struct cvmx_pip_bist_status_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_17_63:47; @@ -230,12 +210,6 @@ union cvmx_pip_bist_status { uint64_t reserved_17_63:47; #endif } cn50xx; - struct cvmx_pip_bist_status_cn30xx cn52xx; - struct cvmx_pip_bist_status_cn30xx cn52xxp1; - struct cvmx_pip_bist_status_cn30xx cn56xx; - struct cvmx_pip_bist_status_cn30xx cn56xxp1; - struct cvmx_pip_bist_status_cn30xx cn58xx; - struct cvmx_pip_bist_status_cn30xx cn58xxp1; struct cvmx_pip_bist_status_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_20_63:44; @@ -245,12 +219,6 @@ union cvmx_pip_bist_status { uint64_t reserved_20_63:44; #endif } cn61xx; - struct cvmx_pip_bist_status_cn30xx cn63xx; - struct cvmx_pip_bist_status_cn30xx cn63xxp1; - struct cvmx_pip_bist_status_cn61xx cn66xx; - struct cvmx_pip_bist_status_s cn68xx; - struct cvmx_pip_bist_status_cn61xx cn68xxp1; - struct cvmx_pip_bist_status_cn61xx cnf71xx; }; union cvmx_pip_bsel_ext_cfgx { @@ -274,9 +242,6 @@ union cvmx_pip_bsel_ext_cfgx { uint64_t reserved_56_63:8; #endif } s; - struct cvmx_pip_bsel_ext_cfgx_s cn61xx; - struct cvmx_pip_bsel_ext_cfgx_s cn68xx; - struct cvmx_pip_bsel_ext_cfgx_s cnf71xx; }; union cvmx_pip_bsel_ext_posx { @@ -318,9 +283,6 @@ union cvmx_pip_bsel_ext_posx { uint64_t pos7_val:1; #endif } s; - struct cvmx_pip_bsel_ext_posx_s cn61xx; - struct cvmx_pip_bsel_ext_posx_s cn68xx; - struct cvmx_pip_bsel_ext_posx_s cnf71xx; }; union cvmx_pip_bsel_tbl_entx { @@ -383,8 +345,6 @@ union cvmx_pip_bsel_tbl_entx { uint64_t tag_en:1; #endif } cn61xx; - struct cvmx_pip_bsel_tbl_entx_s cn68xx; - struct cvmx_pip_bsel_tbl_entx_cn61xx cnf71xx; }; union cvmx_pip_clken { @@ -398,13 +358,6 @@ union cvmx_pip_clken { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_pip_clken_s cn61xx; - struct cvmx_pip_clken_s cn63xx; - struct cvmx_pip_clken_s cn63xxp1; - struct cvmx_pip_clken_s cn66xx; - struct cvmx_pip_clken_s cn68xx; - struct cvmx_pip_clken_s cn68xxp1; - struct cvmx_pip_clken_s cnf71xx; }; union cvmx_pip_crc_ctlx { @@ -420,10 +373,6 @@ union cvmx_pip_crc_ctlx { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_pip_crc_ctlx_s cn38xx; - struct cvmx_pip_crc_ctlx_s cn38xxp2; - struct cvmx_pip_crc_ctlx_s cn58xx; - struct cvmx_pip_crc_ctlx_s cn58xxp1; }; union cvmx_pip_crc_ivx { @@ -437,10 +386,6 @@ union cvmx_pip_crc_ivx { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_pip_crc_ivx_s cn38xx; - struct cvmx_pip_crc_ivx_s cn38xxp2; - struct cvmx_pip_crc_ivx_s cn58xx; - struct cvmx_pip_crc_ivx_s cn58xxp1; }; union cvmx_pip_dec_ipsecx { @@ -458,24 +403,6 @@ union cvmx_pip_dec_ipsecx { uint64_t reserved_18_63:46; #endif } s; - struct cvmx_pip_dec_ipsecx_s cn30xx; - struct cvmx_pip_dec_ipsecx_s cn31xx; - struct cvmx_pip_dec_ipsecx_s cn38xx; - struct cvmx_pip_dec_ipsecx_s cn38xxp2; - struct cvmx_pip_dec_ipsecx_s cn50xx; - struct cvmx_pip_dec_ipsecx_s cn52xx; - struct cvmx_pip_dec_ipsecx_s cn52xxp1; - struct cvmx_pip_dec_ipsecx_s cn56xx; - struct cvmx_pip_dec_ipsecx_s cn56xxp1; - struct cvmx_pip_dec_ipsecx_s cn58xx; - struct cvmx_pip_dec_ipsecx_s cn58xxp1; - struct cvmx_pip_dec_ipsecx_s cn61xx; - struct cvmx_pip_dec_ipsecx_s cn63xx; - struct cvmx_pip_dec_ipsecx_s cn63xxp1; - struct cvmx_pip_dec_ipsecx_s cn66xx; - struct cvmx_pip_dec_ipsecx_s cn68xx; - struct cvmx_pip_dec_ipsecx_s cn68xxp1; - struct cvmx_pip_dec_ipsecx_s cnf71xx; }; union cvmx_pip_dsa_src_grp { @@ -517,16 +444,6 @@ union cvmx_pip_dsa_src_grp { uint64_t map15:4; #endif } s; - struct cvmx_pip_dsa_src_grp_s cn52xx; - struct cvmx_pip_dsa_src_grp_s cn52xxp1; - struct cvmx_pip_dsa_src_grp_s cn56xx; - struct cvmx_pip_dsa_src_grp_s cn61xx; - struct cvmx_pip_dsa_src_grp_s cn63xx; - struct cvmx_pip_dsa_src_grp_s cn63xxp1; - struct cvmx_pip_dsa_src_grp_s cn66xx; - struct cvmx_pip_dsa_src_grp_s cn68xx; - struct cvmx_pip_dsa_src_grp_s cn68xxp1; - struct cvmx_pip_dsa_src_grp_s cnf71xx; }; union cvmx_pip_dsa_vid_grp { @@ -568,16 +485,6 @@ union cvmx_pip_dsa_vid_grp { uint64_t map15:4; #endif } s; - struct cvmx_pip_dsa_vid_grp_s cn52xx; - struct cvmx_pip_dsa_vid_grp_s cn52xxp1; - struct cvmx_pip_dsa_vid_grp_s cn56xx; - struct cvmx_pip_dsa_vid_grp_s cn61xx; - struct cvmx_pip_dsa_vid_grp_s cn63xx; - struct cvmx_pip_dsa_vid_grp_s cn63xxp1; - struct cvmx_pip_dsa_vid_grp_s cn66xx; - struct cvmx_pip_dsa_vid_grp_s cn68xx; - struct cvmx_pip_dsa_vid_grp_s cn68xxp1; - struct cvmx_pip_dsa_vid_grp_s cnf71xx; }; union cvmx_pip_frm_len_chkx { @@ -593,18 +500,6 @@ union cvmx_pip_frm_len_chkx { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_pip_frm_len_chkx_s cn50xx; - struct cvmx_pip_frm_len_chkx_s cn52xx; - struct cvmx_pip_frm_len_chkx_s cn52xxp1; - struct cvmx_pip_frm_len_chkx_s cn56xx; - struct cvmx_pip_frm_len_chkx_s cn56xxp1; - struct cvmx_pip_frm_len_chkx_s cn61xx; - struct cvmx_pip_frm_len_chkx_s cn63xx; - struct cvmx_pip_frm_len_chkx_s cn63xxp1; - struct cvmx_pip_frm_len_chkx_s cn66xx; - struct cvmx_pip_frm_len_chkx_s cn68xx; - struct cvmx_pip_frm_len_chkx_s cn68xxp1; - struct cvmx_pip_frm_len_chkx_s cnf71xx; }; union cvmx_pip_gbl_cfg { @@ -630,24 +525,6 @@ union cvmx_pip_gbl_cfg { uint64_t reserved_19_63:45; #endif } s; - struct cvmx_pip_gbl_cfg_s cn30xx; - struct cvmx_pip_gbl_cfg_s cn31xx; - struct cvmx_pip_gbl_cfg_s cn38xx; - struct cvmx_pip_gbl_cfg_s cn38xxp2; - struct cvmx_pip_gbl_cfg_s cn50xx; - struct cvmx_pip_gbl_cfg_s cn52xx; - struct cvmx_pip_gbl_cfg_s cn52xxp1; - struct cvmx_pip_gbl_cfg_s cn56xx; - struct cvmx_pip_gbl_cfg_s cn56xxp1; - struct cvmx_pip_gbl_cfg_s cn58xx; - struct cvmx_pip_gbl_cfg_s cn58xxp1; - struct cvmx_pip_gbl_cfg_s cn61xx; - struct cvmx_pip_gbl_cfg_s cn63xx; - struct cvmx_pip_gbl_cfg_s cn63xxp1; - struct cvmx_pip_gbl_cfg_s cn66xx; - struct cvmx_pip_gbl_cfg_s cn68xx; - struct cvmx_pip_gbl_cfg_s cn68xxp1; - struct cvmx_pip_gbl_cfg_s cnf71xx; }; union cvmx_pip_gbl_ctl { @@ -742,10 +619,6 @@ union cvmx_pip_gbl_ctl { uint64_t reserved_17_63:47; #endif } cn30xx; - struct cvmx_pip_gbl_ctl_cn30xx cn31xx; - struct cvmx_pip_gbl_ctl_cn30xx cn38xx; - struct cvmx_pip_gbl_ctl_cn30xx cn38xxp2; - struct cvmx_pip_gbl_ctl_cn30xx cn50xx; struct cvmx_pip_gbl_ctl_cn52xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_27_63:37; @@ -795,8 +668,6 @@ union cvmx_pip_gbl_ctl { uint64_t reserved_27_63:37; #endif } cn52xx; - struct cvmx_pip_gbl_ctl_cn52xx cn52xxp1; - struct cvmx_pip_gbl_ctl_cn52xx cn56xx; struct cvmx_pip_gbl_ctl_cn56xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_21_63:43; @@ -838,8 +709,6 @@ union cvmx_pip_gbl_ctl { uint64_t reserved_21_63:43; #endif } cn56xxp1; - struct cvmx_pip_gbl_ctl_cn30xx cn58xx; - struct cvmx_pip_gbl_ctl_cn30xx cn58xxp1; struct cvmx_pip_gbl_ctl_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_28_63:36; @@ -891,9 +760,6 @@ union cvmx_pip_gbl_ctl { uint64_t reserved_28_63:36; #endif } cn61xx; - struct cvmx_pip_gbl_ctl_cn61xx cn63xx; - struct cvmx_pip_gbl_ctl_cn61xx cn63xxp1; - struct cvmx_pip_gbl_ctl_cn61xx cn66xx; struct cvmx_pip_gbl_ctl_cn68xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_29_63:35; @@ -990,7 +856,6 @@ union cvmx_pip_gbl_ctl { uint64_t reserved_28_63:36; #endif } cn68xxp1; - struct cvmx_pip_gbl_ctl_cn61xx cnf71xx; }; union cvmx_pip_hg_pri_qos { @@ -1012,14 +877,6 @@ union cvmx_pip_hg_pri_qos { uint64_t reserved_13_63:51; #endif } s; - struct cvmx_pip_hg_pri_qos_s cn52xx; - struct cvmx_pip_hg_pri_qos_s cn52xxp1; - struct cvmx_pip_hg_pri_qos_s cn56xx; - struct cvmx_pip_hg_pri_qos_s cn61xx; - struct cvmx_pip_hg_pri_qos_s cn63xx; - struct cvmx_pip_hg_pri_qos_s cn63xxp1; - struct cvmx_pip_hg_pri_qos_s cn66xx; - struct cvmx_pip_hg_pri_qos_s cnf71xx; }; union cvmx_pip_int_en { @@ -1082,9 +939,6 @@ union cvmx_pip_int_en { uint64_t reserved_9_63:55; #endif } cn30xx; - struct cvmx_pip_int_en_cn30xx cn31xx; - struct cvmx_pip_int_en_cn30xx cn38xx; - struct cvmx_pip_int_en_cn30xx cn38xxp2; struct cvmx_pip_int_en_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_12_63:52; @@ -1149,8 +1003,6 @@ union cvmx_pip_int_en { uint64_t reserved_13_63:51; #endif } cn52xx; - struct cvmx_pip_int_en_cn52xx cn52xxp1; - struct cvmx_pip_int_en_s cn56xx; struct cvmx_pip_int_en_cn56xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_12_63:52; @@ -1211,14 +1063,6 @@ union cvmx_pip_int_en { uint64_t reserved_13_63:51; #endif } cn58xx; - struct cvmx_pip_int_en_cn30xx cn58xxp1; - struct cvmx_pip_int_en_s cn61xx; - struct cvmx_pip_int_en_s cn63xx; - struct cvmx_pip_int_en_s cn63xxp1; - struct cvmx_pip_int_en_s cn66xx; - struct cvmx_pip_int_en_s cn68xx; - struct cvmx_pip_int_en_s cn68xxp1; - struct cvmx_pip_int_en_s cnf71xx; }; union cvmx_pip_int_reg { @@ -1281,9 +1125,6 @@ union cvmx_pip_int_reg { uint64_t reserved_9_63:55; #endif } cn30xx; - struct cvmx_pip_int_reg_cn30xx cn31xx; - struct cvmx_pip_int_reg_cn30xx cn38xx; - struct cvmx_pip_int_reg_cn30xx cn38xxp2; struct cvmx_pip_int_reg_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_12_63:52; @@ -1348,8 +1189,6 @@ union cvmx_pip_int_reg { uint64_t reserved_13_63:51; #endif } cn52xx; - struct cvmx_pip_int_reg_cn52xx cn52xxp1; - struct cvmx_pip_int_reg_s cn56xx; struct cvmx_pip_int_reg_cn56xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_12_63:52; @@ -1410,14 +1249,6 @@ union cvmx_pip_int_reg { uint64_t reserved_13_63:51; #endif } cn58xx; - struct cvmx_pip_int_reg_cn30xx cn58xxp1; - struct cvmx_pip_int_reg_s cn61xx; - struct cvmx_pip_int_reg_s cn63xx; - struct cvmx_pip_int_reg_s cn63xxp1; - struct cvmx_pip_int_reg_s cn66xx; - struct cvmx_pip_int_reg_s cn68xx; - struct cvmx_pip_int_reg_s cn68xxp1; - struct cvmx_pip_int_reg_s cnf71xx; }; union cvmx_pip_ip_offset { @@ -1431,24 +1262,6 @@ union cvmx_pip_ip_offset { uint64_t reserved_3_63:61; #endif } s; - struct cvmx_pip_ip_offset_s cn30xx; - struct cvmx_pip_ip_offset_s cn31xx; - struct cvmx_pip_ip_offset_s cn38xx; - struct cvmx_pip_ip_offset_s cn38xxp2; - struct cvmx_pip_ip_offset_s cn50xx; - struct cvmx_pip_ip_offset_s cn52xx; - struct cvmx_pip_ip_offset_s cn52xxp1; - struct cvmx_pip_ip_offset_s cn56xx; - struct cvmx_pip_ip_offset_s cn56xxp1; - struct cvmx_pip_ip_offset_s cn58xx; - struct cvmx_pip_ip_offset_s cn58xxp1; - struct cvmx_pip_ip_offset_s cn61xx; - struct cvmx_pip_ip_offset_s cn63xx; - struct cvmx_pip_ip_offset_s cn63xxp1; - struct cvmx_pip_ip_offset_s cn66xx; - struct cvmx_pip_ip_offset_s cn68xx; - struct cvmx_pip_ip_offset_s cn68xxp1; - struct cvmx_pip_ip_offset_s cnf71xx; }; union cvmx_pip_pri_tblx { @@ -1488,8 +1301,6 @@ union cvmx_pip_pri_tblx { uint64_t diff2_padd:8; #endif } s; - struct cvmx_pip_pri_tblx_s cn68xx; - struct cvmx_pip_pri_tblx_s cn68xxp1; }; union cvmx_pip_prt_cfgx { @@ -1596,7 +1407,6 @@ union cvmx_pip_prt_cfgx { uint64_t reserved_37_63:27; #endif } cn30xx; - struct cvmx_pip_prt_cfgx_cn30xx cn31xx; struct cvmx_pip_prt_cfgx_cn38xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_37_63:27; @@ -1638,7 +1448,6 @@ union cvmx_pip_prt_cfgx { uint64_t reserved_37_63:27; #endif } cn38xx; - struct cvmx_pip_prt_cfgx_cn38xx cn38xxp2; struct cvmx_pip_prt_cfgx_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_53_63:11; @@ -1759,9 +1568,6 @@ union cvmx_pip_prt_cfgx { uint64_t reserved_53_63:11; #endif } cn52xx; - struct cvmx_pip_prt_cfgx_cn52xx cn52xxp1; - struct cvmx_pip_prt_cfgx_cn52xx cn56xx; - struct cvmx_pip_prt_cfgx_cn50xx cn56xxp1; struct cvmx_pip_prt_cfgx_cn58xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_37_63:27; @@ -1805,11 +1611,6 @@ union cvmx_pip_prt_cfgx { uint64_t reserved_37_63:27; #endif } cn58xx; - struct cvmx_pip_prt_cfgx_cn58xx cn58xxp1; - struct cvmx_pip_prt_cfgx_cn52xx cn61xx; - struct cvmx_pip_prt_cfgx_cn52xx cn63xx; - struct cvmx_pip_prt_cfgx_cn52xx cn63xxp1; - struct cvmx_pip_prt_cfgx_cn52xx cn66xx; struct cvmx_pip_prt_cfgx_cn68xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_55_63:9; @@ -1875,8 +1676,6 @@ union cvmx_pip_prt_cfgx { uint64_t reserved_55_63:9; #endif } cn68xx; - struct cvmx_pip_prt_cfgx_cn68xx cn68xxp1; - struct cvmx_pip_prt_cfgx_cn52xx cnf71xx; }; union cvmx_pip_prt_cfgbx { @@ -1938,7 +1737,6 @@ union cvmx_pip_prt_cfgbx { uint64_t reserved_39_63:25; #endif } cn66xx; - struct cvmx_pip_prt_cfgbx_s cn68xx; struct cvmx_pip_prt_cfgbx_cn68xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_24_63:40; @@ -1952,7 +1750,6 @@ union cvmx_pip_prt_cfgbx { uint64_t reserved_24_63:40; #endif } cn68xxp1; - struct cvmx_pip_prt_cfgbx_cn61xx cnf71xx; }; union cvmx_pip_prt_tagx { @@ -2083,9 +1880,6 @@ union cvmx_pip_prt_tagx { uint64_t reserved_40_63:24; #endif } cn30xx; - struct cvmx_pip_prt_tagx_cn30xx cn31xx; - struct cvmx_pip_prt_tagx_cn30xx cn38xx; - struct cvmx_pip_prt_tagx_cn30xx cn38xxp2; struct cvmx_pip_prt_tagx_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_40_63:24; @@ -2141,19 +1935,6 @@ union cvmx_pip_prt_tagx { uint64_t reserved_40_63:24; #endif } cn50xx; - struct cvmx_pip_prt_tagx_cn50xx cn52xx; - struct cvmx_pip_prt_tagx_cn50xx cn52xxp1; - struct cvmx_pip_prt_tagx_cn50xx cn56xx; - struct cvmx_pip_prt_tagx_cn50xx cn56xxp1; - struct cvmx_pip_prt_tagx_cn30xx cn58xx; - struct cvmx_pip_prt_tagx_cn30xx cn58xxp1; - struct cvmx_pip_prt_tagx_cn50xx cn61xx; - struct cvmx_pip_prt_tagx_cn50xx cn63xx; - struct cvmx_pip_prt_tagx_cn50xx cn63xxp1; - struct cvmx_pip_prt_tagx_cn50xx cn66xx; - struct cvmx_pip_prt_tagx_s cn68xx; - struct cvmx_pip_prt_tagx_s cn68xxp1; - struct cvmx_pip_prt_tagx_cn50xx cnf71xx; }; union cvmx_pip_qos_diffx { @@ -2167,22 +1948,6 @@ union cvmx_pip_qos_diffx { uint64_t reserved_3_63:61; #endif } s; - struct cvmx_pip_qos_diffx_s cn30xx; - struct cvmx_pip_qos_diffx_s cn31xx; - struct cvmx_pip_qos_diffx_s cn38xx; - struct cvmx_pip_qos_diffx_s cn38xxp2; - struct cvmx_pip_qos_diffx_s cn50xx; - struct cvmx_pip_qos_diffx_s cn52xx; - struct cvmx_pip_qos_diffx_s cn52xxp1; - struct cvmx_pip_qos_diffx_s cn56xx; - struct cvmx_pip_qos_diffx_s cn56xxp1; - struct cvmx_pip_qos_diffx_s cn58xx; - struct cvmx_pip_qos_diffx_s cn58xxp1; - struct cvmx_pip_qos_diffx_s cn61xx; - struct cvmx_pip_qos_diffx_s cn63xx; - struct cvmx_pip_qos_diffx_s cn63xxp1; - struct cvmx_pip_qos_diffx_s cn66xx; - struct cvmx_pip_qos_diffx_s cnf71xx; }; union cvmx_pip_qos_vlanx { @@ -2209,21 +1974,6 @@ union cvmx_pip_qos_vlanx { uint64_t reserved_3_63:61; #endif } cn30xx; - struct cvmx_pip_qos_vlanx_cn30xx cn31xx; - struct cvmx_pip_qos_vlanx_cn30xx cn38xx; - struct cvmx_pip_qos_vlanx_cn30xx cn38xxp2; - struct cvmx_pip_qos_vlanx_cn30xx cn50xx; - struct cvmx_pip_qos_vlanx_s cn52xx; - struct cvmx_pip_qos_vlanx_s cn52xxp1; - struct cvmx_pip_qos_vlanx_s cn56xx; - struct cvmx_pip_qos_vlanx_cn30xx cn56xxp1; - struct cvmx_pip_qos_vlanx_cn30xx cn58xx; - struct cvmx_pip_qos_vlanx_cn30xx cn58xxp1; - struct cvmx_pip_qos_vlanx_s cn61xx; - struct cvmx_pip_qos_vlanx_s cn63xx; - struct cvmx_pip_qos_vlanx_s cn63xxp1; - struct cvmx_pip_qos_vlanx_s cn66xx; - struct cvmx_pip_qos_vlanx_s cnf71xx; }; union cvmx_pip_qos_watchx { @@ -2274,9 +2024,6 @@ union cvmx_pip_qos_watchx { uint64_t reserved_48_63:16; #endif } cn30xx; - struct cvmx_pip_qos_watchx_cn30xx cn31xx; - struct cvmx_pip_qos_watchx_cn30xx cn38xx; - struct cvmx_pip_qos_watchx_cn30xx cn38xxp2; struct cvmx_pip_qos_watchx_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_48_63:16; @@ -2300,19 +2047,6 @@ union cvmx_pip_qos_watchx { uint64_t reserved_48_63:16; #endif } cn50xx; - struct cvmx_pip_qos_watchx_cn50xx cn52xx; - struct cvmx_pip_qos_watchx_cn50xx cn52xxp1; - struct cvmx_pip_qos_watchx_cn50xx cn56xx; - struct cvmx_pip_qos_watchx_cn50xx cn56xxp1; - struct cvmx_pip_qos_watchx_cn30xx cn58xx; - struct cvmx_pip_qos_watchx_cn30xx cn58xxp1; - struct cvmx_pip_qos_watchx_cn50xx cn61xx; - struct cvmx_pip_qos_watchx_cn50xx cn63xx; - struct cvmx_pip_qos_watchx_cn50xx cn63xxp1; - struct cvmx_pip_qos_watchx_cn50xx cn66xx; - struct cvmx_pip_qos_watchx_s cn68xx; - struct cvmx_pip_qos_watchx_s cn68xxp1; - struct cvmx_pip_qos_watchx_cn50xx cnf71xx; }; union cvmx_pip_raw_word { @@ -2326,24 +2060,6 @@ union cvmx_pip_raw_word { uint64_t reserved_56_63:8; #endif } s; - struct cvmx_pip_raw_word_s cn30xx; - struct cvmx_pip_raw_word_s cn31xx; - struct cvmx_pip_raw_word_s cn38xx; - struct cvmx_pip_raw_word_s cn38xxp2; - struct cvmx_pip_raw_word_s cn50xx; - struct cvmx_pip_raw_word_s cn52xx; - struct cvmx_pip_raw_word_s cn52xxp1; - struct cvmx_pip_raw_word_s cn56xx; - struct cvmx_pip_raw_word_s cn56xxp1; - struct cvmx_pip_raw_word_s cn58xx; - struct cvmx_pip_raw_word_s cn58xxp1; - struct cvmx_pip_raw_word_s cn61xx; - struct cvmx_pip_raw_word_s cn63xx; - struct cvmx_pip_raw_word_s cn63xxp1; - struct cvmx_pip_raw_word_s cn66xx; - struct cvmx_pip_raw_word_s cn68xx; - struct cvmx_pip_raw_word_s cn68xxp1; - struct cvmx_pip_raw_word_s cnf71xx; }; union cvmx_pip_sft_rst { @@ -2357,23 +2073,6 @@ union cvmx_pip_sft_rst { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_pip_sft_rst_s cn30xx; - struct cvmx_pip_sft_rst_s cn31xx; - struct cvmx_pip_sft_rst_s cn38xx; - struct cvmx_pip_sft_rst_s cn50xx; - struct cvmx_pip_sft_rst_s cn52xx; - struct cvmx_pip_sft_rst_s cn52xxp1; - struct cvmx_pip_sft_rst_s cn56xx; - struct cvmx_pip_sft_rst_s cn56xxp1; - struct cvmx_pip_sft_rst_s cn58xx; - struct cvmx_pip_sft_rst_s cn58xxp1; - struct cvmx_pip_sft_rst_s cn61xx; - struct cvmx_pip_sft_rst_s cn63xx; - struct cvmx_pip_sft_rst_s cn63xxp1; - struct cvmx_pip_sft_rst_s cn66xx; - struct cvmx_pip_sft_rst_s cn68xx; - struct cvmx_pip_sft_rst_s cn68xxp1; - struct cvmx_pip_sft_rst_s cnf71xx; }; union cvmx_pip_stat0_x { @@ -2387,8 +2086,6 @@ union cvmx_pip_stat0_x { uint64_t drp_pkts:32; #endif } s; - struct cvmx_pip_stat0_x_s cn68xx; - struct cvmx_pip_stat0_x_s cn68xxp1; }; union cvmx_pip_stat0_prtx { @@ -2402,22 +2099,6 @@ union cvmx_pip_stat0_prtx { uint64_t drp_pkts:32; #endif } s; - struct cvmx_pip_stat0_prtx_s cn30xx; - struct cvmx_pip_stat0_prtx_s cn31xx; - struct cvmx_pip_stat0_prtx_s cn38xx; - struct cvmx_pip_stat0_prtx_s cn38xxp2; - struct cvmx_pip_stat0_prtx_s cn50xx; - struct cvmx_pip_stat0_prtx_s cn52xx; - struct cvmx_pip_stat0_prtx_s cn52xxp1; - struct cvmx_pip_stat0_prtx_s cn56xx; - struct cvmx_pip_stat0_prtx_s cn56xxp1; - struct cvmx_pip_stat0_prtx_s cn58xx; - struct cvmx_pip_stat0_prtx_s cn58xxp1; - struct cvmx_pip_stat0_prtx_s cn61xx; - struct cvmx_pip_stat0_prtx_s cn63xx; - struct cvmx_pip_stat0_prtx_s cn63xxp1; - struct cvmx_pip_stat0_prtx_s cn66xx; - struct cvmx_pip_stat0_prtx_s cnf71xx; }; union cvmx_pip_stat10_x { @@ -2431,8 +2112,6 @@ union cvmx_pip_stat10_x { uint64_t bcast:32; #endif } s; - struct cvmx_pip_stat10_x_s cn68xx; - struct cvmx_pip_stat10_x_s cn68xxp1; }; union cvmx_pip_stat10_prtx { @@ -2446,15 +2125,6 @@ union cvmx_pip_stat10_prtx { uint64_t bcast:32; #endif } s; - struct cvmx_pip_stat10_prtx_s cn52xx; - struct cvmx_pip_stat10_prtx_s cn52xxp1; - struct cvmx_pip_stat10_prtx_s cn56xx; - struct cvmx_pip_stat10_prtx_s cn56xxp1; - struct cvmx_pip_stat10_prtx_s cn61xx; - struct cvmx_pip_stat10_prtx_s cn63xx; - struct cvmx_pip_stat10_prtx_s cn63xxp1; - struct cvmx_pip_stat10_prtx_s cn66xx; - struct cvmx_pip_stat10_prtx_s cnf71xx; }; union cvmx_pip_stat11_x { @@ -2468,8 +2138,6 @@ union cvmx_pip_stat11_x { uint64_t bcast:32; #endif } s; - struct cvmx_pip_stat11_x_s cn68xx; - struct cvmx_pip_stat11_x_s cn68xxp1; }; union cvmx_pip_stat11_prtx { @@ -2483,15 +2151,6 @@ union cvmx_pip_stat11_prtx { uint64_t bcast:32; #endif } s; - struct cvmx_pip_stat11_prtx_s cn52xx; - struct cvmx_pip_stat11_prtx_s cn52xxp1; - struct cvmx_pip_stat11_prtx_s cn56xx; - struct cvmx_pip_stat11_prtx_s cn56xxp1; - struct cvmx_pip_stat11_prtx_s cn61xx; - struct cvmx_pip_stat11_prtx_s cn63xx; - struct cvmx_pip_stat11_prtx_s cn63xxp1; - struct cvmx_pip_stat11_prtx_s cn66xx; - struct cvmx_pip_stat11_prtx_s cnf71xx; }; union cvmx_pip_stat1_x { @@ -2505,8 +2164,6 @@ union cvmx_pip_stat1_x { uint64_t reserved_48_63:16; #endif } s; - struct cvmx_pip_stat1_x_s cn68xx; - struct cvmx_pip_stat1_x_s cn68xxp1; }; union cvmx_pip_stat1_prtx { @@ -2520,22 +2177,6 @@ union cvmx_pip_stat1_prtx { uint64_t reserved_48_63:16; #endif } s; - struct cvmx_pip_stat1_prtx_s cn30xx; - struct cvmx_pip_stat1_prtx_s cn31xx; - struct cvmx_pip_stat1_prtx_s cn38xx; - struct cvmx_pip_stat1_prtx_s cn38xxp2; - struct cvmx_pip_stat1_prtx_s cn50xx; - struct cvmx_pip_stat1_prtx_s cn52xx; - struct cvmx_pip_stat1_prtx_s cn52xxp1; - struct cvmx_pip_stat1_prtx_s cn56xx; - struct cvmx_pip_stat1_prtx_s cn56xxp1; - struct cvmx_pip_stat1_prtx_s cn58xx; - struct cvmx_pip_stat1_prtx_s cn58xxp1; - struct cvmx_pip_stat1_prtx_s cn61xx; - struct cvmx_pip_stat1_prtx_s cn63xx; - struct cvmx_pip_stat1_prtx_s cn63xxp1; - struct cvmx_pip_stat1_prtx_s cn66xx; - struct cvmx_pip_stat1_prtx_s cnf71xx; }; union cvmx_pip_stat2_x { @@ -2549,8 +2190,6 @@ union cvmx_pip_stat2_x { uint64_t pkts:32; #endif } s; - struct cvmx_pip_stat2_x_s cn68xx; - struct cvmx_pip_stat2_x_s cn68xxp1; }; union cvmx_pip_stat2_prtx { @@ -2564,22 +2203,6 @@ union cvmx_pip_stat2_prtx { uint64_t pkts:32; #endif } s; - struct cvmx_pip_stat2_prtx_s cn30xx; - struct cvmx_pip_stat2_prtx_s cn31xx; - struct cvmx_pip_stat2_prtx_s cn38xx; - struct cvmx_pip_stat2_prtx_s cn38xxp2; - struct cvmx_pip_stat2_prtx_s cn50xx; - struct cvmx_pip_stat2_prtx_s cn52xx; - struct cvmx_pip_stat2_prtx_s cn52xxp1; - struct cvmx_pip_stat2_prtx_s cn56xx; - struct cvmx_pip_stat2_prtx_s cn56xxp1; - struct cvmx_pip_stat2_prtx_s cn58xx; - struct cvmx_pip_stat2_prtx_s cn58xxp1; - struct cvmx_pip_stat2_prtx_s cn61xx; - struct cvmx_pip_stat2_prtx_s cn63xx; - struct cvmx_pip_stat2_prtx_s cn63xxp1; - struct cvmx_pip_stat2_prtx_s cn66xx; - struct cvmx_pip_stat2_prtx_s cnf71xx; }; union cvmx_pip_stat3_x { @@ -2593,8 +2216,6 @@ union cvmx_pip_stat3_x { uint64_t bcst:32; #endif } s; - struct cvmx_pip_stat3_x_s cn68xx; - struct cvmx_pip_stat3_x_s cn68xxp1; }; union cvmx_pip_stat3_prtx { @@ -2608,22 +2229,6 @@ union cvmx_pip_stat3_prtx { uint64_t bcst:32; #endif } s; - struct cvmx_pip_stat3_prtx_s cn30xx; - struct cvmx_pip_stat3_prtx_s cn31xx; - struct cvmx_pip_stat3_prtx_s cn38xx; - struct cvmx_pip_stat3_prtx_s cn38xxp2; - struct cvmx_pip_stat3_prtx_s cn50xx; - struct cvmx_pip_stat3_prtx_s cn52xx; - struct cvmx_pip_stat3_prtx_s cn52xxp1; - struct cvmx_pip_stat3_prtx_s cn56xx; - struct cvmx_pip_stat3_prtx_s cn56xxp1; - struct cvmx_pip_stat3_prtx_s cn58xx; - struct cvmx_pip_stat3_prtx_s cn58xxp1; - struct cvmx_pip_stat3_prtx_s cn61xx; - struct cvmx_pip_stat3_prtx_s cn63xx; - struct cvmx_pip_stat3_prtx_s cn63xxp1; - struct cvmx_pip_stat3_prtx_s cn66xx; - struct cvmx_pip_stat3_prtx_s cnf71xx; }; union cvmx_pip_stat4_x { @@ -2637,8 +2242,6 @@ union cvmx_pip_stat4_x { uint64_t h65to127:32; #endif } s; - struct cvmx_pip_stat4_x_s cn68xx; - struct cvmx_pip_stat4_x_s cn68xxp1; }; union cvmx_pip_stat4_prtx { @@ -2652,22 +2255,6 @@ union cvmx_pip_stat4_prtx { uint64_t h65to127:32; #endif } s; - struct cvmx_pip_stat4_prtx_s cn30xx; - struct cvmx_pip_stat4_prtx_s cn31xx; - struct cvmx_pip_stat4_prtx_s cn38xx; - struct cvmx_pip_stat4_prtx_s cn38xxp2; - struct cvmx_pip_stat4_prtx_s cn50xx; - struct cvmx_pip_stat4_prtx_s cn52xx; - struct cvmx_pip_stat4_prtx_s cn52xxp1; - struct cvmx_pip_stat4_prtx_s cn56xx; - struct cvmx_pip_stat4_prtx_s cn56xxp1; - struct cvmx_pip_stat4_prtx_s cn58xx; - struct cvmx_pip_stat4_prtx_s cn58xxp1; - struct cvmx_pip_stat4_prtx_s cn61xx; - struct cvmx_pip_stat4_prtx_s cn63xx; - struct cvmx_pip_stat4_prtx_s cn63xxp1; - struct cvmx_pip_stat4_prtx_s cn66xx; - struct cvmx_pip_stat4_prtx_s cnf71xx; }; union cvmx_pip_stat5_x { @@ -2681,8 +2268,6 @@ union cvmx_pip_stat5_x { uint64_t h256to511:32; #endif } s; - struct cvmx_pip_stat5_x_s cn68xx; - struct cvmx_pip_stat5_x_s cn68xxp1; }; union cvmx_pip_stat5_prtx { @@ -2696,22 +2281,6 @@ union cvmx_pip_stat5_prtx { uint64_t h256to511:32; #endif } s; - struct cvmx_pip_stat5_prtx_s cn30xx; - struct cvmx_pip_stat5_prtx_s cn31xx; - struct cvmx_pip_stat5_prtx_s cn38xx; - struct cvmx_pip_stat5_prtx_s cn38xxp2; - struct cvmx_pip_stat5_prtx_s cn50xx; - struct cvmx_pip_stat5_prtx_s cn52xx; - struct cvmx_pip_stat5_prtx_s cn52xxp1; - struct cvmx_pip_stat5_prtx_s cn56xx; - struct cvmx_pip_stat5_prtx_s cn56xxp1; - struct cvmx_pip_stat5_prtx_s cn58xx; - struct cvmx_pip_stat5_prtx_s cn58xxp1; - struct cvmx_pip_stat5_prtx_s cn61xx; - struct cvmx_pip_stat5_prtx_s cn63xx; - struct cvmx_pip_stat5_prtx_s cn63xxp1; - struct cvmx_pip_stat5_prtx_s cn66xx; - struct cvmx_pip_stat5_prtx_s cnf71xx; }; union cvmx_pip_stat6_x { @@ -2725,8 +2294,6 @@ union cvmx_pip_stat6_x { uint64_t h1024to1518:32; #endif } s; - struct cvmx_pip_stat6_x_s cn68xx; - struct cvmx_pip_stat6_x_s cn68xxp1; }; union cvmx_pip_stat6_prtx { @@ -2740,22 +2307,6 @@ union cvmx_pip_stat6_prtx { uint64_t h1024to1518:32; #endif } s; - struct cvmx_pip_stat6_prtx_s cn30xx; - struct cvmx_pip_stat6_prtx_s cn31xx; - struct cvmx_pip_stat6_prtx_s cn38xx; - struct cvmx_pip_stat6_prtx_s cn38xxp2; - struct cvmx_pip_stat6_prtx_s cn50xx; - struct cvmx_pip_stat6_prtx_s cn52xx; - struct cvmx_pip_stat6_prtx_s cn52xxp1; - struct cvmx_pip_stat6_prtx_s cn56xx; - struct cvmx_pip_stat6_prtx_s cn56xxp1; - struct cvmx_pip_stat6_prtx_s cn58xx; - struct cvmx_pip_stat6_prtx_s cn58xxp1; - struct cvmx_pip_stat6_prtx_s cn61xx; - struct cvmx_pip_stat6_prtx_s cn63xx; - struct cvmx_pip_stat6_prtx_s cn63xxp1; - struct cvmx_pip_stat6_prtx_s cn66xx; - struct cvmx_pip_stat6_prtx_s cnf71xx; }; union cvmx_pip_stat7_x { @@ -2769,8 +2320,6 @@ union cvmx_pip_stat7_x { uint64_t fcs:32; #endif } s; - struct cvmx_pip_stat7_x_s cn68xx; - struct cvmx_pip_stat7_x_s cn68xxp1; }; union cvmx_pip_stat7_prtx { @@ -2784,22 +2333,6 @@ union cvmx_pip_stat7_prtx { uint64_t fcs:32; #endif } s; - struct cvmx_pip_stat7_prtx_s cn30xx; - struct cvmx_pip_stat7_prtx_s cn31xx; - struct cvmx_pip_stat7_prtx_s cn38xx; - struct cvmx_pip_stat7_prtx_s cn38xxp2; - struct cvmx_pip_stat7_prtx_s cn50xx; - struct cvmx_pip_stat7_prtx_s cn52xx; - struct cvmx_pip_stat7_prtx_s cn52xxp1; - struct cvmx_pip_stat7_prtx_s cn56xx; - struct cvmx_pip_stat7_prtx_s cn56xxp1; - struct cvmx_pip_stat7_prtx_s cn58xx; - struct cvmx_pip_stat7_prtx_s cn58xxp1; - struct cvmx_pip_stat7_prtx_s cn61xx; - struct cvmx_pip_stat7_prtx_s cn63xx; - struct cvmx_pip_stat7_prtx_s cn63xxp1; - struct cvmx_pip_stat7_prtx_s cn66xx; - struct cvmx_pip_stat7_prtx_s cnf71xx; }; union cvmx_pip_stat8_x { @@ -2813,8 +2346,6 @@ union cvmx_pip_stat8_x { uint64_t frag:32; #endif } s; - struct cvmx_pip_stat8_x_s cn68xx; - struct cvmx_pip_stat8_x_s cn68xxp1; }; union cvmx_pip_stat8_prtx { @@ -2828,22 +2359,6 @@ union cvmx_pip_stat8_prtx { uint64_t frag:32; #endif } s; - struct cvmx_pip_stat8_prtx_s cn30xx; - struct cvmx_pip_stat8_prtx_s cn31xx; - struct cvmx_pip_stat8_prtx_s cn38xx; - struct cvmx_pip_stat8_prtx_s cn38xxp2; - struct cvmx_pip_stat8_prtx_s cn50xx; - struct cvmx_pip_stat8_prtx_s cn52xx; - struct cvmx_pip_stat8_prtx_s cn52xxp1; - struct cvmx_pip_stat8_prtx_s cn56xx; - struct cvmx_pip_stat8_prtx_s cn56xxp1; - struct cvmx_pip_stat8_prtx_s cn58xx; - struct cvmx_pip_stat8_prtx_s cn58xxp1; - struct cvmx_pip_stat8_prtx_s cn61xx; - struct cvmx_pip_stat8_prtx_s cn63xx; - struct cvmx_pip_stat8_prtx_s cn63xxp1; - struct cvmx_pip_stat8_prtx_s cn66xx; - struct cvmx_pip_stat8_prtx_s cnf71xx; }; union cvmx_pip_stat9_x { @@ -2857,8 +2372,6 @@ union cvmx_pip_stat9_x { uint64_t jabber:32; #endif } s; - struct cvmx_pip_stat9_x_s cn68xx; - struct cvmx_pip_stat9_x_s cn68xxp1; }; union cvmx_pip_stat9_prtx { @@ -2872,22 +2385,6 @@ union cvmx_pip_stat9_prtx { uint64_t jabber:32; #endif } s; - struct cvmx_pip_stat9_prtx_s cn30xx; - struct cvmx_pip_stat9_prtx_s cn31xx; - struct cvmx_pip_stat9_prtx_s cn38xx; - struct cvmx_pip_stat9_prtx_s cn38xxp2; - struct cvmx_pip_stat9_prtx_s cn50xx; - struct cvmx_pip_stat9_prtx_s cn52xx; - struct cvmx_pip_stat9_prtx_s cn52xxp1; - struct cvmx_pip_stat9_prtx_s cn56xx; - struct cvmx_pip_stat9_prtx_s cn56xxp1; - struct cvmx_pip_stat9_prtx_s cn58xx; - struct cvmx_pip_stat9_prtx_s cn58xxp1; - struct cvmx_pip_stat9_prtx_s cn61xx; - struct cvmx_pip_stat9_prtx_s cn63xx; - struct cvmx_pip_stat9_prtx_s cn63xxp1; - struct cvmx_pip_stat9_prtx_s cn66xx; - struct cvmx_pip_stat9_prtx_s cnf71xx; }; union cvmx_pip_stat_ctl { @@ -2914,23 +2411,6 @@ union cvmx_pip_stat_ctl { uint64_t reserved_1_63:63; #endif } cn30xx; - struct cvmx_pip_stat_ctl_cn30xx cn31xx; - struct cvmx_pip_stat_ctl_cn30xx cn38xx; - struct cvmx_pip_stat_ctl_cn30xx cn38xxp2; - struct cvmx_pip_stat_ctl_cn30xx cn50xx; - struct cvmx_pip_stat_ctl_cn30xx cn52xx; - struct cvmx_pip_stat_ctl_cn30xx cn52xxp1; - struct cvmx_pip_stat_ctl_cn30xx cn56xx; - struct cvmx_pip_stat_ctl_cn30xx cn56xxp1; - struct cvmx_pip_stat_ctl_cn30xx cn58xx; - struct cvmx_pip_stat_ctl_cn30xx cn58xxp1; - struct cvmx_pip_stat_ctl_cn30xx cn61xx; - struct cvmx_pip_stat_ctl_cn30xx cn63xx; - struct cvmx_pip_stat_ctl_cn30xx cn63xxp1; - struct cvmx_pip_stat_ctl_cn30xx cn66xx; - struct cvmx_pip_stat_ctl_s cn68xx; - struct cvmx_pip_stat_ctl_s cn68xxp1; - struct cvmx_pip_stat_ctl_cn30xx cnf71xx; }; union cvmx_pip_stat_inb_errsx { @@ -2944,22 +2424,6 @@ union cvmx_pip_stat_inb_errsx { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_pip_stat_inb_errsx_s cn30xx; - struct cvmx_pip_stat_inb_errsx_s cn31xx; - struct cvmx_pip_stat_inb_errsx_s cn38xx; - struct cvmx_pip_stat_inb_errsx_s cn38xxp2; - struct cvmx_pip_stat_inb_errsx_s cn50xx; - struct cvmx_pip_stat_inb_errsx_s cn52xx; - struct cvmx_pip_stat_inb_errsx_s cn52xxp1; - struct cvmx_pip_stat_inb_errsx_s cn56xx; - struct cvmx_pip_stat_inb_errsx_s cn56xxp1; - struct cvmx_pip_stat_inb_errsx_s cn58xx; - struct cvmx_pip_stat_inb_errsx_s cn58xxp1; - struct cvmx_pip_stat_inb_errsx_s cn61xx; - struct cvmx_pip_stat_inb_errsx_s cn63xx; - struct cvmx_pip_stat_inb_errsx_s cn63xxp1; - struct cvmx_pip_stat_inb_errsx_s cn66xx; - struct cvmx_pip_stat_inb_errsx_s cnf71xx; }; union cvmx_pip_stat_inb_errs_pkndx { @@ -2973,8 +2437,6 @@ union cvmx_pip_stat_inb_errs_pkndx { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_pip_stat_inb_errs_pkndx_s cn68xx; - struct cvmx_pip_stat_inb_errs_pkndx_s cn68xxp1; }; union cvmx_pip_stat_inb_octsx { @@ -2988,22 +2450,6 @@ union cvmx_pip_stat_inb_octsx { uint64_t reserved_48_63:16; #endif } s; - struct cvmx_pip_stat_inb_octsx_s cn30xx; - struct cvmx_pip_stat_inb_octsx_s cn31xx; - struct cvmx_pip_stat_inb_octsx_s cn38xx; - struct cvmx_pip_stat_inb_octsx_s cn38xxp2; - struct cvmx_pip_stat_inb_octsx_s cn50xx; - struct cvmx_pip_stat_inb_octsx_s cn52xx; - struct cvmx_pip_stat_inb_octsx_s cn52xxp1; - struct cvmx_pip_stat_inb_octsx_s cn56xx; - struct cvmx_pip_stat_inb_octsx_s cn56xxp1; - struct cvmx_pip_stat_inb_octsx_s cn58xx; - struct cvmx_pip_stat_inb_octsx_s cn58xxp1; - struct cvmx_pip_stat_inb_octsx_s cn61xx; - struct cvmx_pip_stat_inb_octsx_s cn63xx; - struct cvmx_pip_stat_inb_octsx_s cn63xxp1; - struct cvmx_pip_stat_inb_octsx_s cn66xx; - struct cvmx_pip_stat_inb_octsx_s cnf71xx; }; union cvmx_pip_stat_inb_octs_pkndx { @@ -3017,8 +2463,6 @@ union cvmx_pip_stat_inb_octs_pkndx { uint64_t reserved_48_63:16; #endif } s; - struct cvmx_pip_stat_inb_octs_pkndx_s cn68xx; - struct cvmx_pip_stat_inb_octs_pkndx_s cn68xxp1; }; union cvmx_pip_stat_inb_pktsx { @@ -3032,22 +2476,6 @@ union cvmx_pip_stat_inb_pktsx { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_pip_stat_inb_pktsx_s cn30xx; - struct cvmx_pip_stat_inb_pktsx_s cn31xx; - struct cvmx_pip_stat_inb_pktsx_s cn38xx; - struct cvmx_pip_stat_inb_pktsx_s cn38xxp2; - struct cvmx_pip_stat_inb_pktsx_s cn50xx; - struct cvmx_pip_stat_inb_pktsx_s cn52xx; - struct cvmx_pip_stat_inb_pktsx_s cn52xxp1; - struct cvmx_pip_stat_inb_pktsx_s cn56xx; - struct cvmx_pip_stat_inb_pktsx_s cn56xxp1; - struct cvmx_pip_stat_inb_pktsx_s cn58xx; - struct cvmx_pip_stat_inb_pktsx_s cn58xxp1; - struct cvmx_pip_stat_inb_pktsx_s cn61xx; - struct cvmx_pip_stat_inb_pktsx_s cn63xx; - struct cvmx_pip_stat_inb_pktsx_s cn63xxp1; - struct cvmx_pip_stat_inb_pktsx_s cn66xx; - struct cvmx_pip_stat_inb_pktsx_s cnf71xx; }; union cvmx_pip_stat_inb_pkts_pkndx { @@ -3061,8 +2489,6 @@ union cvmx_pip_stat_inb_pkts_pkndx { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_pip_stat_inb_pkts_pkndx_s cn68xx; - struct cvmx_pip_stat_inb_pkts_pkndx_s cn68xxp1; }; union cvmx_pip_sub_pkind_fcsx { @@ -3074,8 +2500,6 @@ union cvmx_pip_sub_pkind_fcsx { uint64_t port_bit:64; #endif } s; - struct cvmx_pip_sub_pkind_fcsx_s cn68xx; - struct cvmx_pip_sub_pkind_fcsx_s cn68xxp1; }; union cvmx_pip_tag_incx { @@ -3089,24 +2513,6 @@ union cvmx_pip_tag_incx { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_pip_tag_incx_s cn30xx; - struct cvmx_pip_tag_incx_s cn31xx; - struct cvmx_pip_tag_incx_s cn38xx; - struct cvmx_pip_tag_incx_s cn38xxp2; - struct cvmx_pip_tag_incx_s cn50xx; - struct cvmx_pip_tag_incx_s cn52xx; - struct cvmx_pip_tag_incx_s cn52xxp1; - struct cvmx_pip_tag_incx_s cn56xx; - struct cvmx_pip_tag_incx_s cn56xxp1; - struct cvmx_pip_tag_incx_s cn58xx; - struct cvmx_pip_tag_incx_s cn58xxp1; - struct cvmx_pip_tag_incx_s cn61xx; - struct cvmx_pip_tag_incx_s cn63xx; - struct cvmx_pip_tag_incx_s cn63xxp1; - struct cvmx_pip_tag_incx_s cn66xx; - struct cvmx_pip_tag_incx_s cn68xx; - struct cvmx_pip_tag_incx_s cn68xxp1; - struct cvmx_pip_tag_incx_s cnf71xx; }; union cvmx_pip_tag_mask { @@ -3120,24 +2526,6 @@ union cvmx_pip_tag_mask { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_pip_tag_mask_s cn30xx; - struct cvmx_pip_tag_mask_s cn31xx; - struct cvmx_pip_tag_mask_s cn38xx; - struct cvmx_pip_tag_mask_s cn38xxp2; - struct cvmx_pip_tag_mask_s cn50xx; - struct cvmx_pip_tag_mask_s cn52xx; - struct cvmx_pip_tag_mask_s cn52xxp1; - struct cvmx_pip_tag_mask_s cn56xx; - struct cvmx_pip_tag_mask_s cn56xxp1; - struct cvmx_pip_tag_mask_s cn58xx; - struct cvmx_pip_tag_mask_s cn58xxp1; - struct cvmx_pip_tag_mask_s cn61xx; - struct cvmx_pip_tag_mask_s cn63xx; - struct cvmx_pip_tag_mask_s cn63xxp1; - struct cvmx_pip_tag_mask_s cn66xx; - struct cvmx_pip_tag_mask_s cn68xx; - struct cvmx_pip_tag_mask_s cn68xxp1; - struct cvmx_pip_tag_mask_s cnf71xx; }; union cvmx_pip_tag_secret { @@ -3153,24 +2541,6 @@ union cvmx_pip_tag_secret { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_pip_tag_secret_s cn30xx; - struct cvmx_pip_tag_secret_s cn31xx; - struct cvmx_pip_tag_secret_s cn38xx; - struct cvmx_pip_tag_secret_s cn38xxp2; - struct cvmx_pip_tag_secret_s cn50xx; - struct cvmx_pip_tag_secret_s cn52xx; - struct cvmx_pip_tag_secret_s cn52xxp1; - struct cvmx_pip_tag_secret_s cn56xx; - struct cvmx_pip_tag_secret_s cn56xxp1; - struct cvmx_pip_tag_secret_s cn58xx; - struct cvmx_pip_tag_secret_s cn58xxp1; - struct cvmx_pip_tag_secret_s cn61xx; - struct cvmx_pip_tag_secret_s cn63xx; - struct cvmx_pip_tag_secret_s cn63xxp1; - struct cvmx_pip_tag_secret_s cn66xx; - struct cvmx_pip_tag_secret_s cn68xx; - struct cvmx_pip_tag_secret_s cn68xxp1; - struct cvmx_pip_tag_secret_s cnf71xx; }; union cvmx_pip_todo_entry { @@ -3186,24 +2556,6 @@ union cvmx_pip_todo_entry { uint64_t val:1; #endif } s; - struct cvmx_pip_todo_entry_s cn30xx; - struct cvmx_pip_todo_entry_s cn31xx; - struct cvmx_pip_todo_entry_s cn38xx; - struct cvmx_pip_todo_entry_s cn38xxp2; - struct cvmx_pip_todo_entry_s cn50xx; - struct cvmx_pip_todo_entry_s cn52xx; - struct cvmx_pip_todo_entry_s cn52xxp1; - struct cvmx_pip_todo_entry_s cn56xx; - struct cvmx_pip_todo_entry_s cn56xxp1; - struct cvmx_pip_todo_entry_s cn58xx; - struct cvmx_pip_todo_entry_s cn58xxp1; - struct cvmx_pip_todo_entry_s cn61xx; - struct cvmx_pip_todo_entry_s cn63xx; - struct cvmx_pip_todo_entry_s cn63xxp1; - struct cvmx_pip_todo_entry_s cn66xx; - struct cvmx_pip_todo_entry_s cn68xx; - struct cvmx_pip_todo_entry_s cn68xxp1; - struct cvmx_pip_todo_entry_s cnf71xx; }; union cvmx_pip_vlan_etypesx { @@ -3221,10 +2573,6 @@ union cvmx_pip_vlan_etypesx { uint64_t type3:16; #endif } s; - struct cvmx_pip_vlan_etypesx_s cn61xx; - struct cvmx_pip_vlan_etypesx_s cn66xx; - struct cvmx_pip_vlan_etypesx_s cn68xx; - struct cvmx_pip_vlan_etypesx_s cnf71xx; }; union cvmx_pip_xstat0_prtx { @@ -3238,9 +2586,6 @@ union cvmx_pip_xstat0_prtx { uint64_t drp_pkts:32; #endif } s; - struct cvmx_pip_xstat0_prtx_s cn63xx; - struct cvmx_pip_xstat0_prtx_s cn63xxp1; - struct cvmx_pip_xstat0_prtx_s cn66xx; }; union cvmx_pip_xstat10_prtx { @@ -3254,9 +2599,6 @@ union cvmx_pip_xstat10_prtx { uint64_t bcast:32; #endif } s; - struct cvmx_pip_xstat10_prtx_s cn63xx; - struct cvmx_pip_xstat10_prtx_s cn63xxp1; - struct cvmx_pip_xstat10_prtx_s cn66xx; }; union cvmx_pip_xstat11_prtx { @@ -3270,9 +2612,6 @@ union cvmx_pip_xstat11_prtx { uint64_t bcast:32; #endif } s; - struct cvmx_pip_xstat11_prtx_s cn63xx; - struct cvmx_pip_xstat11_prtx_s cn63xxp1; - struct cvmx_pip_xstat11_prtx_s cn66xx; }; union cvmx_pip_xstat1_prtx { @@ -3286,9 +2625,6 @@ union cvmx_pip_xstat1_prtx { uint64_t reserved_48_63:16; #endif } s; - struct cvmx_pip_xstat1_prtx_s cn63xx; - struct cvmx_pip_xstat1_prtx_s cn63xxp1; - struct cvmx_pip_xstat1_prtx_s cn66xx; }; union cvmx_pip_xstat2_prtx { @@ -3302,9 +2638,6 @@ union cvmx_pip_xstat2_prtx { uint64_t pkts:32; #endif } s; - struct cvmx_pip_xstat2_prtx_s cn63xx; - struct cvmx_pip_xstat2_prtx_s cn63xxp1; - struct cvmx_pip_xstat2_prtx_s cn66xx; }; union cvmx_pip_xstat3_prtx { @@ -3318,9 +2651,6 @@ union cvmx_pip_xstat3_prtx { uint64_t bcst:32; #endif } s; - struct cvmx_pip_xstat3_prtx_s cn63xx; - struct cvmx_pip_xstat3_prtx_s cn63xxp1; - struct cvmx_pip_xstat3_prtx_s cn66xx; }; union cvmx_pip_xstat4_prtx { @@ -3334,9 +2664,6 @@ union cvmx_pip_xstat4_prtx { uint64_t h65to127:32; #endif } s; - struct cvmx_pip_xstat4_prtx_s cn63xx; - struct cvmx_pip_xstat4_prtx_s cn63xxp1; - struct cvmx_pip_xstat4_prtx_s cn66xx; }; union cvmx_pip_xstat5_prtx { @@ -3350,9 +2677,6 @@ union cvmx_pip_xstat5_prtx { uint64_t h256to511:32; #endif } s; - struct cvmx_pip_xstat5_prtx_s cn63xx; - struct cvmx_pip_xstat5_prtx_s cn63xxp1; - struct cvmx_pip_xstat5_prtx_s cn66xx; }; union cvmx_pip_xstat6_prtx { @@ -3366,9 +2690,6 @@ union cvmx_pip_xstat6_prtx { uint64_t h1024to1518:32; #endif } s; - struct cvmx_pip_xstat6_prtx_s cn63xx; - struct cvmx_pip_xstat6_prtx_s cn63xxp1; - struct cvmx_pip_xstat6_prtx_s cn66xx; }; union cvmx_pip_xstat7_prtx { @@ -3382,9 +2703,6 @@ union cvmx_pip_xstat7_prtx { uint64_t fcs:32; #endif } s; - struct cvmx_pip_xstat7_prtx_s cn63xx; - struct cvmx_pip_xstat7_prtx_s cn63xxp1; - struct cvmx_pip_xstat7_prtx_s cn66xx; }; union cvmx_pip_xstat8_prtx { @@ -3398,9 +2716,6 @@ union cvmx_pip_xstat8_prtx { uint64_t frag:32; #endif } s; - struct cvmx_pip_xstat8_prtx_s cn63xx; - struct cvmx_pip_xstat8_prtx_s cn63xxp1; - struct cvmx_pip_xstat8_prtx_s cn66xx; }; union cvmx_pip_xstat9_prtx { @@ -3414,9 +2729,6 @@ union cvmx_pip_xstat9_prtx { uint64_t jabber:32; #endif } s; - struct cvmx_pip_xstat9_prtx_s cn63xx; - struct cvmx_pip_xstat9_prtx_s cn63xxp1; - struct cvmx_pip_xstat9_prtx_s cn66xx; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-pko-defs.h b/arch/mips/include/asm/octeon/cvmx-pko-defs.h index 87c3b970cad4..7e14c0d328f1 100644 --- a/arch/mips/include/asm/octeon/cvmx-pko-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-pko-defs.h @@ -97,24 +97,6 @@ union cvmx_pko_mem_count0 { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_pko_mem_count0_s cn30xx; - struct cvmx_pko_mem_count0_s cn31xx; - struct cvmx_pko_mem_count0_s cn38xx; - struct cvmx_pko_mem_count0_s cn38xxp2; - struct cvmx_pko_mem_count0_s cn50xx; - struct cvmx_pko_mem_count0_s cn52xx; - struct cvmx_pko_mem_count0_s cn52xxp1; - struct cvmx_pko_mem_count0_s cn56xx; - struct cvmx_pko_mem_count0_s cn56xxp1; - struct cvmx_pko_mem_count0_s cn58xx; - struct cvmx_pko_mem_count0_s cn58xxp1; - struct cvmx_pko_mem_count0_s cn61xx; - struct cvmx_pko_mem_count0_s cn63xx; - struct cvmx_pko_mem_count0_s cn63xxp1; - struct cvmx_pko_mem_count0_s cn66xx; - struct cvmx_pko_mem_count0_s cn68xx; - struct cvmx_pko_mem_count0_s cn68xxp1; - struct cvmx_pko_mem_count0_s cnf71xx; }; union cvmx_pko_mem_count1 { @@ -128,24 +110,6 @@ union cvmx_pko_mem_count1 { uint64_t reserved_48_63:16; #endif } s; - struct cvmx_pko_mem_count1_s cn30xx; - struct cvmx_pko_mem_count1_s cn31xx; - struct cvmx_pko_mem_count1_s cn38xx; - struct cvmx_pko_mem_count1_s cn38xxp2; - struct cvmx_pko_mem_count1_s cn50xx; - struct cvmx_pko_mem_count1_s cn52xx; - struct cvmx_pko_mem_count1_s cn52xxp1; - struct cvmx_pko_mem_count1_s cn56xx; - struct cvmx_pko_mem_count1_s cn56xxp1; - struct cvmx_pko_mem_count1_s cn58xx; - struct cvmx_pko_mem_count1_s cn58xxp1; - struct cvmx_pko_mem_count1_s cn61xx; - struct cvmx_pko_mem_count1_s cn63xx; - struct cvmx_pko_mem_count1_s cn63xxp1; - struct cvmx_pko_mem_count1_s cn66xx; - struct cvmx_pko_mem_count1_s cn68xx; - struct cvmx_pko_mem_count1_s cn68xxp1; - struct cvmx_pko_mem_count1_s cnf71xx; }; union cvmx_pko_mem_debug0 { @@ -163,24 +127,6 @@ union cvmx_pko_mem_debug0 { uint64_t fau:28; #endif } s; - struct cvmx_pko_mem_debug0_s cn30xx; - struct cvmx_pko_mem_debug0_s cn31xx; - struct cvmx_pko_mem_debug0_s cn38xx; - struct cvmx_pko_mem_debug0_s cn38xxp2; - struct cvmx_pko_mem_debug0_s cn50xx; - struct cvmx_pko_mem_debug0_s cn52xx; - struct cvmx_pko_mem_debug0_s cn52xxp1; - struct cvmx_pko_mem_debug0_s cn56xx; - struct cvmx_pko_mem_debug0_s cn56xxp1; - struct cvmx_pko_mem_debug0_s cn58xx; - struct cvmx_pko_mem_debug0_s cn58xxp1; - struct cvmx_pko_mem_debug0_s cn61xx; - struct cvmx_pko_mem_debug0_s cn63xx; - struct cvmx_pko_mem_debug0_s cn63xxp1; - struct cvmx_pko_mem_debug0_s cn66xx; - struct cvmx_pko_mem_debug0_s cn68xx; - struct cvmx_pko_mem_debug0_s cn68xxp1; - struct cvmx_pko_mem_debug0_s cnf71xx; }; union cvmx_pko_mem_debug1 { @@ -200,24 +146,6 @@ union cvmx_pko_mem_debug1 { uint64_t i:1; #endif } s; - struct cvmx_pko_mem_debug1_s cn30xx; - struct cvmx_pko_mem_debug1_s cn31xx; - struct cvmx_pko_mem_debug1_s cn38xx; - struct cvmx_pko_mem_debug1_s cn38xxp2; - struct cvmx_pko_mem_debug1_s cn50xx; - struct cvmx_pko_mem_debug1_s cn52xx; - struct cvmx_pko_mem_debug1_s cn52xxp1; - struct cvmx_pko_mem_debug1_s cn56xx; - struct cvmx_pko_mem_debug1_s cn56xxp1; - struct cvmx_pko_mem_debug1_s cn58xx; - struct cvmx_pko_mem_debug1_s cn58xxp1; - struct cvmx_pko_mem_debug1_s cn61xx; - struct cvmx_pko_mem_debug1_s cn63xx; - struct cvmx_pko_mem_debug1_s cn63xxp1; - struct cvmx_pko_mem_debug1_s cn66xx; - struct cvmx_pko_mem_debug1_s cn68xx; - struct cvmx_pko_mem_debug1_s cn68xxp1; - struct cvmx_pko_mem_debug1_s cnf71xx; }; union cvmx_pko_mem_debug10 { @@ -242,9 +170,6 @@ union cvmx_pko_mem_debug10 { uint64_t fau:28; #endif } cn30xx; - struct cvmx_pko_mem_debug10_cn30xx cn31xx; - struct cvmx_pko_mem_debug10_cn30xx cn38xx; - struct cvmx_pko_mem_debug10_cn30xx cn38xxp2; struct cvmx_pko_mem_debug10_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_49_63:15; @@ -258,19 +183,6 @@ union cvmx_pko_mem_debug10 { uint64_t reserved_49_63:15; #endif } cn50xx; - struct cvmx_pko_mem_debug10_cn50xx cn52xx; - struct cvmx_pko_mem_debug10_cn50xx cn52xxp1; - struct cvmx_pko_mem_debug10_cn50xx cn56xx; - struct cvmx_pko_mem_debug10_cn50xx cn56xxp1; - struct cvmx_pko_mem_debug10_cn50xx cn58xx; - struct cvmx_pko_mem_debug10_cn50xx cn58xxp1; - struct cvmx_pko_mem_debug10_cn50xx cn61xx; - struct cvmx_pko_mem_debug10_cn50xx cn63xx; - struct cvmx_pko_mem_debug10_cn50xx cn63xxp1; - struct cvmx_pko_mem_debug10_cn50xx cn66xx; - struct cvmx_pko_mem_debug10_cn50xx cn68xx; - struct cvmx_pko_mem_debug10_cn50xx cn68xxp1; - struct cvmx_pko_mem_debug10_cn50xx cnf71xx; }; union cvmx_pko_mem_debug11 { @@ -305,9 +217,6 @@ union cvmx_pko_mem_debug11 { uint64_t i:1; #endif } cn30xx; - struct cvmx_pko_mem_debug11_cn30xx cn31xx; - struct cvmx_pko_mem_debug11_cn30xx cn38xx; - struct cvmx_pko_mem_debug11_cn30xx cn38xxp2; struct cvmx_pko_mem_debug11_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_23_63:41; @@ -329,19 +238,6 @@ union cvmx_pko_mem_debug11 { uint64_t reserved_23_63:41; #endif } cn50xx; - struct cvmx_pko_mem_debug11_cn50xx cn52xx; - struct cvmx_pko_mem_debug11_cn50xx cn52xxp1; - struct cvmx_pko_mem_debug11_cn50xx cn56xx; - struct cvmx_pko_mem_debug11_cn50xx cn56xxp1; - struct cvmx_pko_mem_debug11_cn50xx cn58xx; - struct cvmx_pko_mem_debug11_cn50xx cn58xxp1; - struct cvmx_pko_mem_debug11_cn50xx cn61xx; - struct cvmx_pko_mem_debug11_cn50xx cn63xx; - struct cvmx_pko_mem_debug11_cn50xx cn63xxp1; - struct cvmx_pko_mem_debug11_cn50xx cn66xx; - struct cvmx_pko_mem_debug11_cn50xx cn68xx; - struct cvmx_pko_mem_debug11_cn50xx cn68xxp1; - struct cvmx_pko_mem_debug11_cn50xx cnf71xx; }; union cvmx_pko_mem_debug12 { @@ -360,9 +256,6 @@ union cvmx_pko_mem_debug12 { uint64_t data:64; #endif } cn30xx; - struct cvmx_pko_mem_debug12_cn30xx cn31xx; - struct cvmx_pko_mem_debug12_cn30xx cn38xx; - struct cvmx_pko_mem_debug12_cn30xx cn38xxp2; struct cvmx_pko_mem_debug12_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t fau:28; @@ -376,16 +269,6 @@ union cvmx_pko_mem_debug12 { uint64_t fau:28; #endif } cn50xx; - struct cvmx_pko_mem_debug12_cn50xx cn52xx; - struct cvmx_pko_mem_debug12_cn50xx cn52xxp1; - struct cvmx_pko_mem_debug12_cn50xx cn56xx; - struct cvmx_pko_mem_debug12_cn50xx cn56xxp1; - struct cvmx_pko_mem_debug12_cn50xx cn58xx; - struct cvmx_pko_mem_debug12_cn50xx cn58xxp1; - struct cvmx_pko_mem_debug12_cn50xx cn61xx; - struct cvmx_pko_mem_debug12_cn50xx cn63xx; - struct cvmx_pko_mem_debug12_cn50xx cn63xxp1; - struct cvmx_pko_mem_debug12_cn50xx cn66xx; struct cvmx_pko_mem_debug12_cn68xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t state:64; @@ -393,8 +276,6 @@ union cvmx_pko_mem_debug12 { uint64_t state:64; #endif } cn68xx; - struct cvmx_pko_mem_debug12_cn68xx cn68xxp1; - struct cvmx_pko_mem_debug12_cn50xx cnf71xx; }; union cvmx_pko_mem_debug13 { @@ -419,9 +300,6 @@ union cvmx_pko_mem_debug13 { uint64_t reserved_51_63:13; #endif } cn30xx; - struct cvmx_pko_mem_debug13_cn30xx cn31xx; - struct cvmx_pko_mem_debug13_cn30xx cn38xx; - struct cvmx_pko_mem_debug13_cn30xx cn38xxp2; struct cvmx_pko_mem_debug13_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t i:1; @@ -437,16 +315,6 @@ union cvmx_pko_mem_debug13 { uint64_t i:1; #endif } cn50xx; - struct cvmx_pko_mem_debug13_cn50xx cn52xx; - struct cvmx_pko_mem_debug13_cn50xx cn52xxp1; - struct cvmx_pko_mem_debug13_cn50xx cn56xx; - struct cvmx_pko_mem_debug13_cn50xx cn56xxp1; - struct cvmx_pko_mem_debug13_cn50xx cn58xx; - struct cvmx_pko_mem_debug13_cn50xx cn58xxp1; - struct cvmx_pko_mem_debug13_cn50xx cn61xx; - struct cvmx_pko_mem_debug13_cn50xx cn63xx; - struct cvmx_pko_mem_debug13_cn50xx cn63xxp1; - struct cvmx_pko_mem_debug13_cn50xx cn66xx; struct cvmx_pko_mem_debug13_cn68xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t state:64; @@ -454,8 +322,6 @@ union cvmx_pko_mem_debug13 { uint64_t state:64; #endif } cn68xx; - struct cvmx_pko_mem_debug13_cn68xx cn68xxp1; - struct cvmx_pko_mem_debug13_cn50xx cnf71xx; }; union cvmx_pko_mem_debug14 { @@ -476,9 +342,6 @@ union cvmx_pko_mem_debug14 { uint64_t reserved_17_63:47; #endif } cn30xx; - struct cvmx_pko_mem_debug14_cn30xx cn31xx; - struct cvmx_pko_mem_debug14_cn30xx cn38xx; - struct cvmx_pko_mem_debug14_cn30xx cn38xxp2; struct cvmx_pko_mem_debug14_cn52xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t data:64; @@ -486,14 +349,6 @@ union cvmx_pko_mem_debug14 { uint64_t data:64; #endif } cn52xx; - struct cvmx_pko_mem_debug14_cn52xx cn52xxp1; - struct cvmx_pko_mem_debug14_cn52xx cn56xx; - struct cvmx_pko_mem_debug14_cn52xx cn56xxp1; - struct cvmx_pko_mem_debug14_cn52xx cn61xx; - struct cvmx_pko_mem_debug14_cn52xx cn63xx; - struct cvmx_pko_mem_debug14_cn52xx cn63xxp1; - struct cvmx_pko_mem_debug14_cn52xx cn66xx; - struct cvmx_pko_mem_debug14_cn52xx cnf71xx; }; union cvmx_pko_mem_debug2 { @@ -513,24 +368,6 @@ union cvmx_pko_mem_debug2 { uint64_t i:1; #endif } s; - struct cvmx_pko_mem_debug2_s cn30xx; - struct cvmx_pko_mem_debug2_s cn31xx; - struct cvmx_pko_mem_debug2_s cn38xx; - struct cvmx_pko_mem_debug2_s cn38xxp2; - struct cvmx_pko_mem_debug2_s cn50xx; - struct cvmx_pko_mem_debug2_s cn52xx; - struct cvmx_pko_mem_debug2_s cn52xxp1; - struct cvmx_pko_mem_debug2_s cn56xx; - struct cvmx_pko_mem_debug2_s cn56xxp1; - struct cvmx_pko_mem_debug2_s cn58xx; - struct cvmx_pko_mem_debug2_s cn58xxp1; - struct cvmx_pko_mem_debug2_s cn61xx; - struct cvmx_pko_mem_debug2_s cn63xx; - struct cvmx_pko_mem_debug2_s cn63xxp1; - struct cvmx_pko_mem_debug2_s cn66xx; - struct cvmx_pko_mem_debug2_s cn68xx; - struct cvmx_pko_mem_debug2_s cn68xxp1; - struct cvmx_pko_mem_debug2_s cnf71xx; }; union cvmx_pko_mem_debug3 { @@ -557,9 +394,6 @@ union cvmx_pko_mem_debug3 { uint64_t i:1; #endif } cn30xx; - struct cvmx_pko_mem_debug3_cn30xx cn31xx; - struct cvmx_pko_mem_debug3_cn30xx cn38xx; - struct cvmx_pko_mem_debug3_cn30xx cn38xxp2; struct cvmx_pko_mem_debug3_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t data:64; @@ -567,19 +401,6 @@ union cvmx_pko_mem_debug3 { uint64_t data:64; #endif } cn50xx; - struct cvmx_pko_mem_debug3_cn50xx cn52xx; - struct cvmx_pko_mem_debug3_cn50xx cn52xxp1; - struct cvmx_pko_mem_debug3_cn50xx cn56xx; - struct cvmx_pko_mem_debug3_cn50xx cn56xxp1; - struct cvmx_pko_mem_debug3_cn50xx cn58xx; - struct cvmx_pko_mem_debug3_cn50xx cn58xxp1; - struct cvmx_pko_mem_debug3_cn50xx cn61xx; - struct cvmx_pko_mem_debug3_cn50xx cn63xx; - struct cvmx_pko_mem_debug3_cn50xx cn63xxp1; - struct cvmx_pko_mem_debug3_cn50xx cn66xx; - struct cvmx_pko_mem_debug3_cn50xx cn68xx; - struct cvmx_pko_mem_debug3_cn50xx cn68xxp1; - struct cvmx_pko_mem_debug3_cn50xx cnf71xx; }; union cvmx_pko_mem_debug4 { @@ -598,9 +419,6 @@ union cvmx_pko_mem_debug4 { uint64_t data:64; #endif } cn30xx; - struct cvmx_pko_mem_debug4_cn30xx cn31xx; - struct cvmx_pko_mem_debug4_cn30xx cn38xx; - struct cvmx_pko_mem_debug4_cn30xx cn38xxp2; struct cvmx_pko_mem_debug4_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t cmnd_segs:3; @@ -673,18 +491,6 @@ union cvmx_pko_mem_debug4 { uint64_t curr_siz:8; #endif } cn52xx; - struct cvmx_pko_mem_debug4_cn52xx cn52xxp1; - struct cvmx_pko_mem_debug4_cn52xx cn56xx; - struct cvmx_pko_mem_debug4_cn52xx cn56xxp1; - struct cvmx_pko_mem_debug4_cn50xx cn58xx; - struct cvmx_pko_mem_debug4_cn50xx cn58xxp1; - struct cvmx_pko_mem_debug4_cn52xx cn61xx; - struct cvmx_pko_mem_debug4_cn52xx cn63xx; - struct cvmx_pko_mem_debug4_cn52xx cn63xxp1; - struct cvmx_pko_mem_debug4_cn52xx cn66xx; - struct cvmx_pko_mem_debug4_cn52xx cn68xx; - struct cvmx_pko_mem_debug4_cn52xx cn68xxp1; - struct cvmx_pko_mem_debug4_cn52xx cnf71xx; }; union cvmx_pko_mem_debug5 { @@ -739,9 +545,6 @@ union cvmx_pko_mem_debug5 { uint64_t dwri_mod:1; #endif } cn30xx; - struct cvmx_pko_mem_debug5_cn30xx cn31xx; - struct cvmx_pko_mem_debug5_cn30xx cn38xx; - struct cvmx_pko_mem_debug5_cn30xx cn38xxp2; struct cvmx_pko_mem_debug5_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t curr_ptr:29; @@ -768,11 +571,6 @@ union cvmx_pko_mem_debug5 { uint64_t reserved_54_63:10; #endif } cn52xx; - struct cvmx_pko_mem_debug5_cn52xx cn52xxp1; - struct cvmx_pko_mem_debug5_cn52xx cn56xx; - struct cvmx_pko_mem_debug5_cn52xx cn56xxp1; - struct cvmx_pko_mem_debug5_cn50xx cn58xx; - struct cvmx_pko_mem_debug5_cn50xx cn58xxp1; struct cvmx_pko_mem_debug5_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_56_63:8; @@ -790,9 +588,6 @@ union cvmx_pko_mem_debug5 { uint64_t reserved_56_63:8; #endif } cn61xx; - struct cvmx_pko_mem_debug5_cn61xx cn63xx; - struct cvmx_pko_mem_debug5_cn61xx cn63xxp1; - struct cvmx_pko_mem_debug5_cn61xx cn66xx; struct cvmx_pko_mem_debug5_cn68xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_57_63:7; @@ -812,8 +607,6 @@ union cvmx_pko_mem_debug5 { uint64_t reserved_57_63:7; #endif } cn68xx; - struct cvmx_pko_mem_debug5_cn68xx cn68xxp1; - struct cvmx_pko_mem_debug5_cn61xx cnf71xx; }; union cvmx_pko_mem_debug6 { @@ -866,9 +659,6 @@ union cvmx_pko_mem_debug6 { uint64_t reserved_11_63:53; #endif } cn30xx; - struct cvmx_pko_mem_debug6_cn30xx cn31xx; - struct cvmx_pko_mem_debug6_cn30xx cn38xx; - struct cvmx_pko_mem_debug6_cn30xx cn38xxp2; struct cvmx_pko_mem_debug6_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_11_63:53; @@ -909,18 +699,6 @@ union cvmx_pko_mem_debug6 { uint64_t reserved_37_63:27; #endif } cn52xx; - struct cvmx_pko_mem_debug6_cn52xx cn52xxp1; - struct cvmx_pko_mem_debug6_cn52xx cn56xx; - struct cvmx_pko_mem_debug6_cn52xx cn56xxp1; - struct cvmx_pko_mem_debug6_cn50xx cn58xx; - struct cvmx_pko_mem_debug6_cn50xx cn58xxp1; - struct cvmx_pko_mem_debug6_cn52xx cn61xx; - struct cvmx_pko_mem_debug6_cn52xx cn63xx; - struct cvmx_pko_mem_debug6_cn52xx cn63xxp1; - struct cvmx_pko_mem_debug6_cn52xx cn66xx; - struct cvmx_pko_mem_debug6_cn52xx cn68xx; - struct cvmx_pko_mem_debug6_cn52xx cn68xxp1; - struct cvmx_pko_mem_debug6_cn52xx cnf71xx; }; union cvmx_pko_mem_debug7 { @@ -945,9 +723,6 @@ union cvmx_pko_mem_debug7 { uint64_t reserved_58_63:6; #endif } cn30xx; - struct cvmx_pko_mem_debug7_cn30xx cn31xx; - struct cvmx_pko_mem_debug7_cn30xx cn38xx; - struct cvmx_pko_mem_debug7_cn30xx cn38xxp2; struct cvmx_pko_mem_debug7_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t qos:5; @@ -965,16 +740,6 @@ union cvmx_pko_mem_debug7 { uint64_t qos:5; #endif } cn50xx; - struct cvmx_pko_mem_debug7_cn50xx cn52xx; - struct cvmx_pko_mem_debug7_cn50xx cn52xxp1; - struct cvmx_pko_mem_debug7_cn50xx cn56xx; - struct cvmx_pko_mem_debug7_cn50xx cn56xxp1; - struct cvmx_pko_mem_debug7_cn50xx cn58xx; - struct cvmx_pko_mem_debug7_cn50xx cn58xxp1; - struct cvmx_pko_mem_debug7_cn50xx cn61xx; - struct cvmx_pko_mem_debug7_cn50xx cn63xx; - struct cvmx_pko_mem_debug7_cn50xx cn63xxp1; - struct cvmx_pko_mem_debug7_cn50xx cn66xx; struct cvmx_pko_mem_debug7_cn68xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t qos:3; @@ -992,8 +757,6 @@ union cvmx_pko_mem_debug7 { uint64_t qos:3; #endif } cn68xx; - struct cvmx_pko_mem_debug7_cn68xx cn68xxp1; - struct cvmx_pko_mem_debug7_cn50xx cnf71xx; }; union cvmx_pko_mem_debug8 { @@ -1028,9 +791,6 @@ union cvmx_pko_mem_debug8 { uint64_t qos:5; #endif } cn30xx; - struct cvmx_pko_mem_debug8_cn30xx cn31xx; - struct cvmx_pko_mem_debug8_cn30xx cn38xx; - struct cvmx_pko_mem_debug8_cn30xx cn38xxp2; struct cvmx_pko_mem_debug8_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_28_63:36; @@ -1073,11 +833,6 @@ union cvmx_pko_mem_debug8 { uint64_t reserved_29_63:35; #endif } cn52xx; - struct cvmx_pko_mem_debug8_cn52xx cn52xxp1; - struct cvmx_pko_mem_debug8_cn52xx cn56xx; - struct cvmx_pko_mem_debug8_cn52xx cn56xxp1; - struct cvmx_pko_mem_debug8_cn50xx cn58xx; - struct cvmx_pko_mem_debug8_cn50xx cn58xxp1; struct cvmx_pko_mem_debug8_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_42_63:22; @@ -1107,9 +862,6 @@ union cvmx_pko_mem_debug8 { uint64_t reserved_42_63:22; #endif } cn61xx; - struct cvmx_pko_mem_debug8_cn52xx cn63xx; - struct cvmx_pko_mem_debug8_cn52xx cn63xxp1; - struct cvmx_pko_mem_debug8_cn61xx cn66xx; struct cvmx_pko_mem_debug8_cn68xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_37_63:27; @@ -1133,8 +885,6 @@ union cvmx_pko_mem_debug8 { uint64_t reserved_37_63:27; #endif } cn68xx; - struct cvmx_pko_mem_debug8_cn68xx cn68xxp1; - struct cvmx_pko_mem_debug8_cn61xx cnf71xx; }; union cvmx_pko_mem_debug9 { @@ -1167,7 +917,6 @@ union cvmx_pko_mem_debug9 { uint64_t reserved_28_63:36; #endif } cn30xx; - struct cvmx_pko_mem_debug9_cn30xx cn31xx; struct cvmx_pko_mem_debug9_cn38xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_28_63:36; @@ -1187,7 +936,6 @@ union cvmx_pko_mem_debug9 { uint64_t reserved_28_63:36; #endif } cn38xx; - struct cvmx_pko_mem_debug9_cn38xx cn38xxp2; struct cvmx_pko_mem_debug9_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_49_63:15; @@ -1201,19 +949,6 @@ union cvmx_pko_mem_debug9 { uint64_t reserved_49_63:15; #endif } cn50xx; - struct cvmx_pko_mem_debug9_cn50xx cn52xx; - struct cvmx_pko_mem_debug9_cn50xx cn52xxp1; - struct cvmx_pko_mem_debug9_cn50xx cn56xx; - struct cvmx_pko_mem_debug9_cn50xx cn56xxp1; - struct cvmx_pko_mem_debug9_cn50xx cn58xx; - struct cvmx_pko_mem_debug9_cn50xx cn58xxp1; - struct cvmx_pko_mem_debug9_cn50xx cn61xx; - struct cvmx_pko_mem_debug9_cn50xx cn63xx; - struct cvmx_pko_mem_debug9_cn50xx cn63xxp1; - struct cvmx_pko_mem_debug9_cn50xx cn66xx; - struct cvmx_pko_mem_debug9_cn50xx cn68xx; - struct cvmx_pko_mem_debug9_cn50xx cn68xxp1; - struct cvmx_pko_mem_debug9_cn50xx cnf71xx; }; union cvmx_pko_mem_iport_ptrs { @@ -1249,8 +984,6 @@ union cvmx_pko_mem_iport_ptrs { uint64_t reserved_63_63:1; #endif } s; - struct cvmx_pko_mem_iport_ptrs_s cn68xx; - struct cvmx_pko_mem_iport_ptrs_s cn68xxp1; }; union cvmx_pko_mem_iport_qos { @@ -1272,8 +1005,6 @@ union cvmx_pko_mem_iport_qos { uint64_t reserved_61_63:3; #endif } s; - struct cvmx_pko_mem_iport_qos_s cn68xx; - struct cvmx_pko_mem_iport_qos_s cn68xxp1; }; union cvmx_pko_mem_iqueue_ptrs { @@ -1303,8 +1034,6 @@ union cvmx_pko_mem_iqueue_ptrs { uint64_t s_tail:1; #endif } s; - struct cvmx_pko_mem_iqueue_ptrs_s cn68xx; - struct cvmx_pko_mem_iqueue_ptrs_s cn68xxp1; }; union cvmx_pko_mem_iqueue_qos { @@ -1324,8 +1053,6 @@ union cvmx_pko_mem_iqueue_qos { uint64_t reserved_61_63:3; #endif } s; - struct cvmx_pko_mem_iqueue_qos_s cn68xx; - struct cvmx_pko_mem_iqueue_qos_s cn68xxp1; }; union cvmx_pko_mem_port_ptrs { @@ -1349,15 +1076,6 @@ union cvmx_pko_mem_port_ptrs { uint64_t reserved_62_63:2; #endif } s; - struct cvmx_pko_mem_port_ptrs_s cn52xx; - struct cvmx_pko_mem_port_ptrs_s cn52xxp1; - struct cvmx_pko_mem_port_ptrs_s cn56xx; - struct cvmx_pko_mem_port_ptrs_s cn56xxp1; - struct cvmx_pko_mem_port_ptrs_s cn61xx; - struct cvmx_pko_mem_port_ptrs_s cn63xx; - struct cvmx_pko_mem_port_ptrs_s cn63xxp1; - struct cvmx_pko_mem_port_ptrs_s cn66xx; - struct cvmx_pko_mem_port_ptrs_s cnf71xx; }; union cvmx_pko_mem_port_qos { @@ -1377,15 +1095,6 @@ union cvmx_pko_mem_port_qos { uint64_t reserved_61_63:3; #endif } s; - struct cvmx_pko_mem_port_qos_s cn52xx; - struct cvmx_pko_mem_port_qos_s cn52xxp1; - struct cvmx_pko_mem_port_qos_s cn56xx; - struct cvmx_pko_mem_port_qos_s cn56xxp1; - struct cvmx_pko_mem_port_qos_s cn61xx; - struct cvmx_pko_mem_port_qos_s cn63xx; - struct cvmx_pko_mem_port_qos_s cn63xxp1; - struct cvmx_pko_mem_port_qos_s cn66xx; - struct cvmx_pko_mem_port_qos_s cnf71xx; }; union cvmx_pko_mem_port_rate0 { @@ -1420,16 +1129,6 @@ union cvmx_pko_mem_port_rate0 { uint64_t reserved_51_63:13; #endif } cn52xx; - struct cvmx_pko_mem_port_rate0_cn52xx cn52xxp1; - struct cvmx_pko_mem_port_rate0_cn52xx cn56xx; - struct cvmx_pko_mem_port_rate0_cn52xx cn56xxp1; - struct cvmx_pko_mem_port_rate0_cn52xx cn61xx; - struct cvmx_pko_mem_port_rate0_cn52xx cn63xx; - struct cvmx_pko_mem_port_rate0_cn52xx cn63xxp1; - struct cvmx_pko_mem_port_rate0_cn52xx cn66xx; - struct cvmx_pko_mem_port_rate0_s cn68xx; - struct cvmx_pko_mem_port_rate0_s cn68xxp1; - struct cvmx_pko_mem_port_rate0_cn52xx cnf71xx; }; union cvmx_pko_mem_port_rate1 { @@ -1460,16 +1159,6 @@ union cvmx_pko_mem_port_rate1 { uint64_t reserved_32_63:32; #endif } cn52xx; - struct cvmx_pko_mem_port_rate1_cn52xx cn52xxp1; - struct cvmx_pko_mem_port_rate1_cn52xx cn56xx; - struct cvmx_pko_mem_port_rate1_cn52xx cn56xxp1; - struct cvmx_pko_mem_port_rate1_cn52xx cn61xx; - struct cvmx_pko_mem_port_rate1_cn52xx cn63xx; - struct cvmx_pko_mem_port_rate1_cn52xx cn63xxp1; - struct cvmx_pko_mem_port_rate1_cn52xx cn66xx; - struct cvmx_pko_mem_port_rate1_s cn68xx; - struct cvmx_pko_mem_port_rate1_s cn68xxp1; - struct cvmx_pko_mem_port_rate1_cn52xx cnf71xx; }; union cvmx_pko_mem_queue_ptrs { @@ -1497,22 +1186,6 @@ union cvmx_pko_mem_queue_ptrs { uint64_t s_tail:1; #endif } s; - struct cvmx_pko_mem_queue_ptrs_s cn30xx; - struct cvmx_pko_mem_queue_ptrs_s cn31xx; - struct cvmx_pko_mem_queue_ptrs_s cn38xx; - struct cvmx_pko_mem_queue_ptrs_s cn38xxp2; - struct cvmx_pko_mem_queue_ptrs_s cn50xx; - struct cvmx_pko_mem_queue_ptrs_s cn52xx; - struct cvmx_pko_mem_queue_ptrs_s cn52xxp1; - struct cvmx_pko_mem_queue_ptrs_s cn56xx; - struct cvmx_pko_mem_queue_ptrs_s cn56xxp1; - struct cvmx_pko_mem_queue_ptrs_s cn58xx; - struct cvmx_pko_mem_queue_ptrs_s cn58xxp1; - struct cvmx_pko_mem_queue_ptrs_s cn61xx; - struct cvmx_pko_mem_queue_ptrs_s cn63xx; - struct cvmx_pko_mem_queue_ptrs_s cn63xxp1; - struct cvmx_pko_mem_queue_ptrs_s cn66xx; - struct cvmx_pko_mem_queue_ptrs_s cnf71xx; }; union cvmx_pko_mem_queue_qos { @@ -1532,22 +1205,6 @@ union cvmx_pko_mem_queue_qos { uint64_t reserved_61_63:3; #endif } s; - struct cvmx_pko_mem_queue_qos_s cn30xx; - struct cvmx_pko_mem_queue_qos_s cn31xx; - struct cvmx_pko_mem_queue_qos_s cn38xx; - struct cvmx_pko_mem_queue_qos_s cn38xxp2; - struct cvmx_pko_mem_queue_qos_s cn50xx; - struct cvmx_pko_mem_queue_qos_s cn52xx; - struct cvmx_pko_mem_queue_qos_s cn52xxp1; - struct cvmx_pko_mem_queue_qos_s cn56xx; - struct cvmx_pko_mem_queue_qos_s cn56xxp1; - struct cvmx_pko_mem_queue_qos_s cn58xx; - struct cvmx_pko_mem_queue_qos_s cn58xxp1; - struct cvmx_pko_mem_queue_qos_s cn61xx; - struct cvmx_pko_mem_queue_qos_s cn63xx; - struct cvmx_pko_mem_queue_qos_s cn63xxp1; - struct cvmx_pko_mem_queue_qos_s cn66xx; - struct cvmx_pko_mem_queue_qos_s cnf71xx; }; union cvmx_pko_mem_throttle_int { @@ -1569,8 +1226,6 @@ union cvmx_pko_mem_throttle_int { uint64_t reserved_47_63:17; #endif } s; - struct cvmx_pko_mem_throttle_int_s cn68xx; - struct cvmx_pko_mem_throttle_int_s cn68xxp1; }; union cvmx_pko_mem_throttle_pipe { @@ -1592,8 +1247,6 @@ union cvmx_pko_mem_throttle_pipe { uint64_t reserved_47_63:17; #endif } s; - struct cvmx_pko_mem_throttle_pipe_s cn68xx; - struct cvmx_pko_mem_throttle_pipe_s cn68xxp1; }; union cvmx_pko_reg_bist_result { @@ -1636,9 +1289,6 @@ union cvmx_pko_reg_bist_result { uint64_t reserved_27_63:37; #endif } cn30xx; - struct cvmx_pko_reg_bist_result_cn30xx cn31xx; - struct cvmx_pko_reg_bist_result_cn30xx cn38xx; - struct cvmx_pko_reg_bist_result_cn30xx cn38xxp2; struct cvmx_pko_reg_bist_result_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_33_63:31; @@ -1711,15 +1361,6 @@ union cvmx_pko_reg_bist_result { uint64_t reserved_35_63:29; #endif } cn52xx; - struct cvmx_pko_reg_bist_result_cn52xx cn52xxp1; - struct cvmx_pko_reg_bist_result_cn52xx cn56xx; - struct cvmx_pko_reg_bist_result_cn52xx cn56xxp1; - struct cvmx_pko_reg_bist_result_cn50xx cn58xx; - struct cvmx_pko_reg_bist_result_cn50xx cn58xxp1; - struct cvmx_pko_reg_bist_result_cn52xx cn61xx; - struct cvmx_pko_reg_bist_result_cn52xx cn63xx; - struct cvmx_pko_reg_bist_result_cn52xx cn63xxp1; - struct cvmx_pko_reg_bist_result_cn52xx cn66xx; struct cvmx_pko_reg_bist_result_cn68xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_36_63:28; @@ -1808,7 +1449,6 @@ union cvmx_pko_reg_bist_result { uint64_t reserved_35_63:29; #endif } cn68xxp1; - struct cvmx_pko_reg_bist_result_cn52xx cnf71xx; }; union cvmx_pko_reg_cmd_buf { @@ -1826,24 +1466,6 @@ union cvmx_pko_reg_cmd_buf { uint64_t reserved_23_63:41; #endif } s; - struct cvmx_pko_reg_cmd_buf_s cn30xx; - struct cvmx_pko_reg_cmd_buf_s cn31xx; - struct cvmx_pko_reg_cmd_buf_s cn38xx; - struct cvmx_pko_reg_cmd_buf_s cn38xxp2; - struct cvmx_pko_reg_cmd_buf_s cn50xx; - struct cvmx_pko_reg_cmd_buf_s cn52xx; - struct cvmx_pko_reg_cmd_buf_s cn52xxp1; - struct cvmx_pko_reg_cmd_buf_s cn56xx; - struct cvmx_pko_reg_cmd_buf_s cn56xxp1; - struct cvmx_pko_reg_cmd_buf_s cn58xx; - struct cvmx_pko_reg_cmd_buf_s cn58xxp1; - struct cvmx_pko_reg_cmd_buf_s cn61xx; - struct cvmx_pko_reg_cmd_buf_s cn63xx; - struct cvmx_pko_reg_cmd_buf_s cn63xxp1; - struct cvmx_pko_reg_cmd_buf_s cn66xx; - struct cvmx_pko_reg_cmd_buf_s cn68xx; - struct cvmx_pko_reg_cmd_buf_s cn68xxp1; - struct cvmx_pko_reg_cmd_buf_s cnf71xx; }; union cvmx_pko_reg_crc_ctlx { @@ -1859,10 +1481,6 @@ union cvmx_pko_reg_crc_ctlx { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_pko_reg_crc_ctlx_s cn38xx; - struct cvmx_pko_reg_crc_ctlx_s cn38xxp2; - struct cvmx_pko_reg_crc_ctlx_s cn58xx; - struct cvmx_pko_reg_crc_ctlx_s cn58xxp1; }; union cvmx_pko_reg_crc_enable { @@ -1876,10 +1494,6 @@ union cvmx_pko_reg_crc_enable { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_pko_reg_crc_enable_s cn38xx; - struct cvmx_pko_reg_crc_enable_s cn38xxp2; - struct cvmx_pko_reg_crc_enable_s cn58xx; - struct cvmx_pko_reg_crc_enable_s cn58xxp1; }; union cvmx_pko_reg_crc_ivx { @@ -1893,10 +1507,6 @@ union cvmx_pko_reg_crc_ivx { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_pko_reg_crc_ivx_s cn38xx; - struct cvmx_pko_reg_crc_ivx_s cn38xxp2; - struct cvmx_pko_reg_crc_ivx_s cn58xx; - struct cvmx_pko_reg_crc_ivx_s cn58xxp1; }; union cvmx_pko_reg_debug0 { @@ -1917,23 +1527,6 @@ union cvmx_pko_reg_debug0 { uint64_t reserved_17_63:47; #endif } cn30xx; - struct cvmx_pko_reg_debug0_cn30xx cn31xx; - struct cvmx_pko_reg_debug0_cn30xx cn38xx; - struct cvmx_pko_reg_debug0_cn30xx cn38xxp2; - struct cvmx_pko_reg_debug0_s cn50xx; - struct cvmx_pko_reg_debug0_s cn52xx; - struct cvmx_pko_reg_debug0_s cn52xxp1; - struct cvmx_pko_reg_debug0_s cn56xx; - struct cvmx_pko_reg_debug0_s cn56xxp1; - struct cvmx_pko_reg_debug0_s cn58xx; - struct cvmx_pko_reg_debug0_s cn58xxp1; - struct cvmx_pko_reg_debug0_s cn61xx; - struct cvmx_pko_reg_debug0_s cn63xx; - struct cvmx_pko_reg_debug0_s cn63xxp1; - struct cvmx_pko_reg_debug0_s cn66xx; - struct cvmx_pko_reg_debug0_s cn68xx; - struct cvmx_pko_reg_debug0_s cn68xxp1; - struct cvmx_pko_reg_debug0_s cnf71xx; }; union cvmx_pko_reg_debug1 { @@ -1945,20 +1538,6 @@ union cvmx_pko_reg_debug1 { uint64_t asserts:64; #endif } s; - struct cvmx_pko_reg_debug1_s cn50xx; - struct cvmx_pko_reg_debug1_s cn52xx; - struct cvmx_pko_reg_debug1_s cn52xxp1; - struct cvmx_pko_reg_debug1_s cn56xx; - struct cvmx_pko_reg_debug1_s cn56xxp1; - struct cvmx_pko_reg_debug1_s cn58xx; - struct cvmx_pko_reg_debug1_s cn58xxp1; - struct cvmx_pko_reg_debug1_s cn61xx; - struct cvmx_pko_reg_debug1_s cn63xx; - struct cvmx_pko_reg_debug1_s cn63xxp1; - struct cvmx_pko_reg_debug1_s cn66xx; - struct cvmx_pko_reg_debug1_s cn68xx; - struct cvmx_pko_reg_debug1_s cn68xxp1; - struct cvmx_pko_reg_debug1_s cnf71xx; }; union cvmx_pko_reg_debug2 { @@ -1970,20 +1549,6 @@ union cvmx_pko_reg_debug2 { uint64_t asserts:64; #endif } s; - struct cvmx_pko_reg_debug2_s cn50xx; - struct cvmx_pko_reg_debug2_s cn52xx; - struct cvmx_pko_reg_debug2_s cn52xxp1; - struct cvmx_pko_reg_debug2_s cn56xx; - struct cvmx_pko_reg_debug2_s cn56xxp1; - struct cvmx_pko_reg_debug2_s cn58xx; - struct cvmx_pko_reg_debug2_s cn58xxp1; - struct cvmx_pko_reg_debug2_s cn61xx; - struct cvmx_pko_reg_debug2_s cn63xx; - struct cvmx_pko_reg_debug2_s cn63xxp1; - struct cvmx_pko_reg_debug2_s cn66xx; - struct cvmx_pko_reg_debug2_s cn68xx; - struct cvmx_pko_reg_debug2_s cn68xxp1; - struct cvmx_pko_reg_debug2_s cnf71xx; }; union cvmx_pko_reg_debug3 { @@ -1995,20 +1560,6 @@ union cvmx_pko_reg_debug3 { uint64_t asserts:64; #endif } s; - struct cvmx_pko_reg_debug3_s cn50xx; - struct cvmx_pko_reg_debug3_s cn52xx; - struct cvmx_pko_reg_debug3_s cn52xxp1; - struct cvmx_pko_reg_debug3_s cn56xx; - struct cvmx_pko_reg_debug3_s cn56xxp1; - struct cvmx_pko_reg_debug3_s cn58xx; - struct cvmx_pko_reg_debug3_s cn58xxp1; - struct cvmx_pko_reg_debug3_s cn61xx; - struct cvmx_pko_reg_debug3_s cn63xx; - struct cvmx_pko_reg_debug3_s cn63xxp1; - struct cvmx_pko_reg_debug3_s cn66xx; - struct cvmx_pko_reg_debug3_s cn68xx; - struct cvmx_pko_reg_debug3_s cn68xxp1; - struct cvmx_pko_reg_debug3_s cnf71xx; }; union cvmx_pko_reg_debug4 { @@ -2020,8 +1571,6 @@ union cvmx_pko_reg_debug4 { uint64_t asserts:64; #endif } s; - struct cvmx_pko_reg_debug4_s cn68xx; - struct cvmx_pko_reg_debug4_s cn68xxp1; }; union cvmx_pko_reg_engine_inflight { @@ -2090,9 +1639,6 @@ union cvmx_pko_reg_engine_inflight { uint64_t reserved_40_63:24; #endif } cn52xx; - struct cvmx_pko_reg_engine_inflight_cn52xx cn52xxp1; - struct cvmx_pko_reg_engine_inflight_cn52xx cn56xx; - struct cvmx_pko_reg_engine_inflight_cn52xx cn56xxp1; struct cvmx_pko_reg_engine_inflight_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_56_63:8; @@ -2159,11 +1705,6 @@ union cvmx_pko_reg_engine_inflight { uint64_t reserved_48_63:16; #endif } cn63xx; - struct cvmx_pko_reg_engine_inflight_cn63xx cn63xxp1; - struct cvmx_pko_reg_engine_inflight_cn61xx cn66xx; - struct cvmx_pko_reg_engine_inflight_s cn68xx; - struct cvmx_pko_reg_engine_inflight_s cn68xxp1; - struct cvmx_pko_reg_engine_inflight_cn61xx cnf71xx; }; union cvmx_pko_reg_engine_inflight1 { @@ -2183,8 +1724,6 @@ union cvmx_pko_reg_engine_inflight1 { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_pko_reg_engine_inflight1_s cn68xx; - struct cvmx_pko_reg_engine_inflight1_s cn68xxp1; }; union cvmx_pko_reg_engine_storagex { @@ -2226,8 +1765,6 @@ union cvmx_pko_reg_engine_storagex { uint64_t engine15:4; #endif } s; - struct cvmx_pko_reg_engine_storagex_s cn68xx; - struct cvmx_pko_reg_engine_storagex_s cn68xxp1; }; union cvmx_pko_reg_engine_thresh { @@ -2250,9 +1787,6 @@ union cvmx_pko_reg_engine_thresh { uint64_t reserved_10_63:54; #endif } cn52xx; - struct cvmx_pko_reg_engine_thresh_cn52xx cn52xxp1; - struct cvmx_pko_reg_engine_thresh_cn52xx cn56xx; - struct cvmx_pko_reg_engine_thresh_cn52xx cn56xxp1; struct cvmx_pko_reg_engine_thresh_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_14_63:50; @@ -2271,11 +1805,6 @@ union cvmx_pko_reg_engine_thresh { uint64_t reserved_12_63:52; #endif } cn63xx; - struct cvmx_pko_reg_engine_thresh_cn63xx cn63xxp1; - struct cvmx_pko_reg_engine_thresh_cn61xx cn66xx; - struct cvmx_pko_reg_engine_thresh_s cn68xx; - struct cvmx_pko_reg_engine_thresh_s cn68xxp1; - struct cvmx_pko_reg_engine_thresh_cn61xx cnf71xx; }; union cvmx_pko_reg_error { @@ -2306,9 +1835,6 @@ union cvmx_pko_reg_error { uint64_t reserved_2_63:62; #endif } cn30xx; - struct cvmx_pko_reg_error_cn30xx cn31xx; - struct cvmx_pko_reg_error_cn30xx cn38xx; - struct cvmx_pko_reg_error_cn30xx cn38xxp2; struct cvmx_pko_reg_error_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_3_63:61; @@ -2322,19 +1848,6 @@ union cvmx_pko_reg_error { uint64_t reserved_3_63:61; #endif } cn50xx; - struct cvmx_pko_reg_error_cn50xx cn52xx; - struct cvmx_pko_reg_error_cn50xx cn52xxp1; - struct cvmx_pko_reg_error_cn50xx cn56xx; - struct cvmx_pko_reg_error_cn50xx cn56xxp1; - struct cvmx_pko_reg_error_cn50xx cn58xx; - struct cvmx_pko_reg_error_cn50xx cn58xxp1; - struct cvmx_pko_reg_error_cn50xx cn61xx; - struct cvmx_pko_reg_error_cn50xx cn63xx; - struct cvmx_pko_reg_error_cn50xx cn63xxp1; - struct cvmx_pko_reg_error_cn50xx cn66xx; - struct cvmx_pko_reg_error_s cn68xx; - struct cvmx_pko_reg_error_s cn68xxp1; - struct cvmx_pko_reg_error_cn50xx cnf71xx; }; union cvmx_pko_reg_flags { @@ -2379,16 +1892,6 @@ union cvmx_pko_reg_flags { uint64_t reserved_4_63:60; #endif } cn30xx; - struct cvmx_pko_reg_flags_cn30xx cn31xx; - struct cvmx_pko_reg_flags_cn30xx cn38xx; - struct cvmx_pko_reg_flags_cn30xx cn38xxp2; - struct cvmx_pko_reg_flags_cn30xx cn50xx; - struct cvmx_pko_reg_flags_cn30xx cn52xx; - struct cvmx_pko_reg_flags_cn30xx cn52xxp1; - struct cvmx_pko_reg_flags_cn30xx cn56xx; - struct cvmx_pko_reg_flags_cn30xx cn56xxp1; - struct cvmx_pko_reg_flags_cn30xx cn58xx; - struct cvmx_pko_reg_flags_cn30xx cn58xxp1; struct cvmx_pko_reg_flags_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_9_63:55; @@ -2410,10 +1913,6 @@ union cvmx_pko_reg_flags { uint64_t reserved_9_63:55; #endif } cn61xx; - struct cvmx_pko_reg_flags_cn30xx cn63xx; - struct cvmx_pko_reg_flags_cn30xx cn63xxp1; - struct cvmx_pko_reg_flags_cn61xx cn66xx; - struct cvmx_pko_reg_flags_s cn68xx; struct cvmx_pko_reg_flags_cn68xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_7_63:57; @@ -2435,7 +1934,6 @@ union cvmx_pko_reg_flags { uint64_t reserved_7_63:57; #endif } cn68xxp1; - struct cvmx_pko_reg_flags_cn61xx cnf71xx; }; union cvmx_pko_reg_gmx_port_mode { @@ -2451,22 +1949,6 @@ union cvmx_pko_reg_gmx_port_mode { uint64_t reserved_6_63:58; #endif } s; - struct cvmx_pko_reg_gmx_port_mode_s cn30xx; - struct cvmx_pko_reg_gmx_port_mode_s cn31xx; - struct cvmx_pko_reg_gmx_port_mode_s cn38xx; - struct cvmx_pko_reg_gmx_port_mode_s cn38xxp2; - struct cvmx_pko_reg_gmx_port_mode_s cn50xx; - struct cvmx_pko_reg_gmx_port_mode_s cn52xx; - struct cvmx_pko_reg_gmx_port_mode_s cn52xxp1; - struct cvmx_pko_reg_gmx_port_mode_s cn56xx; - struct cvmx_pko_reg_gmx_port_mode_s cn56xxp1; - struct cvmx_pko_reg_gmx_port_mode_s cn58xx; - struct cvmx_pko_reg_gmx_port_mode_s cn58xxp1; - struct cvmx_pko_reg_gmx_port_mode_s cn61xx; - struct cvmx_pko_reg_gmx_port_mode_s cn63xx; - struct cvmx_pko_reg_gmx_port_mode_s cn63xxp1; - struct cvmx_pko_reg_gmx_port_mode_s cn66xx; - struct cvmx_pko_reg_gmx_port_mode_s cnf71xx; }; union cvmx_pko_reg_int_mask { @@ -2497,9 +1979,6 @@ union cvmx_pko_reg_int_mask { uint64_t reserved_2_63:62; #endif } cn30xx; - struct cvmx_pko_reg_int_mask_cn30xx cn31xx; - struct cvmx_pko_reg_int_mask_cn30xx cn38xx; - struct cvmx_pko_reg_int_mask_cn30xx cn38xxp2; struct cvmx_pko_reg_int_mask_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_3_63:61; @@ -2513,19 +1992,6 @@ union cvmx_pko_reg_int_mask { uint64_t reserved_3_63:61; #endif } cn50xx; - struct cvmx_pko_reg_int_mask_cn50xx cn52xx; - struct cvmx_pko_reg_int_mask_cn50xx cn52xxp1; - struct cvmx_pko_reg_int_mask_cn50xx cn56xx; - struct cvmx_pko_reg_int_mask_cn50xx cn56xxp1; - struct cvmx_pko_reg_int_mask_cn50xx cn58xx; - struct cvmx_pko_reg_int_mask_cn50xx cn58xxp1; - struct cvmx_pko_reg_int_mask_cn50xx cn61xx; - struct cvmx_pko_reg_int_mask_cn50xx cn63xx; - struct cvmx_pko_reg_int_mask_cn50xx cn63xxp1; - struct cvmx_pko_reg_int_mask_cn50xx cn66xx; - struct cvmx_pko_reg_int_mask_s cn68xx; - struct cvmx_pko_reg_int_mask_s cn68xxp1; - struct cvmx_pko_reg_int_mask_cn50xx cnf71xx; }; union cvmx_pko_reg_loopback_bpid { @@ -2569,8 +2035,6 @@ union cvmx_pko_reg_loopback_bpid { uint64_t reserved_59_63:5; #endif } s; - struct cvmx_pko_reg_loopback_bpid_s cn68xx; - struct cvmx_pko_reg_loopback_bpid_s cn68xxp1; }; union cvmx_pko_reg_loopback_pkind { @@ -2614,8 +2078,6 @@ union cvmx_pko_reg_loopback_pkind { uint64_t reserved_59_63:5; #endif } s; - struct cvmx_pko_reg_loopback_pkind_s cn68xx; - struct cvmx_pko_reg_loopback_pkind_s cn68xxp1; }; union cvmx_pko_reg_min_pkt { @@ -2641,8 +2103,6 @@ union cvmx_pko_reg_min_pkt { uint64_t size7:8; #endif } s; - struct cvmx_pko_reg_min_pkt_s cn68xx; - struct cvmx_pko_reg_min_pkt_s cn68xxp1; }; union cvmx_pko_reg_preempt { @@ -2656,17 +2116,6 @@ union cvmx_pko_reg_preempt { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_pko_reg_preempt_s cn52xx; - struct cvmx_pko_reg_preempt_s cn52xxp1; - struct cvmx_pko_reg_preempt_s cn56xx; - struct cvmx_pko_reg_preempt_s cn56xxp1; - struct cvmx_pko_reg_preempt_s cn61xx; - struct cvmx_pko_reg_preempt_s cn63xx; - struct cvmx_pko_reg_preempt_s cn63xxp1; - struct cvmx_pko_reg_preempt_s cn66xx; - struct cvmx_pko_reg_preempt_s cn68xx; - struct cvmx_pko_reg_preempt_s cn68xxp1; - struct cvmx_pko_reg_preempt_s cnf71xx; }; union cvmx_pko_reg_queue_mode { @@ -2680,24 +2129,6 @@ union cvmx_pko_reg_queue_mode { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_pko_reg_queue_mode_s cn30xx; - struct cvmx_pko_reg_queue_mode_s cn31xx; - struct cvmx_pko_reg_queue_mode_s cn38xx; - struct cvmx_pko_reg_queue_mode_s cn38xxp2; - struct cvmx_pko_reg_queue_mode_s cn50xx; - struct cvmx_pko_reg_queue_mode_s cn52xx; - struct cvmx_pko_reg_queue_mode_s cn52xxp1; - struct cvmx_pko_reg_queue_mode_s cn56xx; - struct cvmx_pko_reg_queue_mode_s cn56xxp1; - struct cvmx_pko_reg_queue_mode_s cn58xx; - struct cvmx_pko_reg_queue_mode_s cn58xxp1; - struct cvmx_pko_reg_queue_mode_s cn61xx; - struct cvmx_pko_reg_queue_mode_s cn63xx; - struct cvmx_pko_reg_queue_mode_s cn63xxp1; - struct cvmx_pko_reg_queue_mode_s cn66xx; - struct cvmx_pko_reg_queue_mode_s cn68xx; - struct cvmx_pko_reg_queue_mode_s cn68xxp1; - struct cvmx_pko_reg_queue_mode_s cnf71xx; }; union cvmx_pko_reg_queue_preempt { @@ -2713,17 +2144,6 @@ union cvmx_pko_reg_queue_preempt { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_pko_reg_queue_preempt_s cn52xx; - struct cvmx_pko_reg_queue_preempt_s cn52xxp1; - struct cvmx_pko_reg_queue_preempt_s cn56xx; - struct cvmx_pko_reg_queue_preempt_s cn56xxp1; - struct cvmx_pko_reg_queue_preempt_s cn61xx; - struct cvmx_pko_reg_queue_preempt_s cn63xx; - struct cvmx_pko_reg_queue_preempt_s cn63xxp1; - struct cvmx_pko_reg_queue_preempt_s cn66xx; - struct cvmx_pko_reg_queue_preempt_s cn68xx; - struct cvmx_pko_reg_queue_preempt_s cn68xxp1; - struct cvmx_pko_reg_queue_preempt_s cnf71xx; }; union cvmx_pko_reg_queue_ptrs1 { @@ -2739,18 +2159,6 @@ union cvmx_pko_reg_queue_ptrs1 { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_pko_reg_queue_ptrs1_s cn50xx; - struct cvmx_pko_reg_queue_ptrs1_s cn52xx; - struct cvmx_pko_reg_queue_ptrs1_s cn52xxp1; - struct cvmx_pko_reg_queue_ptrs1_s cn56xx; - struct cvmx_pko_reg_queue_ptrs1_s cn56xxp1; - struct cvmx_pko_reg_queue_ptrs1_s cn58xx; - struct cvmx_pko_reg_queue_ptrs1_s cn58xxp1; - struct cvmx_pko_reg_queue_ptrs1_s cn61xx; - struct cvmx_pko_reg_queue_ptrs1_s cn63xx; - struct cvmx_pko_reg_queue_ptrs1_s cn63xxp1; - struct cvmx_pko_reg_queue_ptrs1_s cn66xx; - struct cvmx_pko_reg_queue_ptrs1_s cnf71xx; }; union cvmx_pko_reg_read_idx { @@ -2766,24 +2174,6 @@ union cvmx_pko_reg_read_idx { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_pko_reg_read_idx_s cn30xx; - struct cvmx_pko_reg_read_idx_s cn31xx; - struct cvmx_pko_reg_read_idx_s cn38xx; - struct cvmx_pko_reg_read_idx_s cn38xxp2; - struct cvmx_pko_reg_read_idx_s cn50xx; - struct cvmx_pko_reg_read_idx_s cn52xx; - struct cvmx_pko_reg_read_idx_s cn52xxp1; - struct cvmx_pko_reg_read_idx_s cn56xx; - struct cvmx_pko_reg_read_idx_s cn56xxp1; - struct cvmx_pko_reg_read_idx_s cn58xx; - struct cvmx_pko_reg_read_idx_s cn58xxp1; - struct cvmx_pko_reg_read_idx_s cn61xx; - struct cvmx_pko_reg_read_idx_s cn63xx; - struct cvmx_pko_reg_read_idx_s cn63xxp1; - struct cvmx_pko_reg_read_idx_s cn66xx; - struct cvmx_pko_reg_read_idx_s cn68xx; - struct cvmx_pko_reg_read_idx_s cn68xxp1; - struct cvmx_pko_reg_read_idx_s cnf71xx; }; union cvmx_pko_reg_throttle { @@ -2797,8 +2187,6 @@ union cvmx_pko_reg_throttle { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_pko_reg_throttle_s cn68xx; - struct cvmx_pko_reg_throttle_s cn68xxp1; }; union cvmx_pko_reg_timestamp { @@ -2812,13 +2200,6 @@ union cvmx_pko_reg_timestamp { uint64_t reserved_4_63:60; #endif } s; - struct cvmx_pko_reg_timestamp_s cn61xx; - struct cvmx_pko_reg_timestamp_s cn63xx; - struct cvmx_pko_reg_timestamp_s cn63xxp1; - struct cvmx_pko_reg_timestamp_s cn66xx; - struct cvmx_pko_reg_timestamp_s cn68xx; - struct cvmx_pko_reg_timestamp_s cn68xxp1; - struct cvmx_pko_reg_timestamp_s cnf71xx; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-pko.h b/arch/mips/include/asm/octeon/cvmx-pko.h index 5f47f76ed510..20eb9c46a75a 100644 --- a/arch/mips/include/asm/octeon/cvmx-pko.h +++ b/arch/mips/include/asm/octeon/cvmx-pko.h @@ -611,7 +611,7 @@ static inline void cvmx_pko_get_port_status(uint64_t port_num, uint64_t clear, pko_reg_read_idx.s.index = cvmx_pko_get_base_queue(port_num); cvmx_write_csr(CVMX_PKO_REG_READ_IDX, pko_reg_read_idx.u64); debug8.u64 = cvmx_read_csr(CVMX_PKO_MEM_DEBUG8); - status->doorbell = debug8.cn58xx.doorbell; + status->doorbell = debug8.cn50xx.doorbell; } } diff --git a/arch/mips/include/asm/octeon/cvmx-pow-defs.h b/arch/mips/include/asm/octeon/cvmx-pow-defs.h index 6a3db4b068ff..474dd544314b 100644 --- a/arch/mips/include/asm/octeon/cvmx-pow-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-pow-defs.h @@ -160,8 +160,6 @@ union cvmx_pow_bist_stat { uint64_t reserved_32_63:32; #endif } cn38xx; - struct cvmx_pow_bist_stat_cn38xx cn38xxp2; - struct cvmx_pow_bist_stat_cn31xx cn50xx; struct cvmx_pow_bist_stat_cn52xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_20_63:44; @@ -191,7 +189,6 @@ union cvmx_pow_bist_stat { uint64_t reserved_20_63:44; #endif } cn52xx; - struct cvmx_pow_bist_stat_cn52xx cn52xxp1; struct cvmx_pow_bist_stat_cn56xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_28_63:36; @@ -223,9 +220,6 @@ union cvmx_pow_bist_stat { uint64_t reserved_28_63:36; #endif } cn56xx; - struct cvmx_pow_bist_stat_cn56xx cn56xxp1; - struct cvmx_pow_bist_stat_cn38xx cn58xx; - struct cvmx_pow_bist_stat_cn38xx cn58xxp1; struct cvmx_pow_bist_stat_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_20_63:44; @@ -276,7 +270,6 @@ union cvmx_pow_bist_stat { uint64_t reserved_22_63:42; #endif } cn63xx; - struct cvmx_pow_bist_stat_cn63xx cn63xxp1; struct cvmx_pow_bist_stat_cn66xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_26_63:38; @@ -302,7 +295,6 @@ union cvmx_pow_bist_stat { uint64_t reserved_26_63:38; #endif } cn66xx; - struct cvmx_pow_bist_stat_cn61xx cnf71xx; }; union cvmx_pow_ds_pc { @@ -316,22 +308,6 @@ union cvmx_pow_ds_pc { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_pow_ds_pc_s cn30xx; - struct cvmx_pow_ds_pc_s cn31xx; - struct cvmx_pow_ds_pc_s cn38xx; - struct cvmx_pow_ds_pc_s cn38xxp2; - struct cvmx_pow_ds_pc_s cn50xx; - struct cvmx_pow_ds_pc_s cn52xx; - struct cvmx_pow_ds_pc_s cn52xxp1; - struct cvmx_pow_ds_pc_s cn56xx; - struct cvmx_pow_ds_pc_s cn56xxp1; - struct cvmx_pow_ds_pc_s cn58xx; - struct cvmx_pow_ds_pc_s cn58xxp1; - struct cvmx_pow_ds_pc_s cn61xx; - struct cvmx_pow_ds_pc_s cn63xx; - struct cvmx_pow_ds_pc_s cn63xxp1; - struct cvmx_pow_ds_pc_s cn66xx; - struct cvmx_pow_ds_pc_s cnf71xx; }; union cvmx_pow_ecc_err { @@ -367,7 +343,6 @@ union cvmx_pow_ecc_err { uint64_t reserved_45_63:19; #endif } s; - struct cvmx_pow_ecc_err_s cn30xx; struct cvmx_pow_ecc_err_cn31xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_14_63:50; @@ -391,20 +366,6 @@ union cvmx_pow_ecc_err { uint64_t reserved_14_63:50; #endif } cn31xx; - struct cvmx_pow_ecc_err_s cn38xx; - struct cvmx_pow_ecc_err_cn31xx cn38xxp2; - struct cvmx_pow_ecc_err_s cn50xx; - struct cvmx_pow_ecc_err_s cn52xx; - struct cvmx_pow_ecc_err_s cn52xxp1; - struct cvmx_pow_ecc_err_s cn56xx; - struct cvmx_pow_ecc_err_s cn56xxp1; - struct cvmx_pow_ecc_err_s cn58xx; - struct cvmx_pow_ecc_err_s cn58xxp1; - struct cvmx_pow_ecc_err_s cn61xx; - struct cvmx_pow_ecc_err_s cn63xx; - struct cvmx_pow_ecc_err_s cn63xxp1; - struct cvmx_pow_ecc_err_s cn66xx; - struct cvmx_pow_ecc_err_s cnf71xx; }; union cvmx_pow_int_ctl { @@ -420,22 +381,6 @@ union cvmx_pow_int_ctl { uint64_t reserved_6_63:58; #endif } s; - struct cvmx_pow_int_ctl_s cn30xx; - struct cvmx_pow_int_ctl_s cn31xx; - struct cvmx_pow_int_ctl_s cn38xx; - struct cvmx_pow_int_ctl_s cn38xxp2; - struct cvmx_pow_int_ctl_s cn50xx; - struct cvmx_pow_int_ctl_s cn52xx; - struct cvmx_pow_int_ctl_s cn52xxp1; - struct cvmx_pow_int_ctl_s cn56xx; - struct cvmx_pow_int_ctl_s cn56xxp1; - struct cvmx_pow_int_ctl_s cn58xx; - struct cvmx_pow_int_ctl_s cn58xxp1; - struct cvmx_pow_int_ctl_s cn61xx; - struct cvmx_pow_int_ctl_s cn63xx; - struct cvmx_pow_int_ctl_s cn63xxp1; - struct cvmx_pow_int_ctl_s cn66xx; - struct cvmx_pow_int_ctl_s cnf71xx; }; union cvmx_pow_iq_cntx { @@ -449,22 +394,6 @@ union cvmx_pow_iq_cntx { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_pow_iq_cntx_s cn30xx; - struct cvmx_pow_iq_cntx_s cn31xx; - struct cvmx_pow_iq_cntx_s cn38xx; - struct cvmx_pow_iq_cntx_s cn38xxp2; - struct cvmx_pow_iq_cntx_s cn50xx; - struct cvmx_pow_iq_cntx_s cn52xx; - struct cvmx_pow_iq_cntx_s cn52xxp1; - struct cvmx_pow_iq_cntx_s cn56xx; - struct cvmx_pow_iq_cntx_s cn56xxp1; - struct cvmx_pow_iq_cntx_s cn58xx; - struct cvmx_pow_iq_cntx_s cn58xxp1; - struct cvmx_pow_iq_cntx_s cn61xx; - struct cvmx_pow_iq_cntx_s cn63xx; - struct cvmx_pow_iq_cntx_s cn63xxp1; - struct cvmx_pow_iq_cntx_s cn66xx; - struct cvmx_pow_iq_cntx_s cnf71xx; }; union cvmx_pow_iq_com_cnt { @@ -478,22 +407,6 @@ union cvmx_pow_iq_com_cnt { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_pow_iq_com_cnt_s cn30xx; - struct cvmx_pow_iq_com_cnt_s cn31xx; - struct cvmx_pow_iq_com_cnt_s cn38xx; - struct cvmx_pow_iq_com_cnt_s cn38xxp2; - struct cvmx_pow_iq_com_cnt_s cn50xx; - struct cvmx_pow_iq_com_cnt_s cn52xx; - struct cvmx_pow_iq_com_cnt_s cn52xxp1; - struct cvmx_pow_iq_com_cnt_s cn56xx; - struct cvmx_pow_iq_com_cnt_s cn56xxp1; - struct cvmx_pow_iq_com_cnt_s cn58xx; - struct cvmx_pow_iq_com_cnt_s cn58xxp1; - struct cvmx_pow_iq_com_cnt_s cn61xx; - struct cvmx_pow_iq_com_cnt_s cn63xx; - struct cvmx_pow_iq_com_cnt_s cn63xxp1; - struct cvmx_pow_iq_com_cnt_s cn66xx; - struct cvmx_pow_iq_com_cnt_s cnf71xx; }; union cvmx_pow_iq_int { @@ -507,15 +420,6 @@ union cvmx_pow_iq_int { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_pow_iq_int_s cn52xx; - struct cvmx_pow_iq_int_s cn52xxp1; - struct cvmx_pow_iq_int_s cn56xx; - struct cvmx_pow_iq_int_s cn56xxp1; - struct cvmx_pow_iq_int_s cn61xx; - struct cvmx_pow_iq_int_s cn63xx; - struct cvmx_pow_iq_int_s cn63xxp1; - struct cvmx_pow_iq_int_s cn66xx; - struct cvmx_pow_iq_int_s cnf71xx; }; union cvmx_pow_iq_int_en { @@ -529,15 +433,6 @@ union cvmx_pow_iq_int_en { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_pow_iq_int_en_s cn52xx; - struct cvmx_pow_iq_int_en_s cn52xxp1; - struct cvmx_pow_iq_int_en_s cn56xx; - struct cvmx_pow_iq_int_en_s cn56xxp1; - struct cvmx_pow_iq_int_en_s cn61xx; - struct cvmx_pow_iq_int_en_s cn63xx; - struct cvmx_pow_iq_int_en_s cn63xxp1; - struct cvmx_pow_iq_int_en_s cn66xx; - struct cvmx_pow_iq_int_en_s cnf71xx; }; union cvmx_pow_iq_thrx { @@ -551,15 +446,6 @@ union cvmx_pow_iq_thrx { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_pow_iq_thrx_s cn52xx; - struct cvmx_pow_iq_thrx_s cn52xxp1; - struct cvmx_pow_iq_thrx_s cn56xx; - struct cvmx_pow_iq_thrx_s cn56xxp1; - struct cvmx_pow_iq_thrx_s cn61xx; - struct cvmx_pow_iq_thrx_s cn63xx; - struct cvmx_pow_iq_thrx_s cn63xxp1; - struct cvmx_pow_iq_thrx_s cn66xx; - struct cvmx_pow_iq_thrx_s cnf71xx; }; union cvmx_pow_nos_cnt { @@ -591,9 +477,6 @@ union cvmx_pow_nos_cnt { uint64_t reserved_9_63:55; #endif } cn31xx; - struct cvmx_pow_nos_cnt_s cn38xx; - struct cvmx_pow_nos_cnt_s cn38xxp2; - struct cvmx_pow_nos_cnt_cn31xx cn50xx; struct cvmx_pow_nos_cnt_cn52xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_10_63:54; @@ -603,12 +486,6 @@ union cvmx_pow_nos_cnt { uint64_t reserved_10_63:54; #endif } cn52xx; - struct cvmx_pow_nos_cnt_cn52xx cn52xxp1; - struct cvmx_pow_nos_cnt_s cn56xx; - struct cvmx_pow_nos_cnt_s cn56xxp1; - struct cvmx_pow_nos_cnt_s cn58xx; - struct cvmx_pow_nos_cnt_s cn58xxp1; - struct cvmx_pow_nos_cnt_cn52xx cn61xx; struct cvmx_pow_nos_cnt_cn63xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_11_63:53; @@ -618,9 +495,6 @@ union cvmx_pow_nos_cnt { uint64_t reserved_11_63:53; #endif } cn63xx; - struct cvmx_pow_nos_cnt_cn63xx cn63xxp1; - struct cvmx_pow_nos_cnt_cn63xx cn66xx; - struct cvmx_pow_nos_cnt_cn52xx cnf71xx; }; union cvmx_pow_nw_tim { @@ -634,22 +508,6 @@ union cvmx_pow_nw_tim { uint64_t reserved_10_63:54; #endif } s; - struct cvmx_pow_nw_tim_s cn30xx; - struct cvmx_pow_nw_tim_s cn31xx; - struct cvmx_pow_nw_tim_s cn38xx; - struct cvmx_pow_nw_tim_s cn38xxp2; - struct cvmx_pow_nw_tim_s cn50xx; - struct cvmx_pow_nw_tim_s cn52xx; - struct cvmx_pow_nw_tim_s cn52xxp1; - struct cvmx_pow_nw_tim_s cn56xx; - struct cvmx_pow_nw_tim_s cn56xxp1; - struct cvmx_pow_nw_tim_s cn58xx; - struct cvmx_pow_nw_tim_s cn58xxp1; - struct cvmx_pow_nw_tim_s cn61xx; - struct cvmx_pow_nw_tim_s cn63xx; - struct cvmx_pow_nw_tim_s cn63xxp1; - struct cvmx_pow_nw_tim_s cn66xx; - struct cvmx_pow_nw_tim_s cnf71xx; }; union cvmx_pow_pf_rst_msk { @@ -663,18 +521,6 @@ union cvmx_pow_pf_rst_msk { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_pow_pf_rst_msk_s cn50xx; - struct cvmx_pow_pf_rst_msk_s cn52xx; - struct cvmx_pow_pf_rst_msk_s cn52xxp1; - struct cvmx_pow_pf_rst_msk_s cn56xx; - struct cvmx_pow_pf_rst_msk_s cn56xxp1; - struct cvmx_pow_pf_rst_msk_s cn58xx; - struct cvmx_pow_pf_rst_msk_s cn58xxp1; - struct cvmx_pow_pf_rst_msk_s cn61xx; - struct cvmx_pow_pf_rst_msk_s cn63xx; - struct cvmx_pow_pf_rst_msk_s cn63xxp1; - struct cvmx_pow_pf_rst_msk_s cn66xx; - struct cvmx_pow_pf_rst_msk_s cnf71xx; }; union cvmx_pow_pp_grp_mskx { @@ -713,21 +559,6 @@ union cvmx_pow_pp_grp_mskx { uint64_t reserved_16_63:48; #endif } cn30xx; - struct cvmx_pow_pp_grp_mskx_cn30xx cn31xx; - struct cvmx_pow_pp_grp_mskx_cn30xx cn38xx; - struct cvmx_pow_pp_grp_mskx_cn30xx cn38xxp2; - struct cvmx_pow_pp_grp_mskx_s cn50xx; - struct cvmx_pow_pp_grp_mskx_s cn52xx; - struct cvmx_pow_pp_grp_mskx_s cn52xxp1; - struct cvmx_pow_pp_grp_mskx_s cn56xx; - struct cvmx_pow_pp_grp_mskx_s cn56xxp1; - struct cvmx_pow_pp_grp_mskx_s cn58xx; - struct cvmx_pow_pp_grp_mskx_s cn58xxp1; - struct cvmx_pow_pp_grp_mskx_s cn61xx; - struct cvmx_pow_pp_grp_mskx_s cn63xx; - struct cvmx_pow_pp_grp_mskx_s cn63xxp1; - struct cvmx_pow_pp_grp_mskx_s cn66xx; - struct cvmx_pow_pp_grp_mskx_s cnf71xx; }; union cvmx_pow_qos_rndx { @@ -747,22 +578,6 @@ union cvmx_pow_qos_rndx { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_pow_qos_rndx_s cn30xx; - struct cvmx_pow_qos_rndx_s cn31xx; - struct cvmx_pow_qos_rndx_s cn38xx; - struct cvmx_pow_qos_rndx_s cn38xxp2; - struct cvmx_pow_qos_rndx_s cn50xx; - struct cvmx_pow_qos_rndx_s cn52xx; - struct cvmx_pow_qos_rndx_s cn52xxp1; - struct cvmx_pow_qos_rndx_s cn56xx; - struct cvmx_pow_qos_rndx_s cn56xxp1; - struct cvmx_pow_qos_rndx_s cn58xx; - struct cvmx_pow_qos_rndx_s cn58xxp1; - struct cvmx_pow_qos_rndx_s cn61xx; - struct cvmx_pow_qos_rndx_s cn63xx; - struct cvmx_pow_qos_rndx_s cn63xxp1; - struct cvmx_pow_qos_rndx_s cn66xx; - struct cvmx_pow_qos_rndx_s cnf71xx; }; union cvmx_pow_qos_thrx { @@ -838,9 +653,6 @@ union cvmx_pow_qos_thrx { uint64_t reserved_57_63:7; #endif } cn31xx; - struct cvmx_pow_qos_thrx_s cn38xx; - struct cvmx_pow_qos_thrx_s cn38xxp2; - struct cvmx_pow_qos_thrx_cn31xx cn50xx; struct cvmx_pow_qos_thrx_cn52xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_58_63:6; @@ -866,12 +678,6 @@ union cvmx_pow_qos_thrx { uint64_t reserved_58_63:6; #endif } cn52xx; - struct cvmx_pow_qos_thrx_cn52xx cn52xxp1; - struct cvmx_pow_qos_thrx_s cn56xx; - struct cvmx_pow_qos_thrx_s cn56xxp1; - struct cvmx_pow_qos_thrx_s cn58xx; - struct cvmx_pow_qos_thrx_s cn58xxp1; - struct cvmx_pow_qos_thrx_cn52xx cn61xx; struct cvmx_pow_qos_thrx_cn63xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_59_63:5; @@ -897,9 +703,6 @@ union cvmx_pow_qos_thrx { uint64_t reserved_59_63:5; #endif } cn63xx; - struct cvmx_pow_qos_thrx_cn63xx cn63xxp1; - struct cvmx_pow_qos_thrx_cn63xx cn66xx; - struct cvmx_pow_qos_thrx_cn52xx cnf71xx; }; union cvmx_pow_ts_pc { @@ -913,22 +716,6 @@ union cvmx_pow_ts_pc { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_pow_ts_pc_s cn30xx; - struct cvmx_pow_ts_pc_s cn31xx; - struct cvmx_pow_ts_pc_s cn38xx; - struct cvmx_pow_ts_pc_s cn38xxp2; - struct cvmx_pow_ts_pc_s cn50xx; - struct cvmx_pow_ts_pc_s cn52xx; - struct cvmx_pow_ts_pc_s cn52xxp1; - struct cvmx_pow_ts_pc_s cn56xx; - struct cvmx_pow_ts_pc_s cn56xxp1; - struct cvmx_pow_ts_pc_s cn58xx; - struct cvmx_pow_ts_pc_s cn58xxp1; - struct cvmx_pow_ts_pc_s cn61xx; - struct cvmx_pow_ts_pc_s cn63xx; - struct cvmx_pow_ts_pc_s cn63xxp1; - struct cvmx_pow_ts_pc_s cn66xx; - struct cvmx_pow_ts_pc_s cnf71xx; }; union cvmx_pow_wa_com_pc { @@ -942,22 +729,6 @@ union cvmx_pow_wa_com_pc { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_pow_wa_com_pc_s cn30xx; - struct cvmx_pow_wa_com_pc_s cn31xx; - struct cvmx_pow_wa_com_pc_s cn38xx; - struct cvmx_pow_wa_com_pc_s cn38xxp2; - struct cvmx_pow_wa_com_pc_s cn50xx; - struct cvmx_pow_wa_com_pc_s cn52xx; - struct cvmx_pow_wa_com_pc_s cn52xxp1; - struct cvmx_pow_wa_com_pc_s cn56xx; - struct cvmx_pow_wa_com_pc_s cn56xxp1; - struct cvmx_pow_wa_com_pc_s cn58xx; - struct cvmx_pow_wa_com_pc_s cn58xxp1; - struct cvmx_pow_wa_com_pc_s cn61xx; - struct cvmx_pow_wa_com_pc_s cn63xx; - struct cvmx_pow_wa_com_pc_s cn63xxp1; - struct cvmx_pow_wa_com_pc_s cn66xx; - struct cvmx_pow_wa_com_pc_s cnf71xx; }; union cvmx_pow_wa_pcx { @@ -971,22 +742,6 @@ union cvmx_pow_wa_pcx { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_pow_wa_pcx_s cn30xx; - struct cvmx_pow_wa_pcx_s cn31xx; - struct cvmx_pow_wa_pcx_s cn38xx; - struct cvmx_pow_wa_pcx_s cn38xxp2; - struct cvmx_pow_wa_pcx_s cn50xx; - struct cvmx_pow_wa_pcx_s cn52xx; - struct cvmx_pow_wa_pcx_s cn52xxp1; - struct cvmx_pow_wa_pcx_s cn56xx; - struct cvmx_pow_wa_pcx_s cn56xxp1; - struct cvmx_pow_wa_pcx_s cn58xx; - struct cvmx_pow_wa_pcx_s cn58xxp1; - struct cvmx_pow_wa_pcx_s cn61xx; - struct cvmx_pow_wa_pcx_s cn63xx; - struct cvmx_pow_wa_pcx_s cn63xxp1; - struct cvmx_pow_wa_pcx_s cn66xx; - struct cvmx_pow_wa_pcx_s cnf71xx; }; union cvmx_pow_wq_int { @@ -1002,22 +757,6 @@ union cvmx_pow_wq_int { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_pow_wq_int_s cn30xx; - struct cvmx_pow_wq_int_s cn31xx; - struct cvmx_pow_wq_int_s cn38xx; - struct cvmx_pow_wq_int_s cn38xxp2; - struct cvmx_pow_wq_int_s cn50xx; - struct cvmx_pow_wq_int_s cn52xx; - struct cvmx_pow_wq_int_s cn52xxp1; - struct cvmx_pow_wq_int_s cn56xx; - struct cvmx_pow_wq_int_s cn56xxp1; - struct cvmx_pow_wq_int_s cn58xx; - struct cvmx_pow_wq_int_s cn58xxp1; - struct cvmx_pow_wq_int_s cn61xx; - struct cvmx_pow_wq_int_s cn63xx; - struct cvmx_pow_wq_int_s cn63xxp1; - struct cvmx_pow_wq_int_s cn66xx; - struct cvmx_pow_wq_int_s cnf71xx; }; union cvmx_pow_wq_int_cntx { @@ -1069,9 +808,6 @@ union cvmx_pow_wq_int_cntx { uint64_t reserved_28_63:36; #endif } cn31xx; - struct cvmx_pow_wq_int_cntx_s cn38xx; - struct cvmx_pow_wq_int_cntx_s cn38xxp2; - struct cvmx_pow_wq_int_cntx_cn31xx cn50xx; struct cvmx_pow_wq_int_cntx_cn52xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_28_63:36; @@ -1089,12 +825,6 @@ union cvmx_pow_wq_int_cntx { uint64_t reserved_28_63:36; #endif } cn52xx; - struct cvmx_pow_wq_int_cntx_cn52xx cn52xxp1; - struct cvmx_pow_wq_int_cntx_s cn56xx; - struct cvmx_pow_wq_int_cntx_s cn56xxp1; - struct cvmx_pow_wq_int_cntx_s cn58xx; - struct cvmx_pow_wq_int_cntx_s cn58xxp1; - struct cvmx_pow_wq_int_cntx_cn52xx cn61xx; struct cvmx_pow_wq_int_cntx_cn63xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_28_63:36; @@ -1112,9 +842,6 @@ union cvmx_pow_wq_int_cntx { uint64_t reserved_28_63:36; #endif } cn63xx; - struct cvmx_pow_wq_int_cntx_cn63xx cn63xxp1; - struct cvmx_pow_wq_int_cntx_cn63xx cn66xx; - struct cvmx_pow_wq_int_cntx_cn52xx cnf71xx; }; union cvmx_pow_wq_int_pc { @@ -1134,22 +861,6 @@ union cvmx_pow_wq_int_pc { uint64_t reserved_60_63:4; #endif } s; - struct cvmx_pow_wq_int_pc_s cn30xx; - struct cvmx_pow_wq_int_pc_s cn31xx; - struct cvmx_pow_wq_int_pc_s cn38xx; - struct cvmx_pow_wq_int_pc_s cn38xxp2; - struct cvmx_pow_wq_int_pc_s cn50xx; - struct cvmx_pow_wq_int_pc_s cn52xx; - struct cvmx_pow_wq_int_pc_s cn52xxp1; - struct cvmx_pow_wq_int_pc_s cn56xx; - struct cvmx_pow_wq_int_pc_s cn56xxp1; - struct cvmx_pow_wq_int_pc_s cn58xx; - struct cvmx_pow_wq_int_pc_s cn58xxp1; - struct cvmx_pow_wq_int_pc_s cn61xx; - struct cvmx_pow_wq_int_pc_s cn63xx; - struct cvmx_pow_wq_int_pc_s cn63xxp1; - struct cvmx_pow_wq_int_pc_s cn66xx; - struct cvmx_pow_wq_int_pc_s cnf71xx; }; union cvmx_pow_wq_int_thrx { @@ -1211,9 +922,6 @@ union cvmx_pow_wq_int_thrx { uint64_t reserved_29_63:35; #endif } cn31xx; - struct cvmx_pow_wq_int_thrx_s cn38xx; - struct cvmx_pow_wq_int_thrx_s cn38xxp2; - struct cvmx_pow_wq_int_thrx_cn31xx cn50xx; struct cvmx_pow_wq_int_thrx_cn52xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_29_63:35; @@ -1233,12 +941,6 @@ union cvmx_pow_wq_int_thrx { uint64_t reserved_29_63:35; #endif } cn52xx; - struct cvmx_pow_wq_int_thrx_cn52xx cn52xxp1; - struct cvmx_pow_wq_int_thrx_s cn56xx; - struct cvmx_pow_wq_int_thrx_s cn56xxp1; - struct cvmx_pow_wq_int_thrx_s cn58xx; - struct cvmx_pow_wq_int_thrx_s cn58xxp1; - struct cvmx_pow_wq_int_thrx_cn52xx cn61xx; struct cvmx_pow_wq_int_thrx_cn63xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_29_63:35; @@ -1258,9 +960,6 @@ union cvmx_pow_wq_int_thrx { uint64_t reserved_29_63:35; #endif } cn63xx; - struct cvmx_pow_wq_int_thrx_cn63xx cn63xxp1; - struct cvmx_pow_wq_int_thrx_cn63xx cn66xx; - struct cvmx_pow_wq_int_thrx_cn52xx cnf71xx; }; union cvmx_pow_ws_pcx { @@ -1274,22 +973,6 @@ union cvmx_pow_ws_pcx { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_pow_ws_pcx_s cn30xx; - struct cvmx_pow_ws_pcx_s cn31xx; - struct cvmx_pow_ws_pcx_s cn38xx; - struct cvmx_pow_ws_pcx_s cn38xxp2; - struct cvmx_pow_ws_pcx_s cn50xx; - struct cvmx_pow_ws_pcx_s cn52xx; - struct cvmx_pow_ws_pcx_s cn52xxp1; - struct cvmx_pow_ws_pcx_s cn56xx; - struct cvmx_pow_ws_pcx_s cn56xxp1; - struct cvmx_pow_ws_pcx_s cn58xx; - struct cvmx_pow_ws_pcx_s cn58xxp1; - struct cvmx_pow_ws_pcx_s cn61xx; - struct cvmx_pow_ws_pcx_s cn63xx; - struct cvmx_pow_ws_pcx_s cn63xxp1; - struct cvmx_pow_ws_pcx_s cn66xx; - struct cvmx_pow_ws_pcx_s cnf71xx; }; union cvmx_sso_wq_int_thrx { diff --git a/arch/mips/include/asm/octeon/cvmx-rnm-defs.h b/arch/mips/include/asm/octeon/cvmx-rnm-defs.h index 87d6f92a548a..94295d2fe22e 100644 --- a/arch/mips/include/asm/octeon/cvmx-rnm-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-rnm-defs.h @@ -47,24 +47,6 @@ union cvmx_rnm_bist_status { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_rnm_bist_status_s cn30xx; - struct cvmx_rnm_bist_status_s cn31xx; - struct cvmx_rnm_bist_status_s cn38xx; - struct cvmx_rnm_bist_status_s cn38xxp2; - struct cvmx_rnm_bist_status_s cn50xx; - struct cvmx_rnm_bist_status_s cn52xx; - struct cvmx_rnm_bist_status_s cn52xxp1; - struct cvmx_rnm_bist_status_s cn56xx; - struct cvmx_rnm_bist_status_s cn56xxp1; - struct cvmx_rnm_bist_status_s cn58xx; - struct cvmx_rnm_bist_status_s cn58xxp1; - struct cvmx_rnm_bist_status_s cn61xx; - struct cvmx_rnm_bist_status_s cn63xx; - struct cvmx_rnm_bist_status_s cn63xxp1; - struct cvmx_rnm_bist_status_s cn66xx; - struct cvmx_rnm_bist_status_s cn68xx; - struct cvmx_rnm_bist_status_s cn68xxp1; - struct cvmx_rnm_bist_status_s cnf71xx; }; union cvmx_rnm_ctl_status { @@ -109,9 +91,6 @@ union cvmx_rnm_ctl_status { uint64_t reserved_4_63:60; #endif } cn30xx; - struct cvmx_rnm_ctl_status_cn30xx cn31xx; - struct cvmx_rnm_ctl_status_cn30xx cn38xx; - struct cvmx_rnm_ctl_status_cn30xx cn38xxp2; struct cvmx_rnm_ctl_status_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_9_63:55; @@ -131,13 +110,6 @@ union cvmx_rnm_ctl_status { uint64_t reserved_9_63:55; #endif } cn50xx; - struct cvmx_rnm_ctl_status_cn50xx cn52xx; - struct cvmx_rnm_ctl_status_cn50xx cn52xxp1; - struct cvmx_rnm_ctl_status_cn50xx cn56xx; - struct cvmx_rnm_ctl_status_cn50xx cn56xxp1; - struct cvmx_rnm_ctl_status_cn50xx cn58xx; - struct cvmx_rnm_ctl_status_cn50xx cn58xxp1; - struct cvmx_rnm_ctl_status_s cn61xx; struct cvmx_rnm_ctl_status_cn63xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_11_63:53; @@ -161,11 +133,6 @@ union cvmx_rnm_ctl_status { uint64_t reserved_11_63:53; #endif } cn63xx; - struct cvmx_rnm_ctl_status_cn63xx cn63xxp1; - struct cvmx_rnm_ctl_status_s cn66xx; - struct cvmx_rnm_ctl_status_cn63xx cn68xx; - struct cvmx_rnm_ctl_status_cn63xx cn68xxp1; - struct cvmx_rnm_ctl_status_s cnf71xx; }; union cvmx_rnm_eer_dbg { @@ -177,13 +144,6 @@ union cvmx_rnm_eer_dbg { uint64_t dat:64; #endif } s; - struct cvmx_rnm_eer_dbg_s cn61xx; - struct cvmx_rnm_eer_dbg_s cn63xx; - struct cvmx_rnm_eer_dbg_s cn63xxp1; - struct cvmx_rnm_eer_dbg_s cn66xx; - struct cvmx_rnm_eer_dbg_s cn68xx; - struct cvmx_rnm_eer_dbg_s cn68xxp1; - struct cvmx_rnm_eer_dbg_s cnf71xx; }; union cvmx_rnm_eer_key { @@ -195,13 +155,6 @@ union cvmx_rnm_eer_key { uint64_t key:64; #endif } s; - struct cvmx_rnm_eer_key_s cn61xx; - struct cvmx_rnm_eer_key_s cn63xx; - struct cvmx_rnm_eer_key_s cn63xxp1; - struct cvmx_rnm_eer_key_s cn66xx; - struct cvmx_rnm_eer_key_s cn68xx; - struct cvmx_rnm_eer_key_s cn68xxp1; - struct cvmx_rnm_eer_key_s cnf71xx; }; union cvmx_rnm_serial_num { @@ -213,12 +166,6 @@ union cvmx_rnm_serial_num { uint64_t dat:64; #endif } s; - struct cvmx_rnm_serial_num_s cn61xx; - struct cvmx_rnm_serial_num_s cn63xx; - struct cvmx_rnm_serial_num_s cn66xx; - struct cvmx_rnm_serial_num_s cn68xx; - struct cvmx_rnm_serial_num_s cn68xxp1; - struct cvmx_rnm_serial_num_s cnf71xx; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-rst-defs.h b/arch/mips/include/asm/octeon/cvmx-rst-defs.h index 0c9c3e74d4ae..accc9977d9cd 100644 --- a/arch/mips/include/asm/octeon/cvmx-rst-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-rst-defs.h @@ -80,9 +80,6 @@ union cvmx_rst_boot { uint64_t chipkill:1; #endif } s; - struct cvmx_rst_boot_s cn70xx; - struct cvmx_rst_boot_s cn70xxp1; - struct cvmx_rst_boot_s cn78xx; }; union cvmx_rst_cfg { @@ -102,9 +99,6 @@ union cvmx_rst_cfg { uint64_t bist_delay:58; #endif } s; - struct cvmx_rst_cfg_s cn70xx; - struct cvmx_rst_cfg_s cn70xxp1; - struct cvmx_rst_cfg_s cn78xx; }; union cvmx_rst_ckill { @@ -118,9 +112,6 @@ union cvmx_rst_ckill { uint64_t reserved_47_63:17; #endif } s; - struct cvmx_rst_ckill_s cn70xx; - struct cvmx_rst_ckill_s cn70xxp1; - struct cvmx_rst_ckill_s cn78xx; }; union cvmx_rst_ctlx { @@ -150,9 +141,6 @@ union cvmx_rst_ctlx { uint64_t reserved_10_63:54; #endif } s; - struct cvmx_rst_ctlx_s cn70xx; - struct cvmx_rst_ctlx_s cn70xxp1; - struct cvmx_rst_ctlx_s cn78xx; }; union cvmx_rst_delay { @@ -168,9 +156,6 @@ union cvmx_rst_delay { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_rst_delay_s cn70xx; - struct cvmx_rst_delay_s cn70xxp1; - struct cvmx_rst_delay_s cn78xx; }; union cvmx_rst_eco { @@ -184,7 +169,6 @@ union cvmx_rst_eco { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_rst_eco_s cn78xx; }; union cvmx_rst_int { @@ -215,8 +199,6 @@ union cvmx_rst_int { uint64_t reserved_11_63:53; #endif } cn70xx; - struct cvmx_rst_int_cn70xx cn70xxp1; - struct cvmx_rst_int_s cn78xx; }; union cvmx_rst_ocx { @@ -230,7 +212,6 @@ union cvmx_rst_ocx { uint64_t reserved_3_63:61; #endif } s; - struct cvmx_rst_ocx_s cn78xx; }; union cvmx_rst_power_dbg { @@ -244,7 +225,6 @@ union cvmx_rst_power_dbg { uint64_t reserved_3_63:61; #endif } s; - struct cvmx_rst_power_dbg_s cn78xx; }; union cvmx_rst_pp_power { @@ -267,8 +247,6 @@ union cvmx_rst_pp_power { uint64_t reserved_4_63:60; #endif } cn70xx; - struct cvmx_rst_pp_power_cn70xx cn70xxp1; - struct cvmx_rst_pp_power_s cn78xx; }; union cvmx_rst_soft_prstx { @@ -282,9 +260,6 @@ union cvmx_rst_soft_prstx { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_rst_soft_prstx_s cn70xx; - struct cvmx_rst_soft_prstx_s cn70xxp1; - struct cvmx_rst_soft_prstx_s cn78xx; }; union cvmx_rst_soft_rst { @@ -298,9 +273,6 @@ union cvmx_rst_soft_rst { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_rst_soft_rst_s cn70xx; - struct cvmx_rst_soft_rst_s cn70xxp1; - struct cvmx_rst_soft_rst_s cn78xx; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-smix-defs.h b/arch/mips/include/asm/octeon/cvmx-smix-defs.h index 8a278e6ddba9..7a928230b0c0 100644 --- a/arch/mips/include/asm/octeon/cvmx-smix-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-smix-defs.h @@ -186,23 +186,6 @@ union cvmx_smix_clk { uint64_t reserved_21_63:43; #endif } cn30xx; - struct cvmx_smix_clk_cn30xx cn31xx; - struct cvmx_smix_clk_cn30xx cn38xx; - struct cvmx_smix_clk_cn30xx cn38xxp2; - struct cvmx_smix_clk_s cn50xx; - struct cvmx_smix_clk_s cn52xx; - struct cvmx_smix_clk_s cn52xxp1; - struct cvmx_smix_clk_s cn56xx; - struct cvmx_smix_clk_s cn56xxp1; - struct cvmx_smix_clk_cn30xx cn58xx; - struct cvmx_smix_clk_cn30xx cn58xxp1; - struct cvmx_smix_clk_s cn61xx; - struct cvmx_smix_clk_s cn63xx; - struct cvmx_smix_clk_s cn63xxp1; - struct cvmx_smix_clk_s cn66xx; - struct cvmx_smix_clk_s cn68xx; - struct cvmx_smix_clk_s cn68xxp1; - struct cvmx_smix_clk_s cnf71xx; }; union cvmx_smix_cmd { @@ -241,23 +224,6 @@ union cvmx_smix_cmd { uint64_t reserved_17_63:47; #endif } cn30xx; - struct cvmx_smix_cmd_cn30xx cn31xx; - struct cvmx_smix_cmd_cn30xx cn38xx; - struct cvmx_smix_cmd_cn30xx cn38xxp2; - struct cvmx_smix_cmd_s cn50xx; - struct cvmx_smix_cmd_s cn52xx; - struct cvmx_smix_cmd_s cn52xxp1; - struct cvmx_smix_cmd_s cn56xx; - struct cvmx_smix_cmd_s cn56xxp1; - struct cvmx_smix_cmd_cn30xx cn58xx; - struct cvmx_smix_cmd_cn30xx cn58xxp1; - struct cvmx_smix_cmd_s cn61xx; - struct cvmx_smix_cmd_s cn63xx; - struct cvmx_smix_cmd_s cn63xxp1; - struct cvmx_smix_cmd_s cn66xx; - struct cvmx_smix_cmd_s cn68xx; - struct cvmx_smix_cmd_s cn68xxp1; - struct cvmx_smix_cmd_s cnf71xx; }; union cvmx_smix_en { @@ -271,24 +237,6 @@ union cvmx_smix_en { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_smix_en_s cn30xx; - struct cvmx_smix_en_s cn31xx; - struct cvmx_smix_en_s cn38xx; - struct cvmx_smix_en_s cn38xxp2; - struct cvmx_smix_en_s cn50xx; - struct cvmx_smix_en_s cn52xx; - struct cvmx_smix_en_s cn52xxp1; - struct cvmx_smix_en_s cn56xx; - struct cvmx_smix_en_s cn56xxp1; - struct cvmx_smix_en_s cn58xx; - struct cvmx_smix_en_s cn58xxp1; - struct cvmx_smix_en_s cn61xx; - struct cvmx_smix_en_s cn63xx; - struct cvmx_smix_en_s cn63xxp1; - struct cvmx_smix_en_s cn66xx; - struct cvmx_smix_en_s cn68xx; - struct cvmx_smix_en_s cn68xxp1; - struct cvmx_smix_en_s cnf71xx; }; union cvmx_smix_rd_dat { @@ -306,24 +254,6 @@ union cvmx_smix_rd_dat { uint64_t reserved_18_63:46; #endif } s; - struct cvmx_smix_rd_dat_s cn30xx; - struct cvmx_smix_rd_dat_s cn31xx; - struct cvmx_smix_rd_dat_s cn38xx; - struct cvmx_smix_rd_dat_s cn38xxp2; - struct cvmx_smix_rd_dat_s cn50xx; - struct cvmx_smix_rd_dat_s cn52xx; - struct cvmx_smix_rd_dat_s cn52xxp1; - struct cvmx_smix_rd_dat_s cn56xx; - struct cvmx_smix_rd_dat_s cn56xxp1; - struct cvmx_smix_rd_dat_s cn58xx; - struct cvmx_smix_rd_dat_s cn58xxp1; - struct cvmx_smix_rd_dat_s cn61xx; - struct cvmx_smix_rd_dat_s cn63xx; - struct cvmx_smix_rd_dat_s cn63xxp1; - struct cvmx_smix_rd_dat_s cn66xx; - struct cvmx_smix_rd_dat_s cn68xx; - struct cvmx_smix_rd_dat_s cn68xxp1; - struct cvmx_smix_rd_dat_s cnf71xx; }; union cvmx_smix_wr_dat { @@ -341,24 +271,6 @@ union cvmx_smix_wr_dat { uint64_t reserved_18_63:46; #endif } s; - struct cvmx_smix_wr_dat_s cn30xx; - struct cvmx_smix_wr_dat_s cn31xx; - struct cvmx_smix_wr_dat_s cn38xx; - struct cvmx_smix_wr_dat_s cn38xxp2; - struct cvmx_smix_wr_dat_s cn50xx; - struct cvmx_smix_wr_dat_s cn52xx; - struct cvmx_smix_wr_dat_s cn52xxp1; - struct cvmx_smix_wr_dat_s cn56xx; - struct cvmx_smix_wr_dat_s cn56xxp1; - struct cvmx_smix_wr_dat_s cn58xx; - struct cvmx_smix_wr_dat_s cn58xxp1; - struct cvmx_smix_wr_dat_s cn61xx; - struct cvmx_smix_wr_dat_s cn63xx; - struct cvmx_smix_wr_dat_s cn63xxp1; - struct cvmx_smix_wr_dat_s cn66xx; - struct cvmx_smix_wr_dat_s cn68xx; - struct cvmx_smix_wr_dat_s cn68xxp1; - struct cvmx_smix_wr_dat_s cnf71xx; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-spxx-defs.h b/arch/mips/include/asm/octeon/cvmx-spxx-defs.h index f4c4e8051160..8471ed2dea51 100644 --- a/arch/mips/include/asm/octeon/cvmx-spxx-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-spxx-defs.h @@ -58,10 +58,6 @@ union cvmx_spxx_bckprs_cnt { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_spxx_bckprs_cnt_s cn38xx; - struct cvmx_spxx_bckprs_cnt_s cn38xxp2; - struct cvmx_spxx_bckprs_cnt_s cn58xx; - struct cvmx_spxx_bckprs_cnt_s cn58xxp1; }; union cvmx_spxx_bist_stat { @@ -79,10 +75,6 @@ union cvmx_spxx_bist_stat { uint64_t reserved_3_63:61; #endif } s; - struct cvmx_spxx_bist_stat_s cn38xx; - struct cvmx_spxx_bist_stat_s cn38xxp2; - struct cvmx_spxx_bist_stat_s cn58xx; - struct cvmx_spxx_bist_stat_s cn58xxp1; }; union cvmx_spxx_clk_ctl { @@ -114,10 +106,6 @@ union cvmx_spxx_clk_ctl { uint64_t reserved_17_63:47; #endif } s; - struct cvmx_spxx_clk_ctl_s cn38xx; - struct cvmx_spxx_clk_ctl_s cn38xxp2; - struct cvmx_spxx_clk_ctl_s cn58xx; - struct cvmx_spxx_clk_ctl_s cn58xxp1; }; union cvmx_spxx_clk_stat { @@ -145,10 +133,6 @@ union cvmx_spxx_clk_stat { uint64_t reserved_11_63:53; #endif } s; - struct cvmx_spxx_clk_stat_s cn38xx; - struct cvmx_spxx_clk_stat_s cn38xxp2; - struct cvmx_spxx_clk_stat_s cn58xx; - struct cvmx_spxx_clk_stat_s cn58xxp1; }; union cvmx_spxx_dbg_deskew_ctl { @@ -190,10 +174,6 @@ union cvmx_spxx_dbg_deskew_ctl { uint64_t reserved_30_63:34; #endif } s; - struct cvmx_spxx_dbg_deskew_ctl_s cn38xx; - struct cvmx_spxx_dbg_deskew_ctl_s cn38xxp2; - struct cvmx_spxx_dbg_deskew_ctl_s cn58xx; - struct cvmx_spxx_dbg_deskew_ctl_s cn58xxp1; }; union cvmx_spxx_dbg_deskew_state { @@ -213,10 +193,6 @@ union cvmx_spxx_dbg_deskew_state { uint64_t reserved_9_63:55; #endif } s; - struct cvmx_spxx_dbg_deskew_state_s cn38xx; - struct cvmx_spxx_dbg_deskew_state_s cn38xxp2; - struct cvmx_spxx_dbg_deskew_state_s cn58xx; - struct cvmx_spxx_dbg_deskew_state_s cn58xxp1; }; union cvmx_spxx_drv_ctl { @@ -241,7 +217,6 @@ union cvmx_spxx_drv_ctl { uint64_t reserved_16_63:48; #endif } cn38xx; - struct cvmx_spxx_drv_ctl_cn38xx cn38xxp2; struct cvmx_spxx_drv_ctl_cn58xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_24_63:40; @@ -257,7 +232,6 @@ union cvmx_spxx_drv_ctl { uint64_t reserved_24_63:40; #endif } cn58xx; - struct cvmx_spxx_drv_ctl_cn58xx cn58xxp1; }; union cvmx_spxx_err_ctl { @@ -279,10 +253,6 @@ union cvmx_spxx_err_ctl { uint64_t reserved_9_63:55; #endif } s; - struct cvmx_spxx_err_ctl_s cn38xx; - struct cvmx_spxx_err_ctl_s cn38xxp2; - struct cvmx_spxx_err_ctl_s cn58xx; - struct cvmx_spxx_err_ctl_s cn58xxp1; }; union cvmx_spxx_int_dat { @@ -304,10 +274,6 @@ union cvmx_spxx_int_dat { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_spxx_int_dat_s cn38xx; - struct cvmx_spxx_int_dat_s cn38xxp2; - struct cvmx_spxx_int_dat_s cn58xx; - struct cvmx_spxx_int_dat_s cn58xxp1; }; union cvmx_spxx_int_msk { @@ -341,10 +307,6 @@ union cvmx_spxx_int_msk { uint64_t reserved_12_63:52; #endif } s; - struct cvmx_spxx_int_msk_s cn38xx; - struct cvmx_spxx_int_msk_s cn38xxp2; - struct cvmx_spxx_int_msk_s cn58xx; - struct cvmx_spxx_int_msk_s cn58xxp1; }; union cvmx_spxx_int_reg { @@ -382,10 +344,6 @@ union cvmx_spxx_int_reg { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_spxx_int_reg_s cn38xx; - struct cvmx_spxx_int_reg_s cn38xxp2; - struct cvmx_spxx_int_reg_s cn58xx; - struct cvmx_spxx_int_reg_s cn58xxp1; }; union cvmx_spxx_int_sync { @@ -419,10 +377,6 @@ union cvmx_spxx_int_sync { uint64_t reserved_12_63:52; #endif } s; - struct cvmx_spxx_int_sync_s cn38xx; - struct cvmx_spxx_int_sync_s cn38xxp2; - struct cvmx_spxx_int_sync_s cn58xx; - struct cvmx_spxx_int_sync_s cn58xxp1; }; union cvmx_spxx_tpa_acc { @@ -436,10 +390,6 @@ union cvmx_spxx_tpa_acc { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_spxx_tpa_acc_s cn38xx; - struct cvmx_spxx_tpa_acc_s cn38xxp2; - struct cvmx_spxx_tpa_acc_s cn58xx; - struct cvmx_spxx_tpa_acc_s cn58xxp1; }; union cvmx_spxx_tpa_max { @@ -453,10 +403,6 @@ union cvmx_spxx_tpa_max { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_spxx_tpa_max_s cn38xx; - struct cvmx_spxx_tpa_max_s cn38xxp2; - struct cvmx_spxx_tpa_max_s cn58xx; - struct cvmx_spxx_tpa_max_s cn58xxp1; }; union cvmx_spxx_tpa_sel { @@ -470,10 +416,6 @@ union cvmx_spxx_tpa_sel { uint64_t reserved_4_63:60; #endif } s; - struct cvmx_spxx_tpa_sel_s cn38xx; - struct cvmx_spxx_tpa_sel_s cn38xxp2; - struct cvmx_spxx_tpa_sel_s cn58xx; - struct cvmx_spxx_tpa_sel_s cn58xxp1; }; union cvmx_spxx_trn4_ctl { @@ -499,10 +441,6 @@ union cvmx_spxx_trn4_ctl { uint64_t reserved_13_63:51; #endif } s; - struct cvmx_spxx_trn4_ctl_s cn38xx; - struct cvmx_spxx_trn4_ctl_s cn38xxp2; - struct cvmx_spxx_trn4_ctl_s cn58xx; - struct cvmx_spxx_trn4_ctl_s cn58xxp1; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-sriox-defs.h b/arch/mips/include/asm/octeon/cvmx-sriox-defs.h index 5140f2d2ad1c..34d0fadb5eb3 100644 --- a/arch/mips/include/asm/octeon/cvmx-sriox-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-sriox-defs.h @@ -112,8 +112,6 @@ union cvmx_sriox_acc_ctrl { uint64_t reserved_3_63:61; #endif } cn63xx; - struct cvmx_sriox_acc_ctrl_cn63xx cn63xxp1; - struct cvmx_sriox_acc_ctrl_s cn66xx; }; union cvmx_sriox_asmbly_id { @@ -129,9 +127,6 @@ union cvmx_sriox_asmbly_id { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_sriox_asmbly_id_s cn63xx; - struct cvmx_sriox_asmbly_id_s cn63xxp1; - struct cvmx_sriox_asmbly_id_s cn66xx; }; union cvmx_sriox_asmbly_info { @@ -147,9 +142,6 @@ union cvmx_sriox_asmbly_info { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_sriox_asmbly_info_s cn63xx; - struct cvmx_sriox_asmbly_info_s cn63xxp1; - struct cvmx_sriox_asmbly_info_s cn66xx; }; union cvmx_sriox_bell_resp_ctrl { @@ -169,9 +161,6 @@ union cvmx_sriox_bell_resp_ctrl { uint64_t reserved_6_63:58; #endif } s; - struct cvmx_sriox_bell_resp_ctrl_s cn63xx; - struct cvmx_sriox_bell_resp_ctrl_s cn63xxp1; - struct cvmx_sriox_bell_resp_ctrl_s cn66xx; }; union cvmx_sriox_bist_status { @@ -305,7 +294,6 @@ union cvmx_sriox_bist_status { uint64_t reserved_44_63:20; #endif } cn63xxp1; - struct cvmx_sriox_bist_status_s cn66xx; }; union cvmx_sriox_imsg_ctrl { @@ -343,9 +331,6 @@ union cvmx_sriox_imsg_ctrl { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_sriox_imsg_ctrl_s cn63xx; - struct cvmx_sriox_imsg_ctrl_s cn63xxp1; - struct cvmx_sriox_imsg_ctrl_s cn66xx; }; union cvmx_sriox_imsg_inst_hdrx { @@ -383,9 +368,6 @@ union cvmx_sriox_imsg_inst_hdrx { uint64_t r:1; #endif } s; - struct cvmx_sriox_imsg_inst_hdrx_s cn63xx; - struct cvmx_sriox_imsg_inst_hdrx_s cn63xxp1; - struct cvmx_sriox_imsg_inst_hdrx_s cn66xx; }; union cvmx_sriox_imsg_qos_grpx { @@ -443,9 +425,6 @@ union cvmx_sriox_imsg_qos_grpx { uint64_t reserved_63_63:1; #endif } s; - struct cvmx_sriox_imsg_qos_grpx_s cn63xx; - struct cvmx_sriox_imsg_qos_grpx_s cn63xxp1; - struct cvmx_sriox_imsg_qos_grpx_s cn66xx; }; union cvmx_sriox_imsg_statusx { @@ -503,9 +482,6 @@ union cvmx_sriox_imsg_statusx { uint64_t val1:1; #endif } s; - struct cvmx_sriox_imsg_statusx_s cn63xx; - struct cvmx_sriox_imsg_statusx_s cn63xxp1; - struct cvmx_sriox_imsg_statusx_s cn66xx; }; union cvmx_sriox_imsg_vport_thr { @@ -541,9 +517,6 @@ union cvmx_sriox_imsg_vport_thr { uint64_t reserved_54_63:10; #endif } s; - struct cvmx_sriox_imsg_vport_thr_s cn63xx; - struct cvmx_sriox_imsg_vport_thr_s cn63xxp1; - struct cvmx_sriox_imsg_vport_thr_s cn66xx; }; union cvmx_sriox_imsg_vport_thr2 { @@ -563,7 +536,6 @@ union cvmx_sriox_imsg_vport_thr2 { uint64_t reserved_46_63:18; #endif } s; - struct cvmx_sriox_imsg_vport_thr2_s cn66xx; }; union cvmx_sriox_int2_enable { @@ -577,8 +549,6 @@ union cvmx_sriox_int2_enable { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_sriox_int2_enable_s cn63xx; - struct cvmx_sriox_int2_enable_s cn66xx; }; union cvmx_sriox_int2_reg { @@ -596,8 +566,6 @@ union cvmx_sriox_int2_reg { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_sriox_int2_reg_s cn63xx; - struct cvmx_sriox_int2_reg_s cn66xx; }; union cvmx_sriox_int_enable { @@ -663,7 +631,6 @@ union cvmx_sriox_int_enable { uint64_t reserved_27_63:37; #endif } s; - struct cvmx_sriox_int_enable_s cn63xx; struct cvmx_sriox_int_enable_cn63xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_22_63:42; @@ -715,7 +682,6 @@ union cvmx_sriox_int_enable { uint64_t reserved_22_63:42; #endif } cn63xxp1; - struct cvmx_sriox_int_enable_s cn66xx; }; union cvmx_sriox_int_info0 { @@ -743,9 +709,6 @@ union cvmx_sriox_int_info0 { uint64_t cmd:4; #endif } s; - struct cvmx_sriox_int_info0_s cn63xx; - struct cvmx_sriox_int_info0_s cn63xxp1; - struct cvmx_sriox_int_info0_s cn66xx; }; union cvmx_sriox_int_info1 { @@ -757,9 +720,6 @@ union cvmx_sriox_int_info1 { uint64_t info1:64; #endif } s; - struct cvmx_sriox_int_info1_s cn63xx; - struct cvmx_sriox_int_info1_s cn63xxp1; - struct cvmx_sriox_int_info1_s cn66xx; }; union cvmx_sriox_int_info2 { @@ -791,9 +751,6 @@ union cvmx_sriox_int_info2 { uint64_t prio:2; #endif } s; - struct cvmx_sriox_int_info2_s cn63xx; - struct cvmx_sriox_int_info2_s cn63xxp1; - struct cvmx_sriox_int_info2_s cn66xx; }; union cvmx_sriox_int_info3 { @@ -813,9 +770,6 @@ union cvmx_sriox_int_info3 { uint64_t prio:2; #endif } s; - struct cvmx_sriox_int_info3_s cn63xx; - struct cvmx_sriox_int_info3_s cn63xxp1; - struct cvmx_sriox_int_info3_s cn66xx; }; union cvmx_sriox_int_reg { @@ -885,7 +839,6 @@ union cvmx_sriox_int_reg { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_sriox_int_reg_s cn63xx; struct cvmx_sriox_int_reg_cn63xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_22_63:42; @@ -937,7 +890,6 @@ union cvmx_sriox_int_reg { uint64_t reserved_22_63:42; #endif } cn63xxp1; - struct cvmx_sriox_int_reg_s cn66xx; }; union cvmx_sriox_ip_feature { @@ -990,8 +942,6 @@ union cvmx_sriox_ip_feature { uint64_t ops:32; #endif } cn63xx; - struct cvmx_sriox_ip_feature_cn63xx cn63xxp1; - struct cvmx_sriox_ip_feature_s cn66xx; }; union cvmx_sriox_mac_buffers { @@ -1021,8 +971,6 @@ union cvmx_sriox_mac_buffers { uint64_t reserved_56_63:8; #endif } s; - struct cvmx_sriox_mac_buffers_s cn63xx; - struct cvmx_sriox_mac_buffers_s cn66xx; }; union cvmx_sriox_maint_op { @@ -1044,9 +992,6 @@ union cvmx_sriox_maint_op { uint64_t wr_data:32; #endif } s; - struct cvmx_sriox_maint_op_s cn63xx; - struct cvmx_sriox_maint_op_s cn63xxp1; - struct cvmx_sriox_maint_op_s cn66xx; }; union cvmx_sriox_maint_rd_data { @@ -1062,9 +1007,6 @@ union cvmx_sriox_maint_rd_data { uint64_t reserved_33_63:31; #endif } s; - struct cvmx_sriox_maint_rd_data_s cn63xx; - struct cvmx_sriox_maint_rd_data_s cn63xxp1; - struct cvmx_sriox_maint_rd_data_s cn66xx; }; union cvmx_sriox_mce_tx_ctl { @@ -1078,9 +1020,6 @@ union cvmx_sriox_mce_tx_ctl { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_sriox_mce_tx_ctl_s cn63xx; - struct cvmx_sriox_mce_tx_ctl_s cn63xxp1; - struct cvmx_sriox_mce_tx_ctl_s cn66xx; }; union cvmx_sriox_mem_op_ctrl { @@ -1106,9 +1045,6 @@ union cvmx_sriox_mem_op_ctrl { uint64_t reserved_10_63:54; #endif } s; - struct cvmx_sriox_mem_op_ctrl_s cn63xx; - struct cvmx_sriox_mem_op_ctrl_s cn63xxp1; - struct cvmx_sriox_mem_op_ctrl_s cn66xx; }; union cvmx_sriox_omsg_ctrlx { @@ -1140,7 +1076,6 @@ union cvmx_sriox_omsg_ctrlx { uint64_t testmode:1; #endif } s; - struct cvmx_sriox_omsg_ctrlx_s cn63xx; struct cvmx_sriox_omsg_ctrlx_cn63xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t testmode:1; @@ -1166,7 +1101,6 @@ union cvmx_sriox_omsg_ctrlx { uint64_t testmode:1; #endif } cn63xxp1; - struct cvmx_sriox_omsg_ctrlx_s cn66xx; }; union cvmx_sriox_omsg_done_countsx { @@ -1182,8 +1116,6 @@ union cvmx_sriox_omsg_done_countsx { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_sriox_omsg_done_countsx_s cn63xx; - struct cvmx_sriox_omsg_done_countsx_s cn66xx; }; union cvmx_sriox_omsg_fmp_mrx { @@ -1225,9 +1157,6 @@ union cvmx_sriox_omsg_fmp_mrx { uint64_t reserved_15_63:49; #endif } s; - struct cvmx_sriox_omsg_fmp_mrx_s cn63xx; - struct cvmx_sriox_omsg_fmp_mrx_s cn63xxp1; - struct cvmx_sriox_omsg_fmp_mrx_s cn66xx; }; union cvmx_sriox_omsg_nmp_mrx { @@ -1269,9 +1198,6 @@ union cvmx_sriox_omsg_nmp_mrx { uint64_t reserved_15_63:49; #endif } s; - struct cvmx_sriox_omsg_nmp_mrx_s cn63xx; - struct cvmx_sriox_omsg_nmp_mrx_s cn63xxp1; - struct cvmx_sriox_omsg_nmp_mrx_s cn66xx; }; union cvmx_sriox_omsg_portx { @@ -1302,8 +1228,6 @@ union cvmx_sriox_omsg_portx { uint64_t reserved_32_63:32; #endif } cn63xx; - struct cvmx_sriox_omsg_portx_cn63xx cn63xxp1; - struct cvmx_sriox_omsg_portx_s cn66xx; }; union cvmx_sriox_omsg_silo_thr { @@ -1317,8 +1241,6 @@ union cvmx_sriox_omsg_silo_thr { uint64_t reserved_5_63:59; #endif } s; - struct cvmx_sriox_omsg_silo_thr_s cn63xx; - struct cvmx_sriox_omsg_silo_thr_s cn66xx; }; union cvmx_sriox_omsg_sp_mrx { @@ -1362,9 +1284,6 @@ union cvmx_sriox_omsg_sp_mrx { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_sriox_omsg_sp_mrx_s cn63xx; - struct cvmx_sriox_omsg_sp_mrx_s cn63xxp1; - struct cvmx_sriox_omsg_sp_mrx_s cn66xx; }; union cvmx_sriox_priox_in_use { @@ -1380,8 +1299,6 @@ union cvmx_sriox_priox_in_use { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_sriox_priox_in_use_s cn63xx; - struct cvmx_sriox_priox_in_use_s cn66xx; }; union cvmx_sriox_rx_bell { @@ -1409,9 +1326,6 @@ union cvmx_sriox_rx_bell { uint64_t reserved_48_63:16; #endif } s; - struct cvmx_sriox_rx_bell_s cn63xx; - struct cvmx_sriox_rx_bell_s cn63xxp1; - struct cvmx_sriox_rx_bell_s cn66xx; }; union cvmx_sriox_rx_bell_seq { @@ -1427,9 +1341,6 @@ union cvmx_sriox_rx_bell_seq { uint64_t reserved_40_63:24; #endif } s; - struct cvmx_sriox_rx_bell_seq_s cn63xx; - struct cvmx_sriox_rx_bell_seq_s cn63xxp1; - struct cvmx_sriox_rx_bell_seq_s cn66xx; }; union cvmx_sriox_rx_status { @@ -1457,9 +1368,6 @@ union cvmx_sriox_rx_status { uint64_t rtn_pr3:8; #endif } s; - struct cvmx_sriox_rx_status_s cn63xx; - struct cvmx_sriox_rx_status_s cn63xxp1; - struct cvmx_sriox_rx_status_s cn66xx; }; union cvmx_sriox_s2m_typex { @@ -1491,9 +1399,6 @@ union cvmx_sriox_s2m_typex { uint64_t reserved_19_63:45; #endif } s; - struct cvmx_sriox_s2m_typex_s cn63xx; - struct cvmx_sriox_s2m_typex_s cn63xxp1; - struct cvmx_sriox_s2m_typex_s cn66xx; }; union cvmx_sriox_seq { @@ -1507,9 +1412,6 @@ union cvmx_sriox_seq { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_sriox_seq_s cn63xx; - struct cvmx_sriox_seq_s cn63xxp1; - struct cvmx_sriox_seq_s cn66xx; }; union cvmx_sriox_status_reg { @@ -1525,9 +1427,6 @@ union cvmx_sriox_status_reg { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_sriox_status_reg_s cn63xx; - struct cvmx_sriox_status_reg_s cn63xxp1; - struct cvmx_sriox_status_reg_s cn66xx; }; union cvmx_sriox_tag_ctrl { @@ -1549,9 +1448,6 @@ union cvmx_sriox_tag_ctrl { uint64_t reserved_17_63:47; #endif } s; - struct cvmx_sriox_tag_ctrl_s cn63xx; - struct cvmx_sriox_tag_ctrl_s cn63xxp1; - struct cvmx_sriox_tag_ctrl_s cn66xx; }; union cvmx_sriox_tlp_credits { @@ -1573,9 +1469,6 @@ union cvmx_sriox_tlp_credits { uint64_t reserved_28_63:36; #endif } s; - struct cvmx_sriox_tlp_credits_s cn63xx; - struct cvmx_sriox_tlp_credits_s cn63xxp1; - struct cvmx_sriox_tlp_credits_s cn66xx; }; union cvmx_sriox_tx_bell { @@ -1605,9 +1498,6 @@ union cvmx_sriox_tx_bell { uint64_t reserved_48_63:16; #endif } s; - struct cvmx_sriox_tx_bell_s cn63xx; - struct cvmx_sriox_tx_bell_s cn63xxp1; - struct cvmx_sriox_tx_bell_s cn66xx; }; union cvmx_sriox_tx_bell_info { @@ -1639,9 +1529,6 @@ union cvmx_sriox_tx_bell_info { uint64_t reserved_48_63:16; #endif } s; - struct cvmx_sriox_tx_bell_info_s cn63xx; - struct cvmx_sriox_tx_bell_info_s cn63xxp1; - struct cvmx_sriox_tx_bell_info_s cn66xx; }; union cvmx_sriox_tx_ctrl { @@ -1675,9 +1562,6 @@ union cvmx_sriox_tx_ctrl { uint64_t reserved_53_63:11; #endif } s; - struct cvmx_sriox_tx_ctrl_s cn63xx; - struct cvmx_sriox_tx_ctrl_s cn63xxp1; - struct cvmx_sriox_tx_ctrl_s cn66xx; }; union cvmx_sriox_tx_emphasis { @@ -1691,8 +1575,6 @@ union cvmx_sriox_tx_emphasis { uint64_t reserved_4_63:60; #endif } s; - struct cvmx_sriox_tx_emphasis_s cn63xx; - struct cvmx_sriox_tx_emphasis_s cn66xx; }; union cvmx_sriox_tx_status { @@ -1712,9 +1594,6 @@ union cvmx_sriox_tx_status { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_sriox_tx_status_s cn63xx; - struct cvmx_sriox_tx_status_s cn63xxp1; - struct cvmx_sriox_tx_status_s cn66xx; }; union cvmx_sriox_wr_done_counts { @@ -1730,8 +1609,6 @@ union cvmx_sriox_wr_done_counts { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_sriox_wr_done_counts_s cn63xx; - struct cvmx_sriox_wr_done_counts_s cn66xx; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-srxx-defs.h b/arch/mips/include/asm/octeon/cvmx-srxx-defs.h index c98e625cd4ed..76b2a42f53aa 100644 --- a/arch/mips/include/asm/octeon/cvmx-srxx-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-srxx-defs.h @@ -52,10 +52,6 @@ union cvmx_srxx_com_ctl { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_srxx_com_ctl_s cn38xx; - struct cvmx_srxx_com_ctl_s cn38xxp2; - struct cvmx_srxx_com_ctl_s cn58xx; - struct cvmx_srxx_com_ctl_s cn58xxp1; }; union cvmx_srxx_ign_rx_full { @@ -69,10 +65,6 @@ union cvmx_srxx_ign_rx_full { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_srxx_ign_rx_full_s cn38xx; - struct cvmx_srxx_ign_rx_full_s cn38xxp2; - struct cvmx_srxx_ign_rx_full_s cn58xx; - struct cvmx_srxx_ign_rx_full_s cn58xxp1; }; union cvmx_srxx_spi4_calx { @@ -94,10 +86,6 @@ union cvmx_srxx_spi4_calx { uint64_t reserved_17_63:47; #endif } s; - struct cvmx_srxx_spi4_calx_s cn38xx; - struct cvmx_srxx_spi4_calx_s cn38xxp2; - struct cvmx_srxx_spi4_calx_s cn58xx; - struct cvmx_srxx_spi4_calx_s cn58xxp1; }; union cvmx_srxx_spi4_stat { @@ -115,10 +103,6 @@ union cvmx_srxx_spi4_stat { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_srxx_spi4_stat_s cn38xx; - struct cvmx_srxx_spi4_stat_s cn38xxp2; - struct cvmx_srxx_spi4_stat_s cn58xx; - struct cvmx_srxx_spi4_stat_s cn58xxp1; }; union cvmx_srxx_sw_tick_ctl { @@ -140,9 +124,6 @@ union cvmx_srxx_sw_tick_ctl { uint64_t reserved_14_63:50; #endif } s; - struct cvmx_srxx_sw_tick_ctl_s cn38xx; - struct cvmx_srxx_sw_tick_ctl_s cn58xx; - struct cvmx_srxx_sw_tick_ctl_s cn58xxp1; }; union cvmx_srxx_sw_tick_dat { @@ -154,9 +135,6 @@ union cvmx_srxx_sw_tick_dat { uint64_t dat:64; #endif } s; - struct cvmx_srxx_sw_tick_dat_s cn38xx; - struct cvmx_srxx_sw_tick_dat_s cn58xx; - struct cvmx_srxx_sw_tick_dat_s cn58xxp1; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-stxx-defs.h b/arch/mips/include/asm/octeon/cvmx-stxx-defs.h index 3c409a854d91..f49d82145c57 100644 --- a/arch/mips/include/asm/octeon/cvmx-stxx-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-stxx-defs.h @@ -64,10 +64,6 @@ union cvmx_stxx_arb_ctl { uint64_t reserved_6_63:58; #endif } s; - struct cvmx_stxx_arb_ctl_s cn38xx; - struct cvmx_stxx_arb_ctl_s cn38xxp2; - struct cvmx_stxx_arb_ctl_s cn58xx; - struct cvmx_stxx_arb_ctl_s cn58xxp1; }; union cvmx_stxx_bckprs_cnt { @@ -81,10 +77,6 @@ union cvmx_stxx_bckprs_cnt { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_stxx_bckprs_cnt_s cn38xx; - struct cvmx_stxx_bckprs_cnt_s cn38xxp2; - struct cvmx_stxx_bckprs_cnt_s cn58xx; - struct cvmx_stxx_bckprs_cnt_s cn58xxp1; }; union cvmx_stxx_com_ctl { @@ -102,10 +94,6 @@ union cvmx_stxx_com_ctl { uint64_t reserved_4_63:60; #endif } s; - struct cvmx_stxx_com_ctl_s cn38xx; - struct cvmx_stxx_com_ctl_s cn38xxp2; - struct cvmx_stxx_com_ctl_s cn58xx; - struct cvmx_stxx_com_ctl_s cn58xxp1; }; union cvmx_stxx_dip_cnt { @@ -121,10 +109,6 @@ union cvmx_stxx_dip_cnt { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_stxx_dip_cnt_s cn38xx; - struct cvmx_stxx_dip_cnt_s cn38xxp2; - struct cvmx_stxx_dip_cnt_s cn58xx; - struct cvmx_stxx_dip_cnt_s cn58xxp1; }; union cvmx_stxx_ign_cal { @@ -138,10 +122,6 @@ union cvmx_stxx_ign_cal { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_stxx_ign_cal_s cn38xx; - struct cvmx_stxx_ign_cal_s cn38xxp2; - struct cvmx_stxx_ign_cal_s cn58xx; - struct cvmx_stxx_ign_cal_s cn58xxp1; }; union cvmx_stxx_int_msk { @@ -169,10 +149,6 @@ union cvmx_stxx_int_msk { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_stxx_int_msk_s cn38xx; - struct cvmx_stxx_int_msk_s cn38xxp2; - struct cvmx_stxx_int_msk_s cn58xx; - struct cvmx_stxx_int_msk_s cn58xxp1; }; union cvmx_stxx_int_reg { @@ -202,10 +178,6 @@ union cvmx_stxx_int_reg { uint64_t reserved_9_63:55; #endif } s; - struct cvmx_stxx_int_reg_s cn38xx; - struct cvmx_stxx_int_reg_s cn38xxp2; - struct cvmx_stxx_int_reg_s cn58xx; - struct cvmx_stxx_int_reg_s cn58xxp1; }; union cvmx_stxx_int_sync { @@ -233,10 +205,6 @@ union cvmx_stxx_int_sync { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_stxx_int_sync_s cn38xx; - struct cvmx_stxx_int_sync_s cn38xxp2; - struct cvmx_stxx_int_sync_s cn58xx; - struct cvmx_stxx_int_sync_s cn58xxp1; }; union cvmx_stxx_min_bst { @@ -250,10 +218,6 @@ union cvmx_stxx_min_bst { uint64_t reserved_9_63:55; #endif } s; - struct cvmx_stxx_min_bst_s cn38xx; - struct cvmx_stxx_min_bst_s cn38xxp2; - struct cvmx_stxx_min_bst_s cn58xx; - struct cvmx_stxx_min_bst_s cn58xxp1; }; union cvmx_stxx_spi4_calx { @@ -275,10 +239,6 @@ union cvmx_stxx_spi4_calx { uint64_t reserved_17_63:47; #endif } s; - struct cvmx_stxx_spi4_calx_s cn38xx; - struct cvmx_stxx_spi4_calx_s cn38xxp2; - struct cvmx_stxx_spi4_calx_s cn58xx; - struct cvmx_stxx_spi4_calx_s cn58xxp1; }; union cvmx_stxx_spi4_dat { @@ -294,10 +254,6 @@ union cvmx_stxx_spi4_dat { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_stxx_spi4_dat_s cn38xx; - struct cvmx_stxx_spi4_dat_s cn38xxp2; - struct cvmx_stxx_spi4_dat_s cn58xx; - struct cvmx_stxx_spi4_dat_s cn58xxp1; }; union cvmx_stxx_spi4_stat { @@ -315,10 +271,6 @@ union cvmx_stxx_spi4_stat { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_stxx_spi4_stat_s cn38xx; - struct cvmx_stxx_spi4_stat_s cn38xxp2; - struct cvmx_stxx_spi4_stat_s cn58xx; - struct cvmx_stxx_spi4_stat_s cn58xxp1; }; union cvmx_stxx_stat_bytes_hi { @@ -332,10 +284,6 @@ union cvmx_stxx_stat_bytes_hi { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_stxx_stat_bytes_hi_s cn38xx; - struct cvmx_stxx_stat_bytes_hi_s cn38xxp2; - struct cvmx_stxx_stat_bytes_hi_s cn58xx; - struct cvmx_stxx_stat_bytes_hi_s cn58xxp1; }; union cvmx_stxx_stat_bytes_lo { @@ -349,10 +297,6 @@ union cvmx_stxx_stat_bytes_lo { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_stxx_stat_bytes_lo_s cn38xx; - struct cvmx_stxx_stat_bytes_lo_s cn38xxp2; - struct cvmx_stxx_stat_bytes_lo_s cn58xx; - struct cvmx_stxx_stat_bytes_lo_s cn58xxp1; }; union cvmx_stxx_stat_ctl { @@ -368,10 +312,6 @@ union cvmx_stxx_stat_ctl { uint64_t reserved_5_63:59; #endif } s; - struct cvmx_stxx_stat_ctl_s cn38xx; - struct cvmx_stxx_stat_ctl_s cn38xxp2; - struct cvmx_stxx_stat_ctl_s cn58xx; - struct cvmx_stxx_stat_ctl_s cn58xxp1; }; union cvmx_stxx_stat_pkt_xmt { @@ -385,10 +325,6 @@ union cvmx_stxx_stat_pkt_xmt { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_stxx_stat_pkt_xmt_s cn38xx; - struct cvmx_stxx_stat_pkt_xmt_s cn38xxp2; - struct cvmx_stxx_stat_pkt_xmt_s cn58xx; - struct cvmx_stxx_stat_pkt_xmt_s cn58xxp1; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-uctlx-defs.h b/arch/mips/include/asm/octeon/cvmx-uctlx-defs.h index bc5b80c6bbe2..6cf2280166dd 100644 --- a/arch/mips/include/asm/octeon/cvmx-uctlx-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-uctlx-defs.h @@ -63,13 +63,6 @@ union cvmx_uctlx_bist_status { uint64_t reserved_6_63:58; #endif } s; - struct cvmx_uctlx_bist_status_s cn61xx; - struct cvmx_uctlx_bist_status_s cn63xx; - struct cvmx_uctlx_bist_status_s cn63xxp1; - struct cvmx_uctlx_bist_status_s cn66xx; - struct cvmx_uctlx_bist_status_s cn68xx; - struct cvmx_uctlx_bist_status_s cn68xxp1; - struct cvmx_uctlx_bist_status_s cnf71xx; }; union cvmx_uctlx_clk_rst_ctl { @@ -121,13 +114,6 @@ union cvmx_uctlx_clk_rst_ctl { uint64_t reserved_25_63:39; #endif } s; - struct cvmx_uctlx_clk_rst_ctl_s cn61xx; - struct cvmx_uctlx_clk_rst_ctl_s cn63xx; - struct cvmx_uctlx_clk_rst_ctl_s cn63xxp1; - struct cvmx_uctlx_clk_rst_ctl_s cn66xx; - struct cvmx_uctlx_clk_rst_ctl_s cn68xx; - struct cvmx_uctlx_clk_rst_ctl_s cn68xxp1; - struct cvmx_uctlx_clk_rst_ctl_s cnf71xx; }; union cvmx_uctlx_ehci_ctl { @@ -161,13 +147,6 @@ union cvmx_uctlx_ehci_ctl { uint64_t reserved_20_63:44; #endif } s; - struct cvmx_uctlx_ehci_ctl_s cn61xx; - struct cvmx_uctlx_ehci_ctl_s cn63xx; - struct cvmx_uctlx_ehci_ctl_s cn63xxp1; - struct cvmx_uctlx_ehci_ctl_s cn66xx; - struct cvmx_uctlx_ehci_ctl_s cn68xx; - struct cvmx_uctlx_ehci_ctl_s cn68xxp1; - struct cvmx_uctlx_ehci_ctl_s cnf71xx; }; union cvmx_uctlx_ehci_fla { @@ -181,13 +160,6 @@ union cvmx_uctlx_ehci_fla { uint64_t reserved_6_63:58; #endif } s; - struct cvmx_uctlx_ehci_fla_s cn61xx; - struct cvmx_uctlx_ehci_fla_s cn63xx; - struct cvmx_uctlx_ehci_fla_s cn63xxp1; - struct cvmx_uctlx_ehci_fla_s cn66xx; - struct cvmx_uctlx_ehci_fla_s cn68xx; - struct cvmx_uctlx_ehci_fla_s cn68xxp1; - struct cvmx_uctlx_ehci_fla_s cnf71xx; }; union cvmx_uctlx_erto_ctl { @@ -203,13 +175,6 @@ union cvmx_uctlx_erto_ctl { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_uctlx_erto_ctl_s cn61xx; - struct cvmx_uctlx_erto_ctl_s cn63xx; - struct cvmx_uctlx_erto_ctl_s cn63xxp1; - struct cvmx_uctlx_erto_ctl_s cn66xx; - struct cvmx_uctlx_erto_ctl_s cn68xx; - struct cvmx_uctlx_erto_ctl_s cn68xxp1; - struct cvmx_uctlx_erto_ctl_s cnf71xx; }; union cvmx_uctlx_if_ena { @@ -223,13 +188,6 @@ union cvmx_uctlx_if_ena { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_uctlx_if_ena_s cn61xx; - struct cvmx_uctlx_if_ena_s cn63xx; - struct cvmx_uctlx_if_ena_s cn63xxp1; - struct cvmx_uctlx_if_ena_s cn66xx; - struct cvmx_uctlx_if_ena_s cn68xx; - struct cvmx_uctlx_if_ena_s cn68xxp1; - struct cvmx_uctlx_if_ena_s cnf71xx; }; union cvmx_uctlx_int_ena { @@ -257,13 +215,6 @@ union cvmx_uctlx_int_ena { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_uctlx_int_ena_s cn61xx; - struct cvmx_uctlx_int_ena_s cn63xx; - struct cvmx_uctlx_int_ena_s cn63xxp1; - struct cvmx_uctlx_int_ena_s cn66xx; - struct cvmx_uctlx_int_ena_s cn68xx; - struct cvmx_uctlx_int_ena_s cn68xxp1; - struct cvmx_uctlx_int_ena_s cnf71xx; }; union cvmx_uctlx_int_reg { @@ -291,13 +242,6 @@ union cvmx_uctlx_int_reg { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_uctlx_int_reg_s cn61xx; - struct cvmx_uctlx_int_reg_s cn63xx; - struct cvmx_uctlx_int_reg_s cn63xxp1; - struct cvmx_uctlx_int_reg_s cn66xx; - struct cvmx_uctlx_int_reg_s cn68xx; - struct cvmx_uctlx_int_reg_s cn68xxp1; - struct cvmx_uctlx_int_reg_s cnf71xx; }; union cvmx_uctlx_ohci_ctl { @@ -329,13 +273,6 @@ union cvmx_uctlx_ohci_ctl { uint64_t reserved_19_63:45; #endif } s; - struct cvmx_uctlx_ohci_ctl_s cn61xx; - struct cvmx_uctlx_ohci_ctl_s cn63xx; - struct cvmx_uctlx_ohci_ctl_s cn63xxp1; - struct cvmx_uctlx_ohci_ctl_s cn66xx; - struct cvmx_uctlx_ohci_ctl_s cn68xx; - struct cvmx_uctlx_ohci_ctl_s cn68xxp1; - struct cvmx_uctlx_ohci_ctl_s cnf71xx; }; union cvmx_uctlx_orto_ctl { @@ -351,13 +288,6 @@ union cvmx_uctlx_orto_ctl { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_uctlx_orto_ctl_s cn61xx; - struct cvmx_uctlx_orto_ctl_s cn63xx; - struct cvmx_uctlx_orto_ctl_s cn63xxp1; - struct cvmx_uctlx_orto_ctl_s cn66xx; - struct cvmx_uctlx_orto_ctl_s cn68xx; - struct cvmx_uctlx_orto_ctl_s cn68xxp1; - struct cvmx_uctlx_orto_ctl_s cnf71xx; }; union cvmx_uctlx_ppaf_wm { @@ -371,11 +301,6 @@ union cvmx_uctlx_ppaf_wm { uint64_t reserved_5_63:59; #endif } s; - struct cvmx_uctlx_ppaf_wm_s cn61xx; - struct cvmx_uctlx_ppaf_wm_s cn63xx; - struct cvmx_uctlx_ppaf_wm_s cn63xxp1; - struct cvmx_uctlx_ppaf_wm_s cn66xx; - struct cvmx_uctlx_ppaf_wm_s cnf71xx; }; union cvmx_uctlx_uphy_ctl_status { @@ -407,13 +332,6 @@ union cvmx_uctlx_uphy_ctl_status { uint64_t reserved_10_63:54; #endif } s; - struct cvmx_uctlx_uphy_ctl_status_s cn61xx; - struct cvmx_uctlx_uphy_ctl_status_s cn63xx; - struct cvmx_uctlx_uphy_ctl_status_s cn63xxp1; - struct cvmx_uctlx_uphy_ctl_status_s cn66xx; - struct cvmx_uctlx_uphy_ctl_status_s cn68xx; - struct cvmx_uctlx_uphy_ctl_status_s cn68xxp1; - struct cvmx_uctlx_uphy_ctl_status_s cnf71xx; }; union cvmx_uctlx_uphy_portx_ctl_status { @@ -463,13 +381,6 @@ union cvmx_uctlx_uphy_portx_ctl_status { uint64_t reserved_43_63:21; #endif } s; - struct cvmx_uctlx_uphy_portx_ctl_status_s cn61xx; - struct cvmx_uctlx_uphy_portx_ctl_status_s cn63xx; - struct cvmx_uctlx_uphy_portx_ctl_status_s cn63xxp1; - struct cvmx_uctlx_uphy_portx_ctl_status_s cn66xx; - struct cvmx_uctlx_uphy_portx_ctl_status_s cn68xx; - struct cvmx_uctlx_uphy_portx_ctl_status_s cn68xxp1; - struct cvmx_uctlx_uphy_portx_ctl_status_s cnf71xx; }; #endif diff --git a/arch/mips/include/asm/page.h b/arch/mips/include/asm/page.h index e8cc328fce2d..6b31c93b5eaa 100644 --- a/arch/mips/include/asm/page.h +++ b/arch/mips/include/asm/page.h @@ -154,6 +154,7 @@ typedef struct { unsigned long pgd; } pgd_t; typedef struct { unsigned long pgprot; } pgprot_t; #define pgprot_val(x) ((x).pgprot) #define __pgprot(x) ((pgprot_t) { (x) } ) +#define pte_pgprot(x) __pgprot(pte_val(x) & ~_PFN_MASK) /* * On R4000-style MMUs where a TLB entry is mapping a adjacent even / odd diff --git a/arch/mips/include/asm/pgtable-64.h b/arch/mips/include/asm/pgtable-64.h index 0036ea0c7173..93a9dce31f25 100644 --- a/arch/mips/include/asm/pgtable-64.h +++ b/arch/mips/include/asm/pgtable-64.h @@ -265,6 +265,11 @@ static inline int pmd_bad(pmd_t pmd) static inline int pmd_present(pmd_t pmd) { +#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT + if (unlikely(pmd_val(pmd) & _PAGE_HUGE)) + return pmd_val(pmd) & _PAGE_PRESENT; +#endif + return pmd_val(pmd) != (unsigned long) invalid_pte_table; } diff --git a/arch/mips/include/asm/pgtable.h b/arch/mips/include/asm/pgtable.h index 129e0328367f..57933fc8fd98 100644 --- a/arch/mips/include/asm/pgtable.h +++ b/arch/mips/include/asm/pgtable.h @@ -214,8 +214,8 @@ static inline void set_pte(pte_t *ptep, pte_t pteval) if (kernel_uses_llsc && R10000_LLSC_WAR) { __asm__ __volatile__ ( - " .set arch=r4000 \n" " .set push \n" + " .set arch=r4000 \n" " .set noreorder \n" "1:" __LL "%[tmp], %[buddy] \n" " bnez %[tmp], 2f \n" @@ -225,13 +225,12 @@ static inline void set_pte(pte_t *ptep, pte_t pteval) " nop \n" "2: \n" " .set pop \n" - " .set mips0 \n" : [buddy] "+m" (buddy->pte), [tmp] "=&r" (tmp) : [global] "r" (page_global)); } else if (kernel_uses_llsc) { __asm__ __volatile__ ( - " .set "MIPS_ISA_ARCH_LEVEL" \n" " .set push \n" + " .set "MIPS_ISA_ARCH_LEVEL" \n" " .set noreorder \n" "1:" __LL "%[tmp], %[buddy] \n" " bnez %[tmp], 2f \n" @@ -241,7 +240,6 @@ static inline void set_pte(pte_t *ptep, pte_t pteval) " nop \n" "2: \n" " .set pop \n" - " .set mips0 \n" : [buddy] "+m" (buddy->pte), [tmp] "=&r" (tmp) : [global] "r" (page_global)); } diff --git a/arch/mips/include/asm/processor.h b/arch/mips/include/asm/processor.h index ce3ed4d17813..aca909bd7841 100644 --- a/arch/mips/include/asm/processor.h +++ b/arch/mips/include/asm/processor.h @@ -255,8 +255,10 @@ struct thread_struct { /* Saved cp0 stuff. */ unsigned long cp0_status; +#ifdef CONFIG_MIPS_FP_SUPPORT /* Saved fpu/fpu emulator stuff. */ struct mips_fpu_struct fpu FPU_ALIGN; +#endif /* Assigned branch delay slot 'emulation' frame */ atomic_t bd_emu_frame; /* PC of the branch from a branch delay slot 'emulation' */ @@ -299,6 +301,17 @@ struct thread_struct { #define FPAFF_INIT #endif /* CONFIG_MIPS_MT_FPAFF */ +#ifdef CONFIG_MIPS_FP_SUPPORT +# define FPU_INIT \ + .fpu = { \ + .fpr = {{{0,},},}, \ + .fcr31 = 0, \ + .msacsr = 0, \ + }, +#else +# define FPU_INIT +#endif + #define INIT_THREAD { \ /* \ * Saved main processor registers \ @@ -321,11 +334,7 @@ struct thread_struct { /* \ * Saved FPU/FPU emulator stuff \ */ \ - .fpu = { \ - .fpr = {{{0,},},}, \ - .fcr31 = 0, \ - .msacsr = 0, \ - }, \ + FPU_INIT \ /* \ * FPU affinity state (null if not FPAFF) \ */ \ diff --git a/arch/mips/include/asm/r4kcache.h b/arch/mips/include/asm/r4kcache.h index d19b2d65336b..7f4a32d3345a 100644 --- a/arch/mips/include/asm/r4kcache.h +++ b/arch/mips/include/asm/r4kcache.h @@ -20,6 +20,7 @@ #include <asm/cpu-features.h> #include <asm/cpu-type.h> #include <asm/mipsmtregs.h> +#include <asm/mmzone.h> #include <linux/uaccess.h> /* for uaccess_kernel() */ extern void (*r4k_blast_dcache)(void); @@ -674,4 +675,25 @@ __BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, , ) __BUILD_BLAST_CACHE_RANGE(inv_d, dcache, Hit_Invalidate_D, , ) __BUILD_BLAST_CACHE_RANGE(inv_s, scache, Hit_Invalidate_SD, , ) +/* Currently, this is very specific to Loongson-3 */ +#define __BUILD_BLAST_CACHE_NODE(pfx, desc, indexop, hitop, lsize) \ +static inline void blast_##pfx##cache##lsize##_node(long node) \ +{ \ + unsigned long start = CAC_BASE | nid_to_addrbase(node); \ + unsigned long end = start + current_cpu_data.desc.waysize; \ + unsigned long ws_inc = 1UL << current_cpu_data.desc.waybit; \ + unsigned long ws_end = current_cpu_data.desc.ways << \ + current_cpu_data.desc.waybit; \ + unsigned long ws, addr; \ + \ + for (ws = 0; ws < ws_end; ws += ws_inc) \ + for (addr = start; addr < end; addr += lsize * 32) \ + cache##lsize##_unroll32(addr|ws, indexop); \ +} + +__BUILD_BLAST_CACHE_NODE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 16) +__BUILD_BLAST_CACHE_NODE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 32) +__BUILD_BLAST_CACHE_NODE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 64) +__BUILD_BLAST_CACHE_NODE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 128) + #endif /* _ASM_R4KCACHE_H */ diff --git a/arch/mips/include/asm/stackframe.h b/arch/mips/include/asm/stackframe.h index 2161357cc68f..4d6ad907ae54 100644 --- a/arch/mips/include/asm/stackframe.h +++ b/arch/mips/include/asm/stackframe.h @@ -427,9 +427,10 @@ #ifdef CONFIG_CPU_MIPSR6 eretnc #else + .set push .set arch=r4000 eret - .set mips0 + .set pop #endif .endm diff --git a/arch/mips/include/asm/switch_to.h b/arch/mips/include/asm/switch_to.h index e610473d61b8..0f813bb753c6 100644 --- a/arch/mips/include/asm/switch_to.h +++ b/arch/mips/include/asm/switch_to.h @@ -84,7 +84,8 @@ do { \ * Check FCSR for any unmasked exceptions pending set with `ptrace', * clear them and send a signal. */ -#define __sanitize_fcr31(next) \ +#ifdef CONFIG_MIPS_FP_SUPPORT +# define __sanitize_fcr31(next) \ do { \ unsigned long fcr31 = mask_fcr31_x(next->thread.fpu.fcr31); \ void __user *pc; \ @@ -95,6 +96,9 @@ do { \ force_fcr31_sig(fcr31, pc, next); \ } \ } while (0) +#else +# define __sanitize_fcr31(next) +#endif /* * For newly created kernel threads switch_to() will return to diff --git a/arch/mips/include/asm/syscall.h b/arch/mips/include/asm/syscall.h index 0170602a1e4e..6cf8ffb5367e 100644 --- a/arch/mips/include/asm/syscall.h +++ b/arch/mips/include/asm/syscall.h @@ -73,7 +73,7 @@ static inline unsigned long mips_get_syscall_arg(unsigned long *arg, #ifdef CONFIG_64BIT case 4: case 5: case 6: case 7: #ifdef CONFIG_MIPS32_O32 - if (test_thread_flag(TIF_32BIT_REGS)) + if (test_tsk_thread_flag(task, TIF_32BIT_REGS)) return get_user(*arg, (int *)usp + n); else #endif diff --git a/arch/mips/include/asm/uasm.h b/arch/mips/include/asm/uasm.h index 59dae37f6b8d..b1990dd75f27 100644 --- a/arch/mips/include/asm/uasm.h +++ b/arch/mips/include/asm/uasm.h @@ -157,6 +157,7 @@ Ip_u2u1s3(_slti); Ip_u2u1s3(_sltiu); Ip_u3u1u2(_sltu); Ip_u2u1u3(_sra); +Ip_u3u2u1(_srav); Ip_u2u1u3(_srl); Ip_u3u2u1(_srlv); Ip_u3u1u2(_subu); diff --git a/arch/mips/include/asm/unistd.h b/arch/mips/include/asm/unistd.h index c68b8ae3efcb..b23d74a601b3 100644 --- a/arch/mips/include/asm/unistd.h +++ b/arch/mips/include/asm/unistd.h @@ -13,6 +13,9 @@ #define _ASM_UNISTD_H #include <uapi/asm/unistd.h> +#include <asm/unistd_nr_n32.h> +#include <asm/unistd_nr_n64.h> +#include <asm/unistd_nr_o32.h> #ifdef CONFIG_MIPS32_N32 #define NR_syscalls (__NR_N32_Linux + __NR_N32_Linux_syscalls) |