diff options
Diffstat (limited to 'arch/mips/cavium-octeon')
| -rw-r--r-- | arch/mips/cavium-octeon/executive/cvmx-helper-util.c | 4 | ||||
| -rw-r--r-- | arch/mips/cavium-octeon/executive/cvmx-l2c.c | 9 |
2 files changed, 7 insertions, 6 deletions
diff --git a/arch/mips/cavium-octeon/executive/cvmx-helper-util.c b/arch/mips/cavium-octeon/executive/cvmx-helper-util.c index 116dea17acf5..dfdfe8bdc9c5 100644 --- a/arch/mips/cavium-octeon/executive/cvmx-helper-util.c +++ b/arch/mips/cavium-octeon/executive/cvmx-helper-util.c @@ -175,7 +175,7 @@ int cvmx_helper_dump_packet(cvmx_wqe_t *work) * Packets will begin slowly dropping when there are less than * this many packet buffers free in FPA 0. * @drop_thresh: - * All incomming packets will be dropped when there are less + * All incoming packets will be dropped when there are less * than this many free packet buffers in FPA 0. * Returns Zero on success. Negative on failure */ @@ -210,7 +210,7 @@ int cvmx_helper_setup_red_queue(int queue, int pass_thresh, int drop_thresh) * Packets will begin slowly dropping when there are less than * this many packet buffers free in FPA 0. * @drop_thresh: - * All incomming packets will be dropped when there are less + * All incoming packets will be dropped when there are less * than this many free packet buffers in FPA 0. * Returns Zero on success. Negative on failure */ diff --git a/arch/mips/cavium-octeon/executive/cvmx-l2c.c b/arch/mips/cavium-octeon/executive/cvmx-l2c.c index 9f883bf76953..33b72144db31 100644 --- a/arch/mips/cavium-octeon/executive/cvmx-l2c.c +++ b/arch/mips/cavium-octeon/executive/cvmx-l2c.c @@ -30,6 +30,7 @@ * measurement, and debugging facilities. */ +#include <linux/compiler.h> #include <linux/irqflags.h> #include <asm/octeon/cvmx.h> #include <asm/octeon/cvmx-l2c.h> @@ -285,22 +286,22 @@ uint64_t cvmx_l2c_read_perf(uint32_t counter) */ static void fault_in(uint64_t addr, int len) { - volatile char *ptr; - volatile char dummy; + char *ptr; + /* * Adjust addr and length so we get all cache lines even for * small ranges spanning two cache lines. */ len += addr & CVMX_CACHE_LINE_MASK; addr &= ~CVMX_CACHE_LINE_MASK; - ptr = (volatile char *)cvmx_phys_to_ptr(addr); + ptr = cvmx_phys_to_ptr(addr); /* * Invalidate L1 cache to make sure all loads result in data * being in L2. */ CVMX_DCACHE_INVALIDATE; while (len > 0) { - dummy += *ptr; + ACCESS_ONCE(*ptr); len -= CVMX_CACHE_LINE_SIZE; ptr += CVMX_CACHE_LINE_SIZE; } |