diff options
Diffstat (limited to 'arch/m68k/mm')
| -rw-r--r-- | arch/m68k/mm/Makefile | 8 | ||||
| -rw-r--r-- | arch/m68k/mm/fault.c | 219 | ||||
| -rw-r--r-- | arch/m68k/mm/hwtest.c | 85 | ||||
| -rw-r--r-- | arch/m68k/mm/init.c | 147 | ||||
| -rw-r--r-- | arch/m68k/mm/kmap.c | 361 | ||||
| -rw-r--r-- | arch/m68k/mm/memory.c | 471 | ||||
| -rw-r--r-- | arch/m68k/mm/motorola.c | 285 | ||||
| -rw-r--r-- | arch/m68k/mm/sun3kmap.c | 156 | ||||
| -rw-r--r-- | arch/m68k/mm/sun3mmu.c | 102 |
9 files changed, 1834 insertions, 0 deletions
diff --git a/arch/m68k/mm/Makefile b/arch/m68k/mm/Makefile new file mode 100644 index 000000000000..90f1c735c110 --- /dev/null +++ b/arch/m68k/mm/Makefile @@ -0,0 +1,8 @@ +# +# Makefile for the linux m68k-specific parts of the memory manager. +# + +obj-y := init.o fault.o hwtest.o + +obj-$(CONFIG_MMU_MOTOROLA) += kmap.o memory.o motorola.o +obj-$(CONFIG_MMU_SUN3) += sun3kmap.o sun3mmu.o diff --git a/arch/m68k/mm/fault.c b/arch/m68k/mm/fault.c new file mode 100644 index 000000000000..ac48b6d2aff6 --- /dev/null +++ b/arch/m68k/mm/fault.c @@ -0,0 +1,219 @@ +/* + * linux/arch/m68k/mm/fault.c + * + * Copyright (C) 1995 Hamish Macdonald + */ + +#include <linux/mman.h> +#include <linux/mm.h> +#include <linux/kernel.h> +#include <linux/ptrace.h> +#include <linux/interrupt.h> +#include <linux/module.h> + +#include <asm/setup.h> +#include <asm/traps.h> +#include <asm/system.h> +#include <asm/uaccess.h> +#include <asm/pgalloc.h> + +extern void die_if_kernel(char *, struct pt_regs *, long); +extern const int frame_extra_sizes[]; /* in m68k/kernel/signal.c */ + +int send_fault_sig(struct pt_regs *regs) +{ + siginfo_t siginfo = { 0, 0, 0, }; + + siginfo.si_signo = current->thread.signo; + siginfo.si_code = current->thread.code; + siginfo.si_addr = (void *)current->thread.faddr; +#ifdef DEBUG + printk("send_fault_sig: %p,%d,%d\n", siginfo.si_addr, siginfo.si_signo, siginfo.si_code); +#endif + + if (user_mode(regs)) { + force_sig_info(siginfo.si_signo, + &siginfo, current); + } else { + const struct exception_table_entry *fixup; + + /* Are we prepared to handle this kernel fault? */ + if ((fixup = search_exception_tables(regs->pc))) { + struct pt_regs *tregs; + /* Create a new four word stack frame, discarding the old + one. */ + regs->stkadj = frame_extra_sizes[regs->format]; + tregs = (struct pt_regs *)((ulong)regs + regs->stkadj); + tregs->vector = regs->vector; + tregs->format = 0; + tregs->pc = fixup->fixup; + tregs->sr = regs->sr; + return -1; + } + + //if (siginfo.si_signo == SIGBUS) + // force_sig_info(siginfo.si_signo, + // &siginfo, current); + + /* + * Oops. The kernel tried to access some bad page. We'll have to + * terminate things with extreme prejudice. + */ + if ((unsigned long)siginfo.si_addr < PAGE_SIZE) + printk(KERN_ALERT "Unable to handle kernel NULL pointer dereference"); + else + printk(KERN_ALERT "Unable to handle kernel access"); + printk(" at virtual address %p\n", siginfo.si_addr); + die_if_kernel("Oops", regs, 0 /*error_code*/); + do_exit(SIGKILL); + } + + return 1; +} + +/* + * This routine handles page faults. It determines the problem, and + * then passes it off to one of the appropriate routines. + * + * error_code: + * bit 0 == 0 means no page found, 1 means protection fault + * bit 1 == 0 means read, 1 means write + * + * If this routine detects a bad access, it returns 1, otherwise it + * returns 0. + */ +int do_page_fault(struct pt_regs *regs, unsigned long address, + unsigned long error_code) +{ + struct mm_struct *mm = current->mm; + struct vm_area_struct * vma; + int write, fault; + +#ifdef DEBUG + printk ("do page fault:\nregs->sr=%#x, regs->pc=%#lx, address=%#lx, %ld, %p\n", + regs->sr, regs->pc, address, error_code, + current->mm->pgd); +#endif + + /* + * If we're in an interrupt or have no user + * context, we must not take the fault.. + */ + if (in_interrupt() || !mm) + goto no_context; + + down_read(&mm->mmap_sem); + + vma = find_vma(mm, address); + if (!vma) + goto map_err; + if (vma->vm_flags & VM_IO) + goto acc_err; + if (vma->vm_start <= address) + goto good_area; + if (!(vma->vm_flags & VM_GROWSDOWN)) + goto map_err; + if (user_mode(regs)) { + /* Accessing the stack below usp is always a bug. The + "+ 256" is there due to some instructions doing + pre-decrement on the stack and that doesn't show up + until later. */ + if (address + 256 < rdusp()) + goto map_err; + } + if (expand_stack(vma, address)) + goto map_err; + +/* + * Ok, we have a good vm_area for this memory access, so + * we can handle it.. + */ +good_area: +#ifdef DEBUG + printk("do_page_fault: good_area\n"); +#endif + write = 0; + switch (error_code & 3) { + default: /* 3: write, present */ + /* fall through */ + case 2: /* write, not present */ + if (!(vma->vm_flags & VM_WRITE)) + goto acc_err; + write++; + break; + case 1: /* read, present */ + goto acc_err; + case 0: /* read, not present */ + if (!(vma->vm_flags & (VM_READ | VM_EXEC))) + goto acc_err; + } + + /* + * If for any reason at all we couldn't handle the fault, + * make sure we exit gracefully rather than endlessly redo + * the fault. + */ + + survive: + fault = handle_mm_fault(mm, vma, address, write); +#ifdef DEBUG + printk("handle_mm_fault returns %d\n",fault); +#endif + switch (fault) { + case 1: + current->min_flt++; + break; + case 2: + current->maj_flt++; + break; + case 0: + goto bus_err; + default: + goto out_of_memory; + } + + up_read(&mm->mmap_sem); + return 0; + +/* + * We ran out of memory, or some other thing happened to us that made + * us unable to handle the page fault gracefully. + */ +out_of_memory: + up_read(&mm->mmap_sem); + if (current->pid == 1) { + yield(); + down_read(&mm->mmap_sem); + goto survive; + } + + printk("VM: killing process %s\n", current->comm); + if (user_mode(regs)) + do_exit(SIGKILL); + +no_context: + current->thread.signo = SIGBUS; + current->thread.faddr = address; + return send_fault_sig(regs); + +bus_err: + current->thread.signo = SIGBUS; + current->thread.code = BUS_ADRERR; + current->thread.faddr = address; + goto send_sig; + +map_err: + current->thread.signo = SIGSEGV; + current->thread.code = SEGV_MAPERR; + current->thread.faddr = address; + goto send_sig; + +acc_err: + current->thread.signo = SIGSEGV; + current->thread.code = SEGV_ACCERR; + current->thread.faddr = address; + +send_sig: + up_read(&mm->mmap_sem); + return send_fault_sig(regs); +} diff --git a/arch/m68k/mm/hwtest.c b/arch/m68k/mm/hwtest.c new file mode 100644 index 000000000000..2c7dde3c6430 --- /dev/null +++ b/arch/m68k/mm/hwtest.c @@ -0,0 +1,85 @@ +/* Tests for presence or absence of hardware registers. + * This code was originally in atari/config.c, but I noticed + * that it was also in drivers/nubus/nubus.c and I wanted to + * use it in hp300/config.c, so it seemed sensible to pull it + * out into its own file. + * + * The test is for use when trying to read a hardware register + * that isn't present would cause a bus error. We set up a + * temporary handler so that this doesn't kill the kernel. + * + * There is a test-by-reading and a test-by-writing; I present + * them here complete with the comments from the original atari + * config.c... + * -- PMM <pmaydell@chiark.greenend.org.uk>, 05/1998 + */ + +/* This function tests for the presence of an address, specially a + * hardware register address. It is called very early in the kernel + * initialization process, when the VBR register isn't set up yet. On + * an Atari, it still points to address 0, which is unmapped. So a bus + * error would cause another bus error while fetching the exception + * vector, and the CPU would do nothing at all. So we needed to set up + * a temporary VBR and a vector table for the duration of the test. + */ + +#include <linux/module.h> + +int hwreg_present( volatile void *regp ) +{ + int ret = 0; + long save_sp, save_vbr; + long tmp_vectors[3]; + + __asm__ __volatile__ + ( "movec %/vbr,%2\n\t" + "movel #Lberr1,%4@(8)\n\t" + "movec %4,%/vbr\n\t" + "movel %/sp,%1\n\t" + "moveq #0,%0\n\t" + "tstb %3@\n\t" + "nop\n\t" + "moveq #1,%0\n" + "Lberr1:\n\t" + "movel %1,%/sp\n\t" + "movec %2,%/vbr" + : "=&d" (ret), "=&r" (save_sp), "=&r" (save_vbr) + : "a" (regp), "a" (tmp_vectors) + ); + + return( ret ); +} +EXPORT_SYMBOL(hwreg_present); + +/* Basically the same, but writes a value into a word register, protected + * by a bus error handler. Returns 1 if successful, 0 otherwise. + */ + +int hwreg_write( volatile void *regp, unsigned short val ) +{ + int ret; + long save_sp, save_vbr; + long tmp_vectors[3]; + + __asm__ __volatile__ + ( "movec %/vbr,%2\n\t" + "movel #Lberr2,%4@(8)\n\t" + "movec %4,%/vbr\n\t" + "movel %/sp,%1\n\t" + "moveq #0,%0\n\t" + "movew %5,%3@\n\t" + "nop \n\t" /* If this nop isn't present, 'ret' may already be + * loaded with 1 at the time the bus error + * happens! */ + "moveq #1,%0\n" + "Lberr2:\n\t" + "movel %1,%/sp\n\t" + "movec %2,%/vbr" + : "=&d" (ret), "=&r" (save_sp), "=&r" (save_vbr) + : "a" (regp), "a" (tmp_vectors), "g" (val) + ); + + return( ret ); +} +EXPORT_SYMBOL(hwreg_write); + diff --git a/arch/m68k/mm/init.c b/arch/m68k/mm/init.c new file mode 100644 index 000000000000..c45beb955943 --- /dev/null +++ b/arch/m68k/mm/init.c @@ -0,0 +1,147 @@ +/* + * linux/arch/m68k/mm/init.c + * + * Copyright (C) 1995 Hamish Macdonald + * + * Contains common initialization routines, specific init code moved + * to motorola.c and sun3mmu.c + */ + +#include <linux/config.h> +#include <linux/signal.h> +#include <linux/sched.h> +#include <linux/mm.h> +#include <linux/swap.h> +#include <linux/kernel.h> +#include <linux/string.h> +#include <linux/types.h> +#include <linux/init.h> +#include <linux/bootmem.h> + +#include <asm/setup.h> +#include <asm/uaccess.h> +#include <asm/page.h> +#include <asm/pgalloc.h> +#include <asm/system.h> +#include <asm/machdep.h> +#include <asm/io.h> +#ifdef CONFIG_ATARI +#include <asm/atari_stram.h> +#endif +#include <asm/tlb.h> + +DEFINE_PER_CPU(struct mmu_gather, mmu_gathers); + +/* + * ZERO_PAGE is a special page that is used for zero-initialized + * data and COW. + */ + +void *empty_zero_page; + +void show_mem(void) +{ + unsigned long i; + int free = 0, total = 0, reserved = 0, shared = 0; + int cached = 0; + + printk("\nMem-info:\n"); + show_free_areas(); + printk("Free swap: %6ldkB\n", nr_swap_pages<<(PAGE_SHIFT-10)); + i = max_mapnr; + while (i-- > 0) { + total++; + if (PageReserved(mem_map+i)) + reserved++; + else if (PageSwapCache(mem_map+i)) + cached++; + else if (!page_count(mem_map+i)) + free++; + else + shared += page_count(mem_map+i) - 1; + } + printk("%d pages of RAM\n",total); + printk("%d free pages\n",free); + printk("%d reserved pages\n",reserved); + printk("%d pages shared\n",shared); + printk("%d pages swap cached\n",cached); +} + +extern void init_pointer_table(unsigned long ptable); + +/* References to section boundaries */ + +extern char _text, _etext, _edata, __bss_start, _end; +extern char __init_begin, __init_end; + +extern pmd_t *zero_pgtable; + +void __init mem_init(void) +{ + int codepages = 0; + int datapages = 0; + int initpages = 0; + unsigned long tmp; +#ifndef CONFIG_SUN3 + int i; +#endif + + max_mapnr = num_physpages = (((unsigned long)high_memory - PAGE_OFFSET) >> PAGE_SHIFT); + +#ifdef CONFIG_ATARI + if (MACH_IS_ATARI) + atari_stram_mem_init_hook(); +#endif + + /* this will put all memory onto the freelists */ + totalram_pages = free_all_bootmem(); + + for (tmp = PAGE_OFFSET ; tmp < (unsigned long)high_memory; tmp += PAGE_SIZE) { + if (PageReserved(virt_to_page(tmp))) { + if (tmp >= (unsigned long)&_text + && tmp < (unsigned long)&_etext) + codepages++; + else if (tmp >= (unsigned long) &__init_begin + && tmp < (unsigned long) &__init_end) + initpages++; + else + datapages++; + continue; + } + } + +#ifndef CONFIG_SUN3 + /* insert pointer tables allocated so far into the tablelist */ + init_pointer_table((unsigned long)kernel_pg_dir); + for (i = 0; i < PTRS_PER_PGD; i++) { + if (pgd_present(kernel_pg_dir[i])) + init_pointer_table(__pgd_page(kernel_pg_dir[i])); + } + + /* insert also pointer table that we used to unmap the zero page */ + if (zero_pgtable) + init_pointer_table((unsigned long)zero_pgtable); +#endif + + printk("Memory: %luk/%luk available (%dk kernel code, %dk data, %dk init)\n", + (unsigned long)nr_free_pages() << (PAGE_SHIFT-10), + max_mapnr << (PAGE_SHIFT-10), + codepages << (PAGE_SHIFT-10), + datapages << (PAGE_SHIFT-10), + initpages << (PAGE_SHIFT-10)); +} + +#ifdef CONFIG_BLK_DEV_INITRD +void free_initrd_mem(unsigned long start, unsigned long end) +{ + int pages = 0; + for (; start < end; start += PAGE_SIZE) { + ClearPageReserved(virt_to_page(start)); + set_page_count(virt_to_page(start), 1); + free_page(start); + totalram_pages++; + pages++; + } + printk ("Freeing initrd memory: %dk freed\n", pages); +} +#endif diff --git a/arch/m68k/mm/kmap.c b/arch/m68k/mm/kmap.c new file mode 100644 index 000000000000..5dcb3fa35ea9 --- /dev/null +++ b/arch/m68k/mm/kmap.c @@ -0,0 +1,361 @@ +/* + * linux/arch/m68k/mm/kmap.c + * + * Copyright (C) 1997 Roman Hodek + * + * 10/01/99 cleaned up the code and changing to the same interface + * used by other architectures /Roman Zippel + */ + +#include <linux/config.h> +#include <linux/mm.h> +#include <linux/kernel.h> +#include <linux/string.h> +#include <linux/types.h> +#include <linux/slab.h> +#include <linux/vmalloc.h> + +#include <asm/setup.h> +#include <asm/segment.h> +#include <asm/page.h> +#include <asm/pgalloc.h> +#include <asm/io.h> +#include <asm/system.h> + +#undef DEBUG + +#define PTRTREESIZE (256*1024) + +/* + * For 040/060 we can use the virtual memory area like other architectures, + * but for 020/030 we want to use early termination page descriptor and we + * can't mix this with normal page descriptors, so we have to copy that code + * (mm/vmalloc.c) and return appriorate aligned addresses. + */ + +#ifdef CPU_M68040_OR_M68060_ONLY + +#define IO_SIZE PAGE_SIZE + +static inline struct vm_struct *get_io_area(unsigned long size) +{ + return get_vm_area(size, VM_IOREMAP); +} + + +static inline void free_io_area(void *addr) +{ + vfree((void *)(PAGE_MASK & (unsigned long)addr)); +} + +#else + +#define IO_SIZE (256*1024) + +static struct vm_struct *iolist; + +static struct vm_struct *get_io_area(unsigned long size) +{ + unsigned long addr; + struct vm_struct **p, *tmp, *area; + + area = (struct vm_struct *)kmalloc(sizeof(*area), GFP_KERNEL); + if (!area) + return NULL; + addr = KMAP_START; + for (p = &iolist; (tmp = *p) ; p = &tmp->next) { + if (size + addr < (unsigned long)tmp->addr) + break; + if (addr > KMAP_END-size) + return NULL; + addr = tmp->size + (unsigned long)tmp->addr; + } + area->addr = (void *)addr; + area->size = size + IO_SIZE; + area->next = *p; + *p = area; + return area; +} + +static inline void free_io_area(void *addr) +{ + struct vm_struct **p, *tmp; + + if (!addr) + return; + addr = (void *)((unsigned long)addr & -IO_SIZE); + for (p = &iolist ; (tmp = *p) ; p = &tmp->next) { + if (tmp->addr == addr) { + *p = tmp->next; + __iounmap(tmp->addr, tmp->size); + kfree(tmp); + return; + } + } +} + +#endif + +/* + * Map some physical address range into the kernel address space. The + * code is copied and adapted from map_chunk(). + */ +/* Rewritten by Andreas Schwab to remove all races. */ + +void *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag) +{ + struct vm_struct *area; + unsigned long virtaddr, retaddr; + long offset; + pgd_t *pgd_dir; + pmd_t *pmd_dir; + pte_t *pte_dir; + + /* + * Don't allow mappings that wrap.. + */ + if (!size || size > physaddr + size) + return NULL; + +#ifdef CONFIG_AMIGA + if (MACH_IS_AMIGA) { + if ((physaddr >= 0x40000000) && (physaddr + size < 0x60000000) + && (cacheflag == IOMAP_NOCACHE_SER)) + return (void *)physaddr; + } +#endif + +#ifdef DEBUG + printk("ioremap: 0x%lx,0x%lx(%d) - ", physaddr, size, cacheflag); +#endif + /* + * Mappings have to be aligned + */ + offset = physaddr & (IO_SIZE - 1); + physaddr &= -IO_SIZE; + size = (size + offset + IO_SIZE - 1) & -IO_SIZE; + + /* + * Ok, go for it.. + */ + area = get_io_area(size); + if (!area) + return NULL; + + virtaddr = (unsigned long)area->addr; + retaddr = virtaddr + offset; +#ifdef DEBUG + printk("0x%lx,0x%lx,0x%lx", physaddr, virtaddr, retaddr); +#endif + + /* + * add cache and table flags to physical address + */ + if (CPU_IS_040_OR_060) { + physaddr |= (_PAGE_PRESENT | _PAGE_GLOBAL040 | + _PAGE_ACCESSED | _PAGE_DIRTY); + switch (cacheflag) { + case IOMAP_FULL_CACHING: + physaddr |= _PAGE_CACHE040; + break; + case IOMAP_NOCACHE_SER: + default: + physaddr |= _PAGE_NOCACHE_S; + break; + case IOMAP_NOCACHE_NONSER: + physaddr |= _PAGE_NOCACHE; + break; + case IOMAP_WRITETHROUGH: + physaddr |= _PAGE_CACHE040W; + break; + } + } else { + physaddr |= (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_DIRTY); + switch (cacheflag) { + case IOMAP_NOCACHE_SER: + case IOMAP_NOCACHE_NONSER: + default: + physaddr |= _PAGE_NOCACHE030; + break; + case IOMAP_FULL_CACHING: + case IOMAP_WRITETHROUGH: + break; + } + } + + while ((long)size > 0) { +#ifdef DEBUG + if (!(virtaddr & (PTRTREESIZE-1))) + printk ("\npa=%#lx va=%#lx ", physaddr, virtaddr); +#endif + pgd_dir = pgd_offset_k(virtaddr); + pmd_dir = pmd_alloc(&init_mm, pgd_dir, virtaddr); + if (!pmd_dir) { + printk("ioremap: no mem for pmd_dir\n"); + return NULL; + } + + if (CPU_IS_020_OR_030) { + pmd_dir->pmd[(virtaddr/PTRTREESIZE) & 15] = physaddr; + physaddr += PTRTREESIZE; + virtaddr += PTRTREESIZE; + size -= PTRTREESIZE; + } else { + pte_dir = pte_alloc_kernel(&init_mm, pmd_dir, virtaddr); + if (!pte_dir) { + printk("ioremap: no mem for pte_dir\n"); + return NULL; + } + + pte_val(*pte_dir) = physaddr; + virtaddr += PAGE_SIZE; + physaddr += PAGE_SIZE; + size -= PAGE_SIZE; + } + } +#ifdef DEBUG + printk("\n"); +#endif + flush_tlb_all(); + + return (void *)retaddr; +} + +/* + * Unmap a ioremap()ed region again + */ +void iounmap(void *addr) +{ +#ifdef CONFIG_AMIGA + if ((!MACH_IS_AMIGA) || + (((unsigned long)addr < 0x40000000) || + ((unsigned long)addr > 0x60000000))) + free_io_area(addr); +#else + free_io_area(addr); +#endif +} + +/* + * __iounmap unmaps nearly everything, so be careful + * it doesn't free currently pointer/page tables anymore but it + * wans't used anyway and might be added later. + */ +void __iounmap(void *addr, unsigned long size) +{ + unsigned long virtaddr = (unsigned long)addr; + pgd_t *pgd_dir; + pmd_t *pmd_dir; + pte_t *pte_dir; + + while ((long)size > 0) { + pgd_dir = pgd_offset_k(virtaddr); + if (pgd_bad(*pgd_dir)) { + printk("iounmap: bad pgd(%08lx)\n", pgd_val(*pgd_dir)); + pgd_clear(pgd_dir); + return; + } + pmd_dir = pmd_offset(pgd_dir, virtaddr); + + if (CPU_IS_020_OR_030) { + int pmd_off = (virtaddr/PTRTREESIZE) & 15; + + if ((pmd_dir->pmd[pmd_off] & _DESCTYPE_MASK) == _PAGE_PRESENT) { + pmd_dir->pmd[pmd_off] = 0; + virtaddr += PTRTREESIZE; + size -= PTRTREESIZE; + continue; + } + } + + if (pmd_bad(*pmd_dir)) { + printk("iounmap: bad pmd (%08lx)\n", pmd_val(*pmd_dir)); + pmd_clear(pmd_dir); + return; + } + pte_dir = pte_offset_kernel(pmd_dir, virtaddr); + + pte_val(*pte_dir) = 0; + virtaddr += PAGE_SIZE; + size -= PAGE_SIZE; + } + + flush_tlb_all(); +} + +/* + * Set new cache mode for some kernel address space. + * The caller must push data for that range itself, if such data may already + * be in the cache. + */ +void kernel_set_cachemode(void *addr, unsigned long size, int cmode) +{ + unsigned long virtaddr = (unsigned long)addr; + pgd_t *pgd_dir; + pmd_t *pmd_dir; + pte_t *pte_dir; + + if (CPU_IS_040_OR_060) { + switch (cmode) { + case IOMAP_FULL_CACHING: + cmode = _PAGE_CACHE040; + break; + case IOMAP_NOCACHE_SER: + default: + cmode = _PAGE_NOCACHE_S; + break; + case IOMAP_NOCACHE_NONSER: + cmode = _PAGE_NOCACHE; + break; + case IOMAP_WRITETHROUGH: + cmode = _PAGE_CACHE040W; + break; + } + } else { + switch (cmode) { + case IOMAP_NOCACHE_SER: + case IOMAP_NOCACHE_NONSER: + default: + cmode = _PAGE_NOCACHE030; + break; + case IOMAP_FULL_CACHING: + case IOMAP_WRITETHROUGH: + cmode = 0; + } + } + + while ((long)size > 0) { + pgd_dir = pgd_offset_k(virtaddr); + if (pgd_bad(*pgd_dir)) { + printk("iocachemode: bad pgd(%08lx)\n", pgd_val(*pgd_dir)); + pgd_clear(pgd_dir); + return; + } + pmd_dir = pmd_offset(pgd_dir, virtaddr); + + if (CPU_IS_020_OR_030) { + int pmd_off = (virtaddr/PTRTREESIZE) & 15; + + if ((pmd_dir->pmd[pmd_off] & _DESCTYPE_MASK) == _PAGE_PRESENT) { + pmd_dir->pmd[pmd_off] = (pmd_dir->pmd[pmd_off] & + _CACHEMASK040) | cmode; + virtaddr += PTRTREESIZE; + size -= PTRTREESIZE; + continue; + } + } + + if (pmd_bad(*pmd_dir)) { + printk("iocachemode: bad pmd (%08lx)\n", pmd_val(*pmd_dir)); + pmd_clear(pmd_dir); + return; + } + pte_dir = pte_offset_kernel(pmd_dir, virtaddr); + + pte_val(*pte_dir) = (pte_val(*pte_dir) & _CACHEMASK040) | cmode; + virtaddr += PAGE_SIZE; + size -= PAGE_SIZE; + } + + flush_tlb_all(); +} diff --git a/arch/m68k/mm/memory.c b/arch/m68k/mm/memory.c new file mode 100644 index 000000000000..1453a6013721 --- /dev/null +++ b/arch/m68k/mm/memory.c @@ -0,0 +1,471 @@ +/* + * linux/arch/m68k/mm/memory.c + * + * Copyright (C) 1995 Hamish Macdonald + */ + +#include <linux/config.h> +#include <linux/mm.h> +#include <linux/kernel.h> +#include <linux/string.h> +#include <linux/types.h> +#include <linux/slab.h> +#include <linux/init.h> +#include <linux/pagemap.h> + +#include <asm/setup.h> +#include <asm/segment.h> +#include <asm/page.h> +#include <asm/pgalloc.h> +#include <asm/system.h> +#include <asm/traps.h> +#include <asm/machdep.h> + + +/* ++andreas: {get,free}_pointer_table rewritten to use unused fields from + struct page instead of separately kmalloced struct. Stolen from + arch/sparc/mm/srmmu.c ... */ + +typedef struct list_head ptable_desc; +static LIST_HEAD(ptable_list); + +#define PD_PTABLE(page) ((ptable_desc *)&(virt_to_page(page)->lru)) +#define PD_PAGE(ptable) (list_entry(ptable, struct page, lru)) +#define PD_MARKBITS(dp) (*(unsigned char *)&PD_PAGE(dp)->index) + +#define PTABLE_SIZE (PTRS_PER_PMD * sizeof(pmd_t)) + +void __init init_pointer_table(unsigned long ptable) +{ + ptable_desc *dp; + unsigned long page = ptable & PAGE_MASK; + unsigned char mask = 1 << ((ptable - page)/PTABLE_SIZE); + + dp = PD_PTABLE(page); + if (!(PD_MARKBITS(dp) & mask)) { + PD_MARKBITS(dp) = 0xff; + list_add(dp, &ptable_list); + } + + PD_MARKBITS(dp) &= ~mask; +#ifdef DEBUG + printk("init_pointer_table: %lx, %x\n", ptable, PD_MARKBITS(dp)); +#endif + + /* unreserve the page so it's possible to free that page */ + PD_PAGE(dp)->flags &= ~(1 << PG_reserved); + set_page_count(PD_PAGE(dp), 1); + + return; +} + +pmd_t *get_pointer_table (void) +{ + ptable_desc *dp = ptable_list.next; + unsigned char mask = PD_MARKBITS (dp); + unsigned char tmp; + unsigned int off; + + /* + * For a pointer table for a user process address space, a + * table is taken from a page allocated for the purpose. Each + * page can hold 8 pointer tables. The page is remapped in + * virtual address space to be noncacheable. + */ + if (mask == 0) { + void *page; + ptable_desc *new; + + if (!(page = (void *)get_zeroed_page(GFP_KERNEL))) + return NULL; + + flush_tlb_kernel_page(page); + nocache_page(page); + + new = PD_PTABLE(page); + PD_MARKBITS(new) = 0xfe; + list_add_tail(new, dp); + + return (pmd_t *)page; + } + + for (tmp = 1, off = 0; (mask & tmp) == 0; tmp <<= 1, off += PTABLE_SIZE) + ; + PD_MARKBITS(dp) = mask & ~tmp; + if (!PD_MARKBITS(dp)) { + /* move to end of list */ + list_del(dp); + list_add_tail(dp, &ptable_list); + } + return (pmd_t *) (page_address(PD_PAGE(dp)) + off); +} + +int free_pointer_table (pmd_t *ptable) +{ + ptable_desc *dp; + unsigned long page = (unsigned long)ptable & PAGE_MASK; + unsigned char mask = 1 << (((unsigned long)ptable - page)/PTABLE_SIZE); + + dp = PD_PTABLE(page); + if (PD_MARKBITS (dp) & mask) + panic ("table already free!"); + + PD_MARKBITS (dp) |= mask; + + if (PD_MARKBITS(dp) == 0xff) { + /* all tables in page are free, free page */ + list_del(dp); + cache_page((void *)page); + free_page (page); + return 1; + } else if (ptable_list.next != dp) { + /* + * move this descriptor to the front of the list, since + * it has one or more free tables. + */ + list_del(dp); + list_add(dp, &ptable_list); + } + return 0; +} + +#ifdef DEBUG_INVALID_PTOV +int mm_inv_cnt = 5; +#endif + +#ifndef CONFIG_SINGLE_MEMORY_CHUNK +/* + * The following two routines map from a physical address to a kernel + * virtual address and vice versa. + */ +unsigned long mm_vtop(unsigned long vaddr) +{ + int i=0; + unsigned long voff = (unsigned long)vaddr - PAGE_OFFSET; + + do { + if (voff < m68k_memory[i].size) { +#ifdef DEBUGPV + printk ("VTOP(%p)=%lx\n", vaddr, + m68k_memory[i].addr + voff); +#endif + return m68k_memory[i].addr + voff; + } + voff -= m68k_memory[i].size; + } while (++i < m68k_num_memory); + + /* As a special case allow `__pa(high_memory)'. */ + if (voff == 0) + return m68k_memory[i-1].addr + m68k_memory[i-1].size; + + return -1; +} +#endif + +#ifndef CONFIG_SINGLE_MEMORY_CHUNK +unsigned long mm_ptov (unsigned long paddr) +{ + int i = 0; + unsigned long poff, voff = PAGE_OFFSET; + + do { + poff = paddr - m68k_memory[i].addr; + if (poff < m68k_memory[i].size) { +#ifdef DEBUGPV + printk ("PTOV(%lx)=%lx\n", paddr, poff + voff); +#endif + return poff + voff; + } + voff += m68k_memory[i].size; + } while (++i < m68k_num_memory); + +#ifdef DEBUG_INVALID_PTOV + if (mm_inv_cnt > 0) { + mm_inv_cnt--; + printk("Invalid use of phys_to_virt(0x%lx) at 0x%p!\n", + paddr, __builtin_return_address(0)); + } +#endif + return -1; +} +#endif + +/* invalidate page in both caches */ +static inline void clear040(unsigned long paddr) +{ + asm volatile ( + "nop\n\t" + ".chip 68040\n\t" + "cinvp %%bc,(%0)\n\t" + ".chip 68k" + : : "a" (paddr)); +} + +/* invalidate page in i-cache */ +static inline void cleari040(unsigned long paddr) +{ + asm volatile ( + "nop\n\t" + ".chip 68040\n\t" + "cinvp %%ic,(%0)\n\t" + ".chip 68k" + : : "a" (paddr)); +} + +/* push page in both caches */ +/* RZ: cpush %bc DOES invalidate %ic, regardless of DPI */ +static inline void push040(unsigned long paddr) +{ + asm volatile ( + "nop\n\t" + ".chip 68040\n\t" + "cpushp %%bc,(%0)\n\t" + ".chip 68k" + : : "a" (paddr)); +} + +/* push and invalidate page in both caches, must disable ints + * to avoid invalidating valid data */ +static inline void pushcl040(unsigned long paddr) +{ + unsigned long flags; + + local_irq_save(flags); + push040(paddr); + if (CPU_IS_060) + clear040(paddr); + local_irq_restore(flags); +} + +/* + * 040: Hit every page containing an address in the range paddr..paddr+len-1. + * (Low order bits of the ea of a CINVP/CPUSHP are "don't care"s). + * Hit every page until there is a page or less to go. Hit the next page, + * and the one after that if the range hits it. + */ +/* ++roman: A little bit more care is required here: The CINVP instruction + * invalidates cache entries WITHOUT WRITING DIRTY DATA BACK! So the beginning + * and the end of the region must be treated differently if they are not + * exactly at the beginning or end of a page boundary. Else, maybe too much + * data becomes invalidated and thus lost forever. CPUSHP does what we need: + * it invalidates the page after pushing dirty data to memory. (Thanks to Jes + * for discovering the problem!) + */ +/* ... but on the '060, CPUSH doesn't invalidate (for us, since we have set + * the DPI bit in the CACR; would it cause problems with temporarily changing + * this?). So we have to push first and then additionally to invalidate. + */ + + +/* + * cache_clear() semantics: Clear any cache entries for the area in question, + * without writing back dirty entries first. This is useful if the data will + * be overwritten anyway, e.g. by DMA to memory. The range is defined by a + * _physical_ address. + */ + +void cache_clear (unsigned long paddr, int len) +{ + if (CPU_IS_040_OR_060) { + int tmp; + + /* + * We need special treatment for the first page, in case it + * is not page-aligned. Page align the addresses to work + * around bug I17 in the 68060. + */ + if ((tmp = -paddr & (PAGE_SIZE - 1))) { + pushcl040(paddr & PAGE_MASK); + if ((len -= tmp) <= 0) + return; + paddr += tmp; + } + tmp = PAGE_SIZE; + paddr &= PAGE_MASK; + while ((len -= tmp) >= 0) { + clear040(paddr); + paddr += tmp; + } + if ((len += tmp)) + /* a page boundary gets crossed at the end */ + pushcl040(paddr); + } + else /* 68030 or 68020 */ + asm volatile ("movec %/cacr,%/d0\n\t" + "oriw %0,%/d0\n\t" + "movec %/d0,%/cacr" + : : "i" (FLUSH_I_AND_D) + : "d0"); +#ifdef CONFIG_M68K_L2_CACHE + if(mach_l2_flush) + mach_l2_flush(0); +#endif +} + + +/* + * cache_push() semantics: Write back any dirty cache data in the given area, + * and invalidate the range in the instruction cache. It needs not (but may) + * invalidate those entries also in the data cache. The range is defined by a + * _physical_ address. + */ + +void cache_push (unsigned long paddr, int len) +{ + if (CPU_IS_040_OR_060) { + int tmp = PAGE_SIZE; + + /* + * on 68040 or 68060, push cache lines for pages in the range; + * on the '040 this also invalidates the pushed lines, but not on + * the '060! + */ + len += paddr & (PAGE_SIZE - 1); + + /* + * Work around bug I17 in the 68060 affecting some instruction + * lines not being invalidated properly. + */ + paddr &= PAGE_MASK; + + do { + push040(paddr); + paddr += tmp; + } while ((len -= tmp) > 0); + } + /* + * 68030/68020 have no writeback cache. On the other hand, + * cache_push is actually a superset of cache_clear (the lines + * get written back and invalidated), so we should make sure + * to perform the corresponding actions. After all, this is getting + * called in places where we've just loaded code, or whatever, so + * flushing the icache is appropriate; flushing the dcache shouldn't + * be required. + */ + else /* 68030 or 68020 */ + asm volatile ("movec %/cacr,%/d0\n\t" + "oriw %0,%/d0\n\t" + "movec %/d0,%/cacr" + : : "i" (FLUSH_I) + : "d0"); +#ifdef CONFIG_M68K_L2_CACHE + if(mach_l2_flush) + mach_l2_flush(1); +#endif +} + +static unsigned long virt_to_phys_slow(unsigned long vaddr) +{ + if (CPU_IS_060) { + mm_segment_t fs = get_fs(); + unsigned long paddr; + + set_fs(get_ds()); + + /* The PLPAR instruction causes an access error if the translation + * is not possible. To catch this we use the same exception mechanism + * as for user space accesses in <asm/uaccess.h>. */ + asm volatile (".chip 68060\n" + "1: plpar (%0)\n" + ".chip 68k\n" + "2:\n" + ".section .fixup,\"ax\"\n" + " .even\n" + "3: sub.l %0,%0\n" + " jra 2b\n" + ".previous\n" + ".section __ex_table,\"a\"\n" + " .align 4\n" + " .long 1b,3b\n" + ".previous" + : "=a" (paddr) + : "0" (vaddr)); + set_fs(fs); + return paddr; + } else if (CPU_IS_040) { + mm_segment_t fs = get_fs(); + unsigned long mmusr; + + set_fs(get_ds()); + + asm volatile (".chip 68040\n\t" + "ptestr (%1)\n\t" + "movec %%mmusr, %0\n\t" + ".chip 68k" + : "=r" (mmusr) + : "a" (vaddr)); + set_fs(fs); + + if (mmusr & MMU_R_040) + return (mmusr & PAGE_MASK) | (vaddr & ~PAGE_MASK); + } else { + unsigned short mmusr; + unsigned long *descaddr; + + asm volatile ("ptestr #5,%2@,#7,%0\n\t" + "pmove %%psr,%1@" + : "=a&" (descaddr) + : "a" (&mmusr), "a" (vaddr)); + if (mmusr & (MMU_I|MMU_B|MMU_L)) + return 0; + descaddr = phys_to_virt((unsigned long)descaddr); + switch (mmusr & MMU_NUM) { + case 1: + return (*descaddr & 0xfe000000) | (vaddr & 0x01ffffff); + case 2: + return (*descaddr & 0xfffc0000) | (vaddr & 0x0003ffff); + case 3: + return (*descaddr & PAGE_MASK) | (vaddr & ~PAGE_MASK); + } + } + return 0; +} + +/* Push n pages at kernel virtual address and clear the icache */ +/* RZ: use cpush %bc instead of cpush %dc, cinv %ic */ +void flush_icache_range(unsigned long address, unsigned long endaddr) +{ + if (CPU_IS_040_OR_060) { + address &= PAGE_MASK; + + if (address >= PAGE_OFFSET && address < (unsigned long)high_memory) { + do { + asm volatile ("nop\n\t" + ".chip 68040\n\t" + "cpushp %%bc,(%0)\n\t" + ".chip 68k" + : : "a" (virt_to_phys((void *)address))); + address += PAGE_SIZE; + } while (address < endaddr); + } else { + do { + asm volatile ("nop\n\t" + ".chip 68040\n\t" + "cpushp %%bc,(%0)\n\t" + ".chip 68k" + : : "a" (virt_to_phys_slow(address))); + address += PAGE_SIZE; + } while (address < endaddr); + } + } else { + unsigned long tmp; + asm volatile ("movec %%cacr,%0\n\t" + "orw %1,%0\n\t" + "movec %0,%%cacr" + : "=&d" (tmp) + : "di" (FLUSH_I)); + } +} + + +#ifndef CONFIG_SINGLE_MEMORY_CHUNK +int mm_end_of_chunk (unsigned long addr, int len) +{ + int i; + + for (i = 0; i < m68k_num_memory; i++) + if (m68k_memory[i].addr + m68k_memory[i].size == addr + len) + return 1; + return 0; +} +#endif diff --git a/arch/m68k/mm/motorola.c b/arch/m68k/mm/motorola.c new file mode 100644 index 000000000000..d855fec26317 --- /dev/null +++ b/arch/m68k/mm/motorola.c @@ -0,0 +1,285 @@ +/* + * linux/arch/m68k/motorola.c + * + * Routines specific to the Motorola MMU, originally from: + * linux/arch/m68k/init.c + * which are Copyright (C) 1995 Hamish Macdonald + * + * Moved 8/20/1999 Sam Creasey + */ + +#include <linux/config.h> +#include <linux/module.h> +#include <linux/signal.h> +#include <linux/sched.h> +#include <linux/mm.h> +#include <linux/swap.h> +#include <linux/kernel.h> +#include <linux/string.h> +#include <linux/types.h> +#include <linux/init.h> +#include <linux/bootmem.h> + +#include <asm/setup.h> +#include <asm/uaccess.h> +#include <asm/page.h> +#include <asm/pgalloc.h> +#include <asm/system.h> +#include <asm/machdep.h> +#include <asm/io.h> +#include <asm/dma.h> +#ifdef CONFIG_ATARI +#include <asm/atari_stram.h> +#endif + +#undef DEBUG + +#ifndef mm_cachebits +/* + * Bits to add to page descriptors for "normal" caching mode. + * For 68020/030 this is 0. + * For 68040, this is _PAGE_CACHE040 (cachable, copyback) + */ +unsigned long mm_cachebits; +EXPORT_SYMBOL(mm_cachebits); +#endif + +static pte_t * __init kernel_page_table(void) +{ + pte_t *ptablep; + + ptablep = (pte_t *)alloc_bootmem_low_pages(PAGE_SIZE); + + clear_page(ptablep); + __flush_page_to_ram(ptablep); + flush_tlb_kernel_page(ptablep); + nocache_page(ptablep); + + return ptablep; +} + +static pmd_t *last_pgtable __initdata = NULL; +pmd_t *zero_pgtable __initdata = NULL; + +static pmd_t * __init kernel_ptr_table(void) +{ + if (!last_pgtable) { + unsigned long pmd, last; + int i; + + /* Find the last ptr table that was used in head.S and + * reuse the remaining space in that page for further + * ptr tables. + */ + last = (unsigned long)kernel_pg_dir; + for (i = 0; i < PTRS_PER_PGD; i++) { + if (!pgd_present(kernel_pg_dir[i])) + continue; + pmd = __pgd_page(kernel_pg_dir[i]); + if (pmd > last) + last = pmd; + } + + last_pgtable = (pmd_t *)last; +#ifdef DEBUG + printk("kernel_ptr_init: %p\n", last_pgtable); +#endif + } + + last_pgtable += PTRS_PER_PMD; + if (((unsigned long)last_pgtable & ~PAGE_MASK) == 0) { + last_pgtable = (pmd_t *)alloc_bootmem_low_pages(PAGE_SIZE); + + clear_page(last_pgtable); + __flush_page_to_ram(last_pgtable); + flush_tlb_kernel_page(last_pgtable); + nocache_page(last_pgtable); + } + + return last_pgtable; +} + +static unsigned long __init +map_chunk (unsigned long addr, long size) +{ +#define PTRTREESIZE (256*1024) +#define ROOTTREESIZE (32*1024*1024) + static unsigned long virtaddr = PAGE_OFFSET; + unsigned long physaddr; + pgd_t *pgd_dir; + pmd_t *pmd_dir; + pte_t *pte_dir; + + physaddr = (addr | m68k_supervisor_cachemode | + _PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_DIRTY); + if (CPU_IS_040_OR_060) + physaddr |= _PAGE_GLOBAL040; + + while (size > 0) { +#ifdef DEBUG + if (!(virtaddr & (PTRTREESIZE-1))) + printk ("\npa=%#lx va=%#lx ", physaddr & PAGE_MASK, + virtaddr); +#endif + pgd_dir = pgd_offset_k(virtaddr); + if (virtaddr && CPU_IS_020_OR_030) { + if (!(virtaddr & (ROOTTREESIZE-1)) && + size >= ROOTTREESIZE) { +#ifdef DEBUG + printk ("[very early term]"); +#endif + pgd_val(*pgd_dir) = physaddr; + size -= ROOTTREESIZE; + virtaddr += ROOTTREESIZE; + physaddr += ROOTTREESIZE; + continue; + } + } + if (!pgd_present(*pgd_dir)) { + pmd_dir = kernel_ptr_table(); +#ifdef DEBUG + printk ("[new pointer %p]", pmd_dir); +#endif + pgd_set(pgd_dir, pmd_dir); + } else + pmd_dir = pmd_offset(pgd_dir, virtaddr); + + if (CPU_IS_020_OR_030) { + if (virtaddr) { +#ifdef DEBUG + printk ("[early term]"); +#endif + pmd_dir->pmd[(virtaddr/PTRTREESIZE) & 15] = physaddr; + physaddr += PTRTREESIZE; + } else { + int i; +#ifdef DEBUG + printk ("[zero map]"); +#endif + zero_pgtable = kernel_ptr_table(); + pte_dir = (pte_t *)zero_pgtable; + pmd_dir->pmd[0] = virt_to_phys(pte_dir) | + _PAGE_TABLE | _PAGE_ACCESSED; + pte_val(*pte_dir++) = 0; + physaddr += PAGE_SIZE; + for (i = 1; i < 64; physaddr += PAGE_SIZE, i++) + pte_val(*pte_dir++) = physaddr; + } + size -= PTRTREESIZE; + virtaddr += PTRTREESIZE; + } else { + if (!pmd_present(*pmd_dir)) { +#ifdef DEBUG + printk ("[new table]"); +#endif + pte_dir = kernel_page_table(); + pmd_set(pmd_dir, pte_dir); + } + pte_dir = pte_offset_kernel(pmd_dir, virtaddr); + + if (virtaddr) { + if (!pte_present(*pte_dir)) + pte_val(*pte_dir) = physaddr; + } else + pte_val(*pte_dir) = 0; + size -= PAGE_SIZE; + virtaddr += PAGE_SIZE; + physaddr += PAGE_SIZE; + } + + } +#ifdef DEBUG + printk("\n"); +#endif + + return virtaddr; +} + +/* + * paging_init() continues the virtual memory environment setup which + * was begun by the code in arch/head.S. + */ +void __init paging_init(void) +{ + int chunk; + unsigned long mem_avail = 0; + unsigned long zones_size[3] = { 0, }; + +#ifdef DEBUG + { + extern unsigned long availmem; + printk ("start of paging_init (%p, %lx, %lx, %lx)\n", + kernel_pg_dir, availmem, start_mem, end_mem); + } +#endif + + /* Fix the cache mode in the page descriptors for the 680[46]0. */ + if (CPU_IS_040_OR_060) { + int i; +#ifndef mm_cachebits + mm_cachebits = _PAGE_CACHE040; +#endif + for (i = 0; i < 16; i++) + pgprot_val(protection_map[i]) |= _PAGE_CACHE040; + } + + /* + * Map the physical memory available into the kernel virtual + * address space. It may allocate some memory for page + * tables and thus modify availmem. + */ + + for (chunk = 0; chunk < m68k_num_memory; chunk++) { + mem_avail = map_chunk (m68k_memory[chunk].addr, + m68k_memory[chunk].size); + + } + + flush_tlb_all(); +#ifdef DEBUG + printk ("memory available is %ldKB\n", mem_avail >> 10); + printk ("start_mem is %#lx\nvirtual_end is %#lx\n", + start_mem, end_mem); +#endif + + /* + * initialize the bad page table and bad page to point + * to a couple of allocated pages + */ + empty_zero_page = alloc_bootmem_pages(PAGE_SIZE); + memset(empty_zero_page, 0, PAGE_SIZE); + + /* + * Set up SFC/DFC registers + */ + set_fs(KERNEL_DS); + +#ifdef DEBUG + printk ("before free_area_init\n"); +#endif + zones_size[0] = (mach_max_dma_address < (unsigned long)high_memory ? + (mach_max_dma_address+1) : (unsigned long)high_memory); + zones_size[1] = (unsigned long)high_memory - zones_size[0]; + + zones_size[0] = (zones_size[0] - PAGE_OFFSET) >> PAGE_SHIFT; + zones_size[1] >>= PAGE_SHIFT; + + free_area_init(zones_size); +} + +extern char __init_begin, __init_end; + +void free_initmem(void) +{ + unsigned long addr; + + addr = (unsigned long)&__init_begin; + for (; addr < (unsigned long)&__init_end; addr += PAGE_SIZE) { + virt_to_page(addr)->flags &= ~(1 << PG_reserved); + set_page_count(virt_to_page(addr), 1); + free_page(addr); + totalram_pages++; + } +} + + diff --git a/arch/m68k/mm/sun3kmap.c b/arch/m68k/mm/sun3kmap.c new file mode 100644 index 000000000000..7f0d86f3fe73 --- /dev/null +++ b/arch/m68k/mm/sun3kmap.c @@ -0,0 +1,156 @@ +/* + * linux/arch/m68k/mm/sun3kmap.c + * + * Copyright (C) 2002 Sam Creasey <sammy@sammy.net> + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive + * for more details. + */ + +#include <linux/types.h> +#include <linux/kernel.h> +#include <linux/mm.h> +#include <linux/vmalloc.h> + +#include <asm/page.h> +#include <asm/pgtable.h> +#include <asm/io.h> +#include <asm/sun3mmu.h> + +#undef SUN3_KMAP_DEBUG + +#ifdef SUN3_KMAP_DEBUG +extern void print_pte_vaddr(unsigned long vaddr); +#endif + +extern void mmu_emu_map_pmeg (int context, int vaddr); + +static inline void do_page_mapin(unsigned long phys, unsigned long virt, + unsigned long type) +{ + unsigned long pte; + pte_t ptep; + + ptep = pfn_pte(phys >> PAGE_SHIFT, PAGE_KERNEL); + pte = pte_val(ptep); + pte |= type; + + sun3_put_pte(virt, pte); + +#ifdef SUN3_KMAP_DEBUG + print_pte_vaddr(virt); +#endif + +} + +static inline void do_pmeg_mapin(unsigned long phys, unsigned long virt, + unsigned long type, int pages) +{ + + if(sun3_get_segmap(virt & ~SUN3_PMEG_MASK) == SUN3_INVALID_PMEG) + mmu_emu_map_pmeg(sun3_get_context(), virt); + + while(pages) { + do_page_mapin(phys, virt, type); + phys += PAGE_SIZE; + virt += PAGE_SIZE; + pages--; + } +} + +void *sun3_ioremap(unsigned long phys, unsigned long size, + unsigned long type) +{ + struct vm_struct *area; + unsigned long offset, virt, ret; + int pages; + + if(!size) + return NULL; + + /* page align */ + offset = phys & (PAGE_SIZE-1); + phys &= ~(PAGE_SIZE-1); + + size += offset; + size = PAGE_ALIGN(size); + if((area = get_vm_area(size, VM_IOREMAP)) == NULL) + return NULL; + +#ifdef SUN3_KMAP_DEBUG + printk("ioremap: got virt %p size %lx(%lx)\n", + area->addr, size, area->size); +#endif + + pages = size / PAGE_SIZE; + virt = (unsigned long)area->addr; + ret = virt + offset; + + while(pages) { + int seg_pages; + + seg_pages = (SUN3_PMEG_SIZE - (virt & SUN3_PMEG_MASK)) / PAGE_SIZE; + if(seg_pages > pages) + seg_pages = pages; + + do_pmeg_mapin(phys, virt, type, seg_pages); + + pages -= seg_pages; + phys += seg_pages * PAGE_SIZE; + virt += seg_pages * PAGE_SIZE; + } + + return (void *)ret; + +} + + +void *__ioremap(unsigned long phys, unsigned long size, int cache) +{ + + return sun3_ioremap(phys, size, SUN3_PAGE_TYPE_IO); + +} + +void iounmap(void *addr) +{ + vfree((void *)(PAGE_MASK & (unsigned long)addr)); +} + +/* sun3_map_test(addr, val) -- Reads a byte from addr, storing to val, + * trapping the potential read fault. Returns 0 if the access faulted, + * 1 on success. + * + * This function is primarily used to check addresses on the VME bus. + * + * Mucking with the page fault handler seems a little hackish to me, but + * SunOS, NetBSD, and Mach all implemented this check in such a manner, + * so I figure we're allowed. + */ +int sun3_map_test(unsigned long addr, char *val) +{ + int ret = 0; + + __asm__ __volatile__ + (".globl _sun3_map_test_start\n" + "_sun3_map_test_start:\n" + "1: moveb (%2), (%0)\n" + " moveq #1, %1\n" + "2:\n" + ".section .fixup,\"ax\"\n" + ".even\n" + "3: moveq #0, %1\n" + " jmp 2b\n" + ".previous\n" + ".section __ex_table,\"a\"\n" + ".align 4\n" + ".long 1b,3b\n" + ".previous\n" + ".globl _sun3_map_test_end\n" + "_sun3_map_test_end:\n" + : "=a"(val), "=r"(ret) + : "a"(addr)); + + return ret; +} diff --git a/arch/m68k/mm/sun3mmu.c b/arch/m68k/mm/sun3mmu.c new file mode 100644 index 000000000000..a47be196a47c --- /dev/null +++ b/arch/m68k/mm/sun3mmu.c @@ -0,0 +1,102 @@ +/* + * linux/arch/m68k/mm/sun3mmu.c + * + * Implementations of mm routines specific to the sun3 MMU. + * + * Moved here 8/20/1999 Sam Creasey + * + */ + +#include <linux/signal.h> +#include <linux/sched.h> +#include <linux/mm.h> +#include <linux/swap.h> +#include <linux/kernel.h> +#include <linux/string.h> +#include <linux/types.h> +#include <linux/init.h> +#include <linux/bootmem.h> + +#include <asm/setup.h> +#include <asm/uaccess.h> +#include <asm/page.h> +#include <asm/pgtable.h> +#include <asm/system.h> +#include <asm/machdep.h> +#include <asm/io.h> + +extern void mmu_emu_init (unsigned long bootmem_end); + +const char bad_pmd_string[] = "Bad pmd in pte_alloc: %08lx\n"; + +extern unsigned long num_pages; + +void free_initmem(void) +{ +} + +/* For the sun3 we try to follow the i386 paging_init() more closely */ +/* start_mem and end_mem have PAGE_OFFSET added already */ +/* now sets up tables using sun3 PTEs rather than i386 as before. --m */ +void __init paging_init(void) +{ + pgd_t * pg_dir; + pte_t * pg_table; + int i; + unsigned long address; + unsigned long next_pgtable; + unsigned long bootmem_end; + unsigned long zones_size[3] = {0, 0, 0}; + unsigned long size; + + +#ifdef TEST_VERIFY_AREA + wp_works_ok = 0; +#endif + empty_zero_page = alloc_bootmem_pages(PAGE_SIZE); + memset(empty_zero_page, 0, PAGE_SIZE); + + address = PAGE_OFFSET; + pg_dir = swapper_pg_dir; + memset (swapper_pg_dir, 0, sizeof (swapper_pg_dir)); + memset (kernel_pg_dir, 0, sizeof (kernel_pg_dir)); + + size = num_pages * sizeof(pte_t); + size = (size + PAGE_SIZE) & ~(PAGE_SIZE-1); + + next_pgtable = (unsigned long)alloc_bootmem_pages(size); + bootmem_end = (next_pgtable + size + PAGE_SIZE) & PAGE_MASK; + + /* Map whole memory from PAGE_OFFSET (0x0E000000) */ + pg_dir += PAGE_OFFSET >> PGDIR_SHIFT; + + while (address < (unsigned long)high_memory) { + pg_table = (pte_t *) __pa (next_pgtable); + next_pgtable += PTRS_PER_PTE * sizeof (pte_t); + pgd_val(*pg_dir) = (unsigned long) pg_table; + pg_dir++; + + /* now change pg_table to kernel virtual addresses */ + pg_table = (pte_t *) __va ((unsigned long) pg_table); + for (i=0; i<PTRS_PER_PTE; ++i, ++pg_table) { + pte_t pte = pfn_pte(virt_to_pfn(address), PAGE_INIT); + if (address >= (unsigned long)high_memory) + pte_val (pte) = 0; + set_pte (pg_table, pte); + address += PAGE_SIZE; + } + } + + mmu_emu_init(bootmem_end); + + current->mm = NULL; + + /* memory sizing is a hack stolen from motorola.c.. hope it works for us */ + zones_size[0] = ((unsigned long)high_memory - PAGE_OFFSET) >> PAGE_SHIFT; + zones_size[1] = 0; + + free_area_init(zones_size); + +} + + |