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-rw-r--r--arch/arm/Kconfig1
-rw-r--r--arch/arm/boot/dts/ecx-2000.dts4
-rw-r--r--arch/arm/boot/dts/highbank.dts20
-rw-r--r--arch/arm/mach-highbank/highbank.c2
-rw-r--r--arch/arm/mach-highbank/hotplug.c2
-rw-r--r--arch/arm/mach-highbank/platsmp.c12
-rw-r--r--arch/arm/mach-highbank/pm.c19
-rw-r--r--arch/arm/mach-highbank/sysregs.h23
-rw-r--r--arch/arm/mach-highbank/system.c4
-rw-r--r--arch/arm/mach-nomadik/board-nhk8815.c1
-rw-r--r--arch/arm/mach-nomadik/include/mach/irqs.h78
11 files changed, 97 insertions, 69 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index f95ba14ae3d0..ab864d9545dd 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -371,7 +371,6 @@ config ARCH_CNS3XXX
config ARCH_CLPS711X
bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
select ARCH_REQUIRE_GPIOLIB
- select ARCH_USES_GETTIMEOFFSET
select AUTO_ZRELADDR
select CLKDEV_LOOKUP
select COMMON_CLK
diff --git a/arch/arm/boot/dts/ecx-2000.dts b/arch/arm/boot/dts/ecx-2000.dts
index 46477ac1de99..139b40cc3a23 100644
--- a/arch/arm/boot/dts/ecx-2000.dts
+++ b/arch/arm/boot/dts/ecx-2000.dts
@@ -32,6 +32,7 @@
cpu@0 {
compatible = "arm,cortex-a15";
+ device_type = "cpu";
reg = <0>;
clocks = <&a9pll>;
clock-names = "cpu";
@@ -39,6 +40,7 @@
cpu@1 {
compatible = "arm,cortex-a15";
+ device_type = "cpu";
reg = <1>;
clocks = <&a9pll>;
clock-names = "cpu";
@@ -46,6 +48,7 @@
cpu@2 {
compatible = "arm,cortex-a15";
+ device_type = "cpu";
reg = <2>;
clocks = <&a9pll>;
clock-names = "cpu";
@@ -53,6 +56,7 @@
cpu@3 {
compatible = "arm,cortex-a15";
+ device_type = "cpu";
reg = <3>;
clocks = <&a9pll>;
clock-names = "cpu";
diff --git a/arch/arm/boot/dts/highbank.dts b/arch/arm/boot/dts/highbank.dts
index a9ae5d32e80d..5927a8df5625 100644
--- a/arch/arm/boot/dts/highbank.dts
+++ b/arch/arm/boot/dts/highbank.dts
@@ -30,33 +30,37 @@
#address-cells = <1>;
#size-cells = <0>;
- cpu@0 {
+ cpu@900 {
compatible = "arm,cortex-a9";
- reg = <0>;
+ device_type = "cpu";
+ reg = <0x900>;
next-level-cache = <&L2>;
clocks = <&a9pll>;
clock-names = "cpu";
};
- cpu@1 {
+ cpu@901 {
compatible = "arm,cortex-a9";
- reg = <1>;
+ device_type = "cpu";
+ reg = <0x901>;
next-level-cache = <&L2>;
clocks = <&a9pll>;
clock-names = "cpu";
};
- cpu@2 {
+ cpu@902 {
compatible = "arm,cortex-a9";
- reg = <2>;
+ device_type = "cpu";
+ reg = <0x902>;
next-level-cache = <&L2>;
clocks = <&a9pll>;
clock-names = "cpu";
};
- cpu@3 {
+ cpu@903 {
compatible = "arm,cortex-a9";
- reg = <3>;
+ device_type = "cpu";
+ reg = <0x903>;
next-level-cache = <&L2>;
clocks = <&a9pll>;
clock-names = "cpu";
diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c
index dc248167d206..981dc1e1da51 100644
--- a/arch/arm/mach-highbank/highbank.c
+++ b/arch/arm/mach-highbank/highbank.c
@@ -135,7 +135,7 @@ static struct sys_timer highbank_timer = {
static void highbank_power_off(void)
{
- hignbank_set_pwr_shutdown();
+ highbank_set_pwr_shutdown();
while (1)
cpu_do_idle();
diff --git a/arch/arm/mach-highbank/hotplug.c b/arch/arm/mach-highbank/hotplug.c
index 7b60faccd551..f30c52843396 100644
--- a/arch/arm/mach-highbank/hotplug.c
+++ b/arch/arm/mach-highbank/hotplug.c
@@ -30,7 +30,7 @@ void __ref highbank_cpu_die(unsigned int cpu)
{
flush_cache_all();
- highbank_set_cpu_jump(cpu, secondary_startup);
+ highbank_set_cpu_jump(cpu, phys_to_virt(0));
highbank_set_core_pwr();
cpu_do_idle();
diff --git a/arch/arm/mach-highbank/platsmp.c b/arch/arm/mach-highbank/platsmp.c
index 1129957f6c1d..4ecc864ac8b9 100644
--- a/arch/arm/mach-highbank/platsmp.c
+++ b/arch/arm/mach-highbank/platsmp.c
@@ -32,6 +32,7 @@ static void __cpuinit highbank_secondary_init(unsigned int cpu)
static int __cpuinit highbank_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
+ highbank_set_cpu_jump(cpu, secondary_startup);
gic_raise_softirq(cpumask_of(cpu), 0);
return 0;
}
@@ -61,19 +62,8 @@ static void __init highbank_smp_init_cpus(void)
static void __init highbank_smp_prepare_cpus(unsigned int max_cpus)
{
- int i;
-
if (scu_base_addr)
scu_enable(scu_base_addr);
-
- /*
- * Write the address of secondary startup into the jump table
- * The cores are in wfi and wait until they receive a soft interrupt
- * and a non-zero value to jump to. Then the secondary CPU branches
- * to this address.
- */
- for (i = 1; i < max_cpus; i++)
- highbank_set_cpu_jump(i, secondary_startup);
}
struct smp_operations highbank_smp_ops __initdata = {
diff --git a/arch/arm/mach-highbank/pm.c b/arch/arm/mach-highbank/pm.c
index 74aa135966f0..04eddb4f4380 100644
--- a/arch/arm/mach-highbank/pm.c
+++ b/arch/arm/mach-highbank/pm.c
@@ -14,10 +14,12 @@
* this program. If not, see <http://www.gnu.org/licenses/>.
*/
+#include <linux/cpu_pm.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/suspend.h>
+#include <asm/cacheflush.h>
#include <asm/proc-fns.h>
#include <asm/suspend.h>
@@ -26,16 +28,31 @@
static int highbank_suspend_finish(unsigned long val)
{
+ outer_flush_all();
+ outer_disable();
+
+ highbank_set_pwr_suspend();
+
cpu_do_idle();
+
+ highbank_clear_pwr_request();
return 0;
}
static int highbank_pm_enter(suspend_state_t state)
{
- hignbank_set_pwr_suspend();
+ cpu_pm_enter();
+ cpu_cluster_pm_enter();
+
highbank_set_cpu_jump(0, cpu_resume);
cpu_suspend(0, highbank_suspend_finish);
+ cpu_cluster_pm_exit();
+ cpu_pm_exit();
+
+ highbank_smc1(0x102, 0x1);
+ if (scu_base_addr)
+ scu_enable(scu_base_addr);
return 0;
}
diff --git a/arch/arm/mach-highbank/sysregs.h b/arch/arm/mach-highbank/sysregs.h
index e13e8ea7c6cb..70af9d13fcef 100644
--- a/arch/arm/mach-highbank/sysregs.h
+++ b/arch/arm/mach-highbank/sysregs.h
@@ -44,28 +44,43 @@ static inline void highbank_set_core_pwr(void)
writel_relaxed(1, sregs_base + SREG_CPU_PWR_CTRL(cpu));
}
-static inline void hignbank_set_pwr_suspend(void)
+static inline void highbank_clear_core_pwr(void)
+{
+ int cpu = cpu_logical_map(smp_processor_id());
+ if (scu_base_addr)
+ scu_power_mode(scu_base_addr, SCU_PM_NORMAL);
+ else
+ writel_relaxed(0, sregs_base + SREG_CPU_PWR_CTRL(cpu));
+}
+
+static inline void highbank_set_pwr_suspend(void)
{
writel(HB_PWR_SUSPEND, sregs_base + HB_SREG_A9_PWR_REQ);
highbank_set_core_pwr();
}
-static inline void hignbank_set_pwr_shutdown(void)
+static inline void highbank_set_pwr_shutdown(void)
{
writel(HB_PWR_SHUTDOWN, sregs_base + HB_SREG_A9_PWR_REQ);
highbank_set_core_pwr();
}
-static inline void hignbank_set_pwr_soft_reset(void)
+static inline void highbank_set_pwr_soft_reset(void)
{
writel(HB_PWR_SOFT_RESET, sregs_base + HB_SREG_A9_PWR_REQ);
highbank_set_core_pwr();
}
-static inline void hignbank_set_pwr_hard_reset(void)
+static inline void highbank_set_pwr_hard_reset(void)
{
writel(HB_PWR_HARD_RESET, sregs_base + HB_SREG_A9_PWR_REQ);
highbank_set_core_pwr();
}
+static inline void highbank_clear_pwr_request(void)
+{
+ writel(~0UL, sregs_base + HB_SREG_A9_PWR_REQ);
+ highbank_clear_core_pwr();
+}
+
#endif
diff --git a/arch/arm/mach-highbank/system.c b/arch/arm/mach-highbank/system.c
index aed96ad9bd4a..37d8384dcf19 100644
--- a/arch/arm/mach-highbank/system.c
+++ b/arch/arm/mach-highbank/system.c
@@ -22,9 +22,9 @@
void highbank_restart(char mode, const char *cmd)
{
if (mode == 'h')
- hignbank_set_pwr_hard_reset();
+ highbank_set_pwr_hard_reset();
else
- hignbank_set_pwr_soft_reset();
+ highbank_set_pwr_soft_reset();
while (1)
cpu_do_idle();
diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c
index 98167a4319f7..9f19069248da 100644
--- a/arch/arm/mach-nomadik/board-nhk8815.c
+++ b/arch/arm/mach-nomadik/board-nhk8815.c
@@ -27,7 +27,6 @@
#include <linux/pinctrl/machine.h>
#include <linux/platform_data/pinctrl-nomadik.h>
#include <linux/platform_data/clocksource-nomadik-mtu.h>
-#include <linux/platform_data/mtd-nomadik-nand.h>
#include <asm/hardware/vic.h>
#include <asm/sizes.h>
#include <asm/mach-types.h>
diff --git a/arch/arm/mach-nomadik/include/mach/irqs.h b/arch/arm/mach-nomadik/include/mach/irqs.h
index b549d0571548..215f8cdb4004 100644
--- a/arch/arm/mach-nomadik/include/mach/irqs.h
+++ b/arch/arm/mach-nomadik/include/mach/irqs.h
@@ -22,49 +22,49 @@
#include <mach/hardware.h>
-#define IRQ_VIC_START 1 /* first VIC interrupt is 1 */
+#define IRQ_VIC_START 32 /* first VIC interrupt is 1 */
/*
* Interrupt numbers generic for all Nomadik Chip cuts
*/
-#define IRQ_WATCHDOG 1
-#define IRQ_SOFTINT 2
-#define IRQ_CRYPTO 3
-#define IRQ_OWM 4
-#define IRQ_MTU0 5
-#define IRQ_MTU1 6
-#define IRQ_GPIO0 7
-#define IRQ_GPIO1 8
-#define IRQ_GPIO2 9
-#define IRQ_GPIO3 10
-#define IRQ_RTC_RTT 11
-#define IRQ_SSP 12
-#define IRQ_UART0 13
-#define IRQ_DMA1 14
-#define IRQ_CLCD_MDIF 15
-#define IRQ_DMA0 16
-#define IRQ_PWRFAIL 17
-#define IRQ_UART1 18
-#define IRQ_FIRDA 19
-#define IRQ_MSP0 20
-#define IRQ_I2C0 21
-#define IRQ_I2C1 22
-#define IRQ_SDMMC 23
-#define IRQ_USBOTG 24
-#define IRQ_SVA_IT0 25
-#define IRQ_SVA_IT1 26
-#define IRQ_SAA_IT0 27
-#define IRQ_SAA_IT1 28
-#define IRQ_UART2 29
-#define IRQ_MSP2 30
-#define IRQ_L2CC 49
-#define IRQ_HPI 50
-#define IRQ_SKE 51
-#define IRQ_KP 52
-#define IRQ_MEMST 55
-#define IRQ_SGA_IT 59
-#define IRQ_USBM 61
-#define IRQ_MSP1 63
+#define IRQ_WATCHDOG (IRQ_VIC_START+0)
+#define IRQ_SOFTINT (IRQ_VIC_START+1)
+#define IRQ_CRYPTO (IRQ_VIC_START+2)
+#define IRQ_OWM (IRQ_VIC_START+3)
+#define IRQ_MTU0 (IRQ_VIC_START+4)
+#define IRQ_MTU1 (IRQ_VIC_START+5)
+#define IRQ_GPIO0 (IRQ_VIC_START+6)
+#define IRQ_GPIO1 (IRQ_VIC_START+7)
+#define IRQ_GPIO2 (IRQ_VIC_START+8)
+#define IRQ_GPIO3 (IRQ_VIC_START+9)
+#define IRQ_RTC_RTT (IRQ_VIC_START+10)
+#define IRQ_SSP (IRQ_VIC_START+11)
+#define IRQ_UART0 (IRQ_VIC_START+12)
+#define IRQ_DMA1 (IRQ_VIC_START+13)
+#define IRQ_CLCD_MDIF (IRQ_VIC_START+14)
+#define IRQ_DMA0 (IRQ_VIC_START+15)
+#define IRQ_PWRFAIL (IRQ_VIC_START+16)
+#define IRQ_UART1 (IRQ_VIC_START+17)
+#define IRQ_FIRDA (IRQ_VIC_START+18)
+#define IRQ_MSP0 (IRQ_VIC_START+19)
+#define IRQ_I2C0 (IRQ_VIC_START+20)
+#define IRQ_I2C1 (IRQ_VIC_START+21)
+#define IRQ_SDMMC (IRQ_VIC_START+22)
+#define IRQ_USBOTG (IRQ_VIC_START+23)
+#define IRQ_SVA_IT0 (IRQ_VIC_START+24)
+#define IRQ_SVA_IT1 (IRQ_VIC_START+25)
+#define IRQ_SAA_IT0 (IRQ_VIC_START+26)
+#define IRQ_SAA_IT1 (IRQ_VIC_START+27)
+#define IRQ_UART2 (IRQ_VIC_START+28)
+#define IRQ_MSP2 (IRQ_VIC_START+29)
+#define IRQ_L2CC (IRQ_VIC_START+30)
+#define IRQ_HPI (IRQ_VIC_START+31)
+#define IRQ_SKE (IRQ_VIC_START+32)
+#define IRQ_KP (IRQ_VIC_START+33)
+#define IRQ_MEMST (IRQ_VIC_START+34)
+#define IRQ_SGA_IT (IRQ_VIC_START+35)
+#define IRQ_USBM (IRQ_VIC_START+36)
+#define IRQ_MSP1 (IRQ_VIC_START+37)
#define NOMADIK_GPIO_OFFSET (IRQ_VIC_START+64)
generated by cgit v1.2.3 (git 2.39.0) at 2025-01-15 06:57:01 +0300