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Diffstat (limited to 'arch/arm64/boot/dts/qcom/msm8996.dtsi')
-rw-r--r--arch/arm64/boot/dts/qcom/msm8996.dtsi62
1 files changed, 31 insertions, 31 deletions
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 30257c07e127..0cb2d4f08c3a 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -606,7 +606,7 @@
};
};
- soc: soc {
+ soc: soc@0 {
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0 0xffffffff>;
@@ -889,16 +889,16 @@
#power-domain-cells = <1>;
reg = <0x008c0000 0x40000>;
clocks = <&xo_board>,
- <&gcc GCC_MMSS_NOC_CFG_AHB_CLK>,
<&gcc GPLL0>,
- <&dsi0_phy 1>,
- <&dsi0_phy 0>,
- <&dsi1_phy 1>,
- <&dsi1_phy 0>,
- <&hdmi_phy>;
+ <&gcc GCC_MMSS_NOC_CFG_AHB_CLK>,
+ <&mdss_dsi0_phy 1>,
+ <&mdss_dsi0_phy 0>,
+ <&mdss_dsi1_phy 1>,
+ <&mdss_dsi1_phy 0>,
+ <&mdss_hdmi_phy>;
clock-names = "xo",
- "gcc_mmss_noc_cfg_ahb_clk",
"gpll0",
+ "gcc_mmss_noc_cfg_ahb_clk",
"dsi0pll",
"dsi0pllbyte",
"dsi1pll",
@@ -980,27 +980,27 @@
port@0 {
reg = <0>;
mdp5_intf3_out: endpoint {
- remote-endpoint = <&hdmi_in>;
+ remote-endpoint = <&mdss_hdmi_in>;
};
};
port@1 {
reg = <1>;
mdp5_intf1_out: endpoint {
- remote-endpoint = <&dsi0_in>;
+ remote-endpoint = <&mdss_dsi0_in>;
};
};
port@2 {
reg = <2>;
mdp5_intf2_out: endpoint {
- remote-endpoint = <&dsi1_in>;
+ remote-endpoint = <&mdss_dsi1_in>;
};
};
};
};
- dsi0: dsi@994000 {
+ mdss_dsi0: dsi@994000 {
compatible = "qcom,msm8996-dsi-ctrl",
"qcom,mdss-dsi-ctrl";
reg = <0x00994000 0x400>;
@@ -1024,9 +1024,9 @@
"pixel",
"core";
assigned-clocks = <&mmcc BYTE0_CLK_SRC>, <&mmcc PCLK0_CLK_SRC>;
- assigned-clock-parents = <&dsi0_phy 0>, <&dsi0_phy 1>;
+ assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>;
- phys = <&dsi0_phy>;
+ phys = <&mdss_dsi0_phy>;
status = "disabled";
#address-cells = <1>;
@@ -1038,20 +1038,20 @@
port@0 {
reg = <0>;
- dsi0_in: endpoint {
+ mdss_dsi0_in: endpoint {
remote-endpoint = <&mdp5_intf1_out>;
};
};
port@1 {
reg = <1>;
- dsi0_out: endpoint {
+ mdss_dsi0_out: endpoint {
};
};
};
};
- dsi0_phy: phy@994400 {
+ mdss_dsi0_phy: phy@994400 {
compatible = "qcom,dsi-phy-14nm";
reg = <0x00994400 0x100>,
<0x00994500 0x300>,
@@ -1068,7 +1068,7 @@
status = "disabled";
};
- dsi1: dsi@996000 {
+ mdss_dsi1: dsi@996000 {
compatible = "qcom,msm8996-dsi-ctrl",
"qcom,mdss-dsi-ctrl";
reg = <0x00996000 0x400>;
@@ -1092,9 +1092,9 @@
"pixel",
"core";
assigned-clocks = <&mmcc BYTE1_CLK_SRC>, <&mmcc PCLK1_CLK_SRC>;
- assigned-clock-parents = <&dsi1_phy 0>, <&dsi1_phy 1>;
+ assigned-clock-parents = <&mdss_dsi1_phy 0>, <&mdss_dsi1_phy 1>;
- phys = <&dsi1_phy>;
+ phys = <&mdss_dsi1_phy>;
status = "disabled";
#address-cells = <1>;
@@ -1106,20 +1106,20 @@
port@0 {
reg = <0>;
- dsi1_in: endpoint {
+ mdss_dsi1_in: endpoint {
remote-endpoint = <&mdp5_intf2_out>;
};
};
port@1 {
reg = <1>;
- dsi1_out: endpoint {
+ mdss_dsi1_out: endpoint {
};
};
};
};
- dsi1_phy: phy@996400 {
+ mdss_dsi1_phy: phy@996400 {
compatible = "qcom,dsi-phy-14nm";
reg = <0x00996400 0x100>,
<0x00996500 0x300>,
@@ -1136,8 +1136,8 @@
status = "disabled";
};
- hdmi: hdmi-tx@9a0000 {
- compatible = "qcom,hdmi-tx-8996";
+ mdss_hdmi: mdss_hdmi-tx@9a0000 {
+ compatible = "qcom,mdss_hdmi-tx-8996";
reg = <0x009a0000 0x50c>,
<0x00070000 0x6158>,
<0x009e0000 0xfff>;
@@ -1160,7 +1160,7 @@
"alt_iface",
"extp";
- phys = <&hdmi_phy>;
+ phys = <&mdss_hdmi_phy>;
#sound-dai-cells = <1>;
status = "disabled";
@@ -1171,16 +1171,16 @@
port@0 {
reg = <0>;
- hdmi_in: endpoint {
+ mdss_hdmi_in: endpoint {
remote-endpoint = <&mdp5_intf3_out>;
};
};
};
};
- hdmi_phy: phy@9a0600 {
+ mdss_hdmi_phy: phy@9a0600 {
#phy-cells = <0>;
- compatible = "qcom,hdmi-phy-8996";
+ compatible = "qcom,mdss_hdmi-phy-8996";
reg = <0x009a0600 0x1c4>,
<0x009a0a00 0x124>,
<0x009a0c00 0x124>,
@@ -1832,7 +1832,7 @@
compatible = "simple-pm-bus";
#address-cells = <1>;
#size-cells = <1>;
- ranges;
+ ranges = <0x0 0x0 0xffffffff>;
pcie0: pcie@600000 {
compatible = "qcom,pcie-msm8996";
@@ -2069,7 +2069,7 @@
};
};
- camss: camss@a00000 {
+ camss: camss@a34000 {
compatible = "qcom,msm8996-camss";
reg = <0x00a34000 0x1000>,
<0x00a00030 0x4>,