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-rw-r--r--arch/arm/plat-mxc/include/mach/mx1.h5
-rw-r--r--arch/arm/plat-mxc/include/mach/mx27.h3
-rw-r--r--arch/arm/plat-mxc/include/mach/mx31.h5
-rw-r--r--arch/arm/plat-mxc/include/mach/timex.h8
4 files changed, 7 insertions, 14 deletions
diff --git a/arch/arm/plat-mxc/include/mach/mx1.h b/arch/arm/plat-mxc/include/mach/mx1.h
index c45bf5f5b90c..8476a15dbfc0 100644
--- a/arch/arm/plat-mxc/include/mach/mx1.h
+++ b/arch/arm/plat-mxc/include/mach/mx1.h
@@ -18,11 +18,6 @@
#include <mach/vmalloc.h>
-/*
- * defines the hardware clock tick rate
- */
-#define CLOCK_TICK_RATE 16000000
-
#define PHYS_OFFSET UL(0x08000000)
/*
diff --git a/arch/arm/plat-mxc/include/mach/mx27.h b/arch/arm/plat-mxc/include/mach/mx27.h
index 55bcbd5e073a..ae8637471ae8 100644
--- a/arch/arm/plat-mxc/include/mach/mx27.h
+++ b/arch/arm/plat-mxc/include/mach/mx27.h
@@ -289,9 +289,6 @@ extern int mx27_revision(void);
/* this CPU supports up to 192 GPIOs (don't forget the baseboard!) */
#define ARCH_NR_GPIOS (192 + 16)
-/* OS clock tick rate */
-#define CLOCK_TICK_RATE 13300000
-
/* Start of RAM */
#define PHYS_OFFSET SDRAM_BASE_ADDR
diff --git a/arch/arm/plat-mxc/include/mach/mx31.h b/arch/arm/plat-mxc/include/mach/mx31.h
index 65c3109b5192..2f6d9fc0ab23 100644
--- a/arch/arm/plat-mxc/include/mach/mx31.h
+++ b/arch/arm/plat-mxc/include/mach/mx31.h
@@ -15,11 +15,6 @@
#error "Do not include directly."
#endif
-/*!
- * defines the hardware clock tick rate
- */
-#define CLOCK_TICK_RATE 16625000
-
/*
* MX31 memory map:
*
diff --git a/arch/arm/plat-mxc/include/mach/timex.h b/arch/arm/plat-mxc/include/mach/timex.h
index 0b0af0253e91..07b4a73c9d2f 100644
--- a/arch/arm/plat-mxc/include/mach/timex.h
+++ b/arch/arm/plat-mxc/include/mach/timex.h
@@ -20,6 +20,12 @@
#ifndef __ASM_ARCH_MXC_TIMEX_H__
#define __ASM_ARCH_MXC_TIMEX_H__
-#include <mach/hardware.h> /* for CLOCK_TICK_RATE */
+#if defined CONFIG_ARCH_MX1
+#define CLOCK_TICK_RATE 16000000
+#elif defined CONFIG_ARCH_MX2
+#define CLOCK_TICK_RATE 13300000
+#elif defined CONFIG_ARCH_MX3
+#define CLOCK_TICK_RATE 16625000
+#endif
#endif /* __ASM_ARCH_MXC_TIMEX_H__ */