diff options
Diffstat (limited to 'arch/arm/plat-iop')
| -rw-r--r-- | arch/arm/plat-iop/Makefile | 31 | ||||
| -rw-r--r-- | arch/arm/plat-iop/cp6.c | 50 | ||||
| -rw-r--r-- | arch/arm/plat-iop/io.c | 58 | ||||
| -rw-r--r-- | arch/arm/plat-iop/pci.c | 6 | ||||
| -rw-r--r-- | arch/arm/plat-iop/time.c | 66 |
5 files changed, 173 insertions, 38 deletions
diff --git a/arch/arm/plat-iop/Makefile b/arch/arm/plat-iop/Makefile index 23da00b11517..4d2b1da3cd82 100644 --- a/arch/arm/plat-iop/Makefile +++ b/arch/arm/plat-iop/Makefile @@ -2,7 +2,30 @@ # Makefile for the linux kernel. # -obj-y := gpio.o i2c.o pci.o setup.o time.o -obj-m := -obj-n := -obj- := +obj-y := + +# IOP32X +obj-$(CONFIG_ARCH_IOP32X) += gpio.o +obj-$(CONFIG_ARCH_IOP32X) += i2c.o +obj-$(CONFIG_ARCH_IOP32X) += pci.o +obj-$(CONFIG_ARCH_IOP32X) += setup.o +obj-$(CONFIG_ARCH_IOP32X) += time.o +obj-$(CONFIG_ARCH_IOP32X) += io.o +obj-$(CONFIG_ARCH_IOP32X) += cp6.o + +# IOP33X +obj-$(CONFIG_ARCH_IOP33X) += gpio.o +obj-$(CONFIG_ARCH_IOP33X) += i2c.o +obj-$(CONFIG_ARCH_IOP33X) += pci.o +obj-$(CONFIG_ARCH_IOP33X) += setup.o +obj-$(CONFIG_ARCH_IOP33X) += time.o +obj-$(CONFIG_ARCH_IOP33X) += io.o +obj-$(CONFIG_ARCH_IOP33X) += cp6.o + +# IOP13XX +obj-$(CONFIG_ARCH_IOP13XX) += cp6.o +obj-$(CONFIG_ARCH_IOP13XX) += time.o + +obj-m := +obj-n := +obj- := diff --git a/arch/arm/plat-iop/cp6.c b/arch/arm/plat-iop/cp6.c new file mode 100644 index 000000000000..9612a87e2a88 --- /dev/null +++ b/arch/arm/plat-iop/cp6.c @@ -0,0 +1,50 @@ +/* + * IOP Coprocessor-6 access handler + * Copyright (c) 2006, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., 59 Temple + * Place - Suite 330, Boston, MA 02111-1307 USA. + * + */ +#include <linux/init.h> +#include <asm/traps.h> + +static int cp6_trap(struct pt_regs *regs, unsigned int instr) +{ + u32 temp; + + /* enable cp6 access */ + asm volatile ( + "mrc p15, 0, %0, c15, c1, 0\n\t" + "orr %0, %0, #(1 << 6)\n\t" + "mcr p15, 0, %0, c15, c1, 0\n\t" + : "=r"(temp)); + + return 0; +} + +/* permit kernel space cp6 access + * deny user space cp6 access + */ +static struct undef_hook cp6_hook = { + .instr_mask = 0x0f000ff0, + .instr_val = 0x0e000610, + .cpsr_mask = MODE_MASK, + .cpsr_val = SVC_MODE, + .fn = cp6_trap, +}; + +void __init iop_init_cp6_handler(void) +{ + register_undef_hook(&cp6_hook); +} diff --git a/arch/arm/plat-iop/io.c b/arch/arm/plat-iop/io.c new file mode 100644 index 000000000000..f7eccecf2e47 --- /dev/null +++ b/arch/arm/plat-iop/io.c @@ -0,0 +1,58 @@ +/* + * iop3xx custom ioremap implementation + * Copyright (c) 2006, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., 59 Temple + * Place - Suite 330, Boston, MA 02111-1307 USA. + * + */ +#include <linux/kernel.h> +#include <linux/module.h> +#include <asm/hardware.h> +#include <asm/io.h> + +void * __iomem __iop3xx_ioremap(unsigned long cookie, size_t size, + unsigned long flags) +{ + void __iomem * retval; + + switch (cookie) { + case IOP3XX_PCI_LOWER_IO_PA ... IOP3XX_PCI_UPPER_IO_PA: + retval = (void *) IOP3XX_PCI_IO_PHYS_TO_VIRT(cookie); + break; + case IOP3XX_PERIPHERAL_PHYS_BASE ... IOP3XX_PERIPHERAL_UPPER_PA: + retval = (void *) IOP3XX_PMMR_PHYS_TO_VIRT(cookie); + break; + default: + retval = __ioremap(cookie, size, flags); + } + + return retval; +} +EXPORT_SYMBOL(__iop3xx_ioremap); + +void __iop3xx_iounmap(void __iomem *addr) +{ + extern void __iounmap(volatile void __iomem *addr); + + switch ((u32) addr) { + case IOP3XX_PCI_LOWER_IO_VA ... IOP3XX_PCI_UPPER_IO_VA: + case IOP3XX_PERIPHERAL_VIRT_BASE ... IOP3XX_PERIPHERAL_UPPER_VA: + goto skip; + } + __iounmap(addr); + +skip: + return; +} +EXPORT_SYMBOL(__iop3xx_iounmap); diff --git a/arch/arm/plat-iop/pci.c b/arch/arm/plat-iop/pci.c index e647812654f2..b5f6ec35aafb 100644 --- a/arch/arm/plat-iop/pci.c +++ b/arch/arm/plat-iop/pci.c @@ -196,8 +196,8 @@ int iop3xx_pci_setup(int nr, struct pci_sys_data *sys) if (!res) panic("PCI: unable to alloc resources"); - res[0].start = IOP3XX_PCI_LOWER_IO_VA; - res[0].end = IOP3XX_PCI_LOWER_IO_VA + IOP3XX_PCI_IO_WINDOW_SIZE - 1; + res[0].start = IOP3XX_PCI_LOWER_IO_PA; + res[0].end = IOP3XX_PCI_LOWER_IO_PA + IOP3XX_PCI_IO_WINDOW_SIZE - 1; res[0].name = "IOP3XX PCI I/O Space"; res[0].flags = IORESOURCE_IO; request_resource(&ioport_resource, &res[0]); @@ -209,7 +209,7 @@ int iop3xx_pci_setup(int nr, struct pci_sys_data *sys) request_resource(&iomem_resource, &res[1]); sys->mem_offset = IOP3XX_PCI_LOWER_MEM_PA - IOP3XX_PCI_LOWER_MEM_BA; - sys->io_offset = IOP3XX_PCI_LOWER_IO_VA - IOP3XX_PCI_LOWER_IO_BA; + sys->io_offset = IOP3XX_PCI_LOWER_IO_PA - IOP3XX_PCI_LOWER_IO_BA; sys->resource[0] = &res[0]; sys->resource[1] = &res[1]; diff --git a/arch/arm/plat-iop/time.c b/arch/arm/plat-iop/time.c index f530abdaa7a1..16300adfb4de 100644 --- a/arch/arm/plat-iop/time.c +++ b/arch/arm/plat-iop/time.c @@ -24,39 +24,45 @@ #include <asm/uaccess.h> #include <asm/mach/irq.h> #include <asm/mach/time.h> - -#ifdef CONFIG_ARCH_IOP32X -#define IRQ_IOP3XX_TIMER0 IRQ_IOP32X_TIMER0 -#else -#ifdef CONFIG_ARCH_IOP33X -#define IRQ_IOP3XX_TIMER0 IRQ_IOP33X_TIMER0 -#endif -#endif +#include <asm/arch/time.h> static unsigned long ticks_per_jiffy; static unsigned long ticks_per_usec; static unsigned long next_jiffy_time; -unsigned long iop3xx_gettimeoffset(void) +unsigned long iop_gettimeoffset(void) { - unsigned long offset; + unsigned long offset, temp1, temp2; - offset = next_jiffy_time - *IOP3XX_TU_TCR1; + /* enable cp6, if necessary, to avoid taking the overhead of an + * undefined instruction trap + */ + asm volatile ( + "mrc p15, 0, %0, c15, c1, 0\n\t" + "ands %1, %0, #(1 << 6)\n\t" + "orreq %0, %0, #(1 << 6)\n\t" + "mcreq p15, 0, %0, c15, c1, 0\n\t" +#ifdef CONFIG_XSCALE + "mrceq p15, 0, %0, c15, c1, 0\n\t" + "moveq %0, %0\n\t" + "subeq pc, pc, #4\n\t" +#endif + : "=r"(temp1), "=r"(temp2) : : "cc"); + + offset = next_jiffy_time - read_tcr1(); return offset / ticks_per_usec; } static irqreturn_t -iop3xx_timer_interrupt(int irq, void *dev_id) +iop_timer_interrupt(int irq, void *dev_id) { write_seqlock(&xtime_lock); - iop3xx_cp6_enable(); - asm volatile("mcr p6, 0, %0, c6, c1, 0" : : "r" (1)); - iop3xx_cp6_disable(); + write_tisr(1); - while ((signed long)(next_jiffy_time - *IOP3XX_TU_TCR1) - >= ticks_per_jiffy) { + while ((signed long)(next_jiffy_time - read_tcr1()) + >= ticks_per_jiffy) { timer_tick(); next_jiffy_time -= ticks_per_jiffy; } @@ -66,13 +72,13 @@ iop3xx_timer_interrupt(int irq, void *dev_id) return IRQ_HANDLED; } -static struct irqaction iop3xx_timer_irq = { - .name = "IOP3XX Timer Tick", - .handler = iop3xx_timer_interrupt, +static struct irqaction iop_timer_irq = { + .name = "IOP Timer Tick", + .handler = iop_timer_interrupt, .flags = IRQF_DISABLED | IRQF_TIMER, }; -void __init iop3xx_init_time(unsigned long tick_rate) +void __init iop_init_time(unsigned long tick_rate) { u32 timer_ctl; @@ -80,19 +86,17 @@ void __init iop3xx_init_time(unsigned long tick_rate) ticks_per_usec = tick_rate / 1000000; next_jiffy_time = 0xffffffff; - timer_ctl = IOP3XX_TMR_EN | IOP3XX_TMR_PRIVILEGED | - IOP3XX_TMR_RELOAD | IOP3XX_TMR_RATIO_1_1; + timer_ctl = IOP_TMR_EN | IOP_TMR_PRIVILEGED | + IOP_TMR_RELOAD | IOP_TMR_RATIO_1_1; /* * We use timer 0 for our timer interrupt, and timer 1 as * monotonic counter for tracking missed jiffies. */ - iop3xx_cp6_enable(); - asm volatile("mcr p6, 0, %0, c4, c1, 0" : : "r" (ticks_per_jiffy - 1)); - asm volatile("mcr p6, 0, %0, c0, c1, 0" : : "r" (timer_ctl)); - asm volatile("mcr p6, 0, %0, c5, c1, 0" : : "r" (0xffffffff)); - asm volatile("mcr p6, 0, %0, c1, c1, 0" : : "r" (timer_ctl)); - iop3xx_cp6_disable(); - - setup_irq(IRQ_IOP3XX_TIMER0, &iop3xx_timer_irq); + write_trr0(ticks_per_jiffy - 1); + write_tmr0(timer_ctl); + write_trr1(0xffffffff); + write_tmr1(timer_ctl); + + setup_irq(IRQ_IOP_TIMER0, &iop_timer_irq); } |