diff options
Diffstat (limited to 'arch/arm/mach-ux500/platsmp.c')
| -rw-r--r-- | arch/arm/mach-ux500/platsmp.c | 28 |
1 files changed, 16 insertions, 12 deletions
diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c index da1d5ad5bd45..3db7782f3afb 100644 --- a/arch/arm/mach-ux500/platsmp.c +++ b/arch/arm/mach-ux500/platsmp.c @@ -28,12 +28,6 @@ extern void u8500_secondary_startup(void); /* - * control for which core is the next to come out of the secondary - * boot "holding pen" - */ -volatile int pen_release = -1; - -/* * Write pen_release in a way that is guaranteed to be visible to all * observers, irrespective of whether they're taking part in coherency * or not. This is necessary for the hotplug code to work reliably. @@ -48,7 +42,7 @@ static void write_pen_release(int val) static void __iomem *scu_base_addr(void) { - if (cpu_is_u8500_family()) + if (cpu_is_u8500_family() || cpu_is_ux540_family()) return __io_address(U8500_SCU_BASE); else ux500_unknown_soc(); @@ -58,7 +52,7 @@ static void __iomem *scu_base_addr(void) static DEFINE_SPINLOCK(boot_lock); -void __cpuinit platform_secondary_init(unsigned int cpu) +static void __cpuinit ux500_secondary_init(unsigned int cpu) { /* * if any interrupts are already enabled for the primary @@ -80,7 +74,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu) spin_unlock(&boot_lock); } -int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) +static int __cpuinit ux500_boot_secondary(unsigned int cpu, struct task_struct *idle) { unsigned long timeout; @@ -118,7 +112,7 @@ static void __init wakeup_secondary(void) { void __iomem *backupram; - if (cpu_is_u8500_family()) + if (cpu_is_u8500_family() || cpu_is_ux540_family()) backupram = __io_address(U8500_BACKUPRAM0_BASE); else ux500_unknown_soc(); @@ -145,7 +139,7 @@ static void __init wakeup_secondary(void) * Initialise the CPU possible map early - this describes the CPUs * which may be present or become present in the system. */ -void __init smp_init_cpus(void) +static void __init ux500_smp_init_cpus(void) { void __iomem *scu_base = scu_base_addr(); unsigned int i, ncores; @@ -165,9 +159,19 @@ void __init smp_init_cpus(void) set_smp_cross_call(gic_raise_softirq); } -void __init platform_smp_prepare_cpus(unsigned int max_cpus) +static void __init ux500_smp_prepare_cpus(unsigned int max_cpus) { scu_enable(scu_base_addr()); wakeup_secondary(); } + +struct smp_operations ux500_smp_ops __initdata = { + .smp_init_cpus = ux500_smp_init_cpus, + .smp_prepare_cpus = ux500_smp_prepare_cpus, + .smp_secondary_init = ux500_secondary_init, + .smp_boot_secondary = ux500_boot_secondary, +#ifdef CONFIG_HOTPLUG_CPU + .cpu_die = ux500_cpu_die, +#endif +}; |