diff options
Diffstat (limited to 'arch/arm/mach-rockchip/platsmp.c')
-rw-r--r-- | arch/arm/mach-rockchip/platsmp.c | 23 |
1 files changed, 11 insertions, 12 deletions
diff --git a/arch/arm/mach-rockchip/platsmp.c b/arch/arm/mach-rockchip/platsmp.c index 4675d9202000..649e0a54784c 100644 --- a/arch/arm/mach-rockchip/platsmp.c +++ b/arch/arm/mach-rockchip/platsmp.c @@ -1,16 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-or-later /* * Copyright (c) 2013 MundoReader S.L. * Author: Heiko Stuebner <heiko@sntech.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. */ #include <linux/delay.h> @@ -278,19 +269,25 @@ static void __init rockchip_smp_prepare_cpus(unsigned int max_cpus) sram_base_addr = of_iomap(node, 0); if (!sram_base_addr) { pr_err("%s: could not map sram registers\n", __func__); + of_node_put(node); return; } - if (has_pmu && rockchip_smp_prepare_pmu()) + if (has_pmu && rockchip_smp_prepare_pmu()) { + of_node_put(node); return; + } if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9) { - if (rockchip_smp_prepare_sram(node)) + if (rockchip_smp_prepare_sram(node)) { + of_node_put(node); return; + } /* enable the SCU power domain */ pmu_set_power_domain(PMU_PWRDN_SCU, true); + of_node_put(node); node = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-scu"); if (!node) { pr_err("%s: missing scu\n", __func__); @@ -300,6 +297,7 @@ static void __init rockchip_smp_prepare_cpus(unsigned int max_cpus) scu_base_addr = of_iomap(node, 0); if (!scu_base_addr) { pr_err("%s: could not map scu registers\n", __func__); + of_node_put(node); return; } @@ -318,6 +316,7 @@ static void __init rockchip_smp_prepare_cpus(unsigned int max_cpus) asm ("mrc p15, 1, %0, c9, c0, 2\n" : "=r" (l2ctlr)); ncores = ((l2ctlr >> 24) & 0x3) + 1; } + of_node_put(node); /* Make sure that all cores except the first are really off */ for (i = 1; i < ncores; i++) |