diff options
Diffstat (limited to 'arch/arm/mach-omap2')
| -rw-r--r-- | arch/arm/mach-omap2/omap4-sar-layout.h | 2 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/sleep44xx.S | 7 |
2 files changed, 2 insertions, 7 deletions
diff --git a/arch/arm/mach-omap2/omap4-sar-layout.h b/arch/arm/mach-omap2/omap4-sar-layout.h index 5b2966a0f733..9fc4e2643ce7 100644 --- a/arch/arm/mach-omap2/omap4-sar-layout.h +++ b/arch/arm/mach-omap2/omap4-sar-layout.h @@ -28,7 +28,7 @@ #define L2X0_AUXCTRL_OFFSET 0xff8 #define L2X0_PREFETCH_CTRL_OFFSET 0xffc -/* CPUx Wakeup Non-Secure Physical Address offsets in SAR_BANK3 */ +/* CPUx Wakeup Non-Secure Physical Address offsets in SAR_BANK1 */ #define CPU0_WAKEUP_NS_PA_ADDR_OFFSET 0xa04 #define CPU1_WAKEUP_NS_PA_ADDR_OFFSET 0xa08 #define OMAP5_CPU0_WAKEUP_NS_PA_ADDR_OFFSET 0xe00 diff --git a/arch/arm/mach-omap2/sleep44xx.S b/arch/arm/mach-omap2/sleep44xx.S index 56dfa2d5d0a8..0cae3b070208 100644 --- a/arch/arm/mach-omap2/sleep44xx.S +++ b/arch/arm/mach-omap2/sleep44xx.S @@ -90,12 +90,7 @@ skip_secure_l1_clean: mcr p15, 0, r0, c1, c0, 0 isb - /* - * Invalidate L1 data cache. Even though only invalidate is - * necessary exported flush API is used here. Doing clean - * on already clean cache would be almost NOP. - */ - bl v7_flush_dcache_all + bl v7_invalidate_l1 /* * Switch the CPU from Symmetric Multiprocessing (SMP) mode |