diff options
Diffstat (limited to 'arch/arm/mach-omap2')
75 files changed, 2053 insertions, 1485 deletions
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 8111cd9ff3e5..f49cd51e162a 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -15,6 +15,7 @@ config ARCH_OMAP2PLUS select OMAP_DM_TIMER select PINCTRL select PROC_DEVICETREE if PROC_FS + select SOC_BUS select SPARSE_IRQ select USE_OF help @@ -36,8 +37,6 @@ config ARCH_OMAP2PLUS_TYPICAL select NEON if ARCH_OMAP3 || ARCH_OMAP4 || SOC_OMAP5 select PM_RUNTIME select REGULATOR - select SERIAL_OMAP - select SERIAL_OMAP_CONSOLE select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4 select TWL4030_POWER if ARCH_OMAP3 || ARCH_OMAP4 select VFP @@ -55,6 +54,7 @@ config SOC_HAS_REALTIME_COUNTER config ARCH_OMAP2 bool "TI OMAP2" depends on ARCH_OMAP2PLUS + depends on ARCH_MULTI_V6 default y select CPU_V6 select MULTI_IRQ_HANDLER @@ -64,6 +64,7 @@ config ARCH_OMAP2 config ARCH_OMAP3 bool "TI OMAP3" depends on ARCH_OMAP2PLUS + depends on ARCH_MULTI_V7 default y select ARCH_HAS_OPP select ARM_CPU_SUSPEND if PM @@ -80,6 +81,7 @@ config ARCH_OMAP4 bool "TI OMAP4" default y depends on ARCH_OMAP2PLUS + depends on ARCH_MULTI_V7 select ARCH_HAS_OPP select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP select ARM_CPU_SUSPEND if PM @@ -87,6 +89,8 @@ config ARCH_OMAP4 select ARM_GIC select CACHE_L2X0 select CPU_V7 + select HAVE_ARM_SCU if SMP + select HAVE_ARM_TWD if LOCAL_TIMERS select HAVE_SMP select LOCAL_TIMERS if SMP select OMAP_INTERCONNECT @@ -96,9 +100,12 @@ config ARCH_OMAP4 select PM_RUNTIME if CPU_IDLE select USB_ARCH_HAS_EHCI if USB_SUPPORT select COMMON_CLK + select ARM_ERRATA_754322 + select ARM_ERRATA_775420 config SOC_OMAP5 bool "TI OMAP5" + depends on ARCH_MULTI_V7 select ARM_CPU_SUSPEND if PM select ARM_GIC select CPU_V7 @@ -135,6 +142,7 @@ config SOC_TI81XX config SOC_AM33XX bool "AM33XX support" + depends on ARCH_MULTI_V7 default y select ARM_CPU_SUSPEND if PM select CPU_V7 @@ -408,7 +416,7 @@ config OMAP3_SDRC_AC_TIMING config OMAP4_ERRATA_I688 bool "OMAP4 errata: Async Bridge Corruption" - depends on ARCH_OMAP4 && !ARCH_MULTIPLATFORM + depends on (ARCH_OMAP4 || SOC_OMAP5) && !ARCH_MULTIPLATFORM select ARCH_HAS_BARRIERS help If a data is stalled inside asynchronous bridge because of back diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index b068b7fe99ef..55a9d6777683 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -32,12 +32,12 @@ obj-$(CONFIG_SOC_HAS_OMAP2_SDRC) += sdrc.o # SMP support ONLY available for OMAP4 -obj-$(CONFIG_SMP) += omap-smp.o omap-headsmp.o -obj-$(CONFIG_HOTPLUG_CPU) += omap-hotplug.o +smp-$(CONFIG_SMP) += omap-smp.o omap-headsmp.o +smp-$(CONFIG_HOTPLUG_CPU) += omap-hotplug.o omap-4-5-common = omap4-common.o omap-wakeupgen.o \ sleep44xx.o -obj-$(CONFIG_ARCH_OMAP4) += $(omap-4-5-common) -obj-$(CONFIG_SOC_OMAP5) += $(omap-4-5-common) +obj-$(CONFIG_ARCH_OMAP4) += $(omap-4-5-common) $(smp-y) +obj-$(CONFIG_SOC_OMAP5) += $(omap-4-5-common) $(smp-y) plus_sec := $(call as-instr,.arch_extension sec,+sec) AFLAGS_omap-headsmp.o :=-Wa,-march=armv7-a$(plus_sec) @@ -229,7 +229,6 @@ obj-$(CONFIG_MACH_DEVKIT8000) += board-devkit8000.o obj-$(CONFIG_MACH_OMAP_LDP) += board-ldp.o obj-$(CONFIG_MACH_OMAP3530_LV_SOM) += board-omap3logic.o obj-$(CONFIG_MACH_OMAP3_TORPEDO) += board-omap3logic.o -obj-$(CONFIG_MACH_ENCORE) += board-omap3encore.o obj-$(CONFIG_MACH_OVERO) += board-overo.o obj-$(CONFIG_MACH_OMAP3EVM) += board-omap3evm.o obj-$(CONFIG_MACH_OMAP3_PANDORA) += board-omap3pandora.o @@ -255,8 +254,6 @@ obj-$(CONFIG_MACH_TOUCHBOOK) += board-omap3touchbook.o obj-$(CONFIG_MACH_OMAP_4430SDP) += board-4430sdp.o obj-$(CONFIG_MACH_OMAP4_PANDA) += board-omap4panda.o -obj-$(CONFIG_MACH_PCM049) += board-omap4pcm049.o - obj-$(CONFIG_MACH_OMAP3517EVM) += board-am3517evm.o obj-$(CONFIG_MACH_CRANEBOARD) += board-am3517crane.o diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c index a3e0aaa4886b..244d8a5aa54b 100644 --- a/arch/arm/mach-omap2/board-2430sdp.c +++ b/arch/arm/mach-omap2/board-2430sdp.c @@ -38,7 +38,7 @@ #include "gpmc-smc91x.h" #include <video/omapdss.h> -#include <video/omap-panel-generic-dpi.h> +#include <video/omap-panel-data.h> #include "mux.h" #include "hsmmc.h" @@ -108,24 +108,13 @@ static struct platform_device *sdp2430_devices[] __initdata = { #define SDP2430_LCD_PANEL_BACKLIGHT_GPIO 91 #define SDP2430_LCD_PANEL_ENABLE_GPIO 154 -static int sdp2430_panel_enable_lcd(struct omap_dss_device *dssdev) -{ - gpio_direction_output(SDP2430_LCD_PANEL_ENABLE_GPIO, 1); - gpio_direction_output(SDP2430_LCD_PANEL_BACKLIGHT_GPIO, 1); - - return 0; -} - -static void sdp2430_panel_disable_lcd(struct omap_dss_device *dssdev) -{ - gpio_direction_output(SDP2430_LCD_PANEL_ENABLE_GPIO, 0); - gpio_direction_output(SDP2430_LCD_PANEL_BACKLIGHT_GPIO, 0); -} - static struct panel_generic_dpi_data sdp2430_panel_data = { .name = "nec_nl2432dr22-11b", - .platform_enable = sdp2430_panel_enable_lcd, - .platform_disable = sdp2430_panel_disable_lcd, + .num_gpios = 2, + .gpios = { + SDP2430_LCD_PANEL_ENABLE_GPIO, + SDP2430_LCD_PANEL_BACKLIGHT_GPIO, + }, }; static struct omap_dss_device sdp2430_lcd_device = { @@ -146,27 +135,7 @@ static struct omap_dss_board_info sdp2430_dss_data = { .default_device = &sdp2430_lcd_device, }; -static void __init sdp2430_display_init(void) -{ - int r; - - static struct gpio gpios[] __initdata = { - { SDP2430_LCD_PANEL_ENABLE_GPIO, GPIOF_OUT_INIT_LOW, - "LCD reset" }, - { SDP2430_LCD_PANEL_BACKLIGHT_GPIO, GPIOF_OUT_INIT_LOW, - "LCD Backlight" }, - }; - - r = gpio_request_array(gpios, ARRAY_SIZE(gpios)); - if (r) { - pr_err("Cannot request LCD GPIOs, error %d\n", r); - return; - } - - omap_display_init(&sdp2430_dss_data); -} - -#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91x_MODULE) +#if IS_ENABLED(CONFIG_SMC91X) static struct omap_smc91x_platform_data board_smc91x_data = { .cs = 5, @@ -273,7 +242,7 @@ static void __init omap_2430sdp_init(void) gpio_request_one(SECONDARY_LCD_GPIO, GPIOF_OUT_INIT_LOW, "Secondary LCD backlight"); - sdp2430_display_init(); + omap_display_init(&sdp2430_dss_data); } MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board") diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c index ce812decfaca..23b004afa3f8 100644 --- a/arch/arm/mach-omap2/board-3430sdp.c +++ b/arch/arm/mach-omap2/board-3430sdp.c @@ -35,7 +35,7 @@ #include "common.h" #include <linux/omap-dma.h> #include <video/omapdss.h> -#include <video/omap-panel-tfp410.h> +#include <video/omap-panel-data.h> #include "gpmc.h" #include "gpmc-smc91x.h" @@ -108,53 +108,38 @@ static struct twl4030_keypad_data sdp3430_kp_data = { #define SDP3430_LCD_PANEL_BACKLIGHT_GPIO 8 #define SDP3430_LCD_PANEL_ENABLE_GPIO 5 -static struct gpio sdp3430_dss_gpios[] __initdata = { - {SDP3430_LCD_PANEL_ENABLE_GPIO, GPIOF_OUT_INIT_LOW, "LCD reset" }, - {SDP3430_LCD_PANEL_BACKLIGHT_GPIO, GPIOF_OUT_INIT_LOW, "LCD Backlight"}, -}; - static void __init sdp3430_display_init(void) { int r; - r = gpio_request_array(sdp3430_dss_gpios, - ARRAY_SIZE(sdp3430_dss_gpios)); + /* + * the backlight GPIO doesn't directly go to the panel, it enables + * an internal circuit on 3430sdp to create the signal V_BKL_28V, + * this is connected to LED+ pin of the sharp panel. This GPIO + * is left enabled in the board file, and not passed to the panel + * as platform_data. + */ + r = gpio_request_one(SDP3430_LCD_PANEL_BACKLIGHT_GPIO, + GPIOF_OUT_INIT_HIGH, "LCD Backlight"); if (r) - printk(KERN_ERR "failed to get LCD control GPIOs\n"); - -} - -static int sdp3430_panel_enable_lcd(struct omap_dss_device *dssdev) -{ - gpio_direction_output(SDP3430_LCD_PANEL_ENABLE_GPIO, 1); - gpio_direction_output(SDP3430_LCD_PANEL_BACKLIGHT_GPIO, 1); + pr_err("failed to get LCD Backlight GPIO\n"); - return 0; -} - -static void sdp3430_panel_disable_lcd(struct omap_dss_device *dssdev) -{ - gpio_direction_output(SDP3430_LCD_PANEL_ENABLE_GPIO, 0); - gpio_direction_output(SDP3430_LCD_PANEL_BACKLIGHT_GPIO, 0); -} - -static int sdp3430_panel_enable_tv(struct omap_dss_device *dssdev) -{ - return 0; -} - -static void sdp3430_panel_disable_tv(struct omap_dss_device *dssdev) -{ } +static struct panel_sharp_ls037v7dw01_data sdp3430_lcd_data = { + .resb_gpio = SDP3430_LCD_PANEL_ENABLE_GPIO, + .ini_gpio = -1, + .mo_gpio = -1, + .lr_gpio = -1, + .ud_gpio = -1, +}; static struct omap_dss_device sdp3430_lcd_device = { .name = "lcd", .driver_name = "sharp_ls_panel", .type = OMAP_DISPLAY_TYPE_DPI, .phy.dpi.data_lines = 16, - .platform_enable = sdp3430_panel_enable_lcd, - .platform_disable = sdp3430_panel_disable_lcd, + .data = &sdp3430_lcd_data, }; static struct tfp410_platform_data dvi_panel = { @@ -175,8 +160,6 @@ static struct omap_dss_device sdp3430_tv_device = { .driver_name = "venc", .type = OMAP_DISPLAY_TYPE_VENC, .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, - .platform_enable = sdp3430_panel_enable_tv, - .platform_disable = sdp3430_panel_disable_tv, }; @@ -445,16 +428,23 @@ static void enable_board_wakeup_source(void) OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP); } +static struct usbhs_phy_data phy_data[] __initdata = { + { + .port = 1, + .reset_gpio = 57, + .vcc_gpio = -EINVAL, + }, + { + .port = 2, + .reset_gpio = 61, + .vcc_gpio = -EINVAL, + }, +}; + static struct usbhs_omap_platform_data usbhs_bdata __initdata = { .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, - .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED, - - .phy_reset = true, - .reset_gpio_port[0] = 57, - .reset_gpio_port[1] = 61, - .reset_gpio_port[2] = -EINVAL }; #ifdef CONFIG_OMAP_MUX @@ -606,6 +596,8 @@ static void __init omap_3430sdp_init(void) board_flash_init(sdp_flash_partitions, chip_sel_3430, 0); sdp3430_display_init(); enable_board_wakeup_source(); + + usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data)); usbhs_init(&usbhs_bdata); } diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c index 67447bd4564f..20d6d8189240 100644 --- a/arch/arm/mach-omap2/board-3630sdp.c +++ b/arch/arm/mach-omap2/board-3630sdp.c @@ -53,16 +53,23 @@ static void enable_board_wakeup_source(void) OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP); } +static struct usbhs_phy_data phy_data[] __initdata = { + { + .port = 1, + .reset_gpio = 126, + .vcc_gpio = -EINVAL, + }, + { + .port = 2, + .reset_gpio = 61, + .vcc_gpio = -EINVAL, + }, +}; + static struct usbhs_omap_platform_data usbhs_bdata __initdata = { .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, - .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED, - - .phy_reset = true, - .reset_gpio_port[0] = 126, - .reset_gpio_port[1] = 61, - .reset_gpio_port[2] = -EINVAL }; #ifdef CONFIG_OMAP_MUX @@ -199,6 +206,8 @@ static void __init omap_sdp_init(void) board_smc91x_init(); board_flash_init(sdp_flash_partitions, chip_sel_sdp, NAND_BUSWIDTH_16); enable_board_wakeup_source(); + + usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data)); usbhs_init(&usbhs_bdata); } diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c index 35f3ad0cb7c7..56a9a4f855c7 100644 --- a/arch/arm/mach-omap2/board-4430sdp.c +++ b/arch/arm/mach-omap2/board-4430sdp.c @@ -291,6 +291,10 @@ static struct platform_device sdp4430_leds_pwm = { }, }; +/* Dummy regulator for pwm-backlight driver */ +static struct regulator_consumer_supply backlight_supply = + REGULATOR_SUPPLY("enable", "pwm-backlight"); + static struct platform_pwm_backlight_data sdp4430_backlight_data = { .max_brightness = 127, .dft_brightness = 127, @@ -718,13 +722,15 @@ static void __init omap_4430sdp_init(void) omap4_i2c_init(); omap_sfh7741prox_init(); + regulator_register_always_on(0, "backlight-enable", + &backlight_supply, 1, 0); platform_add_devices(sdp4430_devices, ARRAY_SIZE(sdp4430_devices)); omap_serial_init(); omap_sdrc_init(NULL, NULL); omap4_sdp4430_wifi_init(); omap4_twl6030_hsmmc_init(mmc); - usb_bind_phy("musb-hdrc.0.auto", 0, "omap-usb2.1.auto"); + usb_bind_phy("musb-hdrc.2.auto", 0, "omap-usb2.3.auto"); usb_musb_init(&musb_board_data); status = omap_ethernet_init(); diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c index 7d3358b2e593..fc53911d0d13 100644 --- a/arch/arm/mach-omap2/board-am3517crane.c +++ b/arch/arm/mach-omap2/board-am3517crane.c @@ -47,15 +47,17 @@ static struct omap_board_mux board_mux[] __initdata = { }; #endif +static struct usbhs_phy_data phy_data[] __initdata = { + { + .port = 1, + .reset_gpio = GPIO_USB_NRESET, + .vcc_gpio = GPIO_USB_POWER, + .vcc_polarity = 1, + }, +}; + static struct usbhs_omap_platform_data usbhs_bdata __initdata = { .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, - .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED, - .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED, - - .phy_reset = true, - .reset_gpio_port[0] = GPIO_USB_NRESET, - .reset_gpio_port[1] = -EINVAL, - .reset_gpio_port[2] = -EINVAL }; static struct mtd_partition crane_nand_partitions[] = { @@ -131,13 +133,7 @@ static void __init am3517_crane_init(void) return; } - ret = gpio_request_one(GPIO_USB_POWER, GPIOF_OUT_INIT_HIGH, - "usb_ehci_enable"); - if (ret < 0) { - pr_err("Can not request GPIO %d\n", GPIO_USB_POWER); - return; - } - + usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data)); usbhs_init(&usbhs_bdata); am35xx_emac_init(AM35XX_DEFAULT_MDIO_FREQUENCY, 1); } diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c index 9fb85908a61e..d63f14b534b5 100644 --- a/arch/arm/mach-omap2/board-am3517evm.c +++ b/arch/arm/mach-omap2/board-am3517evm.c @@ -35,8 +35,7 @@ #include "common.h" #include <video/omapdss.h> -#include <video/omap-panel-generic-dpi.h> -#include <video/omap-panel-tfp410.h> +#include <video/omap-panel-data.h> #include "am35xx-emac.h" #include "mux.h" @@ -121,63 +120,14 @@ static int __init am3517_evm_i2c_init(void) return 0; } -static int lcd_enabled; -static int dvi_enabled; - -#if defined(CONFIG_PANEL_SHARP_LQ043T1DG01) || \ - defined(CONFIG_PANEL_SHARP_LQ043T1DG01_MODULE) -static struct gpio am3517_evm_dss_gpios[] __initdata = { - /* GPIO 182 = LCD Backlight Power */ - { LCD_PANEL_BKLIGHT_PWR, GPIOF_OUT_INIT_HIGH, "lcd_backlight_pwr" }, - /* GPIO 181 = LCD Panel PWM */ - { LCD_PANEL_PWM, GPIOF_OUT_INIT_HIGH, "lcd bl enable" }, - /* GPIO 176 = LCD Panel Power enable pin */ - { LCD_PANEL_PWR, GPIOF_OUT_INIT_HIGH, "dvi enable" }, -}; - -static void __init am3517_evm_display_init(void) -{ - int r; - - omap_mux_init_gpio(LCD_PANEL_PWR, OMAP_PIN_INPUT_PULLUP); - omap_mux_init_gpio(LCD_PANEL_BKLIGHT_PWR, OMAP_PIN_INPUT_PULLDOWN); - omap_mux_init_gpio(LCD_PANEL_PWM, OMAP_PIN_INPUT_PULLDOWN); - - r = gpio_request_array(am3517_evm_dss_gpios, - ARRAY_SIZE(am3517_evm_dss_gpios)); - if (r) { - printk(KERN_ERR "failed to get DSS panel control GPIOs\n"); - return; - } - - printk(KERN_INFO "Display initialized successfully\n"); -} -#else -static void __init am3517_evm_display_init(void) {} -#endif - -static int am3517_evm_panel_enable_lcd(struct omap_dss_device *dssdev) -{ - if (dvi_enabled) { - printk(KERN_ERR "cannot enable LCD, DVI is enabled\n"); - return -EINVAL; - } - gpio_set_value(LCD_PANEL_PWR, 1); - lcd_enabled = 1; - - return 0; -} - -static void am3517_evm_panel_disable_lcd(struct omap_dss_device *dssdev) -{ - gpio_set_value(LCD_PANEL_PWR, 0); - lcd_enabled = 0; -} - static struct panel_generic_dpi_data lcd_panel = { .name = "sharp_lq", - .platform_enable = am3517_evm_panel_enable_lcd, - .platform_disable = am3517_evm_panel_disable_lcd, + .num_gpios = 3, + .gpios = { + LCD_PANEL_PWR, + LCD_PANEL_BKLIGHT_PWR, + LCD_PANEL_PWM, + }, }; static struct omap_dss_device am3517_evm_lcd_device = { @@ -188,22 +138,11 @@ static struct omap_dss_device am3517_evm_lcd_device = { .phy.dpi.data_lines = 16, }; -static int am3517_evm_panel_enable_tv(struct omap_dss_device *dssdev) -{ - return 0; -} - -static void am3517_evm_panel_disable_tv(struct omap_dss_device *dssdev) -{ -} - static struct omap_dss_device am3517_evm_tv_device = { .type = OMAP_DISPLAY_TYPE_VENC, .name = "tv", .driver_name = "venc", .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, - .platform_enable = am3517_evm_panel_enable_tv, - .platform_disable = am3517_evm_panel_disable_tv, }; static struct tfp410_platform_data dvi_panel = { @@ -274,6 +213,14 @@ static __init void am3517_evm_mcbsp1_init(void) omap_ctrl_writel(devconf0, OMAP2_CONTROL_DEVCONF0); } +static struct usbhs_phy_data phy_data[] __initdata = { + { + .port = 1, + .reset_gpio = 57, + .vcc_gpio = -EINVAL, + }, +}; + static struct usbhs_omap_platform_data usbhs_bdata __initdata = { .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, #if defined(CONFIG_PANEL_SHARP_LQ043T1DG01) || \ @@ -282,12 +229,6 @@ static struct usbhs_omap_platform_data usbhs_bdata __initdata = { #else .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, #endif - .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED, - - .phy_reset = true, - .reset_gpio_port[0] = 57, - .reset_gpio_port[1] = -EINVAL, - .reset_gpio_port[2] = -EINVAL }; #ifdef CONFIG_OMAP_MUX @@ -349,7 +290,6 @@ static struct omap2_hsmmc_info mmc[] = { {} /* Terminator */ }; - static void __init am3517_evm_init(void) { omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); @@ -361,10 +301,10 @@ static void __init am3517_evm_init(void) /* Configure GPIO for EHCI port */ omap_mux_init_gpio(57, OMAP_PIN_OUTPUT); + + usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data)); usbhs_init(&usbhs_bdata); am3517_evm_hecc_init(&am3517_evm_hecc_pdata); - /* DSS */ - am3517_evm_display_init(); /* RTC - S35390A */ am3517_evm_rtc_init(); diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c index af2bb219e214..ee6218c74807 100644 --- a/arch/arm/mach-omap2/board-cm-t35.c +++ b/arch/arm/mach-omap2/board-cm-t35.c @@ -41,8 +41,7 @@ #include <linux/platform_data/mtd-nand-omap2.h> #include <video/omapdss.h> -#include <video/omap-panel-generic-dpi.h> -#include <video/omap-panel-tfp410.h> +#include <video/omap-panel-data.h> #include <linux/platform_data/spi-omap2-mcspi.h> #include "common.h" @@ -191,45 +190,12 @@ static inline void cm_t35_init_nand(void) {} #define CM_T35_LCD_BL_GPIO 58 #define CM_T35_DVI_EN_GPIO 54 -static int lcd_enabled; -static int dvi_enabled; - -static int cm_t35_panel_enable_lcd(struct omap_dss_device *dssdev) -{ - if (dvi_enabled) { - printk(KERN_ERR "cannot enable LCD, DVI is enabled\n"); - return -EINVAL; - } - - gpio_set_value(CM_T35_LCD_EN_GPIO, 1); - gpio_set_value(CM_T35_LCD_BL_GPIO, 1); - - lcd_enabled = 1; - - return 0; -} - -static void cm_t35_panel_disable_lcd(struct omap_dss_device *dssdev) -{ - lcd_enabled = 0; - - gpio_set_value(CM_T35_LCD_BL_GPIO, 0); - gpio_set_value(CM_T35_LCD_EN_GPIO, 0); -} - -static int cm_t35_panel_enable_tv(struct omap_dss_device *dssdev) -{ - return 0; -} - -static void cm_t35_panel_disable_tv(struct omap_dss_device *dssdev) -{ -} - static struct panel_generic_dpi_data lcd_panel = { .name = "toppoly_tdo35s", - .platform_enable = cm_t35_panel_enable_lcd, - .platform_disable = cm_t35_panel_disable_lcd, + .num_gpios = 1, + .gpios = { + CM_T35_LCD_BL_GPIO, + }, }; static struct omap_dss_device cm_t35_lcd_device = { @@ -258,8 +224,6 @@ static struct omap_dss_device cm_t35_tv_device = { .driver_name = "venc", .type = OMAP_DISPLAY_TYPE_VENC, .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, - .platform_enable = cm_t35_panel_enable_tv, - .platform_disable = cm_t35_panel_disable_tv, }; static struct omap_dss_device *cm_t35_dss_devices[] = { @@ -293,11 +257,6 @@ static struct spi_board_info cm_t35_lcd_spi_board_info[] __initdata = { }, }; -static struct gpio cm_t35_dss_gpios[] __initdata = { - { CM_T35_LCD_EN_GPIO, GPIOF_OUT_INIT_LOW, "lcd enable" }, - { CM_T35_LCD_BL_GPIO, GPIOF_OUT_INIT_LOW, "lcd bl enable" }, -}; - static void __init cm_t35_init_display(void) { int err; @@ -305,23 +264,21 @@ static void __init cm_t35_init_display(void) spi_register_board_info(cm_t35_lcd_spi_board_info, ARRAY_SIZE(cm_t35_lcd_spi_board_info)); - err = gpio_request_array(cm_t35_dss_gpios, - ARRAY_SIZE(cm_t35_dss_gpios)); + + err = gpio_request_one(CM_T35_LCD_EN_GPIO, GPIOF_OUT_INIT_LOW, + "lcd bl enable"); if (err) { - pr_err("CM-T35: failed to request DSS control GPIOs\n"); + pr_err("CM-T35: failed to request LCD EN GPIO\n"); return; } - gpio_export(CM_T35_LCD_EN_GPIO, 0); - gpio_export(CM_T35_LCD_BL_GPIO, 0); - msleep(50); gpio_set_value(CM_T35_LCD_EN_GPIO, 1); err = omap_display_init(&cm_t35_dss_data); if (err) { pr_err("CM-T35: failed to register DSS device\n"); - gpio_free_array(cm_t35_dss_gpios, ARRAY_SIZE(cm_t35_dss_gpios)); + gpio_free(CM_T35_LCD_EN_GPIO); } } @@ -419,15 +376,22 @@ static struct omap2_hsmmc_info mmc[] = { {} /* Terminator */ }; +static struct usbhs_phy_data phy_data[] __initdata = { + { + .port = 1, + .reset_gpio = OMAP_MAX_GPIO_LINES + 6, + .vcc_gpio = -EINVAL, + }, + { + .port = 2, + .reset_gpio = OMAP_MAX_GPIO_LINES + 7, + .vcc_gpio = -EINVAL, + }, +}; + static struct usbhs_omap_platform_data usbhs_bdata __initdata = { .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, - .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED, - - .phy_reset = true, - .reset_gpio_port[0] = OMAP_MAX_GPIO_LINES + 6, - .reset_gpio_port[1] = OMAP_MAX_GPIO_LINES + 7, - .reset_gpio_port[2] = -EINVAL }; static void __init cm_t35_init_usbh(void) @@ -444,6 +408,7 @@ static void __init cm_t35_init_usbh(void) msleep(1); } + usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data)); usbhs_init(&usbhs_bdata); } diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c index a66da808cc4a..4eb5e6f2f7f5 100644 --- a/arch/arm/mach-omap2/board-cm-t3517.c +++ b/arch/arm/mach-omap2/board-cm-t3517.c @@ -188,15 +188,22 @@ static inline void cm_t3517_init_rtc(void) {} #define HSUSB2_RESET_GPIO (147) #define USB_HUB_RESET_GPIO (152) +static struct usbhs_phy_data phy_data[] __initdata = { + { + .port = 1, + .reset_gpio = HSUSB1_RESET_GPIO, + .vcc_gpio = -EINVAL, + }, + { + .port = 2, + .reset_gpio = HSUSB2_RESET_GPIO, + .vcc_gpio = -EINVAL, + }, +}; + static struct usbhs_omap_platform_data cm_t3517_ehci_pdata __initdata = { .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, - .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED, - - .phy_reset = true, - .reset_gpio_port[0] = HSUSB1_RESET_GPIO, - .reset_gpio_port[1] = HSUSB2_RESET_GPIO, - .reset_gpio_port[2] = -EINVAL, }; static int __init cm_t3517_init_usbh(void) @@ -213,6 +220,7 @@ static int __init cm_t3517_init_usbh(void) msleep(1); } + usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data)); usbhs_init(&cm_t3517_ehci_pdata); return 0; @@ -324,6 +332,6 @@ MACHINE_START(CM_T3517, "Compulab CM-T3517") .handle_irq = omap3_intc_handle_irq, .init_machine = cm_t3517_init, .init_late = am35xx_init_late, - .init_time = omap3_gp_gptimer_timer_init, + .init_time = omap3_gptimer_timer_init, .restart = omap3xxx_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c index 53056c3b0836..576420544178 100644 --- a/arch/arm/mach-omap2/board-devkit8000.c +++ b/arch/arm/mach-omap2/board-devkit8000.c @@ -43,8 +43,7 @@ #include "gpmc.h" #include <linux/platform_data/mtd-nand-omap2.h> #include <video/omapdss.h> -#include <video/omap-panel-generic-dpi.h> -#include <video/omap-panel-tfp410.h> +#include <video/omap-panel-data.h> #include <linux/platform_data/spi-omap2-mcspi.h> #include <linux/input/matrix_keypad.h> @@ -104,19 +103,6 @@ static struct omap2_hsmmc_info mmc[] = { {} /* Terminator */ }; -static int devkit8000_panel_enable_lcd(struct omap_dss_device *dssdev) -{ - if (gpio_is_valid(dssdev->reset_gpio)) - gpio_set_value_cansleep(dssdev->reset_gpio, 1); - return 0; -} - -static void devkit8000_panel_disable_lcd(struct omap_dss_device *dssdev) -{ - if (gpio_is_valid(dssdev->reset_gpio)) - gpio_set_value_cansleep(dssdev->reset_gpio, 0); -} - static struct regulator_consumer_supply devkit8000_vmmc1_supply[] = { REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), }; @@ -128,8 +114,7 @@ static struct regulator_consumer_supply devkit8000_vio_supply[] = { static struct panel_generic_dpi_data lcd_panel = { .name = "innolux_at070tn83", - .platform_enable = devkit8000_panel_enable_lcd, - .platform_disable = devkit8000_panel_disable_lcd, + /* gpios filled in code */ }; static struct omap_dss_device devkit8000_lcd_device = { @@ -211,8 +196,6 @@ static struct gpio_led gpio_leds[]; static int devkit8000_twl_gpio_setup(struct device *dev, unsigned gpio, unsigned ngpio) { - int ret; - /* gpio + 0 is "mmc0_cd" (input/IRQ) */ mmc[0].gpio_cd = gpio + 0; omap_hsmmc_late_init(mmc); @@ -221,13 +204,8 @@ static int devkit8000_twl_gpio_setup(struct device *dev, gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; /* TWL4030_GPIO_MAX + 0 is "LCD_PWREN" (out, active high) */ - devkit8000_lcd_device.reset_gpio = gpio + TWL4030_GPIO_MAX + 0; - ret = gpio_request_one(devkit8000_lcd_device.reset_gpio, - GPIOF_OUT_INIT_LOW, "LCD_PWREN"); - if (ret < 0) { - devkit8000_lcd_device.reset_gpio = -EINVAL; - printk(KERN_ERR "Failed to request GPIO for LCD_PWRN\n"); - } + lcd_panel.num_gpios = 1; + lcd_panel.gpios[0] = gpio + TWL4030_GPIO_MAX + 0; /* gpio + 7 is "DVI_PD" (out, active low) */ dvi_panel.power_down_gpio = gpio + 7; @@ -437,15 +415,7 @@ static struct platform_device *devkit8000_devices[] __initdata = { }; static struct usbhs_omap_platform_data usbhs_bdata __initdata = { - .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, - .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED, - .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED, - - .phy_reset = true, - .reset_gpio_port[0] = -EINVAL, - .reset_gpio_port[1] = -EINVAL, - .reset_gpio_port[2] = -EINVAL }; #ifdef CONFIG_OMAP_MUX diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index e54a48060198..88aa6b1835c3 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c @@ -110,6 +110,7 @@ MACHINE_END static const char *omap3_gp_boards_compat[] __initdata = { "ti,omap3-beagle", + "timll,omap3-devkit8000", NULL, }; @@ -140,7 +141,7 @@ DT_MACHINE_START(AM33XX_DT, "Generic AM33XX (Flattened Device Tree)") .init_irq = omap_intc_of_init, .handle_irq = omap3_intc_handle_irq, .init_machine = omap_generic_init, - .init_time = omap3_am33xx_gptimer_timer_init, + .init_time = omap3_gptimer_timer_init, .dt_compat = am33xx_boards_compat, .restart = am33xx_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c index 812c829fa46f..69c0acf5aa63 100644 --- a/arch/arm/mach-omap2/board-h4.c +++ b/arch/arm/mach-omap2/board-h4.c @@ -34,7 +34,7 @@ #include <asm/mach/map.h> #include <video/omapdss.h> -#include <video/omap-panel-generic-dpi.h> +#include <video/omap-panel-data.h> #include "common.h" #include "mux.h" @@ -246,7 +246,7 @@ static u32 is_gpmc_muxed(void) return 0; } -#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91x_MODULE) +#if IS_ENABLED(CONFIG_SMC91X) static struct omap_smc91x_platform_data board_smc91x_data = { .cs = 1, diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c index bf92678a01d0..b54562d1235e 100644 --- a/arch/arm/mach-omap2/board-igep0020.c +++ b/arch/arm/mach-omap2/board-igep0020.c @@ -31,7 +31,7 @@ #include <asm/mach/arch.h> #include <video/omapdss.h> -#include <video/omap-panel-tfp410.h> +#include <video/omap-panel-data.h> #include <linux/platform_data/mtd-onenand-omap2.h> #include "common.h" @@ -527,26 +527,28 @@ static void __init igep_i2c_init(void) omap3_pmic_init("twl4030", &igep_twldata); } +static struct usbhs_phy_data igep2_phy_data[] __initdata = { + { + .port = 1, + .reset_gpio = IGEP2_GPIO_USBH_NRESET, + .vcc_gpio = -EINVAL, + }, +}; + +static struct usbhs_phy_data igep3_phy_data[] __initdata = { + { + .port = 2, + .reset_gpio = IGEP3_GPIO_USBH_NRESET, + .vcc_gpio = -EINVAL, + }, +}; + static struct usbhs_omap_platform_data igep2_usbhs_bdata __initdata = { .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, - .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED, - .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED, - - .phy_reset = true, - .reset_gpio_port[0] = IGEP2_GPIO_USBH_NRESET, - .reset_gpio_port[1] = -EINVAL, - .reset_gpio_port[2] = -EINVAL, }; static struct usbhs_omap_platform_data igep3_usbhs_bdata __initdata = { - .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED, .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, - .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED, - - .phy_reset = true, - .reset_gpio_port[0] = -EINVAL, - .reset_gpio_port[1] = IGEP3_GPIO_USBH_NRESET, - .reset_gpio_port[2] = -EINVAL, }; #ifdef CONFIG_OMAP_MUX @@ -642,8 +644,10 @@ static void __init igep_init(void) if (machine_is_igep0020()) { omap_display_init(&igep2_dss_data); igep2_init_smsc911x(); + usbhs_init_phys(igep2_phy_data, ARRAY_SIZE(igep2_phy_data)); usbhs_init(&igep2_usbhs_bdata); } else { + usbhs_init_phys(igep3_phy_data, ARRAY_SIZE(igep3_phy_data)); usbhs_init(&igep3_usbhs_bdata); } } diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c index b12fe966a7b9..d0d17bc58d9b 100644 --- a/arch/arm/mach-omap2/board-ldp.c +++ b/arch/arm/mach-omap2/board-ldp.c @@ -41,7 +41,7 @@ #include "gpmc-smsc911x.h" #include <video/omapdss.h> -#include <video/omap-panel-generic-dpi.h> +#include <video/omap-panel-data.h> #include "board-flash.h" #include "mux.h" @@ -181,34 +181,13 @@ static inline void __init ldp_init_smsc911x(void) /* LCD */ -static int ldp_backlight_gpio; -static int ldp_lcd_enable_gpio; - #define LCD_PANEL_RESET_GPIO 55 #define LCD_PANEL_QVGA_GPIO 56 -static int ldp_panel_enable_lcd(struct omap_dss_device *dssdev) -{ - if (gpio_is_valid(ldp_lcd_enable_gpio)) - gpio_direction_output(ldp_lcd_enable_gpio, 1); - if (gpio_is_valid(ldp_backlight_gpio)) - gpio_direction_output(ldp_backlight_gpio, 1); - - return 0; -} - -static void ldp_panel_disable_lcd(struct omap_dss_device *dssdev) -{ - if (gpio_is_valid(ldp_lcd_enable_gpio)) - gpio_direction_output(ldp_lcd_enable_gpio, 0); - if (gpio_is_valid(ldp_backlight_gpio)) - gpio_direction_output(ldp_backlight_gpio, 0); -} - static struct panel_generic_dpi_data ldp_panel_data = { .name = "nec_nl2432dr22-11b", - .platform_enable = ldp_panel_enable_lcd, - .platform_disable = ldp_panel_disable_lcd, + .num_gpios = 4, + /* gpios filled in code */ }; static struct omap_dss_device ldp_lcd_device = { @@ -231,41 +210,19 @@ static struct omap_dss_board_info ldp_dss_data = { static void __init ldp_display_init(void) { - int r; - - static struct gpio gpios[] __initdata = { - {LCD_PANEL_RESET_GPIO, GPIOF_OUT_INIT_HIGH, "LCD RESET"}, - {LCD_PANEL_QVGA_GPIO, GPIOF_OUT_INIT_HIGH, "LCD QVGA"}, - }; - - r = gpio_request_array(gpios, ARRAY_SIZE(gpios)); - if (r) { - pr_err("Cannot request LCD GPIOs, error %d\n", r); - return; - } + ldp_panel_data.gpios[2] = LCD_PANEL_RESET_GPIO; + ldp_panel_data.gpios[3] = LCD_PANEL_QVGA_GPIO; omap_display_init(&ldp_dss_data); } static int ldp_twl_gpio_setup(struct device *dev, unsigned gpio, unsigned ngpio) { - int r; - - struct gpio gpios[] = { - {gpio + 7 , GPIOF_OUT_INIT_LOW, "LCD ENABLE"}, - {gpio + 15, GPIOF_OUT_INIT_LOW, "LCD BACKLIGHT"}, - }; - - r = gpio_request_array(gpios, ARRAY_SIZE(gpios)); - if (r) { - pr_err("Cannot request LCD GPIOs, error %d\n", r); - ldp_backlight_gpio = -EINVAL; - ldp_lcd_enable_gpio = -EINVAL; - return r; - } - - ldp_backlight_gpio = gpio + 15; - ldp_lcd_enable_gpio = gpio + 7; + ldp_panel_data.gpios[0] = gpio + 7; + ldp_panel_data.gpio_invert[0] = true; + + ldp_panel_data.gpios[1] = gpio + 15; + ldp_panel_data.gpio_invert[1] = true; return 0; } diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c index c3558f93d42c..04c116555412 100644 --- a/arch/arm/mach-omap2/board-omap3beagle.c +++ b/arch/arm/mach-omap2/board-omap3beagle.c @@ -33,6 +33,7 @@ #include <linux/mtd/nand.h> #include <linux/mmc/host.h> #include <linux/usb/phy.h> +#include <linux/usb/nop-usb-xceiv.h> #include <linux/regulator/machine.h> #include <linux/i2c/twl.h> @@ -43,7 +44,7 @@ #include <asm/mach/flash.h> #include <video/omapdss.h> -#include <video/omap-panel-tfp410.h> +#include <video/omap-panel-data.h> #include <linux/platform_data/mtd-nand-omap2.h> #include "common.h" @@ -111,13 +112,13 @@ static u8 omap3_beagle_version; */ static struct { int mmc1_gpio_wp; - int usb_pwr_level; + bool usb_pwr_level; /* 0 - Active Low, 1 - Active High */ int dvi_pd_gpio; int usr_button_gpio; int mmc_caps; } beagle_config = { .mmc1_gpio_wp = -EINVAL, - .usb_pwr_level = GPIOF_OUT_INIT_LOW, + .usb_pwr_level = 0, .dvi_pd_gpio = -EINVAL, .usr_button_gpio = 4, .mmc_caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, @@ -177,7 +178,7 @@ static void __init omap3_beagle_init_rev(void) case 0: printk(KERN_INFO "OMAP3 Beagle Rev: xM Ax/Bx\n"); omap3_beagle_version = OMAP3BEAGLE_BOARD_XM; - beagle_config.usb_pwr_level = GPIOF_OUT_INIT_HIGH; + beagle_config.usb_pwr_level = 1; beagle_config.mmc_caps &= ~MMC_CAP_8_BIT_DATA; break; case 2: @@ -277,6 +278,21 @@ static struct regulator_consumer_supply beagle_vsim_supply[] = { static struct gpio_led gpio_leds[]; +/* PHY's VCC regulator might be added later, so flag that we need it */ +static struct nop_usb_xceiv_platform_data hsusb2_phy_data = { + .needs_vcc = true, +}; + +static struct usbhs_phy_data phy_data[] = { + { + .port = 2, + .reset_gpio = 147, + .vcc_gpio = -1, /* updated in beagle_twl_gpio_setup */ + .vcc_polarity = 1, /* updated in beagle_twl_gpio_setup */ + .platform_data = &hsusb2_phy_data, + }, +}; + static int beagle_twl_gpio_setup(struct device *dev, unsigned gpio, unsigned ngpio) { @@ -318,9 +334,11 @@ static int beagle_twl_gpio_setup(struct device *dev, } dvi_panel.power_down_gpio = beagle_config.dvi_pd_gpio; - gpio_request_one(gpio + TWL4030_GPIO_MAX, beagle_config.usb_pwr_level, - "nEN_USB_PWR"); + /* TWL4030_GPIO_MAX i.e. LED_GPO controls HS USB Port 2 power */ + phy_data[0].vcc_gpio = gpio + TWL4030_GPIO_MAX; + phy_data[0].vcc_polarity = beagle_config.usb_pwr_level; + usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data)); return 0; } @@ -453,15 +471,7 @@ static struct platform_device *omap3_beagle_devices[] __initdata = { }; static struct usbhs_omap_platform_data usbhs_bdata __initdata = { - - .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED, .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, - .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED, - - .phy_reset = true, - .reset_gpio_port[0] = -EINVAL, - .reset_gpio_port[1] = 147, - .reset_gpio_port[2] = -EINVAL }; #ifdef CONFIG_OMAP_MUX @@ -479,7 +489,7 @@ static int __init beagle_opp_init(void) /* Initialize the omap3 opp table if not already created. */ r = omap3_opp_init(); - if (IS_ERR_VALUE(r) && (r != -EEXIST)) { + if (r < 0 && (r != -EEXIST)) { pr_err("%s: opp default init failed\n", __func__); return r; } @@ -543,7 +553,9 @@ static void __init omap3_beagle_init(void) usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb"); usb_musb_init(NULL); + usbhs_init(&usbhs_bdata); + board_nand_init(omap3beagle_nand_partitions, ARRAY_SIZE(omap3beagle_nand_partitions), NAND_CS, NAND_BUSWIDTH_16, NULL); diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c index 48789e0bb915..f76d0de7b406 100644 --- a/arch/arm/mach-omap2/board-omap3evm.c +++ b/arch/arm/mach-omap2/board-omap3evm.c @@ -51,7 +51,7 @@ #include "common.h" #include <linux/platform_data/spi-omap2-mcspi.h> #include <video/omapdss.h> -#include <video/omap-panel-tfp410.h> +#include <video/omap-panel-data.h> #include "soc.h" #include "mux.h" @@ -155,61 +155,43 @@ static inline void __init omap3evm_init_smsc911x(void) { return; } #define OMAP3EVM_LCD_PANEL_LR 2 #define OMAP3EVM_LCD_PANEL_UD 3 #define OMAP3EVM_LCD_PANEL_INI 152 -#define OMAP3EVM_LCD_PANEL_ENVDD 153 #define OMAP3EVM_LCD_PANEL_QVGA 154 #define OMAP3EVM_LCD_PANEL_RESB 155 + +#define OMAP3EVM_LCD_PANEL_ENVDD 153 #define OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO 210 + +/* + * OMAP3EVM DVI control signals + */ #define OMAP3EVM_DVI_PANEL_EN_GPIO 199 -static struct gpio omap3_evm_dss_gpios[] __initdata = { - { OMAP3EVM_LCD_PANEL_RESB, GPIOF_OUT_INIT_HIGH, "lcd_panel_resb" }, - { OMAP3EVM_LCD_PANEL_INI, GPIOF_OUT_INIT_HIGH, "lcd_panel_ini" }, - { OMAP3EVM_LCD_PANEL_QVGA, GPIOF_OUT_INIT_LOW, "lcd_panel_qvga" }, - { OMAP3EVM_LCD_PANEL_LR, GPIOF_OUT_INIT_HIGH, "lcd_panel_lr" }, - { OMAP3EVM_LCD_PANEL_UD, GPIOF_OUT_INIT_HIGH, "lcd_panel_ud" }, - { OMAP3EVM_LCD_PANEL_ENVDD, GPIOF_OUT_INIT_LOW, "lcd_panel_envdd" }, +static struct panel_sharp_ls037v7dw01_data omap3_evm_lcd_data = { + .resb_gpio = OMAP3EVM_LCD_PANEL_RESB, + .ini_gpio = OMAP3EVM_LCD_PANEL_INI, + .mo_gpio = OMAP3EVM_LCD_PANEL_QVGA, + .lr_gpio = OMAP3EVM_LCD_PANEL_LR, + .ud_gpio = OMAP3EVM_LCD_PANEL_UD, }; -static int lcd_enabled; -static int dvi_enabled; - static void __init omap3_evm_display_init(void) { int r; - r = gpio_request_array(omap3_evm_dss_gpios, - ARRAY_SIZE(omap3_evm_dss_gpios)); + r = gpio_request_one(OMAP3EVM_LCD_PANEL_ENVDD, GPIOF_OUT_INIT_LOW, + "lcd_panel_envdd"); if (r) - printk(KERN_ERR "failed to get lcd_panel_* gpios\n"); -} + pr_err("failed to get lcd_panel_envdd GPIO\n"); -static int omap3_evm_enable_lcd(struct omap_dss_device *dssdev) -{ - if (dvi_enabled) { - printk(KERN_ERR "cannot enable LCD, DVI is enabled\n"); - return -EINVAL; - } - gpio_set_value(OMAP3EVM_LCD_PANEL_ENVDD, 0); + r = gpio_request_one(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, + GPIOF_OUT_INIT_LOW, "lcd_panel_bklight"); + if (r) + pr_err("failed to get lcd_panel_bklight GPIO\n"); if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 0); else gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 1); - - lcd_enabled = 1; - return 0; -} - -static void omap3_evm_disable_lcd(struct omap_dss_device *dssdev) -{ - gpio_set_value(OMAP3EVM_LCD_PANEL_ENVDD, 1); - - if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) - gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 1); - else - gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 0); - - lcd_enabled = 0; } static struct omap_dss_device omap3_evm_lcd_device = { @@ -217,26 +199,14 @@ static struct omap_dss_device omap3_evm_lcd_device = { .driver_name = "sharp_ls_panel", .type = OMAP_DISPLAY_TYPE_DPI, .phy.dpi.data_lines = 18, - .platform_enable = omap3_evm_enable_lcd, - .platform_disable = omap3_evm_disable_lcd, + .data = &omap3_evm_lcd_data, }; -static int omap3_evm_enable_tv(struct omap_dss_device *dssdev) -{ - return 0; -} - -static void omap3_evm_disable_tv(struct omap_dss_device *dssdev) -{ -} - static struct omap_dss_device omap3_evm_tv_device = { .name = "tv", .driver_name = "venc", .type = OMAP_DISPLAY_TYPE_VENC, .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, - .platform_enable = omap3_evm_enable_tv, - .platform_disable = omap3_evm_disable_tv, }; static struct tfp410_platform_data dvi_panel = { @@ -496,7 +466,7 @@ struct wl12xx_platform_data omap3evm_wlan_data __initdata = { static struct regulator_consumer_supply omap3evm_vaux2_supplies[] = { REGULATOR_SUPPLY("VDD_CSIPHY1", "omap3isp"), /* OMAP ISP */ REGULATOR_SUPPLY("VDD_CSIPHY2", "omap3isp"), /* OMAP ISP */ - REGULATOR_SUPPLY("hsusb1", "ehci-omap.0"), + REGULATOR_SUPPLY("vcc", "nop_usb_xceiv.2"), /* hsusb port 2 */ REGULATOR_SUPPLY("vaux2", NULL), }; @@ -539,17 +509,16 @@ static int __init omap3_evm_i2c_init(void) return 0; } -static struct usbhs_omap_platform_data usbhs_bdata __initdata = { +static struct usbhs_phy_data phy_data[] __initdata = { + { + .port = 2, + .reset_gpio = -1, /* set at runtime */ + .vcc_gpio = -EINVAL, + }, +}; - .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED, +static struct usbhs_omap_platform_data usbhs_bdata __initdata = { .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, - .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED, - - .phy_reset = true, - /* PHY reset GPIO will be runtime programmed based on EVM version */ - .reset_gpio_port[0] = -EINVAL, - .reset_gpio_port[1] = -EINVAL, - .reset_gpio_port[2] = -EINVAL }; #ifdef CONFIG_OMAP_MUX @@ -725,7 +694,7 @@ static void __init omap3_evm_init(void) /* setup EHCI phy reset config */ omap_mux_init_gpio(21, OMAP_PIN_INPUT_PULLUP); - usbhs_bdata.reset_gpio_port[1] = 21; + phy_data[0].reset_gpio = 21; /* EVM REV >= E can supply 500mA with EXTVBUS programming */ musb_board_data.power = 500; @@ -733,10 +702,12 @@ static void __init omap3_evm_init(void) } else { /* setup EHCI phy reset on MDC */ omap_mux_init_gpio(135, OMAP_PIN_OUTPUT); - usbhs_bdata.reset_gpio_port[1] = 135; + phy_data[0].reset_gpio = 135; } usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb"); usb_musb_init(&musb_board_data); + + usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data)); usbhs_init(&usbhs_bdata); board_nand_init(omap3evm_nand_partitions, ARRAY_SIZE(omap3evm_nand_partitions), NAND_CS, diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c index 2bba362148a0..28133d5b4fed 100644 --- a/arch/arm/mach-omap2/board-omap3pandora.c +++ b/arch/arm/mach-omap2/board-omap3pandora.c @@ -44,6 +44,7 @@ #include "common.h" #include <video/omapdss.h> +#include <video/omap-panel-data.h> #include <linux/platform_data/mtd-nand-omap2.h> #include "mux.h" @@ -230,12 +231,16 @@ static struct twl4030_keypad_data pandora_kp_data = { .rep = 1, }; +static struct panel_tpo_td043_data lcd_data = { + .nreset_gpio = 157, +}; + static struct omap_dss_device pandora_lcd_device = { .name = "lcd", .driver_name = "tpo_td043mtea1_panel", .type = OMAP_DISPLAY_TYPE_DPI, .phy.dpi.data_lines = 24, - .reset_gpio = 157, + .data = &lcd_data, }; static struct omap_dss_device pandora_tv_device = { @@ -346,7 +351,7 @@ static struct regulator_consumer_supply pandora_vcc_lcd_supply[] = { }; static struct regulator_consumer_supply pandora_usb_phy_supply[] = { - REGULATOR_SUPPLY("hsusb1", "ehci-omap.0"), + REGULATOR_SUPPLY("vcc", "nop_usb_xceiv.2"), /* hsusb port 2 */ }; /* ads7846 on SPI and 2 nub controllers on I2C */ @@ -561,6 +566,14 @@ fail: printk(KERN_ERR "wl1251 board initialisation failed\n"); } +static struct usbhs_phy_data phy_data[] __initdata = { + { + .port = 2, + .reset_gpio = 16, + .vcc_gpio = -EINVAL, + }, +}; + static struct platform_device *omap3pandora_devices[] __initdata = { &pandora_leds_gpio, &pandora_keys_gpio, @@ -569,15 +582,7 @@ static struct platform_device *omap3pandora_devices[] __initdata = { }; static struct usbhs_omap_platform_data usbhs_bdata __initdata = { - - .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED, .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, - .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED, - - .phy_reset = true, - .reset_gpio_port[0] = -EINVAL, - .reset_gpio_port[1] = 16, - .reset_gpio_port[2] = -EINVAL }; #ifdef CONFIG_OMAP_MUX @@ -601,7 +606,10 @@ static void __init omap3pandora_init(void) spi_register_board_info(omap3pandora_spi_board_info, ARRAY_SIZE(omap3pandora_spi_board_info)); omap_ads7846_init(1, OMAP3_PANDORA_TS_GPIO, 0, NULL); + + usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data)); usbhs_init(&usbhs_bdata); + usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb"); usb_musb_init(NULL); gpmc_nand_init(&pandora_nand_data, NULL); diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c index 95c10b3aa678..d37e6b187ae4 100644 --- a/arch/arm/mach-omap2/board-omap3stalker.c +++ b/arch/arm/mach-omap2/board-omap3stalker.c @@ -44,8 +44,7 @@ #include "gpmc.h" #include <linux/platform_data/mtd-nand-omap2.h> #include <video/omapdss.h> -#include <video/omap-panel-generic-dpi.h> -#include <video/omap-panel-tfp410.h> +#include <video/omap-panel-data.h> #include <linux/platform_data/spi-omap2-mcspi.h> @@ -95,15 +94,6 @@ static void __init omap3_stalker_display_init(void) return; } -static int omap3_stalker_enable_tv(struct omap_dss_device *dssdev) -{ - return 0; -} - -static void omap3_stalker_disable_tv(struct omap_dss_device *dssdev) -{ -} - static struct omap_dss_device omap3_stalker_tv_device = { .name = "tv", .driver_name = "venc", @@ -113,8 +103,6 @@ static struct omap_dss_device omap3_stalker_tv_device = { #elif defined(CONFIG_OMAP2_VENC_OUT_TYPE_COMPOSITE) .u.venc.type = OMAP_DSS_VENC_TYPE_COMPOSITE, #endif - .platform_enable = omap3_stalker_enable_tv, - .platform_disable = omap3_stalker_disable_tv, }; static struct tfp410_platform_data dvi_panel = { @@ -358,19 +346,20 @@ static int __init omap3_stalker_i2c_init(void) #define OMAP3_STALKER_TS_GPIO 175 +static struct usbhs_phy_data phy_data[] __initdata = { + { + .port = 2, + .reset_gpio = 21, + .vcc_gpio = -EINVAL, + }, +}; + static struct platform_device *omap3_stalker_devices[] __initdata = { &keys_gpio, }; static struct usbhs_omap_platform_data usbhs_bdata __initdata = { - .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED, .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, - .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED, - - .phy_reset = true, - .reset_gpio_port[0] = -EINVAL, - .reset_gpio_port[1] = 21, - .reset_gpio_port[2] = -EINVAL, }; #ifdef CONFIG_OMAP_MUX @@ -407,6 +396,8 @@ static void __init omap3_stalker_init(void) omap_sdrc_init(mt46h32m32lf6_sdrc_params, NULL); usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb"); usb_musb_init(NULL); + + usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data)); usbhs_init(&usbhs_bdata); omap_ads7846_init(1, OMAP3_STALKER_TS_GPIO, 310, NULL); diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c index bcd44fbcd877..7da48bc42bbf 100644 --- a/arch/arm/mach-omap2/board-omap3touchbook.c +++ b/arch/arm/mach-omap2/board-omap3touchbook.c @@ -305,21 +305,22 @@ static struct omap_board_mux board_mux[] __initdata = { }; #endif +static struct usbhs_phy_data phy_data[] __initdata = { + { + .port = 2, + .reset_gpio = 147, + .vcc_gpio = -EINVAL, + }, +}; + static struct platform_device *omap3_touchbook_devices[] __initdata = { &leds_gpio, &keys_gpio, }; static struct usbhs_omap_platform_data usbhs_bdata __initdata = { - .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, - .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED, - - .phy_reset = true, - .reset_gpio_port[0] = -EINVAL, - .reset_gpio_port[1] = 147, - .reset_gpio_port[2] = -EINVAL }; static void omap3_touchbook_poweroff(void) @@ -368,6 +369,8 @@ static void __init omap3_touchbook_init(void) omap_ads7846_init(4, OMAP3_TS_GPIO, 310, &ads7846_pdata); usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb"); usb_musb_init(NULL); + + usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data)); usbhs_init(&usbhs_bdata); board_nand_init(omap3touchbook_nand_partitions, ARRAY_SIZE(omap3touchbook_nand_partitions), NAND_CS, diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c index b02c2f00609b..1e2c75eee912 100644 --- a/arch/arm/mach-omap2/board-omap4panda.c +++ b/arch/arm/mach-omap2/board-omap4panda.c @@ -31,6 +31,7 @@ #include <linux/ti_wilink_st.h> #include <linux/usb/musb.h> #include <linux/usb/phy.h> +#include <linux/usb/nop-usb-xceiv.h> #include <linux/wl12xx.h> #include <linux/irqchip/arm-gic.h> #include <linux/platform_data/omap-abe-twl6040.h> @@ -132,6 +133,22 @@ static struct platform_device btwilink_device = { .id = -1, }; +/* PHY device on HS USB Port 1 i.e. nop_usb_xceiv.1 */ +static struct nop_usb_xceiv_platform_data hsusb1_phy_data = { + /* FREF_CLK3 provides the 19.2 MHz reference clock to the PHY */ + .clk_rate = 19200000, +}; + +static struct usbhs_phy_data phy_data[] __initdata = { + { + .port = 1, + .reset_gpio = GPIO_HUB_NRESET, + .vcc_gpio = GPIO_HUB_POWER, + .vcc_polarity = 1, + .platform_data = &hsusb1_phy_data, + }, +}; + static struct platform_device *panda_devices[] __initdata = { &leds_gpio, &wl1271_device, @@ -142,49 +159,19 @@ static struct platform_device *panda_devices[] __initdata = { static struct usbhs_omap_platform_data usbhs_bdata __initdata = { .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, - .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED, - .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED, - .phy_reset = false, - .reset_gpio_port[0] = -EINVAL, - .reset_gpio_port[1] = -EINVAL, - .reset_gpio_port[2] = -EINVAL -}; - -static struct gpio panda_ehci_gpios[] __initdata = { - { GPIO_HUB_POWER, GPIOF_OUT_INIT_LOW, "hub_power" }, - { GPIO_HUB_NRESET, GPIOF_OUT_INIT_LOW, "hub_nreset" }, }; static void __init omap4_ehci_init(void) { int ret; - struct clk *phy_ref_clk; /* FREF_CLK3 provides the 19.2 MHz reference clock to the PHY */ - phy_ref_clk = clk_get(NULL, "auxclk3_ck"); - if (IS_ERR(phy_ref_clk)) { - pr_err("Cannot request auxclk3\n"); - return; - } - clk_set_rate(phy_ref_clk, 19200000); - clk_prepare_enable(phy_ref_clk); - - /* disable the power to the usb hub prior to init and reset phy+hub */ - ret = gpio_request_array(panda_ehci_gpios, - ARRAY_SIZE(panda_ehci_gpios)); - if (ret) { - pr_err("Unable to initialize EHCI power/reset\n"); - return; - } - - gpio_export(GPIO_HUB_POWER, 0); - gpio_export(GPIO_HUB_NRESET, 0); - gpio_set_value(GPIO_HUB_NRESET, 1); + ret = clk_add_alias("main_clk", "nop_usb_xceiv.1", "auxclk3_ck", NULL); + if (ret) + pr_err("Failed to add main_clk alias to auxclk3_ck\n"); + usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data)); usbhs_init(&usbhs_bdata); - - /* enable power to hub */ - gpio_set_value(GPIO_HUB_POWER, 1); } static struct omap_musb_board_data musb_board_data = { @@ -448,7 +435,7 @@ static void __init omap4_panda_init(void) omap_sdrc_init(NULL, NULL); omap4_twl6030_hsmmc_init(mmc); omap4_ehci_init(); - usb_bind_phy("musb-hdrc.0.auto", 0, "omap-usb2.1.auto"); + usb_bind_phy("musb-hdrc.2.auto", 0, "omap-usb2.3.auto"); usb_musb_init(&musb_board_data); omap4_panda_display_init(); } diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c index 86bab51154ee..4ca6b680aa72 100644 --- a/arch/arm/mach-omap2/board-overo.c +++ b/arch/arm/mach-omap2/board-overo.c @@ -47,8 +47,7 @@ #include <asm/mach/map.h> #include <video/omapdss.h> -#include <video/omap-panel-generic-dpi.h> -#include <video/omap-panel-tfp410.h> +#include <video/omap-panel-data.h> #include "common.h" #include "mux.h" @@ -146,28 +145,9 @@ static inline void __init overo_init_smsc911x(void) { return; } #endif /* DSS */ -static int lcd_enabled; -static int dvi_enabled; - #define OVERO_GPIO_LCD_EN 144 #define OVERO_GPIO_LCD_BL 145 -static struct gpio overo_dss_gpios[] __initdata = { - { OVERO_GPIO_LCD_EN, GPIOF_OUT_INIT_HIGH, "OVERO_GPIO_LCD_EN" }, - { OVERO_GPIO_LCD_BL, GPIOF_OUT_INIT_HIGH, "OVERO_GPIO_LCD_BL" }, -}; - -static void __init overo_display_init(void) -{ - if (gpio_request_array(overo_dss_gpios, ARRAY_SIZE(overo_dss_gpios))) { - printk(KERN_ERR "could not obtain DSS control GPIOs\n"); - return; - } - - gpio_export(OVERO_GPIO_LCD_EN, 0); - gpio_export(OVERO_GPIO_LCD_BL, 0); -} - static struct tfp410_platform_data dvi_panel = { .i2c_bus_num = 3, .power_down_gpio = -1, @@ -188,30 +168,13 @@ static struct omap_dss_device overo_tv_device = { .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, }; -static int overo_panel_enable_lcd(struct omap_dss_device *dssdev) -{ - if (dvi_enabled) { - printk(KERN_ERR "cannot enable LCD, DVI is enabled\n"); - return -EINVAL; - } - - gpio_set_value(OVERO_GPIO_LCD_EN, 1); - gpio_set_value(OVERO_GPIO_LCD_BL, 1); - lcd_enabled = 1; - return 0; -} - -static void overo_panel_disable_lcd(struct omap_dss_device *dssdev) -{ - gpio_set_value(OVERO_GPIO_LCD_EN, 0); - gpio_set_value(OVERO_GPIO_LCD_BL, 0); - lcd_enabled = 0; -} - static struct panel_generic_dpi_data lcd43_panel = { .name = "samsung_lte430wq_f0c", - .platform_enable = overo_panel_enable_lcd, - .platform_disable = overo_panel_disable_lcd, + .num_gpios = 2, + .gpios = { + OVERO_GPIO_LCD_EN, + OVERO_GPIO_LCD_BL + }, }; static struct omap_dss_device overo_lcd43_device = { @@ -224,13 +187,20 @@ static struct omap_dss_device overo_lcd43_device = { #if defined(CONFIG_PANEL_LGPHILIPS_LB035Q02) || \ defined(CONFIG_PANEL_LGPHILIPS_LB035Q02_MODULE) +static struct panel_generic_dpi_data lcd35_panel = { + .num_gpios = 2, + .gpios = { + OVERO_GPIO_LCD_EN, + OVERO_GPIO_LCD_BL + }, +}; + static struct omap_dss_device overo_lcd35_device = { .type = OMAP_DISPLAY_TYPE_DPI, .name = "lcd35", .driver_name = "lgphilips_lb035q02_panel", .phy.dpi.data_lines = 24, - .platform_enable = overo_panel_enable_lcd, - .platform_disable = overo_panel_disable_lcd, + .data = &lcd35_panel, }; #endif @@ -458,14 +428,16 @@ static int __init overo_spi_init(void) return 0; } +static struct usbhs_phy_data phy_data[] __initdata = { + { + .port = 2, + .reset_gpio = OVERO_GPIO_USBH_NRESET, + .vcc_gpio = -EINVAL, + }, +}; + static struct usbhs_omap_platform_data usbhs_bdata __initdata = { - .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED, .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, - .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED, - .phy_reset = true, - .reset_gpio_port[0] = -EINVAL, - .reset_gpio_port[1] = OVERO_GPIO_USBH_NRESET, - .reset_gpio_port[2] = -EINVAL }; #ifdef CONFIG_OMAP_MUX @@ -502,10 +474,11 @@ static void __init overo_init(void) ARRAY_SIZE(overo_nand_partitions), NAND_CS, 0, NULL); usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb"); usb_musb_init(NULL); + + usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data)); usbhs_init(&usbhs_bdata); overo_spi_init(); overo_init_smsc911x(); - overo_display_init(); overo_init_led(); overo_init_keys(); omap_twl4030_audio_init("overo", NULL); diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c index 3a077df6b8df..18ca61e300b3 100644 --- a/arch/arm/mach-omap2/board-rx51-peripherals.c +++ b/arch/arm/mach-omap2/board-rx51-peripherals.c @@ -73,11 +73,11 @@ #define LIS302_IRQ1_GPIO 181 #define LIS302_IRQ2_GPIO 180 /* Not yet in use */ -/* list all spi devices here */ +/* List all SPI devices here. Note that the list/probe order seems to matter! */ enum { RX51_SPI_WL1251, - RX51_SPI_MIPID, /* LCD panel */ RX51_SPI_TSC2005, /* Touch Controller */ + RX51_SPI_MIPID, /* LCD panel */ }; static struct wl12xx_platform_data wl1251_pdata; @@ -547,12 +547,16 @@ static struct regulator_consumer_supply rx51_vio_supplies[] = { REGULATOR_SUPPLY("DVDD", "2-0019"), /* Si4713 IO supply */ REGULATOR_SUPPLY("vio", "2-0063"), + /* lis3lv02d */ + REGULATOR_SUPPLY("Vdd_IO", "3-001d"), }; static struct regulator_consumer_supply rx51_vaux1_consumers[] = { REGULATOR_SUPPLY("vdds_sdi", "omapdss"), /* Si4713 supply */ REGULATOR_SUPPLY("vdd", "2-0063"), + /* lis3lv02d */ + REGULATOR_SUPPLY("Vdd", "3-001d"), }; static struct regulator_init_data rx51_vaux1 = { diff --git a/arch/arm/mach-omap2/board-rx51-video.c b/arch/arm/mach-omap2/board-rx51-video.c index eb667261df08..bd74f9f6063b 100644 --- a/arch/arm/mach-omap2/board-rx51-video.c +++ b/arch/arm/mach-omap2/board-rx51-video.c @@ -16,6 +16,8 @@ #include <linux/mm.h> #include <asm/mach-types.h> #include <video/omapdss.h> +#include <video/omap-panel-data.h> + #include <linux/platform_data/spi-omap2-mcspi.h> #include "soc.h" @@ -27,25 +29,16 @@ #if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE) -static int rx51_lcd_enable(struct omap_dss_device *dssdev) -{ - gpio_set_value(dssdev->reset_gpio, 1); - return 0; -} - -static void rx51_lcd_disable(struct omap_dss_device *dssdev) -{ - gpio_set_value(dssdev->reset_gpio, 0); -} +static struct panel_acx565akm_data lcd_data = { + .reset_gpio = RX51_LCD_RESET_GPIO, +}; static struct omap_dss_device rx51_lcd_device = { .name = "lcd", .driver_name = "panel-acx565akm", .type = OMAP_DISPLAY_TYPE_SDI, .phy.sdi.datapairs = 2, - .reset_gpio = RX51_LCD_RESET_GPIO, - .platform_enable = rx51_lcd_enable, - .platform_disable = rx51_lcd_disable, + .data = &lcd_data, }; static struct omap_dss_device rx51_tv_device = { @@ -76,13 +69,8 @@ static int __init rx51_video_init(void) return 0; } - if (gpio_request_one(RX51_LCD_RESET_GPIO, GPIOF_OUT_INIT_HIGH, - "LCD ACX565AKM reset")) { - pr_err("%s failed to get LCD Reset GPIO\n", __func__); - return 0; - } - omap_display_init(&rx51_dss_board_info); + return 0; } diff --git a/arch/arm/mach-omap2/board-zoom-display.c b/arch/arm/mach-omap2/board-zoom-display.c index 8cef477d6b00..c2a079cb76fc 100644 --- a/arch/arm/mach-omap2/board-zoom-display.c +++ b/arch/arm/mach-omap2/board-zoom-display.c @@ -12,12 +12,12 @@ #include <linux/init.h> #include <linux/platform_device.h> #include <linux/gpio.h> -#include <linux/i2c/twl.h> #include <linux/spi/spi.h> #include <linux/platform_data/spi-omap2-mcspi.h> #include <video/omapdss.h> -#include "board-zoom.h" +#include <video/omap-panel-data.h> +#include "board-zoom.h" #include "soc.h" #include "common.h" @@ -25,92 +25,17 @@ #define LCD_PANEL_RESET_GPIO_PILOT 55 #define LCD_PANEL_QVGA_GPIO 56 -static struct gpio zoom_lcd_gpios[] __initdata = { - { -EINVAL, GPIOF_OUT_INIT_HIGH, "lcd reset" }, - { LCD_PANEL_QVGA_GPIO, GPIOF_OUT_INIT_HIGH, "lcd qvga" }, +static struct panel_nec_nl8048_data zoom_lcd_data = { + /* res_gpio filled in code */ + .qvga_gpio = LCD_PANEL_QVGA_GPIO, }; -static void __init zoom_lcd_panel_init(void) -{ - zoom_lcd_gpios[0].gpio = (omap_rev() > OMAP3430_REV_ES3_0) ? - LCD_PANEL_RESET_GPIO_PROD : - LCD_PANEL_RESET_GPIO_PILOT; - - if (gpio_request_array(zoom_lcd_gpios, ARRAY_SIZE(zoom_lcd_gpios))) - pr_err("%s: Failed to get LCD GPIOs.\n", __func__); -} - -static int zoom_panel_enable_lcd(struct omap_dss_device *dssdev) -{ - return 0; -} - -static void zoom_panel_disable_lcd(struct omap_dss_device *dssdev) -{ -} - -/* Register offsets in TWL4030_MODULE_INTBR */ -#define TWL_INTBR_PMBR1 0xD -#define TWL_INTBR_GPBR1 0xC - -/* Register offsets in TWL_MODULE_PWM */ -#define TWL_LED_PWMON 0x3 -#define TWL_LED_PWMOFF 0x4 - -static int zoom_set_bl_intensity(struct omap_dss_device *dssdev, int level) -{ -#ifdef CONFIG_TWL4030_CORE - unsigned char c; - u8 mux_pwm, enb_pwm; - - if (level > 100) - return -1; - - twl_i2c_read_u8(TWL4030_MODULE_INTBR, &mux_pwm, TWL_INTBR_PMBR1); - twl_i2c_read_u8(TWL4030_MODULE_INTBR, &enb_pwm, TWL_INTBR_GPBR1); - - if (level == 0) { - /* disable pwm1 output and clock */ - enb_pwm = enb_pwm & 0xF5; - /* change pwm1 pin to gpio pin */ - mux_pwm = mux_pwm & 0xCF; - twl_i2c_write_u8(TWL4030_MODULE_INTBR, - enb_pwm, TWL_INTBR_GPBR1); - twl_i2c_write_u8(TWL4030_MODULE_INTBR, - mux_pwm, TWL_INTBR_PMBR1); - return 0; - } - - if (!((enb_pwm & 0xA) && (mux_pwm & 0x30))) { - /* change gpio pin to pwm1 pin */ - mux_pwm = mux_pwm | 0x30; - /* enable pwm1 output and clock*/ - enb_pwm = enb_pwm | 0x0A; - twl_i2c_write_u8(TWL4030_MODULE_INTBR, - mux_pwm, TWL_INTBR_PMBR1); - twl_i2c_write_u8(TWL4030_MODULE_INTBR, - enb_pwm, TWL_INTBR_GPBR1); - } - - c = ((50 * (100 - level)) / 100) + 1; - twl_i2c_write_u8(TWL_MODULE_PWM, 0x7F, TWL_LED_PWMOFF); - twl_i2c_write_u8(TWL_MODULE_PWM, c, TWL_LED_PWMON); -#else - pr_warn("Backlight not enabled\n"); -#endif - - return 0; -} - static struct omap_dss_device zoom_lcd_device = { .name = "lcd", .driver_name = "NEC_8048_panel", .type = OMAP_DISPLAY_TYPE_DPI, .phy.dpi.data_lines = 24, - .platform_enable = zoom_panel_enable_lcd, - .platform_disable = zoom_panel_disable_lcd, - .max_backlight_level = 100, - .set_backlight = zoom_set_bl_intensity, + .data = &zoom_lcd_data, }; static struct omap_dss_device *zoom_dss_devices[] = { @@ -123,6 +48,13 @@ static struct omap_dss_board_info zoom_dss_data = { .default_device = &zoom_lcd_device, }; +static void __init zoom_lcd_panel_init(void) +{ + zoom_lcd_data.res_gpio = (omap_rev() > OMAP3430_REV_ES3_0) ? + LCD_PANEL_RESET_GPIO_PROD : + LCD_PANEL_RESET_GPIO_PILOT; +} + static struct omap2_mcspi_device_config dss_lcd_mcspi_config = { .turbo_mode = 1, }; diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c index cdc0c1021863..a90375d5b2b6 100644 --- a/arch/arm/mach-omap2/board-zoom-peripherals.c +++ b/arch/arm/mach-omap2/board-zoom-peripherals.c @@ -22,6 +22,9 @@ #include <linux/platform_data/gpio-omap.h> #include <linux/platform_data/omap-twl4030.h> #include <linux/usb/phy.h> +#include <linux/pwm.h> +#include <linux/leds_pwm.h> +#include <linux/pwm_backlight.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> @@ -193,6 +196,53 @@ static struct platform_device omap_vwlan_device = { }, }; +static struct pwm_lookup zoom_pwm_lookup[] = { + PWM_LOOKUP("twl-pwm", 0, "leds_pwm", "zoom::keypad"), + PWM_LOOKUP("twl-pwm", 1, "pwm-backlight", "backlight"), +}; + +static struct led_pwm zoom_pwm_leds[] = { + { + .name = "zoom::keypad", + .max_brightness = 127, + .pwm_period_ns = 7812500, + }, +}; + +static struct led_pwm_platform_data zoom_pwm_data = { + .num_leds = ARRAY_SIZE(zoom_pwm_leds), + .leds = zoom_pwm_leds, +}; + +static struct platform_device zoom_leds_pwm = { + .name = "leds_pwm", + .id = -1, + .dev = { + .platform_data = &zoom_pwm_data, + }, +}; + +static struct platform_pwm_backlight_data zoom_backlight_data = { + .pwm_id = 1, + .max_brightness = 127, + .dft_brightness = 127, + .pwm_period_ns = 7812500, +}; + +static struct platform_device zoom_backlight_pwm = { + .name = "pwm-backlight", + .id = -1, + .dev = { + .platform_data = &zoom_backlight_data, + }, +}; + +static struct platform_device *zoom_devices[] __initdata = { + &omap_vwlan_device, + &zoom_leds_pwm, + &zoom_backlight_pwm, +}; + static struct wl12xx_platform_data omap_zoom_wlan_data __initdata = { .board_ref_clock = WL12XX_REFCLOCK_26, /* 26 MHz */ }; @@ -301,7 +351,8 @@ void __init zoom_peripherals_init(void) omap_hsmmc_init(mmc); omap_i2c_init(); - platform_device_register(&omap_vwlan_device); + pwm_add_table(zoom_pwm_lookup, ARRAY_SIZE(zoom_pwm_lookup)); + platform_add_devices(zoom_devices, ARRAY_SIZE(zoom_devices)); usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb"); usb_musb_init(NULL); enable_board_wakeup_source(); diff --git a/arch/arm/mach-omap2/board-zoom.c b/arch/arm/mach-omap2/board-zoom.c index 5e4d4c9fe61a..1a3dd865d8eb 100644 --- a/arch/arm/mach-omap2/board-zoom.c +++ b/arch/arm/mach-omap2/board-zoom.c @@ -92,14 +92,16 @@ static struct mtd_partition zoom_nand_partitions[] = { }, }; +static struct usbhs_phy_data phy_data[] __initdata = { + { + .port = 2, + .reset_gpio = ZOOM3_EHCI_RESET_GPIO, + .vcc_gpio = -EINVAL, + }, +}; + static struct usbhs_omap_platform_data usbhs_bdata __initdata = { - .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED, .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, - .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED, - .phy_reset = true, - .reset_gpio_port[0] = -EINVAL, - .reset_gpio_port[1] = ZOOM3_EHCI_RESET_GPIO, - .reset_gpio_port[2] = -EINVAL, }; static void __init omap_zoom_init(void) @@ -109,6 +111,8 @@ static void __init omap_zoom_init(void) } else if (machine_is_omap_zoom3()) { omap3_mux_init(board_mux, OMAP_PACKAGE_CBP); omap_mux_init_gpio(ZOOM3_EHCI_RESET_GPIO, OMAP_PIN_OUTPUT); + + usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data)); usbhs_init(&usbhs_bdata); } diff --git a/arch/arm/mach-omap2/cclock2430_data.c b/arch/arm/mach-omap2/cclock2430_data.c index bda353b2f7d9..5e4b037bb24c 100644 --- a/arch/arm/mach-omap2/cclock2430_data.c +++ b/arch/arm/mach-omap2/cclock2430_data.c @@ -1978,9 +1978,11 @@ static struct omap_clk omap2430_clks[] = { CLK(NULL, "sdrc_ick", &sdrc_ick), CLK(NULL, "des_ick", &des_ick), CLK("omap-sham", "ick", &sha_ick), - CLK("omap_rng", "ick", &rng_ick), + CLK(NULL, "sha_ick", &sha_ick), + CLK("omap_rng", "ick", &rng_ick), CLK(NULL, "rng_ick", &rng_ick), CLK("omap-aes", "ick", &aes_ick), + CLK(NULL, "aes_ick", &aes_ick), CLK(NULL, "pka_ick", &pka_ick), CLK(NULL, "usb_fck", &usb_fck), CLK("musb-omap2430", "ick", &usbhs_ick), diff --git a/arch/arm/mach-omap2/cclock33xx_data.c b/arch/arm/mach-omap2/cclock33xx_data.c index dcc5bf57a263..6ebc7803bc3e 100644 --- a/arch/arm/mach-omap2/cclock33xx_data.c +++ b/arch/arm/mach-omap2/cclock33xx_data.c @@ -413,6 +413,14 @@ static struct clk smartreflex1_fck; DEFINE_STRUCT_CLK_HW_OMAP(smartreflex1_fck, NULL); DEFINE_STRUCT_CLK(smartreflex1_fck, dpll_core_ck_parents, clk_ops_null); +static struct clk sha0_fck; +DEFINE_STRUCT_CLK_HW_OMAP(sha0_fck, NULL); +DEFINE_STRUCT_CLK(sha0_fck, dpll_core_ck_parents, clk_ops_null); + +static struct clk aes0_fck; +DEFINE_STRUCT_CLK_HW_OMAP(aes0_fck, NULL); +DEFINE_STRUCT_CLK(aes0_fck, dpll_core_ck_parents, clk_ops_null); + /* * Modules clock nodes * @@ -878,6 +886,8 @@ static struct omap_clk am33xx_clks[] = { CLK(NULL, "mmu_fck", &mmu_fck), CLK(NULL, "smartreflex0_fck", &smartreflex0_fck), CLK(NULL, "smartreflex1_fck", &smartreflex1_fck), + CLK(NULL, "sha0_fck", &sha0_fck), + CLK(NULL, "aes0_fck", &aes0_fck), CLK(NULL, "timer1_fck", &timer1_fck), CLK(NULL, "timer2_fck", &timer2_fck), CLK(NULL, "timer3_fck", &timer3_fck), @@ -947,6 +957,14 @@ int __init am33xx_clk_init(void) clk_set_parent(&timer3_fck, &sys_clkin_ck); clk_set_parent(&timer6_fck, &sys_clkin_ck); + /* + * The On-Chip 32K RC Osc clock is not an accurate clock-source as per + * the design/spec, so as a result, for example, timer which supposed + * to get expired @60Sec, but will expire somewhere ~@40Sec, which is + * not expected by any use-case, so change WDT1 clock source to PRCM + * 32KHz clock. + */ + clk_set_parent(&wdt1_fck, &clkdiv32k_ick); return 0; } diff --git a/arch/arm/mach-omap2/cclock3xxx_data.c b/arch/arm/mach-omap2/cclock3xxx_data.c index 438d13341e23..45cd26430d1f 100644 --- a/arch/arm/mach-omap2/cclock3xxx_data.c +++ b/arch/arm/mach-omap2/cclock3xxx_data.c @@ -3471,8 +3471,10 @@ static struct omap_clk omap3xxx_clks[] = { CLK("usbhs_tll", "usb_tll_hs_usb_ch1_clk", &dummy_ck), CLK(NULL, "init_60m_fclk", &dummy_ck), CLK(NULL, "gpt1_fck", &gpt1_fck), + CLK(NULL, "aes2_ick", &aes2_ick), CLK(NULL, "wkup_32k_fck", &wkup_32k_fck), CLK(NULL, "gpio1_dbck", &gpio1_dbck), + CLK(NULL, "sha12_ick", &sha12_ick), CLK(NULL, "wdt2_fck", &wdt2_fck), CLK("omap_wdt", "ick", &wdt2_ick), CLK(NULL, "wdt2_ick", &wdt2_ick), diff --git a/arch/arm/mach-omap2/cclock44xx_data.c b/arch/arm/mach-omap2/cclock44xx_data.c index b1e77ef968fa..88e37a474334 100644 --- a/arch/arm/mach-omap2/cclock44xx_data.c +++ b/arch/arm/mach-omap2/cclock44xx_data.c @@ -52,6 +52,13 @@ */ #define OMAP4_DPLL_ABE_DEFFREQ 98304000 +/* + * OMAP4 USB DPLL default frequency. In OMAP4430 TRM version V, section + * "3.6.3.9.5 DPLL_USB Preferred Settings" shows that the preferred + * locked frequency for the USB DPLL is 960MHz. + */ +#define OMAP4_DPLL_USB_DEFFREQ 960000000 + /* Root clocks */ DEFINE_CLK_FIXED_RATE(extalt_clkin_ck, CLK_IS_ROOT, 59000000, 0x0); @@ -1011,6 +1018,10 @@ DEFINE_CLK_OMAP_MUX(hsmmc2_fclk, "l3_init_clkdm", hsmmc1_fclk_sel, OMAP4430_CM_L3INIT_MMC2_CLKCTRL, OMAP4430_CLKSEL_MASK, hsmmc1_fclk_parents, func_dmic_abe_gfclk_ops); +DEFINE_CLK_GATE(ocp2scp_usb_phy_phy_48m, "func_48m_fclk", &func_48m_fclk, 0x0, + OMAP4430_CM_L3INIT_USBPHYOCP2SCP_CLKCTRL, + OMAP4430_OPTFCLKEN_PHY_48M_SHIFT, 0x0, NULL); + DEFINE_CLK_GATE(sha2md5_fck, "l3_div_ck", &l3_div_ck, 0x0, OMAP4430_CM_L4SEC_SHA2MD51_CLKCTRL, OMAP4430_MODULEMODE_SWCTRL_SHIFT, 0x0, NULL); @@ -1549,6 +1560,7 @@ static struct omap_clk omap44xx_clks[] = { CLK(NULL, "per_mcbsp4_gfclk", &per_mcbsp4_gfclk), CLK(NULL, "hsmmc1_fclk", &hsmmc1_fclk), CLK(NULL, "hsmmc2_fclk", &hsmmc2_fclk), + CLK(NULL, "ocp2scp_usb_phy_phy_48m", &ocp2scp_usb_phy_phy_48m), CLK(NULL, "sha2md5_fck", &sha2md5_fck), CLK(NULL, "slimbus1_fclk_1", &slimbus1_fclk_1), CLK(NULL, "slimbus1_fclk_0", &slimbus1_fclk_0), @@ -1706,5 +1718,13 @@ int __init omap4xxx_clk_init(void) if (rc) pr_err("%s: failed to configure ABE DPLL!\n", __func__); + /* + * Lock USB DPLL on OMAP4 devices so that the L3INIT power + * domain can transition to retention state when not in use. + */ + rc = clk_set_rate(&dpll_usb_ck, OMAP4_DPLL_USB_DEFFREQ); + if (rc) + pr_err("%s: failed to configure USB DPLL!\n", __func__); + return 0; } diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c index 8474c7d228ee..0c38ca96c840 100644 --- a/arch/arm/mach-omap2/clock.c +++ b/arch/arm/mach-omap2/clock.c @@ -611,7 +611,7 @@ int __init omap2_clk_switch_mpurate_at_boot(const char *mpurate_ck_name) return -ENOENT; r = clk_set_rate(mpurate_ck, mpurate); - if (IS_ERR_VALUE(r)) { + if (r < 0) { WARN(1, "clock: %s: unable to set MPU rate to %d: %d\n", mpurate_ck_name, mpurate, r); clk_put(mpurate_ck); diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h index 1a568482a107..7d95bb053b93 100644 --- a/arch/arm/mach-omap2/common.h +++ b/arch/arm/mach-omap2/common.h @@ -82,8 +82,7 @@ extern void omap2_init_common_infrastructure(void); extern void omap2_sync32k_timer_init(void); extern void omap3_sync32k_timer_init(void); extern void omap3_secure_sync32k_timer_init(void); -extern void omap3_gp_gptimer_timer_init(void); -extern void omap3_am33xx_gptimer_timer_init(void); +extern void omap3_gptimer_timer_init(void); extern void omap4_local_timer_init(void); extern void omap5_realtime_timer_init(void); @@ -110,6 +109,14 @@ void am35xx_init_late(void); void ti81xx_init_late(void); int omap2_common_pm_late_init(void); +#ifdef CONFIG_SOC_BUS +void omap_soc_device_init(void); +#else +static inline void omap_soc_device_init(void) +{ +} +#endif + #if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430) void omap2xxx_restart(char mode, const char *cmd); #else @@ -249,7 +256,6 @@ extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state); extern int omap4_finish_suspend(unsigned long cpu_state); extern void omap4_cpu_resume(void); extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state); -extern u32 omap4_mpuss_read_prev_context_state(void); #else static inline int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state) @@ -277,10 +283,6 @@ static inline int omap4_finish_suspend(unsigned long cpu_state) static inline void omap4_cpu_resume(void) {} -static inline u32 omap4_mpuss_read_prev_context_state(void) -{ - return 0; -} #endif struct omap_sdrc_params; @@ -293,5 +295,8 @@ extern void omap_reserve(void); struct omap_hwmod; extern int omap_dss_reset(struct omap_hwmod *); +/* SoC specific clock initializer */ +extern int (*omap_clk_init)(void); + #endif /* __ASSEMBLER__ */ #endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */ diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c index 06f567faf993..e18709d3b95d 100644 --- a/arch/arm/mach-omap2/cpuidle34xx.c +++ b/arch/arm/mach-omap2/cpuidle34xx.c @@ -26,6 +26,7 @@ #include <linux/cpuidle.h> #include <linux/export.h> #include <linux/cpu_pm.h> +#include <asm/cpuidle.h> #include "powerdomain.h" #include "clockdomain.h" @@ -99,11 +100,15 @@ static struct omap3_idle_statedata omap3_idle_data[] = { }, }; -/* Private functions */ - -static int __omap3_enter_idle(struct cpuidle_device *dev, - struct cpuidle_driver *drv, - int index) +/** + * omap3_enter_idle - Programs OMAP3 to enter the specified state + * @dev: cpuidle device + * @drv: cpuidle driver + * @index: the index of state to be entered + */ +static int omap3_enter_idle(struct cpuidle_device *dev, + struct cpuidle_driver *drv, + int index) { struct omap3_idle_statedata *cx = &omap3_idle_data[index]; @@ -146,22 +151,6 @@ return_sleep_time: } /** - * omap3_enter_idle - Programs OMAP3 to enter the specified state - * @dev: cpuidle device - * @drv: cpuidle driver - * @index: the index of state to be entered - * - * Called from the CPUidle framework to program the device to the - * specified target state selected by the governor. - */ -static inline int omap3_enter_idle(struct cpuidle_device *dev, - struct cpuidle_driver *drv, - int index) -{ - return cpuidle_wrap_enter(dev, drv, index, __omap3_enter_idle); -} - -/** * next_valid_state - Find next valid C-state * @dev: cpuidle device * @drv: cpuidle driver @@ -268,11 +257,9 @@ static int omap3_enter_idle_bm(struct cpuidle_device *dev, return ret; } -static DEFINE_PER_CPU(struct cpuidle_device, omap3_idle_dev); - static struct cpuidle_driver omap3_idle_driver = { - .name = "omap3_idle", - .owner = THIS_MODULE, + .name = "omap3_idle", + .owner = THIS_MODULE, .states = { { .enter = omap3_enter_idle_bm, @@ -345,8 +332,6 @@ static struct cpuidle_driver omap3_idle_driver = { */ int __init omap3_idle_init(void) { - struct cpuidle_device *dev; - mpu_pd = pwrdm_lookup("mpu_pwrdm"); core_pd = pwrdm_lookup("core_pwrdm"); per_pd = pwrdm_lookup("per_pwrdm"); @@ -355,16 +340,5 @@ int __init omap3_idle_init(void) if (!mpu_pd || !core_pd || !per_pd || !cam_pd) return -ENODEV; - cpuidle_register_driver(&omap3_idle_driver); - - dev = &per_cpu(omap3_idle_dev, smp_processor_id()); - dev->cpu = 0; - - if (cpuidle_register_device(dev)) { - printk(KERN_ERR "%s: CPUidle register device failed\n", - __func__); - return -EIO; - } - - return 0; + return cpuidle_register(&omap3_idle_driver, NULL); } diff --git a/arch/arm/mach-omap2/cpuidle44xx.c b/arch/arm/mach-omap2/cpuidle44xx.c index 944e64aad7e5..c443f2e97e10 100644 --- a/arch/arm/mach-omap2/cpuidle44xx.c +++ b/arch/arm/mach-omap2/cpuidle44xx.c @@ -1,7 +1,7 @@ /* - * OMAP4 CPU idle Routines + * OMAP4+ CPU idle Routines * - * Copyright (C) 2011 Texas Instruments, Inc. + * Copyright (C) 2011-2013 Texas Instruments, Inc. * Santosh Shilimkar <santosh.shilimkar@ti.com> * Rajendra Nayak <rnayak@ti.com> * @@ -14,8 +14,8 @@ #include <linux/cpuidle.h> #include <linux/cpu_pm.h> #include <linux/export.h> -#include <linux/clockchips.h> +#include <asm/cpuidle.h> #include <asm/proc-fns.h> #include "common.h" @@ -24,13 +24,13 @@ #include "clockdomain.h" /* Machine specific information */ -struct omap4_idle_statedata { +struct idle_statedata { u32 cpu_state; u32 mpu_logic_state; u32 mpu_state; }; -static struct omap4_idle_statedata omap4_idle_data[] = { +static struct idle_statedata omap4_idle_data[] = { { .cpu_state = PWRDM_POWER_ON, .mpu_state = PWRDM_POWER_ON, @@ -53,11 +53,12 @@ static struct clockdomain *cpu_clkdm[NR_CPUS]; static atomic_t abort_barrier; static bool cpu_done[NR_CPUS]; +static struct idle_statedata *state_ptr = &omap4_idle_data[0]; /* Private functions */ /** - * omap4_enter_idle_coupled_[simple/coupled] - OMAP4 cpuidle entry functions + * omap_enter_idle_[simple/coupled] - OMAP4PLUS cpuidle entry functions * @dev: cpuidle device * @drv: cpuidle driver * @index: the index of state to be entered @@ -66,7 +67,7 @@ static bool cpu_done[NR_CPUS]; * specified low power state selected by the governor. * Returns the amount of time spent in the low power state. */ -static int omap4_enter_idle_simple(struct cpuidle_device *dev, +static int omap_enter_idle_simple(struct cpuidle_device *dev, struct cpuidle_driver *drv, int index) { @@ -74,12 +75,11 @@ static int omap4_enter_idle_simple(struct cpuidle_device *dev, return index; } -static int omap4_enter_idle_coupled(struct cpuidle_device *dev, +static int omap_enter_idle_coupled(struct cpuidle_device *dev, struct cpuidle_driver *drv, int index) { - struct omap4_idle_statedata *cx = &omap4_idle_data[index]; - int cpu_id = smp_processor_id(); + struct idle_statedata *cx = state_ptr + index; /* * CPU0 has to wait and stay ON until CPU1 is OFF state. @@ -104,8 +104,6 @@ static int omap4_enter_idle_coupled(struct cpuidle_device *dev, } } - clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu_id); - /* * Call idle CPU PM enter notifier chain so that * VFP and per CPU interrupt context is saved. @@ -131,6 +129,7 @@ static int omap4_enter_idle_coupled(struct cpuidle_device *dev, /* Wakeup CPU1 only if it is not offlined */ if (dev->cpu == 0 && cpumask_test_cpu(1, cpu_online_mask)) { clkdm_wakeup(cpu_clkdm[1]); + omap_set_pwrdm_state(cpu_pd[1], PWRDM_POWER_ON); clkdm_allow_idle(cpu_clkdm[1]); } @@ -144,11 +143,10 @@ static int omap4_enter_idle_coupled(struct cpuidle_device *dev, * Call idle CPU cluster PM exit notifier chain * to restore GIC and wakeupgen context. */ - if (omap4_mpuss_read_prev_context_state()) + if ((cx->mpu_state == PWRDM_POWER_RET) && + (cx->mpu_logic_state == PWRDM_POWER_OFF)) cpu_cluster_pm_exit(); - clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu_id); - fail: cpuidle_coupled_parallel_barrier(dev, &abort_barrier); cpu_done[dev->cpu] = false; @@ -156,49 +154,38 @@ fail: return index; } -/* - * For each cpu, setup the broadcast timer because local timers - * stops for the states above C1. - */ -static void omap_setup_broadcast_timer(void *arg) -{ - int cpu = smp_processor_id(); - clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ON, &cpu); -} - -static DEFINE_PER_CPU(struct cpuidle_device, omap4_idle_dev); - static struct cpuidle_driver omap4_idle_driver = { .name = "omap4_idle", .owner = THIS_MODULE, - .en_core_tk_irqen = 1, .states = { { /* C1 - CPU0 ON + CPU1 ON + MPU ON */ .exit_latency = 2 + 2, .target_residency = 5, .flags = CPUIDLE_FLAG_TIME_VALID, - .enter = omap4_enter_idle_simple, + .enter = omap_enter_idle_simple, .name = "C1", - .desc = "MPUSS ON" + .desc = "CPUx ON, MPUSS ON" }, { /* C2 - CPU0 OFF + CPU1 OFF + MPU CSWR */ .exit_latency = 328 + 440, .target_residency = 960, - .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_COUPLED, - .enter = omap4_enter_idle_coupled, + .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_COUPLED | + CPUIDLE_FLAG_TIMER_STOP, + .enter = omap_enter_idle_coupled, .name = "C2", - .desc = "MPUSS CSWR", + .desc = "CPUx OFF, MPUSS CSWR", }, { /* C3 - CPU0 OFF + CPU1 OFF + MPU OSWR */ .exit_latency = 460 + 518, .target_residency = 1100, - .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_COUPLED, - .enter = omap4_enter_idle_coupled, + .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_COUPLED | + CPUIDLE_FLAG_TIMER_STOP, + .enter = omap_enter_idle_coupled, .name = "C3", - .desc = "MPUSS OSWR", + .desc = "CPUx OFF, MPUSS OSWR", }, }, .state_count = ARRAY_SIZE(omap4_idle_data), @@ -208,16 +195,13 @@ static struct cpuidle_driver omap4_idle_driver = { /* Public functions */ /** - * omap4_idle_init - Init routine for OMAP4 idle + * omap4_idle_init - Init routine for OMAP4+ idle * - * Registers the OMAP4 specific cpuidle driver to the cpuidle + * Registers the OMAP4+ specific cpuidle driver to the cpuidle * framework with the valid set of states. */ int __init omap4_idle_init(void) { - struct cpuidle_device *dev; - unsigned int cpu_id = 0; - mpu_pd = pwrdm_lookup("mpu_pwrdm"); cpu_pd[0] = pwrdm_lookup("cpu0_pwrdm"); cpu_pd[1] = pwrdm_lookup("cpu1_pwrdm"); @@ -229,22 +213,5 @@ int __init omap4_idle_init(void) if (!cpu_clkdm[0] || !cpu_clkdm[1]) return -ENODEV; - /* Configure the broadcast timer on each cpu */ - on_each_cpu(omap_setup_broadcast_timer, NULL, 1); - - for_each_cpu(cpu_id, cpu_online_mask) { - dev = &per_cpu(omap4_idle_dev, cpu_id); - dev->cpu = cpu_id; -#ifdef CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED - dev->coupled_cpus = *cpu_online_mask; -#endif - cpuidle_register_driver(&omap4_idle_driver); - - if (cpuidle_register_device(dev)) { - pr_err("%s: CPUidle register failed\n", __func__); - return -EIO; - } - } - - return 0; + return cpuidle_register(&omap4_idle_driver, cpu_online_mask); } diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index 1ec7f0597710..4269fc145698 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c @@ -504,140 +504,31 @@ static void omap_init_rng(void) WARN(IS_ERR(pdev), "Can't build omap_device for omap_rng\n"); } -#if defined(CONFIG_CRYPTO_DEV_OMAP_SHAM) || defined(CONFIG_CRYPTO_DEV_OMAP_SHAM_MODULE) - -#ifdef CONFIG_ARCH_OMAP2 -static struct resource omap2_sham_resources[] = { - { - .start = OMAP24XX_SEC_SHA1MD5_BASE, - .end = OMAP24XX_SEC_SHA1MD5_BASE + 0x64, - .flags = IORESOURCE_MEM, - }, - { - .start = 51 + OMAP_INTC_START, - .flags = IORESOURCE_IRQ, - } -}; -static int omap2_sham_resources_sz = ARRAY_SIZE(omap2_sham_resources); -#else -#define omap2_sham_resources NULL -#define omap2_sham_resources_sz 0 -#endif - -#ifdef CONFIG_ARCH_OMAP3 -static struct resource omap3_sham_resources[] = { - { - .start = OMAP34XX_SEC_SHA1MD5_BASE, - .end = OMAP34XX_SEC_SHA1MD5_BASE + 0x64, - .flags = IORESOURCE_MEM, - }, - { - .start = 49 + OMAP_INTC_START, - .flags = IORESOURCE_IRQ, - }, - { - .start = OMAP34XX_DMA_SHA1MD5_RX, - .flags = IORESOURCE_DMA, - } -}; -static int omap3_sham_resources_sz = ARRAY_SIZE(omap3_sham_resources); -#else -#define omap3_sham_resources NULL -#define omap3_sham_resources_sz 0 -#endif - -static struct platform_device sham_device = { - .name = "omap-sham", - .id = -1, -}; - -static void omap_init_sham(void) +static void __init omap_init_sham(void) { - if (cpu_is_omap24xx()) { - sham_device.resource = omap2_sham_resources; - sham_device.num_resources = omap2_sham_resources_sz; - } else if (cpu_is_omap34xx()) { - sham_device.resource = omap3_sham_resources; - sham_device.num_resources = omap3_sham_resources_sz; - } else { - pr_err("%s: platform not supported\n", __func__); - return; - } - platform_device_register(&sham_device); -} -#else -static inline void omap_init_sham(void) { } -#endif - -#if defined(CONFIG_CRYPTO_DEV_OMAP_AES) || defined(CONFIG_CRYPTO_DEV_OMAP_AES_MODULE) - -#ifdef CONFIG_ARCH_OMAP2 -static struct resource omap2_aes_resources[] = { - { - .start = OMAP24XX_SEC_AES_BASE, - .end = OMAP24XX_SEC_AES_BASE + 0x4C, - .flags = IORESOURCE_MEM, - }, - { - .start = OMAP24XX_DMA_AES_TX, - .flags = IORESOURCE_DMA, - }, - { - .start = OMAP24XX_DMA_AES_RX, - .flags = IORESOURCE_DMA, - } -}; -static int omap2_aes_resources_sz = ARRAY_SIZE(omap2_aes_resources); -#else -#define omap2_aes_resources NULL -#define omap2_aes_resources_sz 0 -#endif + struct omap_hwmod *oh; + struct platform_device *pdev; -#ifdef CONFIG_ARCH_OMAP3 -static struct resource omap3_aes_resources[] = { - { - .start = OMAP34XX_SEC_AES_BASE, - .end = OMAP34XX_SEC_AES_BASE + 0x4C, - .flags = IORESOURCE_MEM, - }, - { - .start = OMAP34XX_DMA_AES2_TX, - .flags = IORESOURCE_DMA, - }, - { - .start = OMAP34XX_DMA_AES2_RX, - .flags = IORESOURCE_DMA, - } -}; -static int omap3_aes_resources_sz = ARRAY_SIZE(omap3_aes_resources); -#else -#define omap3_aes_resources NULL -#define omap3_aes_resources_sz 0 -#endif + oh = omap_hwmod_lookup("sham"); + if (!oh) + return; -static struct platform_device aes_device = { - .name = "omap-aes", - .id = -1, -}; + pdev = omap_device_build("omap-sham", -1, oh, NULL, 0); + WARN(IS_ERR(pdev), "Can't build omap_device for omap-sham\n"); +} -static void omap_init_aes(void) +static void __init omap_init_aes(void) { - if (cpu_is_omap24xx()) { - aes_device.resource = omap2_aes_resources; - aes_device.num_resources = omap2_aes_resources_sz; - } else if (cpu_is_omap34xx()) { - aes_device.resource = omap3_aes_resources; - aes_device.num_resources = omap3_aes_resources_sz; - } else { - pr_err("%s: platform not supported\n", __func__); + struct omap_hwmod *oh; + struct platform_device *pdev; + + oh = omap_hwmod_lookup("aes"); + if (!oh) return; - } - platform_device_register(&aes_device); -} -#else -static inline void omap_init_aes(void) { } -#endif + pdev = omap_device_build("omap-aes", -1, oh, NULL, 0); + WARN(IS_ERR(pdev), "Can't build omap_device for omap-aes\n"); +} /*-------------------------------------------------------------------------*/ @@ -764,11 +655,11 @@ static int __init omap2_init_devices(void) omap_init_dmic(); omap_init_mcpdm(); omap_init_mcspi(); + omap_init_sham(); + omap_init_aes(); } omap_init_sti(); omap_init_rng(); - omap_init_sham(); - omap_init_aes(); omap_init_vout(); omap_init_ocp2scp(); diff --git a/arch/arm/mach-omap2/dma.c b/arch/arm/mach-omap2/dma.c index dab9fc014b97..49fd0d501c9b 100644 --- a/arch/arm/mach-omap2/dma.c +++ b/arch/arm/mach-omap2/dma.c @@ -28,6 +28,7 @@ #include <linux/init.h> #include <linux/device.h> #include <linux/dma-mapping.h> +#include <linux/of.h> #include <linux/omap-dma.h> #include "soc.h" @@ -304,6 +305,9 @@ static int __init omap2_system_dma_init(void) if (res) return res; + if (of_have_populated_dt()) + return res; + pdev = platform_device_register_full(&omap_dma_dev_info); if (IS_ERR(pdev)) return PTR_ERR(pdev); diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c index 3aed4b0b9563..3a0296cfcace 100644 --- a/arch/arm/mach-omap2/dpll3xxx.c +++ b/arch/arm/mach-omap2/dpll3xxx.c @@ -307,10 +307,10 @@ static int omap3_noncore_dpll_program(struct clk_hw_omap *clk, u16 freqsel) _omap3_noncore_dpll_bypass(clk); /* - * Set jitter correction. No jitter correction for OMAP4 and 3630 - * since freqsel field is no longer present + * Set jitter correction. Jitter correction applicable for OMAP343X + * only since freqsel field is no longer present on other devices. */ - if (!soc_is_am33xx() && !cpu_is_omap44xx() && !cpu_is_omap3630()) { + if (cpu_is_omap343x()) { v = __raw_readl(dd->control_reg); v &= ~dd->freqsel_mask; v |= freqsel << __ffs(dd->freqsel_mask); @@ -480,29 +480,30 @@ int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned long rate, if (!dd) return -EINVAL; - __clk_prepare(dd->clk_bypass); - clk_enable(dd->clk_bypass); - __clk_prepare(dd->clk_ref); - clk_enable(dd->clk_ref); - if (__clk_get_rate(dd->clk_bypass) == rate && (dd->modes & (1 << DPLL_LOW_POWER_BYPASS))) { pr_debug("%s: %s: set rate: entering bypass.\n", __func__, __clk_get_name(hw->clk)); + __clk_prepare(dd->clk_bypass); + clk_enable(dd->clk_bypass); ret = _omap3_noncore_dpll_bypass(clk); if (!ret) new_parent = dd->clk_bypass; + clk_disable(dd->clk_bypass); + __clk_unprepare(dd->clk_bypass); } else { + __clk_prepare(dd->clk_ref); + clk_enable(dd->clk_ref); + if (dd->last_rounded_rate != rate) rate = __clk_round_rate(hw->clk, rate); if (dd->last_rounded_rate == 0) return -EINVAL; - /* No freqsel on AM335x, OMAP4 and OMAP3630 */ - if (!soc_is_am33xx() && !cpu_is_omap44xx() && - !cpu_is_omap3630()) { + /* Freqsel is available only on OMAP343X devices */ + if (cpu_is_omap343x()) { freqsel = _omap3_dpll_compute_freqsel(clk, dd->last_rounded_n); WARN_ON(!freqsel); @@ -514,6 +515,8 @@ int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned long rate, ret = omap3_noncore_dpll_program(clk, freqsel); if (!ret) new_parent = dd->clk_ref; + clk_disable(dd->clk_ref); + __clk_unprepare(dd->clk_ref); } /* * FIXME - this is all wrong. common code handles reparenting and @@ -525,11 +528,6 @@ int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned long rate, if (!ret) __clk_reparent(hw->clk, new_parent); - clk_disable(dd->clk_ref); - __clk_unprepare(dd->clk_ref); - clk_disable(dd->clk_bypass); - __clk_unprepare(dd->clk_bypass); - return 0; } diff --git a/arch/arm/mach-omap2/dsp.c b/arch/arm/mach-omap2/dsp.c index b155500e84a8..b8208b4b1bd9 100644 --- a/arch/arm/mach-omap2/dsp.c +++ b/arch/arm/mach-omap2/dsp.c @@ -26,7 +26,7 @@ #include "control.h" #include "cm2xxx_3xxx.h" #include "prm2xxx_3xxx.h" -#ifdef CONFIG_BRIDGE_DVFS +#ifdef CONFIG_TIDSPBRIDGE_DVFS #include "omap-pm.h" #endif @@ -35,7 +35,7 @@ static struct platform_device *omap_dsp_pdev; static struct omap_dsp_platform_data omap_dsp_pdata __initdata = { -#ifdef CONFIG_BRIDGE_DVFS +#ifdef CONFIG_TIDSPBRIDGE_DVFS .dsp_set_min_opp = omap_pm_dsp_set_min_opp, .dsp_get_opp = omap_pm_dsp_get_opp, .cpu_set_freq = omap_pm_cpu_set_freq, diff --git a/arch/arm/mach-omap2/dss-common.c b/arch/arm/mach-omap2/dss-common.c index 4be5cfc81ab8..393aeefaebb0 100644 --- a/arch/arm/mach-omap2/dss-common.c +++ b/arch/arm/mach-omap2/dss-common.c @@ -27,9 +27,7 @@ #include <linux/gpio.h> #include <video/omapdss.h> -#include <video/omap-panel-tfp410.h> -#include <video/omap-panel-nokia-dsi.h> -#include <video/omap-panel-picodlp.h> +#include <video/omap-panel-data.h> #include "soc.h" #include "dss-common.h" @@ -54,7 +52,6 @@ static struct omap_dss_device omap4_panda_dvi_device = { .driver_name = "tfp410", .data = &omap4_dvi_panel, .phy.dpi.data_lines = 24, - .reset_gpio = PANDA_DVI_TFP410_POWER_DOWN_GPIO, .channel = OMAP_DSS_CHANNEL_LCD2, }; @@ -179,45 +176,12 @@ static struct picodlp_panel_data sdp4430_picodlp_pdata = { .pwrgood_gpio = 45, }; -static void sdp4430_picodlp_init(void) -{ - int r; - const struct gpio picodlp_gpios[] = { - {DLP_POWER_ON_GPIO, GPIOF_OUT_INIT_LOW, - "DLP POWER ON"}, - {sdp4430_picodlp_pdata.emu_done_gpio, GPIOF_IN, - "DLP EMU DONE"}, - {sdp4430_picodlp_pdata.pwrgood_gpio, GPIOF_OUT_INIT_LOW, - "DLP PWRGOOD"}, - }; - - r = gpio_request_array(picodlp_gpios, ARRAY_SIZE(picodlp_gpios)); - if (r) - pr_err("Cannot request PicoDLP GPIOs, error %d\n", r); -} - -static int sdp4430_panel_enable_picodlp(struct omap_dss_device *dssdev) -{ - gpio_set_value(DISPLAY_SEL_GPIO, 0); - gpio_set_value(DLP_POWER_ON_GPIO, 1); - - return 0; -} - -static void sdp4430_panel_disable_picodlp(struct omap_dss_device *dssdev) -{ - gpio_set_value(DLP_POWER_ON_GPIO, 0); - gpio_set_value(DISPLAY_SEL_GPIO, 1); -} - static struct omap_dss_device sdp4430_picodlp_device = { .name = "picodlp", .driver_name = "picodlp_panel", .type = OMAP_DISPLAY_TYPE_DPI, .phy.dpi.data_lines = 24, .channel = OMAP_DSS_CHANNEL_LCD2, - .platform_enable = sdp4430_panel_enable_picodlp, - .platform_disable = sdp4430_panel_disable_picodlp, .data = &sdp4430_picodlp_pdata, }; @@ -234,17 +198,26 @@ static struct omap_dss_board_info sdp4430_dss_data = { .default_device = &sdp4430_lcd_device, }; +/* + * we select LCD2 by default (instead of Pico DLP) by setting DISPLAY_SEL_GPIO. + * Setting DLP_POWER_ON gpio enables the VDLP_2V5 VDLP_1V8 and VDLP_1V0 rails + * used by picodlp on the 4430sdp platform. Keep this gpio disabled as LCD2 is + * selected by default + */ void __init omap_4430sdp_display_init(void) { int r; - /* Enable LCD2 by default (instead of Pico DLP) */ r = gpio_request_one(DISPLAY_SEL_GPIO, GPIOF_OUT_INIT_HIGH, "display_sel"); if (r) pr_err("%s: Could not get display_sel GPIO\n", __func__); - sdp4430_picodlp_init(); + r = gpio_request_one(DLP_POWER_ON_GPIO, GPIOF_OUT_INIT_LOW, + "DLP POWER ON"); + if (r) + pr_err("%s: Could not get DLP POWER ON GPIO\n", __func__); + omap_display_init(&sdp4430_dss_data); /* * OMAP4460SDP/Blaze and OMAP4430 ES2.3 SDP/Blaze boards and @@ -264,12 +237,15 @@ void __init omap_4430sdp_display_init_of(void) { int r; - /* Enable LCD2 by default (instead of Pico DLP) */ r = gpio_request_one(DISPLAY_SEL_GPIO, GPIOF_OUT_INIT_HIGH, "display_sel"); if (r) pr_err("%s: Could not get display_sel GPIO\n", __func__); - sdp4430_picodlp_init(); + r = gpio_request_one(DLP_POWER_ON_GPIO, GPIOF_OUT_INIT_LOW, + "DLP POWER ON"); + if (r) + pr_err("%s: Could not get DLP POWER ON GPIO\n", __func__); + omap_display_init(&sdp4430_dss_data); } diff --git a/arch/arm/mach-omap2/gpmc-nand.c b/arch/arm/mach-omap2/gpmc-nand.c index afc1e8c32d6c..d9c27195caf0 100644 --- a/arch/arm/mach-omap2/gpmc-nand.c +++ b/arch/arm/mach-omap2/gpmc-nand.c @@ -74,14 +74,6 @@ static int omap2_nand_gpmc_retime( t.cs_wr_off = gpmc_t->cs_wr_off; t.wr_cycle = gpmc_t->wr_cycle; - /* Configure GPMC */ - if (gpmc_nand_data->devsize == NAND_BUSWIDTH_16) - gpmc_cs_configure(gpmc_nand_data->cs, GPMC_CONFIG_DEV_SIZE, 1); - else - gpmc_cs_configure(gpmc_nand_data->cs, GPMC_CONFIG_DEV_SIZE, 0); - gpmc_cs_configure(gpmc_nand_data->cs, - GPMC_CONFIG_DEV_TYPE, GPMC_DEVICETYPE_NAND); - gpmc_cs_configure(gpmc_nand_data->cs, GPMC_CONFIG_WP, 0); err = gpmc_cs_set_timings(gpmc_nand_data->cs, &t); if (err) return err; @@ -115,14 +107,18 @@ int gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data, struct gpmc_timings *gpmc_t) { int err = 0; + struct gpmc_settings s; struct device *dev = &gpmc_nand_device.dev; + memset(&s, 0, sizeof(struct gpmc_settings)); + gpmc_nand_device.dev.platform_data = gpmc_nand_data; err = gpmc_cs_request(gpmc_nand_data->cs, NAND_IO_SIZE, (unsigned long *)&gpmc_nand_resource[0].start); if (err < 0) { - dev_err(dev, "Cannot request GPMC CS\n"); + dev_err(dev, "Cannot request GPMC CS %d, error %d\n", + gpmc_nand_data->cs, err); return err; } @@ -140,11 +136,31 @@ int gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data, dev_err(dev, "Unable to set gpmc timings: %d\n", err); return err; } - } - /* Enable RD PIN Monitoring Reg */ - if (gpmc_nand_data->dev_ready) { - gpmc_cs_configure(gpmc_nand_data->cs, GPMC_CONFIG_RDY_BSY, 1); + if (gpmc_nand_data->of_node) { + gpmc_read_settings_dt(gpmc_nand_data->of_node, &s); + } else { + s.device_nand = true; + + /* Enable RD PIN Monitoring Reg */ + if (gpmc_nand_data->dev_ready) { + s.wait_on_read = true; + s.wait_on_write = true; + } + } + + if (gpmc_nand_data->devsize == NAND_BUSWIDTH_16) + s.device_width = GPMC_DEVWIDTH_16BIT; + else + s.device_width = GPMC_DEVWIDTH_8BIT; + + err = gpmc_cs_program_settings(gpmc_nand_data->cs, &s); + if (err < 0) + goto out_free_cs; + + err = gpmc_configure(GPMC_CONFIG_WP, 0); + if (err < 0) + goto out_free_cs; } gpmc_update_nand_reg(&gpmc_nand_data->reg, gpmc_nand_data->cs); diff --git a/arch/arm/mach-omap2/gpmc-onenand.c b/arch/arm/mach-omap2/gpmc-onenand.c index fadd87435cd0..64b5a8346982 100644 --- a/arch/arm/mach-omap2/gpmc-onenand.c +++ b/arch/arm/mach-omap2/gpmc-onenand.c @@ -47,11 +47,23 @@ static struct platform_device gpmc_onenand_device = { .resource = &gpmc_onenand_resource, }; -static struct gpmc_timings omap2_onenand_calc_async_timings(void) +static struct gpmc_settings onenand_async = { + .device_width = GPMC_DEVWIDTH_16BIT, + .mux_add_data = GPMC_MUX_AD, +}; + +static struct gpmc_settings onenand_sync = { + .burst_read = true, + .burst_wrap = true, + .burst_len = GPMC_BURST_16, + .device_width = GPMC_DEVWIDTH_16BIT, + .mux_add_data = GPMC_MUX_AD, + .wait_pin = 0, +}; + +static void omap2_onenand_calc_async_timings(struct gpmc_timings *t) { struct gpmc_device_timings dev_t; - struct gpmc_timings t; - const int t_cer = 15; const int t_avdp = 12; const int t_aavdh = 7; @@ -64,7 +76,6 @@ static struct gpmc_timings omap2_onenand_calc_async_timings(void) memset(&dev_t, 0, sizeof(dev_t)); - dev_t.mux = true; dev_t.t_avdp_r = max_t(int, t_avdp, t_cer) * 1000; dev_t.t_avdp_w = dev_t.t_avdp_r; dev_t.t_aavdh = t_aavdh * 1000; @@ -76,19 +87,7 @@ static struct gpmc_timings omap2_onenand_calc_async_timings(void) dev_t.t_wpl = t_wpl * 1000; dev_t.t_wph = t_wph * 1000; - gpmc_calc_timings(&t, &dev_t); - - return t; -} - -static int gpmc_set_async_mode(int cs, struct gpmc_timings *t) -{ - /* Configure GPMC for asynchronous read */ - gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, - GPMC_CONFIG1_DEVICESIZE_16 | - GPMC_CONFIG1_MUXADDDATA); - - return gpmc_cs_set_timings(cs, t); + gpmc_calc_timings(t, &onenand_async, &dev_t); } static void omap2_onenand_set_async_mode(void __iomem *onenand_base) @@ -158,12 +157,11 @@ static int omap2_onenand_get_freq(struct omap_onenand_platform_data *cfg, return freq; } -static struct gpmc_timings -omap2_onenand_calc_sync_timings(struct omap_onenand_platform_data *cfg, - int freq) +static void omap2_onenand_calc_sync_timings(struct gpmc_timings *t, + unsigned int flags, + int freq) { struct gpmc_device_timings dev_t; - struct gpmc_timings t; const int t_cer = 15; const int t_avdp = 12; const int t_cez = 20; /* max of t_cez, t_oez */ @@ -172,9 +170,9 @@ omap2_onenand_calc_sync_timings(struct omap_onenand_platform_data *cfg, int min_gpmc_clk_period, t_ces, t_avds, t_avdh, t_ach, t_aavdh, t_rdyo; int div, gpmc_clk_ns; - if (cfg->flags & ONENAND_SYNC_READ) + if (flags & ONENAND_SYNC_READ) onenand_flags = ONENAND_FLAG_SYNCREAD; - else if (cfg->flags & ONENAND_SYNC_READWRITE) + else if (flags & ONENAND_SYNC_READWRITE) onenand_flags = ONENAND_FLAG_SYNCREAD | ONENAND_FLAG_SYNCWRITE; switch (freq) { @@ -239,10 +237,11 @@ omap2_onenand_calc_sync_timings(struct omap_onenand_platform_data *cfg, /* Set synchronous read timings */ memset(&dev_t, 0, sizeof(dev_t)); - dev_t.mux = true; - dev_t.sync_read = true; + if (onenand_flags & ONENAND_FLAG_SYNCREAD) + onenand_sync.sync_read = true; if (onenand_flags & ONENAND_FLAG_SYNCWRITE) { - dev_t.sync_write = true; + onenand_sync.sync_write = true; + onenand_sync.burst_write = true; } else { dev_t.t_avdp_w = max(t_avdp, t_cer) * 1000; dev_t.t_wpl = t_wpl * 1000; @@ -265,32 +264,7 @@ omap2_onenand_calc_sync_timings(struct omap_onenand_platform_data *cfg, dev_t.cyc_aavdh_oe = 1; dev_t.t_rdyo = t_rdyo * 1000 + min_gpmc_clk_period; - gpmc_calc_timings(&t, &dev_t); - - return t; -} - -static int gpmc_set_sync_mode(int cs, struct gpmc_timings *t) -{ - unsigned sync_read = onenand_flags & ONENAND_FLAG_SYNCREAD; - unsigned sync_write = onenand_flags & ONENAND_FLAG_SYNCWRITE; - - /* Configure GPMC for synchronous read */ - gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, - GPMC_CONFIG1_WRAPBURST_SUPP | - GPMC_CONFIG1_READMULTIPLE_SUPP | - (sync_read ? GPMC_CONFIG1_READTYPE_SYNC : 0) | - (sync_write ? GPMC_CONFIG1_WRITEMULTIPLE_SUPP : 0) | - (sync_write ? GPMC_CONFIG1_WRITETYPE_SYNC : 0) | - GPMC_CONFIG1_PAGE_LEN(2) | - (cpu_is_omap34xx() ? 0 : - (GPMC_CONFIG1_WAIT_READ_MON | - GPMC_CONFIG1_WAIT_PIN_SEL(0))) | - GPMC_CONFIG1_DEVICESIZE_16 | - GPMC_CONFIG1_DEVICETYPE_NOR | - GPMC_CONFIG1_MUXADDDATA); - - return gpmc_cs_set_timings(cs, t); + gpmc_calc_timings(t, &onenand_sync, &dev_t); } static int omap2_onenand_setup_async(void __iomem *onenand_base) @@ -298,12 +272,20 @@ static int omap2_onenand_setup_async(void __iomem *onenand_base) struct gpmc_timings t; int ret; + if (gpmc_onenand_data->of_node) + gpmc_read_settings_dt(gpmc_onenand_data->of_node, + &onenand_async); + omap2_onenand_set_async_mode(onenand_base); - t = omap2_onenand_calc_async_timings(); + omap2_onenand_calc_async_timings(&t); + + ret = gpmc_cs_program_settings(gpmc_onenand_data->cs, &onenand_async); + if (ret < 0) + return ret; - ret = gpmc_set_async_mode(gpmc_onenand_data->cs, &t); - if (IS_ERR_VALUE(ret)) + ret = gpmc_cs_set_timings(gpmc_onenand_data->cs, &t); + if (ret < 0) return ret; omap2_onenand_set_async_mode(onenand_base); @@ -322,10 +304,26 @@ static int omap2_onenand_setup_sync(void __iomem *onenand_base, int *freq_ptr) set_onenand_cfg(onenand_base); } - t = omap2_onenand_calc_sync_timings(gpmc_onenand_data, freq); + if (gpmc_onenand_data->of_node) { + gpmc_read_settings_dt(gpmc_onenand_data->of_node, + &onenand_sync); + } else { + /* + * FIXME: Appears to be legacy code from initial ONENAND commit. + * Unclear what boards this is for and if this can be removed. + */ + if (!cpu_is_omap34xx()) + onenand_sync.wait_on_read = true; + } + + omap2_onenand_calc_sync_timings(&t, gpmc_onenand_data->flags, freq); - ret = gpmc_set_sync_mode(gpmc_onenand_data->cs, &t); - if (IS_ERR_VALUE(ret)) + ret = gpmc_cs_program_settings(gpmc_onenand_data->cs, &onenand_sync); + if (ret < 0) + return ret; + + ret = gpmc_cs_set_timings(gpmc_onenand_data->cs, &t); + if (ret < 0) return ret; set_onenand_cfg(onenand_base); @@ -359,6 +357,7 @@ static int gpmc_onenand_setup(void __iomem *onenand_base, int *freq_ptr) void gpmc_onenand_init(struct omap_onenand_platform_data *_onenand_data) { int err; + struct device *dev = &gpmc_onenand_device.dev; gpmc_onenand_data = _onenand_data; gpmc_onenand_data->onenand_setup = gpmc_onenand_setup; @@ -366,7 +365,7 @@ void gpmc_onenand_init(struct omap_onenand_platform_data *_onenand_data) if (cpu_is_omap24xx() && (gpmc_onenand_data->flags & ONENAND_SYNC_READWRITE)) { - printk(KERN_ERR "Onenand using only SYNC_READ on 24xx\n"); + dev_warn(dev, "OneNAND using only SYNC_READ on 24xx\n"); gpmc_onenand_data->flags &= ~ONENAND_SYNC_READWRITE; gpmc_onenand_data->flags |= ONENAND_SYNC_READ; } @@ -379,7 +378,8 @@ void gpmc_onenand_init(struct omap_onenand_platform_data *_onenand_data) err = gpmc_cs_request(gpmc_onenand_data->cs, ONENAND_IO_SIZE, (unsigned long *)&gpmc_onenand_resource.start); if (err < 0) { - pr_err("%s: Cannot request GPMC CS\n", __func__); + dev_err(dev, "Cannot request GPMC CS %d, error %d\n", + gpmc_onenand_data->cs, err); return; } @@ -387,7 +387,7 @@ void gpmc_onenand_init(struct omap_onenand_platform_data *_onenand_data) ONENAND_IO_SIZE - 1; if (platform_device_register(&gpmc_onenand_device) < 0) { - pr_err("%s: Unable to register OneNAND device\n", __func__); + dev_err(dev, "Unable to register OneNAND device\n"); gpmc_cs_free(gpmc_onenand_data->cs); return; } diff --git a/arch/arm/mach-omap2/gpmc-smc91x.c b/arch/arm/mach-omap2/gpmc-smc91x.c index 11d0b756f098..61a063595e66 100644 --- a/arch/arm/mach-omap2/gpmc-smc91x.c +++ b/arch/arm/mach-omap2/gpmc-smc91x.c @@ -49,6 +49,10 @@ static struct platform_device gpmc_smc91x_device = { .resource = gpmc_smc91x_resources, }; +static struct gpmc_settings smc91x_settings = { + .device_width = GPMC_DEVWIDTH_16BIT, +}; + /* * Set the gpmc timings for smc91c96. The timings are taken * from the data sheet available at: @@ -67,18 +71,6 @@ static int smc91c96_gpmc_retime(void) const int t7 = 5; /* Figure 12.4 write */ const int t8 = 5; /* Figure 12.4 write */ const int t20 = 185; /* Figure 12.2 read and 12.4 write */ - u32 l; - - l = GPMC_CONFIG1_DEVICESIZE_16; - if (gpmc_cfg->flags & GPMC_MUX_ADD_DATA) - l |= GPMC_CONFIG1_MUXADDDATA; - if (gpmc_cfg->flags & GPMC_READ_MON) - l |= GPMC_CONFIG1_WAIT_READ_MON; - if (gpmc_cfg->flags & GPMC_WRITE_MON) - l |= GPMC_CONFIG1_WAIT_WRITE_MON; - if (gpmc_cfg->wait_pin) - l |= GPMC_CONFIG1_WAIT_PIN_SEL(gpmc_cfg->wait_pin); - gpmc_cs_write_reg(gpmc_cfg->cs, GPMC_CS_CONFIG1, l); /* * FIXME: Calculate the address and data bus muxed timings. @@ -104,7 +96,7 @@ static int smc91c96_gpmc_retime(void) dev_t.t_cez_w = t4_w * 1000; dev_t.t_wr_cycle = (t20 - t3) * 1000; - gpmc_calc_timings(&t, &dev_t); + gpmc_calc_timings(&t, &smc91x_settings, &dev_t); return gpmc_cs_set_timings(gpmc_cfg->cs, &t); } @@ -133,6 +125,18 @@ void __init gpmc_smc91x_init(struct omap_smc91x_platform_data *board_data) gpmc_smc91x_resources[0].end = cs_mem_base + 0x30f; gpmc_smc91x_resources[1].flags |= (gpmc_cfg->flags & IRQF_TRIGGER_MASK); + if (gpmc_cfg->flags & GPMC_MUX_ADD_DATA) + smc91x_settings.mux_add_data = GPMC_MUX_AD; + if (gpmc_cfg->flags & GPMC_READ_MON) + smc91x_settings.wait_on_read = true; + if (gpmc_cfg->flags & GPMC_WRITE_MON) + smc91x_settings.wait_on_write = true; + if (gpmc_cfg->wait_pin) + smc91x_settings.wait_pin = gpmc_cfg->wait_pin; + ret = gpmc_cs_program_settings(gpmc_cfg->cs, &smc91x_settings); + if (ret < 0) + goto free1; + if (gpmc_cfg->retime) { ret = gpmc_cfg->retime(); if (ret != 0) diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c index 410e1bac7815..6c4da1254f53 100644 --- a/arch/arm/mach-omap2/gpmc.c +++ b/arch/arm/mach-omap2/gpmc.c @@ -26,6 +26,7 @@ #include <linux/interrupt.h> #include <linux/platform_device.h> #include <linux/of.h> +#include <linux/of_address.h> #include <linux/of_mtd.h> #include <linux/of_device.h> #include <linux/mtd/nand.h> @@ -91,9 +92,7 @@ #define GPMC_CS_SIZE 0x30 #define GPMC_BCH_SIZE 0x10 -#define GPMC_MEM_START 0x00000000 #define GPMC_MEM_END 0x3FFFFFFF -#define BOOT_ROM_SPACE 0x100000 /* 1MB */ #define GPMC_CHUNK_SHIFT 24 /* 16 MB */ #define GPMC_SECTION_SHIFT 28 /* 128 MB */ @@ -107,6 +106,9 @@ #define GPMC_HAS_WR_ACCESS 0x1 #define GPMC_HAS_WR_DATA_MUX_BUS 0x2 +#define GPMC_HAS_MUX_AAD 0x4 + +#define GPMC_NR_WAITPINS 4 /* XXX: Only NAND irq has been considered,currently these are the only ones used */ @@ -153,6 +155,7 @@ static struct resource gpmc_cs_mem[GPMC_CS_NUM]; static DEFINE_SPINLOCK(gpmc_mem_lock); /* Define chip-selects as reserved by default until probe completes */ static unsigned int gpmc_cs_map = ((1 << GPMC_CS_NUM) - 1); +static unsigned int gpmc_nr_waitpins; static struct device *gpmc_dev; static int gpmc_irq; static resource_size_t phys_base, mem_size; @@ -181,7 +184,7 @@ void gpmc_cs_write_reg(int cs, int idx, u32 val) __raw_writel(val, reg_addr); } -u32 gpmc_cs_read_reg(int cs, int idx) +static u32 gpmc_cs_read_reg(int cs, int idx) { void __iomem *reg_addr; @@ -190,7 +193,7 @@ u32 gpmc_cs_read_reg(int cs, int idx) } /* TODO: Add support for gpmc_fck to clock framework and use it */ -unsigned long gpmc_get_fclk_period(void) +static unsigned long gpmc_get_fclk_period(void) { unsigned long rate = clk_get_rate(gpmc_l3_clk); @@ -205,7 +208,7 @@ unsigned long gpmc_get_fclk_period(void) return rate; } -unsigned int gpmc_ns_to_ticks(unsigned int time_ns) +static unsigned int gpmc_ns_to_ticks(unsigned int time_ns) { unsigned long tick_ps; @@ -215,7 +218,7 @@ unsigned int gpmc_ns_to_ticks(unsigned int time_ns) return (time_ns * 1000 + tick_ps - 1) / tick_ps; } -unsigned int gpmc_ps_to_ticks(unsigned int time_ps) +static unsigned int gpmc_ps_to_ticks(unsigned int time_ps) { unsigned long tick_ps; @@ -230,13 +233,6 @@ unsigned int gpmc_ticks_to_ns(unsigned int ticks) return ticks * gpmc_get_fclk_period() / 1000; } -unsigned int gpmc_round_ns_to_ticks(unsigned int time_ns) -{ - unsigned long ticks = gpmc_ns_to_ticks(time_ns); - - return ticks * gpmc_get_fclk_period() / 1000; -} - static unsigned int gpmc_ticks_to_ps(unsigned int ticks) { return ticks * gpmc_get_fclk_period(); @@ -405,11 +401,18 @@ int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t) return 0; } -static void gpmc_cs_enable_mem(int cs, u32 base, u32 size) +static int gpmc_cs_enable_mem(int cs, u32 base, u32 size) { u32 l; u32 mask; + /* + * Ensure that base address is aligned on a + * boundary equal to or greater than size. + */ + if (base & (size - 1)) + return -EINVAL; + mask = (1 << GPMC_SECTION_SHIFT) - size; l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7); l &= ~0x3f; @@ -418,6 +421,8 @@ static void gpmc_cs_enable_mem(int cs, u32 base, u32 size) l |= ((mask >> GPMC_CHUNK_SHIFT) & 0x0f) << 8; l |= GPMC_CONFIG7_CSVALID; gpmc_cs_write_reg(cs, GPMC_CS_CONFIG7, l); + + return 0; } static void gpmc_cs_disable_mem(int cs) @@ -448,22 +453,14 @@ static int gpmc_cs_mem_enabled(int cs) return l & GPMC_CONFIG7_CSVALID; } -int gpmc_cs_set_reserved(int cs, int reserved) +static void gpmc_cs_set_reserved(int cs, int reserved) { - if (cs > GPMC_CS_NUM) - return -ENODEV; - gpmc_cs_map &= ~(1 << cs); gpmc_cs_map |= (reserved ? 1 : 0) << cs; - - return 0; } -int gpmc_cs_reserved(int cs) +static bool gpmc_cs_reserved(int cs) { - if (cs > GPMC_CS_NUM) - return -ENODEV; - return gpmc_cs_map & (1 << cs); } @@ -510,6 +507,39 @@ static int gpmc_cs_delete_mem(int cs) return r; } +/** + * gpmc_cs_remap - remaps a chip-select physical base address + * @cs: chip-select to remap + * @base: physical base address to re-map chip-select to + * + * Re-maps a chip-select to a new physical base address specified by + * "base". Returns 0 on success and appropriate negative error code + * on failure. + */ +static int gpmc_cs_remap(int cs, u32 base) +{ + int ret; + u32 old_base, size; + + if (cs > GPMC_CS_NUM) + return -ENODEV; + gpmc_cs_get_memconf(cs, &old_base, &size); + if (base == old_base) + return 0; + gpmc_cs_disable_mem(cs); + ret = gpmc_cs_delete_mem(cs); + if (ret < 0) + return ret; + ret = gpmc_cs_insert_mem(cs, base, size); + if (ret < 0) + return ret; + ret = gpmc_cs_enable_mem(cs, base, size); + if (ret < 0) + return ret; + + return 0; +} + int gpmc_cs_request(int cs, unsigned long size, unsigned long *base) { struct resource *res = &gpmc_cs_mem[cs]; @@ -535,7 +565,12 @@ int gpmc_cs_request(int cs, unsigned long size, unsigned long *base) if (r < 0) goto out; - gpmc_cs_enable_mem(cs, res->start, resource_size(res)); + r = gpmc_cs_enable_mem(cs, res->start, resource_size(res)); + if (r < 0) { + release_resource(res); + goto out; + } + *base = res->start; gpmc_cs_set_reserved(cs, 1); out: @@ -561,16 +596,14 @@ void gpmc_cs_free(int cs) EXPORT_SYMBOL(gpmc_cs_free); /** - * gpmc_cs_configure - write request to configure gpmc - * @cs: chip select number + * gpmc_configure - write request to configure gpmc * @cmd: command type * @wval: value to write * @return status of the operation */ -int gpmc_cs_configure(int cs, int cmd, int wval) +int gpmc_configure(int cmd, int wval) { - int err = 0; - u32 regval = 0; + u32 regval; switch (cmd) { case GPMC_ENABLE_IRQ: @@ -590,43 +623,14 @@ int gpmc_cs_configure(int cs, int cmd, int wval) gpmc_write_reg(GPMC_CONFIG, regval); break; - case GPMC_CONFIG_RDY_BSY: - regval = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1); - if (wval) - regval |= WR_RD_PIN_MONITORING; - else - regval &= ~WR_RD_PIN_MONITORING; - gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, regval); - break; - - case GPMC_CONFIG_DEV_SIZE: - regval = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1); - - /* clear 2 target bits */ - regval &= ~GPMC_CONFIG1_DEVICESIZE(3); - - /* set the proper value */ - regval |= GPMC_CONFIG1_DEVICESIZE(wval); - - gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, regval); - break; - - case GPMC_CONFIG_DEV_TYPE: - regval = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1); - regval |= GPMC_CONFIG1_DEVICETYPE(wval); - if (wval == GPMC_DEVICETYPE_NOR) - regval |= GPMC_CONFIG1_MUXADDDATA; - gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, regval); - break; - default: - printk(KERN_ERR "gpmc_configure_cs: Not supported\n"); - err = -EINVAL; + pr_err("%s: command not supported\n", __func__); + return -EINVAL; } - return err; + return 0; } -EXPORT_SYMBOL(gpmc_cs_configure); +EXPORT_SYMBOL(gpmc_configure); void gpmc_update_nand_reg(struct gpmc_nand_regs *reg, int cs) { @@ -716,7 +720,7 @@ static int gpmc_setup_irq(void) return -EINVAL; gpmc_irq_start = irq_alloc_descs(-1, 0, GPMC_NR_IRQ, 0); - if (IS_ERR_VALUE(gpmc_irq_start)) { + if (gpmc_irq_start < 0) { pr_err("irq_alloc_descs failed\n"); return gpmc_irq_start; } @@ -781,16 +785,16 @@ static void gpmc_mem_exit(void) } -static int gpmc_mem_init(void) +static void gpmc_mem_init(void) { - int cs, rc; - unsigned long boot_rom_space = 0; + int cs; - /* never allocate the first page, to facilitate bug detection; - * even if we didn't boot from ROM. + /* + * The first 1MB of GPMC address space is typically mapped to + * the internal ROM. Never allocate the first page, to + * facilitate bug detection; even if we didn't boot from ROM. */ - boot_rom_space = BOOT_ROM_SPACE; - gpmc_mem_root.start = GPMC_MEM_START + boot_rom_space; + gpmc_mem_root.start = SZ_1M; gpmc_mem_root.end = GPMC_MEM_END; /* Reserve all regions that has been set up by bootloader */ @@ -800,16 +804,12 @@ static int gpmc_mem_init(void) if (!gpmc_cs_mem_enabled(cs)) continue; gpmc_cs_get_memconf(cs, &base, &size); - rc = gpmc_cs_insert_mem(cs, base, size); - if (IS_ERR_VALUE(rc)) { - while (--cs >= 0) - if (gpmc_cs_mem_enabled(cs)) - gpmc_cs_delete_mem(cs); - return rc; + if (gpmc_cs_insert_mem(cs, base, size)) { + pr_warn("%s: disabling cs %d mapped at 0x%x-0x%x\n", + __func__, cs, base, base + size); + gpmc_cs_disable_mem(cs); } } - - return 0; } static u32 gpmc_round_ps_to_sync_clk(u32 time_ps, u32 sync_clk) @@ -825,9 +825,9 @@ static u32 gpmc_round_ps_to_sync_clk(u32 time_ps, u32 sync_clk) /* XXX: can the cycles be avoided ? */ static int gpmc_calc_sync_read_timings(struct gpmc_timings *gpmc_t, - struct gpmc_device_timings *dev_t) + struct gpmc_device_timings *dev_t, + bool mux) { - bool mux = dev_t->mux; u32 temp; /* adv_rd_off */ @@ -880,9 +880,9 @@ static int gpmc_calc_sync_read_timings(struct gpmc_timings *gpmc_t, } static int gpmc_calc_sync_write_timings(struct gpmc_timings *gpmc_t, - struct gpmc_device_timings *dev_t) + struct gpmc_device_timings *dev_t, + bool mux) { - bool mux = dev_t->mux; u32 temp; /* adv_wr_off */ @@ -942,9 +942,9 @@ static int gpmc_calc_sync_write_timings(struct gpmc_timings *gpmc_t, } static int gpmc_calc_async_read_timings(struct gpmc_timings *gpmc_t, - struct gpmc_device_timings *dev_t) + struct gpmc_device_timings *dev_t, + bool mux) { - bool mux = dev_t->mux; u32 temp; /* adv_rd_off */ @@ -982,9 +982,9 @@ static int gpmc_calc_async_read_timings(struct gpmc_timings *gpmc_t, } static int gpmc_calc_async_write_timings(struct gpmc_timings *gpmc_t, - struct gpmc_device_timings *dev_t) + struct gpmc_device_timings *dev_t, + bool mux) { - bool mux = dev_t->mux; u32 temp; /* adv_wr_off */ @@ -1054,7 +1054,8 @@ static int gpmc_calc_sync_common_timings(struct gpmc_timings *gpmc_t, } static int gpmc_calc_common_timings(struct gpmc_timings *gpmc_t, - struct gpmc_device_timings *dev_t) + struct gpmc_device_timings *dev_t, + bool sync) { u32 temp; @@ -1068,7 +1069,7 @@ static int gpmc_calc_common_timings(struct gpmc_timings *gpmc_t, gpmc_t->cs_on + dev_t->t_ce_avd); gpmc_t->adv_on = gpmc_round_ps_to_ticks(temp); - if (dev_t->sync_write || dev_t->sync_read) + if (sync) gpmc_calc_sync_common_timings(gpmc_t, dev_t); return 0; @@ -1103,21 +1104,29 @@ static void gpmc_convert_ps_to_ns(struct gpmc_timings *t) } int gpmc_calc_timings(struct gpmc_timings *gpmc_t, - struct gpmc_device_timings *dev_t) + struct gpmc_settings *gpmc_s, + struct gpmc_device_timings *dev_t) { + bool mux = false, sync = false; + + if (gpmc_s) { + mux = gpmc_s->mux_add_data ? true : false; + sync = (gpmc_s->sync_read || gpmc_s->sync_write); + } + memset(gpmc_t, 0, sizeof(*gpmc_t)); - gpmc_calc_common_timings(gpmc_t, dev_t); + gpmc_calc_common_timings(gpmc_t, dev_t, sync); - if (dev_t->sync_read) - gpmc_calc_sync_read_timings(gpmc_t, dev_t); + if (gpmc_s && gpmc_s->sync_read) + gpmc_calc_sync_read_timings(gpmc_t, dev_t, mux); else - gpmc_calc_async_read_timings(gpmc_t, dev_t); + gpmc_calc_async_read_timings(gpmc_t, dev_t, mux); - if (dev_t->sync_write) - gpmc_calc_sync_write_timings(gpmc_t, dev_t); + if (gpmc_s && gpmc_s->sync_write) + gpmc_calc_sync_write_timings(gpmc_t, dev_t, mux); else - gpmc_calc_async_write_timings(gpmc_t, dev_t); + gpmc_calc_async_write_timings(gpmc_t, dev_t, mux); /* TODO: remove, see function definition */ gpmc_convert_ps_to_ns(gpmc_t); @@ -1125,6 +1134,90 @@ int gpmc_calc_timings(struct gpmc_timings *gpmc_t, return 0; } +/** + * gpmc_cs_program_settings - programs non-timing related settings + * @cs: GPMC chip-select to program + * @p: pointer to GPMC settings structure + * + * Programs non-timing related settings for a GPMC chip-select, such as + * bus-width, burst configuration, etc. Function should be called once + * for each chip-select that is being used and must be called before + * calling gpmc_cs_set_timings() as timing parameters in the CONFIG1 + * register will be initialised to zero by this function. Returns 0 on + * success and appropriate negative error code on failure. + */ +int gpmc_cs_program_settings(int cs, struct gpmc_settings *p) +{ + u32 config1; + + if ((!p->device_width) || (p->device_width > GPMC_DEVWIDTH_16BIT)) { + pr_err("%s: invalid width %d!", __func__, p->device_width); + return -EINVAL; + } + + /* Address-data multiplexing not supported for NAND devices */ + if (p->device_nand && p->mux_add_data) { + pr_err("%s: invalid configuration!\n", __func__); + return -EINVAL; + } + + if ((p->mux_add_data > GPMC_MUX_AD) || + ((p->mux_add_data == GPMC_MUX_AAD) && + !(gpmc_capability & GPMC_HAS_MUX_AAD))) { + pr_err("%s: invalid multiplex configuration!\n", __func__); + return -EINVAL; + } + + /* Page/burst mode supports lengths of 4, 8 and 16 bytes */ + if (p->burst_read || p->burst_write) { + switch (p->burst_len) { + case GPMC_BURST_4: + case GPMC_BURST_8: + case GPMC_BURST_16: + break; + default: + pr_err("%s: invalid page/burst-length (%d)\n", + __func__, p->burst_len); + return -EINVAL; + } + } + + if ((p->wait_on_read || p->wait_on_write) && + (p->wait_pin > gpmc_nr_waitpins)) { + pr_err("%s: invalid wait-pin (%d)\n", __func__, p->wait_pin); + return -EINVAL; + } + + config1 = GPMC_CONFIG1_DEVICESIZE((p->device_width - 1)); + + if (p->sync_read) + config1 |= GPMC_CONFIG1_READTYPE_SYNC; + if (p->sync_write) + config1 |= GPMC_CONFIG1_WRITETYPE_SYNC; + if (p->wait_on_read) + config1 |= GPMC_CONFIG1_WAIT_READ_MON; + if (p->wait_on_write) + config1 |= GPMC_CONFIG1_WAIT_WRITE_MON; + if (p->wait_on_read || p->wait_on_write) + config1 |= GPMC_CONFIG1_WAIT_PIN_SEL(p->wait_pin); + if (p->device_nand) + config1 |= GPMC_CONFIG1_DEVICETYPE(GPMC_DEVICETYPE_NAND); + if (p->mux_add_data) + config1 |= GPMC_CONFIG1_MUXTYPE(p->mux_add_data); + if (p->burst_read) + config1 |= GPMC_CONFIG1_READMULTIPLE_SUPP; + if (p->burst_write) + config1 |= GPMC_CONFIG1_WRITEMULTIPLE_SUPP; + if (p->burst_read || p->burst_write) { + config1 |= GPMC_CONFIG1_PAGE_LEN(p->burst_len >> 3); + config1 |= p->burst_wrap ? GPMC_CONFIG1_WRAPBURST_SUPP : 0; + } + + gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, config1); + + return 0; +} + #ifdef CONFIG_OF static struct of_device_id gpmc_dt_ids[] = { { .compatible = "ti,omap2420-gpmc" }, @@ -1136,70 +1229,110 @@ static struct of_device_id gpmc_dt_ids[] = { }; MODULE_DEVICE_TABLE(of, gpmc_dt_ids); +/** + * gpmc_read_settings_dt - read gpmc settings from device-tree + * @np: pointer to device-tree node for a gpmc child device + * @p: pointer to gpmc settings structure + * + * Reads the GPMC settings for a GPMC child device from device-tree and + * stores them in the GPMC settings structure passed. The GPMC settings + * structure is initialised to zero by this function and so any + * previously stored settings will be cleared. + */ +void gpmc_read_settings_dt(struct device_node *np, struct gpmc_settings *p) +{ + memset(p, 0, sizeof(struct gpmc_settings)); + + p->sync_read = of_property_read_bool(np, "gpmc,sync-read"); + p->sync_write = of_property_read_bool(np, "gpmc,sync-write"); + p->device_nand = of_property_read_bool(np, "gpmc,device-nand"); + of_property_read_u32(np, "gpmc,device-width", &p->device_width); + of_property_read_u32(np, "gpmc,mux-add-data", &p->mux_add_data); + + if (!of_property_read_u32(np, "gpmc,burst-length", &p->burst_len)) { + p->burst_wrap = of_property_read_bool(np, "gpmc,burst-wrap"); + p->burst_read = of_property_read_bool(np, "gpmc,burst-read"); + p->burst_write = of_property_read_bool(np, "gpmc,burst-write"); + if (!p->burst_read && !p->burst_write) + pr_warn("%s: page/burst-length set but not used!\n", + __func__); + } + + if (!of_property_read_u32(np, "gpmc,wait-pin", &p->wait_pin)) { + p->wait_on_read = of_property_read_bool(np, + "gpmc,wait-on-read"); + p->wait_on_write = of_property_read_bool(np, + "gpmc,wait-on-write"); + if (!p->wait_on_read && !p->wait_on_write) + pr_warn("%s: read/write wait monitoring not enabled!\n", + __func__); + } +} + static void __maybe_unused gpmc_read_timings_dt(struct device_node *np, struct gpmc_timings *gpmc_t) { - u32 val; + struct gpmc_bool_timings *p; + + if (!np || !gpmc_t) + return; memset(gpmc_t, 0, sizeof(*gpmc_t)); /* minimum clock period for syncronous mode */ - if (!of_property_read_u32(np, "gpmc,sync-clk", &val)) - gpmc_t->sync_clk = val; + of_property_read_u32(np, "gpmc,sync-clk-ps", &gpmc_t->sync_clk); /* chip select timtings */ - if (!of_property_read_u32(np, "gpmc,cs-on", &val)) - gpmc_t->cs_on = val; - - if (!of_property_read_u32(np, "gpmc,cs-rd-off", &val)) - gpmc_t->cs_rd_off = val; - - if (!of_property_read_u32(np, "gpmc,cs-wr-off", &val)) - gpmc_t->cs_wr_off = val; + of_property_read_u32(np, "gpmc,cs-on-ns", &gpmc_t->cs_on); + of_property_read_u32(np, "gpmc,cs-rd-off-ns", &gpmc_t->cs_rd_off); + of_property_read_u32(np, "gpmc,cs-wr-off-ns", &gpmc_t->cs_wr_off); /* ADV signal timings */ - if (!of_property_read_u32(np, "gpmc,adv-on", &val)) - gpmc_t->adv_on = val; - - if (!of_property_read_u32(np, "gpmc,adv-rd-off", &val)) - gpmc_t->adv_rd_off = val; - - if (!of_property_read_u32(np, "gpmc,adv-wr-off", &val)) - gpmc_t->adv_wr_off = val; + of_property_read_u32(np, "gpmc,adv-on-ns", &gpmc_t->adv_on); + of_property_read_u32(np, "gpmc,adv-rd-off-ns", &gpmc_t->adv_rd_off); + of_property_read_u32(np, "gpmc,adv-wr-off-ns", &gpmc_t->adv_wr_off); /* WE signal timings */ - if (!of_property_read_u32(np, "gpmc,we-on", &val)) - gpmc_t->we_on = val; - - if (!of_property_read_u32(np, "gpmc,we-off", &val)) - gpmc_t->we_off = val; + of_property_read_u32(np, "gpmc,we-on-ns", &gpmc_t->we_on); + of_property_read_u32(np, "gpmc,we-off-ns", &gpmc_t->we_off); /* OE signal timings */ - if (!of_property_read_u32(np, "gpmc,oe-on", &val)) - gpmc_t->oe_on = val; - - if (!of_property_read_u32(np, "gpmc,oe-off", &val)) - gpmc_t->oe_off = val; + of_property_read_u32(np, "gpmc,oe-on-ns", &gpmc_t->oe_on); + of_property_read_u32(np, "gpmc,oe-off-ns", &gpmc_t->oe_off); /* access and cycle timings */ - if (!of_property_read_u32(np, "gpmc,page-burst-access", &val)) - gpmc_t->page_burst_access = val; - - if (!of_property_read_u32(np, "gpmc,access", &val)) - gpmc_t->access = val; - - if (!of_property_read_u32(np, "gpmc,rd-cycle", &val)) - gpmc_t->rd_cycle = val; - - if (!of_property_read_u32(np, "gpmc,wr-cycle", &val)) - gpmc_t->wr_cycle = val; - - /* only for OMAP3430 */ - if (!of_property_read_u32(np, "gpmc,wr-access", &val)) - gpmc_t->wr_access = val; - - if (!of_property_read_u32(np, "gpmc,wr-data-mux-bus", &val)) - gpmc_t->wr_data_mux_bus = val; + of_property_read_u32(np, "gpmc,page-burst-access-ns", + &gpmc_t->page_burst_access); + of_property_read_u32(np, "gpmc,access-ns", &gpmc_t->access); + of_property_read_u32(np, "gpmc,rd-cycle-ns", &gpmc_t->rd_cycle); + of_property_read_u32(np, "gpmc,wr-cycle-ns", &gpmc_t->wr_cycle); + of_property_read_u32(np, "gpmc,bus-turnaround-ns", + &gpmc_t->bus_turnaround); + of_property_read_u32(np, "gpmc,cycle2cycle-delay-ns", + &gpmc_t->cycle2cycle_delay); + of_property_read_u32(np, "gpmc,wait-monitoring-ns", + &gpmc_t->wait_monitoring); + of_property_read_u32(np, "gpmc,clk-activation-ns", + &gpmc_t->clk_activation); + + /* only applicable to OMAP3+ */ + of_property_read_u32(np, "gpmc,wr-access-ns", &gpmc_t->wr_access); + of_property_read_u32(np, "gpmc,wr-data-mux-bus-ns", + &gpmc_t->wr_data_mux_bus); + + /* bool timing parameters */ + p = &gpmc_t->bool_timings; + + p->cycle2cyclediffcsen = + of_property_read_bool(np, "gpmc,cycle2cycle-diffcsen"); + p->cycle2cyclesamecsen = + of_property_read_bool(np, "gpmc,cycle2cycle-samecsen"); + p->we_extra_delay = of_property_read_bool(np, "gpmc,we-extra-delay"); + p->oe_extra_delay = of_property_read_bool(np, "gpmc,oe-extra-delay"); + p->adv_extra_delay = of_property_read_bool(np, "gpmc,adv-extra-delay"); + p->cs_extra_delay = of_property_read_bool(np, "gpmc,cs-extra-delay"); + p->time_para_granularity = + of_property_read_bool(np, "gpmc,time-para-granularity"); } #ifdef CONFIG_MTD_NAND @@ -1295,6 +1428,81 @@ static int gpmc_probe_onenand_child(struct platform_device *pdev, } #endif +/** + * gpmc_probe_generic_child - configures the gpmc for a child device + * @pdev: pointer to gpmc platform device + * @child: pointer to device-tree node for child device + * + * Allocates and configures a GPMC chip-select for a child device. + * Returns 0 on success and appropriate negative error code on failure. + */ +static int gpmc_probe_generic_child(struct platform_device *pdev, + struct device_node *child) +{ + struct gpmc_settings gpmc_s; + struct gpmc_timings gpmc_t; + struct resource res; + unsigned long base; + int ret, cs; + + if (of_property_read_u32(child, "reg", &cs) < 0) { + dev_err(&pdev->dev, "%s has no 'reg' property\n", + child->full_name); + return -ENODEV; + } + + if (of_address_to_resource(child, 0, &res) < 0) { + dev_err(&pdev->dev, "%s has malformed 'reg' property\n", + child->full_name); + return -ENODEV; + } + + ret = gpmc_cs_request(cs, resource_size(&res), &base); + if (ret < 0) { + dev_err(&pdev->dev, "cannot request GPMC CS %d\n", cs); + return ret; + } + + /* + * FIXME: gpmc_cs_request() will map the CS to an arbitary + * location in the gpmc address space. When booting with + * device-tree we want the NOR flash to be mapped to the + * location specified in the device-tree blob. So remap the + * CS to this location. Once DT migration is complete should + * just make gpmc_cs_request() map a specific address. + */ + ret = gpmc_cs_remap(cs, res.start); + if (ret < 0) { + dev_err(&pdev->dev, "cannot remap GPMC CS %d to 0x%x\n", + cs, res.start); + goto err; + } + + gpmc_read_settings_dt(child, &gpmc_s); + + ret = of_property_read_u32(child, "bank-width", &gpmc_s.device_width); + if (ret < 0) + goto err; + + ret = gpmc_cs_program_settings(cs, &gpmc_s); + if (ret < 0) + goto err; + + gpmc_read_timings_dt(child, &gpmc_t); + gpmc_cs_set_timings(cs, &gpmc_t); + + if (of_platform_device_create(child, NULL, &pdev->dev)) + return 0; + + dev_err(&pdev->dev, "failed to create gpmc child %s\n", child->name); + ret = -ENODEV; + +err: + gpmc_cs_free(cs); + + return ret; +} + static int gpmc_probe_dt(struct platform_device *pdev) { int ret; @@ -1305,21 +1513,31 @@ static int gpmc_probe_dt(struct platform_device *pdev) if (!of_id) return 0; - for_each_node_by_name(child, "nand") { - ret = gpmc_probe_nand_child(pdev, child); - if (ret < 0) { - of_node_put(child); - return ret; - } + ret = of_property_read_u32(pdev->dev.of_node, "gpmc,num-waitpins", + &gpmc_nr_waitpins); + if (ret < 0) { + pr_err("%s: number of wait pins not found!\n", __func__); + return ret; } - for_each_node_by_name(child, "onenand") { - ret = gpmc_probe_onenand_child(pdev, child); - if (ret < 0) { + for_each_child_of_node(pdev->dev.of_node, child) { + + if (!child->name) + continue; + + if (of_node_cmp(child->name, "nand") == 0) + ret = gpmc_probe_nand_child(pdev, child); + else if (of_node_cmp(child->name, "onenand") == 0) + ret = gpmc_probe_onenand_child(pdev, child); + else if (of_node_cmp(child->name, "ethernet") == 0 || + of_node_cmp(child->name, "nor") == 0) + ret = gpmc_probe_generic_child(pdev, child); + + if (WARN(ret < 0, "%s: probing gpmc child %s failed\n", + __func__, child->full_name)) of_node_put(child); - return ret; - } } + return 0; } #else @@ -1364,25 +1582,37 @@ static int gpmc_probe(struct platform_device *pdev) gpmc_dev = &pdev->dev; l = gpmc_read_reg(GPMC_REVISION); + + /* + * FIXME: Once device-tree migration is complete the below flags + * should be populated based upon the device-tree compatible + * string. For now just use the IP revision. OMAP3+ devices have + * the wr_access and wr_data_mux_bus register fields. OMAP4+ + * devices support the addr-addr-data multiplex protocol. + * + * GPMC IP revisions: + * - OMAP24xx = 2.0 + * - OMAP3xxx = 5.0 + * - OMAP44xx/54xx/AM335x = 6.0 + */ if (GPMC_REVISION_MAJOR(l) > 0x4) gpmc_capability = GPMC_HAS_WR_ACCESS | GPMC_HAS_WR_DATA_MUX_BUS; + if (GPMC_REVISION_MAJOR(l) > 0x5) + gpmc_capability |= GPMC_HAS_MUX_AAD; dev_info(gpmc_dev, "GPMC revision %d.%d\n", GPMC_REVISION_MAJOR(l), GPMC_REVISION_MINOR(l)); - rc = gpmc_mem_init(); - if (IS_ERR_VALUE(rc)) { - clk_disable_unprepare(gpmc_l3_clk); - clk_put(gpmc_l3_clk); - dev_err(gpmc_dev, "failed to reserve memory\n"); - return rc; - } + gpmc_mem_init(); - if (IS_ERR_VALUE(gpmc_setup_irq())) + if (gpmc_setup_irq() < 0) dev_warn(gpmc_dev, "gpmc_setup_irq failed\n"); /* Now the GPMC is initialised, unreserve the chip-selects */ gpmc_cs_map = 0; + if (!pdev->dev.of_node) + gpmc_nr_waitpins = GPMC_NR_WAITPINS; + rc = gpmc_probe_dt(pdev); if (rc < 0) { clk_disable_unprepare(gpmc_l3_clk); diff --git a/arch/arm/mach-omap2/gpmc.h b/arch/arm/mach-omap2/gpmc.h index fe0a844d5007..707f6d58edd5 100644 --- a/arch/arm/mach-omap2/gpmc.h +++ b/arch/arm/mach-omap2/gpmc.h @@ -58,7 +58,7 @@ #define GPMC_CONFIG1_DEVICESIZE_16 GPMC_CONFIG1_DEVICESIZE(1) #define GPMC_CONFIG1_DEVICETYPE(val) ((val & 3) << 10) #define GPMC_CONFIG1_DEVICETYPE_NOR GPMC_CONFIG1_DEVICETYPE(0) -#define GPMC_CONFIG1_MUXADDDATA (1 << 9) +#define GPMC_CONFIG1_MUXTYPE(val) ((val & 3) << 8) #define GPMC_CONFIG1_TIME_PARA_GRAN (1 << 4) #define GPMC_CONFIG1_FCLK_DIV(val) (val & 3) #define GPMC_CONFIG1_FCLK_DIV2 (GPMC_CONFIG1_FCLK_DIV(1)) @@ -73,6 +73,13 @@ #define GPMC_IRQ_FIFOEVENTENABLE 0x01 #define GPMC_IRQ_COUNT_EVENT 0x02 +#define GPMC_BURST_4 4 /* 4 word burst */ +#define GPMC_BURST_8 8 /* 8 word burst */ +#define GPMC_BURST_16 16 /* 16 word burst */ +#define GPMC_DEVWIDTH_8BIT 1 /* 8-bit device width */ +#define GPMC_DEVWIDTH_16BIT 2 /* 16-bit device width */ +#define GPMC_MUX_AAD 1 /* Addr-Addr-Data multiplex */ +#define GPMC_MUX_AD 2 /* Addr-Data multiplex */ /* bool type time settings */ struct gpmc_bool_timings { @@ -178,10 +185,6 @@ struct gpmc_device_timings { u8 cyc_wpl; /* write deassertion time in cycles */ u32 cyc_iaa; /* initial access time in cycles */ - bool mux; /* address & data muxed */ - bool sync_write;/* synchronous write */ - bool sync_read; /* synchronous read */ - /* extra delays */ bool ce_xdelay; bool avd_xdelay; @@ -189,28 +192,40 @@ struct gpmc_device_timings { bool we_xdelay; }; +struct gpmc_settings { + bool burst_wrap; /* enables wrap bursting */ + bool burst_read; /* enables read page/burst mode */ + bool burst_write; /* enables write page/burst mode */ + bool device_nand; /* device is NAND */ + bool sync_read; /* enables synchronous reads */ + bool sync_write; /* enables synchronous writes */ + bool wait_on_read; /* monitor wait on reads */ + bool wait_on_write; /* monitor wait on writes */ + u32 burst_len; /* page/burst length */ + u32 device_width; /* device bus width (8 or 16 bit) */ + u32 mux_add_data; /* multiplex address & data */ + u32 wait_pin; /* wait-pin to be used */ +}; + extern int gpmc_calc_timings(struct gpmc_timings *gpmc_t, - struct gpmc_device_timings *dev_t); + struct gpmc_settings *gpmc_s, + struct gpmc_device_timings *dev_t); extern void gpmc_update_nand_reg(struct gpmc_nand_regs *reg, int cs); extern int gpmc_get_client_irq(unsigned irq_config); -extern unsigned int gpmc_ns_to_ticks(unsigned int time_ns); -extern unsigned int gpmc_ps_to_ticks(unsigned int time_ps); extern unsigned int gpmc_ticks_to_ns(unsigned int ticks); -extern unsigned int gpmc_round_ns_to_ticks(unsigned int time_ns); -extern unsigned long gpmc_get_fclk_period(void); extern void gpmc_cs_write_reg(int cs, int idx, u32 val); -extern u32 gpmc_cs_read_reg(int cs, int idx); extern int gpmc_calc_divider(unsigned int sync_clk); extern int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t); +extern int gpmc_cs_program_settings(int cs, struct gpmc_settings *p); extern int gpmc_cs_request(int cs, unsigned long size, unsigned long *base); extern void gpmc_cs_free(int cs); -extern int gpmc_cs_set_reserved(int cs, int reserved); -extern int gpmc_cs_reserved(int cs); extern void omap3_gpmc_save_context(void); extern void omap3_gpmc_restore_context(void); -extern int gpmc_cs_configure(int cs, int cmd, int wval); +extern int gpmc_configure(int cmd, int wval); +extern void gpmc_read_settings_dt(struct device_node *np, + struct gpmc_settings *p); #endif diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index 8a68f1ec66b9..1272c41d4749 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -18,6 +18,11 @@ #include <linux/kernel.h> #include <linux/init.h> #include <linux/io.h> +#include <linux/slab.h> + +#ifdef CONFIG_SOC_BUS +#include <linux/sys_soc.h> +#endif #include <asm/cputype.h> @@ -31,8 +36,11 @@ #define OMAP4_SILICON_TYPE_STANDARD 0x01 #define OMAP4_SILICON_TYPE_PERFORMANCE 0x02 +#define OMAP_SOC_MAX_NAME_LENGTH 16 + static unsigned int omap_revision; -static const char *cpu_rev; +static char soc_name[OMAP_SOC_MAX_NAME_LENGTH]; +static char soc_rev[OMAP_SOC_MAX_NAME_LENGTH]; u32 omap_features; unsigned int omap_rev(void) @@ -169,9 +177,12 @@ void __init omap2xxx_check_revision(void) j = i; } - pr_info("OMAP%04x", omap_rev() >> 16); + sprintf(soc_name, "OMAP%04x", omap_rev() >> 16); + sprintf(soc_rev, "ES%x", (omap_rev() >> 12) & 0xf); + + pr_info("%s", soc_name); if ((omap_rev() >> 8) & 0x0f) - pr_info("ES%x", (omap_rev() >> 12) & 0xf); + pr_info("%s", soc_rev); pr_info("\n"); } @@ -211,8 +222,10 @@ static void __init omap3_cpuinfo(void) cpu_name = "OMAP3503"; } + sprintf(soc_name, "%s", cpu_name); + /* Print verbose information */ - pr_info("%s ES%s (", cpu_name, cpu_rev); + pr_info("%s %s (", soc_name, soc_rev); OMAP3_SHOW_FEATURE(l2cache); OMAP3_SHOW_FEATURE(iva); @@ -291,6 +304,7 @@ void __init ti81xx_check_features(void) void __init omap3xxx_check_revision(void) { + const char *cpu_rev; u32 cpuid, idcode; u16 hawkeye; u8 rev; @@ -300,7 +314,7 @@ void __init omap3xxx_check_revision(void) * If the processor type is Cortex-A8 and the revision is 0x0 * it means its Cortex r0p0 which is 3430 ES1.0. */ - cpuid = read_cpuid(CPUID_ID); + cpuid = read_cpuid_id(); if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) { omap_revision = OMAP3430_REV_ES1_0; cpu_rev = "1.0"; @@ -405,11 +419,15 @@ void __init omap3xxx_check_revision(void) cpu_rev = "1.0"; break; case 1: - /* FALLTHROUGH */ - default: omap_revision = AM335X_REV_ES2_0; cpu_rev = "2.0"; break; + case 2: + /* FALLTHROUGH */ + default: + omap_revision = AM335X_REV_ES2_1; + cpu_rev = "2.1"; + break; } break; case 0xb8f2: @@ -438,6 +456,7 @@ void __init omap3xxx_check_revision(void) cpu_rev = "1.2"; pr_warn("Warning: unknown chip type; assuming OMAP3630ES1.2\n"); } + sprintf(soc_rev, "ES%s", cpu_rev); } void __init omap4xxx_check_revision(void) @@ -460,7 +479,7 @@ void __init omap4xxx_check_revision(void) * Use ARM register to detect the correct ES version */ if (!rev && (hawkeye != 0xb94e) && (hawkeye != 0xb975)) { - idcode = read_cpuid(CPUID_ID); + idcode = read_cpuid_id(); rev = (idcode & 0xf) - 1; } @@ -512,8 +531,10 @@ void __init omap4xxx_check_revision(void) omap_revision = OMAP4430_REV_ES2_3; } - pr_info("OMAP%04x ES%d.%d\n", omap_rev() >> 16, - ((omap_rev() >> 12) & 0xf), ((omap_rev() >> 8) & 0xf)); + sprintf(soc_name, "OMAP%04x", omap_rev() >> 16); + sprintf(soc_rev, "ES%d.%d", (omap_rev() >> 12) & 0xf, + (omap_rev() >> 8) & 0xf); + pr_info("%s %s\n", soc_name, soc_rev); } void __init omap5xxx_check_revision(void) @@ -529,26 +550,34 @@ void __init omap5xxx_check_revision(void) case 0xb942: switch (rev) { case 0: - default: omap_revision = OMAP5430_REV_ES1_0; + break; + case 1: + default: + omap_revision = OMAP5430_REV_ES2_0; } break; case 0xb998: switch (rev) { case 0: - default: omap_revision = OMAP5432_REV_ES1_0; + break; + case 1: + default: + omap_revision = OMAP5432_REV_ES2_0; } break; default: /* Unknown default to latest silicon rev as default*/ - omap_revision = OMAP5430_REV_ES1_0; + omap_revision = OMAP5430_REV_ES2_0; } - pr_info("OMAP%04x ES%d.0\n", - omap_rev() >> 16, ((omap_rev() >> 12) & 0xf)); + sprintf(soc_name, "OMAP%04x", omap_rev() >> 16); + sprintf(soc_rev, "ES%d.0", (omap_rev() >> 12) & 0xf); + + pr_info("%s %s\n", soc_name, soc_rev); } /* @@ -569,3 +598,62 @@ void __init omap2_set_globals_tap(u32 class, void __iomem *tap) else tap_prod_id = 0x0208; } + +#ifdef CONFIG_SOC_BUS + +static const char const *omap_types[] = { + [OMAP2_DEVICE_TYPE_TEST] = "TST", + [OMAP2_DEVICE_TYPE_EMU] = "EMU", + [OMAP2_DEVICE_TYPE_SEC] = "HS", + [OMAP2_DEVICE_TYPE_GP] = "GP", + [OMAP2_DEVICE_TYPE_BAD] = "BAD", +}; + +static const char * __init omap_get_family(void) +{ + if (cpu_is_omap24xx()) + return kasprintf(GFP_KERNEL, "OMAP2"); + else if (cpu_is_omap34xx()) + return kasprintf(GFP_KERNEL, "OMAP3"); + else if (cpu_is_omap44xx()) + return kasprintf(GFP_KERNEL, "OMAP4"); + else if (soc_is_omap54xx()) + return kasprintf(GFP_KERNEL, "OMAP5"); + else + return kasprintf(GFP_KERNEL, "Unknown"); +} + +static ssize_t omap_get_type(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + return sprintf(buf, "%s\n", omap_types[omap_type()]); +} + +static struct device_attribute omap_soc_attr = + __ATTR(type, S_IRUGO, omap_get_type, NULL); + +void __init omap_soc_device_init(void) +{ + struct device *parent; + struct soc_device *soc_dev; + struct soc_device_attribute *soc_dev_attr; + + soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL); + if (!soc_dev_attr) + return; + + soc_dev_attr->machine = soc_name; + soc_dev_attr->family = omap_get_family(); + soc_dev_attr->revision = soc_rev; + + soc_dev = soc_device_register(soc_dev_attr); + if (IS_ERR(soc_dev)) { + kfree(soc_dev_attr); + return; + } + + parent = soc_device_to_device(soc_dev); + device_create_file(parent, &omap_soc_attr); +} +#endif /* CONFIG_SOC_BUS */ diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 2c3fdd65387b..09abf99e9e57 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -55,6 +55,12 @@ #include "prm44xx.h" /* + * omap_clk_init: points to a function that does the SoC-specific + * clock initializations + */ +int (*omap_clk_init)(void); + +/* * The machine specific code may provide the extra mapping besides the * default mapping provided here. */ @@ -271,6 +277,14 @@ static struct map_desc omap54xx_io_desc[] __initdata = { .length = L4_PER_54XX_SIZE, .type = MT_DEVICE, }, +#ifdef CONFIG_OMAP4_ERRATA_I688 + { + .virtual = OMAP4_SRAM_VA, + .pfn = __phys_to_pfn(OMAP4_SRAM_PA), + .length = PAGE_SIZE, + .type = MT_MEMORY_SO, + }, +#endif }; #endif @@ -323,6 +337,7 @@ void __init omap4_map_io(void) void __init omap5_map_io(void) { iotable_init(omap54xx_io_desc, ARRAY_SIZE(omap54xx_io_desc)); + omap_barriers_init(); } #endif /* @@ -379,6 +394,13 @@ static void __init omap_hwmod_init_postsetup(void) omap_pm_if_early_init(); } +static void __init omap_common_late_init(void) +{ + omap_mux_late_init(); + omap2_common_pm_late_init(); + omap_soc_device_init(); +} + #ifdef CONFIG_SOC_OMAP2420 void __init omap2420_init_early(void) { @@ -397,13 +419,12 @@ void __init omap2420_init_early(void) omap242x_clockdomains_init(); omap2420_hwmod_init(); omap_hwmod_init_postsetup(); - omap2420_clk_init(); + omap_clk_init = omap2420_clk_init; } void __init omap2420_init_late(void) { - omap_mux_late_init(); - omap2_common_pm_late_init(); + omap_common_late_init(); omap2_pm_init(); omap2_clk_enable_autoidle_all(); } @@ -427,13 +448,12 @@ void __init omap2430_init_early(void) omap243x_clockdomains_init(); omap2430_hwmod_init(); omap_hwmod_init_postsetup(); - omap2430_clk_init(); + omap_clk_init = omap2430_clk_init; } void __init omap2430_init_late(void) { - omap_mux_late_init(); - omap2_common_pm_late_init(); + omap_common_late_init(); omap2_pm_init(); omap2_clk_enable_autoidle_all(); } @@ -462,7 +482,7 @@ void __init omap3_init_early(void) omap3xxx_clockdomains_init(); omap3xxx_hwmod_init(); omap_hwmod_init_postsetup(); - omap3xxx_clk_init(); + omap_clk_init = omap3xxx_clk_init; } void __init omap3430_init_early(void) @@ -500,53 +520,47 @@ void __init ti81xx_init_early(void) omap3xxx_clockdomains_init(); omap3xxx_hwmod_init(); omap_hwmod_init_postsetup(); - omap3xxx_clk_init(); + omap_clk_init = omap3xxx_clk_init; } void __init omap3_init_late(void) { - omap_mux_late_init(); - omap2_common_pm_late_init(); + omap_common_late_init(); omap3_pm_init(); omap2_clk_enable_autoidle_all(); } void __init omap3430_init_late(void) { - omap_mux_late_init(); - omap2_common_pm_late_init(); + omap_common_late_init(); omap3_pm_init(); omap2_clk_enable_autoidle_all(); } void __init omap35xx_init_late(void) { - omap_mux_late_init(); - omap2_common_pm_late_init(); + omap_common_late_init(); omap3_pm_init(); omap2_clk_enable_autoidle_all(); } void __init omap3630_init_late(void) { - omap_mux_late_init(); - omap2_common_pm_late_init(); + omap_common_late_init(); omap3_pm_init(); omap2_clk_enable_autoidle_all(); } void __init am35xx_init_late(void) { - omap_mux_late_init(); - omap2_common_pm_late_init(); + omap_common_late_init(); omap3_pm_init(); omap2_clk_enable_autoidle_all(); } void __init ti81xx_init_late(void) { - omap_mux_late_init(); - omap2_common_pm_late_init(); + omap_common_late_init(); omap3_pm_init(); omap2_clk_enable_autoidle_all(); } @@ -568,7 +582,7 @@ void __init am33xx_init_early(void) am33xx_clockdomains_init(); am33xx_hwmod_init(); omap_hwmod_init_postsetup(); - am33xx_clk_init(); + omap_clk_init = am33xx_clk_init; } #endif @@ -593,13 +607,12 @@ void __init omap4430_init_early(void) omap44xx_clockdomains_init(); omap44xx_hwmod_init(); omap_hwmod_init_postsetup(); - omap4xxx_clk_init(); + omap_clk_init = omap4xxx_clk_init; } void __init omap4430_init_late(void) { - omap_mux_late_init(); - omap2_common_pm_late_init(); + omap_common_late_init(); omap4_pm_init(); omap2_clk_enable_autoidle_all(); } diff --git a/arch/arm/mach-omap2/mux34xx.h b/arch/arm/mach-omap2/mux34xx.h index 6543ebf8ecfc..3f26d297c082 100644 --- a/arch/arm/mach-omap2/mux34xx.h +++ b/arch/arm/mach-omap2/mux34xx.h @@ -393,6 +393,10 @@ #define OMAP3_CONTROL_PADCONF_SAD2D_SWAKEUP_OFFSET 0xa1c #define OMAP3_CONTROL_PADCONF_JTAG_RTCK_OFFSET 0xa1e #define OMAP3_CONTROL_PADCONF_JTAG_TDO_OFFSET 0xa20 +#define OMAP3_CONTROL_PADCONF_GPIO_127 0xa24 +#define OMAP3_CONTROL_PADCONF_GPIO_126 0xa26 +#define OMAP3_CONTROL_PADCONF_GPIO_128 0xa28 +#define OMAP3_CONTROL_PADCONF_GPIO_129 0xa2a #define OMAP3_CONTROL_PADCONF_MUX_SIZE \ - (OMAP3_CONTROL_PADCONF_JTAG_TDO_OFFSET + 0x2) + (OMAP3_CONTROL_PADCONF_GPIO_129 + 0x2) diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c index d4322aa3192e..f993a4188701 100644 --- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c +++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c @@ -172,20 +172,6 @@ static inline void cpu_clear_prev_logic_pwrst(unsigned int cpu_id) } } -/** - * omap4_mpuss_read_prev_context_state: - * Function returns the MPUSS previous context state - */ -u32 omap4_mpuss_read_prev_context_state(void) -{ - u32 reg; - - reg = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION, - OMAP4430_PRM_MPU_INST, OMAP4_RM_MPU_MPU_CONTEXT_OFFSET); - reg &= OMAP4430_LOSTCONTEXT_DFF_MASK; - return reg; -} - /* * Store the CPU cluster state for L2X0 low power operations. */ diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c index 5b201653ca32..98a11463a843 100644 --- a/arch/arm/mach-omap2/omap-smp.c +++ b/arch/arm/mach-omap2/omap-smp.c @@ -66,13 +66,6 @@ static void __cpuinit omap4_secondary_init(unsigned int cpu) 4, 0, 0, 0, 0, 0); /* - * If any interrupts are already enabled for the primary - * core (e.g. timer irq), then they will not have been enabled - * for us: do so - */ - gic_secondary_init(0); - - /* * Synchronise with the boot thread. */ spin_lock(&boot_lock); @@ -83,6 +76,7 @@ static int __cpuinit omap4_boot_secondary(unsigned int cpu, struct task_struct * { static struct clockdomain *cpu1_clkdm; static bool booted; + static struct powerdomain *cpu1_pwrdm; void __iomem *base = omap_get_wakeupgen_base(); /* @@ -102,8 +96,10 @@ static int __cpuinit omap4_boot_secondary(unsigned int cpu, struct task_struct * else __raw_writel(0x20, base + OMAP_AUX_CORE_BOOT_0); - if (!cpu1_clkdm) + if (!cpu1_clkdm && !cpu1_pwrdm) { cpu1_clkdm = clkdm_lookup("mpu1_clkdm"); + cpu1_pwrdm = pwrdm_lookup("cpu1_pwrdm"); + } /* * The SGI(Software Generated Interrupts) are not wakeup capable @@ -116,7 +112,7 @@ static int __cpuinit omap4_boot_secondary(unsigned int cpu, struct task_struct * * Section : * 4.3.4.2 Power States of CPU0 and CPU1 */ - if (booted) { + if (booted && cpu1_pwrdm && cpu1_clkdm) { /* * GIC distributor control register has changed between * CortexA9 r1pX and r2pX. The Control Register secure @@ -137,7 +133,12 @@ static int __cpuinit omap4_boot_secondary(unsigned int cpu, struct task_struct * gic_dist_disable(); } + /* + * Ensure that CPU power state is set to ON to avoid CPU + * powerdomain transition on wfi + */ clkdm_wakeup(cpu1_clkdm); + omap_set_pwrdm_state(cpu1_pwrdm, PWRDM_POWER_ON); clkdm_allow_idle(cpu1_clkdm); if (IS_PM44XX_ERRATUM(PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD)) { @@ -173,7 +174,7 @@ static void __init omap4_smp_init_cpus(void) unsigned int i = 0, ncores = 1, cpu_id; /* Use ARM cpuid check here, as SoC detection will not work so early */ - cpu_id = read_cpuid(CPUID_ID) & CPU_MASK; + cpu_id = read_cpuid_id() & CPU_MASK; if (cpu_id == CPU_CORTEX_A9) { /* * Currently we can't call ioremap here because diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c index 20bf3c754bfd..13b27ffaf45e 100644 --- a/arch/arm/mach-omap2/omap4-common.c +++ b/arch/arm/mach-omap2/omap4-common.c @@ -241,15 +241,21 @@ void __iomem *omap4_get_sar_ram_base(void) */ static int __init omap4_sar_ram_init(void) { + unsigned long sar_base; + /* * To avoid code running on other OMAPs in * multi-omap builds */ - if (!cpu_is_omap44xx()) + if (cpu_is_omap44xx()) + sar_base = OMAP44XX_SAR_RAM_BASE; + else if (soc_is_omap54xx()) + sar_base = OMAP54XX_SAR_RAM_BASE; + else return -ENOMEM; /* Static mapping, never released */ - sar_ram_base = ioremap(OMAP44XX_SAR_RAM_BASE, SZ_16K); + sar_ram_base = ioremap(sar_base, SZ_16K); if (WARN_ON(!sar_ram_base)) return -ENOMEM; diff --git a/arch/arm/mach-omap2/omap4-sar-layout.h b/arch/arm/mach-omap2/omap4-sar-layout.h index 6822d0a7324f..792b1069f724 100644 --- a/arch/arm/mach-omap2/omap4-sar-layout.h +++ b/arch/arm/mach-omap2/omap4-sar-layout.h @@ -48,13 +48,13 @@ #define SAR_BACKUP_STATUS_WAKEUPGEN 0x10 /* WakeUpGen save restore offset from OMAP54XX_SAR_RAM_BASE */ -#define OMAP5_WAKEUPGENENB_OFFSET_CPU0 (SAR_BANK3_OFFSET + 0x8d4) -#define OMAP5_WAKEUPGENENB_SECURE_OFFSET_CPU0 (SAR_BANK3_OFFSET + 0x8e8) -#define OMAP5_WAKEUPGENENB_OFFSET_CPU1 (SAR_BANK3_OFFSET + 0x8fc) -#define OMAP5_WAKEUPGENENB_SECURE_OFFSET_CPU1 (SAR_BANK3_OFFSET + 0x910) -#define OMAP5_AUXCOREBOOT0_OFFSET (SAR_BANK3_OFFSET + 0x924) -#define OMAP5_AUXCOREBOOT1_OFFSET (SAR_BANK3_OFFSET + 0x928) -#define OMAP5_AMBA_IF_MODE_OFFSET (SAR_BANK3_OFFSET + 0x92c) +#define OMAP5_WAKEUPGENENB_OFFSET_CPU0 (SAR_BANK3_OFFSET + 0x9dc) +#define OMAP5_WAKEUPGENENB_SECURE_OFFSET_CPU0 (SAR_BANK3_OFFSET + 0x9f0) +#define OMAP5_WAKEUPGENENB_OFFSET_CPU1 (SAR_BANK3_OFFSET + 0xa04) +#define OMAP5_WAKEUPGENENB_SECURE_OFFSET_CPU1 (SAR_BANK3_OFFSET + 0xa18) +#define OMAP5_AUXCOREBOOT0_OFFSET (SAR_BANK3_OFFSET + 0xa2c) +#define OMAP5_AUXCOREBOOT1_OFFSET (SAR_BANK3_OFFSET + 0x930) +#define OMAP5_AMBA_IF_MODE_OFFSET (SAR_BANK3_OFFSET + 0xa34) #define OMAP5_SAR_BACKUP_STATUS_OFFSET (SAR_BANK3_OFFSET + 0x800) #endif diff --git a/arch/arm/mach-omap2/omap54xx.h b/arch/arm/mach-omap2/omap54xx.h index a2582bb3cab3..a086ba15868b 100644 --- a/arch/arm/mach-omap2/omap54xx.h +++ b/arch/arm/mach-omap2/omap54xx.h @@ -28,5 +28,6 @@ #define OMAP54XX_PRCM_MPU_BASE 0x48243000 #define OMAP54XX_SCM_BASE 0x4a002000 #define OMAP54XX_CTRL_BASE 0x4a002800 +#define OMAP54XX_SAR_RAM_BASE 0x4ae26000 #endif /* __ASM_SOC_OMAP555554XX_H */ diff --git a/arch/arm/mach-omap2/omap_device.c b/arch/arm/mach-omap2/omap_device.c index 381be7ac0c17..e6d230700b2b 100644 --- a/arch/arm/mach-omap2/omap_device.c +++ b/arch/arm/mach-omap2/omap_device.c @@ -131,7 +131,7 @@ static int omap_device_build_from_dt(struct platform_device *pdev) int oh_cnt, i, ret = 0; oh_cnt = of_property_count_strings(node, "ti,hwmods"); - if (!oh_cnt || IS_ERR_VALUE(oh_cnt)) { + if (oh_cnt <= 0) { dev_dbg(&pdev->dev, "No 'hwmods' to build omap_device\n"); return -ENODEV; } @@ -815,20 +815,17 @@ struct device *omap_device_get_by_hwmod_name(const char *oh_name) } oh = omap_hwmod_lookup(oh_name); - if (IS_ERR_OR_NULL(oh)) { + if (!oh) { WARN(1, "%s: no hwmod for %s\n", __func__, oh_name); - return ERR_PTR(oh ? PTR_ERR(oh) : -ENODEV); + return ERR_PTR(-ENODEV); } - if (IS_ERR_OR_NULL(oh->od)) { + if (!oh->od) { WARN(1, "%s: no omap_device for %s\n", __func__, oh_name); - return ERR_PTR(oh->od ? PTR_ERR(oh->od) : -ENODEV); + return ERR_PTR(-ENODEV); } - if (IS_ERR_OR_NULL(oh->od->pdev)) - return ERR_PTR(oh->od->pdev ? PTR_ERR(oh->od->pdev) : -ENODEV); - return &oh->od->pdev->dev; } @@ -879,4 +876,4 @@ static int __init omap_device_late_init(void) bus_for_each_dev(&platform_bus_type, NULL, NULL, omap_device_late_idle); return 0; } -omap_late_initcall(omap_device_late_init); +omap_late_initcall_sync(omap_device_late_init); diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index c2c798c08c2b..d25a95fe9921 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -138,6 +138,9 @@ #include <linux/spinlock.h> #include <linux/slab.h> #include <linux/bootmem.h> +#include <linux/cpu.h> +#include <linux/of.h> +#include <linux/of_address.h> #include <asm/system_misc.h> @@ -610,8 +613,6 @@ static int _enable_wakeup(struct omap_hwmod *oh, u32 *v) /* XXX test pwrdm_get_wken for this hwmod's subsystem */ - oh->_int_flags |= _HWMOD_WAKEUP_ENABLED; - return 0; } @@ -645,8 +646,6 @@ static int _disable_wakeup(struct omap_hwmod *oh, u32 *v) /* XXX test pwrdm_get_wken for this hwmod's subsystem */ - oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED; - return 0; } @@ -1368,7 +1367,9 @@ static void _enable_sysc(struct omap_hwmod *oh) } if (sf & SYSC_HAS_MIDLEMODE) { - if (oh->flags & HWMOD_SWSUP_MSTANDBY) { + if (oh->flags & HWMOD_FORCE_MSTANDBY) { + idlemode = HWMOD_IDLEMODE_FORCE; + } else if (oh->flags & HWMOD_SWSUP_MSTANDBY) { idlemode = HWMOD_IDLEMODE_NO; } else { if (sf & SYSC_HAS_ENAWAKEUP) @@ -1440,7 +1441,8 @@ static void _idle_sysc(struct omap_hwmod *oh) } if (sf & SYSC_HAS_MIDLEMODE) { - if (oh->flags & HWMOD_SWSUP_MSTANDBY) { + if ((oh->flags & HWMOD_SWSUP_MSTANDBY) || + (oh->flags & HWMOD_FORCE_MSTANDBY)) { idlemode = HWMOD_IDLEMODE_FORCE; } else { if (sf & SYSC_HAS_ENAWAKEUP) @@ -1663,7 +1665,7 @@ static int _deassert_hardreset(struct omap_hwmod *oh, const char *name) return -ENOSYS; ret = _lookup_hardreset(oh, name, &ohri); - if (IS_ERR_VALUE(ret)) + if (ret < 0) return ret; if (oh->clkdm) { @@ -2154,7 +2156,7 @@ static int _enable(struct omap_hwmod *oh) if (soc_ops.enable_module) soc_ops.enable_module(oh); if (oh->flags & HWMOD_BLOCK_WFI) - disable_hlt(); + cpu_idle_poll_ctrl(true); if (soc_ops.update_context_lost) soc_ops.update_context_lost(oh); @@ -2218,7 +2220,7 @@ static int _idle(struct omap_hwmod *oh) _del_initiator_dep(oh, mpu_oh); if (oh->flags & HWMOD_BLOCK_WFI) - enable_hlt(); + cpu_idle_poll_ctrl(false); if (soc_ops.disable_module) soc_ops.disable_module(oh); @@ -2328,7 +2330,7 @@ static int _shutdown(struct omap_hwmod *oh) _del_initiator_dep(oh, mpu_oh); /* XXX what about the other system initiators here? dma, dsp */ if (oh->flags & HWMOD_BLOCK_WFI) - enable_hlt(); + cpu_idle_poll_ctrl(false); if (soc_ops.disable_module) soc_ops.disable_module(oh); _disable_clocks(oh); @@ -2350,6 +2352,34 @@ static int _shutdown(struct omap_hwmod *oh) } /** + * of_dev_hwmod_lookup - look up needed hwmod from dt blob + * @np: struct device_node * + * @oh: struct omap_hwmod * + * + * Parse the dt blob and find out needed hwmod. Recursive function is + * implemented to take care hierarchical dt blob parsing. + * Return: The device node on success or NULL on failure. + */ +static struct device_node *of_dev_hwmod_lookup(struct device_node *np, + struct omap_hwmod *oh) +{ + struct device_node *np0 = NULL, *np1 = NULL; + const char *p; + + for_each_child_of_node(np, np0) { + if (of_find_property(np0, "ti,hwmods", NULL)) { + p = of_get_property(np0, "ti,hwmods", NULL); + if (!strcmp(p, oh->name)) + return np0; + np1 = of_dev_hwmod_lookup(np0, oh); + if (np1) + return np1; + } + } + return NULL; +} + +/** * _init_mpu_rt_base - populate the virtual address for a hwmod * @oh: struct omap_hwmod * to locate the virtual address * @@ -2361,7 +2391,8 @@ static int _shutdown(struct omap_hwmod *oh) static void __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data) { struct omap_hwmod_addr_space *mem; - void __iomem *va_start; + void __iomem *va_start = NULL; + struct device_node *np; if (!oh) return; @@ -2375,10 +2406,18 @@ static void __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data) if (!mem) { pr_debug("omap_hwmod: %s: no MPU register target found\n", oh->name); - return; + + /* Extract the IO space from device tree blob */ + if (!of_have_populated_dt()) + return; + + np = of_dev_hwmod_lookup(of_find_node_by_name(NULL, "ocp"), oh); + if (np) + va_start = of_iomap(np, 0); + } else { + va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start); } - va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start); if (!va_start) { pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name); return; @@ -2410,10 +2449,11 @@ static int __init _init(struct omap_hwmod *oh, void *data) if (oh->_state != _HWMOD_STATE_REGISTERED) return 0; - _init_mpu_rt_base(oh, NULL); + if (oh->class->sysc) + _init_mpu_rt_base(oh, NULL); r = _init_clocks(oh, NULL); - if (IS_ERR_VALUE(r)) { + if (r < 0) { WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name); return -EINVAL; } diff --git a/arch/arm/mach-omap2/omap_hwmod.h b/arch/arm/mach-omap2/omap_hwmod.h index d43d9b608eda..fe5962921f07 100644 --- a/arch/arm/mach-omap2/omap_hwmod.h +++ b/arch/arm/mach-omap2/omap_hwmod.h @@ -427,8 +427,8 @@ struct omap_hwmod_omap4_prcm { * * HWMOD_SWSUP_SIDLE: omap_hwmod code should manually bring module in and out * of idle, rather than relying on module smart-idle - * HWMOD_SWSUP_MSTDBY: omap_hwmod code should manually bring module in and out - * of standby, rather than relying on module smart-standby + * HWMOD_SWSUP_MSTANDBY: omap_hwmod code should manually bring module in and + * out of standby, rather than relying on module smart-standby * HWMOD_INIT_NO_RESET: don't reset this module at boot - important for * SDRAM controller, etc. XXX probably belongs outside the main hwmod file * XXX Should be HWMOD_SETUP_NO_RESET @@ -459,6 +459,10 @@ struct omap_hwmod_omap4_prcm { * correctly, or this is being abused to deal with some PM latency * issues -- but we're currently suffering from a shortage of * folks who are able to track these issues down properly. + * HWMOD_FORCE_MSTANDBY: Always keep MIDLEMODE bits cleared so that device + * is kept in force-standby mode. Failing to do so causes PM problems + * with musb on OMAP3630 at least. Note that musb has a dedicated register + * to control MSTANDBY signal when MIDLEMODE is set to force-standby. */ #define HWMOD_SWSUP_SIDLE (1 << 0) #define HWMOD_SWSUP_MSTANDBY (1 << 1) @@ -471,21 +475,20 @@ struct omap_hwmod_omap4_prcm { #define HWMOD_16BIT_REG (1 << 8) #define HWMOD_EXT_OPT_MAIN_CLK (1 << 9) #define HWMOD_BLOCK_WFI (1 << 10) +#define HWMOD_FORCE_MSTANDBY (1 << 11) /* * omap_hwmod._int_flags definitions * These are for internal use only and are managed by the omap_hwmod code. * * _HWMOD_NO_MPU_PORT: no path exists for the MPU to write to this module - * _HWMOD_WAKEUP_ENABLED: set when the omap_hwmod code has enabled ENAWAKEUP * _HWMOD_SYSCONFIG_LOADED: set when the OCP_SYSCONFIG value has been cached * _HWMOD_SKIP_ENABLE: set if hwmod enabled during init (HWMOD_INIT_NO_IDLE) - * causes the first call to _enable() to only update the pinmux */ #define _HWMOD_NO_MPU_PORT (1 << 0) -#define _HWMOD_WAKEUP_ENABLED (1 << 1) -#define _HWMOD_SYSCONFIG_LOADED (1 << 2) -#define _HWMOD_SKIP_ENABLE (1 << 3) +#define _HWMOD_SYSCONFIG_LOADED (1 << 1) +#define _HWMOD_SKIP_ENABLE (1 << 2) /* * omap_hwmod._state definitions diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index 6a764af6c6d3..5137cc84b504 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c @@ -610,6 +610,8 @@ static struct omap_hwmod_ocp_if *omap2420_hwmod_ocp_ifs[] __initdata = { &omap2420_l4_core__mcbsp2, &omap2420_l4_core__msdi1, &omap2xxx_l4_core__rng, + &omap2xxx_l4_core__sham, + &omap2xxx_l4_core__aes, &omap2420_l4_core__hdq1w, &omap2420_l4_wkup__counter_32k, &omap2420_l3__gpmc, diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index d2d3840557c3..4ce999ee3ee9 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c @@ -963,6 +963,8 @@ static struct omap_hwmod_ocp_if *omap2430_hwmod_ocp_ifs[] __initdata = { &omap2430_l4_core__mcbsp5, &omap2430_l4_core__hdq1w, &omap2xxx_l4_core__rng, + &omap2xxx_l4_core__sham, + &omap2xxx_l4_core__aes, &omap2430_l4_wkup__counter_32k, &omap2430_l3__gpmc, NULL, diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c index 47901a5e76de..5fd40d4a989e 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c @@ -138,6 +138,24 @@ static struct omap_hwmod_addr_space omap2_rng_addr_space[] = { { } }; +static struct omap_hwmod_addr_space omap2xxx_sham_addrs[] = { + { + .pa_start = 0x480a4000, + .pa_end = 0x480a4000 + 0x64 - 1, + .flags = ADDR_TYPE_RT + }, + { } +}; + +static struct omap_hwmod_addr_space omap2xxx_aes_addrs[] = { + { + .pa_start = 0x480a6000, + .pa_end = 0x480a6000 + 0x50 - 1, + .flags = ADDR_TYPE_RT + }, + { } +}; + /* * Common interconnect data */ @@ -389,3 +407,21 @@ struct omap_hwmod_ocp_if omap2xxx_l4_core__rng = { .addr = omap2_rng_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; + +/* l4 core -> sham interface */ +struct omap_hwmod_ocp_if omap2xxx_l4_core__sham = { + .master = &omap2xxx_l4_core_hwmod, + .slave = &omap2xxx_sham_hwmod, + .clk = "sha_ick", + .addr = omap2xxx_sham_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l4 core -> aes interface */ +struct omap_hwmod_ocp_if omap2xxx_l4_core__aes = { + .master = &omap2xxx_l4_core_hwmod, + .slave = &omap2xxx_aes_hwmod, + .clk = "aes_ick", + .addr = omap2xxx_aes_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c index e596117004d4..c8c64b3e1acc 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c @@ -864,3 +864,84 @@ struct omap_hwmod omap2xxx_rng_hwmod = { .flags = HWMOD_INIT_NO_RESET, .class = &omap2_rng_hwmod_class, }; + +/* SHAM */ + +static struct omap_hwmod_class_sysconfig omap2_sham_sysc = { + .rev_offs = 0x5c, + .sysc_offs = 0x60, + .syss_offs = 0x64, + .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE | + SYSS_HAS_RESET_STATUS), + .sysc_fields = &omap_hwmod_sysc_type1, +}; + +static struct omap_hwmod_class omap2xxx_sham_class = { + .name = "sham", + .sysc = &omap2_sham_sysc, +}; + +static struct omap_hwmod_irq_info omap2_sham_mpu_irqs[] = { + { .irq = 51 + OMAP_INTC_START, }, + { .irq = -1 } +}; + +static struct omap_hwmod_dma_info omap2_sham_sdma_chs[] = { + { .name = "rx", .dma_req = 13 }, + { .dma_req = -1 } +}; + +struct omap_hwmod omap2xxx_sham_hwmod = { + .name = "sham", + .mpu_irqs = omap2_sham_mpu_irqs, + .sdma_reqs = omap2_sham_sdma_chs, + .main_clk = "l4_ck", + .prcm = { + .omap2 = { + .module_offs = CORE_MOD, + .prcm_reg_id = 4, + .module_bit = OMAP24XX_EN_SHA_SHIFT, + .idlest_reg_id = 4, + .idlest_idle_bit = OMAP24XX_ST_SHA_SHIFT, + }, + }, + .class = &omap2xxx_sham_class, +}; + +/* AES */ + +static struct omap_hwmod_class_sysconfig omap2_aes_sysc = { + .rev_offs = 0x44, + .sysc_offs = 0x48, + .syss_offs = 0x4c, + .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE | + SYSS_HAS_RESET_STATUS), + .sysc_fields = &omap_hwmod_sysc_type1, +}; + +static struct omap_hwmod_class omap2xxx_aes_class = { + .name = "aes", + .sysc = &omap2_aes_sysc, +}; + +static struct omap_hwmod_dma_info omap2_aes_sdma_chs[] = { + { .name = "tx", .dma_req = 9 }, + { .name = "rx", .dma_req = 10 }, + { .dma_req = -1 } +}; + +struct omap_hwmod omap2xxx_aes_hwmod = { + .name = "aes", + .sdma_reqs = omap2_aes_sdma_chs, + .main_clk = "l4_ck", + .prcm = { + .omap2 = { + .module_offs = CORE_MOD, + .prcm_reg_id = 4, + .module_bit = OMAP24XX_EN_AES_SHIFT, + .idlest_reg_id = 4, + .idlest_idle_bit = OMAP24XX_ST_AES_SHIFT, + }, + }, + .class = &omap2xxx_aes_class, +}; diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c index 26eee4a556ad..01d8f324450a 100644 --- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c @@ -28,6 +28,7 @@ #include "prm-regbits-33xx.h" #include "i2c.h" #include "mmc.h" +#include "wd_timer.h" /* * IP blocks @@ -417,8 +418,6 @@ static struct omap_hwmod am33xx_adc_tsc_hwmod = { * - clkdiv32k * - debugss * - ocp watch point - * - aes0 - * - sha0 */ #if 0 /* @@ -499,25 +498,41 @@ static struct omap_hwmod am33xx_ocpwp_hwmod = { }, }, }; +#endif /* - * 'aes' class + * 'aes0' class */ -static struct omap_hwmod_class am33xx_aes_hwmod_class = { - .name = "aes", +static struct omap_hwmod_class_sysconfig am33xx_aes0_sysc = { + .rev_offs = 0x80, + .sysc_offs = 0x84, + .syss_offs = 0x88, + .sysc_flags = SYSS_HAS_RESET_STATUS, +}; + +static struct omap_hwmod_class am33xx_aes0_hwmod_class = { + .name = "aes0", + .sysc = &am33xx_aes0_sysc, }; static struct omap_hwmod_irq_info am33xx_aes0_irqs[] = { - { .irq = 102 + OMAP_INTC_START, }, + { .irq = 103 + OMAP_INTC_START, }, { .irq = -1 }, }; +static struct omap_hwmod_dma_info am33xx_aes0_edma_reqs[] = { + { .name = "tx", .dma_req = 6, }, + { .name = "rx", .dma_req = 5, }, + { .dma_req = -1 } +}; + static struct omap_hwmod am33xx_aes0_hwmod = { - .name = "aes0", - .class = &am33xx_aes_hwmod_class, + .name = "aes", + .class = &am33xx_aes0_hwmod_class, .clkdm_name = "l3_clkdm", .mpu_irqs = am33xx_aes0_irqs, - .main_clk = "l3_gclk", + .sdma_reqs = am33xx_aes0_edma_reqs, + .main_clk = "aes0_fck", .prcm = { .omap4 = { .clkctrl_offs = AM33XX_CM_PER_AES0_CLKCTRL_OFFSET, @@ -526,21 +541,35 @@ static struct omap_hwmod am33xx_aes0_hwmod = { }, }; -/* sha0 */ +/* sha0 HIB2 (the 'P' (public) device) */ +static struct omap_hwmod_class_sysconfig am33xx_sha0_sysc = { + .rev_offs = 0x100, + .sysc_offs = 0x110, + .syss_offs = 0x114, + .sysc_flags = SYSS_HAS_RESET_STATUS, +}; + static struct omap_hwmod_class am33xx_sha0_hwmod_class = { .name = "sha0", + .sysc = &am33xx_sha0_sysc, }; static struct omap_hwmod_irq_info am33xx_sha0_irqs[] = { - { .irq = 108 + OMAP_INTC_START, }, + { .irq = 109 + OMAP_INTC_START, }, { .irq = -1 }, }; +static struct omap_hwmod_dma_info am33xx_sha0_edma_reqs[] = { + { .name = "rx", .dma_req = 36, }, + { .dma_req = -1 } +}; + static struct omap_hwmod am33xx_sha0_hwmod = { - .name = "sha0", + .name = "sham", .class = &am33xx_sha0_hwmod_class, .clkdm_name = "l3_clkdm", .mpu_irqs = am33xx_sha0_irqs, + .sdma_reqs = am33xx_sha0_edma_reqs, .main_clk = "l3_gclk", .prcm = { .omap4 = { @@ -550,8 +579,6 @@ static struct omap_hwmod am33xx_sha0_hwmod = { }, }; -#endif - /* ocmcram */ static struct omap_hwmod_class am33xx_ocmcram_hwmod_class = { .name = "ocmcram", @@ -2087,8 +2114,21 @@ static struct omap_hwmod am33xx_uart6_hwmod = { }; /* 'wd_timer' class */ +static struct omap_hwmod_class_sysconfig wdt_sysc = { + .rev_offs = 0x0, + .sysc_offs = 0x10, + .syss_offs = 0x14, + .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_SIDLEMODE | + SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS), + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | + SIDLE_SMART_WKUP), + .sysc_fields = &omap_hwmod_sysc_type1, +}; + static struct omap_hwmod_class am33xx_wd_timer_hwmod_class = { .name = "wd_timer", + .sysc = &wdt_sysc, + .pre_shutdown = &omap2_wd_timer_disable, }; /* @@ -2099,6 +2139,7 @@ static struct omap_hwmod am33xx_wd_timer1_hwmod = { .name = "wd_timer2", .class = &am33xx_wd_timer_hwmod_class, .clkdm_name = "l4_wkup_clkdm", + .flags = HWMOD_SWSUP_SIDLE, .main_clk = "wdt1_fck", .prcm = { .omap4 = { @@ -3434,6 +3475,42 @@ static struct omap_hwmod_ocp_if am33xx_l3_main__ocmc = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; +/* l3 main -> sha0 HIB2 */ +static struct omap_hwmod_addr_space am33xx_sha0_addrs[] = { + { + .pa_start = 0x53100000, + .pa_end = 0x53100000 + SZ_512 - 1, + .flags = ADDR_TYPE_RT + }, + { } +}; + +static struct omap_hwmod_ocp_if am33xx_l3_main__sha0 = { + .master = &am33xx_l3_main_hwmod, + .slave = &am33xx_sha0_hwmod, + .clk = "sha0_fck", + .addr = am33xx_sha0_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l3 main -> AES0 HIB2 */ +static struct omap_hwmod_addr_space am33xx_aes0_addrs[] = { + { + .pa_start = 0x53500000, + .pa_end = 0x53500000 + SZ_1M - 1, + .flags = ADDR_TYPE_RT + }, + { } +}; + +static struct omap_hwmod_ocp_if am33xx_l3_main__aes0 = { + .master = &am33xx_l3_main_hwmod, + .slave = &am33xx_aes0_hwmod, + .clk = "aes0_fck", + .addr = am33xx_aes0_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + static struct omap_hwmod_ocp_if *am33xx_hwmod_ocp_ifs[] __initdata = { &am33xx_l4_fw__emif_fw, &am33xx_l3_main__emif, @@ -3514,6 +3591,8 @@ static struct omap_hwmod_ocp_if *am33xx_hwmod_ocp_ifs[] __initdata = { &am33xx_l3_s__usbss, &am33xx_l4_hs__cpgmac0, &am33xx_cpgmac0__mdio, + &am33xx_l3_main__sha0, + &am33xx_l3_main__aes0, NULL, }; diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index ac7e03ec952f..4083606ea1da 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -1707,9 +1707,14 @@ static struct omap_hwmod omap3xxx_usbhsotg_hwmod = { * Erratum ID: i479 idle_req / idle_ack mechanism potentially * broken when autoidle is enabled * workaround is to disable the autoidle bit at module level. + * + * Enabling the device in any other MIDLEMODE setting but force-idle + * causes core_pwrdm not enter idle states at least on OMAP3630. + * Note that musb has OTG_FORCESTDBY register that controls MSTANDBY + * signal when MIDLEMODE is set to force-idle. */ .flags = HWMOD_NO_OCP_AUTOIDLE | HWMOD_SWSUP_SIDLE - | HWMOD_SWSUP_MSTANDBY, + | HWMOD_FORCE_MSTANDBY, }; /* usb_otg_hs */ @@ -3545,6 +3550,132 @@ static struct omap_hwmod_ocp_if omap3xxx_l3_main__gpmc = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; +/* l4_core -> SHAM2 (SHA1/MD5) (similar to omap24xx) */ +static struct omap_hwmod_sysc_fields omap3_sham_sysc_fields = { + .sidle_shift = 4, + .srst_shift = 1, + .autoidle_shift = 0, +}; + +static struct omap_hwmod_class_sysconfig omap3_sham_sysc = { + .rev_offs = 0x5c, + .sysc_offs = 0x60, + .syss_offs = 0x64, + .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET | + SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), + .sysc_fields = &omap3_sham_sysc_fields, +}; + +static struct omap_hwmod_class omap3xxx_sham_class = { + .name = "sham", + .sysc = &omap3_sham_sysc, +}; + +static struct omap_hwmod_irq_info omap3_sham_mpu_irqs[] = { + { .irq = 49 + OMAP_INTC_START, }, + { .irq = -1 } +}; + +static struct omap_hwmod_dma_info omap3_sham_sdma_reqs[] = { + { .name = "rx", .dma_req = OMAP34XX_DMA_SHA1MD5_RX, }, + { .dma_req = -1 } +}; + +static struct omap_hwmod omap3xxx_sham_hwmod = { + .name = "sham", + .mpu_irqs = omap3_sham_mpu_irqs, + .sdma_reqs = omap3_sham_sdma_reqs, + .main_clk = "sha12_ick", + .prcm = { + .omap2 = { + .module_offs = CORE_MOD, + .prcm_reg_id = 1, + .module_bit = OMAP3430_EN_SHA12_SHIFT, + .idlest_reg_id = 1, + .idlest_idle_bit = OMAP3430_ST_SHA12_SHIFT, + }, + }, + .class = &omap3xxx_sham_class, +}; + +static struct omap_hwmod_addr_space omap3xxx_sham_addrs[] = { + { + .pa_start = 0x480c3000, + .pa_end = 0x480c3000 + 0x64 - 1, + .flags = ADDR_TYPE_RT + }, + { } +}; + +static struct omap_hwmod_ocp_if omap3xxx_l4_core__sham = { + .master = &omap3xxx_l4_core_hwmod, + .slave = &omap3xxx_sham_hwmod, + .clk = "sha12_ick", + .addr = omap3xxx_sham_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l4_core -> AES */ +static struct omap_hwmod_sysc_fields omap3xxx_aes_sysc_fields = { + .sidle_shift = 6, + .srst_shift = 1, + .autoidle_shift = 0, +}; + +static struct omap_hwmod_class_sysconfig omap3_aes_sysc = { + .rev_offs = 0x44, + .sysc_offs = 0x48, + .syss_offs = 0x4c, + .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET | + SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), + .sysc_fields = &omap3xxx_aes_sysc_fields, +}; + +static struct omap_hwmod_class omap3xxx_aes_class = { + .name = "aes", + .sysc = &omap3_aes_sysc, +}; + +static struct omap_hwmod_dma_info omap3_aes_sdma_reqs[] = { + { .name = "tx", .dma_req = OMAP34XX_DMA_AES2_TX, }, + { .name = "rx", .dma_req = OMAP34XX_DMA_AES2_RX, }, + { .dma_req = -1 } +}; + +static struct omap_hwmod omap3xxx_aes_hwmod = { + .name = "aes", + .sdma_reqs = omap3_aes_sdma_reqs, + .main_clk = "aes2_ick", + .prcm = { + .omap2 = { + .module_offs = CORE_MOD, + .prcm_reg_id = 1, + .module_bit = OMAP3430_EN_AES2_SHIFT, + .idlest_reg_id = 1, + .idlest_idle_bit = OMAP3430_ST_AES2_SHIFT, + }, + }, + .class = &omap3xxx_aes_class, +}; + +static struct omap_hwmod_addr_space omap3xxx_aes_addrs[] = { + { + .pa_start = 0x480c5000, + .pa_end = 0x480c5000 + 0x50 - 1, + .flags = ADDR_TYPE_RT + }, + { } +}; + +static struct omap_hwmod_ocp_if omap3xxx_l4_core__aes = { + .master = &omap3xxx_l4_core_hwmod, + .slave = &omap3xxx_aes_hwmod, + .clk = "aes2_ick", + .addr = omap3xxx_aes_addrs, + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + static struct omap_hwmod_ocp_if *omap3xxx_hwmod_ocp_ifs[] __initdata = { &omap3xxx_l3_main__l4_core, &omap3xxx_l3_main__l4_per, @@ -3596,8 +3727,32 @@ static struct omap_hwmod_ocp_if *omap3xxx_hwmod_ocp_ifs[] __initdata = { }; /* GP-only hwmod links */ -static struct omap_hwmod_ocp_if *omap3xxx_gp_hwmod_ocp_ifs[] __initdata = { +static struct omap_hwmod_ocp_if *omap34xx_gp_hwmod_ocp_ifs[] __initdata = { &omap3xxx_l4_sec__timer12, + &omap3xxx_l4_core__sham, + &omap3xxx_l4_core__aes, + NULL +}; + +static struct omap_hwmod_ocp_if *omap36xx_gp_hwmod_ocp_ifs[] __initdata = { + &omap3xxx_l4_sec__timer12, + &omap3xxx_l4_core__sham, + &omap3xxx_l4_core__aes, + NULL +}; + +static struct omap_hwmod_ocp_if *am35xx_gp_hwmod_ocp_ifs[] __initdata = { + &omap3xxx_l4_sec__timer12, + /* + * Apparently the SHA/MD5 and AES accelerator IP blocks are + * only present on some AM35xx chips, and no one knows which + * ones. See + * http://www.spinics.net/lists/arm-kernel/msg215466.html So + * if you need these IP blocks on an AM35xx, try uncommenting + * the following lines. + */ + /* &omap3xxx_l4_core__sham, */ + /* &omap3xxx_l4_core__aes, */ NULL }; @@ -3704,7 +3859,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_hwmod_ocp_ifs[] __initdata = { int __init omap3xxx_hwmod_init(void) { int r; - struct omap_hwmod_ocp_if **h = NULL; + struct omap_hwmod_ocp_if **h = NULL, **h_gp = NULL; unsigned int rev; omap_hwmod_init(); @@ -3714,13 +3869,6 @@ int __init omap3xxx_hwmod_init(void) if (r < 0) return r; - /* Register GP-only hwmod links. */ - if (omap_type() == OMAP2_DEVICE_TYPE_GP) { - r = omap_hwmod_register_links(omap3xxx_gp_hwmod_ocp_ifs); - if (r < 0) - return r; - } - rev = omap_rev(); /* @@ -3732,11 +3880,14 @@ int __init omap3xxx_hwmod_init(void) rev == OMAP3430_REV_ES2_1 || rev == OMAP3430_REV_ES3_0 || rev == OMAP3430_REV_ES3_1 || rev == OMAP3430_REV_ES3_1_2) { h = omap34xx_hwmod_ocp_ifs; + h_gp = omap34xx_gp_hwmod_ocp_ifs; } else if (rev == AM35XX_REV_ES1_0 || rev == AM35XX_REV_ES1_1) { h = am35xx_hwmod_ocp_ifs; + h_gp = am35xx_gp_hwmod_ocp_ifs; } else if (rev == OMAP3630_REV_ES1_0 || rev == OMAP3630_REV_ES1_1 || rev == OMAP3630_REV_ES1_2) { h = omap36xx_hwmod_ocp_ifs; + h_gp = omap36xx_gp_hwmod_ocp_ifs; } else { WARN(1, "OMAP3 hwmod family init: unknown chip type\n"); return -EINVAL; @@ -3746,6 +3897,14 @@ int __init omap3xxx_hwmod_init(void) if (r < 0) return r; + /* Register GP-only hwmod links. */ + if (h_gp && omap_type() == OMAP2_DEVICE_TYPE_GP) { + r = omap_hwmod_register_links(h_gp); + if (r < 0) + return r; + } + + /* * Register hwmod links specific to certain ES levels of a * particular family of silicon (e.g., 34xx ES1.0) diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index 0e47d2e1687c..eaba9dc91a0d 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -2719,7 +2719,17 @@ static struct omap_hwmod omap44xx_ocp2scp_usb_phy_hwmod = { .name = "ocp2scp_usb_phy", .class = &omap44xx_ocp2scp_hwmod_class, .clkdm_name = "l3_init_clkdm", - .main_clk = "func_48m_fclk", + /* + * ocp2scp_usb_phy_phy_48m is provided by the OMAP4 PRCM IP + * block as an "optional clock," and normally should never be + * specified as the main_clk for an OMAP IP block. However it + * turns out that this clock is actually the main clock for + * the ocp2scp_usb_phy IP block: + * http://lists.infradead.org/pipermail/linux-arm-kernel/2012-September/119943.html + * So listing ocp2scp_usb_phy_phy_48m as a main_clk here seems + * to be the best workaround. + */ + .main_clk = "ocp2scp_usb_phy_phy_48m", .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_L3INIT_USBPHYOCP2SCP_CLKCTRL_OFFSET, diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.h b/arch/arm/mach-omap2/omap_hwmod_common_data.h index cfcce299177c..6e04ff7065e1 100644 --- a/arch/arm/mach-omap2/omap_hwmod_common_data.h +++ b/arch/arm/mach-omap2/omap_hwmod_common_data.h @@ -78,6 +78,8 @@ extern struct omap_hwmod omap2xxx_mcspi2_hwmod; extern struct omap_hwmod omap2xxx_counter_32k_hwmod; extern struct omap_hwmod omap2xxx_gpmc_hwmod; extern struct omap_hwmod omap2xxx_rng_hwmod; +extern struct omap_hwmod omap2xxx_sham_hwmod; +extern struct omap_hwmod omap2xxx_aes_hwmod; /* Common interface data across OMAP2xxx */ extern struct omap_hwmod_ocp_if omap2xxx_l3_main__l4_core; @@ -105,6 +107,8 @@ extern struct omap_hwmod_ocp_if omap2xxx_l4_core__dss_dispc; extern struct omap_hwmod_ocp_if omap2xxx_l4_core__dss_rfbi; extern struct omap_hwmod_ocp_if omap2xxx_l4_core__dss_venc; extern struct omap_hwmod_ocp_if omap2xxx_l4_core__rng; +extern struct omap_hwmod_ocp_if omap2xxx_l4_core__sham; +extern struct omap_hwmod_ocp_if omap2xxx_l4_core__aes; /* Common IP block data */ extern struct omap_hwmod_dma_info omap2_uart1_sdma_reqs[]; diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c index 1edd000a8143..0b339861d751 100644 --- a/arch/arm/mach-omap2/pm-debug.c +++ b/arch/arm/mach-omap2/pm-debug.c @@ -217,7 +217,7 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm, void *dir) return 0; d = debugfs_create_dir(pwrdm->name, (struct dentry *)dir); - if (!(IS_ERR_OR_NULL(d))) + if (d) (void) debugfs_create_file("suspend", S_IRUGO|S_IWUSR, d, (void *)pwrdm, &pwrdm_suspend_fops); @@ -261,8 +261,8 @@ static int __init pm_dbg_init(void) return 0; d = debugfs_create_dir("pm_debug", NULL); - if (IS_ERR_OR_NULL(d)) - return PTR_ERR(d); + if (!d) + return -EINVAL; (void) debugfs_create_file("count", S_IRUGO, d, (void *)DEBUG_FILE_COUNTERS, &debug_fops); diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c index 673a4c1d1d76..e742118fcfd2 100644 --- a/arch/arm/mach-omap2/pm.c +++ b/arch/arm/mach-omap2/pm.c @@ -218,7 +218,7 @@ static int omap_pm_enter(suspend_state_t suspend_state) static int omap_pm_begin(suspend_state_t state) { - disable_hlt(); + cpu_idle_poll_ctrl(true); if (cpu_is_omap34xx()) omap_prcm_irq_prepare(); return 0; @@ -226,8 +226,7 @@ static int omap_pm_begin(suspend_state_t state) static void omap_pm_end(void) { - enable_hlt(); - return; + cpu_idle_poll_ctrl(false); } static void omap_pm_finish(void) @@ -265,6 +264,12 @@ static void __init omap4_init_voltages(void) omap2_set_init_voltage("iva", "dpll_iva_m5x2_ck", "iva"); } +static inline void omap_init_cpufreq(void) +{ + struct platform_device_info devinfo = { .name = "omap-cpufreq", }; + platform_device_register_full(&devinfo); +} + static int __init omap2_common_pm_init(void) { if (!of_have_populated_dt()) @@ -294,6 +299,9 @@ int __init omap2_common_pm_late_init(void) /* Smartreflex device init */ omap_devinit_smartreflex(); + + /* cpufreq dummy device instantiation */ + omap_init_cpufreq(); } #ifdef CONFIG_SUSPEND diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c index 228deca8fb93..82f0698933d8 100644 --- a/arch/arm/mach-omap2/pm44xx.c +++ b/arch/arm/mach-omap2/pm44xx.c @@ -126,8 +126,8 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused) * omap_default_idle - OMAP4 default ilde routine.' * * Implements OMAP4 memory, IO ordering requirements which can't be addressed - * with default cpu_do_idle() hook. Used by all CPUs with !CONFIG_CPUIDLE and - * by secondary CPU with CONFIG_CPUIDLE. + * with default cpu_do_idle() hook. Used by all CPUs with !CONFIG_CPU_IDLE and + * by secondary CPU with CONFIG_CPU_IDLE. */ static void omap_default_idle(void) { diff --git a/arch/arm/mach-omap2/pmu.c b/arch/arm/mach-omap2/pmu.c index 9debf822687c..9ace8eae7ee8 100644 --- a/arch/arm/mach-omap2/pmu.c +++ b/arch/arm/mach-omap2/pmu.c @@ -11,6 +11,8 @@ * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. */ +#include <linux/of.h> + #include <asm/pmu.h> #include "soc.h" @@ -63,6 +65,15 @@ static int __init omap_init_pmu(void) unsigned oh_num; char **oh_names; + /* XXX Remove this check when the CTI driver is available */ + if (cpu_is_omap443x()) { + pr_info("ARM PMU: not yet supported on OMAP4430 due to missing CTI driver\n"); + return 0; + } + + if (of_have_populated_dt()) + return 0; + /* * To create an ARM-PMU device the following HWMODs * are required for the various OMAP2+ devices. @@ -75,9 +86,6 @@ static int __init omap_init_pmu(void) if (cpu_is_omap443x()) { oh_num = ARRAY_SIZE(omap4430_pmu_oh_names); oh_names = omap4430_pmu_oh_names; - /* XXX Remove the next two lines when CTI driver available */ - pr_info("ARM PMU: not yet supported on OMAP4430 due to missing CTI driver\n"); - return 0; } else if (cpu_is_omap34xx() || cpu_is_omap44xx()) { oh_num = ARRAY_SIZE(omap3_pmu_oh_names); oh_names = omap3_pmu_oh_names; diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c index 8e61d80bf6b3..86babd740d41 100644 --- a/arch/arm/mach-omap2/powerdomain.c +++ b/arch/arm/mach-omap2/powerdomain.c @@ -52,7 +52,6 @@ enum { #define ALREADYACTIVE_SWITCH 0 #define FORCEWAKEUP_SWITCH 1 #define LOWPOWERSTATE_SWITCH 2 -#define ERROR_SWITCH 3 /* pwrdm_list contains all registered struct powerdomains */ static LIST_HEAD(pwrdm_list); @@ -233,10 +232,7 @@ static u8 _pwrdm_save_clkdm_state_and_activate(struct powerdomain *pwrdm, { u8 sleep_switch; - if (curr_pwrst < 0) { - WARN_ON(1); - sleep_switch = ERROR_SWITCH; - } else if (curr_pwrst < PWRDM_POWER_ON) { + if (curr_pwrst < PWRDM_POWER_ON) { if (curr_pwrst > pwrst && pwrdm->flags & PWRDM_HAS_LOWPOWERSTATECHANGE && arch_pwrdm->pwrdm_set_lowpwrstchange) { @@ -1091,7 +1087,8 @@ int pwrdm_post_transition(struct powerdomain *pwrdm) */ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u8 pwrst) { - u8 curr_pwrst, next_pwrst, sleep_switch; + u8 next_pwrst, sleep_switch; + int curr_pwrst; int ret = 0; bool hwsup = false; @@ -1107,16 +1104,17 @@ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u8 pwrst) pwrdm_lock(pwrdm); curr_pwrst = pwrdm_read_pwrst(pwrdm); + if (curr_pwrst < 0) { + ret = -EINVAL; + goto osps_out; + } + next_pwrst = pwrdm_read_next_pwrst(pwrdm); if (curr_pwrst == pwrst && next_pwrst == pwrst) goto osps_out; sleep_switch = _pwrdm_save_clkdm_state_and_activate(pwrdm, curr_pwrst, pwrst, &hwsup); - if (sleep_switch == ERROR_SWITCH) { - ret = -EINVAL; - goto osps_out; - } ret = pwrdm_set_next_pwrst(pwrdm, pwrst); if (ret) @@ -1182,7 +1180,7 @@ bool pwrdm_can_ever_lose_context(struct powerdomain *pwrdm) { int i; - if (IS_ERR_OR_NULL(pwrdm)) { + if (!pwrdm) { pr_debug("powerdomain: %s: invalid powerdomain pointer\n", __func__); return 1; diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c index d35f98aabf7a..415c7e0c9393 100644 --- a/arch/arm/mach-omap2/prm44xx.c +++ b/arch/arm/mach-omap2/prm44xx.c @@ -81,13 +81,13 @@ static struct prm_reset_src_map omap44xx_prm_reset_src_map[] = { /* Read a register in a CM/PRM instance in the PRM module */ u32 omap4_prm_read_inst_reg(s16 inst, u16 reg) { - return __raw_readl(OMAP44XX_PRM_REGADDR(inst, reg)); + return __raw_readl(prm_base + inst + reg); } /* Write into a register in a CM/PRM instance in the PRM module */ void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 reg) { - __raw_writel(val, OMAP44XX_PRM_REGADDR(inst, reg)); + __raw_writel(val, prm_base + inst + reg); } /* Read-modify-write a register in a PRM module. Caller must lock */ @@ -650,7 +650,7 @@ static struct prm_ll_data omap44xx_prm_ll_data = { int __init omap44xx_prm_init(void) { - if (!cpu_is_omap44xx()) + if (!cpu_is_omap44xx() && !soc_is_omap54xx()) return 0; return prm_register(&omap44xx_prm_ll_data); diff --git a/arch/arm/mach-omap2/soc.h b/arch/arm/mach-omap2/soc.h index c62116bbc760..197cc16870d9 100644 --- a/arch/arm/mach-omap2/soc.h +++ b/arch/arm/mach-omap2/soc.h @@ -396,6 +396,7 @@ IS_OMAP_TYPE(3430, 0x3430) #define AM335X_CLASS 0x33500033 #define AM335X_REV_ES1_0 AM335X_CLASS #define AM335X_REV_ES2_0 (AM335X_CLASS | (0x1 << 8)) +#define AM335X_REV_ES2_1 (AM335X_CLASS | (0x2 << 8)) #define OMAP443X_CLASS 0x44300044 #define OMAP4430_REV_ES1_0 (OMAP443X_CLASS | (0x10 << 8)) @@ -413,7 +414,9 @@ IS_OMAP_TYPE(3430, 0x3430) #define OMAP54XX_CLASS 0x54000054 #define OMAP5430_REV_ES1_0 (OMAP54XX_CLASS | (0x30 << 16) | (0x10 << 8)) +#define OMAP5430_REV_ES2_0 (OMAP54XX_CLASS | (0x30 << 16) | (0x20 << 8)) #define OMAP5432_REV_ES1_0 (OMAP54XX_CLASS | (0x32 << 16) | (0x10 << 8)) +#define OMAP5432_REV_ES2_0 (OMAP54XX_CLASS | (0x32 << 16) | (0x20 << 8)) void omap2xxx_check_revision(void); void omap3xxx_check_revision(void); @@ -494,6 +497,7 @@ level(__##fn); #define omap_subsys_initcall(fn) omap_initcall(subsys_initcall, fn) #define omap_device_initcall(fn) omap_initcall(device_initcall, fn) #define omap_late_initcall(fn) omap_initcall(late_initcall, fn) +#define omap_late_initcall_sync(fn) omap_initcall(late_initcall_sync, fn) #endif /* __ASSEMBLY__ */ diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index 2bdd4cf17a8f..f8b23b8040d9 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -46,7 +46,6 @@ #include <asm/smp_twd.h> #include <asm/sched_clock.h> -#include <asm/arch_timer.h> #include "omap_hwmod.h" #include "omap_device.h" #include <plat/counter-32k.h> @@ -57,15 +56,6 @@ #include "common.h" #include "powerdomain.h" -/* Parent clocks, eventually these will come from the clock framework */ - -#define OMAP2_MPU_SOURCE "sys_ck" -#define OMAP3_MPU_SOURCE OMAP2_MPU_SOURCE -#define OMAP4_MPU_SOURCE "sys_clkin_ck" -#define OMAP2_32K_SOURCE "func_32k_ck" -#define OMAP3_32K_SOURCE "omap_32k_fck" -#define OMAP4_32K_SOURCE "sys_32k_ck" - #define REALTIME_COUNTER_BASE 0x48243200 #define INCREMENTER_NUMERATOR_OFFSET 0x10 #define INCREMENTER_DENUMERATOR_RELOAD_OFFSET 0x14 @@ -129,7 +119,6 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode mode, } static struct clock_event_device clockevent_gpt = { - .name = "gp_timer", .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, .rating = 300, .set_next_event = omap2_gp_timer_set_next_event, @@ -143,7 +132,12 @@ static struct property device_disabled = { }; static struct of_device_id omap_timer_match[] __initdata = { - { .compatible = "ti,omap2-timer", }, + { .compatible = "ti,omap2420-timer", }, + { .compatible = "ti,omap3430-timer", }, + { .compatible = "ti,omap4430-timer", }, + { .compatible = "ti,omap5430-timer", }, + { .compatible = "ti,am335x-timer", }, + { .compatible = "ti,am335x-timer-1ms", }, { } }; @@ -170,6 +164,12 @@ static struct device_node * __init omap_get_timer_dt(struct of_device_id *match, if (property && !of_get_property(np, property, NULL)) continue; + if (!property && (of_get_property(np, "ti,timer-alwon", NULL) || + of_get_property(np, "ti,timer-dsp", NULL) || + of_get_property(np, "ti,timer-pwm", NULL) || + of_get_property(np, "ti,timer-secure", NULL))) + continue; + of_add_property(np, &device_disabled); return np; } @@ -214,16 +214,17 @@ static u32 __init omap_dm_timer_get_errata(void) } static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer, - int gptimer_id, - const char *fck_source, - const char *property, - int posted) + const char *fck_source, + const char *property, + const char **timer_name, + int posted) { char name[10]; /* 10 = sizeof("gptXX_Xck0") */ const char *oh_name; struct device_node *np; struct omap_hwmod *oh; struct resource irq, mem; + struct clk *src; int r = 0; if (of_have_populated_dt()) { @@ -243,10 +244,10 @@ static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer, of_node_put(np); } else { - if (omap_dm_timer_reserve_systimer(gptimer_id)) + if (omap_dm_timer_reserve_systimer(timer->id)) return -ENODEV; - sprintf(name, "timer%d", gptimer_id); + sprintf(name, "timer%d", timer->id); oh_name = name; } @@ -254,6 +255,8 @@ static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer, if (!oh) return -ENODEV; + *timer_name = oh->name; + if (!of_have_populated_dt()) { r = omap_hwmod_get_resource_byname(oh, IORESOURCE_IRQ, NULL, &irq); @@ -276,24 +279,24 @@ static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer, /* After the dmtimer is using hwmod these clocks won't be needed */ timer->fclk = clk_get(NULL, omap_hwmod_get_main_clk(oh)); if (IS_ERR(timer->fclk)) - return -ENODEV; + return PTR_ERR(timer->fclk); - /* FIXME: Need to remove hard-coded test on timer ID */ - if (gptimer_id != 12) { - struct clk *src; - - src = clk_get(NULL, fck_source); - if (IS_ERR(src)) { - r = -EINVAL; - } else { - r = clk_set_parent(timer->fclk, src); - if (IS_ERR_VALUE(r)) - pr_warn("%s: %s cannot set source\n", - __func__, oh->name); + src = clk_get(NULL, fck_source); + if (IS_ERR(src)) + return PTR_ERR(src); + + if (clk_get_parent(timer->fclk) != src) { + r = clk_set_parent(timer->fclk, src); + if (r < 0) { + pr_warn("%s: %s cannot set source\n", __func__, + oh->name); clk_put(src); + return r; } } + clk_put(src); + omap_hwmod_setup_one(oh_name); omap_hwmod_enable(oh); __omap_dm_timer_init_regs(timer); @@ -317,6 +320,7 @@ static void __init omap2_gp_clockevent_init(int gptimer_id, { int res; + clkev.id = gptimer_id; clkev.errata = omap_dm_timer_get_errata(); /* @@ -326,8 +330,8 @@ static void __init omap2_gp_clockevent_init(int gptimer_id, */ __omap_dm_timer_override_errata(&clkev, OMAP_TIMER_ERRATA_I103_I767); - res = omap_dm_timer_init_one(&clkev, gptimer_id, fck_source, property, - OMAP_TIMER_POSTED); + res = omap_dm_timer_init_one(&clkev, fck_source, property, + &clockevent_gpt.name, OMAP_TIMER_POSTED); BUG_ON(res); omap2_gp_timer_irq.dev_id = &clkev; @@ -341,8 +345,8 @@ static void __init omap2_gp_clockevent_init(int gptimer_id, 3, /* Timer internal resynch latency */ 0xffffffff); - pr_info("OMAP clockevent source: GPTIMER%d at %lu Hz\n", - gptimer_id, clkev.rate); + pr_info("OMAP clockevent source: %s at %lu Hz\n", clockevent_gpt.name, + clkev.rate); } /* Clocksource code */ @@ -359,7 +363,6 @@ static cycle_t clocksource_read_cycles(struct clocksource *cs) } static struct clocksource clocksource_gpt = { - .name = "gp_timer", .rating = 300, .read = clocksource_read_cycles, .mask = CLOCKSOURCE_MASK(32), @@ -442,13 +445,16 @@ static int __init __maybe_unused omap2_sync32k_clocksource_init(void) } static void __init omap2_gptimer_clocksource_init(int gptimer_id, - const char *fck_source) + const char *fck_source, + const char *property) { int res; + clksrc.id = gptimer_id; clksrc.errata = omap_dm_timer_get_errata(); - res = omap_dm_timer_init_one(&clksrc, gptimer_id, fck_source, NULL, + res = omap_dm_timer_init_one(&clksrc, fck_source, property, + &clocksource_gpt.name, OMAP_TIMER_NONPOSTED); BUG_ON(res); @@ -461,8 +467,8 @@ static void __init omap2_gptimer_clocksource_init(int gptimer_id, pr_err("Could not register clocksource %s\n", clocksource_gpt.name); else - pr_info("OMAP clocksource: GPTIMER%d at %lu Hz\n", - gptimer_id, clksrc.rate); + pr_info("OMAP clocksource: %s at %lu Hz\n", + clocksource_gpt.name, clksrc.rate); } #ifdef CONFIG_SOC_HAS_REALTIME_COUNTER @@ -487,7 +493,7 @@ static void __init realtime_counter_init(void) pr_err("%s: ioremap failed\n", __func__); return; } - sys_clk = clk_get(NULL, "sys_clkin_ck"); + sys_clk = clk_get(NULL, "sys_clkin"); if (IS_ERR(sys_clk)) { pr_err("%s: failed to get system clock handle\n", __func__); iounmap(base); @@ -544,49 +550,56 @@ static inline void __init realtime_counter_init(void) #endif #define OMAP_SYS_GP_TIMER_INIT(name, clkev_nr, clkev_src, clkev_prop, \ - clksrc_nr, clksrc_src) \ + clksrc_nr, clksrc_src, clksrc_prop) \ void __init omap##name##_gptimer_timer_init(void) \ { \ + if (omap_clk_init) \ + omap_clk_init(); \ omap_dmtimer_init(); \ omap2_gp_clockevent_init((clkev_nr), clkev_src, clkev_prop); \ - omap2_gptimer_clocksource_init((clksrc_nr), clksrc_src); \ + omap2_gptimer_clocksource_init((clksrc_nr), clksrc_src, \ + clksrc_prop); \ } #define OMAP_SYS_32K_TIMER_INIT(name, clkev_nr, clkev_src, clkev_prop, \ - clksrc_nr, clksrc_src) \ + clksrc_nr, clksrc_src, clksrc_prop) \ void __init omap##name##_sync32k_timer_init(void) \ { \ + if (omap_clk_init) \ + omap_clk_init(); \ omap_dmtimer_init(); \ omap2_gp_clockevent_init((clkev_nr), clkev_src, clkev_prop); \ /* Enable the use of clocksource="gp_timer" kernel parameter */ \ if (use_gptimer_clksrc) \ - omap2_gptimer_clocksource_init((clksrc_nr), clksrc_src);\ + omap2_gptimer_clocksource_init((clksrc_nr), clksrc_src, \ + clksrc_prop); \ else \ omap2_sync32k_clocksource_init(); \ } #ifdef CONFIG_ARCH_OMAP2 -OMAP_SYS_32K_TIMER_INIT(2, 1, OMAP2_32K_SOURCE, "ti,timer-alwon", - 2, OMAP2_MPU_SOURCE); +OMAP_SYS_32K_TIMER_INIT(2, 1, "timer_32k_ck", "ti,timer-alwon", + 2, "timer_sys_ck", NULL); #endif /* CONFIG_ARCH_OMAP2 */ #ifdef CONFIG_ARCH_OMAP3 -OMAP_SYS_32K_TIMER_INIT(3, 1, OMAP3_32K_SOURCE, "ti,timer-alwon", - 2, OMAP3_MPU_SOURCE); -OMAP_SYS_32K_TIMER_INIT(3_secure, 12, OMAP3_32K_SOURCE, "ti,timer-secure", - 2, OMAP3_MPU_SOURCE); -OMAP_SYS_GP_TIMER_INIT(3_gp, 1, OMAP3_MPU_SOURCE, "ti,timer-alwon", - 2, OMAP3_MPU_SOURCE); +OMAP_SYS_32K_TIMER_INIT(3, 1, "timer_32k_ck", "ti,timer-alwon", + 2, "timer_sys_ck", NULL); +OMAP_SYS_32K_TIMER_INIT(3_secure, 12, "secure_32k_fck", "ti,timer-secure", + 2, "timer_sys_ck", NULL); #endif /* CONFIG_ARCH_OMAP3 */ -#ifdef CONFIG_SOC_AM33XX -OMAP_SYS_GP_TIMER_INIT(3_am33xx, 1, OMAP4_MPU_SOURCE, "ti,timer-alwon", - 2, OMAP4_MPU_SOURCE); -#endif /* CONFIG_SOC_AM33XX */ +#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_SOC_AM33XX) +OMAP_SYS_GP_TIMER_INIT(3, 2, "timer_sys_ck", NULL, + 1, "timer_sys_ck", "ti,timer-alwon"); +#endif + +#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) +static OMAP_SYS_32K_TIMER_INIT(4, 1, "timer_32k_ck", "ti,timer-alwon", + 2, "sys_clkin_ck", NULL); +#endif #ifdef CONFIG_ARCH_OMAP4 -OMAP_SYS_32K_TIMER_INIT(4, 1, OMAP4_32K_SOURCE, "ti,timer-alwon", - 2, OMAP4_MPU_SOURCE); #ifdef CONFIG_LOCAL_TIMERS static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, OMAP44XX_LOCAL_TWD_BASE, 29); void __init omap4_local_timer_init(void) @@ -597,7 +610,7 @@ void __init omap4_local_timer_init(void) int err; if (of_have_populated_dt()) { - twd_local_timer_of_register(); + clocksource_of_init(); return; } @@ -615,18 +628,12 @@ void __init omap4_local_timer_init(void) #endif /* CONFIG_ARCH_OMAP4 */ #ifdef CONFIG_SOC_OMAP5 -OMAP_SYS_32K_TIMER_INIT(5, 1, OMAP4_32K_SOURCE, "ti,timer-alwon", - 2, OMAP4_MPU_SOURCE); void __init omap5_realtime_timer_init(void) { - int err; - - omap5_sync32k_timer_init(); + omap4_sync32k_timer_init(); realtime_counter_init(); - err = arch_timer_of_register(); - if (err) - pr_err("%s: arch_timer_register failed %d\n", __func__, err); + clocksource_of_init(); } #endif /* CONFIG_SOC_OMAP5 */ diff --git a/arch/arm/mach-omap2/usb-host.c b/arch/arm/mach-omap2/usb-host.c index 5706bdccf45e..aa27d7f5cbb7 100644 --- a/arch/arm/mach-omap2/usb-host.c +++ b/arch/arm/mach-omap2/usb-host.c @@ -22,8 +22,12 @@ #include <linux/platform_device.h> #include <linux/slab.h> #include <linux/dma-mapping.h> - -#include <asm/io.h> +#include <linux/regulator/machine.h> +#include <linux/regulator/fixed.h> +#include <linux/string.h> +#include <linux/io.h> +#include <linux/gpio.h> +#include <linux/usb/phy.h> #include "soc.h" #include "omap_device.h" @@ -526,3 +530,155 @@ void __init usbhs_init(struct usbhs_omap_platform_data *pdata) } #endif + +/* Template for PHY regulators */ +static struct fixed_voltage_config hsusb_reg_config = { + /* .supply_name filled later */ + .microvolts = 3300000, + .gpio = -1, /* updated later */ + .startup_delay = 70000, /* 70msec */ + .enable_high = 1, /* updated later */ + .enabled_at_boot = 0, /* keep in RESET */ + /* .init_data filled later */ +}; + +static const char *nop_name = "nop_usb_xceiv"; /* NOP PHY driver */ +static const char *reg_name = "reg-fixed-voltage"; /* Regulator driver */ + +/** + * usbhs_add_regulator - Add a gpio based fixed voltage regulator device + * @name: name for the regulator + * @dev_id: device id of the device this regulator supplies power to + * @dev_supply: supply name that the device expects + * @gpio: GPIO number + * @polarity: 1 - Active high, 0 - Active low + */ +static int usbhs_add_regulator(char *name, char *dev_id, char *dev_supply, + int gpio, int polarity) +{ + struct regulator_consumer_supply *supplies; + struct regulator_init_data *reg_data; + struct fixed_voltage_config *config; + struct platform_device *pdev; + int ret; + + supplies = kzalloc(sizeof(*supplies), GFP_KERNEL); + if (!supplies) + return -ENOMEM; + + supplies->supply = dev_supply; + supplies->dev_name = dev_id; + + reg_data = kzalloc(sizeof(*reg_data), GFP_KERNEL); + if (!reg_data) + return -ENOMEM; + + reg_data->constraints.valid_ops_mask = REGULATOR_CHANGE_STATUS; + reg_data->consumer_supplies = supplies; + reg_data->num_consumer_supplies = 1; + + config = kmemdup(&hsusb_reg_config, sizeof(hsusb_reg_config), + GFP_KERNEL); + if (!config) + return -ENOMEM; + + config->supply_name = name; + config->gpio = gpio; + config->enable_high = polarity; + config->init_data = reg_data; + + /* create a regulator device */ + pdev = kzalloc(sizeof(*pdev), GFP_KERNEL); + if (!pdev) + return -ENOMEM; + + pdev->id = PLATFORM_DEVID_AUTO; + pdev->name = reg_name; + pdev->dev.platform_data = config; + + ret = platform_device_register(pdev); + if (ret) + pr_err("%s: Failed registering regulator %s for %s\n", + __func__, name, dev_id); + + return ret; +} + +int usbhs_init_phys(struct usbhs_phy_data *phy, int num_phys) +{ + char *rail_name; + int i, len; + struct platform_device *pdev; + char *phy_id; + + /* the phy_id will be something like "nop_usb_xceiv.1" */ + len = strlen(nop_name) + 3; /* 3 -> ".1" and NULL terminator */ + + for (i = 0; i < num_phys; i++) { + + if (!phy->port) { + pr_err("%s: Invalid port 0. Must start from 1\n", + __func__); + continue; + } + + /* do we need a NOP PHY device ? */ + if (!gpio_is_valid(phy->reset_gpio) && + !gpio_is_valid(phy->vcc_gpio)) + continue; + + /* create a NOP PHY device */ + pdev = kzalloc(sizeof(*pdev), GFP_KERNEL); + if (!pdev) + return -ENOMEM; + + pdev->id = phy->port; + pdev->name = nop_name; + pdev->dev.platform_data = phy->platform_data; + + phy_id = kmalloc(len, GFP_KERNEL); + if (!phy_id) + return -ENOMEM; + + scnprintf(phy_id, len, "nop_usb_xceiv.%d\n", + pdev->id); + + if (platform_device_register(pdev)) { + pr_err("%s: Failed to register device %s\n", + __func__, phy_id); + continue; + } + + usb_bind_phy("ehci-omap.0", phy->port - 1, phy_id); + + /* Do we need RESET regulator ? */ + if (gpio_is_valid(phy->reset_gpio)) { + + rail_name = kmalloc(13, GFP_KERNEL); + if (!rail_name) + return -ENOMEM; + + scnprintf(rail_name, 13, "hsusb%d_reset", phy->port); + + usbhs_add_regulator(rail_name, phy_id, "reset", + phy->reset_gpio, 1); + } + + /* Do we need VCC regulator ? */ + if (gpio_is_valid(phy->vcc_gpio)) { + + rail_name = kmalloc(13, GFP_KERNEL); + if (!rail_name) + return -ENOMEM; + + scnprintf(rail_name, 13, "hsusb%d_vcc", phy->port); + + usbhs_add_regulator(rail_name, phy_id, "vcc", + phy->vcc_gpio, phy->vcc_polarity); + } + + phy++; + } + + return 0; +} diff --git a/arch/arm/mach-omap2/usb-tusb6010.c b/arch/arm/mach-omap2/usb-tusb6010.c index c5a3c6f9504e..e832bc7b8e2d 100644 --- a/arch/arm/mach-omap2/usb-tusb6010.c +++ b/arch/arm/mach-omap2/usb-tusb6010.c @@ -8,6 +8,7 @@ * published by the Free Software Foundation. */ +#include <linux/err.h> #include <linux/string.h> #include <linux/types.h> #include <linux/errno.h> @@ -26,6 +27,24 @@ static u8 async_cs, sync_cs; static unsigned refclk_psec; +static struct gpmc_settings tusb_async = { + .wait_on_read = true, + .wait_on_write = true, + .device_width = GPMC_DEVWIDTH_16BIT, + .mux_add_data = GPMC_MUX_AD, +}; + +static struct gpmc_settings tusb_sync = { + .burst_read = true, + .burst_write = true, + .sync_read = true, + .sync_write = true, + .wait_on_read = true, + .wait_on_write = true, + .burst_len = GPMC_BURST_16, + .device_width = GPMC_DEVWIDTH_16BIT, + .mux_add_data = GPMC_MUX_AD, +}; /* NOTE: timings are from tusb 6010 datasheet Rev 1.8, 12-Sept 2006 */ @@ -37,8 +56,6 @@ static int tusb_set_async_mode(unsigned sysclk_ps) memset(&dev_t, 0, sizeof(dev_t)); - dev_t.mux = true; - dev_t.t_ceasu = 8 * 1000; dev_t.t_avdasu = t_acsnh_advnh - 7000; dev_t.t_ce_avd = 1000; @@ -52,7 +69,7 @@ static int tusb_set_async_mode(unsigned sysclk_ps) dev_t.t_wpl = 300; dev_t.cyc_aavdh_we = 1; - gpmc_calc_timings(&t, &dev_t); + gpmc_calc_timings(&t, &tusb_async, &dev_t); return gpmc_cs_set_timings(async_cs, &t); } @@ -65,10 +82,6 @@ static int tusb_set_sync_mode(unsigned sysclk_ps) memset(&dev_t, 0, sizeof(dev_t)); - dev_t.mux = true; - dev_t.sync_read = true; - dev_t.sync_write = true; - dev_t.clk = 11100; dev_t.t_bacc = 1000; dev_t.t_ces = 1000; @@ -84,7 +97,7 @@ static int tusb_set_sync_mode(unsigned sysclk_ps) dev_t.cyc_wpl = 6; dev_t.t_ce_rdyz = 7000; - gpmc_calc_timings(&t, &dev_t); + gpmc_calc_timings(&t, &tusb_sync, &dev_t); return gpmc_cs_set_timings(sync_cs, &t); } @@ -165,18 +178,12 @@ tusb6010_setup_interface(struct musb_hdrc_platform_data *data, return status; } tusb_resources[0].end = tusb_resources[0].start + 0x9ff; + tusb_async.wait_pin = waitpin; async_cs = async; - gpmc_cs_write_reg(async, GPMC_CS_CONFIG1, - GPMC_CONFIG1_PAGE_LEN(2) - | GPMC_CONFIG1_WAIT_READ_MON - | GPMC_CONFIG1_WAIT_WRITE_MON - | GPMC_CONFIG1_WAIT_PIN_SEL(waitpin) - | GPMC_CONFIG1_READTYPE_ASYNC - | GPMC_CONFIG1_WRITETYPE_ASYNC - | GPMC_CONFIG1_DEVICESIZE_16 - | GPMC_CONFIG1_DEVICETYPE_NOR - | GPMC_CONFIG1_MUXADDDATA); + status = gpmc_cs_program_settings(async_cs, &tusb_async); + if (status < 0) + return status; /* SYNC region, primarily for DMA */ status = gpmc_cs_request(sync, SZ_16M, (unsigned long *) @@ -186,21 +193,12 @@ tusb6010_setup_interface(struct musb_hdrc_platform_data *data, return status; } tusb_resources[1].end = tusb_resources[1].start + 0x9ff; + tusb_sync.wait_pin = waitpin; sync_cs = sync; - gpmc_cs_write_reg(sync, GPMC_CS_CONFIG1, - GPMC_CONFIG1_READMULTIPLE_SUPP - | GPMC_CONFIG1_READTYPE_SYNC - | GPMC_CONFIG1_WRITEMULTIPLE_SUPP - | GPMC_CONFIG1_WRITETYPE_SYNC - | GPMC_CONFIG1_PAGE_LEN(2) - | GPMC_CONFIG1_WAIT_READ_MON - | GPMC_CONFIG1_WAIT_WRITE_MON - | GPMC_CONFIG1_WAIT_PIN_SEL(waitpin) - | GPMC_CONFIG1_DEVICESIZE_16 - | GPMC_CONFIG1_DEVICETYPE_NOR - | GPMC_CONFIG1_MUXADDDATA - /* fclk divider gets set later */ - ); + + status = gpmc_cs_program_settings(sync_cs, &tusb_sync); + if (status < 0) + return status; /* IRQ */ status = gpio_request_one(irq, GPIOF_IN, "TUSB6010 irq"); diff --git a/arch/arm/mach-omap2/usb.h b/arch/arm/mach-omap2/usb.h index 3319f5cf47a3..e7261ebcf7b0 100644 --- a/arch/arm/mach-omap2/usb.h +++ b/arch/arm/mach-omap2/usb.h @@ -53,8 +53,17 @@ #define USBPHY_OTGSESSEND_EN (1 << 20) #define USBPHY_DATA_POLARITY (1 << 23) +struct usbhs_phy_data { + int port; /* 1 indexed port number */ + int reset_gpio; + int vcc_gpio; + bool vcc_polarity; /* 1 active high, 0 active low */ + void *platform_data; +}; + extern void usb_musb_init(struct omap_musb_board_data *board_data); extern void usbhs_init(struct usbhs_omap_platform_data *pdata); +extern int usbhs_init_phys(struct usbhs_phy_data *phy, int num_phys); extern void am35x_musb_reset(void); extern void am35x_musb_phy_power(u8 on); |