diff options
Diffstat (limited to 'arch/arm/mach-mxs/mach-mxs.c')
| -rw-r--r-- | arch/arm/mach-mxs/mach-mxs.c | 332 |
1 files changed, 157 insertions, 175 deletions
diff --git a/arch/arm/mach-mxs/mach-mxs.c b/arch/arm/mach-mxs/mach-mxs.c index c66129b5dd18..5b62b6489d4b 100644 --- a/arch/arm/mach-mxs/mach-mxs.c +++ b/arch/arm/mach-mxs/mach-mxs.c @@ -11,115 +11,54 @@ */ #include <linux/clk.h> +#include <linux/clk/mxs.h> #include <linux/clkdev.h> +#include <linux/clocksource.h> #include <linux/can/platform/flexcan.h> #include <linux/delay.h> #include <linux/err.h> #include <linux/gpio.h> #include <linux/init.h> +#include <linux/irqchip.h> +#include <linux/irqchip/mxs.h> #include <linux/micrel_phy.h> -#include <linux/mxsfb.h> +#include <linux/of_address.h> #include <linux/of_platform.h> #include <linux/phy.h> #include <linux/pinctrl/consumer.h> #include <asm/mach/arch.h> +#include <asm/mach/map.h> #include <asm/mach/time.h> -#include <mach/common.h> -#include <mach/digctl.h> -#include <mach/mxs.h> - -static struct fb_videomode mx23evk_video_modes[] = { - { - .name = "Samsung-LMS430HF02", - .refresh = 60, - .xres = 480, - .yres = 272, - .pixclock = 108096, /* picosecond (9.2 MHz) */ - .left_margin = 15, - .right_margin = 8, - .upper_margin = 12, - .lower_margin = 4, - .hsync_len = 1, - .vsync_len = 1, - .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT | - FB_SYNC_DOTCLK_FAILING_ACT, - }, -}; +#include <asm/system_misc.h> -static struct fb_videomode mx28evk_video_modes[] = { - { - .name = "Seiko-43WVF1G", - .refresh = 60, - .xres = 800, - .yres = 480, - .pixclock = 29851, /* picosecond (33.5 MHz) */ - .left_margin = 89, - .right_margin = 164, - .upper_margin = 23, - .lower_margin = 10, - .hsync_len = 10, - .vsync_len = 10, - .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT | - FB_SYNC_DOTCLK_FAILING_ACT, - }, -}; +#include "pm.h" -static struct fb_videomode m28evk_video_modes[] = { - { - .name = "Ampire AM-800480R2TMQW-T01H", - .refresh = 60, - .xres = 800, - .yres = 480, - .pixclock = 30066, /* picosecond (33.26 MHz) */ - .left_margin = 0, - .right_margin = 256, - .upper_margin = 0, - .lower_margin = 45, - .hsync_len = 1, - .vsync_len = 1, - .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT, - }, -}; +/* MXS DIGCTL SAIF CLKMUX */ +#define MXS_DIGCTL_SAIF_CLKMUX_DIRECT 0x0 +#define MXS_DIGCTL_SAIF_CLKMUX_CROSSINPUT 0x1 +#define MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR0 0x2 +#define MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR1 0x3 -static struct fb_videomode apx4devkit_video_modes[] = { - { - .name = "HannStar PJ70112A", - .refresh = 60, - .xres = 800, - .yres = 480, - .pixclock = 33333, /* picosecond (30.00 MHz) */ - .left_margin = 88, - .right_margin = 40, - .upper_margin = 32, - .lower_margin = 13, - .hsync_len = 48, - .vsync_len = 3, - .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT | - FB_SYNC_DATA_ENABLE_HIGH_ACT | - FB_SYNC_DOTCLK_FAILING_ACT, - }, -}; +#define MXS_GPIO_NR(bank, nr) ((bank) * 32 + (nr)) -static struct fb_videomode apf28dev_video_modes[] = { - { - .name = "LW700", - .refresh = 60, - .xres = 800, - .yres = 480, - .pixclock = 30303, /* picosecond */ - .left_margin = 96, - .right_margin = 96, /* at least 3 & 1 */ - .upper_margin = 0x14, - .lower_margin = 0x15, - .hsync_len = 64, - .vsync_len = 4, - .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT | - FB_SYNC_DATA_ENABLE_HIGH_ACT | - FB_SYNC_DOTCLK_FAILING_ACT, - }, -}; +#define MXS_SET_ADDR 0x4 +#define MXS_CLR_ADDR 0x8 +#define MXS_TOG_ADDR 0xc + +static inline void __mxs_setl(u32 mask, void __iomem *reg) +{ + __raw_writel(mask, reg + MXS_SET_ADDR); +} + +static inline void __mxs_clrl(u32 mask, void __iomem *reg) +{ + __raw_writel(mask, reg + MXS_CLR_ADDR); +} -static struct mxsfb_platform_data mxsfb_pdata __initdata; +static inline void __mxs_togl(u32 mask, void __iomem *reg) +{ + __raw_writel(mask, reg + MXS_TOG_ADDR); +} /* * MX28EVK_FLEXCAN_SWITCH is shared between both flexcan controllers @@ -151,30 +90,86 @@ static void mx28evk_flexcan1_switch(int enable) static struct flexcan_platform_data flexcan_pdata[2]; static struct of_dev_auxdata mxs_auxdata_lookup[] __initdata = { - OF_DEV_AUXDATA("fsl,imx23-lcdif", 0x80030000, NULL, &mxsfb_pdata), - OF_DEV_AUXDATA("fsl,imx28-lcdif", 0x80030000, NULL, &mxsfb_pdata), OF_DEV_AUXDATA("fsl,imx28-flexcan", 0x80032000, NULL, &flexcan_pdata[0]), OF_DEV_AUXDATA("fsl,imx28-flexcan", 0x80034000, NULL, &flexcan_pdata[1]), { /* sentinel */ } }; -static void __init imx23_timer_init(void) -{ - mx23_clocks_init(); -} +#define OCOTP_WORD_OFFSET 0x20 +#define OCOTP_WORD_COUNT 0x20 -static struct sys_timer imx23_timer = { - .init = imx23_timer_init, -}; +#define BM_OCOTP_CTRL_BUSY (1 << 8) +#define BM_OCOTP_CTRL_ERROR (1 << 9) +#define BM_OCOTP_CTRL_RD_BANK_OPEN (1 << 12) + +static DEFINE_MUTEX(ocotp_mutex); +static u32 ocotp_words[OCOTP_WORD_COUNT]; -static void __init imx28_timer_init(void) +static const u32 *mxs_get_ocotp(void) { - mx28_clocks_init(); -} + struct device_node *np; + void __iomem *ocotp_base; + int timeout = 0x400; + size_t i; + static int once; -static struct sys_timer imx28_timer = { - .init = imx28_timer_init, -}; + if (once) + return ocotp_words; + + np = of_find_compatible_node(NULL, NULL, "fsl,ocotp"); + ocotp_base = of_iomap(np, 0); + WARN_ON(!ocotp_base); + + mutex_lock(&ocotp_mutex); + + /* + * clk_enable(hbus_clk) for ocotp can be skipped + * as it must be on when system is running. + */ + + /* try to clear ERROR bit */ + __mxs_clrl(BM_OCOTP_CTRL_ERROR, ocotp_base); + + /* check both BUSY and ERROR cleared */ + while ((__raw_readl(ocotp_base) & + (BM_OCOTP_CTRL_BUSY | BM_OCOTP_CTRL_ERROR)) && --timeout) + cpu_relax(); + + if (unlikely(!timeout)) + goto error_unlock; + + /* open OCOTP banks for read */ + __mxs_setl(BM_OCOTP_CTRL_RD_BANK_OPEN, ocotp_base); + + /* approximately wait 32 hclk cycles */ + udelay(1); + + /* poll BUSY bit becoming cleared */ + timeout = 0x400; + while ((__raw_readl(ocotp_base) & BM_OCOTP_CTRL_BUSY) && --timeout) + cpu_relax(); + + if (unlikely(!timeout)) + goto error_unlock; + + for (i = 0; i < OCOTP_WORD_COUNT; i++) + ocotp_words[i] = __raw_readl(ocotp_base + OCOTP_WORD_OFFSET + + i * 0x10); + + /* close banks for power saving */ + __mxs_clrl(BM_OCOTP_CTRL_RD_BANK_OPEN, ocotp_base); + + once = 1; + + mutex_unlock(&ocotp_mutex); + + return ocotp_words; + +error_unlock: + mutex_unlock(&ocotp_mutex); + pr_err("%s: timeout in reading OCOTP\n", __func__); + return NULL; +} enum mac_oui { OUI_FSL, @@ -244,14 +239,6 @@ static void __init update_fec_mac_prop(enum mac_oui oui) } } -static void __init imx23_evk_init(void) -{ - mxsfb_pdata.mode_list = mx23evk_video_modes; - mxsfb_pdata.mode_count = ARRAY_SIZE(mx23evk_video_modes); - mxsfb_pdata.default_bpp = 32; - mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT; -} - static inline void enable_clk_enet_out(void) { struct clk *clk = clk_get_sys("enet_out", NULL); @@ -262,14 +249,8 @@ static inline void enable_clk_enet_out(void) static void __init imx28_evk_init(void) { - enable_clk_enet_out(); update_fec_mac_prop(OUI_FSL); - mxsfb_pdata.mode_list = mx28evk_video_modes; - mxsfb_pdata.mode_count = ARRAY_SIZE(mx28evk_video_modes); - mxsfb_pdata.default_bpp = 32; - mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT; - mxs_saif_clkmux_select(MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR0); } @@ -282,19 +263,6 @@ static void __init imx28_evk_post_init(void) } } -static void __init m28evk_init(void) -{ - mxsfb_pdata.mode_list = m28evk_video_modes; - mxsfb_pdata.mode_count = ARRAY_SIZE(m28evk_video_modes); - mxsfb_pdata.default_bpp = 16; - mxsfb_pdata.ld_intf_width = STMLCDIF_18BIT; -} - -static void __init sc_sps1_init(void) -{ - enable_clk_enet_out(); -} - static int apx4devkit_phy_fixup(struct phy_device *phy) { phy->dev_flags |= MICREL_PHY_50MHZ_CLK; @@ -308,11 +276,6 @@ static void __init apx4devkit_init(void) if (IS_BUILTIN(CONFIG_PHYLIB)) phy_register_fixup_for_uid(PHY_ID_KSZ8051, MICREL_PHY_ID_MASK, apx4devkit_phy_fixup); - - mxsfb_pdata.mode_list = apx4devkit_video_modes; - mxsfb_pdata.mode_count = ARRAY_SIZE(apx4devkit_video_modes); - mxsfb_pdata.default_bpp = 32; - mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT; } #define ENET0_MDC__GPIO_4_0 MXS_GPIO_NR(4, 0) @@ -391,36 +354,24 @@ static void __init tx28_post_init(void) static void __init cfa10049_init(void) { - enable_clk_enet_out(); update_fec_mac_prop(OUI_CRYSTALFONTZ); } -static void __init apf28_init(void) +static void __init cfa10037_init(void) { - enable_clk_enet_out(); - - mxsfb_pdata.mode_list = apf28dev_video_modes; - mxsfb_pdata.mode_count = ARRAY_SIZE(apf28dev_video_modes); - mxsfb_pdata.default_bpp = 16; - mxsfb_pdata.ld_intf_width = STMLCDIF_16BIT; + update_fec_mac_prop(OUI_CRYSTALFONTZ); } static void __init mxs_machine_init(void) { if (of_machine_is_compatible("fsl,imx28-evk")) imx28_evk_init(); - else if (of_machine_is_compatible("fsl,imx23-evk")) - imx23_evk_init(); - else if (of_machine_is_compatible("denx,m28evk")) - m28evk_init(); else if (of_machine_is_compatible("bluegiga,apx4devkit")) apx4devkit_init(); + else if (of_machine_is_compatible("crystalfontz,cfa10037")) + cfa10037_init(); else if (of_machine_is_compatible("crystalfontz,cfa10049")) cfa10049_init(); - else if (of_machine_is_compatible("armadeus,imx28-apf28")) - apf28_init(); - else if (of_machine_is_compatible("schulercontrol,imx28-sps1")) - sc_sps1_init(); of_platform_populate(NULL, of_default_bus_match_table, mxs_auxdata_lookup, NULL); @@ -432,32 +383,63 @@ static void __init mxs_machine_init(void) imx28_evk_post_init(); } -static const char *imx23_dt_compat[] __initdata = { - "fsl,imx23", - NULL, -}; +#define MX23_CLKCTRL_RESET_OFFSET 0x120 +#define MX28_CLKCTRL_RESET_OFFSET 0x1e0 +#define MXS_CLKCTRL_RESET_CHIP (1 << 1) + +/* + * Reset the system. It is called by machine_restart(). + */ +static void mxs_restart(char mode, const char *cmd) +{ + struct device_node *np; + void __iomem *reset_addr; + + np = of_find_compatible_node(NULL, NULL, "fsl,clkctrl"); + reset_addr = of_iomap(np, 0); + if (!reset_addr) + goto soft; + + if (of_device_is_compatible(np, "fsl,imx23-clkctrl")) + reset_addr += MX23_CLKCTRL_RESET_OFFSET; + else + reset_addr += MX28_CLKCTRL_RESET_OFFSET; + + /* reset the chip */ + __mxs_setl(MXS_CLKCTRL_RESET_CHIP, reset_addr); + + pr_err("Failed to assert the chip reset\n"); + + /* Delay to allow the serial port to show the message */ + mdelay(50); + +soft: + /* We'll take a jump through zero as a poor second */ + soft_restart(0); +} -static const char *imx28_dt_compat[] __initdata = { +static void __init mxs_timer_init(void) +{ + if (of_machine_is_compatible("fsl,imx23")) + mx23_clocks_init(); + else + mx28_clocks_init(); + clocksource_of_init(); +} + +static const char *mxs_dt_compat[] __initdata = { "fsl,imx28", + "fsl,imx23", NULL, }; -DT_MACHINE_START(IMX23, "Freescale i.MX23 (Device Tree)") - .map_io = mx23_map_io, - .init_irq = icoll_init_irq, - .handle_irq = icoll_handle_irq, - .timer = &imx23_timer, - .init_machine = mxs_machine_init, - .dt_compat = imx23_dt_compat, - .restart = mxs_restart, -MACHINE_END - -DT_MACHINE_START(IMX28, "Freescale i.MX28 (Device Tree)") - .map_io = mx28_map_io, - .init_irq = icoll_init_irq, +DT_MACHINE_START(MXS, "Freescale MXS (Device Tree)") + .map_io = debug_ll_io_init, + .init_irq = irqchip_init, .handle_irq = icoll_handle_irq, - .timer = &imx28_timer, + .init_time = mxs_timer_init, .init_machine = mxs_machine_init, - .dt_compat = imx28_dt_compat, + .init_late = mxs_pm_init, + .dt_compat = mxs_dt_compat, .restart = mxs_restart, MACHINE_END |