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Diffstat (limited to 'arch/arm/mach-at91/setup.c')
-rw-r--r--arch/arm/mach-at91/setup.c97
1 files changed, 0 insertions, 97 deletions
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index e3c21b458bb8..4e58bc90ed21 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -22,38 +22,12 @@
#include <mach/cpu.h>
#include <mach/at91_dbgu.h>
-#include "soc.h"
#include "generic.h"
#include "pm.h"
-struct at91_init_soc __initdata at91_boot_soc;
-
struct at91_socinfo at91_soc_initdata;
EXPORT_SYMBOL(at91_soc_initdata);
-void __iomem *at91_ramc_base[2];
-EXPORT_SYMBOL_GPL(at91_ramc_base);
-
-static struct map_desc sram_desc[2] __initdata;
-
-void __init at91_init_sram(int bank, unsigned long base, unsigned int length)
-{
- struct map_desc *desc = &sram_desc[bank];
-
- desc->virtual = (unsigned long)AT91_IO_VIRT_BASE - length;
- if (bank > 0)
- desc->virtual -= sram_desc[bank - 1].length;
-
- desc->pfn = __phys_to_pfn(base);
- desc->length = length;
- desc->type = MT_MEMORY_RWX_NONCACHED;
-
- pr_info("sram at 0x%lx of 0x%x mapped at 0x%lx\n",
- base, length, desc->virtual);
-
- iotable_init(desc, 1);
-}
-
static struct map_desc at91_io_desc __initdata __maybe_unused = {
.virtual = (unsigned long)AT91_VA_BASE_SYS,
.pfn = __phys_to_pfn(AT91_BASE_SYS),
@@ -80,61 +54,51 @@ static void __init soc_detect(u32 dbgu_base)
at91_soc_initdata.type = AT91_SOC_RM9200;
if (at91_soc_initdata.subtype == AT91_SOC_SUBTYPE_UNKNOWN)
at91_soc_initdata.subtype = AT91_SOC_RM9200_BGA;
- at91_boot_soc = at91rm9200_soc;
break;
case ARCH_ID_AT91SAM9260:
at91_soc_initdata.type = AT91_SOC_SAM9260;
at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
- at91_boot_soc = at91sam9260_soc;
break;
case ARCH_ID_AT91SAM9261:
at91_soc_initdata.type = AT91_SOC_SAM9261;
at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
- at91_boot_soc = at91sam9261_soc;
break;
case ARCH_ID_AT91SAM9263:
at91_soc_initdata.type = AT91_SOC_SAM9263;
at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
- at91_boot_soc = at91sam9263_soc;
break;
case ARCH_ID_AT91SAM9G20:
at91_soc_initdata.type = AT91_SOC_SAM9G20;
at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
- at91_boot_soc = at91sam9260_soc;
break;
case ARCH_ID_AT91SAM9G45:
at91_soc_initdata.type = AT91_SOC_SAM9G45;
if (cidr == ARCH_ID_AT91SAM9G45ES)
at91_soc_initdata.subtype = AT91_SOC_SAM9G45ES;
- at91_boot_soc = at91sam9g45_soc;
break;
case ARCH_ID_AT91SAM9RL64:
at91_soc_initdata.type = AT91_SOC_SAM9RL;
at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
- at91_boot_soc = at91sam9rl_soc;
break;
case ARCH_ID_AT91SAM9X5:
at91_soc_initdata.type = AT91_SOC_SAM9X5;
- at91_boot_soc = at91sam9x5_soc;
break;
case ARCH_ID_AT91SAM9N12:
at91_soc_initdata.type = AT91_SOC_SAM9N12;
- at91_boot_soc = at91sam9n12_soc;
break;
case ARCH_ID_SAMA5:
at91_soc_initdata.exid = __raw_readl(AT91_IO_P2V(dbgu_base) + AT91_DBGU_EXID);
if (at91_soc_initdata.exid & ARCH_EXID_SAMA5D3) {
at91_soc_initdata.type = AT91_SOC_SAMA5D3;
- at91_boot_soc = sama5d3_soc;
}
break;
}
@@ -143,13 +107,11 @@ static void __init soc_detect(u32 dbgu_base)
if ((socid & ~AT91_CIDR_EXT) == ARCH_ID_AT91SAM9G10) {
at91_soc_initdata.type = AT91_SOC_SAM9G10;
at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
- at91_boot_soc = at91sam9261_soc;
}
/* at91sam9xe */
else if ((cidr & AT91_CIDR_ARCH) == ARCH_FAMILY_AT91SAM9XE) {
at91_soc_initdata.type = AT91_SOC_SAM9260;
at91_soc_initdata.subtype = AT91_SOC_SAM9XE;
- at91_boot_soc = at91sam9260_soc;
}
if (!at91_soc_is_detected())
@@ -229,10 +191,8 @@ static void __init alt_soc_detect(u32 dbgu_base)
at91_soc_initdata.exid = __raw_readl(AT91_ALT_IO_P2V(dbgu_base) + AT91_DBGU_EXID);
if (at91_soc_initdata.exid & ARCH_EXID_SAMA5D3) {
at91_soc_initdata.type = AT91_SOC_SAMA5D3;
- at91_boot_soc = sama5d3_soc;
} else if (at91_soc_initdata.exid & ARCH_EXID_SAMA5D4) {
at91_soc_initdata.type = AT91_SOC_SAMA5D4;
- at91_boot_soc = sama5d4_soc;
}
break;
}
@@ -338,12 +298,6 @@ void __init at91_map_io(void)
if (at91_soc_initdata.subtype != AT91_SOC_SUBTYPE_NONE)
pr_info("Detected soc subtype: %s\n",
at91_get_soc_subtype(&at91_soc_initdata));
-
- if (!at91_soc_is_enabled())
- panic(pr_fmt("Soc not enabled"));
-
- if (at91_boot_soc.map_io)
- at91_boot_soc.map_io();
}
void __init at91_alt_map_io(void)
@@ -363,12 +317,6 @@ void __init at91_alt_map_io(void)
if (at91_soc_initdata.subtype != AT91_SOC_SUBTYPE_NONE)
pr_info("AT91: Detected soc subtype: %s\n",
at91_get_soc_subtype(&at91_soc_initdata));
-
- if (!at91_soc_is_enabled())
- panic("AT91: Soc not enabled");
-
- if (at91_boot_soc.map_io)
- at91_boot_soc.map_io();
}
void __iomem *at91_matrix_base;
@@ -380,48 +328,3 @@ void __init at91_ioremap_matrix(u32 base_addr)
if (!at91_matrix_base)
panic(pr_fmt("Impossible to ioremap at91_matrix_base\n"));
}
-
-static struct of_device_id ramc_ids[] = {
- { .compatible = "atmel,at91rm9200-sdramc", .data = at91rm9200_standby },
- { .compatible = "atmel,at91sam9260-sdramc", .data = at91sam9_sdram_standby },
- { .compatible = "atmel,at91sam9g45-ddramc", .data = at91_ddr_standby },
- { .compatible = "atmel,sama5d3-ddramc", .data = at91_ddr_standby },
- { /*sentinel*/ }
-};
-
-static void at91_dt_ramc(void)
-{
- struct device_node *np;
- const struct of_device_id *of_id;
- int idx = 0;
- const void *standby = NULL;
-
- for_each_matching_node_and_match(np, ramc_ids, &of_id) {
- at91_ramc_base[idx] = of_iomap(np, 0);
- if (!at91_ramc_base[idx])
- panic(pr_fmt("unable to map ramc[%d] cpu registers\n"), idx);
-
- if (!standby)
- standby = of_id->data;
-
- idx++;
- }
-
- if (!idx)
- panic(pr_fmt("unable to find compatible ram controller node in dtb\n"));
-
- if (!standby) {
- pr_warn("ramc no standby function available\n");
- return;
- }
-
- at91_pm_set_standby(standby);
-}
-
-void __init at91_dt_initialize(void)
-{
- at91_dt_ramc();
-
- if (at91_boot_soc.init)
- at91_boot_soc.init();
-}
generated by cgit v1.2.3 (git 2.39.0) at 2024-11-25 16:47:25 +0300