diff options
Diffstat (limited to 'arch/arm/boot')
| -rw-r--r-- | arch/arm/boot/dts/sun8i-a23-polaroid-mid2407pxe03.dts | 4 | ||||
| -rw-r--r-- | arch/arm/boot/dts/sun8i-a23-polaroid-mid2809pxe04.dts | 4 | ||||
| -rw-r--r-- | arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts | 4 | ||||
| -rw-r--r-- | arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts | 2 | ||||
| -rw-r--r-- | arch/arm/boot/dts/sun8i-q8-common.dtsi | 4 | ||||
| -rw-r--r-- | arch/arm/boot/dts/sun8i-r16-parrot.dts | 1 |
6 files changed, 0 insertions, 19 deletions
diff --git a/arch/arm/boot/dts/sun8i-a23-polaroid-mid2407pxe03.dts b/arch/arm/boot/dts/sun8i-a23-polaroid-mid2407pxe03.dts index 649e31339662..61a4702b63c1 100644 --- a/arch/arm/boot/dts/sun8i-a23-polaroid-mid2407pxe03.dts +++ b/arch/arm/boot/dts/sun8i-a23-polaroid-mid2407pxe03.dts @@ -85,10 +85,6 @@ }; }; -&mmc1_pins_a { - bias-pull-up; -}; - &r_pio { wifi_pwrseq_pin_mid2407: wifi_pwrseq_pin@0 { pins = "PL6"; diff --git a/arch/arm/boot/dts/sun8i-a23-polaroid-mid2809pxe04.dts b/arch/arm/boot/dts/sun8i-a23-polaroid-mid2809pxe04.dts index 6b3bcae089f2..29a032164e3d 100644 --- a/arch/arm/boot/dts/sun8i-a23-polaroid-mid2809pxe04.dts +++ b/arch/arm/boot/dts/sun8i-a23-polaroid-mid2809pxe04.dts @@ -78,10 +78,6 @@ }; }; -&mmc1_pins_a { - bias-pull-up; -}; - &r_pio { wifi_pwrseq_pin_mid2809: wifi_pwrseq_pin@0 { pins = "PL6"; diff --git a/arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts b/arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts index 3e05959104f1..f8a72d07467c 100644 --- a/arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts +++ b/arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts @@ -70,10 +70,6 @@ }; }; -&mmc1_pins_a { - bias-pull-up; -}; - &mmc1 { pinctrl-names = "default"; pinctrl-0 = <&mmc1_pins_a>; diff --git a/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts b/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts index 541acb4d2b91..ff7244cdfa88 100644 --- a/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts +++ b/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts @@ -161,8 +161,6 @@ &mmc2_8bit_pins { /* Increase drive strength for DDR modes */ drive-strength = <40>; - /* eMMC is missing pull-ups */ - bias-pull-up; }; &ohci0 { diff --git a/arch/arm/boot/dts/sun8i-q8-common.dtsi b/arch/arm/boot/dts/sun8i-q8-common.dtsi index c676940a96da..0b3db925254b 100644 --- a/arch/arm/boot/dts/sun8i-q8-common.dtsi +++ b/arch/arm/boot/dts/sun8i-q8-common.dtsi @@ -82,10 +82,6 @@ }; }; -&mmc1_pins_a { - bias-pull-up; -}; - &r_pio { wifi_pwrseq_pin_q8: wifi_pwrseq_pin@0 { pins = "PL6", "PL7", "PL11"; diff --git a/arch/arm/boot/dts/sun8i-r16-parrot.dts b/arch/arm/boot/dts/sun8i-r16-parrot.dts index 472c03b7aeab..7322357aab04 100644 --- a/arch/arm/boot/dts/sun8i-r16-parrot.dts +++ b/arch/arm/boot/dts/sun8i-r16-parrot.dts @@ -158,7 +158,6 @@ &mmc2_8bit_pins { drive-strength = <40>; - bias-pull-up; }; &ohci0 { |