diff options
Diffstat (limited to 'arch/arm/boot/dts')
124 files changed, 4412 insertions, 1279 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index e81a38783b87..a1c7bb1313e7 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -16,11 +16,13 @@ dtb-$(CONFIG_ARCH_AT91) += at91sam9263ek.dtb dtb-$(CONFIG_ARCH_AT91) += tny_a9263.dtb dtb-$(CONFIG_ARCH_AT91) += usb_a9263.dtb # sam9g20 +dtb-$(CONFIG_ARCH_AT91) += at91-foxg20.dtb dtb-$(CONFIG_ARCH_AT91) += at91sam9g20ek.dtb dtb-$(CONFIG_ARCH_AT91) += at91sam9g20ek_2mmc.dtb dtb-$(CONFIG_ARCH_AT91) += kizbox.dtb dtb-$(CONFIG_ARCH_AT91) += tny_a9g20.dtb dtb-$(CONFIG_ARCH_AT91) += usb_a9g20.dtb +dtb-$(CONFIG_ARCH_AT91) += usb_a9g20_lpw.dtb # sam9g45 dtb-$(CONFIG_ARCH_AT91) += at91sam9m10g45ek.dtb dtb-$(CONFIG_ARCH_AT91) += pm9g45.dtb @@ -161,9 +163,11 @@ dtb-$(CONFIG_ARCH_U8500) += snowball.dtb \ hrefprev60.dtb \ hrefv60plus.dtb \ ccu9540.dtb +dtb-$(CONFIG_ARCH_S3C24XX) += s3c2416-smdk2416.dtb dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \ r8a7740-armadillo800eva.dtb \ r8a7778-bockw.dtb \ + r8a7740-armadillo800eva-reference.dtb \ r8a7779-marzen-reference.dtb \ r8a7790-lager.dtb \ sh73a0-kzm9g.dtb \ @@ -179,7 +183,9 @@ dtb-$(CONFIG_ARCH_SPEAR3XX)+= spear300-evb.dtb \ spear320-evb.dtb \ spear320-hmi.dtb dtb-$(CONFIG_ARCH_SPEAR6XX)+= spear600-evb.dtb -dtb-$(CONFIG_ARCH_SUNXI) += sun4i-a10-cubieboard.dtb \ +dtb-$(CONFIG_ARCH_SUNXI) += \ + sun4i-a10-cubieboard.dtb \ + sun4i-a10-mini-xplus.dtb \ sun4i-a10-hackberry.dtb \ sun5i-a13-olinuxino.dtb dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \ @@ -207,6 +213,7 @@ dtb-$(CONFIG_ARCH_VIRT) += xenvm-4.2.dtb dtb-$(CONFIG_ARCH_VT8500) += vt8500-bv07.dtb \ wm8505-ref.dtb \ wm8650-mid.dtb \ + wm8750-apc8750.dtb \ wm8850-w70v2.dtb dtb-$(CONFIG_ARCH_ZYNQ) += zynq-zc702.dtb diff --git a/arch/arm/boot/dts/aks-cdu.dts b/arch/arm/boot/dts/aks-cdu.dts index 29b9f15e7599..54cb5cf8604a 100644 --- a/arch/arm/boot/dts/aks-cdu.dts +++ b/arch/arm/boot/dts/aks-cdu.dts @@ -9,7 +9,7 @@ /dts-v1/; -/include/ "ge863-pro3.dtsi" +#include "ge863-pro3.dtsi" / { chosen { @@ -46,7 +46,7 @@ }; usb1: gadget@fffa4000 { - atmel,vbus-gpio = <&pioC 15 0>; + atmel,vbus-gpio = <&pioC 15 GPIO_ACTIVE_HIGH>; status = "okay"; }; }; @@ -90,23 +90,23 @@ compatible = "gpio-leds"; red { - gpios = <&pioC 10 0>; + gpios = <&pioC 10 GPIO_ACTIVE_HIGH>; linux,default-trigger = "none"; }; green { - gpios = <&pioA 5 1>; + gpios = <&pioA 5 GPIO_ACTIVE_LOW>; linux,default-trigger = "none"; default-state = "on"; }; yellow { - gpios = <&pioB 20 1>; + gpios = <&pioB 20 GPIO_ACTIVE_LOW>; linux,default-trigger = "none"; }; blue { - gpios = <&pioB 21 1>; + gpios = <&pioB 21 GPIO_ACTIVE_LOW>; linux,default-trigger = "none"; }; }; diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi index 1460d9b88adf..6827853a0a8f 100644 --- a/arch/arm/boot/dts/am33xx.dtsi +++ b/arch/arm/boot/dts/am33xx.dtsi @@ -26,8 +26,12 @@ }; cpus { + #address-cells = <1>; + #size-cells = <0>; cpu@0 { compatible = "arm,cortex-a8"; + device_type = "cpu"; + reg = <0>; /* * To consider voltage drop between PMIC and SoC, diff --git a/arch/arm/boot/dts/animeo_ip.dts b/arch/arm/boot/dts/animeo_ip.dts index 5160210f74da..3a1de9eb5111 100644 --- a/arch/arm/boot/dts/animeo_ip.dts +++ b/arch/arm/boot/dts/animeo_ip.dts @@ -7,7 +7,7 @@ */ /dts-v1/; -/include/ "at91sam9260.dtsi" +#include "at91sam9260.dtsi" / { model = "Somfy Animeo IP"; @@ -123,7 +123,7 @@ usb0: ohci@00500000 { num-ports = <2>; - atmel,vbus-gpio = <&pioB 15 1>; + atmel,vbus-gpio = <&pioB 15 GPIO_ACTIVE_LOW>; status = "okay"; }; }; @@ -133,23 +133,23 @@ power_green { label = "power_green"; - gpios = <&pioC 17 0>; + gpios = <&pioC 17 GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; }; power_red { label = "power_red"; - gpios = <&pioA 2 0>; + gpios = <&pioA 2 GPIO_ACTIVE_HIGH>; }; tx_green { label = "tx_green"; - gpios = <&pioC 19 0>; + gpios = <&pioC 19 GPIO_ACTIVE_HIGH>; }; tx_red { label = "tx_red"; - gpios = <&pioC 18 0>; + gpios = <&pioC 18 GPIO_ACTIVE_HIGH>; }; }; @@ -160,21 +160,21 @@ keyswitch_in { label = "keyswitch_in"; - gpios = <&pioB 1 0>; + gpios = <&pioB 1 GPIO_ACTIVE_HIGH>; linux,code = <28>; gpio-key,wakeup; }; error_in { label = "error_in"; - gpios = <&pioB 2 0>; + gpios = <&pioB 2 GPIO_ACTIVE_HIGH>; linux,code = <29>; gpio-key,wakeup; }; btn { label = "btn"; - gpios = <&pioC 23 0>; + gpios = <&pioC 23 GPIO_ACTIVE_HIGH>; linux,code = <31>; gpio-key,wakeup; }; diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi index f7da39453d2f..a679b6697a98 100644 --- a/arch/arm/boot/dts/armada-370-xp.dtsi +++ b/arch/arm/boot/dts/armada-370-xp.dtsi @@ -28,8 +28,12 @@ }; cpus { + #address-cells = <1>; + #size-cells = <0>; cpu@0 { compatible = "marvell,sheeva-v7"; + device_type = "cpu"; + reg = <0>; }; }; @@ -38,7 +42,8 @@ #size-cells = <1>; compatible = "simple-bus"; interrupt-parent = <&mpic>; - ranges = <0 0 0xd0000000 0x100000>; + ranges = <0 0 0xd0000000 0x0100000 /* internal registers */ + 0xe0000000 0 0xe0000000 0x8100000 /* PCIe */>; internal-regs { compatible = "simple-bus"; diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi index a8b19b96217e..fa3dfc6b4c6a 100644 --- a/arch/arm/boot/dts/armada-370.dtsi +++ b/arch/arm/boot/dts/armada-370.dtsi @@ -29,7 +29,8 @@ }; soc { - ranges = <0 0xd0000000 0x100000>; + ranges = <0 0xd0000000 0x0100000 /* internal registers */ + 0xe0000000 0xe0000000 0x8100000 /* PCIe */>; internal-regs { system-controller@18200 { compatible = "marvell,armada-370-xp-system-controller"; @@ -38,12 +39,12 @@ L2: l2-cache { compatible = "marvell,aurora-outer-cache"; - reg = <0xd0008000 0x1000>; + reg = <0x08000 0x1000>; cache-id-part = <0x100>; wt-override; }; - mpic: interrupt-controller@20000 { + interrupt-controller@20000 { reg = <0x20a00 0x1d0>, <0x21870 0x58>; }; diff --git a/arch/arm/boot/dts/armada-xp-gp.dts b/arch/arm/boot/dts/armada-xp-gp.dts index f63426eed591..0a040705a72d 100644 --- a/arch/arm/boot/dts/armada-xp-gp.dts +++ b/arch/arm/boot/dts/armada-xp-gp.dts @@ -39,6 +39,9 @@ }; soc { + ranges = <0 0 0xd0000000 0x100000 + 0xf0000000 0 0xf0000000 0x1000000>; + internal-regs { serial@12000 { clock-frequency = <250000000>; diff --git a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts index 60a79e7c2d16..685ee7a282e3 100644 --- a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts +++ b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts @@ -27,6 +27,9 @@ }; soc { + ranges = <0 0 0xd0000000 0x100000 + 0xf0000000 0 0xf0000000 0x8000000>; + internal-regs { serial@12000 { clock-frequency = <250000000>; diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi index 6a82fe827ad8..e481d54b565c 100644 --- a/arch/arm/boot/dts/armada-xp.dtsi +++ b/arch/arm/boot/dts/armada-xp.dtsi @@ -35,7 +35,7 @@ wt-override; }; - mpic: interrupt-controller@20000 { + interrupt-controller@20000 { reg = <0x20a00 0x2d0>, <0x21070 0x58>; }; diff --git a/arch/arm/boot/dts/at91-ariag25.dts b/arch/arm/boot/dts/at91-ariag25.dts index c7aebba4e8e7..cce45f5177f9 100644 --- a/arch/arm/boot/dts/at91-ariag25.dts +++ b/arch/arm/boot/dts/at91-ariag25.dts @@ -7,7 +7,7 @@ * Licensed under GPLv2 or later. */ /dts-v1/; -/include/ "at91sam9g25.dtsi" +#include "at91sam9g25.dtsi" / { model = "Acme Systems Aria G25"; @@ -21,6 +21,7 @@ serial3 = &usart2; serial4 = &usart3; serial5 = &uart0; + serial6 = &uart1; }; chosen { @@ -112,13 +113,17 @@ status = "okay"; }; + /* + * UART0/1 pins are marked as GPIO on + * Aria documentation. + * Change to "okay" if you need additional serial ports + */ uart0: serial@f8040000 { - compatible = "atmel,at91sam9260-usart"; - reg = <0xf8040000 0x200>; - interrupts = <15 4 5>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart0>; - status = "okay"; + status = "disabled"; + }; + + uart1: serial@f8044000 { + status = "disabled"; }; adc0: adc@f804c000 { @@ -138,6 +143,10 @@ }; }; }; + + rtc@fffffeb0 { + status = "okay"; + }; }; usb0: ohci@00600000 { @@ -156,7 +165,7 @@ /* little green LED in middle of Aria G25 module */ aria_led { label = "aria_led"; - gpios = <&pioB 8 0>; /* PB8 */ + gpios = <&pioB 8 GPIO_ACTIVE_HIGH>; /* PB8 */ linux,default-trigger = "heartbeat"; }; @@ -164,7 +173,7 @@ onewire@0 { compatible = "w1-gpio"; - gpios = <&pioA 21 1>; + gpios = <&pioA 21 GPIO_ACTIVE_LOW>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_w1_0>; }; diff --git a/arch/arm/boot/dts/at91-foxg20.dts b/arch/arm/boot/dts/at91-foxg20.dts new file mode 100644 index 000000000000..cbe967343997 --- /dev/null +++ b/arch/arm/boot/dts/at91-foxg20.dts @@ -0,0 +1,157 @@ +/* + * at91-foxg20.dts - Device Tree file for Acme Systems FoxG20 board + * + * Based on DT files for at91sam9g20ek evaluation board (AT91SAM9G20 SoC) + * + * Copyright (C) 2013 Douglas Gilbert <dgilbert@interlog.com> + * + * Licensed under GPLv2 or later. + */ +/dts-v1/; +#include "at91sam9g20.dtsi" + +/ { + model = "Acme Systems FoxG20"; + compatible = "acme,foxg20", "atmel,at91sam9g20", "atmel,at91sam9"; + + chosen { + bootargs = "console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootwait"; + }; + + memory { + reg = <0x20000000 0x4000000>; + }; + + clocks { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + main_clock: clock@0 { + compatible = "atmel,osc", "fixed-clock"; + clock-frequency = <18432000>; + }; + }; + + ahb { + apb { + usb1: gadget@fffa4000 { + atmel,vbus-gpio = <&pioC 6 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; + + mmc0: mmc@fffa8000 { + pinctrl-0 = < + &pinctrl_mmc0_clk + &pinctrl_mmc0_slot1_cmd_dat0 + &pinctrl_mmc0_slot1_dat1_3>; + status = "okay"; + + slot@1 { + reg = <1>; + bus-width = <4>; + }; + }; + + usart0: serial@fffb0000 { + pinctrl-0 = + <&pinctrl_usart0 + &pinctrl_usart0_rts + &pinctrl_usart0_cts + >; + status = "okay"; + }; + + usart1: serial@fffb4000 { + status = "okay"; + }; + + usart2: serial@fffb8000 { + status = "okay"; + }; + + macb0: ethernet@fffc4000 { + phy-mode = "rmii"; + status = "okay"; + }; + + usart3: serial@fffd0000 { + status = "okay"; + }; + + uart0: serial@fffd4000 { + status = "okay"; + }; + + uart1: serial@fffd8000 { + status = "okay"; + }; + + dbgu: serial@fffff200 { + status = "okay"; + }; + + pinctrl@fffff400 { + board { + pinctrl_pck0_as_mck: pck0_as_mck { + atmel,pins = + <AT91_PIOC 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + }; + + mmc0_slot1 { + pinctrl_board_mmc0_slot1: mmc0_slot1-board { + atmel,pins = + <AT91_PIOC 9 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* CD pin */ + }; + }; + + i2c0 { + pinctrl_i2c0: i2c0-0 { + atmel,pins = + <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_MULTI_DRIVE /* TWD (SDA), open drain */ + AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_MULTI_DRIVE>; /* TWCK (SCL), open drain */ + }; + }; + }; + + watchdog@fffffd40 { + status = "okay"; + }; + }; + + usb0: ohci@00500000 { + num-ports = <2>; + status = "okay"; + }; + }; + + i2c@0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c0>; + i2c-gpio,delay-us = <5>; /* ~85 kHz */ + status = "okay"; + }; + + leds { + compatible = "gpio-leds"; + + /* red LED marked "PC7" near mini USB (device) receptacle */ + user_led { + label = "user_led"; + gpios = <&pioC 7 GPIO_ACTIVE_HIGH>; /* PC7 */ + linux,default-trigger = "heartbeat"; + }; + }; + + gpio_keys { + compatible = "gpio-keys"; + + btn { + label = "Button"; + gpios = <&pioC 4 GPIO_ACTIVE_LOW>; + linux,code = <0x103>; + gpio-key,wakeup; + }; + }; +}; diff --git a/arch/arm/boot/dts/at91rm9200.dtsi b/arch/arm/boot/dts/at91rm9200.dtsi index 5d3ed5aafc69..34c03806fe06 100644 --- a/arch/arm/boot/dts/at91rm9200.dtsi +++ b/arch/arm/boot/dts/at91rm9200.dtsi @@ -10,7 +10,10 @@ * Licensed under GPLv2 or later. */ -/include/ "skeleton.dtsi" +#include "skeleton.dtsi" +#include <dt-bindings/pinctrl/at91.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/gpio/gpio.h> / { model = "Atmel AT91RM9200 family SoC"; @@ -35,8 +38,12 @@ ssc2 = &ssc2; }; cpus { - cpu@0 { + #address-cells = <0>; + #size-cells = <0>; + + cpu { compatible = "arm,arm920t"; + device_type = "cpu"; }; }; @@ -77,25 +84,29 @@ st: timer@fffffd00 { compatible = "atmel,at91rm9200-st"; reg = <0xfffffd00 0x100>; - interrupts = <1 4 7>; + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; }; tcb0: timer@fffa0000 { compatible = "atmel,at91rm9200-tcb"; reg = <0xfffa0000 0x100>; - interrupts = <17 4 0 18 4 0 19 4 0>; + interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0 + 18 IRQ_TYPE_LEVEL_HIGH 0 + 19 IRQ_TYPE_LEVEL_HIGH 0>; }; tcb1: timer@fffa4000 { compatible = "atmel,at91rm9200-tcb"; reg = <0xfffa4000 0x100>; - interrupts = <20 4 0 21 4 0 22 4 0>; + interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0 + 21 IRQ_TYPE_LEVEL_HIGH 0 + 22 IRQ_TYPE_LEVEL_HIGH 0>; }; i2c0: i2c@fffb8000 { compatible = "atmel,at91rm9200-i2c"; reg = <0xfffb8000 0x4000>; - interrupts = <12 4 6>; + interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_twi>; #address-cells = <1>; @@ -106,7 +117,7 @@ mmc0: mmc@fffb4000 { compatible = "atmel,hsmci"; reg = <0xfffb4000 0x4000>; - interrupts = <10 4 0>; + interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -115,7 +126,7 @@ ssc0: ssc@fffd0000 { compatible = "atmel,at91rm9200-ssc"; reg = <0xfffd0000 0x4000>; - interrupts = <14 4 5>; + interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; status = "disable"; @@ -124,7 +135,7 @@ ssc1: ssc@fffd4000 { compatible = "atmel,at91rm9200-ssc"; reg = <0xfffd4000 0x4000>; - interrupts = <15 4 5>; + interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; status = "disable"; @@ -133,7 +144,7 @@ ssc2: ssc@fffd8000 { compatible = "atmel,at91rm9200-ssc"; reg = <0xfffd8000 0x4000>; - interrupts = <16 4 5>; + interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>; status = "disable"; @@ -142,7 +153,7 @@ macb0: ethernet@fffbc000 { compatible = "cdns,at91rm9200-emac", "cdns,emac"; reg = <0xfffbc000 0x4000>; - interrupts = <24 4 3>; + interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>; phy-mode = "rmii"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_macb_rmii>; @@ -167,234 +178,310 @@ dbgu { pinctrl_dbgu: dbgu-0 { atmel,pins = - <0 30 0x1 0x0 /* PA30 periph A */ - 0 31 0x1 0x1>; /* PA31 periph with pullup */ + <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A */ + AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA31 periph with pullup */ }; }; uart0 { pinctrl_uart0: uart0-0 { atmel,pins = - <0 17 0x1 0x0 /* PA17 periph A */ - 0 18 0x1 0x0>; /* PA18 periph A */ + <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */ + AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA18 periph A */ }; pinctrl_uart0_rts: uart0_rts-0 { atmel,pins = - <0 20 0x1 0x0>; /* PA20 periph A */ + <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA20 periph A */ }; pinctrl_uart0_cts: uart0_cts-0 { atmel,pins = - <0 21 0x1 0x0>; /* PA21 periph A */ + <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */ }; }; uart1 { pinctrl_uart1: uart1-0 { atmel,pins = - <1 20 0x1 0x1 /* PB20 periph A with pullup */ - 1 21 0x1 0x0>; /* PB21 periph A */ + <AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB20 periph A with pullup */ + AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB21 periph A */ }; pinctrl_uart1_rts: uart1_rts-0 { atmel,pins = - <1 24 0x1 0x0>; /* PB24 periph A */ + <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB24 periph A */ }; pinctrl_uart1_cts: uart1_cts-0 { atmel,pins = - <1 26 0x1 0x0>; /* PB26 periph A */ + <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */ }; pinctrl_uart1_dtr_dsr: uart1_dtr_dsr-0 { atmel,pins = - <1 19 0x1 0x0 /* PB19 periph A */ - 1 25 0x1 0x0>; /* PB25 periph A */ + <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB19 periph A */ + AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB25 periph A */ }; pinctrl_uart1_dcd: uart1_dcd-0 { atmel,pins = - <1 23 0x1 0x0>; /* PB23 periph A */ + <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */ }; pinctrl_uart1_ri: uart1_ri-0 { atmel,pins = - <1 18 0x1 0x0>; /* PB18 periph A */ + <AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */ }; }; uart2 { pinctrl_uart2: uart2-0 { atmel,pins = - <0 22 0x1 0x0 /* PA22 periph A */ - 0 23 0x1 0x1>; /* PA23 periph A with pullup */ + <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA22 periph A */ + AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA23 periph A with pullup */ }; pinctrl_uart2_rts: uart2_rts-0 { atmel,pins = - <0 30 0x2 0x0>; /* PA30 periph B */ + <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */ }; pinctrl_uart2_cts: uart2_cts-0 { atmel,pins = - <0 31 0x2 0x0>; /* PA31 periph B */ + <AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA31 periph B */ }; }; uart3 { pinctrl_uart3: uart3-0 { atmel,pins = - <0 5 0x2 0x1 /* PA5 periph B with pullup */ - 0 6 0x2 0x0>; /* PA6 periph B */ + <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA5 periph B with pullup */ + AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA6 periph B */ }; pinctrl_uart3_rts: uart3_rts-0 { atmel,pins = - <1 0 0x2 0x0>; /* PB0 periph B */ + <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */ }; pinctrl_uart3_cts: uart3_cts-0 { atmel,pins = - <1 1 0x2 0x0>; /* PB1 periph B */ + <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */ }; }; nand { pinctrl_nand: nand-0 { atmel,pins = - <2 2 0x0 0x1 /* PC2 gpio RDY pin pull_up */ - 1 1 0x0 0x1>; /* PB1 gpio CD pin pull_up */ + <AT91_PIOC 2 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC2 gpio RDY pin pull_up */ + AT91_PIOB 1 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PB1 gpio CD pin pull_up */ }; }; macb { pinctrl_macb_rmii: macb_rmii-0 { atmel,pins = - <0 7 0x1 0x0 /* PA7 periph A */ - 0 8 0x1 0x0 /* PA8 periph A */ - 0 9 0x1 0x0 /* PA9 periph A */ - 0 10 0x1 0x0 /* PA10 periph A */ - 0 11 0x1 0x0 /* PA11 periph A */ - 0 12 0x1 0x0 /* PA12 periph A */ - 0 13 0x1 0x0 /* PA13 periph A */ - 0 14 0x1 0x0 /* PA14 periph A */ - 0 15 0x1 0x0 /* PA15 periph A */ - 0 16 0x1 0x0>; /* PA16 periph A */ + <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA7 periph A */ + AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA8 periph A */ + AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A */ + AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A */ + AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A */ + AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */ + AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */ + AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */ + AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */ + AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA16 periph A */ }; pinctrl_macb_rmii_mii: macb_rmii_mii-0 { atmel,pins = - <1 12 0x2 0x0 /* PB12 periph B */ - 1 13 0x2 0x0 /* PB13 periph B */ - 1 14 0x2 0x0 /* PB14 periph B */ - 1 15 0x2 0x0 /* PB15 periph B */ - 1 16 0x2 0x0 /* PB16 periph B */ - 1 17 0x2 0x0 /* PB17 periph B */ - 1 18 0x2 0x0 /* PB18 periph B */ - 1 19 0x2 0x0>; /* PB19 periph B */ + <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB12 periph B */ + AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB13 periph B */ + AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB14 periph B */ + AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB15 periph B */ + AT91_PIOB 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB16 periph B */ + AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB17 periph B */ + AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB18 periph B */ + AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB19 periph B */ }; }; mmc0 { pinctrl_mmc0_clk: mmc0_clk-0 { atmel,pins = - <0 27 0x1 0x0>; /* PA27 periph A */ + <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA27 periph A */ }; pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 { atmel,pins = - <0 28 0x1 0x1 /* PA28 periph A with pullup */ - 0 29 0x1 0x1>; /* PA29 periph A with pullup */ + <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA28 periph A with pullup */ + AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA29 periph A with pullup */ }; pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { atmel,pins = - <1 3 0x2 0x1 /* PB3 periph B with pullup */ - 1 4 0x2 0x1 /* PB4 periph B with pullup */ - 1 5 0x2 0x1>; /* PB5 periph B with pullup */ + <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PB3 periph B with pullup */ + AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PB4 periph B with pullup */ + AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PB5 periph B with pullup */ }; pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 { atmel,pins = - <0 8 0x2 0x1 /* PA8 periph B with pullup */ - 0 9 0x2 0x1>; /* PA9 periph B with pullup */ + <AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA8 periph B with pullup */ + AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA9 periph B with pullup */ }; pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 { atmel,pins = - <0 10 0x2 0x1 /* PA10 periph B with pullup */ - 0 11 0x2 0x1 /* PA11 periph B with pullup */ - 0 12 0x2 0x1>; /* PA12 periph B with pullup */ + <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA10 periph B with pullup */ + AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA11 periph B with pullup */ + AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA12 periph B with pullup */ }; }; ssc0 { pinctrl_ssc0_tx: ssc0_tx-0 { atmel,pins = - <1 0 0x1 0x0 /* PB0 periph A */ - 1 1 0x1 0x0 /* PB1 periph A */ - 1 2 0x1 0x0>; /* PB2 periph A */ + <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A */ + AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A */ + AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A */ }; pinctrl_ssc0_rx: ssc0_rx-0 { atmel,pins = - <1 3 0x1 0x0 /* PB3 periph A */ - 1 4 0x1 0x0 /* PB4 periph A */ - 1 5 0x1 0x0>; /* PB5 periph A */ + <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A */ + AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */ + AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */ }; }; ssc1 { pinctrl_ssc1_tx: ssc1_tx-0 { atmel,pins = - <1 6 0x1 0x0 /* PB6 periph A */ - 1 7 0x1 0x0 /* PB7 periph A */ - 1 8 0x1 0x0>; /* PB8 periph A */ + <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */ + AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */ + AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */ }; pinctrl_ssc1_rx: ssc1_rx-0 { atmel,pins = - <1 9 0x1 0x0 /* PB9 periph A */ - 1 10 0x1 0x0 /* PB10 periph A */ - 1 11 0x1 0x0>; /* PB11 periph A */ + <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */ + AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A */ + AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */ }; }; ssc2 { pinctrl_ssc2_tx: ssc2_tx-0 { atmel,pins = - <1 12 0x1 0x0 /* PB12 periph A */ - 1 13 0x1 0x0 /* PB13 periph A */ - 1 14 0x1 0x0>; /* PB14 periph A */ + <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */ + AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A */ + AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A */ }; pinctrl_ssc2_rx: ssc2_rx-0 { atmel,pins = - <1 15 0x1 0x0 /* PB15 periph A */ - 1 16 0x1 0x0 /* PB16 periph A */ - 1 17 0x1 0x0>; /* PB17 periph A */ + <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A */ + AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */ + AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB17 periph A */ }; }; twi { pinctrl_twi: twi-0 { atmel,pins = - <0 25 0x1 0x2 /* PA25 periph A with multi drive */ - 0 26 0x1 0x2>; /* PA26 periph A with multi drive */ + <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_MULTI_DRIVE /* PA25 periph A with multi drive */ + AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_MULTI_DRIVE>; /* PA26 periph A with multi drive */ }; pinctrl_twi_gpio: twi_gpio-0 { atmel,pins = - <0 25 0x0 0x2 /* PA25 GPIO with multi drive */ - 0 26 0x0 0x2>; /* PA26 GPIO with multi drive */ + <AT91_PIOA 25 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PA25 GPIO with multi drive */ + AT91_PIOA 26 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PA26 GPIO with multi drive */ + }; + }; + + tcb0 { + pinctrl_tcb0_tclk0: tcb0_tclk0-0 { + atmel,pins = <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tclk1: tcb0_tclk1-0 { + atmel,pins = <AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tclk2: tcb0_tclk2-0 { + atmel,pins = <AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tioa0: tcb0_tioa0-0 { + atmel,pins = <AT91_PIOA 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tioa1: tcb0_tioa1-0 { + atmel,pins = <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tioa2: tcb0_tioa2-0 { + atmel,pins = <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tiob0: tcb0_tiob0-0 { + atmel,pins = <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tiob1: tcb0_tiob1-0 { + atmel,pins = <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tiob2: tcb0_tiob2-0 { + atmel,pins = <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + }; + + tcb1 { + pinctrl_tcb1_tclk0: tcb1_tclk0-0 { + atmel,pins = <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb1_tclk1: tcb1_tclk1-0 { + atmel,pins = <AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb1_tclk2: tcb1_tclk2-0 { + atmel,pins = <AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb1_tioa0: tcb1_tioa0-0 { + atmel,pins = <AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb1_tioa1: tcb1_tioa1-0 { + atmel,pins = <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb1_tioa2: tcb1_tioa2-0 { + atmel,pins = <AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb1_tiob0: tcb1_tiob0-0 { + atmel,pins = <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb1_tiob1: tcb1_tiob1-0 { + atmel,pins = <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb1_tiob2: tcb1_tiob2-0 { + atmel,pins = <AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; }; }; pioA: gpio@fffff400 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff400 0x200>; - interrupts = <2 4 1>; + interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -404,7 +491,7 @@ pioB: gpio@fffff600 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff600 0x200>; - interrupts = <3 4 1>; + interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -414,7 +501,7 @@ pioC: gpio@fffff800 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff800 0x200>; - interrupts = <4 4 1>; + interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -424,7 +511,7 @@ pioD: gpio@fffffa00 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffffa00 0x200>; - interrupts = <5 4 1>; + interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -435,7 +522,7 @@ dbgu: serial@fffff200 { compatible = "atmel,at91rm9200-usart"; reg = <0xfffff200 0x200>; - interrupts = <1 4 7>; + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_dbgu>; status = "disabled"; @@ -444,7 +531,7 @@ usart0: serial@fffc0000 { compatible = "atmel,at91rm9200-usart"; reg = <0xfffc0000 0x200>; - interrupts = <6 4 5>; + interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>; atmel,use-dma-rx; atmel,use-dma-tx; pinctrl-names = "default"; @@ -455,7 +542,7 @@ usart1: serial@fffc4000 { compatible = "atmel,at91rm9200-usart"; reg = <0xfffc4000 0x200>; - interrupts = <7 4 5>; + interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; atmel,use-dma-rx; atmel,use-dma-tx; pinctrl-names = "default"; @@ -466,7 +553,7 @@ usart2: serial@fffc8000 { compatible = "atmel,at91rm9200-usart"; reg = <0xfffc8000 0x200>; - interrupts = <8 4 5>; + interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; atmel,use-dma-rx; atmel,use-dma-tx; pinctrl-names = "default"; @@ -477,7 +564,7 @@ usart3: serial@fffcc000 { compatible = "atmel,at91rm9200-usart"; reg = <0xfffcc000 0x200>; - interrupts = <23 4 5>; + interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>; atmel,use-dma-rx; atmel,use-dma-tx; pinctrl-names = "default"; @@ -488,7 +575,7 @@ usb1: gadget@fffb0000 { compatible = "atmel,at91rm9200-udc"; reg = <0xfffb0000 0x4000>; - interrupts = <11 4 2>; + interrupts = <11 IRQ_TYPE_LEVEL_HIGH 2>; status = "disabled"; }; }; @@ -503,9 +590,9 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_nand>; nand-ecc-mode = "soft"; - gpios = <&pioC 2 0 + gpios = <&pioC 2 GPIO_ACTIVE_HIGH 0 - &pioB 1 0 + &pioB 1 GPIO_ACTIVE_HIGH >; status = "disabled"; }; @@ -513,15 +600,15 @@ usb0: ohci@00300000 { compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00300000 0x100000>; - interrupts = <23 4 2>; + interrupts = <23 IRQ_TYPE_LEVEL_HIGH 2>; status = "disabled"; }; }; i2c@0 { compatible = "i2c-gpio"; - gpios = <&pioA 25 0 /* sda */ - &pioA 26 0 /* scl */ + gpios = <&pioA 25 GPIO_ACTIVE_HIGH /* sda */ + &pioA 26 GPIO_ACTIVE_HIGH /* scl */ >; i2c-gpio,sda-open-drain; i2c-gpio,scl-open-drain; diff --git a/arch/arm/boot/dts/at91rm9200ek.dts b/arch/arm/boot/dts/at91rm9200ek.dts index e586d85f8e23..14058125d123 100644 --- a/arch/arm/boot/dts/at91rm9200ek.dts +++ b/arch/arm/boot/dts/at91rm9200ek.dts @@ -6,7 +6,7 @@ * Licensed under GPLv2 only */ /dts-v1/; -/include/ "at91rm9200.dtsi" +#include "at91rm9200.dtsi" / { model = "Atmel AT91RM9200 evaluation kit"; @@ -50,7 +50,7 @@ }; usb1: gadget@fffb0000 { - atmel,vbus-gpio = <&pioD 4 0>; + atmel,vbus-gpio = <&pioD 4 GPIO_ACTIVE_HIGH>; status = "okay"; }; }; @@ -66,19 +66,19 @@ ds2 { label = "green"; - gpios = <&pioB 0 0x1>; + gpios = <&pioB 0 GPIO_ACTIVE_LOW>; linux,default-trigger = "mmc0"; }; ds4 { label = "yellow"; - gpios = <&pioB 1 0x1>; + gpios = <&pioB 1 GPIO_ACTIVE_LOW>; linux,default-trigger = "heartbeat"; }; ds6 { label = "red"; - gpios = <&pioB 2 0x1>; + gpios = <&pioB 2 GPIO_ACTIVE_LOW>; }; }; }; diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi index 70b5ccbac234..c7ccbcbffb3e 100644 --- a/arch/arm/boot/dts/at91sam9260.dtsi +++ b/arch/arm/boot/dts/at91sam9260.dtsi @@ -8,7 +8,10 @@ * Licensed under GPLv2 or later. */ -/include/ "skeleton.dtsi" +#include "skeleton.dtsi" +#include <dt-bindings/pinctrl/at91.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/gpio/gpio.h> / { model = "Atmel AT91SAM9260 family SoC"; @@ -32,8 +35,12 @@ ssc0 = &ssc0; }; cpus { - cpu@0 { - compatible = "arm,arm926ejs"; + #address-cells = <0>; + #size-cells = <0>; + + cpu { + compatible = "arm,arm926ej-s"; + device_type = "cpu"; }; }; @@ -84,19 +91,23 @@ pit: timer@fffffd30 { compatible = "atmel,at91sam9260-pit"; reg = <0xfffffd30 0xf>; - interrupts = <1 4 7>; + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; }; tcb0: timer@fffa0000 { compatible = "atmel,at91rm9200-tcb"; reg = <0xfffa0000 0x100>; - interrupts = <17 4 0 18 4 0 19 4 0>; + interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0 + 18 IRQ_TYPE_LEVEL_HIGH 0 + 19 IRQ_TYPE_LEVEL_HIGH 0>; }; tcb1: timer@fffdc000 { compatible = "atmel,at91rm9200-tcb"; reg = <0xfffdc000 0x100>; - interrupts = <26 4 0 27 4 0 28 4 0>; + interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0 + 27 IRQ_TYPE_LEVEL_HIGH 0 + 28 IRQ_TYPE_LEVEL_HIGH 0>; }; pinctrl@fffff400 { @@ -116,234 +127,318 @@ dbgu { pinctrl_dbgu: dbgu-0 { atmel,pins = - <1 14 0x1 0x0 /* PB14 periph A */ - 1 15 0x1 0x1>; /* PB15 periph with pullup */ + <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A */ + AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB15 periph with pullup */ }; }; usart0 { pinctrl_usart0: usart0-0 { atmel,pins = - <1 4 0x1 0x0 /* PB4 periph A */ - 1 5 0x1 0x0>; /* PB5 periph A */ + <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */ + AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */ }; pinctrl_usart0_rts: usart0_rts-0 { atmel,pins = - <1 26 0x1 0x0>; /* PB26 periph A */ + <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */ }; pinctrl_usart0_cts: usart0_cts-0 { atmel,pins = - <1 27 0x1 0x0>; /* PB27 periph A */ + <AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A */ }; pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 { atmel,pins = - <1 24 0x1 0x0 /* PB24 periph A */ - 1 22 0x1 0x0>; /* PB22 periph A */ + <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A */ + AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB22 periph A */ }; pinctrl_usart0_dcd: usart0_dcd-0 { atmel,pins = - <1 23 0x1 0x0>; /* PB23 periph A */ + <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */ }; pinctrl_usart0_ri: usart0_ri-0 { atmel,pins = - <1 25 0x1 0x0>; /* PB25 periph A */ + <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB25 periph A */ }; }; usart1 { pinctrl_usart1: usart1-0 { atmel,pins = - <1 6 0x1 0x1 /* PB6 periph A with pullup */ - 1 7 0x1 0x0>; /* PB7 periph A */ + <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB6 periph A with pullup */ + AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A */ }; pinctrl_usart1_rts: usart1_rts-0 { atmel,pins = - <1 28 0x1 0x0>; /* PB28 periph A */ + <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB28 periph A */ }; pinctrl_usart1_cts: usart1_cts-0 { atmel,pins = - <1 29 0x1 0x0>; /* PB29 periph A */ + <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB29 periph A */ }; }; usart2 { pinctrl_usart2: usart2-0 { atmel,pins = - <1 8 0x1 0x1 /* PB8 periph A with pullup */ - 1 9 0x1 0x0>; /* PB9 periph A */ + <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB8 periph A with pullup */ + AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB9 periph A */ }; pinctrl_usart2_rts: usart2_rts-0 { atmel,pins = - <0 4 0x1 0x0>; /* PA4 periph A */ + <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA4 periph A */ }; pinctrl_usart2_cts: usart2_cts-0 { atmel,pins = - <0 5 0x1 0x0>; /* PA5 periph A */ + <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA5 periph A */ }; }; usart3 { pinctrl_usart3: usart3-0 { atmel,pins = - <1 10 0x1 0x1 /* PB10 periph A with pullup */ - 1 11 0x1 0x0>; /* PB11 periph A */ + <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB10 periph A with pullup */ + AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */ }; pinctrl_usart3_rts: usart3_rts-0 { atmel,pins = - <2 8 0x2 0x0>; /* PC8 periph B */ + <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC8 periph B */ }; pinctrl_usart3_cts: usart3_cts-0 { atmel,pins = - <2 10 0x2 0x0>; /* PC10 periph B */ + <AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC10 periph B */ }; }; uart0 { pinctrl_uart0: uart0-0 { atmel,pins = - <0 31 0x2 0x1 /* PA31 periph B with pullup */ - 0 30 0x2 0x0>; /* PA30 periph B */ + <AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA31 periph B with pullup */ + AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */ }; }; uart1 { pinctrl_uart1: uart1-0 { atmel,pins = - <1 12 0x1 0x1 /* PB12 periph A with pullup */ - 1 13 0x1 0x0>; /* PB13 periph A */ + <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB12 periph A with pullup */ + AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB13 periph A */ }; }; nand { pinctrl_nand: nand-0 { atmel,pins = - <2 13 0x0 0x1 /* PC13 gpio RDY pin pull_up */ - 2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */ + <AT91_PIOC 13 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC13 gpio RDY pin pull_up */ + AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */ }; }; macb { pinctrl_macb_rmii: macb_rmii-0 { atmel,pins = - <0 12 0x1 0x0 /* PA12 periph A */ - 0 13 0x1 0x0 /* PA13 periph A */ - 0 14 0x1 0x0 /* PA14 periph A */ - 0 15 0x1 0x0 /* PA15 periph A */ - 0 16 0x1 0x0 /* PA16 periph A */ - 0 17 0x1 0x0 /* PA17 periph A */ - 0 18 0x1 0x0 /* PA18 periph A */ - 0 19 0x1 0x0 /* PA19 periph A */ - 0 20 0x1 0x0 /* PA20 periph A */ - 0 21 0x1 0x0>; /* PA21 periph A */ + <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */ + AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */ + AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */ + AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */ + AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA16 periph A */ + AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */ + AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA18 periph A */ + AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA19 periph A */ + AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA20 periph A */ + AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */ }; pinctrl_macb_rmii_mii: macb_rmii_mii-0 { atmel,pins = - <0 22 0x2 0x0 /* PA22 periph B */ - 0 23 0x2 0x0 /* PA23 periph B */ - 0 24 0x2 0x0 /* PA24 periph B */ - 0 25 0x2 0x0 /* PA25 periph B */ - 0 26 0x2 0x0 /* PA26 periph B */ - 0 27 0x2 0x0 /* PA27 periph B */ - 0 28 0x2 0x0 /* PA28 periph B */ - 0 29 0x2 0x0>; /* PA29 periph B */ + <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */ + AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA23 periph B */ + AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */ + AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */ + AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */ + AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */ + AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */ + AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */ }; pinctrl_macb_rmii_mii_alt: macb_rmii_mii-1 { atmel,pins = - <0 10 0x2 0x0 /* PA10 periph B */ - 0 11 0x2 0x0 /* PA11 periph B */ - 0 24 0x2 0x0 /* PA24 periph B */ - 0 25 0x2 0x0 /* PA25 periph B */ - 0 26 0x2 0x0 /* PA26 periph B */ - 0 27 0x2 0x0 /* PA27 periph B */ - 0 28 0x2 0x0 /* PA28 periph B */ - 0 29 0x2 0x0>; /* PA29 periph B */ + <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA10 periph B */ + AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA11 periph B */ + AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */ + AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */ + AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */ + AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */ + AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */ + AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */ }; }; mmc0 { pinctrl_mmc0_clk: mmc0_clk-0 { atmel,pins = - <0 8 0x1 0x0>; /* PA8 periph A */ + <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */ }; pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 { atmel,pins = - <0 7 0x1 0x1 /* PA7 periph A with pullup */ - 0 6 0x1 0x1>; /* PA6 periph A with pullup */ + <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */ + AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA6 periph A with pullup */ }; pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { atmel,pins = - <0 9 0x1 0x1 /* PA9 periph A with pullup */ - 0 10 0x1 0x1 /* PA10 periph A with pullup */ - 0 11 0x1 0x1>; /* PA11 periph A with pullup */ + <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */ + AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */ + AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */ }; pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 { atmel,pins = - <0 1 0x2 0x1 /* PA1 periph B with pullup */ - 0 0 0x2 0x1>; /* PA0 periph B with pullup */ + <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA1 periph B with pullup */ + AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA0 periph B with pullup */ }; pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 { atmel,pins = - <0 5 0x2 0x1 /* PA5 periph B with pullup */ - 0 4 0x2 0x1 /* PA4 periph B with pullup */ - 0 3 0x2 0x1>; /* PA3 periph B with pullup */ + <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA5 periph B with pullup */ + AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA4 periph B with pullup */ + AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA3 periph B with pullup */ }; }; ssc0 { pinctrl_ssc0_tx: ssc0_tx-0 { atmel,pins = - <1 16 0x1 0x0 /* PB16 periph A */ - 1 17 0x1 0x0 /* PB17 periph A */ - 1 18 0x1 0x0>; /* PB18 periph A */ + <AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */ + AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A */ + AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */ }; pinctrl_ssc0_rx: ssc0_rx-0 { atmel,pins = - <1 19 0x1 0x0 /* PB19 periph A */ - 1 20 0x1 0x0 /* PB20 periph A */ - 1 21 0x1 0x0>; /* PB21 periph A */ + <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB19 periph A */ + AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB20 periph A */ + AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB21 periph A */ }; }; spi0 { pinctrl_spi0: spi0-0 { atmel,pins = - <0 0 0x1 0x0 /* PA0 periph A SPI0_MISO pin */ - 0 1 0x1 0x0 /* PA1 periph A SPI0_MOSI pin */ - 0 2 0x1 0x0>; /* PA2 periph A SPI0_SPCK pin */ + <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A SPI0_MISO pin */ + AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A SPI0_MOSI pin */ + AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A SPI0_SPCK pin */ }; }; spi1 { pinctrl_spi1: spi1-0 { atmel,pins = - <1 0 0x1 0x0 /* PB0 periph A SPI1_MISO pin */ - 1 1 0x1 0x0 /* PB1 periph A SPI1_MOSI pin */ - 1 2 0x1 0x0>; /* PB2 periph A SPI1_SPCK pin */ + <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A SPI1_MISO pin */ + AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A SPI1_MOSI pin */ + AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A SPI1_SPCK pin */ + }; + }; + + i2c_gpio0 { + pinctrl_i2c_gpio0: i2c_gpio0-0 { + atmel,pins = + <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE + AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; + }; + }; + + tcb0 { + pinctrl_tcb0_tclk0: tcb0_tclk0-0 { + atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tclk1: tcb0_tclk1-0 { + atmel,pins = <AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tclk2: tcb0_tclk2-0 { + atmel,pins = <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tioa0: tcb0_tioa0-0 { + atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tioa1: tcb0_tioa1-0 { + atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tioa2: tcb0_tioa2-0 { + atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tiob0: tcb0_tiob0-0 { + atmel,pins = <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tiob1: tcb0_tiob1-0 { + atmel,pins = <AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tiob2: tcb0_tiob2-0 { + atmel,pins = <AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + }; + + tcb1 { + pinctrl_tcb1_tclk0: tcb1_tclk0-0 { + atmel,pins = <AT91_PIOB 16 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb1_tclk1: tcb1_tclk1-0 { + atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb1_tclk2: tcb1_tclk2-0 { + atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb1_tioa0: tcb1_tioa0-0 { + atmel,pins = <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb1_tioa1: tcb1_tioa1-0 { + atmel,pins = <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb1_tioa2: tcb1_tioa2-0 { + atmel,pins = <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb1_tiob0: tcb1_tiob0-0 { + atmel,pins = <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb1_tiob1: tcb1_tiob1-0 { + atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb1_tiob2: tcb1_tiob2-0 { + atmel,pins = <AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; }; }; pioA: gpio@fffff400 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff400 0x200>; - interrupts = <2 4 1>; + interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -353,7 +448,7 @@ pioB: gpio@fffff600 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff600 0x200>; - interrupts = <3 4 1>; + interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -363,7 +458,7 @@ pioC: gpio@fffff800 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff800 0x200>; - interrupts = <4 4 1>; + interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -374,7 +469,7 @@ dbgu: serial@fffff200 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffff200 0x200>; - interrupts = <1 4 7>; + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_dbgu>; status = "disabled"; @@ -383,7 +478,7 @@ usart0: serial@fffb0000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffb0000 0x200>; - interrupts = <6 4 5>; + interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>; atmel,use-dma-rx; atmel,use-dma-tx; pinctrl-names = "default"; @@ -394,7 +489,7 @@ usart1: serial@fffb4000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffb4000 0x200>; - interrupts = <7 4 5>; + interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; atmel,use-dma-rx; atmel,use-dma-tx; pinctrl-names = "default"; @@ -405,7 +500,7 @@ usart2: serial@fffb8000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffb8000 0x200>; - interrupts = <8 4 5>; + interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; atmel,use-dma-rx; atmel,use-dma-tx; pinctrl-names = "default"; @@ -416,7 +511,7 @@ usart3: serial@fffd0000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffd0000 0x200>; - interrupts = <23 4 5>; + interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>; atmel,use-dma-rx; atmel,use-dma-tx; pinctrl-names = "default"; @@ -427,7 +522,7 @@ uart0: serial@fffd4000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffd4000 0x200>; - interrupts = <24 4 5>; + interrupts = <24 IRQ_TYPE_LEVEL_HIGH 5>; atmel,use-dma-rx; atmel,use-dma-tx; pinctrl-names = "default"; @@ -438,7 +533,7 @@ uart1: serial@fffd8000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffd8000 0x200>; - interrupts = <25 4 5>; + interrupts = <25 IRQ_TYPE_LEVEL_HIGH 5>; atmel,use-dma-rx; atmel,use-dma-tx; pinctrl-names = "default"; @@ -449,7 +544,7 @@ macb0: ethernet@fffc4000 { compatible = "cdns,at32ap7000-macb", "cdns,macb"; reg = <0xfffc4000 0x100>; - interrupts = <21 4 3>; + interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_macb_rmii>; status = "disabled"; @@ -458,14 +553,14 @@ usb1: gadget@fffa4000 { compatible = "atmel,at91rm9200-udc"; reg = <0xfffa4000 0x4000>; - interrupts = <10 4 2>; + interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>; status = "disabled"; }; i2c0: i2c@fffac000 { compatible = "atmel,at91sam9260-i2c"; reg = <0xfffac000 0x100>; - interrupts = <11 4 6>; + interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -474,7 +569,7 @@ mmc0: mmc@fffa8000 { compatible = "atmel,hsmci"; reg = <0xfffa8000 0x600>; - interrupts = <9 4 0>; + interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -483,7 +578,7 @@ ssc0: ssc@fffbc000 { compatible = "atmel,at91rm9200-ssc"; reg = <0xfffbc000 0x4000>; - interrupts = <14 4 5>; + interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; status = "disabled"; @@ -494,7 +589,7 @@ #size-cells = <0>; compatible = "atmel,at91rm9200-spi"; reg = <0xfffc8000 0x200>; - interrupts = <12 4 3>; + interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi0>; status = "disabled"; @@ -505,7 +600,7 @@ #size-cells = <0>; compatible = "atmel,at91rm9200-spi"; reg = <0xfffcc000 0x200>; - interrupts = <13 4 3>; + interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi1>; status = "disabled"; @@ -514,7 +609,7 @@ adc0: adc@fffe0000 { compatible = "atmel,at91sam9260-adc"; reg = <0xfffe0000 0x100>; - interrupts = <5 4 0>; + interrupts = <5 IRQ_TYPE_LEVEL_HIGH 0>; atmel,adc-use-external-triggers; atmel,adc-channels-used = <0xf>; atmel,adc-vref = <3300>; @@ -567,8 +662,8 @@ atmel,nand-cmd-offset = <22>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_nand>; - gpios = <&pioC 13 0 - &pioC 14 0 + gpios = <&pioC 13 GPIO_ACTIVE_HIGH + &pioC 14 GPIO_ACTIVE_HIGH 0 >; status = "disabled"; @@ -577,21 +672,23 @@ usb0: ohci@00500000 { compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00500000 0x100000>; - interrupts = <20 4 2>; + interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>; status = "disabled"; }; }; i2c@0 { compatible = "i2c-gpio"; - gpios = <&pioA 23 0 /* sda */ - &pioA 24 0 /* scl */ + gpios = <&pioA 23 GPIO_ACTIVE_HIGH /* sda */ + &pioA 24 GPIO_ACTIVE_HIGH /* scl */ >; i2c-gpio,sda-open-drain; i2c-gpio,scl-open-drain; i2c-gpio,delay-us = <2>; /* ~100 kHz */ #address-cells = <1>; #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c_gpio0>; status = "disabled"; }; }; diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi index 94b58ab2cc08..d5bd65f74602 100644 --- a/arch/arm/boot/dts/at91sam9263.dtsi +++ b/arch/arm/boot/dts/at91sam9263.dtsi @@ -6,7 +6,10 @@ * Licensed under GPLv2 only. */ -/include/ "skeleton.dtsi" +#include "skeleton.dtsi" +#include <dt-bindings/pinctrl/at91.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/gpio/gpio.h> / { model = "Atmel AT91SAM9263 family SoC"; @@ -29,8 +32,12 @@ ssc1 = &ssc1; }; cpus { - cpu@0 { - compatible = "arm,arm926ejs"; + #address-cells = <0>; + #size-cells = <0>; + + cpu { + compatible = "arm,arm926ej-s"; + device_type = "cpu"; }; }; @@ -72,13 +79,13 @@ pit: timer@fffffd30 { compatible = "atmel,at91sam9260-pit"; reg = <0xfffffd30 0xf>; - interrupts = <1 4 7>; + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; }; tcb0: timer@fff7c000 { compatible = "atmel,at91rm9200-tcb"; reg = <0xfff7c000 0x100>; - interrupts = <19 4 0>; + interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>; }; rstc@fffffd00 { @@ -110,221 +117,259 @@ dbgu { pinctrl_dbgu: dbgu-0 { atmel,pins = - <2 30 0x1 0x0 /* PC30 periph A */ - 2 31 0x1 0x1>; /* PC31 periph with pullup */ + <AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC30 periph A */ + AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC31 periph with pullup */ }; }; usart0 { pinctrl_usart0: usart0-0 { atmel,pins = - <0 26 0x1 0x1 /* PA26 periph A with pullup */ - 0 27 0x1 0x0>; /* PA27 periph A */ + <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA26 periph A with pullup */ + AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA27 periph A */ }; pinctrl_usart0_rts: usart0_rts-0 { atmel,pins = - <0 28 0x1 0x0>; /* PA28 periph A */ + <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA28 periph A */ }; pinctrl_usart0_cts: usart0_cts-0 { atmel,pins = - <0 29 0x1 0x0>; /* PA29 periph A */ + <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA29 periph A */ }; }; usart1 { pinctrl_usart1: usart1-0 { atmel,pins = - <3 0 0x1 0x1 /* PD0 periph A with pullup */ - 3 1 0x1 0x0>; /* PD1 periph A */ + <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A with pullup */ + AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD1 periph A */ }; pinctrl_usart1_rts: usart1_rts-0 { atmel,pins = - <3 7 0x2 0x0>; /* PD7 periph B */ + <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD7 periph B */ }; pinctrl_usart1_cts: usart1_cts-0 { atmel,pins = - <3 8 0x2 0x0>; /* PD8 periph B */ + <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD8 periph B */ }; }; usart2 { pinctrl_usart2: usart2-0 { atmel,pins = - <3 2 0x1 0x1 /* PD2 periph A with pullup */ - 3 3 0x1 0x0>; /* PD3 periph A */ + <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A with pullup */ + AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD3 periph A */ }; pinctrl_usart2_rts: usart2_rts-0 { atmel,pins = - <3 5 0x2 0x0>; /* PD5 periph B */ + <AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD5 periph B */ }; pinctrl_usart2_cts: usart2_cts-0 { atmel,pins = - <4 6 0x2 0x0>; /* PD6 periph B */ + <AT91_PIOD 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD6 periph B */ }; }; nand { pinctrl_nand: nand-0 { atmel,pins = - <0 22 0x0 0x1 /* PA22 gpio RDY pin pull_up*/ - 3 15 0x0 0x1>; /* PD15 gpio enable pin pull_up */ + <AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PA22 gpio RDY pin pull_up*/ + AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD15 gpio enable pin pull_up */ }; }; macb { pinctrl_macb_rmii: macb_rmii-0 { atmel,pins = - <2 25 0x2 0x0 /* PC25 periph B */ - 4 21 0x1 0x0 /* PE21 periph A */ - 4 23 0x1 0x0 /* PE23 periph A */ - 4 24 0x1 0x0 /* PE24 periph A */ - 4 25 0x1 0x0 /* PE25 periph A */ - 4 26 0x1 0x0 /* PE26 periph A */ - 4 27 0x1 0x0 /* PE27 periph A */ - 4 28 0x1 0x0 /* PE28 periph A */ - 4 29 0x1 0x0 /* PE29 periph A */ - 4 30 0x1 0x0>; /* PE30 periph A */ + <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */ + AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE21 periph A */ + AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE23 periph A */ + AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE24 periph A */ + AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE25 periph A */ + AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE26 periph A */ + AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE27 periph A */ + AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE28 periph A */ + AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE29 periph A */ + AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */ }; pinctrl_macb_rmii_mii: macb_rmii_mii-0 { atmel,pins = - <2 20 0x2 0x0 /* PC20 periph B */ - 2 21 0x2 0x0 /* PC21 periph B */ - 2 22 0x2 0x0 /* PC22 periph B */ - 2 23 0x2 0x0 /* PC23 periph B */ - 2 24 0x2 0x0 /* PC24 periph B */ - 2 25 0x2 0x0 /* PC25 periph B */ - 2 27 0x2 0x0 /* PC27 periph B */ - 4 22 0x2 0x0>; /* PE22 periph B */ + <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC20 periph B */ + AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC21 periph B */ + AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC22 periph B */ + AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC23 periph B */ + AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC24 periph B */ + AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */ + AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC27 periph B */ + AT91_PIOE 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE22 periph B */ }; }; mmc0 { pinctrl_mmc0_clk: mmc0_clk-0 { atmel,pins = - <0 12 0x1 0x0>; /* PA12 periph A */ + <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA12 periph A */ }; pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 { atmel,pins = - <0 1 0x1 0x1 /* PA1 periph A with pullup */ - 0 0 0x1 0x1>; /* PA0 periph A with pullup */ + <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */ + AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA0 periph A with pullup */ }; pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { atmel,pins = - <0 3 0x1 0x1 /* PA3 periph A with pullup */ - 0 4 0x1 0x1 /* PA4 periph A with pullup */ - 0 5 0x1 0x1>; /* PA5 periph A with pullup */ + <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */ + AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */ + AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA5 periph A with pullup */ }; pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 { atmel,pins = - <0 16 0x1 0x1 /* PA16 periph A with pullup */ - 0 17 0x1 0x1>; /* PA17 periph A with pullup */ + <AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */ + AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA17 periph A with pullup */ }; pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 { atmel,pins = - <0 18 0x1 0x1 /* PA18 periph A with pullup */ - 0 19 0x1 0x1 /* PA19 periph A with pullup */ - 0 20 0x1 0x1>; /* PA20 periph A with pullup */ + <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */ + AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */ + AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */ }; }; mmc1 { pinctrl_mmc1_clk: mmc1_clk-0 { atmel,pins = - <0 6 0x1 0x0>; /* PA6 periph A */ + <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA6 periph A */ }; pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 { atmel,pins = - <0 7 0x1 0x1 /* PA7 periph A with pullup */ - 0 8 0x1 0x1>; /* PA8 periph A with pullup */ + <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */ + AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA8 periph A with pullup */ }; pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 { atmel,pins = - <0 9 0x1 0x1 /* PA9 periph A with pullup */ - 0 10 0x1 0x1 /* PA10 periph A with pullup */ - 0 11 0x1 0x1>; /* PA11 periph A with pullup */ + <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */ + AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */ + AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */ }; pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 { atmel,pins = - <0 21 0x1 0x1 /* PA21 periph A with pullup */ - 0 22 0x1 0x1>; /* PA22 periph A with pullup */ + <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA21 periph A with pullup */ + AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA22 periph A with pullup */ }; pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 { atmel,pins = - <0 23 0x1 0x1 /* PA23 periph A with pullup */ - 0 24 0x1 0x1 /* PA24 periph A with pullup */ - 0 25 0x1 0x1>; /* PA25 periph A with pullup */ + <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA23 periph A with pullup */ + AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA24 periph A with pullup */ + AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA25 periph A with pullup */ }; }; ssc0 { pinctrl_ssc0_tx: ssc0_tx-0 { atmel,pins = - <1 0 0x2 0x0 /* PB0 periph B */ - 1 1 0x2 0x0 /* PB1 periph B */ - 1 2 0x2 0x0>; /* PB2 periph B */ + <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB0 periph B */ + AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB1 periph B */ + AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB2 periph B */ }; pinctrl_ssc0_rx: ssc0_rx-0 { atmel,pins = - <1 3 0x2 0x0 /* PB3 periph B */ - 1 4 0x2 0x0 /* PB4 periph B */ - 1 5 0x2 0x0>; /* PB5 periph B */ + <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B */ + AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB4 periph B */ + AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B */ }; }; ssc1 { pinctrl_ssc1_tx: ssc1_tx-0 { atmel,pins = - <1 6 0x1 0x0 /* PB6 periph A */ - 1 7 0x1 0x0 /* PB7 periph A */ - 1 8 0x1 0x0>; /* PB8 periph A */ + <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */ + AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */ + AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */ }; pinctrl_ssc1_rx: ssc1_rx-0 { atmel,pins = - <1 9 0x1 0x0 /* PB9 periph A */ - 1 10 0x1 0x0 /* PB10 periph A */ - 1 11 0x1 0x0>; /* PB11 periph A */ + <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */ + AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A */ + AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */ }; }; spi0 { pinctrl_spi0: spi0-0 { atmel,pins = - <0 0 0x2 0x0 /* PA0 periph B SPI0_MISO pin */ - 0 1 0x2 0x0 /* PA1 periph B SPI0_MOSI pin */ - 0 2 0x2 0x0>; /* PA2 periph B SPI0_SPCK pin */ + <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA0 periph B SPI0_MISO pin */ + AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA1 periph B SPI0_MOSI pin */ + AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA2 periph B SPI0_SPCK pin */ }; }; spi1 { pinctrl_spi1: spi1-0 { atmel,pins = - <1 12 0x1 0x0 /* PB12 periph A SPI1_MISO pin */ - 1 13 0x1 0x0 /* PB13 periph A SPI1_MOSI pin */ - 1 14 0x1 0x0>; /* PB14 periph A SPI1_SPCK pin */ + <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A SPI1_MISO pin */ + AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A SPI1_MOSI pin */ + AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A SPI1_SPCK pin */ + }; + }; + + tcb0 { + pinctrl_tcb0_tclk0: tcb0_tclk0-0 { + atmel,pins = <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tclk1: tcb0_tclk1-0 { + atmel,pins = <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tclk2: tcb0_tclk2-0 { + atmel,pins = <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tioa0: tcb0_tioa0-0 { + atmel,pins = <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tioa1: tcb0_tioa1-0 { + atmel,pins = <AT91_PIOE 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tioa2: tcb0_tioa2-0 { + atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tiob0: tcb0_tiob0-0 { + atmel,pins = <AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tiob1: tcb0_tiob1-0 { + atmel,pins = <AT91_PIOE 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tiob2: tcb0_tiob2-0 { + atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>; }; }; pioA: gpio@fffff200 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff200 0x200>; - interrupts = <2 4 1>; + interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -334,7 +379,7 @@ pioB: gpio@fffff400 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff400 0x200>; - interrupts = <3 4 1>; + interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -344,7 +389,7 @@ pioC: gpio@fffff600 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff600 0x200>; - interrupts = <4 4 1>; + interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -354,7 +399,7 @@ pioD: gpio@fffff800 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff800 0x200>; - interrupts = <4 4 1>; + interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -364,7 +409,7 @@ pioE: gpio@fffffa00 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffffa00 0x200>; - interrupts = <4 4 1>; + interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -375,7 +420,7 @@ dbgu: serial@ffffee00 { compatible = "atmel,at91sam9260-usart"; reg = <0xffffee00 0x200>; - interrupts = <1 4 7>; + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_dbgu>; status = "disabled"; @@ -384,7 +429,7 @@ usart0: serial@fff8c000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfff8c000 0x200>; - interrupts = <7 4 5>; + interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; atmel,use-dma-rx; atmel,use-dma-tx; pinctrl-names = "default"; @@ -395,7 +440,7 @@ usart1: serial@fff90000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfff90000 0x200>; - interrupts = <8 4 5>; + interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; atmel,use-dma-rx; atmel,use-dma-tx; pinctrl-names = "default"; @@ -406,7 +451,7 @@ usart2: serial@fff94000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfff94000 0x200>; - interrupts = <9 4 5>; + interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>; atmel,use-dma-rx; atmel,use-dma-tx; pinctrl-names = "default"; @@ -417,7 +462,7 @@ ssc0: ssc@fff98000 { compatible = "atmel,at91rm9200-ssc"; reg = <0xfff98000 0x4000>; - interrupts = <16 4 5>; + interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; status = "disabled"; @@ -426,7 +471,7 @@ ssc1: ssc@fff9c000 { compatible = "atmel,at91rm9200-ssc"; reg = <0xfff9c000 0x4000>; - interrupts = <17 4 5>; + interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; status = "disabled"; @@ -435,7 +480,7 @@ macb0: ethernet@fffbc000 { compatible = "cdns,at32ap7000-macb", "cdns,macb"; reg = <0xfffbc000 0x100>; - interrupts = <21 4 3>; + interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_macb_rmii>; status = "disabled"; @@ -444,14 +489,14 @@ usb1: gadget@fff78000 { compatible = "atmel,at91rm9200-udc"; reg = <0xfff78000 0x4000>; - interrupts = <24 4 2>; + interrupts = <24 IRQ_TYPE_LEVEL_HIGH 2>; status = "disabled"; }; i2c0: i2c@fff88000 { compatible = "atmel,at91sam9263-i2c"; reg = <0xfff88000 0x100>; - interrupts = <13 4 6>; + interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -460,7 +505,7 @@ mmc0: mmc@fff80000 { compatible = "atmel,hsmci"; reg = <0xfff80000 0x600>; - interrupts = <10 4 0>; + interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -469,7 +514,7 @@ mmc1: mmc@fff84000 { compatible = "atmel,hsmci"; reg = <0xfff84000 0x600>; - interrupts = <11 4 0>; + interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -486,7 +531,7 @@ #size-cells = <0>; compatible = "atmel,at91rm9200-spi"; reg = <0xfffa4000 0x200>; - interrupts = <14 4 3>; + interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi0>; status = "disabled"; @@ -497,7 +542,7 @@ #size-cells = <0>; compatible = "atmel,at91rm9200-spi"; reg = <0xfffa8000 0x200>; - interrupts = <15 4 3>; + interrupts = <15 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi1>; status = "disabled"; @@ -515,8 +560,8 @@ atmel,nand-cmd-offset = <22>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_nand>; - gpios = <&pioA 22 0 - &pioD 15 0 + gpios = <&pioA 22 GPIO_ACTIVE_HIGH + &pioD 15 GPIO_ACTIVE_HIGH 0 >; status = "disabled"; @@ -525,15 +570,15 @@ usb0: ohci@00a00000 { compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00a00000 0x100000>; - interrupts = <29 4 2>; + interrupts = <29 IRQ_TYPE_LEVEL_HIGH 2>; status = "disabled"; }; }; i2c@0 { compatible = "i2c-gpio"; - gpios = <&pioB 4 0 /* sda */ - &pioB 5 0 /* scl */ + gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */ + &pioB 5 GPIO_ACTIVE_HIGH /* scl */ >; i2c-gpio,sda-open-drain; i2c-gpio,scl-open-drain; diff --git a/arch/arm/boot/dts/at91sam9263ek.dts b/arch/arm/boot/dts/at91sam9263ek.dts index 3b82d91e7fcc..70f835b55c0b 100644 --- a/arch/arm/boot/dts/at91sam9263ek.dts +++ b/arch/arm/boot/dts/at91sam9263ek.dts @@ -6,7 +6,7 @@ * Licensed under GPLv2 only */ /dts-v1/; -/include/ "at91sam9263.dtsi" +#include "at91sam9263.dtsi" / { model = "Atmel at91sam9263ek"; @@ -51,7 +51,7 @@ }; usb1: gadget@fff78000 { - atmel,vbus-gpio = <&pioA 25 0>; + atmel,vbus-gpio = <&pioA 25 GPIO_ACTIVE_HIGH>; status = "okay"; }; @@ -65,8 +65,8 @@ slot@0 { reg = <0>; bus-width = <4>; - cd-gpios = <&pioE 18 0>; - wp-gpios = <&pioE 19 0>; + cd-gpios = <&pioE 18 GPIO_ACTIVE_HIGH>; + wp-gpios = <&pioE 19 GPIO_ACTIVE_HIGH>; }; }; @@ -74,8 +74,8 @@ mmc0 { pinctrl_board_mmc0: mmc0-board { atmel,pins = - <5 18 0x0 0x5 /* PE18 gpio CD pin pull up and deglitch */ - 5 19 0x0 0x1>; /* PE19 gpio WP pin pull up */ + <AT91_PIOE 18 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH /* PE18 gpio CD pin pull up and deglitch */ + AT91_PIOE 19 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PE19 gpio WP pin pull up */ }; }; }; @@ -89,6 +89,10 @@ reg = <0>; }; }; + + watchdog@fffffd40 { + status = "okay"; + }; }; nand0: nand@40000000 { @@ -141,8 +145,8 @@ usb0: ohci@00a00000 { num-ports = <2>; status = "okay"; - atmel,vbus-gpio = <&pioA 24 0 - &pioA 21 0 + atmel,vbus-gpio = <&pioA 24 GPIO_ACTIVE_HIGH + &pioA 21 GPIO_ACTIVE_HIGH >; }; }; @@ -152,13 +156,13 @@ d3 { label = "d3"; - gpios = <&pioB 7 0>; + gpios = <&pioB 7 GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; }; d2 { label = "d2"; - gpios = <&pioC 29 1>; + gpios = <&pioC 29 GPIO_ACTIVE_LOW>; linux,default-trigger = "nand-disk"; }; }; @@ -168,14 +172,14 @@ left_click { label = "left_click"; - gpios = <&pioC 5 1>; + gpios = <&pioC 5 GPIO_ACTIVE_LOW>; linux,code = <272>; gpio-key,wakeup; }; right_click { label = "right_click"; - gpios = <&pioC 4 1>; + gpios = <&pioC 4 GPIO_ACTIVE_LOW>; linux,code = <273>; gpio-key,wakeup; }; diff --git a/arch/arm/boot/dts/at91sam9g15.dtsi b/arch/arm/boot/dts/at91sam9g15.dtsi index 28467fd6bf96..cfd7044616d7 100644 --- a/arch/arm/boot/dts/at91sam9g15.dtsi +++ b/arch/arm/boot/dts/at91sam9g15.dtsi @@ -6,7 +6,7 @@ * Licensed under GPLv2. */ -/include/ "at91sam9x5.dtsi" +#include "at91sam9x5.dtsi" / { model = "Atmel AT91SAM9G15 SoC"; diff --git a/arch/arm/boot/dts/at91sam9g15ek.dts b/arch/arm/boot/dts/at91sam9g15ek.dts index 5427b2dba87e..26b0444b0f96 100644 --- a/arch/arm/boot/dts/at91sam9g15ek.dts +++ b/arch/arm/boot/dts/at91sam9g15ek.dts @@ -7,8 +7,8 @@ * Licensed under GPLv2 or later. */ /dts-v1/; -/include/ "at91sam9g15.dtsi" -/include/ "at91sam9x5ek.dtsi" +#include "at91sam9g15.dtsi" +#include "at91sam9x5ek.dtsi" / { model = "Atmel AT91SAM9G15-EK"; diff --git a/arch/arm/boot/dts/at91sam9g20.dtsi b/arch/arm/boot/dts/at91sam9g20.dtsi index 75ce6e760016..b8e79466014f 100644 --- a/arch/arm/boot/dts/at91sam9g20.dtsi +++ b/arch/arm/boot/dts/at91sam9g20.dtsi @@ -6,7 +6,7 @@ * Licensed under GPLv2. */ -/include/ "at91sam9260.dtsi" +#include "at91sam9260.dtsi" / { model = "Atmel AT91SAM9G20 family SoC"; diff --git a/arch/arm/boot/dts/at91sam9g20ek.dts b/arch/arm/boot/dts/at91sam9g20ek.dts index e5324bf9d529..bbfd753112c9 100644 --- a/arch/arm/boot/dts/at91sam9g20ek.dts +++ b/arch/arm/boot/dts/at91sam9g20ek.dts @@ -6,7 +6,7 @@ * Licensed under GPLv2. */ /dts-v1/; -/include/ "at91sam9g20ek_common.dtsi" +#include "at91sam9g20ek_common.dtsi" / { model = "Atmel at91sam9g20ek"; @@ -17,13 +17,13 @@ ds1 { label = "ds1"; - gpios = <&pioA 9 0>; + gpios = <&pioA 9 GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; }; ds5 { label = "ds5"; - gpios = <&pioA 6 1>; + gpios = <&pioA 6 GPIO_ACTIVE_LOW>; }; }; }; diff --git a/arch/arm/boot/dts/at91sam9g20ek_2mmc.dts b/arch/arm/boot/dts/at91sam9g20ek_2mmc.dts index 66467b113126..bdb799bad179 100644 --- a/arch/arm/boot/dts/at91sam9g20ek_2mmc.dts +++ b/arch/arm/boot/dts/at91sam9g20ek_2mmc.dts @@ -6,7 +6,7 @@ * Licensed under GPLv2. */ /dts-v1/; -/include/ "at91sam9g20ek_common.dtsi" +#include "at91sam9g20ek_common.dtsi" / { model = "Atmel at91sam9g20ek 2 mmc"; @@ -23,7 +23,7 @@ slot@0 { reg = <0>; bus-width = <4>; - cd-gpios = <&pioC 2 0>; + cd-gpios = <&pioC 2 GPIO_ACTIVE_HIGH>; }; }; @@ -31,7 +31,7 @@ mmc0_slot0 { pinctrl_board_mmc0_slot0: mmc0_slot0-board { atmel,pins = - <2 2 0x0 0x5>; /* PC2 gpio CD pin pull up and deglitch */ + <AT91_PIOC 2 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PC2 gpio CD pin pull up and deglitch */ }; }; }; @@ -43,13 +43,13 @@ ds1 { label = "ds1"; - gpios = <&pioB 9 0>; + gpios = <&pioB 9 GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; }; ds5 { label = "ds5"; - gpios = <&pioB 8 1>; + gpios = <&pioB 8 GPIO_ACTIVE_LOW>; }; }; }; diff --git a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi index 6a92c5baef8c..137354689ad0 100644 --- a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi +++ b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi @@ -5,7 +5,7 @@ * * Licensed under GPLv2. */ -/include/ "at91sam9g20.dtsi" +#include "at91sam9g20.dtsi" / { @@ -34,10 +34,17 @@ board { pinctrl_pck0_as_mck: pck0_as_mck { atmel,pins = - <2 1 0x2 0x0>; /* PC1 periph B */ + <AT91_PIOC 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC1 periph B */ }; }; + + mmc0_slot1 { + pinctrl_board_mmc0_slot1: mmc0_slot1-board { + atmel,pins = + <AT91_PIOC 9 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PC9 gpio CD pin pull up and deglitch */ + }; + }; }; dbgu: serial@fffff200 { @@ -65,7 +72,7 @@ }; usb1: gadget@fffa4000 { - atmel,vbus-gpio = <&pioC 5 0>; + atmel,vbus-gpio = <&pioC 5 GPIO_ACTIVE_HIGH>; status = "okay"; }; @@ -79,16 +86,7 @@ slot@1 { reg = <1>; bus-width = <4>; - cd-gpios = <&pioC 9 0>; - }; - }; - - pinctrl@fffff400 { - mmc0_slot1 { - pinctrl_board_mmc0_slot1: mmc0_slot1-board { - atmel,pins = - <2 9 0x0 0x5>; /* PC9 gpio CD pin pull up and deglitch */ - }; + cd-gpios = <&pioC 9 GPIO_ACTIVE_HIGH>; }; }; @@ -106,6 +104,10 @@ reg = <1>; }; }; + + watchdog@fffffd40 { + status = "okay"; + }; }; nand0: nand@40000000 { @@ -180,14 +182,14 @@ btn3 { label = "Button 3"; - gpios = <&pioA 30 1>; + gpios = <&pioA 30 GPIO_ACTIVE_LOW>; linux,code = <0x103>; gpio-key,wakeup; }; btn4 { label = "Button 4"; - gpios = <&pioA 31 1>; + gpios = <&pioA 31 GPIO_ACTIVE_LOW>; linux,code = <0x104>; gpio-key,wakeup; }; diff --git a/arch/arm/boot/dts/at91sam9g25.dtsi b/arch/arm/boot/dts/at91sam9g25.dtsi index 5fd32df03f25..b4ec6fe53fc7 100644 --- a/arch/arm/boot/dts/at91sam9g25.dtsi +++ b/arch/arm/boot/dts/at91sam9g25.dtsi @@ -6,7 +6,7 @@ * Licensed under GPLv2. */ -/include/ "at91sam9x5.dtsi" +#include "at91sam9x5.dtsi" / { model = "Atmel AT91SAM9G25 SoC"; diff --git a/arch/arm/boot/dts/at91sam9g25ek.dts b/arch/arm/boot/dts/at91sam9g25ek.dts index a1c511fecdc1..1e4c49c584d3 100644 --- a/arch/arm/boot/dts/at91sam9g25ek.dts +++ b/arch/arm/boot/dts/at91sam9g25ek.dts @@ -7,8 +7,8 @@ * Licensed under GPLv2 or later. */ /dts-v1/; -/include/ "at91sam9g25.dtsi" -/include/ "at91sam9x5ek.dtsi" +#include "at91sam9g25.dtsi" +#include "at91sam9x5ek.dtsi" / { model = "Atmel AT91SAM9G25-EK"; diff --git a/arch/arm/boot/dts/at91sam9g35.dtsi b/arch/arm/boot/dts/at91sam9g35.dtsi index d6fa8af50724..bebf9f55614b 100644 --- a/arch/arm/boot/dts/at91sam9g35.dtsi +++ b/arch/arm/boot/dts/at91sam9g35.dtsi @@ -6,7 +6,7 @@ * Licensed under GPLv2. */ -/include/ "at91sam9x5.dtsi" +#include "at91sam9x5.dtsi" / { model = "Atmel AT91SAM9G35 SoC"; diff --git a/arch/arm/boot/dts/at91sam9g35ek.dts b/arch/arm/boot/dts/at91sam9g35ek.dts index 6f58ab8d21f5..641a9bf89ed1 100644 --- a/arch/arm/boot/dts/at91sam9g35ek.dts +++ b/arch/arm/boot/dts/at91sam9g35ek.dts @@ -7,8 +7,8 @@ * Licensed under GPLv2 or later. */ /dts-v1/; -/include/ "at91sam9g35.dtsi" -/include/ "at91sam9x5ek.dtsi" +#include "at91sam9g35.dtsi" +#include "at91sam9x5ek.dtsi" / { model = "Atmel AT91SAM9G35-EK"; diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi index bf18a735c37d..a03d0c05d027 100644 --- a/arch/arm/boot/dts/at91sam9g45.dtsi +++ b/arch/arm/boot/dts/at91sam9g45.dtsi @@ -9,7 +9,10 @@ * Licensed under GPLv2 or later. */ -/include/ "skeleton.dtsi" +#include "skeleton.dtsi" +#include <dt-bindings/pinctrl/at91.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/gpio/gpio.h> / { model = "Atmel AT91SAM9G45 family SoC"; @@ -35,8 +38,12 @@ ssc1 = &ssc1; }; cpus { - cpu@0 { - compatible = "arm,arm926ejs"; + #address-cells = <0>; + #size-cells = <0>; + + cpu { + compatible = "arm,arm926ej-s"; + device_type = "cpu"; }; }; @@ -83,7 +90,7 @@ pit: timer@fffffd30 { compatible = "atmel,at91sam9260-pit"; reg = <0xfffffd30 0xf>; - interrupts = <1 4 7>; + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; }; @@ -95,19 +102,19 @@ tcb0: timer@fff7c000 { compatible = "atmel,at91rm9200-tcb"; reg = <0xfff7c000 0x100>; - interrupts = <18 4 0>; + interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>; }; tcb1: timer@fffd4000 { compatible = "atmel,at91rm9200-tcb"; reg = <0xfffd4000 0x100>; - interrupts = <18 4 0>; + interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>; }; dma: dma-controller@ffffec00 { compatible = "atmel,at91sam9g45-dma"; reg = <0xffffec00 0x200>; - interrupts = <21 4 0>; + interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>; #dma-cells = <2>; }; @@ -130,221 +137,297 @@ dbgu { pinctrl_dbgu: dbgu-0 { atmel,pins = - <1 12 0x1 0x0 /* PB12 periph A */ - 1 13 0x1 0x0>; /* PB13 periph A */ + <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */ + AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB13 periph A */ }; }; usart0 { pinctrl_usart0: usart0-0 { atmel,pins = - <1 19 0x1 0x1 /* PB19 periph A with pullup */ - 1 18 0x1 0x0>; /* PB18 periph A */ + <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A with pullup */ + AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */ }; pinctrl_usart0_rts: usart0_rts-0 { atmel,pins = - <1 17 0x2 0x0>; /* PB17 periph B */ + <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB17 periph B */ }; pinctrl_usart0_cts: usart0_cts-0 { atmel,pins = - <1 15 0x2 0x0>; /* PB15 periph B */ + <AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB15 periph B */ }; }; uart1 { pinctrl_usart1: usart1-0 { atmel,pins = - <1 4 0x1 0x1 /* PB4 periph A with pullup */ - 1 5 0x1 0x0>; /* PB5 periph A */ + <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB4 periph A with pullup */ + AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */ }; pinctrl_usart1_rts: usart1_rts-0 { atmel,pins = - <3 16 0x1 0x0>; /* PD16 periph A */ + <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A */ }; pinctrl_usart1_cts: usart1_cts-0 { atmel,pins = - <3 17 0x1 0x0>; /* PD17 periph A */ + <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD17 periph A */ }; }; usart2 { pinctrl_usart2: usart2-0 { atmel,pins = - <1 6 0x1 0x1 /* PB6 periph A with pullup */ - 1 7 0x1 0x0>; /* PB7 periph A */ + <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB6 periph A with pullup */ + AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A */ }; pinctrl_usart2_rts: usart2_rts-0 { atmel,pins = - <2 9 0x2 0x0>; /* PC9 periph B */ + <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC9 periph B */ }; pinctrl_usart2_cts: usart2_cts-0 { atmel,pins = - <2 11 0x2 0x0>; /* PC11 periph B */ + <AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC11 periph B */ }; }; usart3 { pinctrl_usart3: usart3-0 { atmel,pins = - <1 8 0x1 0x1 /* PB9 periph A with pullup */ - 1 9 0x1 0x0>; /* PB8 periph A */ + <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB9 periph A with pullup */ + AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */ }; pinctrl_usart3_rts: usart3_rts-0 { atmel,pins = - <0 23 0x2 0x0>; /* PA23 periph B */ + <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B */ }; pinctrl_usart3_cts: usart3_cts-0 { atmel,pins = - <0 24 0x2 0x0>; /* PA24 periph B */ + <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA24 periph B */ }; }; nand { pinctrl_nand: nand-0 { atmel,pins = - <2 8 0x0 0x1 /* PC8 gpio RDY pin pull_up*/ - 2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */ + <AT91_PIOC 8 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC8 gpio RDY pin pull_up*/ + AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */ }; }; macb { pinctrl_macb_rmii: macb_rmii-0 { atmel,pins = - <0 10 0x1 0x0 /* PA10 periph A */ - 0 11 0x1 0x0 /* PA11 periph A */ - 0 12 0x1 0x0 /* PA12 periph A */ - 0 13 0x1 0x0 /* PA13 periph A */ - 0 14 0x1 0x0 /* PA14 periph A */ - 0 15 0x1 0x0 /* PA15 periph A */ - 0 16 0x1 0x0 /* PA16 periph A */ - 0 17 0x1 0x0 /* PA17 periph A */ - 0 18 0x1 0x0 /* PA18 periph A */ - 0 19 0x1 0x0>; /* PA19 periph A */ + <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A */ + AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A */ + AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */ + AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */ + AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */ + AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */ + AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA16 periph A */ + AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */ + AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA18 periph A */ + AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA19 periph A */ }; pinctrl_macb_rmii_mii: macb_rmii_mii-0 { atmel,pins = - <0 6 0x2 0x0 /* PA6 periph B */ - 0 7 0x2 0x0 /* PA7 periph B */ - 0 8 0x2 0x0 /* PA8 periph B */ - 0 9 0x2 0x0 /* PA9 periph B */ - 0 27 0x2 0x0 /* PA27 periph B */ - 0 28 0x2 0x0 /* PA28 periph B */ - 0 29 0x2 0x0 /* PA29 periph B */ - 0 30 0x2 0x0>; /* PA30 periph B */ + <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA6 periph B */ + AT91_PIOA 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA7 periph B */ + AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA8 periph B */ + AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA9 periph B */ + AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */ + AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */ + AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA29 periph B */ + AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */ }; }; mmc0 { pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 { atmel,pins = - <0 0 0x1 0x0 /* PA0 periph A */ - 0 1 0x1 0x1 /* PA1 periph A with pullup */ - 0 2 0x1 0x1>; /* PA2 periph A with pullup */ + <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A */ + AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */ + AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA2 periph A with pullup */ }; pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { atmel,pins = - <0 3 0x1 0x1 /* PA3 periph A with pullup */ - 0 4 0x1 0x1 /* PA4 periph A with pullup */ - 0 5 0x1 0x1>; /* PA5 periph A with pullup */ + <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */ + AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */ + AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA5 periph A with pullup */ }; pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 { atmel,pins = - <0 6 0x1 0x1 /* PA6 periph A with pullup */ - 0 7 0x1 0x1 /* PA7 periph A with pullup */ - 0 8 0x1 0x1 /* PA8 periph A with pullup */ - 0 9 0x1 0x1>; /* PA9 periph A with pullup */ + <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA6 periph A with pullup */ + AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */ + AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA8 periph A with pullup */ + AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA9 periph A with pullup */ }; }; mmc1 { pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 { atmel,pins = - <0 31 0x1 0x0 /* PA31 periph A */ - 0 22 0x1 0x1 /* PA22 periph A with pullup */ - 0 23 0x1 0x1>; /* PA23 periph A with pullup */ + <AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA31 periph A */ + AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA22 periph A with pullup */ + AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA23 periph A with pullup */ }; pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 { atmel,pins = - <0 24 0x1 0x1 /* PA24 periph A with pullup */ - 0 25 0x1 0x1 /* PA25 periph A with pullup */ - 0 26 0x1 0x1>; /* PA26 periph A with pullup */ + <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA24 periph A with pullup */ + AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA25 periph A with pullup */ + AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA26 periph A with pullup */ }; pinctrl_mmc1_slot0_dat4_7: mmc1_slot0_dat4_7-0 { atmel,pins = - <0 27 0x1 0x1 /* PA27 periph A with pullup */ - 0 28 0x1 0x1 /* PA28 periph A with pullup */ - 0 29 0x1 0x1 /* PA29 periph A with pullup */ - 0 20 0x1 0x1>; /* PA30 periph A with pullup */ + <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA27 periph A with pullup */ + AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA28 periph A with pullup */ + AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA29 periph A with pullup */ + AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA30 periph A with pullup */ }; }; ssc0 { pinctrl_ssc0_tx: ssc0_tx-0 { atmel,pins = - <3 0 0x1 0x0 /* PD0 periph A */ - 3 1 0x1 0x0 /* PD1 periph A */ - 3 2 0x1 0x0>; /* PD2 periph A */ + <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD0 periph A */ + AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD1 periph A */ + AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD2 periph A */ }; pinctrl_ssc0_rx: ssc0_rx-0 { atmel,pins = - <3 3 0x1 0x0 /* PD3 periph A */ - 3 4 0x1 0x0 /* PD4 periph A */ - 3 5 0x1 0x0>; /* PD5 periph A */ + <AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD3 periph A */ + AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD4 periph A */ + AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD5 periph A */ }; }; ssc1 { pinctrl_ssc1_tx: ssc1_tx-0 { atmel,pins = - <3 10 0x1 0x0 /* PD10 periph A */ - 3 11 0x1 0x0 /* PD11 periph A */ - 3 12 0x1 0x0>; /* PD12 periph A */ + <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A */ + AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A */ + AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A */ }; pinctrl_ssc1_rx: ssc1_rx-0 { atmel,pins = - <3 13 0x1 0x0 /* PD13 periph A */ - 3 14 0x1 0x0 /* PD14 periph A */ - 3 15 0x1 0x0>; /* PD15 periph A */ + <AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD13 periph A */ + AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD14 periph A */ + AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD15 periph A */ }; }; spi0 { pinctrl_spi0: spi0-0 { atmel,pins = - <1 0 0x1 0x0 /* PB0 periph A SPI0_MISO pin */ - 1 1 0x1 0x0 /* PB1 periph A SPI0_MOSI pin */ - 1 2 0x1 0x0>; /* PB2 periph A SPI0_SPCK pin */ + <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A SPI0_MISO pin */ + AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A SPI0_MOSI pin */ + AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A SPI0_SPCK pin */ }; }; spi1 { pinctrl_spi1: spi1-0 { atmel,pins = - <1 14 0x1 0x0 /* PB14 periph A SPI1_MISO pin */ - 1 15 0x1 0x0 /* PB15 periph A SPI1_MOSI pin */ - 1 16 0x1 0x0>; /* PB16 periph A SPI1_SPCK pin */ + <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A SPI1_MISO pin */ + AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A SPI1_MOSI pin */ + AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB16 periph A SPI1_SPCK pin */ + }; + }; + + tcb0 { + pinctrl_tcb0_tclk0: tcb0_tclk0-0 { + atmel,pins = <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tclk1: tcb0_tclk1-0 { + atmel,pins = <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tclk2: tcb0_tclk2-0 { + atmel,pins = <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tioa0: tcb0_tioa0-0 { + atmel,pins = <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tioa1: tcb0_tioa1-0 { + atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tioa2: tcb0_tioa2-0 { + atmel,pins = <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tiob0: tcb0_tiob0-0 { + atmel,pins = <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tiob1: tcb0_tiob1-0 { + atmel,pins = <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tiob2: tcb0_tiob2-0 { + atmel,pins = <AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + }; + + tcb1 { + pinctrl_tcb1_tclk0: tcb1_tclk0-0 { + atmel,pins = <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb1_tclk1: tcb1_tclk1-0 { + atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb1_tclk2: tcb1_tclk2-0 { + atmel,pins = <AT91_PIOD 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb1_tioa0: tcb1_tioa0-0 { + atmel,pins = <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb1_tioa1: tcb1_tioa1-0 { + atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb1_tioa2: tcb1_tioa2-0 { + atmel,pins = <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb1_tiob0: tcb1_tiob0-0 { + atmel,pins = <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb1_tiob1: tcb1_tiob1-0 { + atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb1_tiob2: tcb1_tiob2-0 { + atmel,pins = <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; }; }; pioA: gpio@fffff200 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff200 0x200>; - interrupts = <2 4 1>; + interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -354,7 +437,7 @@ pioB: gpio@fffff400 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff400 0x200>; - interrupts = <3 4 1>; + interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -364,7 +447,7 @@ pioC: gpio@fffff600 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff600 0x200>; - interrupts = <4 4 1>; + interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -374,7 +457,7 @@ pioD: gpio@fffff800 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff800 0x200>; - interrupts = <5 4 1>; + interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -384,7 +467,7 @@ pioE: gpio@fffffa00 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffffa00 0x200>; - interrupts = <5 4 1>; + interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -395,7 +478,7 @@ dbgu: serial@ffffee00 { compatible = "atmel,at91sam9260-usart"; reg = <0xffffee00 0x200>; - interrupts = <1 4 7>; + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_dbgu>; status = "disabled"; @@ -404,7 +487,7 @@ usart0: serial@fff8c000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfff8c000 0x200>; - interrupts = <7 4 5>; + interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; atmel,use-dma-rx; atmel,use-dma-tx; pinctrl-names = "default"; @@ -415,7 +498,7 @@ usart1: serial@fff90000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfff90000 0x200>; - interrupts = <8 4 5>; + interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; atmel,use-dma-rx; atmel,use-dma-tx; pinctrl-names = "default"; @@ -426,7 +509,7 @@ usart2: serial@fff94000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfff94000 0x200>; - interrupts = <9 4 5>; + interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>; atmel,use-dma-rx; atmel,use-dma-tx; pinctrl-names = "default"; @@ -437,7 +520,7 @@ usart3: serial@fff98000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfff98000 0x200>; - interrupts = <10 4 5>; + interrupts = <10 IRQ_TYPE_LEVEL_HIGH 5>; atmel,use-dma-rx; atmel,use-dma-tx; pinctrl-names = "default"; @@ -448,7 +531,7 @@ macb0: ethernet@fffbc000 { compatible = "cdns,at32ap7000-macb", "cdns,macb"; reg = <0xfffbc000 0x100>; - interrupts = <25 4 3>; + interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_macb_rmii>; status = "disabled"; @@ -457,7 +540,7 @@ i2c0: i2c@fff84000 { compatible = "atmel,at91sam9g10-i2c"; reg = <0xfff84000 0x100>; - interrupts = <12 4 6>; + interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -466,7 +549,7 @@ i2c1: i2c@fff88000 { compatible = "atmel,at91sam9g10-i2c"; reg = <0xfff88000 0x100>; - interrupts = <13 4 6>; + interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -475,7 +558,7 @@ ssc0: ssc@fff9c000 { compatible = "atmel,at91sam9g45-ssc"; reg = <0xfff9c000 0x4000>; - interrupts = <16 4 5>; + interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; status = "disabled"; @@ -484,7 +567,7 @@ ssc1: ssc@fffa0000 { compatible = "atmel,at91sam9g45-ssc"; reg = <0xfffa0000 0x4000>; - interrupts = <17 4 5>; + interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; status = "disabled"; @@ -493,7 +576,7 @@ adc0: adc@fffb0000 { compatible = "atmel,at91sam9260-adc"; reg = <0xfffb0000 0x100>; - interrupts = <20 4 0>; + interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>; atmel,adc-use-external-triggers; atmel,adc-channels-used = <0xff>; atmel,adc-vref = <3300>; @@ -533,7 +616,7 @@ mmc0: mmc@fff80000 { compatible = "atmel,hsmci"; reg = <0xfff80000 0x600>; - interrupts = <11 4 0>; + interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>; dmas = <&dma 1 0>; dma-names = "rxtx"; #address-cells = <1>; @@ -544,7 +627,7 @@ mmc1: mmc@fffd0000 { compatible = "atmel,hsmci"; reg = <0xfffd0000 0x600>; - interrupts = <29 4 0>; + interrupts = <29 IRQ_TYPE_LEVEL_HIGH 0>; dmas = <&dma 1 13>; dma-names = "rxtx"; #address-cells = <1>; @@ -592,8 +675,8 @@ atmel,nand-cmd-offset = <22>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_nand>; - gpios = <&pioC 8 0 - &pioC 14 0 + gpios = <&pioC 8 GPIO_ACTIVE_HIGH + &pioC 14 GPIO_ACTIVE_HIGH 0 >; status = "disabled"; @@ -602,22 +685,22 @@ usb0: ohci@00700000 { compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00700000 0x100000>; - interrupts = <22 4 2>; + interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; status = "disabled"; }; usb1: ehci@00800000 { compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; reg = <0x00800000 0x100000>; - interrupts = <22 4 2>; + interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; status = "disabled"; }; }; i2c@0 { compatible = "i2c-gpio"; - gpios = <&pioA 20 0 /* sda */ - &pioA 21 0 /* scl */ + gpios = <&pioA 20 GPIO_ACTIVE_HIGH /* sda */ + &pioA 21 GPIO_ACTIVE_HIGH /* scl */ >; i2c-gpio,sda-open-drain; i2c-gpio,scl-open-drain; diff --git a/arch/arm/boot/dts/at91sam9m10g45ek.dts b/arch/arm/boot/dts/at91sam9m10g45ek.dts index 51d9251b5bbe..91dbf791d2c6 100644 --- a/arch/arm/boot/dts/at91sam9m10g45ek.dts +++ b/arch/arm/boot/dts/at91sam9m10g45ek.dts @@ -7,7 +7,7 @@ * Licensed under GPLv2 or later. */ /dts-v1/; -/include/ "at91sam9g45.dtsi" +#include "at91sam9g45.dtsi" / { model = "Atmel AT91SAM9M10G45-EK"; @@ -59,6 +59,10 @@ status = "okay"; }; + watchdog@fffffd40 { + status = "okay"; + }; + mmc0: mmc@fff80000 { pinctrl-0 = < &pinctrl_board_mmc0 @@ -68,7 +72,7 @@ slot@0 { reg = <0>; bus-width = <4>; - cd-gpios = <&pioD 10 0>; + cd-gpios = <&pioD 10 GPIO_ACTIVE_HIGH>; }; }; @@ -81,8 +85,8 @@ slot@0 { reg = <0>; bus-width = <4>; - cd-gpios = <&pioD 11 0>; - wp-gpios = <&pioD 29 0>; + cd-gpios = <&pioD 11 GPIO_ACTIVE_HIGH>; + wp-gpios = <&pioD 29 GPIO_ACTIVE_HIGH>; }; }; @@ -90,15 +94,15 @@ mmc0 { pinctrl_board_mmc0: mmc0-board { atmel,pins = - <3 10 0x0 0x5>; /* PD10 gpio CD pin pull up and deglitch */ + <AT91_PIOD 10 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD10 gpio CD pin pull up and deglitch */ }; }; mmc1 { pinctrl_board_mmc1: mmc1-board { atmel,pins = - <3 11 0x0 0x5 /* PD11 gpio CD pin pull up and deglitch */ - 3 29 0x0 0x1>; /* PD29 gpio WP pin pull up */ + <AT91_PIOD 11 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH /* PD11 gpio CD pin pull up and deglitch */ + AT91_PIOD 29 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD29 gpio WP pin pull up */ }; }; }; @@ -139,8 +143,8 @@ usb0: ohci@00700000 { status = "okay"; num-ports = <2>; - atmel,vbus-gpio = <&pioD 1 1 - &pioD 3 1>; + atmel,vbus-gpio = <&pioD 1 GPIO_ACTIVE_LOW + &pioD 3 GPIO_ACTIVE_LOW>; }; usb1: ehci@00800000 { @@ -153,19 +157,19 @@ d8 { label = "d8"; - gpios = <&pioD 30 0>; + gpios = <&pioD 30 GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; }; d6 { label = "d6"; - gpios = <&pioD 0 1>; + gpios = <&pioD 0 GPIO_ACTIVE_LOW>; linux,default-trigger = "nand-disk"; }; d7 { label = "d7"; - gpios = <&pioD 31 1>; + gpios = <&pioD 31 GPIO_ACTIVE_LOW>; linux,default-trigger = "mmc0"; }; }; @@ -175,45 +179,45 @@ left_click { label = "left_click"; - gpios = <&pioB 6 1>; + gpios = <&pioB 6 GPIO_ACTIVE_LOW>; linux,code = <272>; gpio-key,wakeup; }; right_click { label = "right_click"; - gpios = <&pioB 7 1>; + gpios = <&pioB 7 GPIO_ACTIVE_LOW>; linux,code = <273>; gpio-key,wakeup; }; left { label = "Joystick Left"; - gpios = <&pioB 14 1>; + gpios = <&pioB 14 GPIO_ACTIVE_LOW>; linux,code = <105>; }; right { label = "Joystick Right"; - gpios = <&pioB 15 1>; + gpios = <&pioB 15 GPIO_ACTIVE_LOW>; linux,code = <106>; }; up { label = "Joystick Up"; - gpios = <&pioB 16 1>; + gpios = <&pioB 16 GPIO_ACTIVE_LOW>; linux,code = <103>; }; down { label = "Joystick Down"; - gpios = <&pioB 17 1>; + gpios = <&pioB 17 GPIO_ACTIVE_LOW>; linux,code = <108>; }; enter { label = "Joystick Press"; - gpios = <&pioB 18 1>; + gpios = <&pioB 18 GPIO_ACTIVE_LOW>; linux,code = <28>; }; }; diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi index 3de8e6dfbcb1..d37761846cd5 100644 --- a/arch/arm/boot/dts/at91sam9n12.dtsi +++ b/arch/arm/boot/dts/at91sam9n12.dtsi @@ -7,7 +7,10 @@ * Licensed under GPLv2 or later. */ -/include/ "skeleton.dtsi" +#include "skeleton.dtsi" +#include <dt-bindings/pinctrl/at91.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/gpio/gpio.h> / { model = "Atmel AT91SAM9N12 SoC"; @@ -31,8 +34,12 @@ ssc0 = &ssc0; }; cpus { - cpu@0 { - compatible = "arm,arm926ejs"; + #address-cells = <0>; + #size-cells = <0>; + + cpu { + compatible = "arm,arm926ej-s"; + device_type = "cpu"; }; }; @@ -57,6 +64,7 @@ compatible = "atmel,at91rm9200-aic"; interrupt-controller; reg = <0xfffff000 0x200>; + atmel,external-irqs = <31>; }; ramc0: ramc@ffffe800 { @@ -77,7 +85,7 @@ pit: timer@fffffe30 { compatible = "atmel,at91sam9260-pit"; reg = <0xfffffe30 0xf>; - interrupts = <1 4 7>; + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; }; shdwc@fffffe10 { @@ -88,7 +96,7 @@ mmc0: mmc@f0008000 { compatible = "atmel,hsmci"; reg = <0xf0008000 0x600>; - interrupts = <12 4 0>; + interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>; dmas = <&dma 1 0>; dma-names = "rxtx"; #address-cells = <1>; @@ -99,19 +107,19 @@ tcb0: timer@f8008000 { compatible = "atmel,at91sam9x5-tcb"; reg = <0xf8008000 0x100>; - interrupts = <17 4 0>; + interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>; }; tcb1: timer@f800c000 { compatible = "atmel,at91sam9x5-tcb"; reg = <0xf800c000 0x100>; - interrupts = <17 4 0>; + interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>; }; dma: dma-controller@ffffec00 { compatible = "atmel,at91sam9g45-dma"; reg = <0xffffec00 0x200>; - interrupts = <20 4 0>; + interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>; #dma-cells = <2>; }; @@ -133,159 +141,235 @@ dbgu { pinctrl_dbgu: dbgu-0 { atmel,pins = - <0 9 0x1 0x0 /* PA9 periph A */ - 0 10 0x1 0x1>; /* PA10 periph with pullup */ + <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A */ + AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA10 periph with pullup */ }; }; usart0 { pinctrl_usart0: usart0-0 { atmel,pins = - <0 1 0x1 0x1 /* PA1 periph A with pullup */ - 0 0 0x1 0x0>; /* PA0 periph A */ + <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */ + AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA0 periph A */ }; pinctrl_usart0_rts: usart0_rts-0 { atmel,pins = - <0 2 0x1 0x0>; /* PA2 periph A */ + <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A */ }; pinctrl_usart0_cts: usart0_cts-0 { atmel,pins = - <0 3 0x1 0x0>; /* PA3 periph A */ + <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA3 periph A */ }; }; usart1 { pinctrl_usart1: usart1-0 { atmel,pins = - <0 6 0x1 0x1 /* PA6 periph A with pullup */ - 0 5 0x1 0x0>; /* PA5 periph A */ + <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA6 periph A with pullup */ + AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA5 periph A */ }; }; usart2 { pinctrl_usart2: usart2-0 { atmel,pins = - <0 8 0x1 0x1 /* PA8 periph A with pullup */ - 0 7 0x1 0x0>; /* PA7 periph A */ + <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA8 periph A with pullup */ + AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA7 periph A */ }; pinctrl_usart2_rts: usart2_rts-0 { atmel,pins = - <1 0 0x2 0x0>; /* PB0 periph B */ + <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */ }; pinctrl_usart2_cts: usart2_cts-0 { atmel,pins = - <1 1 0x2 0x0>; /* PB1 periph B */ + <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */ }; }; usart3 { pinctrl_usart3: usart3-0 { atmel,pins = - <2 23 0x2 0x1 /* PC23 periph B with pullup */ - 2 22 0x2 0x0>; /* PC22 periph B */ + <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PC23 periph B with pullup */ + AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC22 periph B */ }; pinctrl_usart3_rts: usart3_rts-0 { atmel,pins = - <2 24 0x2 0x0>; /* PC24 periph B */ + <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC24 periph B */ }; pinctrl_usart3_cts: usart3_cts-0 { atmel,pins = - <2 25 0x2 0x0>; /* PC25 periph B */ + <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC25 periph B */ }; }; uart0 { pinctrl_uart0: uart0-0 { atmel,pins = - <2 9 0x3 0x1 /* PC9 periph C with pullup */ - 2 8 0x3 0x0>; /* PC8 periph C */ + <AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* PC9 periph C with pullup */ + AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC8 periph C */ }; }; uart1 { pinctrl_uart1: uart1-0 { atmel,pins = - <2 16 0x3 0x1 /* PC17 periph C with pullup */ - 2 17 0x3 0x0>; /* PC16 periph C */ + <AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* PC17 periph C with pullup */ + AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC16 periph C */ }; }; nand { pinctrl_nand: nand-0 { atmel,pins = - <3 5 0x0 0x1 /* PD5 gpio RDY pin pull_up*/ - 3 4 0x0 0x1>; /* PD4 gpio enable pin pull_up */ + <AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD5 gpio RDY pin pull_up*/ + AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD4 gpio enable pin pull_up */ }; }; mmc0 { pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 { atmel,pins = - <0 17 0x1 0x0 /* PA17 periph A */ - 0 16 0x1 0x1 /* PA16 periph A with pullup */ - 0 15 0x1 0x1>; /* PA15 periph A with pullup */ + <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */ + AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */ + AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA15 periph A with pullup */ }; pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { atmel,pins = - <0 18 0x1 0x1 /* PA18 periph A with pullup */ - 0 19 0x1 0x1 /* PA19 periph A with pullup */ - 0 20 0x1 0x1>; /* PA20 periph A with pullup */ + <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */ + AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */ + AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */ }; pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 { atmel,pins = - <0 11 0x2 0x1 /* PA11 periph B with pullup */ - 0 12 0x2 0x1 /* PA12 periph B with pullup */ - 0 13 0x2 0x1 /* PA13 periph B with pullup */ - 0 14 0x2 0x1>; /* PA14 periph B with pullup */ + <AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA11 periph B with pullup */ + AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA12 periph B with pullup */ + AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA13 periph B with pullup */ + AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA14 periph B with pullup */ }; }; ssc0 { pinctrl_ssc0_tx: ssc0_tx-0 { atmel,pins = - <0 24 0x2 0x0 /* PA24 periph B */ - 0 25 0x2 0x0 /* PA25 periph B */ - 0 26 0x2 0x0>; /* PA26 periph B */ + <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */ + AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */ + AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA26 periph B */ }; pinctrl_ssc0_rx: ssc0_rx-0 { atmel,pins = - <0 27 0x2 0x0 /* PA27 periph B */ - 0 28 0x2 0x0 /* PA28 periph B */ - 0 29 0x2 0x0>; /* PA29 periph B */ + <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */ + AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */ + AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */ }; }; spi0 { pinctrl_spi0: spi0-0 { atmel,pins = - <0 11 0x1 0x0 /* PA11 periph A SPI0_MISO pin */ - 0 12 0x1 0x0 /* PA12 periph A SPI0_MOSI pin */ - 0 13 0x1 0x0>; /* PA13 periph A SPI0_SPCK pin */ + <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A SPI0_MISO pin */ + AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A SPI0_MOSI pin */ + AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA13 periph A SPI0_SPCK pin */ }; }; spi1 { pinctrl_spi1: spi1-0 { atmel,pins = - <0 21 0x2 0x0 /* PA21 periph B SPI1_MISO pin */ - 0 22 0x2 0x0 /* PA22 periph B SPI1_MOSI pin */ - 0 23 0x2 0x0>; /* PA23 periph B SPI1_SPCK pin */ + <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA21 periph B SPI1_MISO pin */ + AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B SPI1_MOSI pin */ + AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B SPI1_SPCK pin */ + }; + }; + + tcb0 { + pinctrl_tcb0_tclk0: tcb0_tclk0-0 { + atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tclk1: tcb0_tclk1-0 { + atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tclk2: tcb0_tclk2-0 { + atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tioa0: tcb0_tioa0-0 { + atmel,pins = <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tioa1: tcb0_tioa1-0 { + atmel,pins = <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tioa2: tcb0_tioa2-0 { + atmel,pins = <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tiob0: tcb0_tiob0-0 { + atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tiob1: tcb0_tiob1-0 { + atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tiob2: tcb0_tiob2-0 { + atmel,pins = <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + }; + + tcb1 { + pinctrl_tcb1_tclk0: tcb1_tclk0-0 { + atmel,pins = <AT91_PIOC 4 AT91_PERIPH_C AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb1_tclk1: tcb1_tclk1-0 { + atmel,pins = <AT91_PIOC 7 AT91_PERIPH_C AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb1_tclk2: tcb1_tclk2-0 { + atmel,pins = <AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb1_tioa0: tcb1_tioa0-0 { + atmel,pins = <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb1_tioa1: tcb1_tioa1-0 { + atmel,pins = <AT91_PIOC 5 AT91_PERIPH_C AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb1_tioa2: tcb1_tioa2-0 { + atmel,pins = <AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb1_tiob0: tcb1_tiob0-0 { + atmel,pins = <AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb1_tiob1: tcb1_tiob1-0 { + atmel,pins = <AT91_PIOC 6 AT91_PERIPH_C AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb1_tiob2: tcb1_tiob2-0 { + atmel,pins = <AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE>; }; }; pioA: gpio@fffff400 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffff400 0x200>; - interrupts = <2 4 1>; + interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -295,7 +379,7 @@ pioB: gpio@fffff600 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffff600 0x200>; - interrupts = <2 4 1>; + interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -305,7 +389,7 @@ pioC: gpio@fffff800 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffff800 0x200>; - interrupts = <3 4 1>; + interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -315,7 +399,7 @@ pioD: gpio@fffffa00 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffffa00 0x200>; - interrupts = <3 4 1>; + interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -326,7 +410,7 @@ dbgu: serial@fffff200 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffff200 0x200>; - interrupts = <1 4 7>; + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_dbgu>; status = "disabled"; @@ -335,7 +419,7 @@ ssc0: ssc@f0010000 { compatible = "atmel,at91sam9g45-ssc"; reg = <0xf0010000 0x4000>; - interrupts = <28 4 5>; + interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; status = "disabled"; @@ -344,7 +428,7 @@ usart0: serial@f801c000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf801c000 0x4000>; - interrupts = <5 4 5>; + interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart0>; status = "disabled"; @@ -353,7 +437,7 @@ usart1: serial@f8020000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf8020000 0x4000>; - interrupts = <6 4 5>; + interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart1>; status = "disabled"; @@ -362,7 +446,7 @@ usart2: serial@f8024000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf8024000 0x4000>; - interrupts = <7 4 5>; + interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart2>; status = "disabled"; @@ -371,7 +455,7 @@ usart3: serial@f8028000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf8028000 0x4000>; - interrupts = <8 4 5>; + interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart3>; status = "disabled"; @@ -380,7 +464,7 @@ i2c0: i2c@f8010000 { compatible = "atmel,at91sam9x5-i2c"; reg = <0xf8010000 0x100>; - interrupts = <9 4 6>; + interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>; dmas = <&dma 1 13>, <&dma 1 14>; dma-names = "tx", "rx"; @@ -392,7 +476,7 @@ i2c1: i2c@f8014000 { compatible = "atmel,at91sam9x5-i2c"; reg = <0xf8014000 0x100>; - interrupts = <10 4 6>; + interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>; dmas = <&dma 1 15>, <&dma 1 16>; dma-names = "tx", "rx"; @@ -406,7 +490,7 @@ #size-cells = <0>; compatible = "atmel,at91rm9200-spi"; reg = <0xf0000000 0x100>; - interrupts = <13 4 3>; + interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi0>; status = "disabled"; @@ -417,11 +501,17 @@ #size-cells = <0>; compatible = "atmel,at91rm9200-spi"; reg = <0xf0004000 0x100>; - interrupts = <14 4 3>; + interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi1>; status = "disabled"; }; + + watchdog@fffffe40 { + compatible = "atmel,at91sam9260-wdt"; + reg = <0xfffffe40 0x10>; + status = "disabled"; + }; }; nand0: nand@40000000 { @@ -438,8 +528,8 @@ atmel,nand-cmd-offset = <22>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_nand>; - gpios = <&pioD 5 0 - &pioD 4 0 + gpios = <&pioD 5 GPIO_ACTIVE_HIGH + &pioD 4 GPIO_ACTIVE_HIGH 0 >; status = "disabled"; @@ -448,15 +538,15 @@ usb0: ohci@00500000 { compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00500000 0x00100000>; - interrupts = <22 4 2>; + interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; status = "disabled"; }; }; i2c@0 { compatible = "i2c-gpio"; - gpios = <&pioA 30 0 /* sda */ - &pioA 31 0 /* scl */ + gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */ + &pioA 31 GPIO_ACTIVE_HIGH /* scl */ >; i2c-gpio,sda-open-drain; i2c-gpio,scl-open-drain; diff --git a/arch/arm/boot/dts/at91sam9n12ek.dts b/arch/arm/boot/dts/at91sam9n12ek.dts index d30e48bd1e9d..d59b70c6a6a0 100644 --- a/arch/arm/boot/dts/at91sam9n12ek.dts +++ b/arch/arm/boot/dts/at91sam9n12ek.dts @@ -7,7 +7,7 @@ * Licensed under GPLv2 or later. */ /dts-v1/; -/include/ "at91sam9n12.dtsi" +#include "at91sam9n12.dtsi" / { model = "Atmel AT91SAM9N12-EK"; @@ -55,7 +55,7 @@ slot@0 { reg = <0>; bus-width = <4>; - cd-gpios = <&pioA 7 0>; + cd-gpios = <&pioA 7 GPIO_ACTIVE_HIGH>; }; }; @@ -63,7 +63,7 @@ mmc0 { pinctrl_board_mmc0: mmc0-board { atmel,pins = - <0 7 0x0 0x5>; /* PA7 gpio CD pin pull up and deglitch */ + <AT91_PIOA 7 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PA7 gpio CD pin pull up and deglitch */ }; }; }; @@ -77,6 +77,10 @@ reg = <0>; }; }; + + watchdog@fffffe40 { + status = "okay"; + }; }; nand0: nand@40000000 { @@ -95,19 +99,19 @@ d8 { label = "d8"; - gpios = <&pioB 4 1>; + gpios = <&pioB 4 GPIO_ACTIVE_LOW>; linux,default-trigger = "mmc0"; }; d9 { label = "d6"; - gpios = <&pioB 5 1>; + gpios = <&pioB 5 GPIO_ACTIVE_LOW>; linux,default-trigger = "nand-disk"; }; d10 { label = "d7"; - gpios = <&pioB 6 0>; + gpios = <&pioB 6 GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; }; }; @@ -117,7 +121,7 @@ enter { label = "Enter"; - gpios = <&pioB 4 1>; + gpios = <&pioB 4 GPIO_ACTIVE_LOW>; linux,code = <28>; gpio-key,wakeup; }; diff --git a/arch/arm/boot/dts/at91sam9x25.dtsi b/arch/arm/boot/dts/at91sam9x25.dtsi index 9ac2bc2b4f07..49e94aba938f 100644 --- a/arch/arm/boot/dts/at91sam9x25.dtsi +++ b/arch/arm/boot/dts/at91sam9x25.dtsi @@ -6,7 +6,7 @@ * Licensed under GPLv2. */ -/include/ "at91sam9x5.dtsi" +#include "at91sam9x5.dtsi" / { model = "Atmel AT91SAM9X25 SoC"; @@ -26,16 +26,16 @@ macb1 { pinctrl_macb1_rmii: macb1_rmii-0 { atmel,pins = - <2 16 0x2 0x0 /* PC16 periph B */ - 2 18 0x2 0x0 /* PC18 periph B */ - 2 19 0x2 0x0 /* PC19 periph B */ - 2 20 0x2 0x0 /* PC20 periph B */ - 2 21 0x2 0x0 /* PC21 periph B */ - 2 27 0x2 0x0 /* PC27 periph B */ - 2 28 0x2 0x0 /* PC28 periph B */ - 2 29 0x2 0x0 /* PC29 periph B */ - 2 30 0x2 0x0 /* PC30 periph B */ - 2 31 0x2 0x0>; /* PC31 periph B */ + <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC16 periph B */ + AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC18 periph B */ + AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC19 periph B */ + AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC20 periph B */ + AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC21 periph B */ + AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC27 periph B */ + AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC28 periph B */ + AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC29 periph B */ + AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC30 periph B */ + AT91_PIOC 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC31 periph B */ }; }; }; diff --git a/arch/arm/boot/dts/at91sam9x25ek.dts b/arch/arm/boot/dts/at91sam9x25ek.dts index 3b40d11d65e7..494864836e83 100644 --- a/arch/arm/boot/dts/at91sam9x25ek.dts +++ b/arch/arm/boot/dts/at91sam9x25ek.dts @@ -7,11 +7,11 @@ * Licensed under GPLv2 or later. */ /dts-v1/; -/include/ "at91sam9x25.dtsi" -/include/ "at91sam9x5ek.dtsi" +#include "at91sam9x25.dtsi" +#include "at91sam9x5ek.dtsi" / { - model = "Atmel AT91SAM9G25-EK"; + model = "Atmel AT91SAM9X25-EK"; compatible = "atmel,at91sam9x25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9"; ahb { diff --git a/arch/arm/boot/dts/at91sam9x35.dtsi b/arch/arm/boot/dts/at91sam9x35.dtsi index ba67d83d17ac..1a3d525a1f5d 100644 --- a/arch/arm/boot/dts/at91sam9x35.dtsi +++ b/arch/arm/boot/dts/at91sam9x35.dtsi @@ -6,7 +6,7 @@ * Licensed under GPLv2. */ -/include/ "at91sam9x5.dtsi" +#include "at91sam9x5.dtsi" / { model = "Atmel AT91SAM9X35 SoC"; diff --git a/arch/arm/boot/dts/at91sam9x35ek.dts b/arch/arm/boot/dts/at91sam9x35ek.dts index 6ad19a0d5424..343d32818ca3 100644 --- a/arch/arm/boot/dts/at91sam9x35ek.dts +++ b/arch/arm/boot/dts/at91sam9x35ek.dts @@ -7,8 +7,8 @@ * Licensed under GPLv2 or later. */ /dts-v1/; -/include/ "at91sam9x35.dtsi" -/include/ "at91sam9x5ek.dtsi" +#include "at91sam9x35.dtsi" +#include "at91sam9x5ek.dtsi" / { model = "Atmel AT91SAM9X35-EK"; diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi index 1145ac330fb7..ff4bd7a061b0 100644 --- a/arch/arm/boot/dts/at91sam9x5.dtsi +++ b/arch/arm/boot/dts/at91sam9x5.dtsi @@ -9,7 +9,10 @@ * Licensed under GPLv2 or later. */ -/include/ "skeleton.dtsi" +#include "skeleton.dtsi" +#include <dt-bindings/pinctrl/at91.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/gpio/gpio.h> / { model = "Atmel AT91SAM9x5 family SoC"; @@ -33,8 +36,12 @@ ssc0 = &ssc0; }; cpus { - cpu@0 { - compatible = "arm,arm926ejs"; + #address-cells = <0>; + #size-cells = <0>; + + cpu { + compatible = "arm,arm926ej-s"; + device_type = "cpu"; }; }; @@ -85,32 +92,32 @@ pit: timer@fffffe30 { compatible = "atmel,at91sam9260-pit"; reg = <0xfffffe30 0xf>; - interrupts = <1 4 7>; + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; }; tcb0: timer@f8008000 { compatible = "atmel,at91sam9x5-tcb"; reg = <0xf8008000 0x100>; - interrupts = <17 4 0>; + interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>; }; tcb1: timer@f800c000 { compatible = "atmel,at91sam9x5-tcb"; reg = <0xf800c000 0x100>; - interrupts = <17 4 0>; + interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>; }; dma0: dma-controller@ffffec00 { compatible = "atmel,at91sam9g45-dma"; reg = <0xffffec00 0x200>; - interrupts = <20 4 0>; + interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>; #dma-cells = <2>; }; dma1: dma-controller@ffffee00 { compatible = "atmel,at91sam9g45-dma"; reg = <0xffffee00 0x200>; - interrupts = <21 4 0>; + interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>; #dma-cells = <2>; }; @@ -124,297 +131,373 @@ dbgu { pinctrl_dbgu: dbgu-0 { atmel,pins = - <0 9 0x1 0x0 /* PA9 periph A */ - 0 10 0x1 0x1>; /* PA10 periph A with pullup */ + <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A */ + AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA10 periph A with pullup */ }; }; usart0 { pinctrl_usart0: usart0-0 { atmel,pins = - <0 0 0x1 0x1 /* PA0 periph A with pullup */ - 0 1 0x1 0x0>; /* PA1 periph A */ + <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA0 periph A with pullup */ + AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA1 periph A */ }; pinctrl_usart0_rts: usart0_rts-0 { atmel,pins = - <0 2 0x1 0x0>; /* PA2 periph A */ + <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A */ }; pinctrl_usart0_cts: usart0_cts-0 { atmel,pins = - <0 3 0x1 0x0>; /* PA3 periph A */ + <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA3 periph A */ }; pinctrl_usart0_sck: usart0_sck-0 { atmel,pins = - <0 4 0x1 0x0>; /* PA4 periph A */ + <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA4 periph A */ }; }; usart1 { pinctrl_usart1: usart1-0 { atmel,pins = - <0 5 0x1 0x1 /* PA5 periph A with pullup */ - 0 6 0x1 0x0>; /* PA6 periph A */ + <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA5 periph A with pullup */ + AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA6 periph A */ }; pinctrl_usart1_rts: usart1_rts-0 { atmel,pins = - <2 27 0x3 0x0>; /* PC27 periph C */ + <AT91_PIOC 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC27 periph C */ }; pinctrl_usart1_cts: usart1_cts-0 { atmel,pins = - <2 28 0x3 0x0>; /* PC28 periph C */ + <AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C */ }; pinctrl_usart1_sck: usart1_sck-0 { atmel,pins = - <2 28 0x3 0x0>; /* PC29 periph C */ + <AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC29 periph C */ }; }; usart2 { pinctrl_usart2: usart2-0 { atmel,pins = - <0 7 0x1 0x1 /* PA7 periph A with pullup */ - 0 8 0x1 0x0>; /* PA8 periph A */ + <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */ + AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */ }; pinctrl_uart2_rts: uart2_rts-0 { atmel,pins = - <1 0 0x2 0x0>; /* PB0 periph B */ + <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */ }; pinctrl_uart2_cts: uart2_cts-0 { atmel,pins = - <1 1 0x2 0x0>; /* PB1 periph B */ + <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */ }; pinctrl_usart2_sck: usart2_sck-0 { atmel,pins = - <1 2 0x2 0x0>; /* PB2 periph B */ + <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB2 periph B */ }; }; usart3 { pinctrl_usart3: usart3-0 { atmel,pins = - <2 22 0x2 0x1 /* PC22 periph B with pullup */ - 2 23 0x2 0x0>; /* PC23 periph B */ + <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PC22 periph B with pullup */ + AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC23 periph B */ }; pinctrl_usart3_rts: usart3_rts-0 { atmel,pins = - <2 24 0x2 0x0>; /* PC24 periph B */ + <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC24 periph B */ }; pinctrl_usart3_cts: usart3_cts-0 { atmel,pins = - <2 25 0x2 0x0>; /* PC25 periph B */ + <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC25 periph B */ }; pinctrl_usart3_sck: usart3_sck-0 { atmel,pins = - <2 26 0x2 0x0>; /* PC26 periph B */ + <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC26 periph B */ }; }; uart0 { pinctrl_uart0: uart0-0 { atmel,pins = - <2 8 0x3 0x0 /* PC8 periph C */ - 2 9 0x3 0x1>; /* PC9 periph C with pullup */ + <AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC8 periph C */ + AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>; /* PC9 periph C with pullup */ }; }; uart1 { pinctrl_uart1: uart1-0 { atmel,pins = - <2 16 0x3 0x0 /* PC16 periph C */ - 2 17 0x3 0x1>; /* PC17 periph C with pullup */ + <AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC16 periph C */ + AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>; /* PC17 periph C with pullup */ }; }; nand { pinctrl_nand: nand-0 { atmel,pins = - <3 0 0x1 0x0 /* PD0 periph A Read Enable */ - 3 1 0x1 0x0 /* PD1 periph A Write Enable */ - 3 2 0x1 0x0 /* PD2 periph A Address Latch Enable */ - 3 3 0x1 0x0 /* PD3 periph A Command Latch Enable */ - 3 4 0x0 0x1 /* PD4 gpio Chip Enable pin pull_up */ - 3 5 0x0 0x1 /* PD5 gpio RDY/BUSY pin pull_up */ - 3 6 0x1 0x0 /* PD6 periph A Data bit 0 */ - 3 7 0x1 0x0 /* PD7 periph A Data bit 1 */ - 3 8 0x1 0x0 /* PD8 periph A Data bit 2 */ - 3 9 0x1 0x0 /* PD9 periph A Data bit 3 */ - 3 10 0x1 0x0 /* PD10 periph A Data bit 4 */ - 3 11 0x1 0x0 /* PD11 periph A Data bit 5 */ - 3 12 0x1 0x0 /* PD12 periph A Data bit 6 */ - 3 13 0x1 0x0>; /* PD13 periph A Data bit 7 */ + <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD0 periph A Read Enable */ + AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD1 periph A Write Enable */ + AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD2 periph A Address Latch Enable */ + AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD3 periph A Command Latch Enable */ + AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD4 gpio Chip Enable pin pull_up */ + AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD5 gpio RDY/BUSY pin pull_up */ + AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD6 periph A Data bit 0 */ + AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD7 periph A Data bit 1 */ + AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD8 periph A Data bit 2 */ + AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD9 periph A Data bit 3 */ + AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A Data bit 4 */ + AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A Data bit 5 */ + AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD12 periph A Data bit 6 */ + AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD13 periph A Data bit 7 */ }; pinctrl_nand_16bits: nand_16bits-0 { atmel,pins = - <3 14 0x1 0x0 /* PD14 periph A Data bit 8 */ - 3 15 0x1 0x0 /* PD15 periph A Data bit 9 */ - 3 16 0x1 0x0 /* PD16 periph A Data bit 10 */ - 3 17 0x1 0x0 /* PD17 periph A Data bit 11 */ - 3 18 0x1 0x0 /* PD18 periph A Data bit 12 */ - 3 19 0x1 0x0 /* PD19 periph A Data bit 13 */ - 3 20 0x1 0x0 /* PD20 periph A Data bit 14 */ - 3 21 0x1 0x0>; /* PD21 periph A Data bit 15 */ + <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD14 periph A Data bit 8 */ + AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD15 periph A Data bit 9 */ + AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD16 periph A Data bit 10 */ + AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD17 periph A Data bit 11 */ + AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD18 periph A Data bit 12 */ + AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD19 periph A Data bit 13 */ + AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD20 periph A Data bit 14 */ + AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A Data bit 15 */ }; }; macb0 { pinctrl_macb0_rmii: macb0_rmii-0 { atmel,pins = - <1 0 0x1 0x0 /* PB0 periph A */ - 1 1 0x1 0x0 /* PB1 periph A */ - 1 2 0x1 0x0 /* PB2 periph A */ - 1 3 0x1 0x0 /* PB3 periph A */ - 1 4 0x1 0x0 /* PB4 periph A */ - 1 5 0x1 0x0 /* PB5 periph A */ - 1 6 0x1 0x0 /* PB6 periph A */ - 1 7 0x1 0x0 /* PB7 periph A */ - 1 9 0x1 0x0 /* PB9 periph A */ - 1 10 0x1 0x0>; /* PB10 periph A */ + <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A */ + AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A */ + AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB2 periph A */ + AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A */ + AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */ + AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB5 periph A */ + AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */ + AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */ + AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */ + AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB10 periph A */ }; pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 { atmel,pins = - <1 8 0x1 0x0 /* PB8 periph A */ - 1 11 0x1 0x0 /* PB11 periph A */ - 1 12 0x1 0x0 /* PB12 periph A */ - 1 13 0x1 0x0 /* PB13 periph A */ - 1 14 0x1 0x0 /* PB14 periph A */ - 1 15 0x1 0x0 /* PB15 periph A */ - 1 16 0x1 0x0 /* PB16 periph A */ - 1 17 0x1 0x0>; /* PB17 periph A */ + <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB8 periph A */ + AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A */ + AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */ + AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A */ + AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A */ + AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A */ + AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */ + AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB17 periph A */ }; }; mmc0 { pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 { atmel,pins = - <0 17 0x1 0x0 /* PA17 periph A */ - 0 16 0x1 0x1 /* PA16 periph A with pullup */ - 0 15 0x1 0x1>; /* PA15 periph A with pullup */ + <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */ + AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */ + AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA15 periph A with pullup */ }; pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { atmel,pins = - <0 18 0x1 0x1 /* PA18 periph A with pullup */ - 0 19 0x1 0x1 /* PA19 periph A with pullup */ - 0 20 0x1 0x1>; /* PA20 periph A with pullup */ + <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */ + AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */ + AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */ }; }; mmc1 { pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 { atmel,pins = - <0 13 0x2 0x0 /* PA13 periph B */ - 0 12 0x2 0x1 /* PA12 periph B with pullup */ - 0 11 0x2 0x1>; /* PA11 periph B with pullup */ + <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA13 periph B */ + AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA12 periph B with pullup */ + AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA11 periph B with pullup */ }; pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 { atmel,pins = - <0 2 0x2 0x1 /* PA2 periph B with pullup */ - 0 3 0x2 0x1 /* PA3 periph B with pullup */ - 0 4 0x2 0x1>; /* PA4 periph B with pullup */ + <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA2 periph B with pullup */ + AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA3 periph B with pullup */ + AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA4 periph B with pullup */ }; }; ssc0 { pinctrl_ssc0_tx: ssc0_tx-0 { atmel,pins = - <0 24 0x2 0x0 /* PA24 periph B */ - 0 25 0x2 0x0 /* PA25 periph B */ - 0 26 0x2 0x0>; /* PA26 periph B */ + <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */ + AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */ + AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA26 periph B */ }; pinctrl_ssc0_rx: ssc0_rx-0 { atmel,pins = - <0 27 0x2 0x0 /* PA27 periph B */ - 0 28 0x2 0x0 /* PA28 periph B */ - 0 29 0x2 0x0>; /* PA29 periph B */ + <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */ + AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */ + AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */ }; }; spi0 { pinctrl_spi0: spi0-0 { atmel,pins = - <0 11 0x1 0x0 /* PA11 periph A SPI0_MISO pin */ - 0 12 0x1 0x0 /* PA12 periph A SPI0_MOSI pin */ - 0 13 0x1 0x0>; /* PA13 periph A SPI0_SPCK pin */ + <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A SPI0_MISO pin */ + AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A SPI0_MOSI pin */ + AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA13 periph A SPI0_SPCK pin */ }; }; spi1 { pinctrl_spi1: spi1-0 { atmel,pins = - <0 21 0x2 0x0 /* PA21 periph B SPI1_MISO pin */ - 0 22 0x2 0x0 /* PA22 periph B SPI1_MOSI pin */ - 0 23 0x2 0x0>; /* PA23 periph B SPI1_SPCK pin */ + <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA21 periph B SPI1_MISO pin */ + AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B SPI1_MOSI pin */ + AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B SPI1_SPCK pin */ }; }; i2c0 { pinctrl_i2c0: i2c0-0 { atmel,pins = - <0 30 0x1 0x0 /* PA30 periph A I2C0 data */ - 0 31 0x1 0x0>; /* PA31 periph A I2C0 clock */ + <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A I2C0 data */ + AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A I2C0 clock */ }; }; i2c1 { pinctrl_i2c1: i2c1-0 { atmel,pins = - <2 0 0x3 0x0 /* PC0 periph C I2C1 data */ - 2 1 0x3 0x0>; /* PC1 periph C I2C1 clock */ + <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC0 periph C I2C1 data */ + AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC1 periph C I2C1 clock */ }; }; i2c2 { pinctrl_i2c2: i2c2-0 { atmel,pins = - <1 4 0x2 0x0 /* PB4 periph B I2C2 data */ - 1 5 0x2 0x0>; /* PB5 periph B I2C2 clock */ + <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB4 periph B I2C2 data */ + AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B I2C2 clock */ }; }; i2c_gpio0 { pinctrl_i2c_gpio0: i2c_gpio0-0 { atmel,pins = - <0 30 0x0 0x2 /* PA30 gpio multidrive I2C0 data */ - 0 31 0x0 0x2>; /* PA31 gpio multidrive I2C0 clock */ + <AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PA30 gpio multidrive I2C0 data */ + AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PA31 gpio multidrive I2C0 clock */ }; }; i2c_gpio1 { pinctrl_i2c_gpio1: i2c_gpio1-0 { atmel,pins = - <2 0 0x0 0x2 /* PC0 gpio multidrive I2C1 data */ - 2 1 0x0 0x2>; /* PC1 gpio multidrive I2C1 clock */ + <AT91_PIOC 0 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PC0 gpio multidrive I2C1 data */ + AT91_PIOC 1 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PC1 gpio multidrive I2C1 clock */ }; }; i2c_gpio2 { pinctrl_i2c_gpio2: i2c_gpio2-0 { atmel,pins = - <1 4 0x0 0x2 /* PB4 gpio multidrive I2C2 data */ - 1 5 0x0 0x2>; /* PB5 gpio multidrive I2C2 clock */ + <AT91_PIOB 4 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PB4 gpio multidrive I2C2 data */ + AT91_PIOB 5 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PB5 gpio multidrive I2C2 clock */ + }; + }; + + tcb0 { + pinctrl_tcb0_tclk0: tcb0_tclk0-0 { + atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tclk1: tcb0_tclk1-0 { + atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tclk2: tcb0_tclk2-0 { + atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tioa0: tcb0_tioa0-0 { + atmel,pins = <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tioa1: tcb0_tioa1-0 { + atmel,pins = <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tioa2: tcb0_tioa2-0 { + atmel,pins = <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tiob0: tcb0_tiob0-0 { + atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tiob1: tcb0_tiob1-0 { + atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb0_tiob2: tcb0_tiob2-0 { + atmel,pins = <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + }; + + tcb1 { + pinctrl_tcb1_tclk0: tcb1_tclk0-0 { + atmel,pins = <AT91_PIOC 4 AT91_PERIPH_C AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb1_tclk1: tcb1_tclk1-0 { + atmel,pins = <AT91_PIOC 7 AT91_PERIPH_C AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb1_tclk2: tcb1_tclk2-0 { + atmel,pins = <AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb1_tioa0: tcb1_tioa0-0 { + atmel,pins = <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb1_tioa1: tcb1_tioa1-0 { + atmel,pins = <AT91_PIOC 5 AT91_PERIPH_C AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb1_tioa2: tcb1_tioa2-0 { + atmel,pins = <AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb1_tiob0: tcb1_tiob0-0 { + atmel,pins = <AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb1_tiob1: tcb1_tiob1-0 { + atmel,pins = <AT91_PIOC 6 AT91_PERIPH_C AT91_PINCTRL_NONE>; + }; + + pinctrl_tcb1_tiob2: tcb1_tiob2-0 { + atmel,pins = <AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE>; }; }; pioA: gpio@fffff400 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffff400 0x200>; - interrupts = <2 4 1>; + interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -424,7 +507,7 @@ pioB: gpio@fffff600 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffff600 0x200>; - interrupts = <2 4 1>; + interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; #gpio-cells = <2>; gpio-controller; #gpio-lines = <19>; @@ -435,7 +518,7 @@ pioC: gpio@fffff800 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffff800 0x200>; - interrupts = <3 4 1>; + interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -445,7 +528,7 @@ pioD: gpio@fffffa00 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffffa00 0x200>; - interrupts = <3 4 1>; + interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; #gpio-cells = <2>; gpio-controller; #gpio-lines = <22>; @@ -457,7 +540,7 @@ ssc0: ssc@f0010000 { compatible = "atmel,at91sam9g45-ssc"; reg = <0xf0010000 0x4000>; - interrupts = <28 4 5>; + interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; status = "disabled"; @@ -466,7 +549,7 @@ mmc0: mmc@f0008000 { compatible = "atmel,hsmci"; reg = <0xf0008000 0x600>; - interrupts = <12 4 0>; + interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>; dmas = <&dma0 1 0>; dma-names = "rxtx"; #address-cells = <1>; @@ -477,7 +560,7 @@ mmc1: mmc@f000c000 { compatible = "atmel,hsmci"; reg = <0xf000c000 0x600>; - interrupts = <26 4 0>; + interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>; dmas = <&dma1 1 0>; dma-names = "rxtx"; #address-cells = <1>; @@ -488,7 +571,7 @@ dbgu: serial@fffff200 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffff200 0x200>; - interrupts = <1 4 7>; + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_dbgu>; status = "disabled"; @@ -497,7 +580,7 @@ usart0: serial@f801c000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf801c000 0x200>; - interrupts = <5 4 5>; + interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart0>; status = "disabled"; @@ -506,7 +589,7 @@ usart1: serial@f8020000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf8020000 0x200>; - interrupts = <6 4 5>; + interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart1>; status = "disabled"; @@ -515,7 +598,7 @@ usart2: serial@f8024000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf8024000 0x200>; - interrupts = <7 4 5>; + interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart2>; status = "disabled"; @@ -524,7 +607,7 @@ macb0: ethernet@f802c000 { compatible = "cdns,at32ap7000-macb", "cdns,macb"; reg = <0xf802c000 0x100>; - interrupts = <24 4 3>; + interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_macb0_rmii>; status = "disabled"; @@ -533,14 +616,14 @@ macb1: ethernet@f8030000 { compatible = "cdns,at32ap7000-macb", "cdns,macb"; reg = <0xf8030000 0x100>; - interrupts = <27 4 3>; + interrupts = <27 IRQ_TYPE_LEVEL_HIGH 3>; status = "disabled"; }; i2c0: i2c@f8010000 { compatible = "atmel,at91sam9x5-i2c"; reg = <0xf8010000 0x100>; - interrupts = <9 4 6>; + interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>; dmas = <&dma0 1 7>, <&dma0 1 8>; dma-names = "tx", "rx"; @@ -554,7 +637,7 @@ i2c1: i2c@f8014000 { compatible = "atmel,at91sam9x5-i2c"; reg = <0xf8014000 0x100>; - interrupts = <10 4 6>; + interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>; dmas = <&dma1 1 5>, <&dma1 1 6>; dma-names = "tx", "rx"; @@ -568,7 +651,7 @@ i2c2: i2c@f8018000 { compatible = "atmel,at91sam9x5-i2c"; reg = <0xf8018000 0x100>; - interrupts = <11 4 6>; + interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>; dmas = <&dma0 1 9>, <&dma0 1 10>; dma-names = "tx", "rx"; @@ -579,10 +662,28 @@ status = "disabled"; }; + uart0: serial@f8040000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xf8040000 0x200>; + interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart0>; + status = "disabled"; + }; + + uart1: serial@f8044000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xf8044000 0x200>; + interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "disabled"; + }; + adc0: adc@f804c000 { compatible = "atmel,at91sam9260-adc"; reg = <0xf804c000 0x100>; - interrupts = <19 4 0>; + interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>; atmel,adc-use-external; atmel,adc-channels-used = <0xffff>; atmel,adc-vref = <3300>; @@ -625,7 +726,7 @@ #size-cells = <0>; compatible = "atmel,at91rm9200-spi"; reg = <0xf0000000 0x100>; - interrupts = <13 4 3>; + interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi0>; status = "disabled"; @@ -636,16 +737,22 @@ #size-cells = <0>; compatible = "atmel,at91rm9200-spi"; reg = <0xf0004000 0x100>; - interrupts = <14 4 3>; + interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi1>; status = "disabled"; }; + watchdog@fffffe40 { + compatible = "atmel,at91sam9260-wdt"; + reg = <0xfffffe40 0x10>; + status = "disabled"; + }; + rtc@fffffeb0 { - compatible = "atmel,at91rm9200-rtc"; + compatible = "atmel,at91sam9x5-rtc"; reg = <0xfffffeb0 0x40>; - interrupts = <1 4 7>; + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; status = "disabled"; }; }; @@ -664,8 +771,8 @@ atmel,nand-cmd-offset = <22>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_nand>; - gpios = <&pioD 5 0 - &pioD 4 0 + gpios = <&pioD 5 GPIO_ACTIVE_HIGH + &pioD 4 GPIO_ACTIVE_HIGH 0 >; status = "disabled"; @@ -674,22 +781,22 @@ usb0: ohci@00600000 { compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00600000 0x100000>; - interrupts = <22 4 2>; + interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; status = "disabled"; }; usb1: ehci@00700000 { compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; reg = <0x00700000 0x100000>; - interrupts = <22 4 2>; + interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; status = "disabled"; }; }; i2c@0 { compatible = "i2c-gpio"; - gpios = <&pioA 30 0 /* sda */ - &pioA 31 0 /* scl */ + gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */ + &pioA 31 GPIO_ACTIVE_HIGH /* scl */ >; i2c-gpio,sda-open-drain; i2c-gpio,scl-open-drain; @@ -703,8 +810,8 @@ i2c@1 { compatible = "i2c-gpio"; - gpios = <&pioC 0 0 /* sda */ - &pioC 1 0 /* scl */ + gpios = <&pioC 0 GPIO_ACTIVE_HIGH /* sda */ + &pioC 1 GPIO_ACTIVE_HIGH /* scl */ >; i2c-gpio,sda-open-drain; i2c-gpio,scl-open-drain; @@ -718,8 +825,8 @@ i2c@2 { compatible = "i2c-gpio"; - gpios = <&pioB 4 0 /* sda */ - &pioB 5 0 /* scl */ + gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */ + &pioB 5 GPIO_ACTIVE_HIGH /* scl */ >; i2c-gpio,sda-open-drain; i2c-gpio,scl-open-drain; diff --git a/arch/arm/boot/dts/at91sam9x5cm.dtsi b/arch/arm/boot/dts/at91sam9x5cm.dtsi index 347a74a857f6..4a5ee5cc115a 100644 --- a/arch/arm/boot/dts/at91sam9x5cm.dtsi +++ b/arch/arm/boot/dts/at91sam9x5cm.dtsi @@ -28,7 +28,7 @@ pinctrl@fffff400 { 1wire_cm { pinctrl_1wire_cm: 1wire_cm-0 { - atmel,pins = <1 18 0x0 0x2>; /* PB18 multidrive, conflicts with led */ + atmel,pins = <AT91_PIOB 18 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PB18 multidrive, conflicts with led */ }; }; }; @@ -75,19 +75,19 @@ pb18 { label = "pb18"; - gpios = <&pioB 18 1>; + gpios = <&pioB 18 GPIO_ACTIVE_LOW>; linux,default-trigger = "heartbeat"; }; pd21 { label = "pd21"; - gpios = <&pioD 21 0>; + gpios = <&pioD 21 GPIO_ACTIVE_HIGH>; }; }; 1wire_cm { compatible = "w1-gpio"; - gpios = <&pioB 18 0>; + gpios = <&pioB 18 GPIO_ACTIVE_HIGH>; linux,open-drain; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_1wire_cm>; diff --git a/arch/arm/boot/dts/at91sam9x5ek.dtsi b/arch/arm/boot/dts/at91sam9x5ek.dtsi index 1fa48d2bfd80..5930b0eb68a7 100644 --- a/arch/arm/boot/dts/at91sam9x5ek.dtsi +++ b/arch/arm/boot/dts/at91sam9x5ek.dtsi @@ -6,7 +6,7 @@ * * Licensed under GPLv2 or later. */ -/include/ "at91sam9x5cm.dtsi" +#include "at91sam9x5cm.dtsi" / { model = "Atmel AT91SAM9X5-EK"; @@ -27,7 +27,7 @@ slot@0 { reg = <0>; bus-width = <4>; - cd-gpios = <&pioD 15 0>; + cd-gpios = <&pioD 15 GPIO_ACTIVE_HIGH>; }; }; @@ -40,7 +40,7 @@ slot@0 { reg = <0>; bus-width = <4>; - cd-gpios = <&pioD 14 0>; + cd-gpios = <&pioD 14 GPIO_ACTIVE_HIGH>; }; }; @@ -60,14 +60,14 @@ mmc0 { pinctrl_board_mmc0: mmc0-board { atmel,pins = - <3 15 0x0 0x5>; /* PD15 gpio CD pin pull up and deglitch */ + <AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD15 gpio CD pin pull up and deglitch */ }; }; mmc1 { pinctrl_board_mmc1: mmc1-board { atmel,pins = - <3 14 0x0 0x5>; /* PD14 gpio CD pin pull up and deglitch */ + <AT91_PIOD 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD14 gpio CD pin pull up and deglitch */ }; }; }; @@ -81,13 +81,17 @@ reg = <0>; }; }; + + watchdog@fffffe40 { + status = "okay"; + }; }; usb0: ohci@00600000 { status = "okay"; num-ports = <2>; - atmel,vbus-gpio = <&pioD 19 1 - &pioD 20 1 + atmel,vbus-gpio = <&pioD 19 GPIO_ACTIVE_LOW + &pioD 20 GPIO_ACTIVE_LOW >; }; diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi index f0052dccf9a8..1e12aeff403b 100644 --- a/arch/arm/boot/dts/bcm2835.dtsi +++ b/arch/arm/boot/dts/bcm2835.dtsi @@ -44,6 +44,7 @@ reg = <0x7e201000 0x1000>; interrupts = <2 25>; clock-frequency = <3000000>; + arm,primecell-periphid = <0x00241011>; }; gpio: gpio { diff --git a/arch/arm/boot/dts/ethernut5.dts b/arch/arm/boot/dts/ethernut5.dts index 1ea9d34460a4..143b6d25bc80 100644 --- a/arch/arm/boot/dts/ethernut5.dts +++ b/arch/arm/boot/dts/ethernut5.dts @@ -6,7 +6,7 @@ * Licensed under GPLv2. */ /dts-v1/; -/include/ "at91sam9260.dtsi" +#include "at91sam9260.dtsi" / { model = "Ethernut 5"; @@ -40,7 +40,7 @@ }; usb1: gadget@fffa4000 { - atmel,vbus-gpio = <&pioC 5 0>; + atmel,vbus-gpio = <&pioC 5 GPIO_ACTIVE_HIGH>; status = "okay"; }; }; @@ -52,7 +52,7 @@ status = "okay"; gpios = <0 - &pioC 14 0 + &pioC 14 GPIO_ACTIVE_HIGH 0 >; diff --git a/arch/arm/boot/dts/evk-pro3.dts b/arch/arm/boot/dts/evk-pro3.dts index 96e50f569433..4d829685fdfb 100644 --- a/arch/arm/boot/dts/evk-pro3.dts +++ b/arch/arm/boot/dts/evk-pro3.dts @@ -9,7 +9,7 @@ /dts-v1/; -/include/ "ge863-pro3.dtsi" +#include "ge863-pro3.dtsi" / { model = "Telit EVK-PRO3 for Telit GE863-PRO3"; @@ -31,7 +31,7 @@ }; usb1: gadget@fffa4000 { - atmel,vbus-gpio = <&pioC 5 0>; + atmel,vbus-gpio = <&pioC 5 GPIO_ACTIVE_HIGH>; status = "okay"; }; @@ -50,4 +50,4 @@ status = "okay"; }; -};
\ No newline at end of file +}; diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi index 359694c78918..bed40ee2e4f6 100644 --- a/arch/arm/boot/dts/exynos4.dtsi +++ b/arch/arm/boot/dts/exynos4.dtsi @@ -160,6 +160,8 @@ reg = <0x13400000 0x10000>; interrupts = <0 94 0>; samsung,power-domain = <&pd_mfc>; + clocks = <&clock 170>, <&clock 273>; + clock-names = "sclk_mfc", "mfc"; status = "disabled"; }; diff --git a/arch/arm/boot/dts/exynos4210-origen.dts b/arch/arm/boot/dts/exynos4210-origen.dts index 524b90846df5..bcf80794caab 100644 --- a/arch/arm/boot/dts/exynos4210-origen.dts +++ b/arch/arm/boot/dts/exynos4210-origen.dts @@ -41,6 +41,10 @@ enable-active-high; }; + tmu@100C0000 { + status = "okay"; + }; + sdhci@12530000 { bus-width = <4>; pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4 &sd2_cd>; @@ -83,6 +87,149 @@ status = "okay"; }; + i2c@13860000 { + status = "okay"; + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <20000>; + pinctrl-0 = <&i2c0_bus>; + pinctrl-names = "default"; + + max8997_pmic@66 { + compatible = "maxim,max8997-pmic"; + reg = <0x66>; + interrupt-parent = <&gpx0>; + interrupts = <4 0>, <3 0>; + + max8997,pmic-buck1-dvs-voltage = <1350000>; + max8997,pmic-buck2-dvs-voltage = <1100000>; + max8997,pmic-buck5-dvs-voltage = <1200000>; + + regulators { + ldo1_reg: LDO1 { + regulator-name = "VDD_ABB_3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + ldo2_reg: LDO2 { + regulator-name = "VDD_ALIVE_1.1V"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-always-on; + }; + + ldo3_reg: LDO3 { + regulator-name = "VMIPI_1.1V"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + }; + + ldo4_reg: LDO4 { + regulator-name = "VDD_RTC_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo6_reg: LDO6 { + regulator-name = "VMIPI_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo7_reg: LDO7 { + regulator-name = "VDD_AUD_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + ldo8_reg: LDO8 { + regulator-name = "VADC_3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + ldo9_reg: LDO9 { + regulator-name = "DVDD_SWB_2.8V"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + }; + + ldo10_reg: LDO10 { + regulator-name = "VDD_PLL_1.1V"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-always-on; + }; + + ldo11_reg: LDO11 { + regulator-name = "VDD_AUD_3V"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + }; + + ldo14_reg: LDO14 { + regulator-name = "AVDD18_SWB_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo17_reg: LDO17 { + regulator-name = "VDD_SWB_3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + ldo21_reg: LDO21 { + regulator-name = "VDD_MIF_1.2V"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + }; + + buck1_reg: BUCK1 { + regulator-name = "VDD_ARM_1.2V"; + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + regulator-boot-on; + }; + + buck2_reg: BUCK2 { + regulator-name = "VDD_INT_1.1V"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1100000>; + regulator-always-on; + regulator-boot-on; + }; + + buck3_reg: BUCK3 { + regulator-name = "VDD_G3D_1.1V"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1100000>; + }; + + buck5_reg: BUCK5 { + regulator-name = "VDDQ_M1M2_1.2V"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + }; + + buck7_reg: BUCK7 { + regulator-name = "VDD_LCD_3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + }; + }; + }; + }; + gpio_keys { compatible = "gpio-keys"; #address-cells = <1>; diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi index 54710de82908..d4f8067e89ba 100644 --- a/arch/arm/boot/dts/exynos4210.dtsi +++ b/arch/arm/boot/dts/exynos4210.dtsi @@ -112,12 +112,17 @@ interrupt-parent = <&combiner>; reg = <0x100C0000 0x100>; interrupts = <2 4>; + clocks = <&clock 383>; + clock-names = "tmu_apbif"; + status = "disabled"; }; g2d@12800000 { compatible = "samsung,s5pv210-g2d"; reg = <0x12800000 0x1000>; interrupts = <0 89 0>; + clocks = <&clock 177>, <&clock 277>; + clock-names = "sclk_fimg2d", "fimg2d"; status = "disabled"; }; }; diff --git a/arch/arm/boot/dts/exynos4412-odroidx.dts b/arch/arm/boot/dts/exynos4412-odroidx.dts index 53bc8bf77984..867d9452619b 100644 --- a/arch/arm/boot/dts/exynos4412-odroidx.dts +++ b/arch/arm/boot/dts/exynos4412-odroidx.dts @@ -43,6 +43,7 @@ #size-cells = <0>; pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>; pinctrl-names = "default"; + vmmc-supply = <&ldo20_reg &buck8_reg>; status = "okay"; num-slots = <1>; @@ -78,6 +79,7 @@ bus-width = <4>; pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>; pinctrl-names = "default"; + vmmc-supply = <&ldo4_reg &ldo21_reg>; status = "okay"; }; @@ -108,4 +110,199 @@ clock-frequency = <24000000>; }; }; + + i2c@13860000 { + pinctrl-0 = <&i2c0_bus>; + pinctrl-names = "default"; + status = "okay"; + + max77686: pmic@09 { + compatible = "maxim,max77686"; + reg = <0x09>; + + voltage-regulators { + ldo1_reg: LDO1 { + regulator-name = "VDD_ALIVE_1.0V"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + }; + + ldo2_reg: LDO2 { + regulator-name = "VDDQ_M1_2_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo3_reg: LDO3 { + regulator-name = "VDDQ_EXT_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo4_reg: LDO4 { + regulator-name = "VDDQ_MMC2_2.8V"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo5_reg: LDO5 { + regulator-name = "VDDQ_MMC1_3_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo6_reg: LDO6 { + regulator-name = "VDD10_MPLL_1.0V"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + }; + + ldo7_reg: LDO7 { + regulator-name = "VDD10_XPLL_1.0V"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + }; + + ldo11_reg: LDO11 { + regulator-name = "VDD18_ABB1_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo12_reg: LDO12 { + regulator-name = "VDD33_USB_3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo13_reg: LDO13 { + regulator-name = "VDDQ_C2C_W_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo14_reg: LDO14 { + regulator-name = "VDD18_ABB0_2_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo15_reg: LDO15 { + regulator-name = "VDD10_HSIC_1.0V"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo16_reg: LDO16 { + regulator-name = "VDD18_HSIC_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo20_reg: LDO20 { + regulator-name = "LDO20_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + }; + + ldo21_reg: LDO21 { + regulator-name = "LDO21_3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo25_reg: LDO25 { + regulator-name = "VDDQ_LCD_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + buck1_reg: BUCK1 { + regulator-name = "vdd_mif"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + regulator-boot-on; + }; + + buck2_reg: BUCK2 { + regulator-name = "vdd_arm"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1300000>; + regulator-always-on; + regulator-boot-on; + }; + + buck3_reg: BUCK3 { + regulator-name = "vdd_int"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + regulator-boot-on; + }; + + buck4_reg: BUCK4 { + regulator-name = "vdd_g3d"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1100000>; + regulator-microvolt-offset = <50000>; + }; + + buck5_reg: BUCK5 { + regulator-name = "VDDQ_CKEM1_2_1.2V"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + regulator-boot-on; + }; + + buck6_reg: BUCK6 { + regulator-name = "BUCK6_1.35V"; + regulator-min-microvolt = <1350000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + regulator-boot-on; + }; + + buck7_reg: BUCK7 { + regulator-name = "BUCK7_2.0V"; + regulator-min-microvolt = <2000000>; + regulator-max-microvolt = <2000000>; + regulator-always-on; + }; + + buck8_reg: BUCK8 { + regulator-name = "BUCK8_2.8V"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + }; + }; + }; + }; }; diff --git a/arch/arm/boot/dts/exynos4412-origen.dts b/arch/arm/boot/dts/exynos4412-origen.dts index 1c21bad32ca9..ca73c42f77e1 100644 --- a/arch/arm/boot/dts/exynos4412-origen.dts +++ b/arch/arm/boot/dts/exynos4412-origen.dts @@ -36,6 +36,72 @@ enable-active-high; }; + pinctrl@11000000 { + keypad_rows: keypad-rows { + samsung,pins = "gpx2-0", "gpx2-1", "gpx2-2"; + samsung,pin-function = <3>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + keypad_cols: keypad-cols { + samsung,pins = "gpx1-0", "gpx1-1"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + }; + + keypad@100A0000 { + samsung,keypad-num-rows = <3>; + samsung,keypad-num-columns = <2>; + linux,keypad-no-autorepeat; + linux,keypad-wakeup; + pinctrl-0 = <&keypad_rows &keypad_cols>; + pinctrl-names = "default"; + status = "okay"; + + key_home { + keypad,row = <0>; + keypad,column = <0>; + linux,code = <102>; + }; + + key_down { + keypad,row = <0>; + keypad,column = <1>; + linux,code = <108>; + }; + + key_up { + keypad,row = <1>; + keypad,column = <0>; + linux,code = <103>; + }; + + key_menu { + keypad,row = <1>; + keypad,column = <1>; + linux,code = <139>; + }; + + key_back { + keypad,row = <2>; + keypad,column = <0>; + linux,code = <158>; + }; + + key_enter { + keypad,row = <2>; + keypad,column = <1>; + linux,code = <28>; + }; + }; + + g2d@10800000 { + status = "okay"; + }; + sdhci@12530000 { bus-width = <4>; pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4 &sd2_cd>; diff --git a/arch/arm/boot/dts/exynos4412-smdk4412.dts b/arch/arm/boot/dts/exynos4412-smdk4412.dts index dd564310d4a5..a8ba195c41ac 100644 --- a/arch/arm/boot/dts/exynos4412-smdk4412.dts +++ b/arch/arm/boot/dts/exynos4412-smdk4412.dts @@ -31,8 +31,91 @@ status = "okay"; }; - g2d@10800000 { + pinctrl@11000000 { + keypad_rows: keypad-rows { + samsung,pins = "gpx2-0", "gpx2-1", "gpx2-2"; + samsung,pin-function = <3>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + keypad_cols: keypad-cols { + samsung,pins = "gpx1-0", "gpx1-1", "gpx1-2", "gpx1-3", + "gpx1-4", "gpx1-5", "gpx1-6", "gpx1-7"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + }; + + keypad@100A0000 { + samsung,keypad-num-rows = <3>; + samsung,keypad-num-columns = <8>; + linux,keypad-no-autorepeat; + linux,keypad-wakeup; + pinctrl-0 = <&keypad_rows &keypad_cols>; + pinctrl-names = "default"; status = "okay"; + + key_1 { + keypad,row = <1>; + keypad,column = <3>; + linux,code = <2>; + }; + + key_2 { + keypad,row = <1>; + keypad,column = <4>; + linux,code = <3>; + }; + + key_3 { + keypad,row = <1>; + keypad,column = <5>; + linux,code = <4>; + }; + + key_4 { + keypad,row = <1>; + keypad,column = <6>; + linux,code = <5>; + }; + + key_5 { + keypad,row = <1>; + keypad,column = <7>; + linux,code = <6>; + }; + + key_A { + keypad,row = <2>; + keypad,column = <6>; + linux,code = <30>; + }; + + key_B { + keypad,row = <2>; + keypad,column = <7>; + linux,code = <48>; + }; + + key_C { + keypad,row = <0>; + keypad,column = <5>; + linux,code = <46>; + }; + + key_D { + keypad,row = <2>; + keypad,column = <5>; + linux,code = <32>; + }; + + key_E { + keypad,row = <0>; + keypad,column = <7>; + linux,code = <18>; + }; }; sdhci@12530000 { diff --git a/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi b/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi index 099cec79e2ae..704290f7c5c0 100644 --- a/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi @@ -778,62 +778,6 @@ samsung,pin-drv = <3>; }; - keypad_col0: keypad-col0 { - samsung,pins = "gpl2-0"; - samsung,pin-function = <3>; - samsung,pin-pud = <0>; - samsung,pin-drv = <0>; - }; - - keypad_col1: keypad-col1 { - samsung,pins = "gpl2-1"; - samsung,pin-function = <3>; - samsung,pin-pud = <0>; - samsung,pin-drv = <0>; - }; - - keypad_col2: keypad-col2 { - samsung,pins = "gpl2-2"; - samsung,pin-function = <3>; - samsung,pin-pud = <0>; - samsung,pin-drv = <0>; - }; - - keypad_col3: keypad-col3 { - samsung,pins = "gpl2-3"; - samsung,pin-function = <3>; - samsung,pin-pud = <0>; - samsung,pin-drv = <0>; - }; - - keypad_col4: keypad-col4 { - samsung,pins = "gpl2-4"; - samsung,pin-function = <3>; - samsung,pin-pud = <0>; - samsung,pin-drv = <0>; - }; - - keypad_col5: keypad-col5 { - samsung,pins = "gpl2-5"; - samsung,pin-function = <3>; - samsung,pin-pud = <0>; - samsung,pin-drv = <0>; - }; - - keypad_col6: keypad-col6 { - samsung,pins = "gpl2-6"; - samsung,pin-function = <3>; - samsung,pin-pud = <0>; - samsung,pin-drv = <0>; - }; - - keypad_col7: keypad-col7 { - samsung,pins = "gpl2-7"; - samsung,pin-function = <3>; - samsung,pin-pud = <0>; - samsung,pin-drv = <0>; - }; - cam_port_b: cam-port-b { samsung,pins = "gpm0-0", "gpm0-1", "gpm0-2", "gpm0-3", "gpm0-4", "gpm0-5", "gpm0-6", "gpm0-7", diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi index e3380a7a285c..35cb2099d55e 100644 --- a/arch/arm/boot/dts/exynos4x12.dtsi +++ b/arch/arm/boot/dts/exynos4x12.dtsi @@ -28,14 +28,6 @@ pinctrl3 = &pinctrl_3; }; - combiner:interrupt-controller@10440000 { - interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>, - <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>, - <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>, - <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>, - <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>; - }; - clock: clock-controller@0x10030000 { compatible = "samsung,exynos4412-clock"; reg = <0x10030000 0x20000>; @@ -77,6 +69,8 @@ compatible = "samsung,exynos4212-g2d"; reg = <0x10800000 0x1000>; interrupts = <0 89 0>; + clocks = <&clock 177>, <&clock 277>; + clock-names = "sclk_fimg2d", "fimg2d"; status = "disabled"; }; }; diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts index 02cfc76d002f..c371f7c1e912 100644 --- a/arch/arm/boot/dts/exynos5250-arndale.dts +++ b/arch/arm/boot/dts/exynos5250-arndale.dts @@ -449,4 +449,32 @@ clock-frequency = <24000000>; }; }; + + dp-controller { + samsung,color-space = <0>; + samsung,dynamic-range = <0>; + samsung,ycbcr-coeff = <0>; + samsung,color-depth = <1>; + samsung,link-rate = <0x0a>; + samsung,lane-count = <4>; + }; + + fimd: fimd@14400000 { + display-timings { + native-mode = <&timing0>; + timing0: timing@0 { + /* 2560x1600 DP panel */ + clock-frequency = <50000>; + hactive = <2560>; + vactive = <1600>; + hfront-porch = <48>; + hback-porch = <80>; + hsync-len = <32>; + vback-porch = <16>; + vfront-porch = <8>; + vsync-len = <6>; + }; + }; + }; + }; diff --git a/arch/arm/boot/dts/exynos5250-pinctrl.dtsi b/arch/arm/boot/dts/exynos5250-pinctrl.dtsi index d1650fb34c0a..e9cdee385092 100644 --- a/arch/arm/boot/dts/exynos5250-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos5250-pinctrl.dtsi @@ -553,6 +553,13 @@ samsung,pin-pud = <0>; samaung,pin-drv = <0>; }; + + dp_hpd: dp_hpd { + samsung,pins = "gpx0-7"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samaung,pin-drv = <0>; + }; }; pinctrl@13400000 { diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts index 3e0c792e2767..d53ea34c4fa1 100644 --- a/arch/arm/boot/dts/exynos5250-smdk5250.dts +++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts @@ -224,6 +224,9 @@ samsung,color-depth = <1>; samsung,link-rate = <0x0a>; samsung,lane-count = <4>; + + pinctrl-names = "default"; + pinctrl-0 = <&dp_hpd>; }; display-timings { diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index 98dfc3ea5c0b..8b1f9b63f9f7 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -479,6 +479,36 @@ pinctrl-0 = <&i2s2_bus>; }; + usb@12000000 { + compatible = "samsung,exynos5250-dwusb3"; + clocks = <&clock 286>; + clock-names = "usbdrd30"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + dwc3 { + compatible = "synopsys,dwc3"; + reg = <0x12000000 0x10000>; + interrupts = <0 72 0>; + usb-phy = <&usb2_phy &usb3_phy>; + }; + }; + + usb3_phy: usbphy@12100000 { + compatible = "samsung,exynos5250-usb3phy"; + reg = <0x12100000 0x100>; + clocks = <&clock 1>, <&clock 286>; + clock-names = "ext_xtal", "usbdrd30"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + usbphy-sys { + reg = <0x10040704 0x8>; + }; + }; + usb@12110000 { compatible = "samsung,exynos4210-ehci"; reg = <0x12110000 0x100>; @@ -497,6 +527,21 @@ clock-names = "usbhost"; }; + usb2_phy: usbphy@12130000 { + compatible = "samsung,exynos5250-usb2phy"; + reg = <0x12130000 0x100>; + clocks = <&clock 1>, <&clock 285>; + clock-names = "ext_xtal", "usbhost"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + usbphy-sys { + reg = <0x10040704 0x8>, + <0x10050230 0x4>; + }; + }; + amba { #address-cells = <1>; #size-cells = <1>; @@ -606,6 +651,8 @@ reg = <0x145b0000 0x1000>; interrupts = <10 3>; interrupt-parent = <&combiner>; + clocks = <&clock 342>; + clock-names = "dp"; #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi index f6b1c8973845..a8be7e10b458 100644 --- a/arch/arm/boot/dts/exynos5440.dtsi +++ b/arch/arm/boot/dts/exynos5440.dtsi @@ -38,18 +38,22 @@ #size-cells = <0>; cpu@0 { + device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <0>; }; cpu@1 { + device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <1>; }; cpu@2 { + device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <2>; }; cpu@3 { + device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <3>; }; @@ -214,6 +218,29 @@ interrupts = <0 17 0>, <0 16 0>; clocks = <&clock 21>; clock-names = "rtc"; - status = "disabled"; + }; + + sata@210000 { + compatible = "snps,exynos5440-ahci"; + reg = <0x210000 0x10000>; + interrupts = <0 30 0>; + clocks = <&clock 23>; + clock-names = "sata"; + }; + + ohci@220000 { + compatible = "samsung,exynos5440-ohci"; + reg = <0x220000 0x1000>; + interrupts = <0 29 0>; + clocks = <&clock 24>; + clock-names = "usbhost"; + }; + + ehci@221000 { + compatible = "samsung,exynos5440-ehci"; + reg = <0x221000 0x1000>; + interrupts = <0 29 0>; + clocks = <&clock 24>; + clock-names = "usbhost"; }; }; diff --git a/arch/arm/boot/dts/ge863-pro3.dtsi b/arch/arm/boot/dts/ge863-pro3.dtsi index 17136fc7a516..230099bb31c8 100644 --- a/arch/arm/boot/dts/ge863-pro3.dtsi +++ b/arch/arm/boot/dts/ge863-pro3.dtsi @@ -7,7 +7,7 @@ * Licensed under GPLv2 or later. */ -/include/ "at91sam9260.dtsi" +#include "at91sam9260.dtsi" / { clocks { diff --git a/arch/arm/boot/dts/imx23.dtsi b/arch/arm/boot/dts/imx23.dtsi index 73fd7d0887b5..587ceef81e45 100644 --- a/arch/arm/boot/dts/imx23.dtsi +++ b/arch/arm/boot/dts/imx23.dtsi @@ -23,8 +23,12 @@ }; cpus { - cpu@0 { - compatible = "arm,arm926ejs"; + #address-cells = <0>; + #size-cells = <0>; + + cpu { + compatible = "arm,arm926ej-s"; + device_type = "cpu"; }; }; diff --git a/arch/arm/boot/dts/imx25.dtsi b/arch/arm/boot/dts/imx25.dtsi index d2550e0bca24..701153992c69 100644 --- a/arch/arm/boot/dts/imx25.dtsi +++ b/arch/arm/boot/dts/imx25.dtsi @@ -141,8 +141,8 @@ #size-cells = <0>; compatible = "fsl,imx25-cspi", "fsl,imx35-cspi"; reg = <0x43fa4000 0x4000>; - clocks = <&clks 62>; - clock-names = "ipg"; + clocks = <&clks 62>, <&clks 62>; + clock-names = "ipg", "per"; interrupts = <14>; status = "disabled"; }; @@ -182,8 +182,8 @@ compatible = "fsl,imx25-cspi", "fsl,imx35-cspi"; reg = <0x50004000 0x4000>; interrupts = <0>; - clocks = <&clks 80>; - clock-names = "ipg"; + clocks = <&clks 80>, <&clks 80>; + clock-names = "ipg", "per"; status = "disabled"; }; @@ -210,8 +210,8 @@ #size-cells = <0>; compatible = "fsl,imx25-cspi", "fsl,imx35-cspi"; reg = <0x50010000 0x4000>; - clocks = <&clks 79>; - clock-names = "ipg"; + clocks = <&clks 79>, <&clks 79>; + clock-names = "ipg", "per"; interrupts = <13>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/imx27.dtsi b/arch/arm/boot/dts/imx27.dtsi index ff4bd4873edf..75bd11386516 100644 --- a/arch/arm/boot/dts/imx27.dtsi +++ b/arch/arm/boot/dts/imx27.dtsi @@ -131,7 +131,7 @@ compatible = "fsl,imx27-cspi"; reg = <0x1000e000 0x1000>; interrupts = <16>; - clocks = <&clks 53>, <&clks 0>; + clocks = <&clks 53>, <&clks 53>; clock-names = "ipg", "per"; status = "disabled"; }; @@ -142,7 +142,7 @@ compatible = "fsl,imx27-cspi"; reg = <0x1000f000 0x1000>; interrupts = <15>; - clocks = <&clks 52>, <&clks 0>; + clocks = <&clks 52>, <&clks 52>; clock-names = "ipg", "per"; status = "disabled"; }; @@ -223,7 +223,7 @@ compatible = "fsl,imx27-cspi"; reg = <0x10017000 0x1000>; interrupts = <6>; - clocks = <&clks 51>, <&clks 0>; + clocks = <&clks 51>, <&clks 51>; clock-names = "ipg", "per"; status = "disabled"; }; diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi index 600f7cb51f3e..4c10a1968c0e 100644 --- a/arch/arm/boot/dts/imx28.dtsi +++ b/arch/arm/boot/dts/imx28.dtsi @@ -32,8 +32,12 @@ }; cpus { - cpu@0 { - compatible = "arm,arm926ejs"; + #address-cells = <0>; + #size-cells = <0>; + + cpu { + compatible = "arm,arm926ej-s"; + device_type = "cpu"; }; }; diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi index 21bb786c5b31..53fdde69bbf4 100644 --- a/arch/arm/boot/dts/imx51.dtsi +++ b/arch/arm/boot/dts/imx51.dtsi @@ -631,7 +631,7 @@ compatible = "fsl,imx51-cspi", "fsl,imx35-cspi"; reg = <0x83fc0000 0x4000>; interrupts = <38>; - clocks = <&clks 55>, <&clks 0>; + clocks = <&clks 55>, <&clks 55>; clock-names = "ipg", "per"; status = "disabled"; }; diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi index 845982eaac22..eb83aa039b8b 100644 --- a/arch/arm/boot/dts/imx53.dtsi +++ b/arch/arm/boot/dts/imx53.dtsi @@ -714,7 +714,7 @@ compatible = "fsl,imx53-cspi", "fsl,imx35-cspi"; reg = <0x63fc0000 0x4000>; interrupts = <38>; - clocks = <&clks 55>, <&clks 0>; + clocks = <&clks 55>, <&clks 55>; clock-names = "ipg", "per"; status = "disabled"; }; diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi index 5bcdf3a90bb3..62dc78126795 100644 --- a/arch/arm/boot/dts/imx6dl.dtsi +++ b/arch/arm/boot/dts/imx6dl.dtsi @@ -18,12 +18,14 @@ cpu@0 { compatible = "arm,cortex-a9"; + device_type = "cpu"; reg = <0>; next-level-cache = <&L2>; }; cpu@1 { compatible = "arm,cortex-a9"; + device_type = "cpu"; reg = <1>; next-level-cache = <&L2>; }; diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index 21e675848bd1..dc54a72a3bcd 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -18,6 +18,7 @@ cpu@0 { compatible = "arm,cortex-a9"; + device_type = "cpu"; reg = <0>; next-level-cache = <&L2>; operating-points = < @@ -39,18 +40,21 @@ cpu@1 { compatible = "arm,cortex-a9"; + device_type = "cpu"; reg = <1>; next-level-cache = <&L2>; }; cpu@2 { compatible = "arm,cortex-a9"; + device_type = "cpu"; reg = <2>; next-level-cache = <&L2>; }; cpu@3 { compatible = "arm,cortex-a9"; + device_type = "cpu"; reg = <3>; next-level-cache = <&L2>; }; diff --git a/arch/arm/boot/dts/kizbox.dts b/arch/arm/boot/dts/kizbox.dts index b4dc3ed9a3ec..02df1914a47c 100644 --- a/arch/arm/boot/dts/kizbox.dts +++ b/arch/arm/boot/dts/kizbox.dts @@ -6,7 +6,7 @@ * Licensed under GPLv2. */ /dts-v1/; -/include/ "at91sam9g20.dtsi" +#include "at91sam9g20.dtsi" / { @@ -94,26 +94,26 @@ led1g { label = "led1:green"; - gpios = <&pioB 0 1>; + gpios = <&pioB 0 GPIO_ACTIVE_LOW>; linux,default-trigger = "none"; }; led1r { label = "led1:red"; - gpios = <&pioB 1 1>; + gpios = <&pioB 1 GPIO_ACTIVE_LOW>; linux,default-trigger = "none"; }; led2g { label = "led2:green"; - gpios = <&pioB 2 1>; + gpios = <&pioB 2 GPIO_ACTIVE_LOW>; linux,default-trigger = "none"; default-state = "on"; }; led2r { label = "led2:red"; - gpios = <&pioB 3 1>; + gpios = <&pioB 3 GPIO_ACTIVE_LOW>; linux,default-trigger = "none"; }; }; @@ -125,16 +125,16 @@ reset { label = "reset"; - gpios = <&pioB 30 1>; + gpios = <&pioB 30 GPIO_ACTIVE_LOW>; linux,code = <0x100>; gpio-key,wakeup; }; mode { label = "mode"; - gpios = <&pioB 31 1>; + gpios = <&pioB 31 GPIO_ACTIVE_LOW>; linux,code = <0x101>; gpio-key,wakeup; }; }; -};
\ No newline at end of file +}; diff --git a/arch/arm/boot/dts/lpc32xx.dtsi b/arch/arm/boot/dts/lpc32xx.dtsi index 1582f484a867..3abebb75fc57 100644 --- a/arch/arm/boot/dts/lpc32xx.dtsi +++ b/arch/arm/boot/dts/lpc32xx.dtsi @@ -18,8 +18,12 @@ interrupt-parent = <&mic>; cpus { - cpu@0 { - compatible = "arm,arm926ejs"; + #address-cells = <0>; + #size-cells = <0>; + + cpu { + compatible = "arm,arm926ej-s"; + device_type = "cpu"; }; }; diff --git a/arch/arm/boot/dts/mpa1600.dts b/arch/arm/boot/dts/mpa1600.dts index 317300875f34..ccf9ea242f72 100644 --- a/arch/arm/boot/dts/mpa1600.dts +++ b/arch/arm/boot/dts/mpa1600.dts @@ -6,7 +6,7 @@ * Licensed under GPLv2 only */ /dts-v1/; -/include/ "at91rm9200.dtsi" +#include "at91rm9200.dtsi" / { model = "Phontech MPA 1600"; @@ -62,7 +62,7 @@ monitor_mute { label = "Monitor mute"; - gpios = <&pioC 1 1>; + gpios = <&pioC 1 GPIO_ACTIVE_LOW>; linux,code = <113>; }; }; diff --git a/arch/arm/boot/dts/omap2.dtsi b/arch/arm/boot/dts/omap2.dtsi index 37aa7487d4d8..4aac404608cb 100644 --- a/arch/arm/boot/dts/omap2.dtsi +++ b/arch/arm/boot/dts/omap2.dtsi @@ -21,8 +21,12 @@ }; cpus { - cpu@0 { + #address-cells = <0>; + #size-cells = <0>; + + cpu { compatible = "arm,arm1136jf-s"; + device_type = "cpu"; }; }; diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi index 82a404da1c0d..0bbeff2afd4d 100644 --- a/arch/arm/boot/dts/omap3.dtsi +++ b/arch/arm/boot/dts/omap3.dtsi @@ -21,8 +21,13 @@ }; cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu@0 { compatible = "arm,cortex-a8"; + device_type = "cpu"; + reg = <0x0>; }; }; @@ -516,7 +521,7 @@ usb_otg_hs: usb_otg_hs@480ab000 { compatible = "ti,omap3-musb"; reg = <0x480ab000 0x1000>; - interrupts = <0 92 0x4>, <0 93 0x4>; + interrupts = <92>, <93>; interrupt-names = "mc", "dma"; ti,hwmods = "usb_otg_hs"; multipoint = <1>; diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index 2a5642882c8a..33a94509a292 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -28,13 +28,20 @@ }; cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu@0 { compatible = "arm,cortex-a9"; + device_type = "cpu"; next-level-cache = <&L2>; + reg = <0x0>; }; cpu@1 { compatible = "arm,cortex-a9"; + device_type = "cpu"; next-level-cache = <&L2>; + reg = <0x1>; }; }; diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index 3dd7ff825828..35a6536a10b5 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -34,11 +34,18 @@ }; cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu@0 { + device_type = "cpu"; compatible = "arm,cortex-a15"; + reg = <0x0>; }; cpu@1 { + device_type = "cpu"; compatible = "arm,cortex-a15"; + reg = <0x1>; }; }; diff --git a/arch/arm/boot/dts/picoxcell-pc3x2.dtsi b/arch/arm/boot/dts/picoxcell-pc3x2.dtsi index f0a8c2068ea7..533919e96eae 100644 --- a/arch/arm/boot/dts/picoxcell-pc3x2.dtsi +++ b/arch/arm/boot/dts/picoxcell-pc3x2.dtsi @@ -18,13 +18,13 @@ #size-cells = <1>; cpus { - #address-cells = <1>; + #address-cells = <0>; #size-cells = <0>; - cpu@0 { - compatible = "arm,1176jz-s"; + cpu { + compatible = "arm,arm1176jz-s"; + device_type = "cpu"; clock-frequency = <400000000>; - reg = <0>; d-cache-line-size = <32>; d-cache-size = <32768>; i-cache-line-size = <32>; diff --git a/arch/arm/boot/dts/picoxcell-pc3x3.dtsi b/arch/arm/boot/dts/picoxcell-pc3x3.dtsi index daa962d191e6..ab3e80085511 100644 --- a/arch/arm/boot/dts/picoxcell-pc3x3.dtsi +++ b/arch/arm/boot/dts/picoxcell-pc3x3.dtsi @@ -18,13 +18,13 @@ #size-cells = <1>; cpus { - #address-cells = <1>; + #address-cells = <0>; #size-cells = <0>; - cpu@0 { - compatible = "arm,1176jz-s"; + cpu { + compatible = "arm,arm1176jz-s"; + device_type = "cpu"; cpu-clock = <&arm_clk>, "cpu"; - reg = <0>; d-cache-line-size = <32>; d-cache-size = <32768>; i-cache-line-size = <32>; diff --git a/arch/arm/boot/dts/pm9g45.dts b/arch/arm/boot/dts/pm9g45.dts index 387fedb58988..33ffabe9c4c8 100644 --- a/arch/arm/boot/dts/pm9g45.dts +++ b/arch/arm/boot/dts/pm9g45.dts @@ -6,7 +6,7 @@ * Licensed under GPLv2. */ /dts-v1/; -/include/ "at91sam9g45.dtsi" +#include "at91sam9g45.dtsi" / { model = "Ronetix pm9g45"; @@ -42,15 +42,15 @@ board { pinctrl_board_nand: nand0-board { atmel,pins = - <3 3 0x0 0x1 /* PD3 gpio RDY pin pull_up*/ - 2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */ + <AT91_PIOD 3 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD3 gpio RDY pin pull_up*/ + AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */ }; }; mmc { pinctrl_board_mmc: mmc0-board { atmel,pins = - <3 6 0x0 0x5>; /* PD6 gpio CD pin pull_up and deglitch */ + <AT91_PIOD 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD6 gpio CD pin pull_up and deglitch */ }; }; }; @@ -64,7 +64,7 @@ slot@0 { reg = <0>; bus-width = <4>; - cd-gpios = <&pioD 6 0>; + cd-gpios = <&pioD 6 GPIO_ACTIVE_HIGH>; }; }; @@ -81,8 +81,8 @@ nand-on-flash-bbt; pinctrl-0 = <&pinctrl_board_nand>; - gpios = <&pioD 3 0 - &pioC 14 0 + gpios = <&pioD 3 GPIO_ACTIVE_HIGH + &pioC 14 GPIO_ACTIVE_HIGH 0 >; @@ -134,13 +134,13 @@ led0 { label = "led0"; - gpios = <&pioD 0 1>; + gpios = <&pioD 0 GPIO_ACTIVE_LOW>; linux,default-trigger = "nand-disk"; }; led1 { label = "led1"; - gpios = <&pioD 31 0>; + gpios = <&pioD 31 GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; }; }; @@ -152,13 +152,13 @@ right { label = "SW4"; - gpios = <&pioE 7 1>; + gpios = <&pioE 7 GPIO_ACTIVE_LOW>; linux,code = <106>; }; up { label = "SW3"; - gpios = <&pioE 8 1>; + gpios = <&pioE 8 GPIO_ACTIVE_LOW>; linux,code = <103>; }; }; diff --git a/arch/arm/boot/dts/prima2.dtsi b/arch/arm/boot/dts/prima2.dtsi index 3329719a9412..02edd8965f8a 100644 --- a/arch/arm/boot/dts/prima2.dtsi +++ b/arch/arm/boot/dts/prima2.dtsi @@ -18,6 +18,8 @@ #size-cells = <0>; cpu@0 { + compatible = "arm,cortex-a9"; + device_type = "cpu"; reg = <0x0>; d-cache-line-size = <32>; i-cache-line-size = <32>; diff --git a/arch/arm/boot/dts/pxa2xx.dtsi b/arch/arm/boot/dts/pxa2xx.dtsi index f18aad35e8b3..a5e90f078aa9 100644 --- a/arch/arm/boot/dts/pxa2xx.dtsi +++ b/arch/arm/boot/dts/pxa2xx.dtsi @@ -23,8 +23,11 @@ }; cpus { - cpu@0 { - compatible = "arm,xscale"; + #address-cells = <0>; + #size-cells = <0>; + cpu { + compatible = "marvell,xscale"; + device_type = "cpu"; }; }; diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi index fde2a337d1ff..4ff2019c0e30 100644 --- a/arch/arm/boot/dts/r8a73a4.dtsi +++ b/arch/arm/boot/dts/r8a73a4.dtsi @@ -37,12 +37,6 @@ <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>; interrupts = <1 9 0xf04>; - - gic-cpuif@4 { - compatible = "arm,gic-cpuif"; - cpuif-id = <4>; - cpu = <&cpu0>; - }; }; timer { diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts new file mode 100644 index 000000000000..09ea22c26359 --- /dev/null +++ b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts @@ -0,0 +1,45 @@ +/* + * Reference Device Tree Source for the armadillo 800 eva board + * + * Copyright (C) 2012 Renesas Solutions Corp. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/dts-v1/; +/include/ "r8a7740.dtsi" + +/ { + model = "armadillo 800 eva reference"; + compatible = "renesas,armadillo800eva-reference", "renesas,r8a7740"; + + chosen { + bootargs = "console=tty0 console=ttySC1,115200 earlyprintk=sh-sci.1,115200 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096 rw"; + }; + + memory { + device_type = "memory"; + reg = <0x40000000 0x20000000>; + }; + + reg_3p3v: regulator@0 { + compatible = "regulator-fixed"; + regulator-name = "fixed-3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; + +}; + +&i2c0 { + touchscreen: st1232@55 { + compatible = "sitronix,st1232"; + reg = <0x55>; + interrupt-parent = <&irqpin1>; + interrupts = <2 0>; /* IRQ10: hwirq 2 on irqpin1 */ + }; +}; diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi index 798fa35c0005..24e930643821 100644 --- a/arch/arm/boot/dts/r8a7740.dtsi +++ b/arch/arm/boot/dts/r8a7740.dtsi @@ -14,8 +14,129 @@ compatible = "renesas,r8a7740"; cpus { + #address-cells = <1>; + #size-cells = <0>; cpu@0 { compatible = "arm,cortex-a9"; + device_type = "cpu"; + reg = <0x0>; }; }; + + gic: interrupt-controller@c2800000 { + compatible = "arm,cortex-a9-gic"; + #interrupt-cells = <3>; + #address-cells = <1>; + interrupt-controller; + reg = <0xc2800000 0x1000>, + <0xc2000000 0x1000>; + }; + + /* irqpin0: IRQ0 - IRQ7 */ + irqpin0: irqpin@e6900000 { + compatible = "renesas,intc-irqpin"; + #interrupt-cells = <2>; + interrupt-controller; + reg = <0xe6900000 4>, + <0xe6900010 4>, + <0xe6900020 1>, + <0xe6900040 1>, + <0xe6900060 1>; + interrupt-parent = <&gic>; + interrupts = <0 149 0x4 + 0 149 0x4 + 0 149 0x4 + 0 149 0x4 + 0 149 0x4 + 0 149 0x4 + 0 149 0x4 + 0 149 0x4>; + }; + + /* irqpin1: IRQ8 - IRQ15 */ + irqpin1: irqpin@e6900004 { + compatible = "renesas,intc-irqpin"; + #interrupt-cells = <2>; + interrupt-controller; + reg = <0xe6900004 4>, + <0xe6900014 4>, + <0xe6900024 1>, + <0xe6900044 1>, + <0xe6900064 1>; + interrupt-parent = <&gic>; + interrupts = <0 149 0x4 + 0 149 0x4 + 0 149 0x4 + 0 149 0x4 + 0 149 0x4 + 0 149 0x4 + 0 149 0x4 + 0 149 0x4>; + }; + + /* irqpin2: IRQ16 - IRQ23 */ + irqpin2: irqpin@e6900008 { + compatible = "renesas,intc-irqpin"; + #interrupt-cells = <2>; + interrupt-controller; + reg = <0xe6900008 4>, + <0xe6900018 4>, + <0xe6900028 1>, + <0xe6900048 1>, + <0xe6900068 1>; + interrupt-parent = <&gic>; + interrupts = <0 149 0x4 + 0 149 0x4 + 0 149 0x4 + 0 149 0x4 + 0 149 0x4 + 0 149 0x4 + 0 149 0x4 + 0 149 0x4>; + }; + + /* irqpin3: IRQ24 - IRQ31 */ + irqpin3: irqpin@e690000c { + compatible = "renesas,intc-irqpin"; + #interrupt-cells = <2>; + interrupt-controller; + reg = <0xe690000c 4>, + <0xe690001c 4>, + <0xe690002c 1>, + <0xe690004c 1>, + <0xe690006c 1>; + interrupt-parent = <&gic>; + interrupts = <0 149 0x4 + 0 149 0x4 + 0 149 0x4 + 0 149 0x4 + 0 149 0x4 + 0 149 0x4 + 0 149 0x4 + 0 149 0x4>; + }; + + i2c0: i2c@fff20000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,rmobile-iic"; + reg = <0xfff20000 0x425>; + interrupt-parent = <&gic>; + interrupts = <0 201 0x4 + 0 202 0x4 + 0 203 0x4 + 0 204 0x4>; + }; + + i2c1: i2c@e6c20000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,rmobile-iic"; + reg = <0xe6c20000 0x425>; + interrupt-parent = <&gic>; + interrupts = <0 70 0x4 + 0 71 0x4 + 0 72 0x4 + 0 73 0x4>; + }; }; diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi index fe5c6f213271..7f146c6bf756 100644 --- a/arch/arm/boot/dts/r8a7779.dtsi +++ b/arch/arm/boot/dts/r8a7779.dtsi @@ -48,6 +48,23 @@ <0xf0000100 0x100>; }; + irqpin0: irqpin@fe780010 { + compatible = "renesas,intc-irqpin"; + #interrupt-cells = <2>; + interrupt-controller; + reg = <0xfe78001c 4>, + <0xfe780010 4>, + <0xfe780024 4>, + <0xfe780044 4>, + <0xfe780064 4>; + interrupt-parent = <&gic>; + interrupts = <0 27 0x4 + 0 28 0x4 + 0 29 0x4 + 0 30 0x4>; + sense-bitfield-width = <2>; + }; + i2c0: i2c@0xffc70000 { #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index 7a1711027e41..339d9b11721c 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -36,12 +36,6 @@ <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>; interrupts = <1 9 0xf04>; - - gic-cpuif@4 { - compatible = "arm,gic-cpuif"; - cpuif-id = <4>; - cpu = <&cpu0>; - }; }; timer { diff --git a/arch/arm/boot/dts/s3c2416-pinctrl.dtsi b/arch/arm/boot/dts/s3c2416-pinctrl.dtsi new file mode 100644 index 000000000000..527e3193817f --- /dev/null +++ b/arch/arm/boot/dts/s3c2416-pinctrl.dtsi @@ -0,0 +1,173 @@ +/* + * Samsung S3C2416 pinctrl settings + * + * Copyright (c) 2013 Heiko Stuebner <heiko@sntech.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +&pinctrl_0 { + /* + * Pin banks + */ + + gpa: gpa { + gpio-controller; + #gpio-cells = <2>; + }; + + gpb: gpb { + gpio-controller; + #gpio-cells = <2>; + }; + + gpc: gpc { + gpio-controller; + #gpio-cells = <2>; + }; + + gpd: gpd { + gpio-controller; + #gpio-cells = <2>; + }; + + gpe: gpe { + gpio-controller; + #gpio-cells = <2>; + }; + + gpf: gpf { + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg: gpg { + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gph: gph { + gpio-controller; + #gpio-cells = <2>; + }; + + gpj: gpj { + gpio-controller; + #gpio-cells = <2>; + }; + + gpk: gpk { + gpio-controller; + #gpio-cells = <2>; + }; + + gpl: gpl { + gpio-controller; + #gpio-cells = <2>; + }; + + gpm: gpm { + gpio-controller; + #gpio-cells = <2>; + }; + + /* + * Pin groups + */ + + uart0_data: uart0-data { + samsung,pins = "gph-0", "gph-1"; + samsung,pin-function = <2>; + }; + + uart0_fctl: uart0-fctl { + samsung,pins = "gph-8", "gph-9"; + samsung,pin-function = <2>; + }; + + uart1_data: uart1-data { + samsung,pins = "gph-2", "gph-3"; + samsung,pin-function = <2>; + }; + + uart1_fctl: uart1-fctl { + samsung,pins = "gph-10", "gph-11"; + samsung,pin-function = <2>; + }; + + uart2_data: uart2-data { + samsung,pins = "gph-4", "gph-5"; + samsung,pin-function = <2>; + }; + + uart2_fctl: uart2-fctl { + samsung,pins = "gph-6", "gph-7"; + samsung,pin-function = <2>; + }; + + uart3_data: uart3-data { + samsung,pins = "gph-6", "gph-7"; + samsung,pin-function = <2>; + }; + + extuart_clk: extuart-clk { + samsung,pins = "gph-12"; + samsung,pin-function = <2>; + }; + + i2c0_bus: i2c0-bus { + samsung,pins = "gpe-14", "gpe-15"; + samsung,pin-function = <2>; + }; + + spi0_bus: spi0-bus { + samsung,pins = "gpe-11", "gpe-12", "gpe-13"; + samsung,pin-function = <2>; + }; + + sd0_clk: sd0-clk { + samsung,pins = "gpe-5"; + samsung,pin-function = <2>; + }; + + sd0_cmd: sd0-cmd { + samsung,pins = "gpe-6"; + samsung,pin-function = <2>; + }; + + sd0_bus1: sd0-bus1 { + samsung,pins = "gpe-7"; + samsung,pin-function = <2>; + }; + + sd0_bus4: sd0-bus4 { + samsung,pins = "gpe-8", "gpe-9", "gpe-10"; + samsung,pin-function = <2>; + }; + + sd1_cmd: sd1-cmd { + samsung,pins = "gpl-8"; + samsung,pin-function = <2>; + }; + + sd1_clk: sd1-clk { + samsung,pins = "gpl-9"; + samsung,pin-function = <2>; + }; + + sd1_bus1: sd1-bus1 { + samsung,pins = "gpl-0"; + samsung,pin-function = <2>; + }; + + sd1_bus4: sd1-bus4 { + samsung,pins = "gpl-1", "gpl-2", "gpl-3"; + samsung,pin-function = <2>; + }; +}; diff --git a/arch/arm/boot/dts/s3c2416-smdk2416.dts b/arch/arm/boot/dts/s3c2416-smdk2416.dts new file mode 100644 index 000000000000..ad1dd09c10eb --- /dev/null +++ b/arch/arm/boot/dts/s3c2416-smdk2416.dts @@ -0,0 +1,72 @@ +/* + * SAMSUNG SMDK2416 board device tree source + * + * Copyright (c) 2013 Heiko Stuebner <heiko@sntech.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/dts-v1/; +/include/ "s3c2416.dtsi" + +/ { + model = "SMDK2416"; + compatible = "samsung,s3c2416"; + + memory { + reg = <0x30000000 0x4000000>; + }; + + serial@50000000 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&uart0_data>, <&uart0_fctl>; + }; + + serial@50004000 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&uart1_data>, <&uart1_fctl>; + }; + + serial@50008000 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&uart2_data>; + }; + + serial@5000C000 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&uart3_data>; + }; + + watchdog@53000000 { + status = "okay"; + }; + + rtc@57000000 { + status = "okay"; + }; + + sdhci@4AC00000 { + pinctrl-names = "default"; + pinctrl-0 = <&sd0_clk>, <&sd0_cmd>, + <&sd0_bus1>, <&sd0_bus4>; + bus-width = <4>; + cd-gpios = <&gpf 1 0>; + cd-inverted; + status = "okay"; + }; + + sdhci@4A800000 { + pinctrl-names = "default"; + pinctrl-0 = <&sd1_clk>, <&sd1_cmd>, + <&sd1_bus1>, <&sd1_bus4>; + bus-width = <4>; + broken-cd; + status = "okay"; + }; +}; diff --git a/arch/arm/boot/dts/s3c2416.dtsi b/arch/arm/boot/dts/s3c2416.dtsi new file mode 100644 index 000000000000..6809324934a3 --- /dev/null +++ b/arch/arm/boot/dts/s3c2416.dtsi @@ -0,0 +1,79 @@ +/* + * Samsung's S3C2416 SoC device tree source + * + * Copyright (c) 2013 Heiko Stuebner <heiko@sntech.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/include/ "s3c24xx.dtsi" +/include/ "s3c2416-pinctrl.dtsi" + +/ { + model = "Samsung S3C2416 SoC"; + compatible = "samsung,s3c2416"; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu { + compatible = "arm,arm926ejs"; + }; + }; + + interrupt-controller@4a000000 { + compatible = "samsung,s3c2416-irq"; + }; + + pinctrl@56000000 { + compatible = "samsung,s3c2416-pinctrl"; + }; + + serial@50000000 { + compatible = "samsung,s3c2440-uart"; + }; + + serial@50004000 { + compatible = "samsung,s3c2440-uart"; + }; + + serial@50008000 { + compatible = "samsung,s3c2440-uart"; + }; + + serial@5000C000 { + compatible = "samsung,s3c2440-uart"; + reg = <0x5000C000 0x4000>; + interrupts = <1 18 24 4>, <1 18 25 4>; + status = "disabled"; + }; + + sdhci@4AC00000 { + compatible = "samsung,s3c6410-sdhci"; + reg = <0x4AC00000 0x100>; + interrupts = <0 0 21 3>; + status = "disabled"; + }; + + sdhci@4A800000 { + compatible = "samsung,s3c6410-sdhci"; + reg = <0x4A800000 0x100>; + interrupts = <0 0 20 3>; + status = "disabled"; + }; + + watchdog@53000000 { + interrupts = <1 9 27 3>; + }; + + rtc@57000000 { + compatible = "samsung,s3c2416-rtc"; + }; + + i2c@54000000 { + compatible = "samsung,s3c2440-i2c"; + }; +}; diff --git a/arch/arm/boot/dts/s3c24xx.dtsi b/arch/arm/boot/dts/s3c24xx.dtsi new file mode 100644 index 000000000000..cab46ff5fb4d --- /dev/null +++ b/arch/arm/boot/dts/s3c24xx.dtsi @@ -0,0 +1,92 @@ +/* + * Samsung's S3C24XX family device tree source + * + * Copyright (c) 2013 Heiko Stuebner <heiko@sntech.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/include/ "skeleton.dtsi" + +/ { + compatible = "samsung,s3c24xx"; + interrupt-parent = <&intc>; + + aliases { + pinctrl0 = &pinctrl_0; + }; + + intc:interrupt-controller@4a000000 { + compatible = "samsung,s3c2410-irq"; + reg = <0x4a000000 0x100>; + interrupt-controller; + #interrupt-cells = <4>; + }; + + pinctrl_0: pinctrl@56000000 { + reg = <0x56000000 0x1000>; + + wakeup-interrupt-controller { + compatible = "samsung,s3c2410-wakeup-eint"; + interrupts = <0 0 0 3>, + <0 0 1 3>, + <0 0 2 3>, + <0 0 3 3>, + <0 0 4 4>, + <0 0 5 4>; + }; + }; + + timer@51000000 { + compatible = "samsung,s3c2410-pwm"; + reg = <0x51000000 0x1000>; + interrupts = <0 0 10 3>, <0 0 11 3>, <0 0 12 3>, <0 0 13 3>, <0 0 14 3>; + #pwm-cells = <4>; + }; + + serial@50000000 { + compatible = "samsung,s3c2410-uart"; + reg = <0x50000000 0x4000>; + interrupts = <1 28 0 4>, <1 28 1 4>; + status = "disabled"; + }; + + serial@50004000 { + compatible = "samsung,s3c2410-uart"; + reg = <0x50004000 0x4000>; + interrupts = <1 23 3 4>, <1 23 4 4>; + status = "disabled"; + }; + + serial@50008000 { + compatible = "samsung,s3c2410-uart"; + reg = <0x50008000 0x4000>; + interrupts = <1 15 6 4>, <1 15 7 4>; + status = "disabled"; + }; + + watchdog@53000000 { + compatible = "samsung,s3c2410-wdt"; + reg = <0x53000000 0x100>; + interrupts = <0 0 9 3>; + status = "disabled"; + }; + + rtc@57000000 { + compatible = "samsung,s3c2410-rtc"; + reg = <0x57000000 0x100>; + interrupts = <0 0 30 3>, <0 0 8 3>; + status = "disabled"; + }; + + i2c@54000000 { + compatible = "samsung,s3c2410-i2c"; + reg = <0x54000000 0x100>; + interrupts = <0 0 27 3>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; +}; diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi index 2e643ea51cce..f57ffbc97432 100644 --- a/arch/arm/boot/dts/sama5d3.dtsi +++ b/arch/arm/boot/dts/sama5d3.dtsi @@ -8,7 +8,10 @@ * Licensed under GPLv2 or later. */ -/include/ "skeleton.dtsi" +#include "skeleton.dtsi" +#include <dt-bindings/pinctrl/at91.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/gpio/gpio.h> / { model = "Atmel SAMA5D3 family SoC"; @@ -35,8 +38,12 @@ ssc1 = &ssc1; }; cpus { + #address-cells = <1>; + #size-cells = <0>; cpu@0 { + device_type = "cpu"; compatible = "arm,cortex-a5"; + reg = <0x0>; }; }; @@ -59,7 +66,7 @@ mmc0: mmc@f0000000 { compatible = "atmel,hsmci"; reg = <0xf0000000 0x600>; - interrupts = <21 4 0>; + interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>; dmas = <&dma0 2 0>; dma-names = "rxtx"; pinctrl-names = "default"; @@ -74,12 +81,7 @@ #size-cells = <0>; compatible = "atmel,at91sam9x5-spi"; reg = <0xf0004000 0x100>; - interrupts = <24 4 3>; - cs-gpios = <&pioD 13 0 - &pioD 14 0 /* conflicts with SCK0 and CANRX0 */ - &pioD 15 0 /* conflicts with CTS0 and CANTX0 */ - &pioD 16 0 /* conflicts with RTS0 and PWMFI3 */ - >; + interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi0>; status = "disabled"; @@ -88,7 +90,7 @@ ssc0: ssc@f0008000 { compatible = "atmel,at91sam9g45-ssc"; reg = <0xf0008000 0x4000>; - interrupts = <38 4 4>; + interrupts = <38 IRQ_TYPE_LEVEL_HIGH 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; status = "disabled"; @@ -97,7 +99,7 @@ can0: can@f000c000 { compatible = "atmel,at91sam9x5-can"; reg = <0xf000c000 0x300>; - interrupts = <40 4 3>; + interrupts = <40 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_can0_rx_tx>; status = "disabled"; @@ -106,13 +108,13 @@ tcb0: timer@f0010000 { compatible = "atmel,at91sam9x5-tcb"; reg = <0xf0010000 0x100>; - interrupts = <26 4 0>; + interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>; }; i2c0: i2c@f0014000 { compatible = "atmel,at91sam9x5-i2c"; reg = <0xf0014000 0x4000>; - interrupts = <18 4 6>; + interrupts = <18 IRQ_TYPE_LEVEL_HIGH 6>; dmas = <&dma0 2 7>, <&dma0 2 8>; dma-names = "tx", "rx"; @@ -126,7 +128,7 @@ i2c1: i2c@f0018000 { compatible = "atmel,at91sam9x5-i2c"; reg = <0xf0018000 0x4000>; - interrupts = <19 4 6>; + interrupts = <19 IRQ_TYPE_LEVEL_HIGH 6>; dmas = <&dma0 2 9>, <&dma0 2 10>; dma-names = "tx", "rx"; @@ -140,7 +142,7 @@ usart0: serial@f001c000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf001c000 0x100>; - interrupts = <12 4 5>; + interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart0>; status = "disabled"; @@ -149,16 +151,16 @@ usart1: serial@f0020000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf0020000 0x100>; - interrupts = <13 4 5>; + interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart1>; status = "disabled"; }; macb0: ethernet@f0028000 { - compatible = "cnds,pc302-gem", "cdns,gem"; + compatible = "cdns,pc302-gem", "cdns,gem"; reg = <0xf0028000 0x100>; - interrupts = <34 4 3>; + interrupts = <34 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_macb0_data_rgmii &pinctrl_macb0_signal_rgmii>; status = "disabled"; @@ -167,14 +169,14 @@ isi: isi@f0034000 { compatible = "atmel,at91sam9g45-isi"; reg = <0xf0034000 0x4000>; - interrupts = <37 4 5>; + interrupts = <37 IRQ_TYPE_LEVEL_HIGH 5>; status = "disabled"; }; mmc1: mmc@f8000000 { compatible = "atmel,hsmci"; reg = <0xf8000000 0x600>; - interrupts = <22 4 0>; + interrupts = <22 IRQ_TYPE_LEVEL_HIGH 0>; dmas = <&dma1 2 0>; dma-names = "rxtx"; pinctrl-names = "default"; @@ -187,7 +189,7 @@ mmc2: mmc@f8004000 { compatible = "atmel,hsmci"; reg = <0xf8004000 0x600>; - interrupts = <23 4 0>; + interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>; dmas = <&dma1 2 1>; dma-names = "rxtx"; pinctrl-names = "default"; @@ -202,12 +204,7 @@ #size-cells = <0>; compatible = "atmel,at91sam9x5-spi"; reg = <0xf8008000 0x100>; - interrupts = <25 4 3>; - cs-gpios = <&pioC 25 0 - &pioC 26 0 /* conflitcs with TWD1 and ISI_D11 */ - &pioC 27 0 /* conflitcs with TWCK1 and ISI_D10 */ - &pioC 28 0 /* conflitcs with PWMFI0 and ISI_D9 */ - >; + interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi1>; status = "disabled"; @@ -216,7 +213,7 @@ ssc1: ssc@f800c000 { compatible = "atmel,at91sam9g45-ssc"; reg = <0xf800c000 0x4000>; - interrupts = <39 4 4>; + interrupts = <39 IRQ_TYPE_LEVEL_HIGH 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; status = "disabled"; @@ -225,7 +222,7 @@ can1: can@f8010000 { compatible = "atmel,at91sam9x5-can"; reg = <0xf8010000 0x300>; - interrupts = <41 4 3>; + interrupts = <41 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_can1_rx_tx>; }; @@ -233,13 +230,13 @@ tcb1: timer@f8014000 { compatible = "atmel,at91sam9x5-tcb"; reg = <0xf8014000 0x100>; - interrupts = <27 4 0>; + interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>; }; adc0: adc@f8018000 { compatible = "atmel,at91sam9260-adc"; reg = <0xf8018000 0x100>; - interrupts = <29 4 5>; + interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = < &pinctrl_adc0_adtrg @@ -293,7 +290,7 @@ tsadcc: tsadcc@f8018000 { compatible = "atmel,at91sam9x5-tsadcc"; reg = <0xf8018000 0x4000>; - interrupts = <29 4 5>; + interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>; atmel,tsadcc_clock = <300000>; atmel,filtering_average = <0x03>; atmel,pendet_debounce = <0x08>; @@ -305,7 +302,7 @@ i2c2: i2c@f801c000 { compatible = "atmel,at91sam9x5-i2c"; reg = <0xf801c000 0x4000>; - interrupts = <20 4 6>; + interrupts = <20 IRQ_TYPE_LEVEL_HIGH 6>; dmas = <&dma1 2 11>, <&dma1 2 12>; dma-names = "tx", "rx"; @@ -317,7 +314,7 @@ usart2: serial@f8020000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf8020000 0x100>; - interrupts = <14 4 5>; + interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart2>; status = "disabled"; @@ -326,7 +323,7 @@ usart3: serial@f8024000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf8024000 0x100>; - interrupts = <15 4 5>; + interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart3>; status = "disabled"; @@ -335,7 +332,7 @@ macb1: ethernet@f802c000 { compatible = "cdns,at32ap7000-macb", "cdns,macb"; reg = <0xf802c000 0x100>; - interrupts = <35 4 3>; + interrupts = <35 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_macb1_rmii>; status = "disabled"; @@ -344,7 +341,7 @@ sha@f8034000 { compatible = "atmel,sam9g46-sha"; reg = <0xf8034000 0x100>; - interrupts = <42 4 0>; + interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>; }; aes@f8038000 { @@ -356,20 +353,20 @@ tdes@f803c000 { compatible = "atmel,sam9g46-tdes"; reg = <0xf803c000 0x100>; - interrupts = <44 4 0>; + interrupts = <44 IRQ_TYPE_LEVEL_HIGH 0>; }; dma0: dma-controller@ffffe600 { compatible = "atmel,at91sam9g45-dma"; reg = <0xffffe600 0x200>; - interrupts = <30 4 0>; + interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>; #dma-cells = <2>; }; dma1: dma-controller@ffffe800 { compatible = "atmel,at91sam9g45-dma"; reg = <0xffffe800 0x200>; - interrupts = <31 4 0>; + interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>; #dma-cells = <2>; }; @@ -381,7 +378,7 @@ dbgu: serial@ffffee00 { compatible = "atmel,at91sam9260-usart"; reg = <0xffffee00 0x200>; - interrupts = <2 4 7>; + interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_dbgu>; status = "disabled"; @@ -413,202 +410,202 @@ adc0 { pinctrl_adc0_adtrg: adc0_adtrg { atmel,pins = - <3 19 0x1 0x0>; /* PD19 periph A ADTRG */ + <AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD19 periph A ADTRG */ }; pinctrl_adc0_ad0: adc0_ad0 { atmel,pins = - <3 20 0x1 0x0>; /* PD20 periph A AD0 */ + <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD20 periph A AD0 */ }; pinctrl_adc0_ad1: adc0_ad1 { atmel,pins = - <3 21 0x1 0x0>; /* PD21 periph A AD1 */ + <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A AD1 */ }; pinctrl_adc0_ad2: adc0_ad2 { atmel,pins = - <3 22 0x1 0x0>; /* PD22 periph A AD2 */ + <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD22 periph A AD2 */ }; pinctrl_adc0_ad3: adc0_ad3 { atmel,pins = - <3 23 0x1 0x0>; /* PD23 periph A AD3 */ + <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD23 periph A AD3 */ }; pinctrl_adc0_ad4: adc0_ad4 { atmel,pins = - <3 24 0x1 0x0>; /* PD24 periph A AD4 */ + <AT91_PIOD 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD24 periph A AD4 */ }; pinctrl_adc0_ad5: adc0_ad5 { atmel,pins = - <3 25 0x1 0x0>; /* PD25 periph A AD5 */ + <AT91_PIOD 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD25 periph A AD5 */ }; pinctrl_adc0_ad6: adc0_ad6 { atmel,pins = - <3 26 0x1 0x0>; /* PD26 periph A AD6 */ + <AT91_PIOD 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD26 periph A AD6 */ }; pinctrl_adc0_ad7: adc0_ad7 { atmel,pins = - <3 27 0x1 0x0>; /* PD27 periph A AD7 */ + <AT91_PIOD 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD27 periph A AD7 */ }; pinctrl_adc0_ad8: adc0_ad8 { atmel,pins = - <3 28 0x1 0x0>; /* PD28 periph A AD8 */ + <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD28 periph A AD8 */ }; pinctrl_adc0_ad9: adc0_ad9 { atmel,pins = - <3 29 0x1 0x0>; /* PD29 periph A AD9 */ + <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD29 periph A AD9 */ }; pinctrl_adc0_ad10: adc0_ad10 { atmel,pins = - <3 30 0x1 0x0>; /* PD30 periph A AD10, conflicts with PCK0 */ + <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD30 periph A AD10, conflicts with PCK0 */ }; pinctrl_adc0_ad11: adc0_ad11 { atmel,pins = - <3 31 0x1 0x0>; /* PD31 periph A AD11, conflicts with PCK1 */ + <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD31 periph A AD11, conflicts with PCK1 */ }; }; can0 { pinctrl_can0_rx_tx: can0_rx_tx { atmel,pins = - <3 14 0x3 0x0 /* PD14 periph C RX, conflicts with SCK0, SPI0_NPCS1 */ - 3 15 0x3 0x0>; /* PD15 periph C TX, conflicts with CTS0, SPI0_NPCS2 */ + <AT91_PIOD 14 AT91_PERIPH_C AT91_PINCTRL_NONE /* PD14 periph C RX, conflicts with SCK0, SPI0_NPCS1 */ + AT91_PIOD 15 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PD15 periph C TX, conflicts with CTS0, SPI0_NPCS2 */ }; }; can1 { pinctrl_can1_rx_tx: can1_rx_tx { atmel,pins = - <1 14 0x2 0x0 /* PB14 periph B RX, conflicts with GCRS */ - 1 15 0x2 0x0>; /* PB15 periph B TX, conflicts with GCOL */ + <AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB14 periph B RX, conflicts with GCRS */ + AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB15 periph B TX, conflicts with GCOL */ }; }; dbgu { pinctrl_dbgu: dbgu-0 { atmel,pins = - <1 30 0x1 0x0 /* PB30 periph A */ - 1 31 0x1 0x1>; /* PB31 periph A with pullup */ + <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB30 periph A */ + AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB31 periph A with pullup */ }; }; i2c0 { pinctrl_i2c0: i2c0-0 { atmel,pins = - <0 30 0x1 0x0 /* PA30 periph A TWD0 pin, conflicts with URXD1, ISI_VSYNC */ - 0 31 0x1 0x0>; /* PA31 periph A TWCK0 pin, conflicts with UTXD1, ISI_HSYNC */ + <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A TWD0 pin, conflicts with URXD1, ISI_VSYNC */ + AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A TWCK0 pin, conflicts with UTXD1, ISI_HSYNC */ }; }; i2c1 { pinctrl_i2c1: i2c1-0 { atmel,pins = - <2 26 0x2 0x0 /* PC26 periph B TWD1 pin, conflicts with SPI1_NPCS1, ISI_D11 */ - 2 27 0x2 0x0>; /* PC27 periph B TWCK1 pin, conflicts with SPI1_NPCS2, ISI_D10 */ + <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC26 periph B TWD1 pin, conflicts with SPI1_NPCS1, ISI_D11 */ + AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC27 periph B TWCK1 pin, conflicts with SPI1_NPCS2, ISI_D10 */ }; }; isi { pinctrl_isi: isi-0 { atmel,pins = - <0 16 0x3 0x0 /* PA16 periph C ISI_D0, conflicts with LCDDAT16 */ - 0 17 0x3 0x0 /* PA17 periph C ISI_D1, conflicts with LCDDAT17 */ - 0 18 0x3 0x0 /* PA18 periph C ISI_D2, conflicts with LCDDAT18, TWD2 */ - 0 19 0x3 0x0 /* PA19 periph C ISI_D3, conflicts with LCDDAT19, TWCK2 */ - 0 20 0x3 0x0 /* PA20 periph C ISI_D4, conflicts with LCDDAT20, PWMH0 */ - 0 21 0x3 0x0 /* PA21 periph C ISI_D5, conflicts with LCDDAT21, PWML0 */ - 0 22 0x3 0x0 /* PA22 periph C ISI_D6, conflicts with LCDDAT22, PWMH1 */ - 0 23 0x3 0x0 /* PA23 periph C ISI_D7, conflicts with LCDDAT23, PWML1 */ - 2 30 0x3 0x0 /* PC30 periph C ISI_PCK, conflicts with UTXD0 */ - 0 31 0x3 0x0 /* PA31 periph C ISI_HSYNC, conflicts with TWCK0, UTXD1 */ - 0 30 0x3 0x0 /* PA30 periph C ISI_VSYNC, conflicts with TWD0, URXD1 */ - 2 29 0x3 0x0 /* PC29 periph C ISI_PD8, conflicts with URXD0, PWMFI2 */ - 2 28 0x3 0x0>; /* PC28 periph C ISI_PD9, conflicts with SPI1_NPCS3, PWMFI0 */ + <AT91_PIOA 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA16 periph C ISI_D0, conflicts with LCDDAT16 */ + AT91_PIOA 17 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA17 periph C ISI_D1, conflicts with LCDDAT17 */ + AT91_PIOA 18 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA18 periph C ISI_D2, conflicts with LCDDAT18, TWD2 */ + AT91_PIOA 19 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA19 periph C ISI_D3, conflicts with LCDDAT19, TWCK2 */ + AT91_PIOA 20 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA20 periph C ISI_D4, conflicts with LCDDAT20, PWMH0 */ + AT91_PIOA 21 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA21 periph C ISI_D5, conflicts with LCDDAT21, PWML0 */ + AT91_PIOA 22 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA22 periph C ISI_D6, conflicts with LCDDAT22, PWMH1 */ + AT91_PIOA 23 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA23 periph C ISI_D7, conflicts with LCDDAT23, PWML1 */ + AT91_PIOC 30 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC30 periph C ISI_PCK, conflicts with UTXD0 */ + AT91_PIOA 31 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA31 periph C ISI_HSYNC, conflicts with TWCK0, UTXD1 */ + AT91_PIOA 30 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA30 periph C ISI_VSYNC, conflicts with TWD0, URXD1 */ + AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC29 periph C ISI_PD8, conflicts with URXD0, PWMFI2 */ + AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C ISI_PD9, conflicts with SPI1_NPCS3, PWMFI0 */ }; pinctrl_isi_pck_as_mck: isi_pck_as_mck-0 { atmel,pins = - <3 31 0x2 0x0>; /* PD31 periph B ISI_MCK */ + <AT91_PIOD 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD31 periph B ISI_MCK */ }; }; lcd { pinctrl_lcd: lcd-0 { atmel,pins = - <0 24 0x1 0x0 /* PA24 periph A LCDPWM */ - 0 26 0x1 0x0 /* PA26 periph A LCDVSYNC */ - 0 27 0x1 0x0 /* PA27 periph A LCDHSYNC */ - 0 25 0x1 0x0 /* PA25 periph A LCDDISP */ - 0 29 0x1 0x0 /* PA29 periph A LCDDEN */ - 0 28 0x1 0x0 /* PA28 periph A LCDPCK */ - 0 0 0x1 0x0 /* PA0 periph A LCDD0 pin */ - 0 1 0x1 0x0 /* PA1 periph A LCDD1 pin */ - 0 2 0x1 0x0 /* PA2 periph A LCDD2 pin */ - 0 3 0x1 0x0 /* PA3 periph A LCDD3 pin */ - 0 4 0x1 0x0 /* PA4 periph A LCDD4 pin */ - 0 5 0x1 0x0 /* PA5 periph A LCDD5 pin */ - 0 6 0x1 0x0 /* PA6 periph A LCDD6 pin */ - 0 7 0x1 0x0 /* PA7 periph A LCDD7 pin */ - 0 8 0x1 0x0 /* PA8 periph A LCDD8 pin */ - 0 9 0x1 0x0 /* PA9 periph A LCDD9 pin */ - 0 10 0x1 0x0 /* PA10 periph A LCDD10 pin */ - 0 11 0x1 0x0 /* PA11 periph A LCDD11 pin */ - 0 12 0x1 0x0 /* PA12 periph A LCDD12 pin */ - 0 13 0x1 0x0 /* PA13 periph A LCDD13 pin */ - 0 14 0x1 0x0 /* PA14 periph A LCDD14 pin */ - 0 15 0x1 0x0 /* PA15 periph A LCDD15 pin */ - 2 14 0x3 0x0 /* PC14 periph C LCDD16 pin */ - 2 13 0x3 0x0 /* PC13 periph C LCDD17 pin */ - 2 12 0x3 0x0 /* PC12 periph C LCDD18 pin */ - 2 11 0x3 0x0 /* PC11 periph C LCDD19 pin */ - 2 10 0x3 0x0 /* PC10 periph C LCDD20 pin */ - 2 15 0x3 0x0 /* PC15 periph C LCDD21 pin */ - 4 27 0x3 0x0 /* PE27 periph C LCDD22 pin */ - 4 28 0x3 0x0>; /* PE28 periph C LCDD23 pin */ + <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA24 periph A LCDPWM */ + AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA26 periph A LCDVSYNC */ + AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA27 periph A LCDHSYNC */ + AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA25 periph A LCDDISP */ + AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA29 periph A LCDDEN */ + AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA28 periph A LCDPCK */ + AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A LCDD0 pin */ + AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A LCDD1 pin */ + AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA2 periph A LCDD2 pin */ + AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA3 periph A LCDD3 pin */ + AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA4 periph A LCDD4 pin */ + AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA5 periph A LCDD5 pin */ + AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA6 periph A LCDD6 pin */ + AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA7 periph A LCDD7 pin */ + AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA8 periph A LCDD8 pin */ + AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A LCDD9 pin */ + AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A LCDD10 pin */ + AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A LCDD11 pin */ + AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A LCDD12 pin */ + AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A LCDD13 pin */ + AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A LCDD14 pin */ + AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A LCDD15 pin */ + AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC14 periph C LCDD16 pin */ + AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC13 periph C LCDD17 pin */ + AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC12 periph C LCDD18 pin */ + AT91_PIOC 11 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC11 periph C LCDD19 pin */ + AT91_PIOC 10 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC10 periph C LCDD20 pin */ + AT91_PIOC 15 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC15 periph C LCDD21 pin */ + AT91_PIOE 27 AT91_PERIPH_C AT91_PINCTRL_NONE /* PE27 periph C LCDD22 pin */ + AT91_PIOE 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PE28 periph C LCDD23 pin */ }; }; macb0 { pinctrl_macb0_data_rgmii: macb0_data_rgmii { atmel,pins = - <1 0 0x1 0x0 /* PB0 periph A GTX0, conflicts with PWMH0 */ - 1 1 0x1 0x0 /* PB1 periph A GTX1, conflicts with PWML0 */ - 1 2 0x1 0x0 /* PB2 periph A GTX2, conflicts with TK1 */ - 1 3 0x1 0x0 /* PB3 periph A GTX3, conflicts with TF1 */ - 1 4 0x1 0x0 /* PB4 periph A GRX0, conflicts with PWMH1 */ - 1 5 0x1 0x0 /* PB5 periph A GRX1, conflicts with PWML1 */ - 1 6 0x1 0x0 /* PB6 periph A GRX2, conflicts with TD1 */ - 1 7 0x1 0x0>; /* PB7 periph A GRX3, conflicts with RK1 */ + <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A GTX0, conflicts with PWMH0 */ + AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A GTX1, conflicts with PWML0 */ + AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB2 periph A GTX2, conflicts with TK1 */ + AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A GTX3, conflicts with TF1 */ + AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A GRX0, conflicts with PWMH1 */ + AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB5 periph A GRX1, conflicts with PWML1 */ + AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A GRX2, conflicts with TD1 */ + AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A GRX3, conflicts with RK1 */ }; pinctrl_macb0_data_gmii: macb0_data_gmii { atmel,pins = - <1 19 0x2 0x0 /* PB19 periph B GTX4, conflicts with MCI1_CDA */ - 1 20 0x2 0x0 /* PB20 periph B GTX5, conflicts with MCI1_DA0 */ - 1 21 0x2 0x0 /* PB21 periph B GTX6, conflicts with MCI1_DA1 */ - 1 22 0x2 0x0 /* PB22 periph B GTX7, conflicts with MCI1_DA2 */ - 1 23 0x2 0x0 /* PB23 periph B GRX4, conflicts with MCI1_DA3 */ - 1 24 0x2 0x0 /* PB24 periph B GRX5, conflicts with MCI1_CK */ - 1 25 0x2 0x0 /* PB25 periph B GRX6, conflicts with SCK1 */ - 1 26 0x2 0x0>; /* PB26 periph B GRX7, conflicts with CTS1 */ + <AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB19 periph B GTX4, conflicts with MCI1_CDA */ + AT91_PIOB 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB20 periph B GTX5, conflicts with MCI1_DA0 */ + AT91_PIOB 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB21 periph B GTX6, conflicts with MCI1_DA1 */ + AT91_PIOB 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB22 periph B GTX7, conflicts with MCI1_DA2 */ + AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB23 periph B GRX4, conflicts with MCI1_DA3 */ + AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB24 periph B GRX5, conflicts with MCI1_CK */ + AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB25 periph B GRX6, conflicts with SCK1 */ + AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB26 periph B GRX7, conflicts with CTS1 */ }; pinctrl_macb0_signal_rgmii: macb0_signal_rgmii { atmel,pins = - <1 8 0x1 0x0 /* PB8 periph A GTXCK, conflicts with PWMH2 */ - 1 9 0x1 0x0 /* PB9 periph A GTXEN, conflicts with PWML2 */ - 1 11 0x1 0x0 /* PB11 periph A GRXCK, conflicts with RD1 */ - 1 13 0x1 0x0 /* PB13 periph A GRXER, conflicts with PWML3 */ - 1 16 0x1 0x0 /* PB16 periph A GMDC */ - 1 17 0x1 0x0 /* PB17 periph A GMDIO */ - 1 18 0x1 0x0>; /* PB18 periph A G125CK */ + <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB8 periph A GTXCK, conflicts with PWMH2 */ + AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A GTXEN, conflicts with PWML2 */ + AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A GRXCK, conflicts with RD1 */ + AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A GRXER, conflicts with PWML3 */ + AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A GMDC */ + AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A GMDIO */ + AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A G125CK */ }; pinctrl_macb0_signal_gmii: macb0_signal_gmii { atmel,pins = - <1 9 0x1 0x0 /* PB9 periph A GTXEN, conflicts with PWML2 */ - 1 10 0x1 0x0 /* PB10 periph A GTXER, conflicts with RF1 */ - 1 11 0x1 0x0 /* PB11 periph A GRXCK, conflicts with RD1 */ - 1 12 0x1 0x0 /* PB12 periph A GRXDV, conflicts with PWMH3 */ - 1 13 0x1 0x0 /* PB13 periph A GRXER, conflicts with PWML3 */ - 1 14 0x1 0x0 /* PB14 periph A GCRS, conflicts with CANRX1 */ - 1 15 0x1 0x0 /* PB15 periph A GCOL, conflicts with CANTX1 */ - 1 16 0x1 0x0 /* PB16 periph A GMDC */ - 1 17 0x1 0x0 /* PB17 periph A GMDIO */ - 1 27 0x2 0x0>; /* PB27 periph B G125CKO */ + <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A GTXEN, conflicts with PWML2 */ + AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A GTXER, conflicts with RF1 */ + AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A GRXCK, conflicts with RD1 */ + AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A GRXDV, conflicts with PWMH3 */ + AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A GRXER, conflicts with PWML3 */ + AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A GCRS, conflicts with CANRX1 */ + AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A GCOL, conflicts with CANTX1 */ + AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A GMDC */ + AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A GMDIO */ + AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB27 periph B G125CKO */ }; }; @@ -616,252 +613,251 @@ macb1 { pinctrl_macb1_rmii: macb1_rmii-0 { atmel,pins = - <2 0 0x1 0x0 /* PC0 periph A ETX0, conflicts with TIOA3 */ - 2 1 0x1 0x0 /* PC1 periph A ETX1, conflicts with TIOB3 */ - 2 2 0x1 0x0 /* PC2 periph A ERX0, conflicts with TCLK3 */ - 2 3 0x1 0x0 /* PC3 periph A ERX1, conflicts with TIOA4 */ - 2 4 0x1 0x0 /* PC4 periph A ETXEN, conflicts with TIOB4 */ - 2 5 0x1 0x0 /* PC5 periph A ECRSDV,conflicts with TCLK4 */ - 2 6 0x1 0x0 /* PC6 periph A ERXER, conflicts with TIOA5 */ - 2 7 0x1 0x0 /* PC7 periph A EREFCK, conflicts with TIOB5 */ - 2 8 0x1 0x0 /* PC8 periph A EMDC, conflicts with TCLK5 */ - 2 9 0x1 0x0>; /* PC9 periph A EMDIO */ + <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC0 periph A ETX0, conflicts with TIOA3 */ + AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC1 periph A ETX1, conflicts with TIOB3 */ + AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC2 periph A ERX0, conflicts with TCLK3 */ + AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC3 periph A ERX1, conflicts with TIOA4 */ + AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC4 periph A ETXEN, conflicts with TIOB4 */ + AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC5 periph A ECRSDV,conflicts with TCLK4 */ + AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC6 periph A ERXER, conflicts with TIOA5 */ + AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC7 periph A EREFCK, conflicts with TIOB5 */ + AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC8 periph A EMDC, conflicts with TCLK5 */ + AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC9 periph A EMDIO */ }; }; mmc0 { pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 { atmel,pins = - <3 9 0x1 0x0 /* PD9 periph A MCI0_CK */ - 3 0 0x1 0x1 /* PD0 periph A MCI0_CDA with pullup */ - 3 1 0x1 0x1>; /* PD1 periph A MCI0_DA0 with pullup */ + <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD9 periph A MCI0_CK */ + AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A MCI0_CDA with pullup */ + AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD1 periph A MCI0_DA0 with pullup */ }; pinctrl_mmc0_dat1_3: mmc0_dat1_3 { atmel,pins = - <3 2 0x1 0x1 /* PD2 periph A MCI0_DA1 with pullup */ - 3 3 0x1 0x1 /* PD3 periph A MCI0_DA2 with pullup */ - 3 4 0x1 0x1>; /* PD4 periph A MCI0_DA3 with pullup */ + <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A MCI0_DA1 with pullup */ + AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD3 periph A MCI0_DA2 with pullup */ + AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD4 periph A MCI0_DA3 with pullup */ }; pinctrl_mmc0_dat4_7: mmc0_dat4_7 { atmel,pins = - <3 5 0x1 0x1 /* PD5 periph A MCI0_DA4 with pullup, conflicts with TIOA0, PWMH2 */ - 3 6 0x1 0x1 /* PD6 periph A MCI0_DA5 with pullup, conflicts with TIOB0, PWML2 */ - 3 7 0x1 0x1 /* PD7 periph A MCI0_DA6 with pullup, conlicts with TCLK0, PWMH3 */ - 3 8 0x1 0x1>; /* PD8 periph A MCI0_DA7 with pullup, conflicts with PWML3 */ + <AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD5 periph A MCI0_DA4 with pullup, conflicts with TIOA0, PWMH2 */ + AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD6 periph A MCI0_DA5 with pullup, conflicts with TIOB0, PWML2 */ + AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD7 periph A MCI0_DA6 with pullup, conlicts with TCLK0, PWMH3 */ + AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD8 periph A MCI0_DA7 with pullup, conflicts with PWML3 */ }; }; mmc1 { pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 { atmel,pins = - <1 24 0x1 0x0 /* PB24 periph A MCI1_CK, conflicts with GRX5 */ - 1 19 0x1 0x1 /* PB19 periph A MCI1_CDA with pullup, conflicts with GTX4 */ - 1 20 0x1 0x1>; /* PB20 periph A MCI1_DA0 with pullup, conflicts with GTX5 */ + <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A MCI1_CK, conflicts with GRX5 */ + AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A MCI1_CDA with pullup, conflicts with GTX4 */ + AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB20 periph A MCI1_DA0 with pullup, conflicts with GTX5 */ }; pinctrl_mmc1_dat1_3: mmc1_dat1_3 { atmel,pins = - <1 21 0x1 0x1 /* PB21 periph A MCI1_DA1 with pullup, conflicts with GTX6 */ - 1 22 0x1 0x1 /* PB22 periph A MCI1_DA2 with pullup, conflicts with GTX7 */ - 1 23 0x1 0x1>; /* PB23 periph A MCI1_DA3 with pullup, conflicts with GRX4 */ + <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB21 periph A MCI1_DA1 with pullup, conflicts with GTX6 */ + AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB22 periph A MCI1_DA2 with pullup, conflicts with GTX7 */ + AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB23 periph A MCI1_DA3 with pullup, conflicts with GRX4 */ }; }; mmc2 { pinctrl_mmc2_clk_cmd_dat0: mmc2_clk_cmd_dat0 { atmel,pins = - <2 15 0x1 0x0 /* PC15 periph A MCI2_CK, conflicts with PCK2 */ - 2 10 0x1 0x1 /* PC10 periph A MCI2_CDA with pullup */ - 2 11 0x1 0x1>; /* PC11 periph A MCI2_DA0 with pullup */ + <AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC15 periph A MCI2_CK, conflicts with PCK2 */ + AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC10 periph A MCI2_CDA with pullup */ + AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC11 periph A MCI2_DA0 with pullup */ }; pinctrl_mmc2_dat1_3: mmc2_dat1_3 { atmel,pins = - <2 12 0x1 0x0 /* PC12 periph A MCI2_DA1 with pullup, conflicts with TIOA1 */ - 2 13 0x1 0x0 /* PC13 periph A MCI2_DA2 with pullup, conflicts with TIOB1 */ - 2 14 0x1 0x0>; /* PC14 periph A MCI2_DA3 with pullup, conflicts with TCLK1 */ + <AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC12 periph A MCI2_DA1 with pullup, conflicts with TIOA1 */ + AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC13 periph A MCI2_DA2 with pullup, conflicts with TIOB1 */ + AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC14 periph A MCI2_DA3 with pullup, conflicts with TCLK1 */ }; }; nand0 { pinctrl_nand0_ale_cle: nand0_ale_cle-0 { atmel,pins = - <4 21 0x1 0x1 /* PE21 periph A with pullup */ - 4 22 0x1 0x1>; /* PE22 periph A with pullup */ + <AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PE21 periph A with pullup */ + AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PE22 periph A with pullup */ }; }; - pioA: gpio@fffff200 { - compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; - reg = <0xfffff200 0x100>; - interrupts = <6 4 1>; - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; - #interrupt-cells = <2>; - }; - - pioB: gpio@fffff400 { - compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; - reg = <0xfffff400 0x100>; - interrupts = <7 4 1>; - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; - #interrupt-cells = <2>; - }; - - pioC: gpio@fffff600 { - compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; - reg = <0xfffff600 0x100>; - interrupts = <8 4 1>; - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; - #interrupt-cells = <2>; - }; - - pioD: gpio@fffff800 { - compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; - reg = <0xfffff800 0x100>; - interrupts = <9 4 1>; - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; - #interrupt-cells = <2>; - }; - - pioE: gpio@fffffa00 { - compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; - reg = <0xfffffa00 0x100>; - interrupts = <10 4 1>; - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; - #interrupt-cells = <2>; - }; - spi0 { pinctrl_spi0: spi0-0 { atmel,pins = - <3 10 0x1 0x0 /* PD10 periph A SPI0_MISO pin */ - 3 11 0x1 0x0 /* PD11 periph A SPI0_MOSI pin */ - 3 12 0x1 0x0 /* PD12 periph A SPI0_SPCK pin */ - 3 13 0x0 0x0>; /* PD13 GPIO SPI0_NPCS0 pin */ + <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A SPI0_MISO pin */ + AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A SPI0_MOSI pin */ + AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A SPI0_SPCK pin */ }; }; spi1 { pinctrl_spi1: spi1-0 { atmel,pins = - <2 22 0x1 0x0 /* PC22 periph A SPI1_MISO pin */ - 2 23 0x1 0x0 /* PC23 periph A SPI1_MOSI pin */ - 2 24 0x1 0x0 /* PC24 periph A SPI1_SPCK pin */ - 2 25 0x0 0x0>; /* PC25 GPIO SPI1_NPCS0 pin */ + <AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC22 periph A SPI1_MISO pin */ + AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC23 periph A SPI1_MOSI pin */ + AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC24 periph A SPI1_SPCK pin */ }; }; ssc0 { pinctrl_ssc0_tx: ssc0_tx { atmel,pins = - <2 16 0x1 0x0 /* PC16 periph A TK0 */ - 2 17 0x1 0x0 /* PC17 periph A TF0 */ - 2 18 0x1 0x0>; /* PC18 periph A TD0 */ + <AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC16 periph A TK0 */ + AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC17 periph A TF0 */ + AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC18 periph A TD0 */ }; pinctrl_ssc0_rx: ssc0_rx { atmel,pins = - <2 19 0x1 0x0 /* PC19 periph A RK0 */ - 2 20 0x1 0x0 /* PC20 periph A RF0 */ - 2 21 0x1 0x0>; /* PC21 periph A RD0 */ + <AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC19 periph A RK0 */ + AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC20 periph A RF0 */ + AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC21 periph A RD0 */ }; }; ssc1 { pinctrl_ssc1_tx: ssc1_tx { atmel,pins = - <1 2 0x2 0x0 /* PB2 periph B TK1, conflicts with GTX2 */ - 1 3 0x2 0x0 /* PB3 periph B TF1, conflicts with GTX3 */ - 1 6 0x2 0x0>; /* PB6 periph B TD1, conflicts with TD1 */ + <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB2 periph B TK1, conflicts with GTX2 */ + AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B TF1, conflicts with GTX3 */ + AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB6 periph B TD1, conflicts with TD1 */ }; pinctrl_ssc1_rx: ssc1_rx { atmel,pins = - <1 7 0x2 0x0 /* PB7 periph B RK1, conflicts with EREFCK */ - 1 10 0x2 0x0 /* PB10 periph B RF1, conflicts with GTXER */ - 1 11 0x2 0x0>; /* PB11 periph B RD1, conflicts with GRXCK */ + <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB7 periph B RK1, conflicts with EREFCK */ + AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB10 periph B RF1, conflicts with GTXER */ + AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB11 periph B RD1, conflicts with GRXCK */ }; }; uart0 { pinctrl_uart0: uart0-0 { atmel,pins = - <2 29 0x1 0x0 /* PC29 periph A, conflicts with PWMFI2, ISI_D8 */ - 2 30 0x1 0x1>; /* PC30 periph A with pullup, conflicts with ISI_PCK */ + <AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC29 periph A, conflicts with PWMFI2, ISI_D8 */ + AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC30 periph A with pullup, conflicts with ISI_PCK */ }; }; uart1 { pinctrl_uart1: uart1-0 { atmel,pins = - <0 30 0x2 0x0 /* PA30 periph B, conflicts with TWD0, ISI_VSYNC */ - 0 31 0x2 0x1>; /* PA31 periph B with pullup, conflicts with TWCK0, ISI_HSYNC */ + <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA30 periph B, conflicts with TWD0, ISI_VSYNC */ + AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA31 periph B with pullup, conflicts with TWCK0, ISI_HSYNC */ }; }; usart0 { pinctrl_usart0: usart0-0 { atmel,pins = - <3 17 0x1 0x0 /* PD17 periph A */ - 3 18 0x1 0x1>; /* PD18 periph A with pullup */ + <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD17 periph A */ + AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD18 periph A with pullup */ }; pinctrl_usart0_rts_cts: usart0_rts_cts-0 { atmel,pins = - <3 15 0x1 0x0 /* PD15 periph A, conflicts with SPI0_NPCS2, CANTX0 */ - 3 16 0x1 0x0>; /* PD16 periph A, conflicts with SPI0_NPCS3, PWMFI3 */ + <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD15 periph A, conflicts with SPI0_NPCS2, CANTX0 */ + AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A, conflicts with SPI0_NPCS3, PWMFI3 */ }; }; usart1 { pinctrl_usart1: usart1-0 { atmel,pins = - <1 28 0x1 0x0 /* PB28 periph A */ - 1 29 0x1 0x1>; /* PB29 periph A with pullup */ + <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB28 periph A */ + AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB29 periph A with pullup */ }; pinctrl_usart1_rts_cts: usart1_rts_cts-0 { atmel,pins = - <1 26 0x1 0x0 /* PB26 periph A, conflicts with GRX7 */ - 1 27 0x1 0x0>; /* PB27 periph A, conflicts with G125CKO */ + <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB26 periph A, conflicts with GRX7 */ + AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A, conflicts with G125CKO */ }; }; usart2 { pinctrl_usart2: usart2-0 { atmel,pins = - <4 25 0x2 0x0 /* PE25 periph B, conflicts with A25 */ - 4 26 0x2 0x1>; /* PE26 periph B with pullup, conflicts NCS0 */ + <AT91_PIOE 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE25 periph B, conflicts with A25 */ + AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PE26 periph B with pullup, conflicts NCS0 */ }; pinctrl_usart2_rts_cts: usart2_rts_cts-0 { atmel,pins = - <4 23 0x2 0x0 /* PE23 periph B, conflicts with A23 */ - 4 24 0x2 0x0>; /* PE24 periph B, conflicts with A24 */ + <AT91_PIOE 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE23 periph B, conflicts with A23 */ + AT91_PIOE 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE24 periph B, conflicts with A24 */ }; }; usart3 { pinctrl_usart3: usart3-0 { atmel,pins = - <4 18 0x2 0x0 /* PE18 periph B, conflicts with A18 */ - 4 19 0x2 0x1>; /* PE19 periph B with pullup, conflicts with A19 */ + <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE18 periph B, conflicts with A18 */ + AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PE19 periph B with pullup, conflicts with A19 */ }; pinctrl_usart3_rts_cts: usart3_rts_cts-0 { atmel,pins = - <4 16 0x2 0x0 /* PE16 periph B, conflicts with A16 */ - 4 17 0x2 0x0>; /* PE17 periph B, conflicts with A17 */ + <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE16 periph B, conflicts with A16 */ + AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE17 periph B, conflicts with A17 */ }; }; + + + pioA: gpio@fffff200 { + compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; + reg = <0xfffff200 0x100>; + interrupts = <6 IRQ_TYPE_LEVEL_HIGH 1>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; + #interrupt-cells = <2>; + }; + + pioB: gpio@fffff400 { + compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; + reg = <0xfffff400 0x100>; + interrupts = <7 IRQ_TYPE_LEVEL_HIGH 1>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; + #interrupt-cells = <2>; + }; + + pioC: gpio@fffff600 { + compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; + reg = <0xfffff600 0x100>; + interrupts = <8 IRQ_TYPE_LEVEL_HIGH 1>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; + #interrupt-cells = <2>; + }; + + pioD: gpio@fffff800 { + compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; + reg = <0xfffff800 0x100>; + interrupts = <9 IRQ_TYPE_LEVEL_HIGH 1>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; + #interrupt-cells = <2>; + }; + + pioE: gpio@fffffa00 { + compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; + reg = <0xfffffa00 0x100>; + interrupts = <10 IRQ_TYPE_LEVEL_HIGH 1>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; + #interrupt-cells = <2>; + }; }; pmc: pmc@fffffc00 { @@ -877,7 +873,7 @@ pit: timer@fffffe30 { compatible = "atmel,at91sam9260-pit"; reg = <0xfffffe30 0xf>; - interrupts = <3 4 5>; + interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>; }; watchdog@fffffe40 { @@ -889,7 +885,7 @@ rtc@fffffeb0 { compatible = "atmel,at91rm9200-rtc"; reg = <0xfffffeb0 0x30>; - interrupts = <1 4 7>; + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; }; }; @@ -899,7 +895,7 @@ compatible = "atmel,at91sam9rl-udc"; reg = <0x00500000 0x100000 0xf8030000 0x4000>; - interrupts = <33 4 2>; + interrupts = <33 IRQ_TYPE_LEVEL_HIGH 2>; status = "disabled"; ep0 { @@ -1011,14 +1007,14 @@ usb1: ohci@00600000 { compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00600000 0x100000>; - interrupts = <32 4 2>; + interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>; status = "disabled"; }; usb2: ehci@00700000 { compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; reg = <0x00700000 0x100000>; - interrupts = <32 4 2>; + interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>; status = "disabled"; }; @@ -1034,7 +1030,7 @@ 0xffffc000 0x00000070 /* NFC HSMC regs */ 0x00200000 0x00100000 /* NFC SRAM banks */ >; - interrupts = <5 4 6>; + interrupts = <5 IRQ_TYPE_LEVEL_HIGH 6>; atmel,nand-addr-offset = <21>; atmel,nand-cmd-offset = <22>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/sama5d31ek.dts b/arch/arm/boot/dts/sama5d31ek.dts index fa5d216f1db7..027bac7510b6 100644 --- a/arch/arm/boot/dts/sama5d31ek.dts +++ b/arch/arm/boot/dts/sama5d31ek.dts @@ -7,8 +7,8 @@ * Licensed under GPLv2 or later. */ /dts-v1/; -/include/ "sama5d3xmb.dtsi" -/include/ "sama5d3xdm.dtsi" +#include "sama5d3xmb.dtsi" +#include "sama5d3xdm.dtsi" / { model = "Atmel SAMA5D31-EK"; @@ -41,7 +41,7 @@ leds { d3 { label = "d3"; - gpios = <&pioE 24 0>; + gpios = <&pioE 24 GPIO_ACTIVE_HIGH>; }; }; diff --git a/arch/arm/boot/dts/sama5d33ek.dts b/arch/arm/boot/dts/sama5d33ek.dts index c38c9433d7a5..99bd0c8e0471 100644 --- a/arch/arm/boot/dts/sama5d33ek.dts +++ b/arch/arm/boot/dts/sama5d33ek.dts @@ -7,8 +7,8 @@ * Licensed under GPLv2 or later. */ /dts-v1/; -/include/ "sama5d3xmb.dtsi" -/include/ "sama5d3xdm.dtsi" +#include "sama5d3xmb.dtsi" +#include "sama5d3xdm.dtsi" / { model = "Atmel SAMA5D33-EK"; diff --git a/arch/arm/boot/dts/sama5d34ek.dts b/arch/arm/boot/dts/sama5d34ek.dts index 6bebfcdcb1d1..fb8ee11cf282 100644 --- a/arch/arm/boot/dts/sama5d34ek.dts +++ b/arch/arm/boot/dts/sama5d34ek.dts @@ -7,8 +7,8 @@ * Licensed under GPLv2 or later. */ /dts-v1/; -/include/ "sama5d3xmb.dtsi" -/include/ "sama5d3xdm.dtsi" +#include "sama5d3xmb.dtsi" +#include "sama5d3xdm.dtsi" / { model = "Atmel SAMA5D34-EK"; @@ -51,7 +51,7 @@ leds { d3 { label = "d3"; - gpios = <&pioE 24 0>; + gpios = <&pioE 24 GPIO_ACTIVE_HIGH>; }; }; diff --git a/arch/arm/boot/dts/sama5d35ek.dts b/arch/arm/boot/dts/sama5d35ek.dts index a488fc4e9777..509a53d9cc7b 100644 --- a/arch/arm/boot/dts/sama5d35ek.dts +++ b/arch/arm/boot/dts/sama5d35ek.dts @@ -7,7 +7,7 @@ * Licensed under GPLv2 or later. */ /dts-v1/; -/include/ "sama5d3xmb.dtsi" +#include "sama5d3xmb.dtsi" / { model = "Atmel SAMA5D35-EK"; @@ -48,7 +48,7 @@ pb_user1 { label = "pb_user1"; - gpios = <&pioE 27 0>; + gpios = <&pioE 27 GPIO_ACTIVE_HIGH>; linux,code = <0x100>; gpio-key,wakeup; }; diff --git a/arch/arm/boot/dts/sama5d3xcm.dtsi b/arch/arm/boot/dts/sama5d3xcm.dtsi index 1f8ed404626c..1f8050813a54 100644 --- a/arch/arm/boot/dts/sama5d3xcm.dtsi +++ b/arch/arm/boot/dts/sama5d3xcm.dtsi @@ -6,7 +6,7 @@ * * Licensed under GPLv2 or later. */ -/include/ "sama5d3.dtsi" +#include "sama5d3.dtsi" / { compatible = "atmel,samad3xcm", "atmel,sama5d3", "atmel,sama5"; @@ -32,6 +32,10 @@ ahb { apb { + spi0: spi@f0004000 { + cs-gpios = <&pioD 13 0>, <0>, <0>, <0>; + }; + macb0: ethernet@f0028000 { phy-mode = "rgmii"; }; @@ -85,7 +89,7 @@ d2 { label = "d2"; - gpios = <&pioE 25 1>; /* PE25, conflicts with A25, RXD2 */ + gpios = <&pioE 25 GPIO_ACTIVE_LOW>; /* PE25, conflicts with A25, RXD2 */ }; }; }; diff --git a/arch/arm/boot/dts/sama5d3xdm.dtsi b/arch/arm/boot/dts/sama5d3xdm.dtsi index 4b8830eb2060..1c296d6b2f2a 100644 --- a/arch/arm/boot/dts/sama5d3xdm.dtsi +++ b/arch/arm/boot/dts/sama5d3xdm.dtsi @@ -33,7 +33,7 @@ board { pinctrl_qt1070_irq: qt1070_irq { atmel,pins = - <4 31 0x0 0x5>; /* PE31 GPIO with pull up deglith */ + <AT91_PIOE 31 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PE31 GPIO with pull up deglith */ }; }; }; diff --git a/arch/arm/boot/dts/sama5d3xmb.dtsi b/arch/arm/boot/dts/sama5d3xmb.dtsi index 661d7ca9c309..8a9e05d8a4b8 100644 --- a/arch/arm/boot/dts/sama5d3xmb.dtsi +++ b/arch/arm/boot/dts/sama5d3xmb.dtsi @@ -6,7 +6,7 @@ * * Licensed under GPLv2 or later. */ -/include/ "sama5d3xcm.dtsi" +#include "sama5d3xcm.dtsi" / { compatible = "atmel,sama5d3xmb", "atmel,sama5d3xcm", "atmel,sama5d3", "atmel,sama5"; @@ -20,7 +20,7 @@ slot@0 { reg = <0>; bus-width = <4>; - cd-gpios = <&pioD 17 0>; + cd-gpios = <&pioD 17 GPIO_ACTIVE_HIGH>; }; }; @@ -62,7 +62,7 @@ slot@0 { reg = <0>; bus-width = <4>; - cd-gpios = <&pioD 18 0>; + cd-gpios = <&pioD 18 GPIO_ACTIVE_HIGH>; }; }; @@ -87,32 +87,32 @@ board { pinctrl_mmc0_cd: mmc0_cd { atmel,pins = - <3 17 0x0 0x5>; /* PD17 GPIO with pullup deglitch */ + <AT91_PIOD 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD17 GPIO with pullup deglitch */ }; pinctrl_mmc1_cd: mmc1_cd { atmel,pins = - <3 18 0x0 0x5>; /* PD18 GPIO with pullup deglitch */ + <AT91_PIOD 18 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD18 GPIO with pullup deglitch */ }; pinctrl_pck0_as_audio_mck: pck0_as_audio_mck { atmel,pins = - <3 30 0x2 0x0>; /* PD30 periph B */ + <AT91_PIOD 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD30 periph B */ }; pinctrl_isi_reset: isi_reset-0 { atmel,pins = - <4 24 0x0 0x0>; /* PE24 gpio */ + <AT91_PIOE 24 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; /* PE24 gpio */ }; pinctrl_isi_power: isi_power-0 { atmel,pins = - <4 29 0x0 0x0>; /* PE29 gpio */ + <AT91_PIOE 29 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; /* PE29 gpio */ }; pinctrl_usba_vbus: usba_vbus { atmel,pins = - <3 29 0x0 0x4>; /* PD29 GPIO with deglitch */ + <AT91_PIOD 29 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* PD29 GPIO with deglitch */ }; }; }; @@ -127,7 +127,7 @@ }; usb0: gadget@00500000 { - atmel,vbus-gpio = <&pioD 29 0>; + atmel,vbus-gpio = <&pioD 29 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usba_vbus>; status = "okay"; @@ -135,9 +135,9 @@ usb1: ohci@00600000 { num-ports = <3>; - atmel,vbus-gpio = <&pioD 25 0 - &pioD 26 1 - &pioD 27 1 + atmel,vbus-gpio = <&pioD 25 GPIO_ACTIVE_HIGH + &pioD 26 GPIO_ACTIVE_LOW + &pioD 27 GPIO_ACTIVE_LOW >; status = "okay"; }; diff --git a/arch/arm/boot/dts/sh7372.dtsi b/arch/arm/boot/dts/sh7372.dtsi index 677fc603f8b3..7bf020ecadf5 100644 --- a/arch/arm/boot/dts/sh7372.dtsi +++ b/arch/arm/boot/dts/sh7372.dtsi @@ -14,8 +14,13 @@ compatible = "renesas,sh7372"; cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu@0 { compatible = "arm,cortex-a8"; + device_type = "cpu"; + reg = <0x0>; }; }; }; diff --git a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts index 5972abb55f9c..b6f759e830ed 100644 --- a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts +++ b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts @@ -18,6 +18,19 @@ model = "KZM-A9-GT"; compatible = "renesas,kzm9g-reference", "renesas,sh73a0"; + cpus { + cpu@0 { + cpu0-supply = <&vdd_dvfs>; + operating-points = < + /* kHz uV */ + 1196000 1315000 + 598000 1175000 + 398667 1065000 + >; + voltage-tolerance = <1>; /* 1% */ + }; + }; + chosen { bootargs = "console=tty0 console=ttySC4,115200 root=/dev/nfs ip=dhcp ignore_loglevel earlyprintk=sh-sci.4,115200"; }; @@ -59,6 +72,79 @@ }; }; +&i2c0 { + as3711@40 { + compatible = "ams,as3711"; + reg = <0x40>; + + regulators { + vdd_dvfs: sd1 { + regulator-name = "1.315V CPU"; + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + regulator-boot-on; + }; + sd2 { + regulator-name = "1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + sd4 { + regulator-name = "1.215V"; + regulator-min-microvolt = <1215000>; + regulator-max-microvolt = <1235000>; + regulator-always-on; + regulator-boot-on; + }; + ldo2 { + regulator-name = "2.8V CPU"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + regulator-boot-on; + }; + ldo3 { + regulator-name = "3.0V CPU"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + regulator-boot-on; + }; + ldo4 { + regulator-name = "2.8V"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + regulator-boot-on; + }; + ldo5 { + regulator-name = "2.8V #2"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + regulator-boot-on; + }; + ldo7 { + regulator-name = "1.15V CPU"; + regulator-min-microvolt = <1150000>; + regulator-max-microvolt = <1150000>; + regulator-always-on; + regulator-boot-on; + }; + ldo8 { + regulator-name = "1.15V CPU #2"; + regulator-min-microvolt = <1150000>; + regulator-max-microvolt = <1150000>; + regulator-always-on; + regulator-boot-on; + }; + }; + }; +}; + &mmcif { bus-width = <8>; vmmc-supply = <®_1p8v>; diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi index 16a6e13e08b4..bee62a2cf6d6 100644 --- a/arch/arm/boot/dts/socfpga.dtsi +++ b/arch/arm/boot/dts/socfpga.dtsi @@ -23,6 +23,7 @@ aliases { ethernet0 = &gmac0; + ethernet1 = &gmac1; serial0 = &uart0; serial1 = &uart1; timer0 = &timer0; @@ -94,6 +95,12 @@ compatible = "fixed-clock"; }; + f2s_periph_ref_clk: f2s_periph_ref_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <10000000>; + }; + main_pll: main_pll { #address-cells = <1>; #size-cells = <0>; @@ -235,16 +242,222 @@ reg = <0xD4>; }; }; + + mpu_periph_clk: mpu_periph_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&mpuclk>; + fixed-divider = <4>; + }; + + mpu_l2_ram_clk: mpu_l2_ram_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&mpuclk>; + fixed-divider = <2>; + }; + + l4_main_clk: l4_main_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&mainclk>; + clk-gate = <0x60 0>; + }; + + l3_main_clk: l3_main_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&mainclk>; + }; + + l3_mp_clk: l3_mp_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&mainclk>; + div-reg = <0x64 0 2>; + clk-gate = <0x60 1>; + }; + + l3_sp_clk: l3_sp_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&mainclk>; + div-reg = <0x64 2 2>; + }; + + l4_mp_clk: l4_mp_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&mainclk>, <&per_base_clk>; + div-reg = <0x64 4 3>; + clk-gate = <0x60 2>; + }; + + l4_sp_clk: l4_sp_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&mainclk>, <&per_base_clk>; + div-reg = <0x64 7 3>; + clk-gate = <0x60 3>; + }; + + dbg_at_clk: dbg_at_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&dbg_base_clk>; + div-reg = <0x68 0 2>; + clk-gate = <0x60 4>; + }; + + dbg_clk: dbg_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&dbg_base_clk>; + div-reg = <0x68 2 2>; + clk-gate = <0x60 5>; + }; + + dbg_trace_clk: dbg_trace_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&dbg_base_clk>; + div-reg = <0x6C 0 3>; + clk-gate = <0x60 6>; + }; + + dbg_timer_clk: dbg_timer_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&dbg_base_clk>; + clk-gate = <0x60 7>; + }; + + cfg_clk: cfg_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&cfg_s2f_usr0_clk>; + clk-gate = <0x60 8>; + }; + + s2f_user0_clk: s2f_user0_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&cfg_s2f_usr0_clk>; + clk-gate = <0x60 9>; + }; + + emac_0_clk: emac_0_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&emac0_clk>; + clk-gate = <0xa0 0>; + }; + + emac_1_clk: emac_1_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&emac1_clk>; + clk-gate = <0xa0 1>; + }; + + usb_mp_clk: usb_mp_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&per_base_clk>; + clk-gate = <0xa0 2>; + div-reg = <0xa4 0 3>; + }; + + spi_m_clk: spi_m_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&per_base_clk>; + clk-gate = <0xa0 3>; + div-reg = <0xa4 3 3>; + }; + + can0_clk: can0_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&per_base_clk>; + clk-gate = <0xa0 4>; + div-reg = <0xa4 6 3>; + }; + + can1_clk: can1_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&per_base_clk>; + clk-gate = <0xa0 5>; + div-reg = <0xa4 9 3>; + }; + + gpio_db_clk: gpio_db_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&per_base_clk>; + clk-gate = <0xa0 6>; + div-reg = <0xa8 0 24>; + }; + + s2f_user1_clk: s2f_user1_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&s2f_usr1_clk>; + clk-gate = <0xa0 7>; + }; + + sdmmc_clk: sdmmc_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&f2s_periph_ref_clk>, <&main_nand_sdmmc_clk>, <&per_nand_mmc_clk>; + clk-gate = <0xa0 8>; + }; + + nand_x_clk: nand_x_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&f2s_periph_ref_clk>, <&main_nand_sdmmc_clk>, <&per_nand_mmc_clk>; + clk-gate = <0xa0 9>; + }; + + nand_clk: nand_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&f2s_periph_ref_clk>, <&main_nand_sdmmc_clk>, <&per_nand_mmc_clk>; + clk-gate = <0xa0 10>; + fixed-divider = <4>; + }; + + qspi_clk: qspi_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&f2s_periph_ref_clk>, <&main_qspi_clk>, <&per_qspi_clk>; + clk-gate = <0xa0 11>; + }; }; }; - gmac0: stmmac@ff700000 { + gmac0: ethernet@ff700000 { compatible = "altr,socfpga-stmmac", "snps,dwmac-3.70a", "snps,dwmac"; reg = <0xff700000 0x2000>; interrupts = <0 115 4>; interrupt-names = "macirq"; mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */ - phy-mode = "gmii"; + clocks = <&emac0_clk>; + clock-names = "stmmaceth"; + status = "disabled"; + }; + + gmac1: ethernet@ff702000 { + compatible = "altr,socfpga-stmmac", "snps,dwmac-3.70a", "snps,dwmac"; + reg = <0xff702000 0x2000>; + interrupts = <0 120 4>; + interrupt-names = "macirq"; + mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */ + clocks = <&emac1_clk>; + clock-names = "stmmaceth"; + status = "disabled"; }; L2: l2-cache@fffef000 { diff --git a/arch/arm/boot/dts/socfpga_cyclone5.dts b/arch/arm/boot/dts/socfpga_cyclone5.dts index 2495958f1016..973999d2c697 100644 --- a/arch/arm/boot/dts/socfpga_cyclone5.dts +++ b/arch/arm/boot/dts/socfpga_cyclone5.dts @@ -32,6 +32,13 @@ reg = <0x0 0x40000000>; /* 1GB */ }; + aliases { + /* this allow the ethaddr uboot environmnet variable contents + * to be added to the gmac1 device tree blob. + */ + ethernet0 = &gmac1; + }; + soc { clkmgr@ffd04000 { clocks { @@ -41,6 +48,12 @@ }; }; + ethernet@ff702000 { + phy-mode = "rgmii"; + phy-addr = <0xffffffff>; /* probe for phy addr */ + status = "okay"; + }; + timer0@ffc08000 { clock-frequency = <100000000>; }; diff --git a/arch/arm/boot/dts/socfpga_vt.dts b/arch/arm/boot/dts/socfpga_vt.dts index 0bf035d607f0..d1ec0cab2dee 100644 --- a/arch/arm/boot/dts/socfpga_vt.dts +++ b/arch/arm/boot/dts/socfpga_vt.dts @@ -41,6 +41,11 @@ }; }; + ethernet@ff700000 { + phy-mode = "gmii"; + status = "okay"; + }; + timer0@ffc08000 { clock-frequency = <7000000>; }; diff --git a/arch/arm/boot/dts/spear13xx.dtsi b/arch/arm/boot/dts/spear13xx.dtsi index 45597fd91050..4382547df58a 100644 --- a/arch/arm/boot/dts/spear13xx.dtsi +++ b/arch/arm/boot/dts/spear13xx.dtsi @@ -22,12 +22,14 @@ cpu@0 { compatible = "arm,cortex-a9"; + device_type = "cpu"; reg = <0>; next-level-cache = <&L2>; }; cpu@1 { compatible = "arm,cortex-a9"; + device_type = "cpu"; reg = <1>; next-level-cache = <&L2>; }; diff --git a/arch/arm/boot/dts/spear3xx.dtsi b/arch/arm/boot/dts/spear3xx.dtsi index c2a852d43c48..f0e3fcf8e323 100644 --- a/arch/arm/boot/dts/spear3xx.dtsi +++ b/arch/arm/boot/dts/spear3xx.dtsi @@ -17,8 +17,12 @@ interrupt-parent = <&vic>; cpus { - cpu@0 { - compatible = "arm,arm926ejs"; + #address-cells = <0>; + #size-cells = <0>; + + cpu { + compatible = "arm,arm926ej-s"; + device_type = "cpu"; }; }; diff --git a/arch/arm/boot/dts/spear600.dtsi b/arch/arm/boot/dts/spear600.dtsi index 19f99dc4115e..9f60a7b6a42b 100644 --- a/arch/arm/boot/dts/spear600.dtsi +++ b/arch/arm/boot/dts/spear600.dtsi @@ -15,8 +15,12 @@ compatible = "st,spear600"; cpus { - cpu@0 { - compatible = "arm,arm926ejs"; + #address-cells = <0>; + #size-cells = <0>; + + cpu { + compatible = "arm,arm926ej-s"; + device_type = "cpu"; }; }; diff --git a/arch/arm/boot/dts/ste-nomadik-s8815.dts b/arch/arm/boot/dts/ste-nomadik-s8815.dts index b28fbf3408e3..f4dfda7db366 100644 --- a/arch/arm/boot/dts/ste-nomadik-s8815.dts +++ b/arch/arm/boot/dts/ste-nomadik-s8815.dts @@ -14,17 +14,86 @@ bootargs = "root=/dev/ram0 console=ttyAMA1,115200n8 earlyprintk"; }; + /* This is where the interrupt is routed on the S8815 board */ + external-bus@34000000 { + ethernet@300 { + interrupt-parent = <&gpio3>; + interrupts = <8 0x1>; + }; + }; + + pinctrl { + /* Hog CD pins */ + pinctrl-names = "default"; + pinctrl-0 = <&cd_default_mode>; + + mmcsd-cd { + cd_default_mode: cd_default { + cd_default_cfg1 { + /* CD input GPIO */ + ste,pins = "GPIO111_H21"; + ste,input = <0>; + }; + cd_default_cfg2 { + /* CD GPIO biasing */ + ste,pins = "GPIO112_J21"; + ste,output = <0>; + }; + }; + }; + user-led { + user_led_default_mode: user_led_default { + user_led_default_cfg { + ste,pins = "GPIO2_C5"; + ste,output = <1>; + }; + }; + }; + user-button { + user_button_default_mode: user_button_default { + user_button_default_cfg { + ste,pins = "GPIO3_A4"; + ste,input = <0>; + }; + }; + }; + }; + /* Custom board node with GPIO pins to active etc */ usb-s8815 { /* The S8815 is using this very GPIO pin for the SMSC91x IRQs */ ethernet-gpio { - gpios = <&gpio3 19 0x1>; - interrupts = <19 0x1>; - interrupt-parent = <&gpio3>; + gpios = <&gpio3 8 0x1>; }; /* This will bias the MMC/SD card detect line */ mmcsd-gpio { gpios = <&gpio3 16 0x1>; }; }; + + /* The user LED on the board is set up to be used for heartbeat */ + leds { + compatible = "gpio-leds"; + user-led { + label = "user_led"; + gpios = <&gpio0 2 0x1>; + default-state = "off"; + linux,default-trigger = "heartbeat"; + pinctrl-names = "default"; + pinctrl-0 = <&user_led_default_mode>; + }; + }; + + /* User key mapped in as "escape" */ + gpio-keys { + compatible = "gpio-keys"; + user-button { + label = "user_button"; + gpios = <&gpio0 3 0x1>; + linux,code = <1>; /* KEY_ESC */ + gpio-key,wakeup; + pinctrl-names = "default"; + pinctrl-0 = <&user_button_default_mode>; + }; + }; }; diff --git a/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi b/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi index 4a4aab395141..615da8798a0d 100644 --- a/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi +++ b/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi @@ -21,18 +21,23 @@ cache-level = <2>; }; - mtu0 { + mtu0: mtu@101e2000 { /* Nomadik system timer */ + compatible = "st,nomadik-mtu"; reg = <0x101e2000 0x1000>; interrupt-parent = <&vica>; interrupts = <4>; + clocks = <&timclk>, <&pclk>; + clock-names = "timclk", "apb_pclk"; }; - mtu1 { + mtu1: mtu@101e3000 { /* Secondary timer */ reg = <0x101e3000 0x1000>; interrupt-parent = <&vica>; interrupts = <5>; + clocks = <&timclk>, <&pclk>; + clock-names = "timclk", "apb_pclk"; }; gpio0: gpio@101e4000 { @@ -45,6 +50,7 @@ gpio-controller; #gpio-cells = <2>; gpio-bank = <0>; + clocks = <&pclk>; }; gpio1: gpio@101e5000 { @@ -57,6 +63,7 @@ gpio-controller; #gpio-cells = <2>; gpio-bank = <1>; + clocks = <&pclk>; }; gpio2: gpio@101e6000 { @@ -69,6 +76,7 @@ gpio-controller; #gpio-cells = <2>; gpio-bank = <2>; + clocks = <&pclk>; }; gpio3: gpio@101e7000 { @@ -81,10 +89,117 @@ gpio-controller; #gpio-cells = <2>; gpio-bank = <3>; + clocks = <&pclk>; }; pinctrl { compatible = "stericsson,nmk-pinctrl-stn8815"; + /* Pin configurations */ + uart0 { + uart0_default_mux: uart0_mux { + u0_default_mux { + ste,function = "u0"; + ste,pins = "u0_a_1"; + }; + }; + }; + uart1 { + uart1_default_mux: uart1_mux { + u1_default_mux { + ste,function = "u1"; + ste,pins = "u1_a_1"; + }; + }; + }; + mmcsd { + mmcsd_default_mux: mmcsd_mux { + mmcsd_default_mux { + ste,function = "mmcsd"; + ste,pins = "mmcsd_a_1"; + }; + }; + mmcsd_default_mode: mmcsd_default { + mmcsd_default_cfg1 { + /* MCCLK */ + ste,pins = "GPIO8_B10"; + ste,output = <0>; + }; + mmcsd_default_cfg2 { + /* MCCMDDIR, MCDAT0DIR, MCDAT31DIR */ + ste,pins = "GPIO10_C11", "GPIO15_A12", + "GPIO16_C13"; + ste,output = <1>; + }; + mmcsd_default_cfg3 { + /* MCCMD, MCDAT3-0, MCMSFBCLK */ + ste,pins = "GPIO9_A10", "GPIO11_B11", + "GPIO12_A11", "GPIO13_C12", + "GPIO14_B12", "GPIO24_C15"; + ste,input = <1>; + }; + }; + }; + i2c0 { + i2c0_default_mode: i2c0_default { + i2c0_default_cfg { + ste,pins = "GPIO62_D3", "GPIO63_D2"; + ste,input = <1>; + }; + }; + }; + i2c1 { + i2c1_default_mode: i2c1_default { + i2c1_default_cfg { + ste,pins = "GPIO53_L4", "GPIO54_L3"; + ste,input = <1>; + }; + }; + }; + i2c2 { + i2c2_default_mode: i2c2_default { + i2c2_default_cfg { + ste,pins = "GPIO73_C21", "GPIO74_C20"; + ste,input = <1>; + }; + }; + }; + }; + + src: src@101e0000 { + compatible = "stericsson,nomadik-src"; + reg = <0x101e0000 0x1000>; + clocks { + /* + * Dummy clock for primecells + */ + pclk: pclk@0 { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <0>; + }; + /* + * The 2.4 MHz TIMCLK reference clock is active at + * boot time, this is actually the MXTALCLK @19.2 MHz + * divided by 8. This clock is used by the timers and + * watchdog. See page 105 ff. + */ + timclk: timclk@2.4M { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <2400000>; + }; + /* + * At boot time, PLL2 is set to generate a set of + * fixed clocks, one of them is CLK48, the 48 MHz + * clock, routed to the UART, MMC/SD, I2C, IrDA, + * USB and SSP blocks. + */ + clk48: clk48@48M { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <48000000>; + }; + }; }; /* A NAND flash of 128 MiB */ @@ -97,6 +212,7 @@ <0x41000000 0x2000>, /* NAND Base ADDR */ <0x40800000 0x2000>; /* NAND Base CMD */ reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd"; + clocks = <&pclk>; status = "okay"; partition@0 { @@ -144,6 +260,8 @@ <&gpio1 30 0>; /* scl */ #address-cells = <1>; #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_default_mode>; stw4811@2d { compatible = "st,stw4811"; @@ -158,6 +276,8 @@ <&gpio1 21 0>; /* scl */ #address-cells = <1>; #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_default_mode>; camera@2d { compatible = "st,camera"; @@ -180,6 +300,9 @@ <&gpio2 9 0>; /* scl */ #address-cells = <1>; #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_default_mode>; + stw4811@2d { compatible = "st,stw4811-usb"; reg = <0x2d>; @@ -211,6 +334,10 @@ reg = <0x101fd000 0x1000>; interrupt-parent = <&vica>; interrupts = <12>; + clocks = <&clk48>, <&pclk>; + clock-names = "uartclk", "apb_pclk"; + pinctrl-names = "default"; + pinctrl-0 = <&uart0_default_mux>; }; uart1: uart@101fb000 { @@ -218,6 +345,10 @@ reg = <0x101fb000 0x1000>; interrupt-parent = <&vica>; interrupts = <17>; + clocks = <&clk48>, <&pclk>; + clock-names = "uartclk", "apb_pclk"; + pinctrl-names = "default"; + pinctrl-0 = <&uart1_default_mux>; }; uart2: uart@101f2000 { @@ -225,17 +356,23 @@ reg = <0x101f2000 0x1000>; interrupt-parent = <&vica>; interrupts = <28>; + clocks = <&clk48>, <&pclk>; + clock-names = "uartclk", "apb_pclk"; status = "disabled"; }; rng: rng@101b0000 { compatible = "arm,primecell"; reg = <0x101b0000 0x1000>; + clocks = <&clk48>, <&pclk>; + clock-names = "rng", "apb_pclk"; }; rtc: rtc@101e8000 { compatible = "arm,pl031", "arm,primecell"; reg = <0x101e8000 0x1000>; + clocks = <&pclk>; + clock-names = "apb_pclk"; interrupt-parent = <&vica>; interrupts = <10>; }; @@ -243,6 +380,8 @@ mmcsd: sdi@101f6000 { compatible = "arm,pl18x", "arm,primecell"; reg = <0x101f6000 0x1000>; + clocks = <&clk48>, <&pclk>; + clock-names = "mclk", "apb_pclk"; interrupt-parent = <&vica>; interrupts = <22>; max-frequency = <48000000>; @@ -251,6 +390,8 @@ mmc-cap-sd-highspeed; cd-gpios = <&gpio3 15 0x1>; cd-inverted; + pinctrl-names = "default"; + pinctrl-0 = <&mmcsd_default_mux>, <&mmcsd_default_mode>; }; }; }; diff --git a/arch/arm/boot/dts/sun4i-a10-mini-xplus.dts b/arch/arm/boot/dts/sun4i-a10-mini-xplus.dts index 4a7c35d6726a..078ed7f618d7 100644 --- a/arch/arm/boot/dts/sun4i-a10-mini-xplus.dts +++ b/arch/arm/boot/dts/sun4i-a10-mini-xplus.dts @@ -22,8 +22,8 @@ bootargs = "earlyprintk console=ttyS0,115200"; }; - soc { - uart0: uart@01c28000 { + soc@01c20000 { + uart0: serial@01c28000 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins_a>; status = "okay"; diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi index e7ef619a70a2..06ef8b625dba 100644 --- a/arch/arm/boot/dts/sun4i-a10.dtsi +++ b/arch/arm/boot/dts/sun4i-a10.dtsi @@ -16,8 +16,12 @@ interrupt-parent = <&intc>; cpus { + #address-cells = <1>; + #size-cells = <0>; cpu@0 { + device_type = "cpu"; compatible = "arm,cortex-a8"; + reg = <0x0>; }; }; diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi index 31fa38f8cc98..d2852547b572 100644 --- a/arch/arm/boot/dts/sun5i-a13.dtsi +++ b/arch/arm/boot/dts/sun5i-a13.dtsi @@ -17,8 +17,12 @@ interrupt-parent = <&intc>; cpus { + #address-cells = <1>; + #size-cells = <0>; cpu@0 { + device_type = "cpu"; compatible = "arm,cortex-a8"; + reg = <0x0>; }; }; diff --git a/arch/arm/boot/dts/tny_a9260.dts b/arch/arm/boot/dts/tny_a9260.dts index 367a16dcd5ef..dabe232216b4 100644 --- a/arch/arm/boot/dts/tny_a9260.dts +++ b/arch/arm/boot/dts/tny_a9260.dts @@ -6,8 +6,8 @@ * Licensed under GPLv2. */ /dts-v1/; -/include/ "at91sam9260.dtsi" -/include/ "tny_a9260_common.dtsi" +#include "at91sam9260.dtsi" +#include "tny_a9260_common.dtsi" / { model = "Calao TNY A9260"; diff --git a/arch/arm/boot/dts/tny_a9263.dts b/arch/arm/boot/dts/tny_a9263.dts index dee9c571306b..0751a6a979a8 100644 --- a/arch/arm/boot/dts/tny_a9263.dts +++ b/arch/arm/boot/dts/tny_a9263.dts @@ -6,7 +6,7 @@ * Licensed under GPLv2 only */ /dts-v1/; -/include/ "at91sam9263.dtsi" +#include "at91sam9263.dtsi" / { model = "Calao TNY A9263"; @@ -38,7 +38,7 @@ }; usb1: gadget@fff78000 { - atmel,vbus-gpio = <&pioB 11 0>; + atmel,vbus-gpio = <&pioB 11 GPIO_ACTIVE_HIGH>; status = "okay"; }; }; diff --git a/arch/arm/boot/dts/tny_a9g20.dts b/arch/arm/boot/dts/tny_a9g20.dts index e1ab64c72dba..8456d70bb42b 100644 --- a/arch/arm/boot/dts/tny_a9g20.dts +++ b/arch/arm/boot/dts/tny_a9g20.dts @@ -6,8 +6,8 @@ * Licensed under GPLv2. */ /dts-v1/; -/include/ "at91sam9g20.dtsi" -/include/ "tny_a9260_common.dtsi" +#include "at91sam9g20.dtsi" +#include "tny_a9260_common.dtsi" / { model = "Calao TNY A9G20"; diff --git a/arch/arm/boot/dts/usb_a9260.dts b/arch/arm/boot/dts/usb_a9260.dts index 296216058c11..de0c24f5210a 100644 --- a/arch/arm/boot/dts/usb_a9260.dts +++ b/arch/arm/boot/dts/usb_a9260.dts @@ -6,8 +6,8 @@ * Licensed under GPLv2 or later. */ /dts-v1/; -/include/ "at91sam9260.dtsi" -/include/ "usb_a9260_common.dtsi" +#include "at91sam9260.dtsi" +#include "usb_a9260_common.dtsi" / { model = "Calao USB A9260"; @@ -20,4 +20,13 @@ memory { reg = <0x20000000 0x4000000>; }; + + ahb { + apb { + shdwc@fffffd10 { + atmel,wakeup-counter = <10>; + atmel,wakeup-rtt-timer; + }; + }; + }; }; diff --git a/arch/arm/boot/dts/usb_a9260_common.dtsi b/arch/arm/boot/dts/usb_a9260_common.dtsi index e70d229baef5..285977682cf3 100644 --- a/arch/arm/boot/dts/usb_a9260_common.dtsi +++ b/arch/arm/boot/dts/usb_a9260_common.dtsi @@ -30,7 +30,7 @@ }; usb1: gadget@fffa4000 { - atmel,vbus-gpio = <&pioC 5 0>; + atmel,vbus-gpio = <&pioC 5 GPIO_ACTIVE_HIGH>; status = "okay"; }; }; @@ -93,7 +93,7 @@ user_led { label = "user_led"; - gpios = <&pioB 21 1>; + gpios = <&pioB 21 GPIO_ACTIVE_LOW>; linux,default-trigger = "heartbeat"; }; }; @@ -105,7 +105,7 @@ user_pb { label = "user_pb"; - gpios = <&pioB 10 1>; + gpios = <&pioB 10 GPIO_ACTIVE_LOW>; linux,code = <28>; gpio-key,wakeup; }; diff --git a/arch/arm/boot/dts/usb_a9263.dts b/arch/arm/boot/dts/usb_a9263.dts index 6fe05ccb6203..290e60383baf 100644 --- a/arch/arm/boot/dts/usb_a9263.dts +++ b/arch/arm/boot/dts/usb_a9263.dts @@ -6,7 +6,7 @@ * Licensed under GPLv2 only */ /dts-v1/; -/include/ "at91sam9263.dtsi" +#include "at91sam9263.dtsi" / { model = "Calao USB A9263"; @@ -43,10 +43,24 @@ }; usb1: gadget@fff78000 { - atmel,vbus-gpio = <&pioB 11 0>; + atmel,vbus-gpio = <&pioB 11 GPIO_ACTIVE_HIGH>; status = "okay"; }; + spi0: spi@fffa4000 { + cs-gpios = <&pioB 15 GPIO_ACTIVE_HIGH>; + status = "okay"; + mtd_dataflash@0 { + compatible = "atmel,at45", "atmel,dataflash"; + reg = <0>; + spi-max-frequency = <15000000>; + }; + }; + + shdwc@fffffd10 { + atmel,wakeup-counter = <10>; + atmel,wakeup-rtt-timer; + }; }; nand0: nand@40000000 { @@ -107,7 +121,7 @@ user_led { label = "user_led"; - gpios = <&pioB 21 0>; + gpios = <&pioB 21 GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; }; }; @@ -119,7 +133,7 @@ user_pb { label = "user_pb"; - gpios = <&pioB 10 1>; + gpios = <&pioB 10 GPIO_ACTIVE_LOW>; linux,code = <28>; gpio-key,wakeup; }; diff --git a/arch/arm/boot/dts/usb_a9g20-dab-mmx.dtsi b/arch/arm/boot/dts/usb_a9g20-dab-mmx.dtsi index ad3eca17c436..5b0ffc1a0b24 100644 --- a/arch/arm/boot/dts/usb_a9g20-dab-mmx.dtsi +++ b/arch/arm/boot/dts/usb_a9g20-dab-mmx.dtsi @@ -28,39 +28,39 @@ user_led1 { label = "user_led1"; - gpios = <&pioB 20 1>; + gpios = <&pioB 20 GPIO_ACTIVE_LOW>; }; /* * led already used by mother board but active as high * user_led2 { * label = "user_led2"; -* gpios = <&pioB 21 1>; +* gpios = <&pioB 21 GPIO_ACTIVE_LOW>; * }; */ user_led3 { label = "user_led3"; - gpios = <&pioB 22 1>; + gpios = <&pioB 22 GPIO_ACTIVE_LOW>; }; user_led4 { label = "user_led4"; - gpios = <&pioB 23 1>; + gpios = <&pioB 23 GPIO_ACTIVE_LOW>; }; red { label = "red"; - gpios = <&pioB 24 1>; + gpios = <&pioB 24 GPIO_ACTIVE_LOW>; }; orange { label = "orange"; - gpios = <&pioB 30 1>; + gpios = <&pioB 30 GPIO_ACTIVE_LOW>; }; green { label = "green"; - gpios = <&pioB 31 1>; + gpios = <&pioB 31 GPIO_ACTIVE_LOW>; }; }; @@ -71,25 +71,25 @@ user_pb1 { label = "user_pb1"; - gpios = <&pioB 25 1>; + gpios = <&pioB 25 GPIO_ACTIVE_LOW>; linux,code = <0x100>; }; user_pb2 { label = "user_pb2"; - gpios = <&pioB 13 1>; + gpios = <&pioB 13 GPIO_ACTIVE_LOW>; linux,code = <0x101>; }; user_pb3 { label = "user_pb3"; - gpios = <&pioA 26 1>; + gpios = <&pioA 26 GPIO_ACTIVE_LOW>; linux,code = <0x102>; }; user_pb4 { label = "user_pb4"; - gpios = <&pioC 9 1>; + gpios = <&pioC 9 GPIO_ACTIVE_LOW>; linux,code = <0x103>; }; }; diff --git a/arch/arm/boot/dts/usb_a9g20.dts b/arch/arm/boot/dts/usb_a9g20.dts index 2dacb16ce4ae..ec77cf8f9695 100644 --- a/arch/arm/boot/dts/usb_a9g20.dts +++ b/arch/arm/boot/dts/usb_a9g20.dts @@ -6,25 +6,9 @@ * Licensed under GPLv2 or later. */ /dts-v1/; -/include/ "at91sam9g20.dtsi" -/include/ "usb_a9260_common.dtsi" +#include "usb_a9g20_common.dtsi" / { model = "Calao USB A9G20"; compatible = "calao,usb-a9g20", "atmel,at91sam9g20", "atmel,at91sam9"; - - chosen { - bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock5 rw rootfstype=ubifs"; - }; - - memory { - reg = <0x20000000 0x4000000>; - }; - - i2c@0 { - rv3029c2@56 { - compatible = "rv3029c2"; - reg = <0x56>; - }; - }; }; diff --git a/arch/arm/boot/dts/usb_a9g20_common.dtsi b/arch/arm/boot/dts/usb_a9g20_common.dtsi new file mode 100644 index 000000000000..0b3b36182fe5 --- /dev/null +++ b/arch/arm/boot/dts/usb_a9g20_common.dtsi @@ -0,0 +1,27 @@ +/* + * usb_a9g20.dts - Device Tree file for Caloa USB A9G20 board + * + * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> + * + * Licensed under GPLv2 or later. + */ + +#include "at91sam9g20.dtsi" +#include "usb_a9260_common.dtsi" + +/ { + chosen { + bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock5 rw rootfstype=ubifs"; + }; + + memory { + reg = <0x20000000 0x4000000>; + }; + + i2c@0 { + rv3029c2@56 { + compatible = "rv3029c2"; + reg = <0x56>; + }; + }; +}; diff --git a/arch/arm/boot/dts/usb_a9g20_lpw.dts b/arch/arm/boot/dts/usb_a9g20_lpw.dts new file mode 100644 index 000000000000..f8cb1b9a01c5 --- /dev/null +++ b/arch/arm/boot/dts/usb_a9g20_lpw.dts @@ -0,0 +1,31 @@ +/* + * usb_a9g20_lpw.dts - Device Tree file for Caloa USB A9G20 Low Power board + * + * Copyright (C) 2013 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> + * + * Licensed under GPLv2 or later. + */ +/dts-v1/; +#include "usb_a9g20_common.dtsi" + +/ { + model = "Calao USB A9G20 Low Power"; + compatible = "calao,usb-a9g20-lpw", "calao,usb-a9g20", "atmel,at91sam9g20", "atmel,at91sam9"; + + ahb { + apb { + spi1: spi@fffcc000 { + cs-gpios = <&pioB 3 GPIO_ACTIVE_HIGH>; + status = "okay"; + mmc-slot@0 { + compatible = "mmc-spi-slot"; + reg = <0>; + voltage-ranges = <3200 3400>; + spi-max-frequency = <25000000>; + interrupt-parent = <&pioC>; + interrupts = <4 IRQ_TYPE_EDGE_BOTH>; + }; + }; + }; + }; +}; diff --git a/arch/arm/boot/dts/vt8500-bv07.dts b/arch/arm/boot/dts/vt8500-bv07.dts index 877b33afa7ed..87f33310e2bc 100644 --- a/arch/arm/boot/dts/vt8500-bv07.dts +++ b/arch/arm/boot/dts/vt8500-bv07.dts @@ -30,3 +30,7 @@ }; }; }; + +&uart0 { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/vt8500.dtsi b/arch/arm/boot/dts/vt8500.dtsi index 4a4b96f6827e..51d0e912c8f5 100644 --- a/arch/arm/boot/dts/vt8500.dtsi +++ b/arch/arm/boot/dts/vt8500.dtsi @@ -11,6 +11,23 @@ / { compatible = "via,vt8500"; + cpus { + #address-cells = <0>; + #size-cells = <0>; + + cpu { + device_type = "cpu"; + compatible = "arm,arm926ej-s"; + }; + }; + + aliases { + serial0 = &uart0; + serial1 = &uart1; + serial2 = &uart2; + serial3 = &uart3; + }; + soc { #address-cells = <1>; #size-cells = <1>; @@ -111,32 +128,36 @@ reg = <0xd8050400 0x100>; }; - uart@d8200000 { + uart0: serial@d8200000 { compatible = "via,vt8500-uart"; reg = <0xd8200000 0x1040>; interrupts = <32>; clocks = <&clkuart0>; + status = "disabled"; }; - uart@d82b0000 { + uart1: serial@d82b0000 { compatible = "via,vt8500-uart"; reg = <0xd82b0000 0x1040>; interrupts = <33>; clocks = <&clkuart1>; + status = "disabled"; }; - uart@d8210000 { + uart2: serial@d8210000 { compatible = "via,vt8500-uart"; reg = <0xd8210000 0x1040>; interrupts = <47>; clocks = <&clkuart2>; + status = "disabled"; }; - uart@d82c0000 { + uart3: serial@d82c0000 { compatible = "via,vt8500-uart"; reg = <0xd82c0000 0x1040>; interrupts = <50>; clocks = <&clkuart3>; + status = "disabled"; }; rtc@d8100000 { diff --git a/arch/arm/boot/dts/wm8505-ref.dts b/arch/arm/boot/dts/wm8505-ref.dts index edd2cec3d37f..e3e6b9eb09d0 100644 --- a/arch/arm/boot/dts/wm8505-ref.dts +++ b/arch/arm/boot/dts/wm8505-ref.dts @@ -30,3 +30,7 @@ }; }; }; + +&uart0 { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/wm8505.dtsi b/arch/arm/boot/dts/wm8505.dtsi index b2bf359e852f..a1a854b8a454 100644 --- a/arch/arm/boot/dts/wm8505.dtsi +++ b/arch/arm/boot/dts/wm8505.dtsi @@ -12,11 +12,24 @@ compatible = "wm,wm8505"; cpus { - cpu@0 { - compatible = "arm,arm926ejs"; + #address-cells = <0>; + #size-cells = <0>; + + cpu { + device_type = "cpu"; + compatible = "arm,arm926ej-s"; }; }; + aliases { + serial0 = &uart0; + serial1 = &uart1; + serial2 = &uart2; + serial3 = &uart3; + serial4 = &uart4; + serial5 = &uart5; + }; + soc { #address-cells = <1>; #size-cells = <1>; @@ -68,6 +81,13 @@ clock-frequency = <25000000>; }; + plla: plla { + #clock-cells = <0>; + compatible = "via,vt8500-pll-clock"; + clocks = <&ref25>; + reg = <0x200>; + }; + pllb: pllb { #clock-cells = <0>; compatible = "via,vt8500-pll-clock"; @@ -75,6 +95,48 @@ reg = <0x204>; }; + pllc: pllc { + #clock-cells = <0>; + compatible = "via,vt8500-pll-clock"; + clocks = <&ref25>; + reg = <0x208>; + }; + + plld: plld { + #clock-cells = <0>; + compatible = "via,vt8500-pll-clock"; + clocks = <&ref25>; + reg = <0x20c>; + }; + + clkarm: arm { + #clock-cells = <0>; + compatible = "via,vt8500-device-clock"; + clocks = <&plla>; + divisor-reg = <0x300>; + }; + + clkahb: ahb { + #clock-cells = <0>; + compatible = "via,vt8500-device-clock"; + clocks = <&pllb>; + divisor-reg = <0x304>; + }; + + clkapb: apb { + #clock-cells = <0>; + compatible = "via,vt8500-device-clock"; + clocks = <&pllb>; + divisor-reg = <0x350>; + }; + + clkddr: ddr { + #clock-cells = <0>; + compatible = "via,vt8500-device-clock"; + clocks = <&plld>; + divisor-reg = <0x310>; + }; + clkuart0: uart0 { #clock-cells = <0>; compatible = "via,vt8500-device-clock"; @@ -163,46 +225,52 @@ reg = <0xd8050400 0x100>; }; - uart@d8200000 { + uart0: serial@d8200000 { compatible = "via,vt8500-uart"; reg = <0xd8200000 0x1040>; interrupts = <32>; clocks = <&clkuart0>; + status = "disabled"; }; - uart@d82b0000 { + uart1: serial@d82b0000 { compatible = "via,vt8500-uart"; reg = <0xd82b0000 0x1040>; interrupts = <33>; clocks = <&clkuart1>; + status = "disabled"; }; - uart@d8210000 { + uart2: serial@d8210000 { compatible = "via,vt8500-uart"; reg = <0xd8210000 0x1040>; interrupts = <47>; clocks = <&clkuart2>; + status = "disabled"; }; - uart@d82c0000 { + uart3: serial@d82c0000 { compatible = "via,vt8500-uart"; reg = <0xd82c0000 0x1040>; interrupts = <50>; clocks = <&clkuart3>; + status = "disabled"; }; - uart@d8370000 { + uart4: serial@d8370000 { compatible = "via,vt8500-uart"; reg = <0xd8370000 0x1040>; interrupts = <31>; clocks = <&clkuart4>; + status = "disabled"; }; - uart@d8380000 { + uart5: serial@d8380000 { compatible = "via,vt8500-uart"; reg = <0xd8380000 0x1040>; interrupts = <30>; clocks = <&clkuart5>; + status = "disabled"; }; rtc@d8100000 { diff --git a/arch/arm/boot/dts/wm8650-mid.dts b/arch/arm/boot/dts/wm8650-mid.dts index 61671a0d9ede..dd0d1b602388 100644 --- a/arch/arm/boot/dts/wm8650-mid.dts +++ b/arch/arm/boot/dts/wm8650-mid.dts @@ -32,3 +32,6 @@ }; }; +&uart0 { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/wm8650.dtsi b/arch/arm/boot/dts/wm8650.dtsi index dd8464eeb40d..7525982262ac 100644 --- a/arch/arm/boot/dts/wm8650.dtsi +++ b/arch/arm/boot/dts/wm8650.dtsi @@ -11,6 +11,21 @@ / { compatible = "wm,wm8650"; + cpus { + #address-cells = <0>; + #size-cells = <0>; + + cpu { + device_type = "cpu"; + compatible = "arm,arm926ej-s"; + }; + }; + + aliases { + serial0 = &uart0; + serial1 = &uart1; + }; + soc { #address-cells = <1>; #size-cells = <1>; @@ -77,6 +92,55 @@ reg = <0x204>; }; + pllc: pllc { + #clock-cells = <0>; + compatible = "wm,wm8650-pll-clock"; + clocks = <&ref25>; + reg = <0x208>; + }; + + plld: plld { + #clock-cells = <0>; + compatible = "wm,wm8650-pll-clock"; + clocks = <&ref25>; + reg = <0x20c>; + }; + + plle: plle { + #clock-cells = <0>; + compatible = "wm,wm8650-pll-clock"; + clocks = <&ref25>; + reg = <0x210>; + }; + + clkarm: arm { + #clock-cells = <0>; + compatible = "via,vt8500-device-clock"; + clocks = <&plla>; + divisor-reg = <0x300>; + }; + + clkahb: ahb { + #clock-cells = <0>; + compatible = "via,vt8500-device-clock"; + clocks = <&pllb>; + divisor-reg = <0x304>; + }; + + clkapb: apb { + #clock-cells = <0>; + compatible = "via,vt8500-device-clock"; + clocks = <&pllb>; + divisor-reg = <0x320>; + }; + + clkddr: ddr { + #clock-cells = <0>; + compatible = "via,vt8500-device-clock"; + clocks = <&plld>; + divisor-reg = <0x310>; + }; + clkuart0: uart0 { #clock-cells = <0>; compatible = "via,vt8500-device-clock"; @@ -93,14 +157,7 @@ enable-bit = <2>; }; - arm: arm { - #clock-cells = <0>; - compatible = "via,vt8500-device-clock"; - clocks = <&plla>; - divisor-reg = <0x300>; - }; - - sdhc: sdhc { + clksdhc: sdhc { #clock-cells = <0>; compatible = "via,vt8500-device-clock"; clocks = <&pllb>; @@ -140,18 +197,20 @@ reg = <0xd8050400 0x100>; }; - uart@d8200000 { + uart0: serial@d8200000 { compatible = "via,vt8500-uart"; reg = <0xd8200000 0x1040>; interrupts = <32>; clocks = <&clkuart0>; + status = "disabled"; }; - uart@d82b0000 { + uart1: serial@d82b0000 { compatible = "via,vt8500-uart"; reg = <0xd82b0000 0x1040>; interrupts = <33>; clocks = <&clkuart1>; + status = "disabled"; }; rtc@d8100000 { diff --git a/arch/arm/boot/dts/wm8750-apc8750.dts b/arch/arm/boot/dts/wm8750-apc8750.dts new file mode 100644 index 000000000000..37e4a408bf39 --- /dev/null +++ b/arch/arm/boot/dts/wm8750-apc8750.dts @@ -0,0 +1,30 @@ +/* + * wm8750-apc8750.dts + * - Device tree file for VIA APC8750 + * + * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz> + * + * Licensed under GPLv2 or later + */ + +/dts-v1/; +/include/ "wm8750.dtsi" + +/ { + model = "VIA APC8750"; +}; + +&pinctrl { + pinctrl-names = "default"; + pinctrl-0 = <&i2c>; + + i2c: i2c { + wm,pins = <168 169 170 171>; + wm,function = <2>; /* alt */ + wm,pull = <2>; /* pull-up */ + }; +}; + +&uart0 { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/wm8750.dtsi b/arch/arm/boot/dts/wm8750.dtsi new file mode 100644 index 000000000000..557a9c2ace49 --- /dev/null +++ b/arch/arm/boot/dts/wm8750.dtsi @@ -0,0 +1,347 @@ +/* + * wm8750.dtsi - Device tree file for Wondermedia WM8750 SoC + * + * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz> + * + * Licensed under GPLv2 or later + */ + +/include/ "skeleton.dtsi" + +/ { + compatible = "wm,wm8750"; + + cpus { + #address-cells = <0>; + #size-cells = <0>; + + cpu { + device_type = "cpu"; + compatible = "arm,arm1176ej-s"; + }; + }; + + aliases { + serial0 = &uart0; + serial1 = &uart1; + serial2 = &uart2; + serial3 = &uart3; + serial4 = &uart4; + serial5 = &uart5; + i2c0 = &i2c_0; + i2c1 = &i2c_1; + }; + + soc { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges; + interrupt-parent = <&intc0>; + + intc0: interrupt-controller@d8140000 { + compatible = "via,vt8500-intc"; + interrupt-controller; + reg = <0xd8140000 0x10000>; + #interrupt-cells = <1>; + }; + + /* Secondary IC cascaded to intc0 */ + intc1: interrupt-controller@d8150000 { + compatible = "via,vt8500-intc"; + interrupt-controller; + #interrupt-cells = <1>; + reg = <0xD8150000 0x10000>; + interrupts = <56 57 58 59 60 61 62 63>; + }; + + pinctrl: pinctrl@d8110000 { + compatible = "wm,wm8750-pinctrl"; + reg = <0xd8110000 0x10000>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-controller; + #gpio-cells = <2>; + }; + + pmc@d8130000 { + compatible = "via,vt8500-pmc"; + reg = <0xd8130000 0x1000>; + + clocks { + #address-cells = <1>; + #size-cells = <0>; + + ref24: ref24M { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <24000000>; + }; + + ref25: ref25M { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <25000000>; + }; + + plla: plla { + #clock-cells = <0>; + compatible = "wm,wm8750-pll-clock"; + clocks = <&ref25>; + reg = <0x200>; + }; + + pllb: pllb { + #clock-cells = <0>; + compatible = "wm,wm8750-pll-clock"; + clocks = <&ref25>; + reg = <0x204>; + }; + + pllc: pllc { + #clock-cells = <0>; + compatible = "wm,wm8750-pll-clock"; + clocks = <&ref25>; + reg = <0x208>; + }; + + plld: plld { + #clock-cells = <0>; + compatible = "wm,wm8750-pll-clock"; + clocks = <&ref25>; + reg = <0x20C>; + }; + + plle: plle { + #clock-cells = <0>; + compatible = "wm,wm8750-pll-clock"; + clocks = <&ref25>; + reg = <0x210>; + }; + + clkarm: arm { + #clock-cells = <0>; + compatible = "via,vt8500-device-clock"; + clocks = <&plla>; + divisor-reg = <0x300>; + }; + + clkahb: ahb { + #clock-cells = <0>; + compatible = "via,vt8500-device-clock"; + clocks = <&pllb>; + divisor-reg = <0x304>; + }; + + clkapb: apb { + #clock-cells = <0>; + compatible = "via,vt8500-device-clock"; + clocks = <&pllb>; + divisor-reg = <0x320>; + }; + + clkddr: ddr { + #clock-cells = <0>; + compatible = "via,vt8500-device-clock"; + clocks = <&plld>; + divisor-reg = <0x310>; + }; + + clkuart0: uart0 { + #clock-cells = <0>; + compatible = "via,vt8500-device-clock"; + clocks = <&ref24>; + enable-reg = <0x254>; + enable-bit = <24>; + }; + + clkuart1: uart1 { + #clock-cells = <0>; + compatible = "via,vt8500-device-clock"; + clocks = <&ref24>; + enable-reg = <0x254>; + enable-bit = <25>; + }; + + clkuart2: uart2 { + #clock-cells = <0>; + compatible = "via,vt8500-device-clock"; + clocks = <&ref24>; + enable-reg = <0x254>; + enable-bit = <26>; + }; + + clkuart3: uart3 { + #clock-cells = <0>; + compatible = "via,vt8500-device-clock"; + clocks = <&ref24>; + enable-reg = <0x254>; + enable-bit = <27>; + }; + + clkuart4: uart4 { + #clock-cells = <0>; + compatible = "via,vt8500-device-clock"; + clocks = <&ref24>; + enable-reg = <0x254>; + enable-bit = <28>; + }; + + clkuart5: uart5 { + #clock-cells = <0>; + compatible = "via,vt8500-device-clock"; + clocks = <&ref24>; + enable-reg = <0x254>; + enable-bit = <29>; + }; + + clkpwm: pwm { + #clock-cells = <0>; + compatible = "via,vt8500-device-clock"; + clocks = <&pllb>; + divisor-reg = <0x350>; + enable-reg = <0x250>; + enable-bit = <17>; + }; + + clksdhc: sdhc { + #clock-cells = <0>; + compatible = "via,vt8500-device-clock"; + clocks = <&pllb>; + divisor-reg = <0x330>; + divisor-mask = <0x3f>; + enable-reg = <0x250>; + enable-bit = <0>; + }; + + clki2c0: i2c0clk { + #clock-cells = <0>; + compatible = "via,vt8500-device-clock"; + clocks = <&pllb>; + divisor-reg = <0x3A0>; + enable-reg = <0x250>; + enable-bit = <8>; + }; + + clki2c1: i2c1clk { + #clock-cells = <0>; + compatible = "via,vt8500-device-clock"; + clocks = <&pllb>; + divisor-reg = <0x3A4>; + enable-reg = <0x250>; + enable-bit = <9>; + }; + }; + }; + + pwm: pwm@d8220000 { + #pwm-cells = <3>; + compatible = "via,vt8500-pwm"; + reg = <0xd8220000 0x100>; + clocks = <&clkpwm>; + }; + + timer@d8130100 { + compatible = "via,vt8500-timer"; + reg = <0xd8130100 0x28>; + interrupts = <36>; + }; + + ehci@d8007900 { + compatible = "via,vt8500-ehci"; + reg = <0xd8007900 0x200>; + interrupts = <26>; + }; + + uhci@d8007b00 { + compatible = "platform-uhci"; + reg = <0xd8007b00 0x200>; + interrupts = <26>; + }; + + uhci@d8008d00 { + compatible = "platform-uhci"; + reg = <0xd8008d00 0x200>; + interrupts = <26>; + }; + + uart0: serial@d8200000 { + compatible = "via,vt8500-uart"; + reg = <0xd8200000 0x1040>; + interrupts = <32>; + clocks = <&clkuart0>; + status = "disabled"; + }; + + uart1: serial@d82b0000 { + compatible = "via,vt8500-uart"; + reg = <0xd82b0000 0x1040>; + interrupts = <33>; + clocks = <&clkuart1>; + status = "disabled"; + }; + + uart2: serial@d8210000 { + compatible = "via,vt8500-uart"; + reg = <0xd8210000 0x1040>; + interrupts = <47>; + clocks = <&clkuart2>; + status = "disabled"; + }; + + uart3: serial@d82c0000 { + compatible = "via,vt8500-uart"; + reg = <0xd82c0000 0x1040>; + interrupts = <50>; + clocks = <&clkuart3>; + status = "disabled"; + }; + + uart4: serial@d8370000 { + compatible = "via,vt8500-uart"; + reg = <0xd8370000 0x1040>; + interrupts = <30>; + clocks = <&clkuart4>; + status = "disabled"; + }; + + uart5: serial@d8380000 { + compatible = "via,vt8500-uart"; + reg = <0xd8380000 0x1040>; + interrupts = <43>; + clocks = <&clkuart5>; + status = "disabled"; + }; + + rtc@d8100000 { + compatible = "via,vt8500-rtc"; + reg = <0xd8100000 0x10000>; + interrupts = <48>; + }; + + sdhc@d800a000 { + compatible = "wm,wm8505-sdhc"; + reg = <0xd800a000 0x1000>; + interrupts = <20 21>; + clocks = <&clksdhc>; + bus-width = <4>; + sdon-inverted; + }; + + i2c_0: i2c@d8280000 { + compatible = "wm,wm8505-i2c"; + reg = <0xd8280000 0x1000>; + interrupts = <19>; + clocks = <&clki2c0>; + clock-frequency = <400000>; + }; + + i2c_1: i2c@d8320000 { + compatible = "wm,wm8505-i2c"; + reg = <0xd8320000 0x1000>; + interrupts = <18>; + clocks = <&clki2c1>; + clock-frequency = <400000>; + }; + }; +}; diff --git a/arch/arm/boot/dts/wm8850-w70v2.dts b/arch/arm/boot/dts/wm8850-w70v2.dts index 32d22532cd6c..90e913fb64be 100644 --- a/arch/arm/boot/dts/wm8850-w70v2.dts +++ b/arch/arm/boot/dts/wm8850-w70v2.dts @@ -41,3 +41,7 @@ }; }; }; + +&uart0 { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/wm8850.dtsi b/arch/arm/boot/dts/wm8850.dtsi index fc790d0aee66..d98386dd2882 100644 --- a/arch/arm/boot/dts/wm8850.dtsi +++ b/arch/arm/boot/dts/wm8850.dtsi @@ -11,6 +11,17 @@ / { compatible = "wm,wm8850"; + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <0x0>; + }; + }; + aliases { serial0 = &uart0; serial1 = &uart1; @@ -72,18 +83,81 @@ plla: plla { #clock-cells = <0>; - compatible = "wm,wm8750-pll-clock"; - clocks = <&ref25>; + compatible = "wm,wm8850-pll-clock"; + clocks = <&ref24>; reg = <0x200>; }; pllb: pllb { #clock-cells = <0>; - compatible = "wm,wm8750-pll-clock"; - clocks = <&ref25>; + compatible = "wm,wm8850-pll-clock"; + clocks = <&ref24>; reg = <0x204>; }; + pllc: pllc { + #clock-cells = <0>; + compatible = "wm,wm8850-pll-clock"; + clocks = <&ref24>; + reg = <0x208>; + }; + + plld: plld { + #clock-cells = <0>; + compatible = "wm,wm8850-pll-clock"; + clocks = <&ref24>; + reg = <0x20c>; + }; + + plle: plle { + #clock-cells = <0>; + compatible = "wm,wm8850-pll-clock"; + clocks = <&ref24>; + reg = <0x210>; + }; + + pllf: pllf { + #clock-cells = <0>; + compatible = "wm,wm8850-pll-clock"; + clocks = <&ref24>; + reg = <0x214>; + }; + + pllg: pllg { + #clock-cells = <0>; + compatible = "wm,wm8850-pll-clock"; + clocks = <&ref24>; + reg = <0x218>; + }; + + clkarm: arm { + #clock-cells = <0>; + compatible = "via,vt8500-device-clock"; + clocks = <&plla>; + divisor-reg = <0x300>; + }; + + clkahb: ahb { + #clock-cells = <0>; + compatible = "via,vt8500-device-clock"; + clocks = <&pllb>; + divisor-reg = <0x304>; + }; + + clkapb: apb { + #clock-cells = <0>; + compatible = "via,vt8500-device-clock"; + clocks = <&pllb>; + divisor-reg = <0x320>; + }; + + clkddr: ddr { + #clock-cells = <0>; + compatible = "via,vt8500-device-clock"; + clocks = <&plld>; + divisor-reg = <0x310>; + }; + clkuart0: uart0 { #clock-cells = <0>; compatible = "via,vt8500-device-clock"; @@ -178,32 +252,36 @@ interrupts = <26>; }; - uart0: uart@d8200000 { + uart0: serial@d8200000 { compatible = "via,vt8500-uart"; reg = <0xd8200000 0x1040>; interrupts = <32>; clocks = <&clkuart0>; + status = "disabled"; }; - uart1: uart@d82b0000 { + uart1: serial@d82b0000 { compatible = "via,vt8500-uart"; reg = <0xd82b0000 0x1040>; interrupts = <33>; clocks = <&clkuart1>; + status = "disabled"; }; - uart2: uart@d8210000 { + uart2: serial@d8210000 { compatible = "via,vt8500-uart"; reg = <0xd8210000 0x1040>; interrupts = <47>; clocks = <&clkuart2>; + status = "disabled"; }; - uart3: uart@d82c0000 { + uart3: serial@d82c0000 { compatible = "via,vt8500-uart"; reg = <0xd82c0000 0x1040>; interrupts = <50>; clocks = <&clkuart3>; + status = "disabled"; }; rtc@d8100000 { |