diff options
Diffstat (limited to 'arch/arm/boot/dts')
-rw-r--r-- | arch/arm/boot/dts/exynos5422-odroidhc1.dts | 64 | ||||
-rw-r--r-- | arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi | 78 | ||||
-rw-r--r-- | arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts | 58 | ||||
-rw-r--r-- | arch/arm/boot/dts/exynos5800-peach-pi.dts | 9 | ||||
-rw-r--r-- | arch/arm/boot/dts/exynos5800.dtsi | 20 |
5 files changed, 158 insertions, 71 deletions
diff --git a/arch/arm/boot/dts/exynos5422-odroidhc1.dts b/arch/arm/boot/dts/exynos5422-odroidhc1.dts index d271e7548826..f163206265bb 100644 --- a/arch/arm/boot/dts/exynos5422-odroidhc1.dts +++ b/arch/arm/boot/dts/exynos5422-odroidhc1.dts @@ -72,14 +72,14 @@ */ map1 { trip = <&cpu0_alert1>; - cooling-device = <&cpu0 3 7>, - <&cpu1 3 7>, - <&cpu2 3 7>, - <&cpu3 3 7>, - <&cpu4 3 12>, - <&cpu5 3 12>, - <&cpu6 3 12>, - <&cpu7 3 12>; + cooling-device = <&cpu0 3 8>, + <&cpu1 3 8>, + <&cpu2 3 8>, + <&cpu3 3 8>, + <&cpu4 3 14>, + <&cpu5 3 14>, + <&cpu6 3 14>, + <&cpu7 3 14>; }; }; }; @@ -116,14 +116,14 @@ }; map1 { trip = <&cpu1_alert1>; - cooling-device = <&cpu0 3 7>, - <&cpu1 3 7>, - <&cpu2 3 7>, - <&cpu3 3 7>, - <&cpu4 3 12>, - <&cpu5 3 12>, - <&cpu6 3 12>, - <&cpu7 3 12>; + cooling-device = <&cpu0 3 8>, + <&cpu1 3 8>, + <&cpu2 3 8>, + <&cpu3 3 8>, + <&cpu4 3 14>, + <&cpu5 3 14>, + <&cpu6 3 14>, + <&cpu7 3 14>; }; }; }; @@ -160,14 +160,14 @@ }; map1 { trip = <&cpu2_alert1>; - cooling-device = <&cpu0 3 7>, - <&cpu1 3 7>, - <&cpu2 3 7>, - <&cpu3 3 7>, - <&cpu4 3 12>, - <&cpu5 3 12>, - <&cpu6 3 12>, - <&cpu7 3 12>; + cooling-device = <&cpu0 3 8>, + <&cpu1 3 8>, + <&cpu2 3 8>, + <&cpu3 3 8>, + <&cpu4 3 14>, + <&cpu5 3 14>, + <&cpu6 3 14>, + <&cpu7 3 14>; }; }; }; @@ -204,14 +204,14 @@ }; map1 { trip = <&cpu3_alert1>; - cooling-device = <&cpu0 3 7>, - <&cpu1 3 7>, - <&cpu2 3 7>, - <&cpu3 3 7>, - <&cpu4 3 12>, - <&cpu5 3 12>, - <&cpu6 3 12>, - <&cpu7 3 12>; + cooling-device = <&cpu0 3 8>, + <&cpu1 3 8>, + <&cpu2 3 8>, + <&cpu3 3 8>, + <&cpu4 3 14>, + <&cpu5 3 14>, + <&cpu6 3 14>, + <&cpu7 3 14>; }; }; }; diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi index 838872037493..1865a708b49f 100644 --- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi @@ -107,7 +107,7 @@ /* * When reaching cpu0_alert3, reduce CPU * by 2 steps. On Exynos5422/5800 that would - * be: 1600 MHz and 1100 MHz. + * (usually) be: 1800 MHz and 1200 MHz. */ map3 { trip = <&cpu0_alert3>; @@ -122,19 +122,19 @@ }; /* * When reaching cpu0_alert4, reduce CPU - * further, down to 600 MHz (12 steps for big, - * 7 steps for LITTLE). + * further, down to 600 MHz (14 steps for big, + * 8 steps for LITTLE). */ - map4 { + cpu0_cooling_map4: map4 { trip = <&cpu0_alert4>; - cooling-device = <&cpu0 3 7>, - <&cpu1 3 7>, - <&cpu2 3 7>, - <&cpu3 3 7>, - <&cpu4 3 12>, - <&cpu5 3 12>, - <&cpu6 3 12>, - <&cpu7 3 12>; + cooling-device = <&cpu0 3 8>, + <&cpu1 3 8>, + <&cpu2 3 8>, + <&cpu3 3 8>, + <&cpu4 3 14>, + <&cpu5 3 14>, + <&cpu6 3 14>, + <&cpu7 3 14>; }; }; }; @@ -198,16 +198,16 @@ <&cpu6 0 2>, <&cpu7 0 2>; }; - map4 { + cpu1_cooling_map4: map4 { trip = <&cpu1_alert4>; - cooling-device = <&cpu0 3 7>, - <&cpu1 3 7>, - <&cpu2 3 7>, - <&cpu3 3 7>, - <&cpu4 3 12>, - <&cpu5 3 12>, - <&cpu6 3 12>, - <&cpu7 3 12>; + cooling-device = <&cpu0 3 8>, + <&cpu1 3 8>, + <&cpu2 3 8>, + <&cpu3 3 8>, + <&cpu4 3 14>, + <&cpu5 3 14>, + <&cpu6 3 14>, + <&cpu7 3 14>; }; }; }; @@ -271,16 +271,16 @@ <&cpu6 0 2>, <&cpu7 0 2>; }; - map4 { + cpu2_cooling_map4: map4 { trip = <&cpu2_alert4>; - cooling-device = <&cpu0 3 7>, - <&cpu1 3 7>, - <&cpu2 3 7>, - <&cpu3 3 7>, - <&cpu4 3 12>, - <&cpu5 3 12>, - <&cpu6 3 12>, - <&cpu7 3 12>; + cooling-device = <&cpu0 3 8>, + <&cpu1 3 8>, + <&cpu2 3 8>, + <&cpu3 3 8>, + <&cpu4 3 14>, + <&cpu5 3 14>, + <&cpu6 3 14>, + <&cpu7 3 14>; }; }; }; @@ -344,16 +344,16 @@ <&cpu6 0 2>, <&cpu7 0 2>; }; - map4 { + cpu3_cooling_map4: map4 { trip = <&cpu3_alert4>; - cooling-device = <&cpu0 3 7>, - <&cpu1 3 7>, - <&cpu2 3 7>, - <&cpu3 3 7>, - <&cpu4 3 12>, - <&cpu5 3 12>, - <&cpu6 3 12>, - <&cpu7 3 12>; + cooling-device = <&cpu0 3 8>, + <&cpu1 3 8>, + <&cpu2 3 8>, + <&cpu3 3 8>, + <&cpu4 3 14>, + <&cpu5 3 14>, + <&cpu6 3 14>, + <&cpu7 3 14>; }; }; }; diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts index a31ca2ef750f..98feecad5489 100644 --- a/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts @@ -30,6 +30,64 @@ samsung,asv-bin = <2>; }; +/* + * Odroid XU3-Lite board uses SoC revision with lower maximum frequencies + * than Odroid XU3/XU4 boards: 1.8 GHz for A15 cores & 1.3 GHz for A7 cores. + * Therefore we need to update OPPs tables and thermal maps accordingly. + */ +&cluster_a15_opp_table { + /delete-node/opp-2000000000; + /delete-node/opp-1900000000; +}; + +&cluster_a7_opp_table { + /delete-node/opp-1400000000; +}; + +&cpu0_cooling_map4 { + cooling-device = <&cpu0 3 7>, + <&cpu1 3 7>, + <&cpu2 3 7>, + <&cpu3 3 7>, + <&cpu4 3 12>, + <&cpu5 3 12>, + <&cpu6 3 12>, + <&cpu7 3 12>; +}; + +&cpu1_cooling_map4 { + cooling-device = <&cpu0 3 7>, + <&cpu1 3 7>, + <&cpu2 3 7>, + <&cpu3 3 7>, + <&cpu4 3 12>, + <&cpu5 3 12>, + <&cpu6 3 12>, + <&cpu7 3 12>; +}; + +&cpu2_cooling_map4 { + cooling-device = <&cpu0 3 7>, + <&cpu1 3 7>, + <&cpu2 3 7>, + <&cpu3 3 7>, + <&cpu4 3 12>, + <&cpu5 3 12>, + <&cpu6 3 12>, + <&cpu7 3 12>; +}; + +&cpu3_cooling_map4 { + cooling-device = <&cpu0 3 7>, + <&cpu1 3 7>, + <&cpu2 3 7>, + <&cpu3 3 7>, + <&cpu4 3 12>, + <&cpu5 3 12>, + <&cpu6 3 12>, + <&cpu7 3 12>; +}; + &pwm { /* * PWM 0 -- fan diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts b/arch/arm/boot/dts/exynos5800-peach-pi.dts index c1e38139ce4f..60ab0effe474 100644 --- a/arch/arm/boot/dts/exynos5800-peach-pi.dts +++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts @@ -156,6 +156,15 @@ assigned-clock-parents = <&clock CLK_MAU_EPLL>; }; +/* + * Peach Pi board uses SoC revision with lower maximum frequency for A7 cores + * (1.3 GHz instead of 1.4 GHz) than Odroid XU3/XU4 boards. Thus we need to + * update A7 OPPs table accordingly. + */ +&cluster_a7_opp_table { + /delete-node/opp-1400000000; +}; + &cpu0 { cpu-supply = <&buck2_reg>; }; diff --git a/arch/arm/boot/dts/exynos5800.dtsi b/arch/arm/boot/dts/exynos5800.dtsi index 1be7eb60439a..b4fd53496450 100644 --- a/arch/arm/boot/dts/exynos5800.dtsi +++ b/arch/arm/boot/dts/exynos5800.dtsi @@ -21,6 +21,21 @@ }; &cluster_a15_opp_table { + opp-2000000000 { + opp-hz = /bits/ 64 <2000000000>; + opp-microvolt = <1312500>; + clock-latency-ns = <140000>; + }; + opp-1900000000 { + opp-hz = /bits/ 64 <1900000000>; + opp-microvolt = <1262500>; + clock-latency-ns = <140000>; + }; + opp-1800000000 { + opp-hz = /bits/ 64 <1800000000>; + opp-microvolt = <1237500>; + clock-latency-ns = <140000>; + }; opp-1700000000 { opp-microvolt = <1250000 1250000 1500000>; }; @@ -82,6 +97,11 @@ }; &cluster_a7_opp_table { + opp-1400000000 { + opp-hz = /bits/ 64 <1400000000>; + opp-microvolt = <1275000>; + clock-latency-ns = <140000>; + }; opp-1300000000 { opp-microvolt = <1250000>; }; |