summaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/omap3-overo-base.dtsi
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/boot/dts/omap3-overo-base.dtsi')
-rw-r--r--arch/arm/boot/dts/omap3-overo-base.dtsi14
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm/boot/dts/omap3-overo-base.dtsi b/arch/arm/boot/dts/omap3-overo-base.dtsi
index adc714c39825..cc57626ea607 100644
--- a/arch/arm/boot/dts/omap3-overo-base.dtsi
+++ b/arch/arm/boot/dts/omap3-overo-base.dtsi
@@ -44,7 +44,7 @@
};
/* HS USB Host PHY on PORT 2 */
- hsusb2_phy: hsusb2_phy {
+ hsusb2_phy: hsusb2-phy-pins {
compatible = "usb-nop-xceiv";
reset-gpios = <&gpio6 23 GPIO_ACTIVE_LOW>; /* gpio_183 */
vcc-supply = <&hsusb2_power>;
@@ -80,7 +80,7 @@
&hsusb2_pins
>;
- uart2_pins: pinmux_uart2_pins {
+ uart2_pins: uart2-pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x216c, PIN_INPUT | MUX_MODE1) /* mcbsp3_dx.uart2_cts */
OMAP3_CORE1_IOPAD(0x216e, PIN_OUTPUT | MUX_MODE1) /* mcbsp3_dr.uart2_rts */
@@ -89,14 +89,14 @@
>;
};
- i2c1_pins: pinmux_i2c1_pins {
+ i2c1_pins: i2c1-pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */
OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0) /* i2c1_sda.i2c1_sda */
>;
};
- mmc1_pins: pinmux_mmc1_pins {
+ mmc1_pins: mmc1-pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
@@ -107,7 +107,7 @@
>;
};
- mmc2_pins: pinmux_mmc2_pins {
+ mmc2_pins: mmc2-pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
@@ -119,14 +119,14 @@
};
/* WiFi/BT combo */
- w3cbw003c_pins: pinmux_w3cbw003c_pins {
+ w3cbw003c_pins: w3cbw003c-pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x20b4, PIN_OUTPUT | MUX_MODE4) /* gpmc_ncs3.gpio_54 */
OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE4) /* uart3_rts_sd.gpio_164 */
>;
};
- hsusb2_pins: pinmux_hsusb2_pins {
+ hsusb2_pins: hsusb2-pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */
OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_clk.hsusb2_data7 */