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Diffstat (limited to 'arch/arm/boot/dts/at91sam9x5.dtsi')
-rw-r--r--arch/arm/boot/dts/at91sam9x5.dtsi150
1 files changed, 123 insertions, 27 deletions
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index 6a40b777ea4c..7ee49e8daf98 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -126,72 +126,88 @@
};
};
- uart0 {
- pinctrl_uart0: uart0-0 {
+ usart0 {
+ pinctrl_usart0: usart0-0 {
atmel,pins =
<0 0 0x1 0x1 /* PA0 periph A with pullup */
0 1 0x1 0x0>; /* PA1 periph A */
};
- pinctrl_uart0_rts_cts: uart0_rts_cts-0 {
+ pinctrl_usart0_rts: usart0_rts-0 {
atmel,pins =
- <0 2 0x1 0x0 /* PA2 periph A */
- 0 3 0x1 0x0>; /* PA3 periph A */
+ <0 2 0x1 0x0>; /* PA2 periph A */
+ };
+
+ pinctrl_usart0_cts: usart0_cts-0 {
+ atmel,pins =
+ <0 3 0x1 0x0>; /* PA3 periph A */
};
};
- uart1 {
- pinctrl_uart1: uart1-0 {
+ usart1 {
+ pinctrl_usart1: usart1-0 {
atmel,pins =
<0 5 0x1 0x1 /* PA5 periph A with pullup */
0 6 0x1 0x0>; /* PA6 periph A */
};
- pinctrl_uart1_rts_cts: uart1_rts_cts-0 {
+ pinctrl_usart1_rts: usart1_rts-0 {
atmel,pins =
- <3 27 0x3 0x0 /* PC27 periph C */
- 3 28 0x3 0x0>; /* PC28 periph C */
+ <3 27 0x3 0x0>; /* PC27 periph C */
+ };
+
+ pinctrl_usart1_cts: usart1_cts-0 {
+ atmel,pins =
+ <3 28 0x3 0x0>; /* PC28 periph C */
};
};
- uart2 {
- pinctrl_uart2: uart2-0 {
+ usart2 {
+ pinctrl_usart2: usart2-0 {
atmel,pins =
<0 7 0x1 0x1 /* PA7 periph A with pullup */
0 8 0x1 0x0>; /* PA8 periph A */
};
- pinctrl_uart2_rts_cts: uart2_rts_cts-0 {
+ pinctrl_uart2_rts: uart2_rts-0 {
+ atmel,pins =
+ <0 0 0x2 0x0>; /* PB0 periph B */
+ };
+
+ pinctrl_uart2_cts: uart2_cts-0 {
atmel,pins =
- <0 0 0x2 0x0 /* PB0 periph B */
- 0 1 0x2 0x0>; /* PB1 periph B */
+ <0 1 0x2 0x0>; /* PB1 periph B */
};
};
- uart3 {
- pinctrl_uart3: uart3-0 {
+ usart3 {
+ pinctrl_uart3: usart3-0 {
atmel,pins =
<3 23 0x2 0x1 /* PC22 periph B with pullup */
3 23 0x2 0x0>; /* PC23 periph B */
};
- pinctrl_uart3_rts_cts: uart3_rts_cts-0 {
+ pinctrl_usart3_rts: usart3_rts-0 {
+ atmel,pins =
+ <3 24 0x2 0x0>; /* PC24 periph B */
+ };
+
+ pinctrl_usart3_cts: usart3_cts-0 {
atmel,pins =
- <3 24 0x2 0x0 /* PC24 periph B */
- 3 25 0x2 0x0>; /* PC25 periph B */
+ <3 25 0x2 0x0>; /* PC25 periph B */
};
};
- usart0 {
- pinctrl_usart0: usart0-0 {
+ uart0 {
+ pinctrl_uart0: uart0-0 {
atmel,pins =
<3 8 0x3 0x0 /* PC8 periph C */
3 9 0x3 0x1>; /* PC9 periph C with pullup */
};
};
- usart1 {
- pinctrl_usart1: usart1-0 {
+ uart1 {
+ pinctrl_uart1: uart1-0 {
atmel,pins =
<3 16 0x3 0x0 /* PC16 periph C */
3 17 0x3 0x1>; /* PC17 periph C with pullup */
@@ -206,6 +222,66 @@
};
};
+ macb0 {
+ pinctrl_macb0_rmii: macb0_rmii-0 {
+ atmel,pins =
+ <1 0 0x1 0x0 /* PB0 periph A */
+ 1 1 0x1 0x0 /* PB1 periph A */
+ 1 2 0x1 0x0 /* PB2 periph A */
+ 1 3 0x1 0x0 /* PB3 periph A */
+ 1 4 0x1 0x0 /* PB4 periph A */
+ 1 5 0x1 0x0 /* PB5 periph A */
+ 1 6 0x1 0x0 /* PB6 periph A */
+ 1 7 0x1 0x0 /* PB7 periph A */
+ 1 9 0x1 0x0 /* PB9 periph A */
+ 1 10 0x1 0x0>; /* PB10 periph A */
+ };
+
+ pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 {
+ atmel,pins =
+ <1 8 0x1 0x0 /* PA8 periph A */
+ 1 11 0x1 0x0 /* PA11 periph A */
+ 1 12 0x1 0x0 /* PA12 periph A */
+ 1 13 0x1 0x0 /* PA13 periph A */
+ 1 14 0x1 0x0 /* PA14 periph A */
+ 1 15 0x1 0x0 /* PA15 periph A */
+ 1 16 0x1 0x0 /* PA16 periph A */
+ 1 17 0x1 0x0>; /* PA17 periph A */
+ };
+ };
+
+ mmc0 {
+ pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
+ atmel,pins =
+ <0 17 0x1 0x0 /* PA17 periph A */
+ 0 16 0x1 0x1 /* PA16 periph A with pullup */
+ 0 15 0x1 0x1>; /* PA15 periph A with pullup */
+ };
+
+ pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
+ atmel,pins =
+ <0 18 0x1 0x1 /* PA18 periph A with pullup */
+ 0 19 0x1 0x1 /* PA19 periph A with pullup */
+ 0 20 0x1 0x1>; /* PA20 periph A with pullup */
+ };
+ };
+
+ mmc1 {
+ pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
+ atmel,pins =
+ <0 13 0x2 0x0 /* PA13 periph B */
+ 0 12 0x2 0x1 /* PA12 periph B with pullup */
+ 0 11 0x2 0x1>; /* PA11 periph B with pullup */
+ };
+
+ pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
+ atmel,pins =
+ <0 2 0x2 0x1 /* PA2 periph B with pullup */
+ 0 3 0x2 0x1 /* PA3 periph B with pullup */
+ 0 4 0x2 0x1>; /* PA4 periph B with pullup */
+ };
+ };
+
pioA: gpio@fffff400 {
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
reg = <0xfffff400 0x200>;
@@ -249,6 +325,24 @@
};
};
+ mmc0: mmc@f0008000 {
+ compatible = "atmel,hsmci";
+ reg = <0xf0008000 0x600>;
+ interrupts = <12 4 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ mmc1: mmc@f000c000 {
+ compatible = "atmel,hsmci";
+ reg = <0xf000c000 0x600>;
+ interrupts = <26 4 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
dbgu: serial@fffff200 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfffff200 0x200>;
@@ -265,7 +359,7 @@
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart0>;
+ pinctrl-0 = <&pinctrl_usart0>;
status = "disabled";
};
@@ -276,7 +370,7 @@
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart1>;
+ pinctrl-0 = <&pinctrl_usart1>;
status = "disabled";
};
@@ -287,7 +381,7 @@
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart2>;
+ pinctrl-0 = <&pinctrl_usart2>;
status = "disabled";
};
@@ -295,6 +389,8 @@
compatible = "cdns,at32ap7000-macb", "cdns,macb";
reg = <0xf802c000 0x100>;
interrupts = <24 4 3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_macb0_rmii>;
status = "disabled";
};