diff options
Diffstat (limited to 'Documentation')
1269 files changed, 32977 insertions, 9181 deletions
diff --git a/Documentation/ABI/stable/sysfs-driver-dma-idxd b/Documentation/ABI/stable/sysfs-driver-dma-idxd index 0c2b613f2373..8e2c2c405db2 100644 --- a/Documentation/ABI/stable/sysfs-driver-dma-idxd +++ b/Documentation/ABI/stable/sysfs-driver-dma-idxd @@ -227,6 +227,17 @@ Contact: dmaengine@vger.kernel.org Description: Indicate the number of retires for an enqcmds submission on a sharedwq. A max value to set attribute is capped at 64. +What: /sys/bus/dsa/devices/wq<m>.<n>/op_config +Date: Sept 14, 2022 +KernelVersion: 6.0.0 +Contact: dmaengine@vger.kernel.org +Description: Shows the operation capability bits displayed in bitmap format + presented by %*pb printk() output format specifier. + The attribute can be configured when the WQ is disabled in + order to configure the WQ to accept specific bits that + correlates to the operations allowed. It's visible only + on platforms that support the capability. + What: /sys/bus/dsa/devices/engine<m>.<n>/group_id Date: Oct 25, 2019 KernelVersion: 5.6.0 @@ -255,3 +266,27 @@ Contact: dmaengine@vger.kernel.org Description: Indicates the number of Read Buffers reserved for the use of engines in the group. See DSA spec v1.2 9.2.18 GRPCFG Read Buffers Reserved. + +What: /sys/bus/dsa/devices/group<m>.<n>/desc_progress_limit +Date: Sept 14, 2022 +KernelVersion: 6.0.0 +Contact: dmaengine@vger.kernel.org +Description: Allows control of the number of work descriptors that can be + concurrently processed by an engine in the group as a fraction + of the Maximum Work Descriptors in Progress value specified in + the ENGCAP register. The acceptable values are 0 (default), + 1 (1/2 of max value), 2 (1/4 of the max value), and 3 (1/8 of + the max value). It's visible only on platforms that support + the capability. + +What: /sys/bus/dsa/devices/group<m>.<n>/batch_progress_limit +Date: Sept 14, 2022 +KernelVersion: 6.0.0 +Contact: dmaengine@vger.kernel.org +Description: Allows control of the number of batch descriptors that can be + concurrently processed by an engine in the group as a fraction + of the Maximum Batch Descriptors in Progress value specified in + the ENGCAP register. The acceptable values are 0 (default), + 1 (1/2 of max value), 2 (1/4 of the max value), and 3 (1/8 of + the max value). It's visible only on platforms that support + the capability. diff --git a/Documentation/ABI/testing/debugfs-cros-ec b/Documentation/ABI/testing/debugfs-cros-ec index 1fe0add99a2a..9a040c6f5e03 100644 --- a/Documentation/ABI/testing/debugfs-cros-ec +++ b/Documentation/ABI/testing/debugfs-cros-ec @@ -54,3 +54,25 @@ Description: this feature. Output will be in the format: "0x%08x\n". + +What: /sys/kernel/debug/<cros-ec-device>/suspend_timeout_ms +Date: August 2022 +KernelVersion: 6.1 +Description: + Some ECs have a feature where they will track transitions of + a hardware-controlled sleep line, such as Intel's SLP_S0 line, + in order to detect cases where a system failed to go into deep + sleep states. The suspend_timeout_ms file controls the amount of + time in milliseconds the EC will wait before declaring a sleep + timeout event and attempting to wake the system. + + Supply 0 to use the default value coded into EC firmware. Supply + 65535 (EC_HOST_SLEEP_TIMEOUT_INFINITE) to disable the EC sleep + failure detection mechanism. Values in between 0 and 65535 + indicate the number of milliseconds the EC should wait after a + sleep transition before declaring a timeout. This includes both + the duration after a sleep command was received but before the + hardware line changed, as well as the duration between when the + hardware line changed and the kernel sent an EC resume command. + + Output will be in the format: "%u\n". diff --git a/Documentation/ABI/testing/sysfs-amd-pmc b/Documentation/ABI/testing/sysfs-amd-pmc new file mode 100644 index 000000000000..c421b72844f1 --- /dev/null +++ b/Documentation/ABI/testing/sysfs-amd-pmc @@ -0,0 +1,13 @@ +What: /sys/bus/platform/drivers/amd_pmc/*/smu_fw_version +Date: October 2022 +Contact: Mario Limonciello <mario.limonciello@amd.com> +Description: Reading this file reports the version of the firmware loaded to + System Management Unit (SMU) contained in AMD CPUs and + APUs. + +What: /sys/bus/platform/drivers/amd_pmc/*/smu_program +Date: October 2022 +Contact: Mario Limonciello <mario.limonciello@amd.com> +Description: Reading this file reports the program corresponding to the SMU + firmware version. The program field is used to disambiguate two + APU/CPU models that can share the same firmware binary. diff --git a/Documentation/ABI/testing/sysfs-amd-pmf b/Documentation/ABI/testing/sysfs-amd-pmf new file mode 100644 index 000000000000..7fc0e1c2b76b --- /dev/null +++ b/Documentation/ABI/testing/sysfs-amd-pmf @@ -0,0 +1,13 @@ +What: /sys/devices/platform/*/cnqf_enable +Date: September 2022 +Contact: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> +Description: Reading this file tells if the AMD Platform Management(PMF) + Cool n Quiet Framework(CnQF) feature is enabled or not. + + This feature is not enabled by default and gets only turned on + if OEM BIOS passes a "flag" to PMF ACPI function (index 11 or 12) + or in case the user writes "on". + + To turn off CnQF user can write "off" to the sysfs node. + Note: Systems that support auto mode will not have this sysfs file + available. diff --git a/Documentation/ABI/testing/sysfs-bus-bcma b/Documentation/ABI/testing/sysfs-bus-bcma index 721b4aea3020..e93d3ddca844 100644 --- a/Documentation/ABI/testing/sysfs-bus-bcma +++ b/Documentation/ABI/testing/sysfs-bus-bcma @@ -3,7 +3,7 @@ Date: May 2011 KernelVersion: 3.0 Contact: Rafał Miłecki <zajec5@gmail.com> Description: - Each BCMA core has it's manufacturer id. See + Each BCMA core has its manufacturer id. See include/linux/bcma/bcma.h for possible values. What: /sys/bus/bcma/devices/.../id diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x b/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x index 8e53a32f8150..08b1964f27d3 100644 --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x @@ -516,3 +516,11 @@ Contact: Mathieu Poirier <mathieu.poirier@linaro.org> Description: (Read) Returns the number of special conditional P1 right-hand keys that the trace unit can use (0x194). The value is taken directly from the HW. + +What: /sys/bus/coresight/devices/etm<N>/ts_source +Date: October 2022 +KernelVersion: 6.1 +Contact: Mathieu Poirier <mathieu.poirier@linaro.org> or Suzuki K Poulose <suzuki.poulose@arm.com> +Description: (Read) When FEAT_TRF is implemented, value of TRFCR_ELx.TS used for + trace session. Otherwise -1 indicates an unknown time source. Check + trcidr0.tssize to see if a global timestamp is available. diff --git a/Documentation/ABI/testing/sysfs-bus-counter b/Documentation/ABI/testing/sysfs-bus-counter index 06c2b3e27e0b..ff83320b4255 100644 --- a/Documentation/ABI/testing/sysfs-bus-counter +++ b/Documentation/ABI/testing/sysfs-bus-counter @@ -4,6 +4,12 @@ Contact: linux-iio@vger.kernel.org Description: Count data of Count Y represented as a string. +What: /sys/bus/counter/devices/counterX/countY/capture +KernelVersion: 6.1 +Contact: linux-iio@vger.kernel.org +Description: + Historical capture of the Count Y count data. + What: /sys/bus/counter/devices/counterX/countY/ceiling KernelVersion: 5.2 Contact: linux-iio@vger.kernel.org @@ -203,6 +209,13 @@ Description: both edges: Any state transition. +What: /sys/bus/counter/devices/counterX/countY/num_overflows +KernelVersion: 6.1 +Contact: linux-iio@vger.kernel.org +Description: + This attribute indicates the number of overflows of count Y. + +What: /sys/bus/counter/devices/counterX/countY/capture_component_id What: /sys/bus/counter/devices/counterX/countY/ceiling_component_id What: /sys/bus/counter/devices/counterX/countY/floor_component_id What: /sys/bus/counter/devices/counterX/countY/count_mode_component_id @@ -213,11 +226,14 @@ What: /sys/bus/counter/devices/counterX/countY/prescaler_component_id What: /sys/bus/counter/devices/counterX/countY/preset_component_id What: /sys/bus/counter/devices/counterX/countY/preset_enable_component_id What: /sys/bus/counter/devices/counterX/countY/signalZ_action_component_id +What: /sys/bus/counter/devices/counterX/countY/num_overflows_component_id What: /sys/bus/counter/devices/counterX/signalY/cable_fault_component_id What: /sys/bus/counter/devices/counterX/signalY/cable_fault_enable_component_id What: /sys/bus/counter/devices/counterX/signalY/filter_clock_prescaler_component_id What: /sys/bus/counter/devices/counterX/signalY/index_polarity_component_id +What: /sys/bus/counter/devices/counterX/signalY/polarity_component_id What: /sys/bus/counter/devices/counterX/signalY/synchronous_mode_component_id +What: /sys/bus/counter/devices/counterX/signalY/frequency_component_id KernelVersion: 5.16 Contact: linux-iio@vger.kernel.org Description: @@ -303,6 +319,19 @@ Description: Discrete set of available values for the respective Signal Y configuration are listed in this file. +What: /sys/bus/counter/devices/counterX/signalY/polarity +KernelVersion: 6.1 +Contact: linux-iio@vger.kernel.org +Description: + Active level of Signal Y. The following polarity values are + available: + + positive: + Signal high state considered active level (rising edge). + + negative: + Signal low state considered active level (falling edge). + What: /sys/bus/counter/devices/counterX/signalY/name KernelVersion: 5.2 Contact: linux-iio@vger.kernel.org @@ -345,3 +374,9 @@ Description: via index_polarity. The index function (as enabled via preset_enable) is performed synchronously with the quadrature clock on the active level of the index input. + +What: /sys/bus/counter/devices/counterX/signalY/frequency +KernelVersion: 6.1 +Contact: linux-iio@vger.kernel.org +Description: + Read-only attribute that indicates the signal Y frequency, in Hz. diff --git a/Documentation/ABI/testing/sysfs-bus-fcoe b/Documentation/ABI/testing/sysfs-bus-fcoe index 8fe787cc4ab7..5a4f2091ac37 100644 --- a/Documentation/ABI/testing/sysfs-bus-fcoe +++ b/Documentation/ABI/testing/sysfs-bus-fcoe @@ -31,7 +31,7 @@ Description: 'FCoE Controller' instances on the fcoe bus. 1) Write interface name to ctlr_create 2) Configure the FCoE Controller (ctlr_X) 3) Enable the FCoE Controller to begin discovery and login. The FCoE Controller is destroyed by - writing it's name, i.e. ctlr_X to the ctlr_delete file. + writing its name, i.e. ctlr_X to the ctlr_delete file. Attributes: diff --git a/Documentation/ABI/testing/sysfs-bus-iio b/Documentation/ABI/testing/sysfs-bus-iio index e81ba6f5e1c8..6ba34c0d9789 100644 --- a/Documentation/ABI/testing/sysfs-bus-iio +++ b/Documentation/ABI/testing/sysfs-bus-iio @@ -196,7 +196,7 @@ Description: Raw capacitance measurement from channel Y. Units after application of scale and offset are nanofarads. -What: /sys/.../iio:deviceX/in_capacitanceY-in_capacitanceZ_raw +What: /sys/.../iio:deviceX/in_capacitanceY-capacitanceZ_raw KernelVersion: 3.2 Contact: linux-iio@vger.kernel.org Description: @@ -207,6 +207,25 @@ Description: is required is a consistent labeling. Units after application of scale and offset are nanofarads. +What: /sys/.../iio:deviceX/in_capacitanceY-capacitanceZ_zeropoint +KernelVersion: 6.1 +Contact: linux-iio@vger.kernel.org +Description: + For differential channels, this an offset that is applied + equally to both inputs. As the reading is of the difference + between the two inputs, this should not be applied to the _raw + reading by userspace (unlike _offset) and unlike calibbias + it does not affect the differential value measured because + the effect of _zeropoint cancels out across the two inputs + that make up the differential pair. It's purpose is to bring + the individual signals, before the differential is measured, + within the measurement range of the device. The naming is + chosen because if the separate inputs that make the + differential pair are drawn on a graph in their + _raw units, this is the value that the zero point on the + measurement axis represents. It is expressed with the + same scaling as _raw. + What: /sys/bus/iio/devices/iio:deviceX/in_temp_raw What: /sys/bus/iio/devices/iio:deviceX/in_tempX_raw What: /sys/bus/iio/devices/iio:deviceX/in_temp_x_raw @@ -241,6 +260,15 @@ Description: Has all of the equivalent parameters as per voltageY. Units after application of scale and offset are m/s^2. +What: /sys/bus/iio/devices/iio:deviceX/in_accel_linear_x_raw +What: /sys/bus/iio/devices/iio:deviceX/in_accel_linear_y_raw +What: /sys/bus/iio/devices/iio:deviceX/in_accel_linear_z_raw +KernelVersion: 6.1 +Contact: linux-iio@vger.kernel.org +Description: + As per in_accel_X_raw attributes, but minus the + acceleration due to gravity. + What: /sys/bus/iio/devices/iio:deviceX/in_gravity_x_raw What: /sys/bus/iio/devices/iio:deviceX/in_gravity_y_raw What: /sys/bus/iio/devices/iio:deviceX/in_gravity_z_raw @@ -2038,3 +2066,99 @@ Description: Available range for the forced calibration value, expressed as: - a range specified as "[min step max]" + +What: /sys/bus/iio/devices/iio:deviceX/in_voltageX_sampling_frequency +What: /sys/bus/iio/devices/iio:deviceX/in_powerY_sampling_frequency +What: /sys/bus/iio/devices/iio:deviceX/in_currentZ_sampling_frequency +KernelVersion: 5.20 +Contact: linux-iio@vger.kernel.org +Description: + Some devices have separate controls of sampling frequency for + individual channels. If multiple channels are enabled in a scan, + then the sampling_frequency of the scan may be computed from the + per channel sampling frequencies. + +What: /sys/.../events/in_accel_gesture_singletap_en +What: /sys/.../events/in_accel_gesture_doubletap_en +KernelVersion: 6.1 +Contact: linux-iio@vger.kernel.org +Description: + Device generates an event on a single or double tap. + +What: /sys/.../events/in_accel_gesture_singletap_value +What: /sys/.../events/in_accel_gesture_doubletap_value +KernelVersion: 6.1 +Contact: linux-iio@vger.kernel.org +Description: + Specifies the threshold value that the device is comparing + against to generate the tap gesture event. The lower + threshold value increases the sensitivity of tap detection. + Units and the exact meaning of value are device-specific. + +What: /sys/.../events/in_accel_gesture_tap_value_available +KernelVersion: 6.1 +Contact: linux-iio@vger.kernel.org +Description: + Lists all available threshold values which can be used to + modify the sensitivity of the tap detection. + +What: /sys/.../events/in_accel_gesture_singletap_reset_timeout +What: /sys/.../events/in_accel_gesture_doubletap_reset_timeout +KernelVersion: 6.1 +Contact: linux-iio@vger.kernel.org +Description: + Specifies the timeout value in seconds for the tap detector + to not to look for another tap event after the event as + occurred. Basically the minimum quiet time between the two + single-tap's or two double-tap's. + +What: /sys/.../events/in_accel_gesture_tap_reset_timeout_available +KernelVersion: 6.1 +Contact: linux-iio@vger.kernel.org +Description: + Lists all available tap reset timeout values. Units in seconds. + +What: /sys/.../events/in_accel_gesture_doubletap_tap2_min_delay +KernelVersion: 6.1 +Contact: linux-iio@vger.kernel.org +Description: + Specifies the minimum quiet time in seconds between the two + taps of a double tap. + +What: /sys/.../events/in_accel_gesture_doubletap_tap2_min_delay_available +KernelVersion: 6.1 +Contact: linux-iio@vger.kernel.org +Description: + Lists all available delay values between two taps in the double + tap. Units in seconds. + +What: /sys/.../events/in_accel_gesture_tap_maxtomin_time +KernelVersion: 6.1 +Contact: linux-iio@vger.kernel.org +Description: + Specifies the maximum time difference allowed between upper + and lower peak of tap to consider it as the valid tap event. + Units in seconds. + +What: /sys/.../events/in_accel_gesture_tap_maxtomin_time_available +KernelVersion: 6.1 +Contact: linux-iio@vger.kernel.org +Description: + Lists all available time values between upper peak to lower + peak. Units in seconds. + +What: /sys/bus/iio/devices/iio:deviceX/in_rot_yaw_raw +What: /sys/bus/iio/devices/iio:deviceX/in_rot_pitch_raw +What: /sys/bus/iio/devices/iio:deviceX/in_rot_roll_raw +KernelVersion: 6.1 +Contact: linux-iio@vger.kernel.org +Description: + Raw (unscaled) euler angles readings. Units after + application of scale are deg. + +What: /sys/bus/iio/devices/iio:deviceX/serialnumber +KernelVersion: 6.1 +Contact: linux-iio@vger.kernel.org +Description: + An example format is 16-bytes, 2-digits-per-byte, HEX-string + representing the sensor unique ID number. diff --git a/Documentation/ABI/testing/sysfs-bus-iio-bno055 b/Documentation/ABI/testing/sysfs-bus-iio-bno055 new file mode 100644 index 000000000000..f32b1644e986 --- /dev/null +++ b/Documentation/ABI/testing/sysfs-bus-iio-bno055 @@ -0,0 +1,81 @@ +What: /sys/bus/iio/devices/iio:deviceX/in_accel_raw_range +KernelVersion: 6.1 +Contact: linux-iio@vger.kernel.org +Description: + Raw (unscaled) range for acceleration readings. Unit after + application of scale is m/s^2. Note that this doesn't affects + the scale (which should be used when changing the maximum and + minimum readable value affects also the reading scaling factor). + +What: /sys/bus/iio/devices/iio:deviceX/in_anglvel_raw_range +KernelVersion: 6.1 +Contact: linux-iio@vger.kernel.org +Description: + Range for angular velocity readings in radians per second. Note + that this does not affects the scale (which should be used when + changing the maximum and minimum readable value affects also the + reading scaling factor). + +What: /sys/bus/iio/devices/iio:deviceX/in_accel_raw_range_available +KernelVersion: 6.1 +Contact: linux-iio@vger.kernel.org +Description: + List of allowed values for in_accel_raw_range attribute + +What: /sys/bus/iio/devices/iio:deviceX/in_anglvel_raw_range_available +KernelVersion: 6.1 +Contact: linux-iio@vger.kernel.org +Description: + List of allowed values for in_anglvel_raw_range attribute + +What: /sys/bus/iio/devices/iio:deviceX/in_magn_calibration_fast_enable +KernelVersion: 6.1 +Contact: linux-iio@vger.kernel.org +Description: + Can be 1 or 0. Enables/disables the "Fast Magnetometer + Calibration" HW function. + +What: /sys/bus/iio/devices/iio:deviceX/fusion_enable +KernelVersion: 6.1 +Contact: linux-iio@vger.kernel.org +Description: + Can be 1 or 0. Enables/disables the "sensor fusion" (a.k.a. + NDOF) HW function. + +What: /sys/bus/iio/devices/iio:deviceX/calibration_data +KernelVersion: 6.1 +Contact: linux-iio@vger.kernel.org +Description: + Reports the binary calibration data blob for the IMU sensors. + +What: /sys/bus/iio/devices/iio:deviceX/in_accel_calibration_auto_status +KernelVersion: 6.1 +Contact: linux-iio@vger.kernel.org +Description: + Reports the autocalibration status for the accelerometer sensor. + Can be 0 (calibration non even enabled) or 1 to 5 where the greater + the number, the better the calibration status. + +What: /sys/bus/iio/devices/iio:deviceX/in_gyro_calibration_auto_status +KernelVersion: 6.1 +Contact: linux-iio@vger.kernel.org +Description: + Reports the autocalibration status for the gyroscope sensor. + Can be 0 (calibration non even enabled) or 1 to 5 where the greater + the number, the better the calibration status. + +What: /sys/bus/iio/devices/iio:deviceX/in_magn_calibration_auto_status +KernelVersion: 6.1 +Contact: linux-iio@vger.kernel.org +Description: + Reports the autocalibration status for the magnetometer sensor. + Can be 0 (calibration non even enabled) or 1 to 5 where the greater + the number, the better the calibration status. + +What: /sys/bus/iio/devices/iio:deviceX/sys_calibration_auto_status +KernelVersion: 6.1 +Contact: linux-iio@vger.kernel.org +Description: + Reports the status for the IMU overall autocalibration. + Can be 0 (calibration non even enabled) or 1 to 5 where the greater + the number, the better the calibration status. diff --git a/Documentation/ABI/testing/sysfs-bus-iio-cdc-ad7746 b/Documentation/ABI/testing/sysfs-bus-iio-cdc-ad7746 new file mode 100644 index 000000000000..02ca8941dce1 --- /dev/null +++ b/Documentation/ABI/testing/sysfs-bus-iio-cdc-ad7746 @@ -0,0 +1,11 @@ +What: /sys/.../iio:deviceX/in_capacitableY_calibbias_calibration +What: /sys/.../iio:deviceX/in_capacitableY_calibscale_calibration +KernelVersion: 6.1 +Contact: linux-iio@vger.kernel.org +Description: + Write 1 to trigger a calibration of the calibbias or + calibscale. For calibscale, a full scale capacitance should + be connected to the capacitance input and a + calibscale_calibration then started. For calibbias see + the device datasheet section on "capacitive system offset + calibration". diff --git a/Documentation/ABI/testing/sysfs-bus-iio-proximity b/Documentation/ABI/testing/sysfs-bus-iio-proximity index 3aac6dab8775..9b9d1cc9b703 100644 --- a/Documentation/ABI/testing/sysfs-bus-iio-proximity +++ b/Documentation/ABI/testing/sysfs-bus-iio-proximity @@ -18,7 +18,7 @@ Description: on the signal from which time of flight measurements are taken. The appropriate values to take is dependent on both the - sensor and it's operating environment: + sensor and its operating environment: * as3935 (0-31 range) 18 = indoors (default) 14 = outdoors diff --git a/Documentation/ABI/testing/sysfs-bus-pci b/Documentation/ABI/testing/sysfs-bus-pci index 6fc2c2efe8ab..840727fc75dc 100644 --- a/Documentation/ABI/testing/sysfs-bus-pci +++ b/Documentation/ABI/testing/sysfs-bus-pci @@ -457,3 +457,36 @@ Description: The file is writable if the PF is bound to a driver that implements ->sriov_set_msix_vec_count(). + +What: /sys/bus/pci/devices/.../resourceN_resize +Date: September 2022 +Contact: Alex Williamson <alex.williamson@redhat.com> +Description: + These files provide an interface to PCIe Resizable BAR support. + A file is created for each BAR resource (N) supported by the + PCIe Resizable BAR extended capability of the device. Reading + each file exposes the bitmap of available resource sizes: + + # cat resource1_resize + 00000000000001c0 + + The bitmap represents supported resource sizes for the BAR, + where bit0 = 1MB, bit1 = 2MB, bit2 = 4MB, etc. In the above + example the device supports 64MB, 128MB, and 256MB BAR sizes. + + When writing the file, the user provides the bit position of + the desired resource size, for example: + + # echo 7 > resource1_resize + + This indicates to set the size value corresponding to bit 7, + 128MB. The resulting size is 2 ^ (bit# + 20). This definition + matches the PCIe specification of this capability. + + In order to make use of resource resizing, all PCI drivers must + be unbound from the device and peer devices under the same + parent bridge may need to be soft removed. In the case of + VGA devices, writing a resize value will remove low level + console drivers from the device. Raw users of pci-sysfs + resourceN attributes must be terminated prior to resizing. + Success of the resizing operation is not guaranteed. diff --git a/Documentation/ABI/testing/sysfs-bus-thunderbolt b/Documentation/ABI/testing/sysfs-bus-thunderbolt index f7570c240ce8..76ab3e1fe374 100644 --- a/Documentation/ABI/testing/sysfs-bus-thunderbolt +++ b/Documentation/ABI/testing/sysfs-bus-thunderbolt @@ -153,7 +153,7 @@ Date: Jan 2020 KernelVersion: 5.5 Contact: Mika Westerberg <mika.westerberg@linux.intel.com> Description: This attribute reports number of RX lanes the device is - using simultaneusly through its upstream port. + using simultaneously through its upstream port. What: /sys/bus/thunderbolt/devices/.../tx_speed Date: Jan 2020 @@ -167,7 +167,7 @@ Date: Jan 2020 KernelVersion: 5.5 Contact: Mika Westerberg <mika.westerberg@linux.intel.com> Description: This attribute reports number of TX lanes the device is - using simultaneusly through its upstream port. + using simultaneously through its upstream port. What: /sys/bus/thunderbolt/devices/.../vendor Date: Sep 2017 diff --git a/Documentation/ABI/testing/sysfs-class-power b/Documentation/ABI/testing/sysfs-class-power index a9ce63cfbe87..e434fc523291 100644 --- a/Documentation/ABI/testing/sysfs-class-power +++ b/Documentation/ABI/testing/sysfs-class-power @@ -364,7 +364,10 @@ Date: April 2019 Contact: linux-pm@vger.kernel.org Description: Represents a battery percentage level, above which charging will - stop. + stop. Not all hardware is capable of setting this to an arbitrary + percentage. Drivers will round written values to the nearest + supported value. Reading back the value will show the actual + threshold set by the driver. Access: Read, Write diff --git a/Documentation/ABI/testing/sysfs-devices-hisi_ptt b/Documentation/ABI/testing/sysfs-devices-hisi_ptt new file mode 100644 index 000000000000..82de6d710266 --- /dev/null +++ b/Documentation/ABI/testing/sysfs-devices-hisi_ptt @@ -0,0 +1,61 @@ +What: /sys/devices/hisi_ptt<sicl_id>_<core_id>/tune +Date: October 2022 +KernelVersion: 6.1 +Contact: Yicong Yang <yangyicong@hisilicon.com> +Description: This directory contains files for tuning the PCIe link + parameters(events). Each file is named after the event + of the PCIe link. + + See Documentation/trace/hisi-ptt.rst for more information. + +What: /sys/devices/hisi_ptt<sicl_id>_<core_id>/tune/qos_tx_cpl +Date: October 2022 +KernelVersion: 6.1 +Contact: Yicong Yang <yangyicong@hisilicon.com> +Description: (RW) Controls the weight of Tx completion TLPs, which influence + the proportion of outbound completion TLPs on the PCIe link. + The available tune data is [0, 1, 2]. Writing a negative value + will return an error, and out of range values will be converted + to 2. The value indicates a probable level of the event. + +What: /sys/devices/hisi_ptt<sicl_id>_<core_id>/tune/qos_tx_np +Date: October 2022 +KernelVersion: 6.1 +Contact: Yicong Yang <yangyicong@hisilicon.com> +Description: (RW) Controls the weight of Tx non-posted TLPs, which influence + the proportion of outbound non-posted TLPs on the PCIe link. + The available tune data is [0, 1, 2]. Writing a negative value + will return an error, and out of range values will be converted + to 2. The value indicates a probable level of the event. + +What: /sys/devices/hisi_ptt<sicl_id>_<core_id>/tune/qos_tx_p +Date: October 2022 +KernelVersion: 6.1 +Contact: Yicong Yang <yangyicong@hisilicon.com> +Description: (RW) Controls the weight of Tx posted TLPs, which influence the + proportion of outbound posted TLPs on the PCIe link. + The available tune data is [0, 1, 2]. Writing a negative value + will return an error, and out of range values will be converted + to 2. The value indicates a probable level of the event. + +What: /sys/devices/hisi_ptt<sicl_id>_<core_id>/tune/rx_alloc_buf_level +Date: October 2022 +KernelVersion: 6.1 +Contact: Yicong Yang <yangyicong@hisilicon.com> +Description: (RW) Control the allocated buffer watermark for inbound packets. + The packets will be stored in the buffer first and then transmitted + either when the watermark reached or when timed out. + The available tune data is [0, 1, 2]. Writing a negative value + will return an error, and out of range values will be converted + to 2. The value indicates a probable level of the event. + +What: /sys/devices/hisi_ptt<sicl_id>_<core_id>/tune/tx_alloc_buf_level +Date: October 2022 +KernelVersion: 6.1 +Contact: Yicong Yang <yangyicong@hisilicon.com> +Description: (RW) Control the allocated buffer watermark of outbound packets. + The packets will be stored in the buffer first and then transmitted + either when the watermark reached or when timed out. + The available tune data is [0, 1, 2]. Writing a negative value + will return an error, and out of range values will be converted + to 2. The value indicates a probable level of the event. diff --git a/Documentation/ABI/testing/sysfs-devices-system-cpu b/Documentation/ABI/testing/sysfs-devices-system-cpu index 760c889b6cd1..f54867cadb0f 100644 --- a/Documentation/ABI/testing/sysfs-devices-system-cpu +++ b/Documentation/ABI/testing/sysfs-devices-system-cpu @@ -296,7 +296,7 @@ Description: Processor frequency boosting control This switch controls the boost setting for the whole system. Boosting allows the CPU and the firmware to run at a frequency - beyond it's nominal limit. + beyond its nominal limit. More details can be found in Documentation/admin-guide/pm/cpufreq.rst diff --git a/Documentation/ABI/testing/sysfs-driver-habanalabs b/Documentation/ABI/testing/sysfs-driver-habanalabs index 96646fb2e7a1..13b5b2ec3be7 100644 --- a/Documentation/ABI/testing/sysfs-driver-habanalabs +++ b/Documentation/ABI/testing/sysfs-driver-habanalabs @@ -16,7 +16,7 @@ Description: Version of the application running on the device's CPU What: /sys/class/habanalabs/hl<n>/clk_max_freq_mhz Date: Jun 2019 -KernelVersion: not yet upstreamed +KernelVersion: 5.7 Contact: ogabbay@kernel.org Description: Allows the user to set the maximum clock frequency, in MHz. The device clock might be set to lower value than the maximum. @@ -26,7 +26,7 @@ Description: Allows the user to set the maximum clock frequency, in MHz. What: /sys/class/habanalabs/hl<n>/clk_cur_freq_mhz Date: Jun 2019 -KernelVersion: not yet upstreamed +KernelVersion: 5.7 Contact: ogabbay@kernel.org Description: Displays the current frequency, in MHz, of the device clock. This property is valid only for the Gaudi ASIC family @@ -176,6 +176,12 @@ KernelVersion: 5.1 Contact: ogabbay@kernel.org Description: Version of the device's preboot F/W code +What: /sys/class/habanalabs/hl<n>/security_enabled +Date: Oct 2022 +KernelVersion: 6.1 +Contact: obitton@habana.ai +Description: Displays the device's security status + What: /sys/class/habanalabs/hl<n>/soft_reset Date: Jan 2019 KernelVersion: 5.1 @@ -230,6 +236,6 @@ Description: Version of the u-boot running on the device's CPU What: /sys/class/habanalabs/hl<n>/vrm_ver Date: Jan 2022 -KernelVersion: not yet upstreamed +KernelVersion: 5.17 Contact: ogabbay@kernel.org Description: Version of the Device's Voltage Regulator Monitor F/W code. N/A to GOYA and GAUDI diff --git a/Documentation/ABI/testing/sysfs-driver-ufs b/Documentation/ABI/testing/sysfs-driver-ufs index 6b248abb1bd7..228aa43e14ed 100644 --- a/Documentation/ABI/testing/sysfs-driver-ufs +++ b/Documentation/ABI/testing/sysfs-driver-ufs @@ -1417,6 +1417,15 @@ Description: This node is used to set or display whether UFS WriteBooster is platform that doesn't support UFSHCD_CAP_CLK_SCALING, we can disable/enable WriteBooster through this sysfs node. +What: /sys/bus/platform/drivers/ufshcd/*/enable_wb_buf_flush +What: /sys/bus/platform/devices/*.ufs/enable_wb_buf_flush +Date: July 2022 +Contact: Jinyoung Choi <j-young.choi@samsung.com> +Description: This entry shows the status of WriteBooster buffer flushing + and it can be used to enable or disable the flushing. + If flushing is enabled, the device executes the flush + operation when the command queue is empty. + What: /sys/bus/platform/drivers/ufshcd/*/device_descriptor/hpb_version What: /sys/bus/platform/devices/*.ufs/device_descriptor/hpb_version Date: June 2021 @@ -1591,6 +1600,43 @@ Description: This entry shows the status of HPB. The file is read only. +Contact: Daniil Lunev <dlunev@chromium.org> +What: /sys/bus/platform/drivers/ufshcd/*/capabilities/ +What: /sys/bus/platform/devices/*.ufs/capabilities/ +Date: August 2022 +Description: The group represents the effective capabilities of the + host-device pair. i.e. the capabilities which are enabled in the + driver for the specific host controller, supported by the host + controller and are supported and/or have compatible + configuration on the device side. + +Contact: Daniil Lunev <dlunev@chromium.org> +What: /sys/bus/platform/drivers/ufshcd/*/capabilities/clock_scaling +What: /sys/bus/platform/devices/*.ufs/capabilities/clock_scaling +Date: August 2022 +Contact: Daniil Lunev <dlunev@chromium.org> +Description: Indicates status of clock scaling. + + == ============================ + 0 Clock scaling is not supported. + 1 Clock scaling is supported. + == ============================ + + The file is read only. + +What: /sys/bus/platform/drivers/ufshcd/*/capabilities/write_booster +What: /sys/bus/platform/devices/*.ufs/capabilities/write_booster +Date: August 2022 +Contact: Daniil Lunev <dlunev@chromium.org> +Description: Indicates status of Write Booster. + + == ============================ + 0 Write Booster can not be enabled. + 1 Write Booster can be enabled. + == ============================ + + The file is read only. + What: /sys/class/scsi_device/*/device/hpb_param_sysfs/activation_thld Date: February 2021 Contact: Avri Altman <avri.altman@wdc.com> diff --git a/Documentation/ABI/testing/sysfs-fs-f2fs b/Documentation/ABI/testing/sysfs-fs-f2fs index 083ac2d63eef..483639fb727b 100644 --- a/Documentation/ABI/testing/sysfs-fs-f2fs +++ b/Documentation/ABI/testing/sysfs-fs-f2fs @@ -466,6 +466,30 @@ Description: Show status of f2fs superblock in real time. 0x4000 SBI_IS_FREEZING freefs is in process ====== ===================== ================================= +What: /sys/fs/f2fs/<disk>/stat/cp_status +Date: September 2022 +Contact: "Chao Yu" <chao.yu@oppo.com> +Description: Show status of f2fs checkpoint in real time. + + =============================== ============================== + cp flag value + CP_UMOUNT_FLAG 0x00000001 + CP_ORPHAN_PRESENT_FLAG 0x00000002 + CP_COMPACT_SUM_FLAG 0x00000004 + CP_ERROR_FLAG 0x00000008 + CP_FSCK_FLAG 0x00000010 + CP_FASTBOOT_FLAG 0x00000020 + CP_CRC_RECOVERY_FLAG 0x00000040 + CP_NAT_BITS_FLAG 0x00000080 + CP_TRIMMED_FLAG 0x00000100 + CP_NOCRC_RECOVERY_FLAG 0x00000200 + CP_LARGE_NAT_BITMAP_FLAG 0x00000400 + CP_QUOTA_NEED_FSCK_FLAG 0x00000800 + CP_DISABLED_FLAG 0x00001000 + CP_DISABLED_QUICK_FLAG 0x00002000 + CP_RESIZEFS_FLAG 0x00004000 + =============================== ============================== + What: /sys/fs/f2fs/<disk>/ckpt_thread_ioprio Date: January 2021 Contact: "Daeho Jeong" <daehojeong@google.com> diff --git a/Documentation/ABI/testing/sysfs-kernel-livepatch b/Documentation/ABI/testing/sysfs-kernel-livepatch index bea7bd5a1d5f..a5df9b4910dc 100644 --- a/Documentation/ABI/testing/sysfs-kernel-livepatch +++ b/Documentation/ABI/testing/sysfs-kernel-livepatch @@ -55,6 +55,14 @@ Description: The object directory contains subdirectories for each function that is patched within the object. +What: /sys/kernel/livepatch/<patch>/<object>/patched +Date: August 2022 +KernelVersion: 6.1.0 +Contact: live-patching@vger.kernel.org +Description: + An attribute which indicates whether the object is currently + patched. + What: /sys/kernel/livepatch/<patch>/<object>/<function,sympos> Date: Nov 2014 KernelVersion: 3.19.0 diff --git a/Documentation/ABI/testing/sysfs-kernel-mm-memory-tiers b/Documentation/ABI/testing/sysfs-kernel-mm-memory-tiers new file mode 100644 index 000000000000..45985e411f13 --- /dev/null +++ b/Documentation/ABI/testing/sysfs-kernel-mm-memory-tiers @@ -0,0 +1,25 @@ +What: /sys/devices/virtual/memory_tiering/ +Date: August 2022 +Contact: Linux memory management mailing list <linux-mm@kvack.org> +Description: A collection of all the memory tiers allocated. + + Individual memory tier details are contained in subdirectories + named by the abstract distance of the memory tier. + + /sys/devices/virtual/memory_tiering/memory_tierN/ + + +What: /sys/devices/virtual/memory_tiering/memory_tierN/ + /sys/devices/virtual/memory_tiering/memory_tierN/nodes +Date: August 2022 +Contact: Linux memory management mailing list <linux-mm@kvack.org> +Description: Directory with details of a specific memory tier + + This is the directory containing information about a particular + memory tier, memtierN, where N is derived based on abstract distance. + + A smaller value of N implies a higher (faster) memory tier in the + hierarchy. + + nodes: NUMA nodes that are part of this memory tier. + diff --git a/Documentation/ABI/testing/sysfs-platform-asus-wmi b/Documentation/ABI/testing/sysfs-platform-asus-wmi index 04885738cf15..a77a004a1baa 100644 --- a/Documentation/ABI/testing/sysfs-platform-asus-wmi +++ b/Documentation/ABI/testing/sysfs-platform-asus-wmi @@ -57,3 +57,44 @@ Description: * 0 - default, * 1 - overboost, * 2 - silent + +What: /sys/devices/platform/<platform>/gpu_mux_mode +Date: Aug 2022 +KernelVersion: 6.1 +Contact: "Luke Jones" <luke@ljones.dev> +Description: + Switch the GPU hardware MUX mode. Laptops with this feature can + can be toggled to boot with only the dGPU (discrete mode) or in + standard Optimus/Hybrid mode. On switch a reboot is required: + + * 0 - Discrete GPU, + * 1 - Optimus/Hybrid, + +What: /sys/devices/platform/<platform>/dgpu_disable +Date: Aug 2022 +KernelVersion: 5.17 +Contact: "Luke Jones" <luke@ljones.dev> +Description: + Disable discrete GPU: + * 0 - Enable dGPU, + * 1 - Disable dGPU + +What: /sys/devices/platform/<platform>/egpu_enable +Date: Aug 2022 +KernelVersion: 5.17 +Contact: "Luke Jones" <luke@ljones.dev> +Description: + Enable the external GPU paired with ROG X-Flow laptops. + Toggling this setting will also trigger ACPI to disable the dGPU: + + * 0 - Disable, + * 1 - Enable + +What: /sys/devices/platform/<platform>/panel_od +Date: Aug 2022 +KernelVersion: 5.17 +Contact: "Luke Jones" <luke@ljones.dev> +Description: + Enable an LCD response-time boost to reduce or remove ghosting: + * 0 - Disable, + * 1 - Enable diff --git a/Documentation/ABI/testing/sysfs-platform-brcmstb-memc b/Documentation/ABI/testing/sysfs-platform-brcmstb-memc new file mode 100644 index 000000000000..2f2b750ac2fd --- /dev/null +++ b/Documentation/ABI/testing/sysfs-platform-brcmstb-memc @@ -0,0 +1,15 @@ +What: /sys/bus/platform/devices/*/srpd +Date: July 2022 +KernelVersion: 5.21 +Contact: Florian Fainelli <f.fainelli@gmail.com> +Description: + Self Refresh Power Down (SRPD) inactivity timeout counted in + internal DDR controller clock cycles. Possible values range + from 0 (disable inactivity timeout) to 65535 (0xffff). + +What: /sys/bus/platform/devices/*/frequency +Date: July 2022 +KernelVersion: 5.21 +Contact: Florian Fainelli <f.fainelli@gmail.com> +Description: + DDR PHY frequency in Hz. diff --git a/Documentation/ABI/testing/sysfs-platform-chipidea-usb2 b/Documentation/ABI/testing/sysfs-platform-chipidea-usb2 index b0f4684a83fe..b9f7d924f28a 100644 --- a/Documentation/ABI/testing/sysfs-platform-chipidea-usb2 +++ b/Documentation/ABI/testing/sysfs-platform-chipidea-usb2 @@ -2,8 +2,8 @@ What: /sys/bus/platform/devices/ci_hdrc.0/role Date: Mar 2017 Contact: Peter Chen <peter.chen@nxp.com> Description: - It returns string "gadget" or "host" when read it, it indicates - current controller role. + When read, it returns string "gadget" or "host", indicating + the current controller role. - It will do role switch when write "gadget" or "host" to it. + It will do role switch when "gadget" or "host" is written to it. Only controller at dual-role configuration supports writing. diff --git a/Documentation/ABI/testing/sysfs-power b/Documentation/ABI/testing/sysfs-power index 90ec4987074b..f99d433ff311 100644 --- a/Documentation/ABI/testing/sysfs-power +++ b/Documentation/ABI/testing/sysfs-power @@ -152,7 +152,7 @@ Description: case further investigation is required to determine which device is causing the problem. Note that genuine RTC clock values (such as when pm_trace has not been used), can still - match a device and output it's name here. + match a device and output its name here. What: /sys/power/pm_async Date: January 2009 diff --git a/Documentation/RCU/checklist.rst b/Documentation/RCU/checklist.rst index 42cc5d891bd2..048c5bc1f813 100644 --- a/Documentation/RCU/checklist.rst +++ b/Documentation/RCU/checklist.rst @@ -66,8 +66,13 @@ over a rather long period of time, but improvements are always welcome! As a rough rule of thumb, any dereference of an RCU-protected pointer must be covered by rcu_read_lock(), rcu_read_lock_bh(), rcu_read_lock_sched(), or by the appropriate update-side lock. - Disabling of preemption can serve as rcu_read_lock_sched(), but - is less readable and prevents lockdep from detecting locking issues. + Explicit disabling of preemption (preempt_disable(), for example) + can serve as rcu_read_lock_sched(), but is less readable and + prevents lockdep from detecting locking issues. + + Please not that you *cannot* rely on code known to be built + only in non-preemptible kernels. Such code can and will break, + especially in kernels built with CONFIG_PREEMPT_COUNT=y. Letting RCU-protected pointers "leak" out of an RCU read-side critical section is every bit as bad as letting them leak out @@ -185,6 +190,9 @@ over a rather long period of time, but improvements are always welcome! 5. If call_rcu() or call_srcu() is used, the callback function will be called from softirq context. In particular, it cannot block. + If you need the callback to block, run that code in a workqueue + handler scheduled from the callback. The queue_rcu_work() + function does this for you in the case of call_rcu(). 6. Since synchronize_rcu() can block, it cannot be called from any sort of irq context. The same rule applies @@ -297,7 +305,8 @@ over a rather long period of time, but improvements are always welcome! the machine. d. Periodically invoke synchronize_rcu(), permitting a limited - number of updates per grace period. + number of updates per grace period. Better yet, periodically + invoke rcu_barrier() to wait for all outstanding callbacks. The same cautions apply to call_srcu() and kfree_rcu(). @@ -477,6 +486,6 @@ over a rather long period of time, but improvements are always welcome! So if you need to wait for both an RCU grace period and for all pre-existing call_rcu() callbacks, you will need to execute both rcu_barrier() and synchronize_rcu(), if necessary, using - something like workqueues to to execute them concurrently. + something like workqueues to execute them concurrently. See rcubarrier.rst for more information. diff --git a/Documentation/RCU/lockdep.rst b/Documentation/RCU/lockdep.rst index cc860a0c296b..a94f55991a71 100644 --- a/Documentation/RCU/lockdep.rst +++ b/Documentation/RCU/lockdep.rst @@ -61,7 +61,7 @@ checking of rcu_dereference() primitives: rcu_access_pointer(p): Return the value of the pointer and omit all barriers, but retain the compiler constraints that prevent duplicating - or coalescsing. This is useful when when testing the + or coalescsing. This is useful when testing the value of the pointer itself, for example, against NULL. The rcu_dereference_check() check expression can be any boolean diff --git a/Documentation/RCU/rcu_dereference.rst b/Documentation/RCU/rcu_dereference.rst index 0b418a5b243c..81e828c8313b 100644 --- a/Documentation/RCU/rcu_dereference.rst +++ b/Documentation/RCU/rcu_dereference.rst @@ -128,10 +128,16 @@ Follow these rules to keep your RCU code working properly: This sort of comparison occurs frequently when scanning RCU-protected circular linked lists. - Note that if checks for being within an RCU read-side - critical section are not required and the pointer is never - dereferenced, rcu_access_pointer() should be used in place - of rcu_dereference(). + Note that if the pointer comparison is done outside + of an RCU read-side critical section, and the pointer + is never dereferenced, rcu_access_pointer() should be + used in place of rcu_dereference(). In most cases, + it is best to avoid accidental dereferences by testing + the rcu_access_pointer() return value directly, without + assigning it to a variable. + + Within an RCU read-side critical section, there is little + reason to use rcu_access_pointer(). - The comparison is against a pointer that references memory that was initialized "a long time ago." The reason diff --git a/Documentation/RCU/whatisRCU.rst b/Documentation/RCU/whatisRCU.rst index 77ea260efd12..1c747ac3f2c8 100644 --- a/Documentation/RCU/whatisRCU.rst +++ b/Documentation/RCU/whatisRCU.rst @@ -6,13 +6,15 @@ What is RCU? -- "Read, Copy, Update" Please note that the "What is RCU?" LWN series is an excellent place to start learning about RCU: -| 1. What is RCU, Fundamentally? http://lwn.net/Articles/262464/ -| 2. What is RCU? Part 2: Usage http://lwn.net/Articles/263130/ -| 3. RCU part 3: the RCU API http://lwn.net/Articles/264090/ -| 4. The RCU API, 2010 Edition http://lwn.net/Articles/418853/ -| 2010 Big API Table http://lwn.net/Articles/419086/ -| 5. The RCU API, 2014 Edition http://lwn.net/Articles/609904/ -| 2014 Big API Table http://lwn.net/Articles/609973/ +| 1. What is RCU, Fundamentally? https://lwn.net/Articles/262464/ +| 2. What is RCU? Part 2: Usage https://lwn.net/Articles/263130/ +| 3. RCU part 3: the RCU API https://lwn.net/Articles/264090/ +| 4. The RCU API, 2010 Edition https://lwn.net/Articles/418853/ +| 2010 Big API Table https://lwn.net/Articles/419086/ +| 5. The RCU API, 2014 Edition https://lwn.net/Articles/609904/ +| 2014 Big API Table https://lwn.net/Articles/609973/ +| 6. The RCU API, 2019 Edition https://lwn.net/Articles/777036/ +| 2019 Big API Table https://lwn.net/Articles/777165/ What is RCU? @@ -915,13 +917,18 @@ which an RCU reference is held include: The understanding that RCU provides a reference that only prevents a change of type is particularly visible with objects allocated from a slab cache marked ``SLAB_TYPESAFE_BY_RCU``. RCU operations may yield a -reference to an object from such a cache that has been concurrently -freed and the memory reallocated to a completely different object, -though of the same type. In this case RCU doesn't even protect the -identity of the object from changing, only its type. So the object -found may not be the one expected, but it will be one where it is safe -to take a reference or spinlock and then confirm that the identity -matches the expectations. +reference to an object from such a cache that has been concurrently freed +and the memory reallocated to a completely different object, though of +the same type. In this case RCU doesn't even protect the identity of the +object from changing, only its type. So the object found may not be the +one expected, but it will be one where it is safe to take a reference +(and then potentially acquiring a spinlock), allowing subsequent code +to check whether the identity matches expectations. It is tempting +to simply acquire the spinlock without first taking the reference, but +unfortunately any spinlock in a ``SLAB_TYPESAFE_BY_RCU`` object must be +initialized after each and every call to kmem_cache_alloc(), which renders +reference-free spinlock acquisition completely unsafe. Therefore, when +using ``SLAB_TYPESAFE_BY_RCU``, make proper use of a reference counter. With traditional reference counting -- such as that implemented by the kref library in Linux -- there is typically code that runs when the last @@ -1057,14 +1064,20 @@ SRCU: Initialization/cleanup:: init_srcu_struct cleanup_srcu_struct -All: lockdep-checked RCU-protected pointer access:: +All: lockdep-checked RCU utility APIs:: - rcu_access_pointer - rcu_dereference_raw RCU_LOCKDEP_WARN rcu_sleep_check RCU_NONIDLE +All: Unchecked RCU-protected pointer access:: + + rcu_dereference_raw + +All: Unchecked RCU-protected pointer access with dereferencing prohibited:: + + rcu_access_pointer + See the comment headers in the source code (or the docbook generated from them) for more information. diff --git a/Documentation/accounting/delay-accounting.rst b/Documentation/accounting/delay-accounting.rst index 241d1a87f2cd..7103b62ba6d7 100644 --- a/Documentation/accounting/delay-accounting.rst +++ b/Documentation/accounting/delay-accounting.rst @@ -13,7 +13,7 @@ a) waiting for a CPU (while being runnable) b) completion of synchronous block I/O initiated by the task c) swapping in pages d) memory reclaim -e) thrashing page cache +e) thrashing f) direct compact g) write-protect copy diff --git a/Documentation/admin-guide/README.rst b/Documentation/admin-guide/README.rst index 9eb6b9042f75..9a969c0157f1 100644 --- a/Documentation/admin-guide/README.rst +++ b/Documentation/admin-guide/README.rst @@ -262,8 +262,6 @@ Compiling the kernel - Make sure you have at least gcc 5.1 available. For more information, refer to :ref:`Documentation/process/changes.rst <changes>`. - Please note that you can still run a.out user programs with this kernel. - - Do a ``make`` to create a compressed kernel image. It is also possible to do ``make install`` if you have lilo installed to suit the kernel makefiles, but you may want to check your particular lilo setup first. @@ -332,85 +330,10 @@ Compiling the kernel If something goes wrong ----------------------- - - If you have problems that seem to be due to kernel bugs, please check - the file MAINTAINERS to see if there is a particular person associated - with the part of the kernel that you are having trouble with. If there - isn't anyone listed there, then the second best thing is to mail - them to me (torvalds@linux-foundation.org), and possibly to any other - relevant mailing-list or to the newsgroup. - - - In all bug-reports, *please* tell what kernel you are talking about, - how to duplicate the problem, and what your setup is (use your common - sense). If the problem is new, tell me so, and if the problem is - old, please try to tell me when you first noticed it. - - - If the bug results in a message like:: - - unable to handle kernel paging request at address C0000010 - Oops: 0002 - EIP: 0010:XXXXXXXX - eax: xxxxxxxx ebx: xxxxxxxx ecx: xxxxxxxx edx: xxxxxxxx - esi: xxxxxxxx edi: xxxxxxxx ebp: xxxxxxxx - ds: xxxx es: xxxx fs: xxxx gs: xxxx - Pid: xx, process nr: xx - xx xx xx xx xx xx xx xx xx xx - - or similar kernel debugging information on your screen or in your - system log, please duplicate it *exactly*. The dump may look - incomprehensible to you, but it does contain information that may - help debugging the problem. The text above the dump is also - important: it tells something about why the kernel dumped code (in - the above example, it's due to a bad kernel pointer). More information - on making sense of the dump is in Documentation/admin-guide/bug-hunting.rst - - - If you compiled the kernel with CONFIG_KALLSYMS you can send the dump - as is, otherwise you will have to use the ``ksymoops`` program to make - sense of the dump (but compiling with CONFIG_KALLSYMS is usually preferred). - This utility can be downloaded from - https://www.kernel.org/pub/linux/utils/kernel/ksymoops/ . - Alternatively, you can do the dump lookup by hand: - - - In debugging dumps like the above, it helps enormously if you can - look up what the EIP value means. The hex value as such doesn't help - me or anybody else very much: it will depend on your particular - kernel setup. What you should do is take the hex value from the EIP - line (ignore the ``0010:``), and look it up in the kernel namelist to - see which kernel function contains the offending address. - - To find out the kernel function name, you'll need to find the system - binary associated with the kernel that exhibited the symptom. This is - the file 'linux/vmlinux'. To extract the namelist and match it against - the EIP from the kernel crash, do:: - - nm vmlinux | sort | less - - This will give you a list of kernel addresses sorted in ascending - order, from which it is simple to find the function that contains the - offending address. Note that the address given by the kernel - debugging messages will not necessarily match exactly with the - function addresses (in fact, that is very unlikely), so you can't - just 'grep' the list: the list will, however, give you the starting - point of each kernel function, so by looking for the function that - has a starting address lower than the one you are searching for but - is followed by a function with a higher address you will find the one - you want. In fact, it may be a good idea to include a bit of - "context" in your problem report, giving a few lines around the - interesting one. - - If you for some reason cannot do the above (you have a pre-compiled - kernel image or similar), telling me as much about your setup as - possible will help. Please read - 'Documentation/admin-guide/reporting-issues.rst' for details. - - - Alternatively, you can use gdb on a running kernel. (read-only; i.e. you - cannot change values or set break points.) To do this, first compile the - kernel with -g; edit arch/x86/Makefile appropriately, then do a ``make - clean``. You'll also need to enable CONFIG_PROC_FS (via ``make config``). - - After you've rebooted with the new kernel, do ``gdb vmlinux /proc/kcore``. - You can now use all the usual gdb commands. The command to look up the - point where your system crashed is ``l *0xXXXXXXXX``. (Replace the XXXes - with the EIP value.) - - gdb'ing a non-running kernel currently fails because ``gdb`` (wrongly) - disregards the starting offset for which the kernel is compiled. +If you have problems that seem to be due to kernel bugs, please follow the +instructions at 'Documentation/admin-guide/reporting-issues.rst'. + +Hints on understanding kernel bug reports are in +'Documentation/admin-guide/bug-hunting.rst'. More on debugging the kernel +with gdb is in 'Documentation/dev-tools/gdb-kernel-debugging.rst' and +'Documentation/dev-tools/kgdb.rst'. diff --git a/Documentation/admin-guide/acpi/dsdt-override.rst b/Documentation/admin-guide/acpi/dsdt-override.rst deleted file mode 100644 index 50bd7f194bf4..000000000000 --- a/Documentation/admin-guide/acpi/dsdt-override.rst +++ /dev/null @@ -1,13 +0,0 @@ -.. SPDX-License-Identifier: GPL-2.0 - -=============== -Overriding DSDT -=============== - -Linux supports a method of overriding the BIOS DSDT: - -CONFIG_ACPI_CUSTOM_DSDT - builds the image into the kernel. - -When to use this method is described in detail on the -Linux/ACPI home page: -https://01.org/linux-acpi/documentation/overriding-dsdt diff --git a/Documentation/admin-guide/cgroup-v1/memory.rst b/Documentation/admin-guide/cgroup-v1/memory.rst index 2cc502a75ef6..5b86245450bd 100644 --- a/Documentation/admin-guide/cgroup-v1/memory.rst +++ b/Documentation/admin-guide/cgroup-v1/memory.rst @@ -299,7 +299,7 @@ Per-node-per-memcgroup LRU (cgroup's private LRU) is guarded by lruvec->lru_lock; PG_lru bit of page->flags is cleared before isolating a page from its LRU under lruvec->lru_lock. -2.7 Kernel Memory Extension (CONFIG_MEMCG_KMEM) +2.7 Kernel Memory Extension ----------------------------------------------- With the Kernel memory extension, the Memory Controller is able to limit @@ -386,8 +386,6 @@ U != 0, K >= U: a. Enable CONFIG_CGROUPS b. Enable CONFIG_MEMCG -c. Enable CONFIG_MEMCG_SWAP (to use swap extension) -d. Enable CONFIG_MEMCG_KMEM (to use kmem extension) 3.1. Prepare the cgroups (see cgroups.txt, Why are cgroups needed?) ------------------------------------------------------------------- diff --git a/Documentation/admin-guide/cgroup-v2.rst b/Documentation/admin-guide/cgroup-v2.rst index be4a77baf784..7bcfb38498c6 100644 --- a/Documentation/admin-guide/cgroup-v2.rst +++ b/Documentation/admin-guide/cgroup-v2.rst @@ -1355,6 +1355,11 @@ PAGE_SIZE multiple when read back. pagetables Amount of memory allocated for page tables. + sec_pagetables + Amount of memory allocated for secondary page tables, + this currently includes KVM mmu allocations on x86 + and arm64. + percpu (npn) Amount of memory used for storing per-cpu kernel data structures. @@ -2185,75 +2190,93 @@ Cpuset Interface Files It accepts only the following input values when written to. - ======== ================================ - "root" a partition root - "member" a non-root member of a partition - ======== ================================ - - When set to be a partition root, the current cgroup is the - root of a new partition or scheduling domain that comprises - itself and all its descendants except those that are separate - partition roots themselves and their descendants. The root - cgroup is always a partition root. - - There are constraints on where a partition root can be set. - It can only be set in a cgroup if all the following conditions - are true. - - 1) The "cpuset.cpus" is not empty and the list of CPUs are - exclusive, i.e. they are not shared by any of its siblings. - 2) The parent cgroup is a partition root. - 3) The "cpuset.cpus" is also a proper subset of the parent's - "cpuset.cpus.effective". - 4) There is no child cgroups with cpuset enabled. This is for - eliminating corner cases that have to be handled if such a - condition is allowed. - - Setting it to partition root will take the CPUs away from the - effective CPUs of the parent cgroup. Once it is set, this - file cannot be reverted back to "member" if there are any child - cgroups with cpuset enabled. - - A parent partition cannot distribute all its CPUs to its - child partitions. There must be at least one cpu left in the - parent partition. - - Once becoming a partition root, changes to "cpuset.cpus" is - generally allowed as long as the first condition above is true, - the change will not take away all the CPUs from the parent - partition and the new "cpuset.cpus" value is a superset of its - children's "cpuset.cpus" values. - - Sometimes, external factors like changes to ancestors' - "cpuset.cpus" or cpu hotplug can cause the state of the partition - root to change. On read, the "cpuset.sched.partition" file - can show the following values. - - ============== ============================== - "member" Non-root member of a partition - "root" Partition root - "root invalid" Invalid partition root - ============== ============================== - - It is a partition root if the first 2 partition root conditions - above are true and at least one CPU from "cpuset.cpus" is - granted by the parent cgroup. - - A partition root can become invalid if none of CPUs requested - in "cpuset.cpus" can be granted by the parent cgroup or the - parent cgroup is no longer a partition root itself. In this - case, it is not a real partition even though the restriction - of the first partition root condition above will still apply. - The cpu affinity of all the tasks in the cgroup will then be - associated with CPUs in the nearest ancestor partition. - - An invalid partition root can be transitioned back to a - real partition root if at least one of the requested CPUs - can now be granted by its parent. In this case, the cpu - affinity of all the tasks in the formerly invalid partition - will be associated to the CPUs of the newly formed partition. - Changing the partition state of an invalid partition root to - "member" is always allowed even if child cpusets are present. + ========== ===================================== + "member" Non-root member of a partition + "root" Partition root + "isolated" Partition root without load balancing + ========== ===================================== + + The root cgroup is always a partition root and its state + cannot be changed. All other non-root cgroups start out as + "member". + + When set to "root", the current cgroup is the root of a new + partition or scheduling domain that comprises itself and all + its descendants except those that are separate partition roots + themselves and their descendants. + + When set to "isolated", the CPUs in that partition root will + be in an isolated state without any load balancing from the + scheduler. Tasks placed in such a partition with multiple + CPUs should be carefully distributed and bound to each of the + individual CPUs for optimal performance. + + The value shown in "cpuset.cpus.effective" of a partition root + is the CPUs that the partition root can dedicate to a potential + new child partition root. The new child subtracts available + CPUs from its parent "cpuset.cpus.effective". + + A partition root ("root" or "isolated") can be in one of the + two possible states - valid or invalid. An invalid partition + root is in a degraded state where some state information may + be retained, but behaves more like a "member". + + All possible state transitions among "member", "root" and + "isolated" are allowed. + + On read, the "cpuset.cpus.partition" file can show the following + values. + + ============================= ===================================== + "member" Non-root member of a partition + "root" Partition root + "isolated" Partition root without load balancing + "root invalid (<reason>)" Invalid partition root + "isolated invalid (<reason>)" Invalid isolated partition root + ============================= ===================================== + + In the case of an invalid partition root, a descriptive string on + why the partition is invalid is included within parentheses. + + For a partition root to become valid, the following conditions + must be met. + + 1) The "cpuset.cpus" is exclusive with its siblings , i.e. they + are not shared by any of its siblings (exclusivity rule). + 2) The parent cgroup is a valid partition root. + 3) The "cpuset.cpus" is not empty and must contain at least + one of the CPUs from parent's "cpuset.cpus", i.e. they overlap. + 4) The "cpuset.cpus.effective" cannot be empty unless there is + no task associated with this partition. + + External events like hotplug or changes to "cpuset.cpus" can + cause a valid partition root to become invalid and vice versa. + Note that a task cannot be moved to a cgroup with empty + "cpuset.cpus.effective". + + For a valid partition root with the sibling cpu exclusivity + rule enabled, changes made to "cpuset.cpus" that violate the + exclusivity rule will invalidate the partition as well as its + sibiling partitions with conflicting cpuset.cpus values. So + care must be taking in changing "cpuset.cpus". + + A valid non-root parent partition may distribute out all its CPUs + to its child partitions when there is no task associated with it. + + Care must be taken to change a valid partition root to + "member" as all its child partitions, if present, will become + invalid causing disruption to tasks running in those child + partitions. These inactivated partitions could be recovered if + their parent is switched back to a partition root with a proper + set of "cpuset.cpus". + + Poll and inotify events are triggered whenever the state of + "cpuset.cpus.partition" changes. That includes changes caused + by write to "cpuset.cpus.partition", cpu hotplug or other + changes that modify the validity status of the partition. + This will allow user space agents to monitor unexpected changes + to "cpuset.cpus.partition" without the need to do continuous + polling. Device controller diff --git a/Documentation/admin-guide/dynamic-debug-howto.rst b/Documentation/admin-guide/dynamic-debug-howto.rst index a89cfa083155..faa22f77847a 100644 --- a/Documentation/admin-guide/dynamic-debug-howto.rst +++ b/Documentation/admin-guide/dynamic-debug-howto.rst @@ -5,143 +5,115 @@ Dynamic debug Introduction ============ -This document describes how to use the dynamic debug (dyndbg) feature. +Dynamic debug allows you to dynamically enable/disable kernel +debug-print code to obtain additional kernel information. -Dynamic debug is designed to allow you to dynamically enable/disable -kernel code to obtain additional kernel information. Currently, if -``CONFIG_DYNAMIC_DEBUG`` is set, then all ``pr_debug()``/``dev_dbg()`` and -``print_hex_dump_debug()``/``print_hex_dump_bytes()`` calls can be dynamically -enabled per-callsite. +If ``/proc/dynamic_debug/control`` exists, your kernel has dynamic +debug. You'll need root access (sudo su) to use this. -If you do not want to enable dynamic debug globally (i.e. in some embedded -system), you may set ``CONFIG_DYNAMIC_DEBUG_CORE`` as basic support of dynamic -debug and add ``ccflags := -DDYNAMIC_DEBUG_MODULE`` into the Makefile of any -modules which you'd like to dynamically debug later. - -If ``CONFIG_DYNAMIC_DEBUG`` is not set, ``print_hex_dump_debug()`` is just -shortcut for ``print_hex_dump(KERN_DEBUG)``. - -For ``print_hex_dump_debug()``/``print_hex_dump_bytes()``, format string is -its ``prefix_str`` argument, if it is constant string; or ``hexdump`` -in case ``prefix_str`` is built dynamically. +Dynamic debug provides: -Dynamic debug has even more useful features: + * a Catalog of all *prdbgs* in your kernel. + ``cat /proc/dynamic_debug/control`` to see them. - * Simple query language allows turning on and off debugging - statements by matching any combination of 0 or 1 of: + * a Simple query/command language to alter *prdbgs* by selecting on + any combination of 0 or 1 of: - source filename - function name - line number (including ranges of line numbers) - module name - format string - - * Provides a debugfs control file: ``<debugfs>/dynamic_debug/control`` - which can be read to display the complete list of known debug - statements, to help guide you - -Controlling dynamic debug Behaviour -=================================== - -The behaviour of ``pr_debug()``/``dev_dbg()`` are controlled via writing to a -control file in the 'debugfs' filesystem. Thus, you must first mount -the debugfs filesystem, in order to make use of this feature. -Subsequently, we refer to the control file as: -``<debugfs>/dynamic_debug/control``. For example, if you want to enable -printing from source file ``svcsock.c``, line 1603 you simply do:: - - nullarbor:~ # echo 'file svcsock.c line 1603 +p' > - <debugfs>/dynamic_debug/control - -If you make a mistake with the syntax, the write will fail thus:: - - nullarbor:~ # echo 'file svcsock.c wtf 1 +p' > - <debugfs>/dynamic_debug/control - -bash: echo: write error: Invalid argument - -Note, for systems without 'debugfs' enabled, the control file can be -found in ``/proc/dynamic_debug/control``. + - class name (as known/declared by each module) Viewing Dynamic Debug Behaviour =============================== -You can view the currently configured behaviour of all the debug -statements via:: +You can view the currently configured behaviour in the *prdbg* catalog:: - nullarbor:~ # cat <debugfs>/dynamic_debug/control + :#> head -n7 /proc/dynamic_debug/control # filename:lineno [module]function flags format - net/sunrpc/svc_rdma.c:323 [svcxprt_rdma]svc_rdma_cleanup =_ "SVCRDMA Module Removed, deregister RPC RDMA transport\012" - net/sunrpc/svc_rdma.c:341 [svcxprt_rdma]svc_rdma_init =_ "\011max_inline : %d\012" - net/sunrpc/svc_rdma.c:340 [svcxprt_rdma]svc_rdma_init =_ "\011sq_depth : %d\012" - net/sunrpc/svc_rdma.c:338 [svcxprt_rdma]svc_rdma_init =_ "\011max_requests : %d\012" - ... + init/main.c:1179 [main]initcall_blacklist =_ "blacklisting initcall %s\012 + init/main.c:1218 [main]initcall_blacklisted =_ "initcall %s blacklisted\012" + init/main.c:1424 [main]run_init_process =_ " with arguments:\012" + init/main.c:1426 [main]run_init_process =_ " %s\012" + init/main.c:1427 [main]run_init_process =_ " with environment:\012" + init/main.c:1429 [main]run_init_process =_ " %s\012" +The 3rd space-delimited column shows the current flags, preceded by +a ``=`` for easy use with grep/cut. ``=p`` shows enabled callsites. -You can also apply standard Unix text manipulation filters to this -data, e.g.:: +Controlling dynamic debug Behaviour +=================================== - nullarbor:~ # grep -i rdma <debugfs>/dynamic_debug/control | wc -l - 62 +The behaviour of *prdbg* sites are controlled by writing +query/commands to the control file. Example:: - nullarbor:~ # grep -i tcp <debugfs>/dynamic_debug/control | wc -l - 42 + # grease the interface + :#> alias ddcmd='echo $* > /proc/dynamic_debug/control' -The third column shows the currently enabled flags for each debug -statement callsite (see below for definitions of the flags). The -default value, with no flags enabled, is ``=_``. So you can view all -the debug statement callsites with any non-default flags:: + :#> ddcmd '-p; module main func run* +p' + :#> grep =p /proc/dynamic_debug/control + init/main.c:1424 [main]run_init_process =p " with arguments:\012" + init/main.c:1426 [main]run_init_process =p " %s\012" + init/main.c:1427 [main]run_init_process =p " with environment:\012" + init/main.c:1429 [main]run_init_process =p " %s\012" - nullarbor:~ # awk '$3 != "=_"' <debugfs>/dynamic_debug/control - # filename:lineno [module]function flags format - net/sunrpc/svcsock.c:1603 [sunrpc]svc_send p "svc_process: st_sendto returned %d\012" +Error messages go to console/syslog:: + + :#> ddcmd mode foo +p + dyndbg: unknown keyword "mode" + dyndbg: query parse failed + bash: echo: write error: Invalid argument + +If debugfs is also enabled and mounted, ``dynamic_debug/control`` is +also under the mount-dir, typically ``/sys/kernel/debug/``. Command Language Reference ========================== -At the lexical level, a command comprises a sequence of words separated +At the basic lexical level, a command is a sequence of words separated by spaces or tabs. So these are all equivalent:: - nullarbor:~ # echo -n 'file svcsock.c line 1603 +p' > - <debugfs>/dynamic_debug/control - nullarbor:~ # echo -n ' file svcsock.c line 1603 +p ' > - <debugfs>/dynamic_debug/control - nullarbor:~ # echo -n 'file svcsock.c line 1603 +p' > - <debugfs>/dynamic_debug/control + :#> ddcmd file svcsock.c line 1603 +p + :#> ddcmd "file svcsock.c line 1603 +p" + :#> ddcmd ' file svcsock.c line 1603 +p ' Command submissions are bounded by a write() system call. Multiple commands can be written together, separated by ``;`` or ``\n``:: - ~# echo "func pnpacpi_get_resources +p; func pnp_assign_mem +p" \ - > <debugfs>/dynamic_debug/control + :#> ddcmd "func pnpacpi_get_resources +p; func pnp_assign_mem +p" + :#> ddcmd <<"EOC" + func pnpacpi_get_resources +p + func pnp_assign_mem +p + EOC + :#> cat query-batch-file > /proc/dynamic_debug/control -If your query set is big, you can batch them too:: +You can also use wildcards in each query term. The match rule supports +``*`` (matches zero or more characters) and ``?`` (matches exactly one +character). For example, you can match all usb drivers:: - ~# cat query-batch-file > <debugfs>/dynamic_debug/control + :#> ddcmd file "drivers/usb/*" +p # "" to suppress shell expansion -Another way is to use wildcards. The match rule supports ``*`` (matches -zero or more characters) and ``?`` (matches exactly one character). For -example, you can match all usb drivers:: - - ~# echo "file drivers/usb/* +p" > <debugfs>/dynamic_debug/control - -At the syntactical level, a command comprises a sequence of match -specifications, followed by a flags change specification:: +Syntactically, a command is pairs of keyword values, followed by a +flags change or setting:: command ::= match-spec* flags-spec -The match-spec's are used to choose a subset of the known pr_debug() -callsites to which to apply the flags-spec. Think of them as a query -with implicit ANDs between each pair. Note that an empty list of -match-specs will select all debug statement callsites. +The match-spec's select *prdbgs* from the catalog, upon which to apply +the flags-spec, all constraints are ANDed together. An absent keyword +is the same as keyword "*". + -A match specification comprises a keyword, which controls the -attribute of the callsite to be compared, and a value to compare -against. Possible keywords are::: +A match specification is a keyword, which selects the attribute of +the callsite to be compared, and a value to compare against. Possible +keywords are::: match-spec ::= 'func' string | 'file' string | 'module' string | 'format' string | + 'class' string | 'line' line-range line-range ::= lineno | @@ -203,6 +175,16 @@ format format "nfsd: SETATTR" // a neater way to match a format with whitespace format 'nfsd: SETATTR' // yet another way to match a format with whitespace +class + The given class_name is validated against each module, which may + have declared a list of known class_names. If the class_name is + found for a module, callsite & class matching and adjustment + proceeds. Examples:: + + class DRM_UT_KMS # a DRM.debug category + class JUNK # silent non-match + // class TLD_* # NOTICE: no wildcard in class names + line The given line number or range of line numbers is compared against the line number of each ``pr_debug()`` callsite. A single @@ -228,17 +210,16 @@ of the characters:: The flags are:: p enables the pr_debug() callsite. - f Include the function name in the printed message - l Include line number in the printed message - m Include module name in the printed message - t Include thread ID in messages not generated from interrupt context - _ No flags are set. (Or'd with others on input) + _ enables no flags. -For ``print_hex_dump_debug()`` and ``print_hex_dump_bytes()``, only ``p`` flag -have meaning, other flags ignored. + Decorator flags add to the message-prefix, in order: + t Include thread ID, or <intr> + m Include module name + f Include the function name + l Include line number -For display, the flags are preceded by ``=`` -(mnemonic: what the flags are currently equal to). +For ``print_hex_dump_debug()`` and ``print_hex_dump_bytes()``, only +the ``p`` flag has meaning, other flags are ignored. Note the regexp ``^[-+=][flmpt_]+$`` matches a flags specification. To clear all flags at once, use ``=_`` or ``-flmpt``. @@ -313,7 +294,7 @@ For ``CONFIG_DYNAMIC_DEBUG`` kernels, any settings given at boot-time (or enabled by ``-DDEBUG`` flag during compilation) can be disabled later via the debugfs interface if the debug messages are no longer needed:: - echo "module module_name -p" > <debugfs>/dynamic_debug/control + echo "module module_name -p" > /proc/dynamic_debug/control Examples ======== @@ -321,37 +302,31 @@ Examples :: // enable the message at line 1603 of file svcsock.c - nullarbor:~ # echo -n 'file svcsock.c line 1603 +p' > - <debugfs>/dynamic_debug/control + :#> ddcmd 'file svcsock.c line 1603 +p' // enable all the messages in file svcsock.c - nullarbor:~ # echo -n 'file svcsock.c +p' > - <debugfs>/dynamic_debug/control + :#> ddcmd 'file svcsock.c +p' // enable all the messages in the NFS server module - nullarbor:~ # echo -n 'module nfsd +p' > - <debugfs>/dynamic_debug/control + :#> ddcmd 'module nfsd +p' // enable all 12 messages in the function svc_process() - nullarbor:~ # echo -n 'func svc_process +p' > - <debugfs>/dynamic_debug/control + :#> ddcmd 'func svc_process +p' // disable all 12 messages in the function svc_process() - nullarbor:~ # echo -n 'func svc_process -p' > - <debugfs>/dynamic_debug/control + :#> ddcmd 'func svc_process -p' // enable messages for NFS calls READ, READLINK, READDIR and READDIR+. - nullarbor:~ # echo -n 'format "nfsd: READ" +p' > - <debugfs>/dynamic_debug/control + :#> ddcmd 'format "nfsd: READ" +p' // enable messages in files of which the paths include string "usb" - nullarbor:~ # echo -n 'file *usb* +p' > <debugfs>/dynamic_debug/control + :#> ddcmd 'file *usb* +p' > /proc/dynamic_debug/control // enable all messages - nullarbor:~ # echo -n '+p' > <debugfs>/dynamic_debug/control + :#> ddcmd '+p' > /proc/dynamic_debug/control // add module, function to all enabled messages - nullarbor:~ # echo -n '+mf' > <debugfs>/dynamic_debug/control + :#> ddcmd '+mf' > /proc/dynamic_debug/control // boot-args example, with newlines and comments for readability Kernel command line: ... @@ -364,3 +339,38 @@ Examples dyndbg="file init/* +p #cmt ; func parse_one +p" // enable pr_debugs in 2 functions in a module loaded later pc87360.dyndbg="func pc87360_init_device +p; func pc87360_find +p" + +Kernel Configuration +==================== + +Dynamic Debug is enabled via kernel config items:: + + CONFIG_DYNAMIC_DEBUG=y # build catalog, enables CORE + CONFIG_DYNAMIC_DEBUG_CORE=y # enable mechanics only, skip catalog + +If you do not want to enable dynamic debug globally (i.e. in some embedded +system), you may set ``CONFIG_DYNAMIC_DEBUG_CORE`` as basic support of dynamic +debug and add ``ccflags := -DDYNAMIC_DEBUG_MODULE`` into the Makefile of any +modules which you'd like to dynamically debug later. + + +Kernel *prdbg* API +================== + +The following functions are cataloged and controllable when dynamic +debug is enabled:: + + pr_debug() + dev_dbg() + print_hex_dump_debug() + print_hex_dump_bytes() + +Otherwise, they are off by default; ``ccflags += -DDEBUG`` or +``#define DEBUG`` in a source file will enable them appropriately. + +If ``CONFIG_DYNAMIC_DEBUG`` is not set, ``print_hex_dump_debug()`` is +just a shortcut for ``print_hex_dump(KERN_DEBUG)``. + +For ``print_hex_dump_debug()``/``print_hex_dump_bytes()``, format string is +its ``prefix_str`` argument, if it is constant string; or ``hexdump`` +in case ``prefix_str`` is built dynamically. diff --git a/Documentation/admin-guide/hw-vuln/spectre.rst b/Documentation/admin-guide/hw-vuln/spectre.rst index 2ce2a38cdd55..c4dcdb3d0d45 100644 --- a/Documentation/admin-guide/hw-vuln/spectre.rst +++ b/Documentation/admin-guide/hw-vuln/spectre.rst @@ -613,6 +613,7 @@ kernel command line. eibrs enhanced IBRS eibrs,retpoline enhanced IBRS + Retpolines eibrs,lfence enhanced IBRS + LFENCE + ibrs use IBRS to protect kernel Not specifying this option is equivalent to spectre_v2=auto. diff --git a/Documentation/admin-guide/kdump/vmcoreinfo.rst b/Documentation/admin-guide/kdump/vmcoreinfo.rst index 8419019b6a88..6726f439958c 100644 --- a/Documentation/admin-guide/kdump/vmcoreinfo.rst +++ b/Documentation/admin-guide/kdump/vmcoreinfo.rst @@ -200,7 +200,7 @@ prb A pointer to the printk ringbuffer (struct printk_ringbuffer). This may be pointing to the static boot ringbuffer or the dynamically -allocated ringbuffer, depending on when the the core dump occurred. +allocated ringbuffer, depending on when the core dump occurred. Used by user-space tools to read the active kernel log buffer. printk_rb_static diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index 426fa892d311..a465d5242774 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -321,6 +321,8 @@ force_enable - Force enable the IOMMU on platforms known to be buggy with IOMMU enabled. Use this option with care. + pgtbl_v1 - Use v1 page table for DMA-API (Default). + pgtbl_v2 - Use v2 page table for DMA-API. amd_iommu_dump= [HW,X86-64] Enable AMD IOMMU driver option to dump the ACPI table @@ -966,10 +968,6 @@ debugpat [X86] Enable PAT debugging - decnet.addr= [HW,NET] - Format: <area>[,<node>] - See also Documentation/networking/decnet.rst. - default_hugepagesz= [HW] The size of the default HugeTLB page. This is the size represented by the legacy /proc/ hugepages @@ -1471,6 +1469,14 @@ Permit 'security.evm' to be updated regardless of current integrity status. + early_page_ext [KNL] Enforces page_ext initialization to earlier + stages so cover more early boot allocations. + Please note that as side effect some optimizations + might be disabled to achieve that (e.g. parallelized + memory initialization is disabled) so the boot process + might take longer, especially on systems with a lot of + memory. Available with CONFIG_PAGE_EXTENSION=y. + failslab= fail_usercopy= fail_page_alloc= @@ -2436,6 +2442,12 @@ 0: force disabled 1: force enabled + kunit.enable= [KUNIT] Enable executing KUnit tests. Requires + CONFIG_KUNIT to be set to be fully enabled. The + default value can be overridden via + KUNIT_DEFAULT_ENABLED. + Default is 1 (enabled) + kvm.ignore_msrs=[KVM] Ignore guest accesses to unhandled MSRs. Default is 0 (don't ignore, but inject #GP) @@ -3207,6 +3219,7 @@ spectre_v2_user=off [X86] spec_store_bypass_disable=off [X86,PPC] ssbd=force-off [ARM64] + nospectre_bhb [ARM64] l1tf=off [X86] mds=off [X86] tsx_async_abort=off [X86] @@ -3613,7 +3626,7 @@ nohugeiomap [KNL,X86,PPC,ARM64] Disable kernel huge I/O mappings. - nohugevmalloc [PPC] Disable kernel huge vmalloc mappings. + nohugevmalloc [KNL,X86,PPC,ARM64] Disable kernel huge vmalloc mappings. nosmt [KNL,S390] Disable symmetric multithreading (SMT). Equivalent to smt=1. @@ -3626,11 +3639,15 @@ (bounds check bypass). With this option data leaks are possible in the system. - nospectre_v2 [X86,PPC_FSL_BOOK3E,ARM64] Disable all mitigations for + nospectre_v2 [X86,PPC_E500,ARM64] Disable all mitigations for the Spectre variant 2 (indirect branch prediction) vulnerability. System may allow data leaks with this option. + nospectre_bhb [ARM64] Disable all mitigations for Spectre-BHB (branch + history injection) vulnerability. System may allow data leaks + with this option. + nospec_store_bypass_disable [HW] Disable all mitigations for the Speculative Store Bypass vulnerability @@ -3741,9 +3758,9 @@ [X86,PV_OPS] Disable paravirtualized VMware scheduler clock and use the default one. - no-steal-acc [X86,PV_OPS,ARM64] Disable paravirtualized steal time - accounting. steal time is computed, but won't - influence scheduler behaviour + no-steal-acc [X86,PV_OPS,ARM64,PPC/PSERIES] Disable paravirtualized + steal time accounting. steal time is computed, but + won't influence scheduler behaviour nolapic [X86-32,APIC] Do not enable or use the local APIC. @@ -3805,6 +3822,10 @@ nox2apic [X86-64,APIC] Do not enable x2APIC mode. + NOTE: this parameter will be ignored on systems with the + LEGACY_XAPIC_DISABLED bit set in the + IA32_XAPIC_DISABLE_STATUS MSR. + nps_mtm_hs_ctr= [KNL,ARC] This parameter sets the maximum duration, in cycles, each HW thread of the CTOP can run @@ -6028,12 +6049,6 @@ This parameter controls use of the Protected Execution Facility on pSeries. - swapaccount= [KNL] - Format: [0|1] - Enable accounting of swap in memory resource - controller if no parameter or 1 is given or disable - it if 0 is given (See Documentation/admin-guide/cgroup-v1/memory.rst) - swiotlb= [ARM,IA-64,PPC,MIPS,X86] Format: { <int> [,<int>] | force | noforce } <int> -- Number of I/O TLB slabs @@ -6836,6 +6851,12 @@ Crash from Xen panic notifier, without executing late panic() code such as dumping handler. + xen_msr_safe= [X86,XEN] + Format: <bool> + Select whether to always use non-faulting (safe) MSR + access functions when running as Xen PV guest. The + default value is controlled by CONFIG_XEN_PV_MSR_SAFE. + xen_nopvspin [X86,XEN] Disables the qspinlock slowpath using Xen PV optimizations. This parameter is obsoleted by "nopvspin" parameter, which diff --git a/Documentation/admin-guide/mm/cma_debugfs.rst b/Documentation/admin-guide/mm/cma_debugfs.rst index 4e06ffabd78a..7367e6294ef6 100644 --- a/Documentation/admin-guide/mm/cma_debugfs.rst +++ b/Documentation/admin-guide/mm/cma_debugfs.rst @@ -5,10 +5,10 @@ CMA Debugfs Interface The CMA debugfs interface is useful to retrieve basic information out of the different CMA areas and to test allocation/release in each of the areas. -Each CMA zone represents a directory under <debugfs>/cma/, indexed by the -kernel's CMA index. So the first CMA zone would be: +Each CMA area represents a directory under <debugfs>/cma/, represented by +its CMA name like below: - <debugfs>/cma/cma-0 + <debugfs>/cma/<cma_name> The structure of the files created under that directory is as follows: @@ -18,8 +18,8 @@ The structure of the files created under that directory is as follows: - [RO] bitmap: The bitmap of page states in the zone. - [WO] alloc: Allocate N pages from that CMA area. For example:: - echo 5 > <debugfs>/cma/cma-2/alloc + echo 5 > <debugfs>/cma/<cma_name>/alloc -would try to allocate 5 pages from the cma-2 area. +would try to allocate 5 pages from the 'cma_name' area. - [WO] free: Free N pages from that CMA area, similar to the above. diff --git a/Documentation/admin-guide/mm/damon/index.rst b/Documentation/admin-guide/mm/damon/index.rst index 05500042f777..33d37bb2fb4e 100644 --- a/Documentation/admin-guide/mm/damon/index.rst +++ b/Documentation/admin-guide/mm/damon/index.rst @@ -1,8 +1,8 @@ .. SPDX-License-Identifier: GPL-2.0 -======================== -Monitoring Data Accesses -======================== +========================== +DAMON: Data Access MONitor +========================== :doc:`DAMON </mm/damon/index>` allows light-weight data access monitoring. Using DAMON, users can analyze the memory access patterns of their systems and diff --git a/Documentation/admin-guide/mm/damon/start.rst b/Documentation/admin-guide/mm/damon/start.rst index 4d5ca2c46288..9f88afc734da 100644 --- a/Documentation/admin-guide/mm/damon/start.rst +++ b/Documentation/admin-guide/mm/damon/start.rst @@ -29,16 +29,9 @@ called DAMON Operator (DAMO). It is available at https://github.com/awslabs/damo. The examples below assume that ``damo`` is on your ``$PATH``. It's not mandatory, though. -Because DAMO is using the debugfs interface (refer to :doc:`usage` for the -detail) of DAMON, you should ensure debugfs is mounted. Mount it manually as -below:: - - # mount -t debugfs none /sys/kernel/debug/ - -or append the following line to your ``/etc/fstab`` file so that your system -can automatically mount debugfs upon booting:: - - debugfs /sys/kernel/debug debugfs defaults 0 0 +Because DAMO is using the sysfs interface (refer to :doc:`usage` for the +detail) of DAMON, you should ensure :doc:`sysfs </filesystems/sysfs>` is +mounted. Recording Data Access Patterns diff --git a/Documentation/admin-guide/mm/damon/usage.rst b/Documentation/admin-guide/mm/damon/usage.rst index ca91ecc29078..b47b0cbbd491 100644 --- a/Documentation/admin-guide/mm/damon/usage.rst +++ b/Documentation/admin-guide/mm/damon/usage.rst @@ -393,6 +393,11 @@ the files as above. Above is only for an example. debugfs Interface ================= +.. note:: + + DAMON debugfs interface will be removed after next LTS kernel is released, so + users should move to the :ref:`sysfs interface <sysfs_interface>`. + DAMON exports eight files, ``attrs``, ``target_ids``, ``init_regions``, ``schemes``, ``monitor_on``, ``kdamond_pid``, ``mk_contexts`` and ``rm_contexts`` under its debugfs directory, ``<debugfs>/damon/``. diff --git a/Documentation/admin-guide/mm/hugetlbpage.rst b/Documentation/admin-guide/mm/hugetlbpage.rst index 8e2727dc18d4..19f27c0d92e0 100644 --- a/Documentation/admin-guide/mm/hugetlbpage.rst +++ b/Documentation/admin-guide/mm/hugetlbpage.rst @@ -65,7 +65,7 @@ HugePages_Surp may be temporarily larger than the maximum number of surplus huge pages when the system is under memory pressure. Hugepagesize - is the default hugepage size (in Kb). + is the default hugepage size (in kB). Hugetlb is the total amount of memory (in kB), consumed by huge pages of all sizes. diff --git a/Documentation/admin-guide/mm/index.rst b/Documentation/admin-guide/mm/index.rst index 1bd11118dfb1..d1064e0ba34a 100644 --- a/Documentation/admin-guide/mm/index.rst +++ b/Documentation/admin-guide/mm/index.rst @@ -32,6 +32,7 @@ the Linux memory management. idle_page_tracking ksm memory-hotplug + multigen_lru nommu-mmap numa_memory_policy numaperf diff --git a/Documentation/admin-guide/mm/ksm.rst b/Documentation/admin-guide/mm/ksm.rst index b244f0202a03..fb6ba2002a4b 100644 --- a/Documentation/admin-guide/mm/ksm.rst +++ b/Documentation/admin-guide/mm/ksm.rst @@ -184,6 +184,42 @@ The maximum possible ``pages_sharing/pages_shared`` ratio is limited by the ``max_page_sharing`` tunable. To increase the ratio ``max_page_sharing`` must be increased accordingly. +Monitoring KSM profit +===================== + +KSM can save memory by merging identical pages, but also can consume +additional memory, because it needs to generate a number of rmap_items to +save each scanned page's brief rmap information. Some of these pages may +be merged, but some may not be abled to be merged after being checked +several times, which are unprofitable memory consumed. + +1) How to determine whether KSM save memory or consume memory in system-wide + range? Here is a simple approximate calculation for reference:: + + general_profit =~ pages_sharing * sizeof(page) - (all_rmap_items) * + sizeof(rmap_item); + + where all_rmap_items can be easily obtained by summing ``pages_sharing``, + ``pages_shared``, ``pages_unshared`` and ``pages_volatile``. + +2) The KSM profit inner a single process can be similarly obtained by the + following approximate calculation:: + + process_profit =~ ksm_merging_pages * sizeof(page) - + ksm_rmap_items * sizeof(rmap_item). + + where ksm_merging_pages is shown under the directory ``/proc/<pid>/``, + and ksm_rmap_items is shown in ``/proc/<pid>/ksm_stat``. + +From the perspective of application, a high ratio of ``ksm_rmap_items`` to +``ksm_merging_pages`` means a bad madvise-applied policy, so developers or +administrators have to rethink how to change madvise policy. Giving an example +for reference, a page's size is usually 4K, and the rmap_item's size is +separately 32B on 32-bit CPU architecture and 64B on 64-bit CPU architecture. +so if the ``ksm_rmap_items/ksm_merging_pages`` ratio exceeds 64 on 64-bit CPU +or exceeds 128 on 32-bit CPU, then the app's madvise policy should be dropped, +because the ksm profit is approximately zero or negative. + Monitoring KSM events ===================== diff --git a/Documentation/admin-guide/mm/multigen_lru.rst b/Documentation/admin-guide/mm/multigen_lru.rst new file mode 100644 index 000000000000..33e068830497 --- /dev/null +++ b/Documentation/admin-guide/mm/multigen_lru.rst @@ -0,0 +1,162 @@ +.. SPDX-License-Identifier: GPL-2.0 + +============= +Multi-Gen LRU +============= +The multi-gen LRU is an alternative LRU implementation that optimizes +page reclaim and improves performance under memory pressure. Page +reclaim decides the kernel's caching policy and ability to overcommit +memory. It directly impacts the kswapd CPU usage and RAM efficiency. + +Quick start +=========== +Build the kernel with the following configurations. + +* ``CONFIG_LRU_GEN=y`` +* ``CONFIG_LRU_GEN_ENABLED=y`` + +All set! + +Runtime options +=============== +``/sys/kernel/mm/lru_gen/`` contains stable ABIs described in the +following subsections. + +Kill switch +----------- +``enabled`` accepts different values to enable or disable the +following components. Its default value depends on +``CONFIG_LRU_GEN_ENABLED``. All the components should be enabled +unless some of them have unforeseen side effects. Writing to +``enabled`` has no effect when a component is not supported by the +hardware, and valid values will be accepted even when the main switch +is off. + +====== =============================================================== +Values Components +====== =============================================================== +0x0001 The main switch for the multi-gen LRU. +0x0002 Clearing the accessed bit in leaf page table entries in large + batches, when MMU sets it (e.g., on x86). This behavior can + theoretically worsen lock contention (mmap_lock). If it is + disabled, the multi-gen LRU will suffer a minor performance + degradation for workloads that contiguously map hot pages, + whose accessed bits can be otherwise cleared by fewer larger + batches. +0x0004 Clearing the accessed bit in non-leaf page table entries as + well, when MMU sets it (e.g., on x86). This behavior was not + verified on x86 varieties other than Intel and AMD. If it is + disabled, the multi-gen LRU will suffer a negligible + performance degradation. +[yYnN] Apply to all the components above. +====== =============================================================== + +E.g., +:: + + echo y >/sys/kernel/mm/lru_gen/enabled + cat /sys/kernel/mm/lru_gen/enabled + 0x0007 + echo 5 >/sys/kernel/mm/lru_gen/enabled + cat /sys/kernel/mm/lru_gen/enabled + 0x0005 + +Thrashing prevention +-------------------- +Personal computers are more sensitive to thrashing because it can +cause janks (lags when rendering UI) and negatively impact user +experience. The multi-gen LRU offers thrashing prevention to the +majority of laptop and desktop users who do not have ``oomd``. + +Users can write ``N`` to ``min_ttl_ms`` to prevent the working set of +``N`` milliseconds from getting evicted. The OOM killer is triggered +if this working set cannot be kept in memory. In other words, this +option works as an adjustable pressure relief valve, and when open, it +terminates applications that are hopefully not being used. + +Based on the average human detectable lag (~100ms), ``N=1000`` usually +eliminates intolerable janks due to thrashing. Larger values like +``N=3000`` make janks less noticeable at the risk of premature OOM +kills. + +The default value ``0`` means disabled. + +Experimental features +===================== +``/sys/kernel/debug/lru_gen`` accepts commands described in the +following subsections. Multiple command lines are supported, so does +concatenation with delimiters ``,`` and ``;``. + +``/sys/kernel/debug/lru_gen_full`` provides additional stats for +debugging. ``CONFIG_LRU_GEN_STATS=y`` keeps historical stats from +evicted generations in this file. + +Working set estimation +---------------------- +Working set estimation measures how much memory an application needs +in a given time interval, and it is usually done with little impact on +the performance of the application. E.g., data centers want to +optimize job scheduling (bin packing) to improve memory utilizations. +When a new job comes in, the job scheduler needs to find out whether +each server it manages can allocate a certain amount of memory for +this new job before it can pick a candidate. To do so, the job +scheduler needs to estimate the working sets of the existing jobs. + +When it is read, ``lru_gen`` returns a histogram of numbers of pages +accessed over different time intervals for each memcg and node. +``MAX_NR_GENS`` decides the number of bins for each histogram. The +histograms are noncumulative. +:: + + memcg memcg_id memcg_path + node node_id + min_gen_nr age_in_ms nr_anon_pages nr_file_pages + ... + max_gen_nr age_in_ms nr_anon_pages nr_file_pages + +Each bin contains an estimated number of pages that have been accessed +within ``age_in_ms``. E.g., ``min_gen_nr`` contains the coldest pages +and ``max_gen_nr`` contains the hottest pages, since ``age_in_ms`` of +the former is the largest and that of the latter is the smallest. + +Users can write the following command to ``lru_gen`` to create a new +generation ``max_gen_nr+1``: + + ``+ memcg_id node_id max_gen_nr [can_swap [force_scan]]`` + +``can_swap`` defaults to the swap setting and, if it is set to ``1``, +it forces the scan of anon pages when swap is off, and vice versa. +``force_scan`` defaults to ``1`` and, if it is set to ``0``, it +employs heuristics to reduce the overhead, which is likely to reduce +the coverage as well. + +A typical use case is that a job scheduler runs this command at a +certain time interval to create new generations, and it ranks the +servers it manages based on the sizes of their cold pages defined by +this time interval. + +Proactive reclaim +----------------- +Proactive reclaim induces page reclaim when there is no memory +pressure. It usually targets cold pages only. E.g., when a new job +comes in, the job scheduler wants to proactively reclaim cold pages on +the server it selected, to improve the chance of successfully landing +this new job. + +Users can write the following command to ``lru_gen`` to evict +generations less than or equal to ``min_gen_nr``. + + ``- memcg_id node_id min_gen_nr [swappiness [nr_to_reclaim]]`` + +``min_gen_nr`` should be less than ``max_gen_nr-1``, since +``max_gen_nr`` and ``max_gen_nr-1`` are not fully aged (equivalent to +the active list) and therefore cannot be evicted. ``swappiness`` +overrides the default value in ``/proc/sys/vm/swappiness``. +``nr_to_reclaim`` limits the number of pages to evict. + +A typical use case is that a job scheduler runs this command before it +tries to land a new job on a server. If it fails to materialize enough +cold pages because of the overestimation, it retries on the next +server according to the ranking result obtained from the working set +estimation step. This less forceful approach limits the impacts on the +existing jobs. diff --git a/Documentation/admin-guide/mm/transhuge.rst b/Documentation/admin-guide/mm/transhuge.rst index c9c37f16eef8..8ee78ec232eb 100644 --- a/Documentation/admin-guide/mm/transhuge.rst +++ b/Documentation/admin-guide/mm/transhuge.rst @@ -191,7 +191,14 @@ allocation failure to throttle the next allocation attempt:: /sys/kernel/mm/transparent_hugepage/khugepaged/alloc_sleep_millisecs -The khugepaged progress can be seen in the number of pages collapsed:: +The khugepaged progress can be seen in the number of pages collapsed (note +that this counter may not be an exact count of the number of pages +collapsed, since "collapsed" could mean multiple things: (1) A PTE mapping +being replaced by a PMD mapping, or (2) All 4K physical pages replaced by +one 2M hugepage. Each may happen independently, or together, depending on +the type of memory and the failures that occur. As such, this value should +be interpreted roughly as a sign of progress, and counters in /proc/vmstat +consulted for more accurate accounting):: /sys/kernel/mm/transparent_hugepage/khugepaged/pages_collapsed @@ -366,10 +373,9 @@ thp_split_pmd page table entry. thp_zero_page_alloc - is incremented every time a huge zero page is - successfully allocated. It includes allocations which where - dropped due race with other allocation. Note, it doesn't count - every map of the huge zero page, only its allocation. + is incremented every time a huge zero page used for thp is + successfully allocated. Note, it doesn't count every map of + the huge zero page, only its allocation. thp_zero_page_alloc_failed is incremented if kernel fails to allocate diff --git a/Documentation/admin-guide/mm/userfaultfd.rst b/Documentation/admin-guide/mm/userfaultfd.rst index 6528036093e1..83f31919ebb3 100644 --- a/Documentation/admin-guide/mm/userfaultfd.rst +++ b/Documentation/admin-guide/mm/userfaultfd.rst @@ -17,7 +17,10 @@ of the ``PROT_NONE+SIGSEGV`` trick. Design ====== -Userfaults are delivered and resolved through the ``userfaultfd`` syscall. +Userspace creates a new userfaultfd, initializes it, and registers one or more +regions of virtual memory with it. Then, any page faults which occur within the +region(s) result in a message being delivered to the userfaultfd, notifying +userspace of the fault. The ``userfaultfd`` (aside from registering and unregistering virtual memory ranges) provides two primary functionalities: @@ -34,12 +37,11 @@ The real advantage of userfaults if compared to regular virtual memory management of mremap/mprotect is that the userfaults in all their operations never involve heavyweight structures like vmas (in fact the ``userfaultfd`` runtime load never takes the mmap_lock for writing). - Vmas are not suitable for page- (or hugepage) granular fault tracking when dealing with virtual address spaces that could span Terabytes. Too many vmas would be needed for that. -The ``userfaultfd`` once opened by invoking the syscall, can also be +The ``userfaultfd``, once created, can also be passed using unix domain sockets to a manager process, so the same manager process could handle the userfaults of a multitude of different processes without them being aware about what is going on @@ -50,6 +52,39 @@ is a corner case that would currently return ``-EBUSY``). API === +Creating a userfaultfd +---------------------- + +There are two ways to create a new userfaultfd, each of which provide ways to +restrict access to this functionality (since historically userfaultfds which +handle kernel page faults have been a useful tool for exploiting the kernel). + +The first way, supported since userfaultfd was introduced, is the +userfaultfd(2) syscall. Access to this is controlled in several ways: + +- Any user can always create a userfaultfd which traps userspace page faults + only. Such a userfaultfd can be created using the userfaultfd(2) syscall + with the flag UFFD_USER_MODE_ONLY. + +- In order to also trap kernel page faults for the address space, either the + process needs the CAP_SYS_PTRACE capability, or the system must have + vm.unprivileged_userfaultfd set to 1. By default, vm.unprivileged_userfaultfd + is set to 0. + +The second way, added to the kernel more recently, is by opening +/dev/userfaultfd and issuing a USERFAULTFD_IOC_NEW ioctl to it. This method +yields equivalent userfaultfds to the userfaultfd(2) syscall. + +Unlike userfaultfd(2), access to /dev/userfaultfd is controlled via normal +filesystem permissions (user/group/mode), which gives fine grained access to +userfaultfd specifically, without also granting other unrelated privileges at +the same time (as e.g. granting CAP_SYS_PTRACE would do). Users who have access +to /dev/userfaultfd can always create userfaultfds that trap kernel page faults; +vm.unprivileged_userfaultfd is not considered. + +Initializing a userfaultfd +-------------------------- + When first opened the ``userfaultfd`` must be enabled invoking the ``UFFDIO_API`` ioctl specifying a ``uffdio_api.api`` value set to ``UFFD_API`` (or a later API version) which will specify the ``read/POLLIN`` protocol diff --git a/Documentation/admin-guide/perf/alibaba_pmu.rst b/Documentation/admin-guide/perf/alibaba_pmu.rst new file mode 100644 index 000000000000..11de998bb480 --- /dev/null +++ b/Documentation/admin-guide/perf/alibaba_pmu.rst @@ -0,0 +1,100 @@ +============================================================= +Alibaba's T-Head SoC Uncore Performance Monitoring Unit (PMU) +============================================================= + +The Yitian 710, custom-built by Alibaba Group's chip development business, +T-Head, implements uncore PMU for performance and functional debugging to +facilitate system maintenance. + +DDR Sub-System Driveway (DRW) PMU Driver +========================================= + +Yitian 710 employs eight DDR5/4 channels, four on each die. Each DDR5 channel +is independent of others to service system memory requests. And one DDR5 +channel is split into two independent sub-channels. The DDR Sub-System Driveway +implements separate PMUs for each sub-channel to monitor various performance +metrics. + +The Driveway PMU devices are named as ali_drw_<sys_base_addr> with perf. +For example, ali_drw_21000 and ali_drw_21080 are two PMU devices for two +sub-channels of the same channel in die 0. And the PMU device of die 1 is +prefixed with ali_drw_400XXXXX, e.g. ali_drw_40021000. + +Each sub-channel has 36 PMU counters in total, which is classified into +four groups: + +- Group 0: PMU Cycle Counter. This group has one pair of counters + pmu_cycle_cnt_low and pmu_cycle_cnt_high, that is used as the cycle count + based on DDRC core clock. + +- Group 1: PMU Bandwidth Counters. This group has 8 counters that are used + to count the total access number of either the eight bank groups in a + selected rank, or four ranks separately in the first 4 counters. The base + transfer unit is 64B. + +- Group 2: PMU Retry Counters. This group has 10 counters, that intend to + count the total retry number of each type of uncorrectable error. + +- Group 3: PMU Common Counters. This group has 16 counters, that are used + to count the common events. + +For now, the Driveway PMU driver only uses counters in group 0 and group 3. + +The DDR Controller (DDRCTL) and DDR PHY combine to create a complete solution +for connecting an SoC application bus to DDR memory devices. The DDRCTL +receives transactions Host Interface (HIF) which is custom-defined by Synopsys. +These transactions are queued internally and scheduled for access while +satisfying the SDRAM protocol timing requirements, transaction priorities, and +dependencies between the transactions. The DDRCTL in turn issues commands on +the DDR PHY Interface (DFI) to the PHY module, which launches and captures data +to and from the SDRAM. The driveway PMUs have hardware logic to gather +statistics and performance logging signals on HIF, DFI, etc. + +By counting the READ, WRITE and RMW commands sent to the DDRC through the HIF +interface, we could calculate the bandwidth. Example usage of counting memory +data bandwidth:: + + perf stat \ + -e ali_drw_21000/hif_wr/ \ + -e ali_drw_21000/hif_rd/ \ + -e ali_drw_21000/hif_rmw/ \ + -e ali_drw_21000/cycle/ \ + -e ali_drw_21080/hif_wr/ \ + -e ali_drw_21080/hif_rd/ \ + -e ali_drw_21080/hif_rmw/ \ + -e ali_drw_21080/cycle/ \ + -e ali_drw_23000/hif_wr/ \ + -e ali_drw_23000/hif_rd/ \ + -e ali_drw_23000/hif_rmw/ \ + -e ali_drw_23000/cycle/ \ + -e ali_drw_23080/hif_wr/ \ + -e ali_drw_23080/hif_rd/ \ + -e ali_drw_23080/hif_rmw/ \ + -e ali_drw_23080/cycle/ \ + -e ali_drw_25000/hif_wr/ \ + -e ali_drw_25000/hif_rd/ \ + -e ali_drw_25000/hif_rmw/ \ + -e ali_drw_25000/cycle/ \ + -e ali_drw_25080/hif_wr/ \ + -e ali_drw_25080/hif_rd/ \ + -e ali_drw_25080/hif_rmw/ \ + -e ali_drw_25080/cycle/ \ + -e ali_drw_27000/hif_wr/ \ + -e ali_drw_27000/hif_rd/ \ + -e ali_drw_27000/hif_rmw/ \ + -e ali_drw_27000/cycle/ \ + -e ali_drw_27080/hif_wr/ \ + -e ali_drw_27080/hif_rd/ \ + -e ali_drw_27080/hif_rmw/ \ + -e ali_drw_27080/cycle/ -- sleep 10 + +The average DRAM bandwidth can be calculated as follows: + +- Read Bandwidth = perf_hif_rd * DDRC_WIDTH * DDRC_Freq / DDRC_Cycle +- Write Bandwidth = (perf_hif_wr + perf_hif_rmw) * DDRC_WIDTH * DDRC_Freq / DDRC_Cycle + +Here, DDRC_WIDTH = 64 bytes. + +The current driver does not support sampling. So "perf record" is +unsupported. Also attach to a task is unsupported as the events are all +uncore. diff --git a/Documentation/admin-guide/perf/index.rst b/Documentation/admin-guide/perf/index.rst index 9c9ece88ce53..793e1970bc05 100644 --- a/Documentation/admin-guide/perf/index.rst +++ b/Documentation/admin-guide/perf/index.rst @@ -18,3 +18,4 @@ Performance monitor support xgene-pmu arm_dsu_pmu thunderx2-pmu + alibaba_pmu diff --git a/Documentation/admin-guide/pm/amd-pstate.rst b/Documentation/admin-guide/pm/amd-pstate.rst index 83b58eb4ab4d..8f3d30c5a0d8 100644 --- a/Documentation/admin-guide/pm/amd-pstate.rst +++ b/Documentation/admin-guide/pm/amd-pstate.rst @@ -182,6 +182,7 @@ to the ``struct sugov_cpu`` that the utilization update belongs to. Then, ``amd-pstate`` updates the desired performance according to the CPU scheduler assigned. +.. _processor_support: Processor Support ======================= @@ -282,6 +283,8 @@ efficiency frequency management method on AMD processors. Kernel Module Options for ``amd-pstate`` ========================================= +.. _shared_mem: + ``shared_mem`` Use a module param (shared_mem) to enable related processors manually with **amd_pstate.shared_mem=1**. @@ -393,6 +396,76 @@ about part of the output. :: CPU_005 712 116384 39 49 166 0.7565 9645075 2214891 38431470 25.1 11.646 469 2.496 kworker/5:0-40 CPU_006 712 116408 39 49 166 0.6769 8950227 1839034 37192089 24.06 11.272 470 2.496 kworker/6:0-1264 +Unit Tests for amd-pstate +------------------------- + +``amd-pstate-ut`` is a test module for testing the ``amd-pstate`` driver. + + * It can help all users to verify their processor support (SBIOS/Firmware or Hardware). + + * Kernel can have a basic function test to avoid the kernel regression during the update. + + * We can introduce more functional or performance tests to align the result together, it will benefit power and performance scale optimization. + +1. Test case decriptions + + +---------+--------------------------------+------------------------------------------------------------------------------------+ + | Index | Functions | Description | + +=========+================================+====================================================================================+ + | 0 | amd_pstate_ut_acpi_cpc_valid || Check whether the _CPC object is present in SBIOS. | + | | || | + | | || The detail refer to `Processor Support <processor_support_>`_. | + +---------+--------------------------------+------------------------------------------------------------------------------------+ + | 1 | amd_pstate_ut_check_enabled || Check whether AMD P-State is enabled. | + | | || | + | | || AMD P-States and ACPI hardware P-States always can be supported in one processor. | + | | | But AMD P-States has the higher priority and if it is enabled with | + | | | :c:macro:`MSR_AMD_CPPC_ENABLE` or ``cppc_set_enable``, it will respond to the | + | | | request from AMD P-States. | + +---------+--------------------------------+------------------------------------------------------------------------------------+ + | 2 | amd_pstate_ut_check_perf || Check if the each performance values are reasonable. | + | | || highest_perf >= nominal_perf > lowest_nonlinear_perf > lowest_perf > 0. | + +---------+--------------------------------+------------------------------------------------------------------------------------+ + | 3 | amd_pstate_ut_check_freq || Check if the each frequency values and max freq when set support boost mode | + | | | are reasonable. | + | | || max_freq >= nominal_freq > lowest_nonlinear_freq > min_freq > 0 | + | | || If boost is not active but supported, this maximum frequency will be larger than | + | | | the one in ``cpuinfo``. | + +---------+--------------------------------+------------------------------------------------------------------------------------+ + +#. How to execute the tests + + We use test module in the kselftest frameworks to implement it. + We create amd-pstate-ut module and tie it into kselftest.(for + details refer to Linux Kernel Selftests [4]_). + + 1. Build + + + open the :c:macro:`CONFIG_X86_AMD_PSTATE` configuration option. + + set the :c:macro:`CONFIG_X86_AMD_PSTATE_UT` configuration option to M. + + make project + + make selftest :: + + $ cd linux + $ make -C tools/testing/selftests + + #. Installation & Steps :: + + $ make -C tools/testing/selftests install INSTALL_PATH=~/kselftest + $ sudo ./kselftest/run_kselftest.sh -c amd-pstate + TAP version 13 + 1..1 + # selftests: amd-pstate: amd-pstate-ut.sh + # amd-pstate-ut: ok + ok 1 selftests: amd-pstate: amd-pstate-ut.sh + + #. Results :: + + $ dmesg | grep "amd_pstate_ut" | tee log.txt + [12977.570663] amd_pstate_ut: 1 amd_pstate_ut_acpi_cpc_valid success! + [12977.570673] amd_pstate_ut: 2 amd_pstate_ut_check_enabled success! + [12977.571207] amd_pstate_ut: 3 amd_pstate_ut_check_perf success! + [12977.571212] amd_pstate_ut: 4 amd_pstate_ut_check_freq success! Reference =========== @@ -405,3 +478,6 @@ Reference .. [3] Processor Programming Reference (PPR) for AMD Family 19h Model 51h, Revision A1 Processors https://www.amd.com/system/files/TechDocs/56569-A1-PUB.zip + +.. [4] Linux Kernel Selftests, + https://www.kernel.org/doc/html/latest/dev-tools/kselftest.html diff --git a/Documentation/admin-guide/sysctl/kernel.rst b/Documentation/admin-guide/sysctl/kernel.rst index ee6572b1edad..98d1b198b2b4 100644 --- a/Documentation/admin-guide/sysctl/kernel.rst +++ b/Documentation/admin-guide/sysctl/kernel.rst @@ -65,6 +65,11 @@ combining the following values: 4 s3_beep = ======= +arch +==== + +The machine hardware name, the same output as ``uname -m`` +(e.g. ``x86_64`` or ``aarch64``). auto_msgmni =========== @@ -635,6 +640,17 @@ different types of memory (represented as different NUMA nodes) to place the hot pages in the fast memory. This is implemented based on unmapping and page fault too. +numa_balancing_promote_rate_limit_MBps +====================================== + +Too high promotion/demotion throughput between different memory types +may hurt application latency. This can be used to rate limit the +promotion throughput. The per-node max promotion throughput in MB/s +will be limited to be no more than the set value. + +A rule of thumb is to set this to less than 1/10 of the PMEM node +write bandwidth. + oops_all_cpu_backtrace ====================== diff --git a/Documentation/admin-guide/sysctl/net.rst b/Documentation/admin-guide/sysctl/net.rst index 60d44165fba7..6394f5dc2303 100644 --- a/Documentation/admin-guide/sysctl/net.rst +++ b/Documentation/admin-guide/sysctl/net.rst @@ -31,17 +31,18 @@ see only some of them, depending on your kernel's configuration. Table : Subdirectories in /proc/sys/net - ========= =================== = ========== ================== + ========= =================== = ========== =================== Directory Content Directory Content - ========= =================== = ========== ================== - core General parameter appletalk Appletalk protocol - unix Unix domain sockets netrom NET/ROM - 802 E802 protocol ax25 AX25 - ethernet Ethernet protocol rose X.25 PLP layer + ========= =================== = ========== =================== + 802 E802 protocol mptcp Multipath TCP + appletalk Appletalk protocol netfilter Network Filter + ax25 AX25 netrom NET/ROM + bridge Bridging rose X.25 PLP layer + core General parameter tipc TIPC + ethernet Ethernet protocol unix Unix domain sockets ipv4 IP version 4 x25 X.25 protocol - bridge Bridging decnet DEC net - ipv6 IP version 6 tipc TIPC - ========= =================== = ========== ================== + ipv6 IP version 6 + ========= =================== = ========== =================== 1. /proc/sys/net/core - Network core options ============================================ @@ -101,6 +102,9 @@ Values: - 1 - enable JIT hardening for unprivileged users only - 2 - enable JIT hardening for all users +where "privileged user" in this context means a process having +CAP_BPF or CAP_SYS_ADMIN in the root user name space. + bpf_jit_kallsyms ---------------- diff --git a/Documentation/admin-guide/sysctl/vm.rst b/Documentation/admin-guide/sysctl/vm.rst index 9b833e439f09..988f6a4c8084 100644 --- a/Documentation/admin-guide/sysctl/vm.rst +++ b/Documentation/admin-guide/sysctl/vm.rst @@ -926,6 +926,9 @@ calls without any restrictions. The default value is 0. +Another way to control permissions for userfaultfd is to use +/dev/userfaultfd instead of userfaultfd(2). See +Documentation/admin-guide/mm/userfaultfd.rst. user_reserve_kbytes =================== diff --git a/Documentation/admin-guide/tainted-kernels.rst b/Documentation/admin-guide/tainted-kernels.rst index 7d80e8c307d1..92a8a07f5c43 100644 --- a/Documentation/admin-guide/tainted-kernels.rst +++ b/Documentation/admin-guide/tainted-kernels.rst @@ -134,6 +134,12 @@ More detailed explanation for tainting scsi/snic on something else than x86_64, scsi/ips on non x86/x86_64/itanium, have broken firmware settings for the irqchip/irq-gic on arm64 ...). + - x86/x86_64: Microcode late loading is dangerous and will result in + tainting the kernel. It requires that all CPUs rendezvous to make sure + the update happens when the system is as quiescent as possible. However, + a higher priority MCE/SMI/NMI can move control flow away from that + rendezvous and interrupt the update, which can be detrimental to the + machine. 3) ``R`` if a module was force unloaded by ``rmmod -f``, ``' '`` if all modules were unloaded normally. diff --git a/Documentation/arm/index.rst b/Documentation/arm/index.rst index 495ada7915e1..8c636d4a061f 100644 --- a/Documentation/arm/index.rst +++ b/Documentation/arm/index.rst @@ -59,6 +59,7 @@ SoC-specific documents stm32/stm32f429-overview stm32/stm32mp13-overview stm32/stm32mp157-overview + stm32/stm32-dma-mdma-chaining sunxi diff --git a/Documentation/arm/stm32/stm32-dma-mdma-chaining.rst b/Documentation/arm/stm32/stm32-dma-mdma-chaining.rst new file mode 100644 index 000000000000..2945e0e33104 --- /dev/null +++ b/Documentation/arm/stm32/stm32-dma-mdma-chaining.rst @@ -0,0 +1,415 @@ +.. SPDX-License-Identifier: GPL-2.0 + +======================= +STM32 DMA-MDMA chaining +======================= + + +Introduction +------------ + + This document describes the STM32 DMA-MDMA chaining feature. But before going + further, let's introduce the peripherals involved. + + To offload data transfers from the CPU, STM32 microprocessors (MPUs) embed + direct memory access controllers (DMA). + + STM32MP1 SoCs embed both STM32 DMA and STM32 MDMA controllers. STM32 DMA + request routing capabilities are enhanced by a DMA request multiplexer + (STM32 DMAMUX). + + **STM32 DMAMUX** + + STM32 DMAMUX routes any DMA request from a given peripheral to any STM32 DMA + controller (STM32MP1 counts two STM32 DMA controllers) channels. + + **STM32 DMA** + + STM32 DMA is mainly used to implement central data buffer storage (usually in + the system SRAM) for different peripheral. It can access external RAMs but + without the ability to generate convenient burst transfer ensuring the best + load of the AXI. + + **STM32 MDMA** + + STM32 MDMA (Master DMA) is mainly used to manage direct data transfers between + RAM data buffers without CPU intervention. It can also be used in a + hierarchical structure that uses STM32 DMA as first level data buffer + interfaces for AHB peripherals, while the STM32 MDMA acts as a second level + DMA with better performance. As a AXI/AHB master, STM32 MDMA can take control + of the AXI/AHB bus. + + +Principles +---------- + + STM32 DMA-MDMA chaining feature relies on the strengths of STM32 DMA and + STM32 MDMA controllers. + + STM32 DMA has a circular Double Buffer Mode (DBM). At each end of transaction + (when DMA data counter - DMA_SxNDTR - reaches 0), the memory pointers + (configured with DMA_SxSM0AR and DMA_SxM1AR) are swapped and the DMA data + counter is automatically reloaded. This allows the SW or the STM32 MDMA to + process one memory area while the second memory area is being filled/used by + the STM32 DMA transfer. + + With STM32 MDMA linked-list mode, a single request initiates the data array + (collection of nodes) to be transferred until the linked-list pointer for the + channel is null. The channel transfer complete of the last node is the end of + transfer, unless first and last nodes are linked to each other, in such a + case, the linked-list loops on to create a circular MDMA transfer. + + STM32 MDMA has direct connections with STM32 DMA. This enables autonomous + communication and synchronization between peripherals, thus saving CPU + resources and bus congestion. Transfer Complete signal of STM32 DMA channel + can triggers STM32 MDMA transfer. STM32 MDMA can clear the request generated + by the STM32 DMA by writing to its Interrupt Clear register (whose address is + stored in MDMA_CxMAR, and bit mask in MDMA_CxMDR). + + .. table:: STM32 MDMA interconnect table with STM32 DMA + + +--------------+----------------+-----------+------------+ + | STM32 DMAMUX | STM32 DMA | STM32 DMA | STM32 MDMA | + | channels | channels | Transfer | request | + | | | complete | | + | | | signal | | + +==============+================+===========+============+ + | Channel *0* | DMA1 channel 0 | dma1_tcf0 | *0x00* | + +--------------+----------------+-----------+------------+ + | Channel *1* | DMA1 channel 1 | dma1_tcf1 | *0x01* | + +--------------+----------------+-----------+------------+ + | Channel *2* | DMA1 channel 2 | dma1_tcf2 | *0x02* | + +--------------+----------------+-----------+------------+ + | Channel *3* | DMA1 channel 3 | dma1_tcf3 | *0x03* | + +--------------+----------------+-----------+------------+ + | Channel *4* | DMA1 channel 4 | dma1_tcf4 | *0x04* | + +--------------+----------------+-----------+------------+ + | Channel *5* | DMA1 channel 5 | dma1_tcf5 | *0x05* | + +--------------+----------------+-----------+------------+ + | Channel *6* | DMA1 channel 6 | dma1_tcf6 | *0x06* | + +--------------+----------------+-----------+------------+ + | Channel *7* | DMA1 channel 7 | dma1_tcf7 | *0x07* | + +--------------+----------------+-----------+------------+ + | Channel *8* | DMA2 channel 0 | dma2_tcf0 | *0x08* | + +--------------+----------------+-----------+------------+ + | Channel *9* | DMA2 channel 1 | dma2_tcf1 | *0x09* | + +--------------+----------------+-----------+------------+ + | Channel *10* | DMA2 channel 2 | dma2_tcf2 | *0x0A* | + +--------------+----------------+-----------+------------+ + | Channel *11* | DMA2 channel 3 | dma2_tcf3 | *0x0B* | + +--------------+----------------+-----------+------------+ + | Channel *12* | DMA2 channel 4 | dma2_tcf4 | *0x0C* | + +--------------+----------------+-----------+------------+ + | Channel *13* | DMA2 channel 5 | dma2_tcf5 | *0x0D* | + +--------------+----------------+-----------+------------+ + | Channel *14* | DMA2 channel 6 | dma2_tcf6 | *0x0E* | + +--------------+----------------+-----------+------------+ + | Channel *15* | DMA2 channel 7 | dma2_tcf7 | *0x0F* | + +--------------+----------------+-----------+------------+ + + STM32 DMA-MDMA chaining feature then uses a SRAM buffer. STM32MP1 SoCs embed + three fast access static internal RAMs of various size, used for data storage. + Due to STM32 DMA legacy (within microcontrollers), STM32 DMA performances are + bad with DDR, while they are optimal with SRAM. Hence the SRAM buffer used + between STM32 DMA and STM32 MDMA. This buffer is split in two equal periods + and STM32 DMA uses one period while STM32 MDMA uses the other period + simultaneously. + :: + + dma[1:2]-tcf[0:7] + .----------------. + ____________ ' _________ V____________ + | STM32 DMA | / __|>_ \ | STM32 MDMA | + |------------| | / \ | |------------| + | DMA_SxM0AR |<=>| | SRAM | |<=>| []-[]...[] | + | DMA_SxM1AR | | \_____/ | | | + |____________| \___<|____/ |____________| + + STM32 DMA-MDMA chaining uses (struct dma_slave_config).peripheral_config to + exchange the parameters needed to configure MDMA. These parameters are + gathered into a u32 array with three values: + + * the STM32 MDMA request (which is actually the DMAMUX channel ID), + * the address of the STM32 DMA register to clear the Transfer Complete + interrupt flag, + * the mask of the Transfer Complete interrupt flag of the STM32 DMA channel. + +Device Tree updates for STM32 DMA-MDMA chaining support +------------------------------------------------------- + + **1. Allocate a SRAM buffer** + + SRAM device tree node is defined in SoC device tree. You can refer to it in + your board device tree to define your SRAM pool. + :: + + &sram { + my_foo_device_dma_pool: dma-sram@0 { + reg = <0x0 0x1000>; + }; + }; + + Be careful of the start index, in case there are other SRAM consumers. + Define your pool size strategically: to optimise chaining, the idea is that + STM32 DMA and STM32 MDMA can work simultaneously, on each buffer of the + SRAM. + If the SRAM period is greater than the expected DMA transfer, then STM32 DMA + and STM32 MDMA will work sequentially instead of simultaneously. It is not a + functional issue but it is not optimal. + + Don't forget to refer to your SRAM pool in your device node. You need to + define a new property. + :: + + &my_foo_device { + ... + my_dma_pool = &my_foo_device_dma_pool; + }; + + Then get this SRAM pool in your foo driver and allocate your SRAM buffer. + + **2. Allocate a STM32 DMA channel and a STM32 MDMA channel** + + You need to define an extra channel in your device tree node, in addition to + the one you should already have for "classic" DMA operation. + + This new channel must be taken from STM32 MDMA channels, so, the phandle of + the DMA controller to use is the MDMA controller's one. + :: + + &my_foo_device { + [...] + my_dma_pool = &my_foo_device_dma_pool; + dmas = <&dmamux1 ...>, // STM32 DMA channel + <&mdma1 0 0x3 0x1200000a 0 0>; // + STM32 MDMA channel + }; + + Concerning STM32 MDMA bindings: + + 1. The request line number : whatever the value here, it will be overwritten + by MDMA driver with the STM32 DMAMUX channel ID passed through + (struct dma_slave_config).peripheral_config + + 2. The priority level : choose Very High (0x3) so that your channel will + take priority other the other during request arbitration + + 3. A 32bit mask specifying the DMA channel configuration : source and + destination address increment, block transfer with 128 bytes per single + transfer + + 4. The 32bit value specifying the register to be used to acknowledge the + request: it will be overwritten by MDMA driver, with the DMA channel + interrupt flag clear register address passed through + (struct dma_slave_config).peripheral_config + + 5. The 32bit mask specifying the value to be written to acknowledge the + request: it will be overwritten by MDMA driver, with the DMA channel + Transfer Complete flag passed through + (struct dma_slave_config).peripheral_config + +Driver updates for STM32 DMA-MDMA chaining support in foo driver +---------------------------------------------------------------- + + **0. (optional) Refactor the original sg_table if dmaengine_prep_slave_sg()** + + In case of dmaengine_prep_slave_sg(), the original sg_table can't be used as + is. Two new sg_tables must be created from the original one. One for + STM32 DMA transfer (where memory address targets now the SRAM buffer instead + of DDR buffer) and one for STM32 MDMA transfer (where memory address targets + the DDR buffer). + + The new sg_list items must fit SRAM period length. Here is an example for + DMA_DEV_TO_MEM: + :: + + /* + * Assuming sgl and nents, respectively the initial scatterlist and its + * length. + * Assuming sram_dma_buf and sram_period, respectively the memory + * allocated from the pool for DMA usage, and the length of the period, + * which is half of the sram_buf size. + */ + struct sg_table new_dma_sgt, new_mdma_sgt; + struct scatterlist *s, *_sgl; + dma_addr_t ddr_dma_buf; + u32 new_nents = 0, len; + int i; + + /* Count the number of entries needed */ + for_each_sg(sgl, s, nents, i) + if (sg_dma_len(s) > sram_period) + new_nents += DIV_ROUND_UP(sg_dma_len(s), sram_period); + else + new_nents++; + + /* Create sg table for STM32 DMA channel */ + ret = sg_alloc_table(&new_dma_sgt, new_nents, GFP_ATOMIC); + if (ret) + dev_err(dev, "DMA sg table alloc failed\n"); + + for_each_sg(new_dma_sgt.sgl, s, new_dma_sgt.nents, i) { + _sgl = sgl; + sg_dma_len(s) = min(sg_dma_len(_sgl), sram_period); + /* Targets the beginning = first half of the sram_buf */ + s->dma_address = sram_buf; + /* + * Targets the second half of the sram_buf + * for odd indexes of the item of the sg_list + */ + if (i & 1) + s->dma_address += sram_period; + } + + /* Create sg table for STM32 MDMA channel */ + ret = sg_alloc_table(&new_mdma_sgt, new_nents, GFP_ATOMIC); + if (ret) + dev_err(dev, "MDMA sg_table alloc failed\n"); + + _sgl = sgl; + len = sg_dma_len(sgl); + ddr_dma_buf = sg_dma_address(sgl); + for_each_sg(mdma_sgt.sgl, s, mdma_sgt.nents, i) { + size_t bytes = min_t(size_t, len, sram_period); + + sg_dma_len(s) = bytes; + sg_dma_address(s) = ddr_dma_buf; + len -= bytes; + + if (!len && sg_next(_sgl)) { + _sgl = sg_next(_sgl); + len = sg_dma_len(_sgl); + ddr_dma_buf = sg_dma_address(_sgl); + } else { + ddr_dma_buf += bytes; + } + } + + Don't forget to release these new sg_tables after getting the descriptors + with dmaengine_prep_slave_sg(). + + **1. Set controller specific parameters** + + First, use dmaengine_slave_config() with a struct dma_slave_config to + configure STM32 DMA channel. You just have to take care of DMA addresses, + the memory address (depending on the transfer direction) must point on your + SRAM buffer, and set (struct dma_slave_config).peripheral_size != 0. + + STM32 DMA driver will check (struct dma_slave_config).peripheral_size to + determine if chaining is being used or not. If it is used, then STM32 DMA + driver fills (struct dma_slave_config).peripheral_config with an array of + three u32 : the first one containing STM32 DMAMUX channel ID, the second one + the channel interrupt flag clear register address, and the third one the + channel Transfer Complete flag mask. + + Then, use dmaengine_slave_config with another struct dma_slave_config to + configure STM32 MDMA channel. Take care of DMA addresses, the device address + (depending on the transfer direction) must point on your SRAM buffer, and + the memory address must point to the buffer originally used for "classic" + DMA operation. Use the previous (struct dma_slave_config).peripheral_size + and .peripheral_config that have been updated by STM32 DMA driver, to set + (struct dma_slave_config).peripheral_size and .peripheral_config of the + struct dma_slave_config to configure STM32 MDMA channel. + :: + + struct dma_slave_config dma_conf; + struct dma_slave_config mdma_conf; + + memset(&dma_conf, 0, sizeof(dma_conf)); + [...] + config.direction = DMA_DEV_TO_MEM; + config.dst_addr = sram_dma_buf; // SRAM buffer + config.peripheral_size = 1; // peripheral_size != 0 => chaining + + dmaengine_slave_config(dma_chan, &dma_config); + + memset(&mdma_conf, 0, sizeof(mdma_conf)); + config.direction = DMA_DEV_TO_MEM; + mdma_conf.src_addr = sram_dma_buf; // SRAM buffer + mdma_conf.dst_addr = rx_dma_buf; // original memory buffer + mdma_conf.peripheral_size = dma_conf.peripheral_size; // <- dma_conf + mdma_conf.peripheral_config = dma_config.peripheral_config; // <- dma_conf + + dmaengine_slave_config(mdma_chan, &mdma_conf); + + **2. Get a descriptor for STM32 DMA channel transaction** + + In the same way you get your descriptor for your "classic" DMA operation, + you just have to replace the original sg_list (in case of + dmaengine_prep_slave_sg()) with the new sg_list using SRAM buffer, or to + replace the original buffer address, length and period (in case of + dmaengine_prep_dma_cyclic()) with the new SRAM buffer. + + **3. Get a descriptor for STM32 MDMA channel transaction** + + If you previously get descriptor (for STM32 DMA) with + + * dmaengine_prep_slave_sg(), then use dmaengine_prep_slave_sg() for + STM32 MDMA; + * dmaengine_prep_dma_cyclic(), then use dmaengine_prep_dma_cyclic() for + STM32 MDMA. + + Use the new sg_list using SRAM buffer (in case of dmaengine_prep_slave_sg()) + or, depending on the transfer direction, either the original DDR buffer (in + case of DMA_DEV_TO_MEM) or the SRAM buffer (in case of DMA_MEM_TO_DEV), the + source address being previously set with dmaengine_slave_config(). + + **4. Submit both transactions** + + Before submitting your transactions, you may need to define on which + descriptor you want a callback to be called at the end of the transfer + (dmaengine_prep_slave_sg()) or the period (dmaengine_prep_dma_cyclic()). + Depending on the direction, set the callback on the descriptor that finishes + the overal transfer: + + * DMA_DEV_TO_MEM: set the callback on the "MDMA" descriptor + * DMA_MEM_TO_DEV: set the callback on the "DMA" descriptor + + Then, submit the descriptors whatever the order, with dmaengine_tx_submit(). + + **5. Issue pending requests (and wait for callback notification)** + + As STM32 MDMA channel transfer is triggered by STM32 DMA, you must issue + STM32 MDMA channel before STM32 DMA channel. + + If any, your callback will be called to warn you about the end of the overal + transfer or the period completion. + + Don't forget to terminate both channels. STM32 DMA channel is configured in + cyclic Double-Buffer mode so it won't be disabled by HW, you need to terminate + it. STM32 MDMA channel will be stopped by HW in case of sg transfer, but not + in case of cyclic transfer. You can terminate it whatever the kind of transfer. + + **STM32 DMA-MDMA chaining DMA_MEM_TO_DEV special case** + + STM32 DMA-MDMA chaining in DMA_MEM_TO_DEV is a special case. Indeed, the + STM32 MDMA feeds the SRAM buffer with the DDR data, and the STM32 DMA reads + data from SRAM buffer. So some data (the first period) have to be copied in + SRAM buffer when the STM32 DMA starts to read. + + A trick could be pausing the STM32 DMA channel (that will raise a Transfer + Complete signal, triggering the STM32 MDMA channel), but the first data read + by the STM32 DMA could be "wrong". The proper way is to prepare the first SRAM + period with dmaengine_prep_dma_memcpy(). Then this first period should be + "removed" from the sg or the cyclic transfer. + + Due to this complexity, rather use the STM32 DMA-MDMA chaining for + DMA_DEV_TO_MEM and keep the "classic" DMA usage for DMA_MEM_TO_DEV, unless + you're not afraid. + +Resources +--------- + + Application note, datasheet and reference manual are available on ST website + (STM32MP1_). + + Dedicated focus on three application notes (AN5224_, AN4031_ & AN5001_) + dealing with STM32 DMAMUX, STM32 DMA and STM32 MDMA. + +.. _STM32MP1: https://www.st.com/en/microcontrollers-microprocessors/stm32mp1-series.html +.. _AN5224: https://www.st.com/resource/en/application_note/an5224-stm32-dmamux-the-dma-request-router-stmicroelectronics.pdf +.. _AN4031: https://www.st.com/resource/en/application_note/dm00046011-using-the-stm32f2-stm32f4-and-stm32f7-series-dma-controller-stmicroelectronics.pdf +.. _AN5001: https://www.st.com/resource/en/application_note/an5001-stm32cube-expansion-package-for-stm32h7-series-mdma-stmicroelectronics.pdf + +:Authors: + +- Amelie Delaunay <amelie.delaunay@foss.st.com>
\ No newline at end of file diff --git a/Documentation/arm/uefi.rst b/Documentation/arm/uefi.rst index 9b0b5e458a1e..baebe688a006 100644 --- a/Documentation/arm/uefi.rst +++ b/Documentation/arm/uefi.rst @@ -65,10 +65,6 @@ linux,uefi-mmap-desc-size 32-bit Size in bytes of each entry in the UEFI linux,uefi-mmap-desc-ver 32-bit Version of the mmap descriptor format. -linux,initrd-start 64-bit Physical start address of an initrd - -linux,initrd-end 64-bit Physical end address of an initrd - kaslr-seed 64-bit Entropy used to randomize the kernel image base address location. ========================== ====== =========================================== diff --git a/Documentation/arm64/elf_hwcaps.rst b/Documentation/arm64/elf_hwcaps.rst index 311021f2e560..bb34287c8e01 100644 --- a/Documentation/arm64/elf_hwcaps.rst +++ b/Documentation/arm64/elf_hwcaps.rst @@ -272,6 +272,9 @@ HWCAP2_WFXT HWCAP2_EBF16 Functionality implied by ID_AA64ISAR1_EL1.BF16 == 0b0010. +HWCAP2_SVE_EBF16 + Functionality implied by ID_AA64ZFR0_EL1.BF16 == 0b0010. + 4. Unused AT_HWCAP bits ----------------------- diff --git a/Documentation/arm64/silicon-errata.rst b/Documentation/arm64/silicon-errata.rst index fda97b3fcf01..17d9fc5d14fb 100644 --- a/Documentation/arm64/silicon-errata.rst +++ b/Documentation/arm64/silicon-errata.rst @@ -110,6 +110,8 @@ stable kernels. +----------------+-----------------+-----------------+-----------------------------+ | ARM | Cortex-A510 | #2441009 | ARM64_ERRATUM_2441009 | +----------------+-----------------+-----------------+-----------------------------+ +| ARM | Cortex-A510 | #2658417 | ARM64_ERRATUM_2658417 | ++----------------+-----------------+-----------------+-----------------------------+ | ARM | Cortex-A710 | #2119858 | ARM64_ERRATUM_2119858 | +----------------+-----------------+-----------------+-----------------------------+ | ARM | Cortex-A710 | #2054223 | ARM64_ERRATUM_2054223 | diff --git a/Documentation/arm64/sme.rst b/Documentation/arm64/sme.rst index 937147f58cc5..16d2db4c2e2e 100644 --- a/Documentation/arm64/sme.rst +++ b/Documentation/arm64/sme.rst @@ -331,6 +331,9 @@ The regset data starts with struct user_za_header, containing: been read if a PTRACE_GETREGSET of NT_ARM_ZA were executed for each thread when the coredump was generated. +* The NT_ARM_TLS note will be extended to two registers, the second register + will contain TPIDR2_EL0 on systems that support SME and will be read as + zero with writes ignored otherwise. 9. System runtime configuration -------------------------------- diff --git a/Documentation/arm64/sve.rst b/Documentation/arm64/sve.rst index 93c2c2990584..f338ee2df46d 100644 --- a/Documentation/arm64/sve.rst +++ b/Documentation/arm64/sve.rst @@ -111,7 +111,7 @@ the SVE instruction set architecture. * On syscall, V0..V31 are preserved (as without SVE). Thus, bits [127:0] of Z0..Z31 are preserved. All other bits of Z0..Z31, and all of P0..P15 and FFR - become unspecified on return from a syscall. + become zero on return from a syscall. * The SVE registers are not used to pass arguments to or receive results from any syscall. @@ -452,6 +452,24 @@ The regset data starts with struct user_sve_header, containing: * Modifying the system default vector length does not affect the vector length of any existing process or thread that does not make an execve() call. +10. Perf extensions +-------------------------------- + +* The arm64 specific DWARF standard [5] added the VG (Vector Granule) register + at index 46. This register is used for DWARF unwinding when variable length + SVE registers are pushed onto the stack. + +* Its value is equivalent to the current SVE vector length (VL) in bits divided + by 64. + +* The value is included in Perf samples in the regs[46] field if + PERF_SAMPLE_REGS_USER is set and the sample_regs_user mask has bit 46 set. + +* The value is the current value at the time the sample was taken, and it can + change over time. + +* If the system doesn't support SVE when perf_event_open is called with these + settings, the event will fail to open. Appendix A. SVE programmer's model (informative) ================================================= @@ -593,3 +611,5 @@ References http://infocenter.arm.com/help/topic/com.arm.doc.ihi0055c/IHI0055C_beta_aapcs64.pdf http://infocenter.arm.com/help/topic/com.arm.doc.subset.swdev.abi/index.html Procedure Call Standard for the ARM 64-bit Architecture (AArch64) + +[5] https://github.com/ARM-software/abi-aa/blob/main/aadwarf64/aadwarf64.rst diff --git a/Documentation/bpf/clang-notes.rst b/Documentation/bpf/clang-notes.rst new file mode 100644 index 000000000000..528feddf2db9 --- /dev/null +++ b/Documentation/bpf/clang-notes.rst @@ -0,0 +1,30 @@ +.. contents:: +.. sectnum:: + +========================== +Clang implementation notes +========================== + +This document provides more details specific to the Clang/LLVM implementation of the eBPF instruction set. + +Versions +======== + +Clang defined "CPU" versions, where a CPU version of 3 corresponds to the current eBPF ISA. + +Clang can select the eBPF ISA version using ``-mcpu=v3`` for example to select version 3. + +Arithmetic instructions +======================= + +For CPU versions prior to 3, Clang v7.0 and later can enable ``BPF_ALU`` support with +``-Xclang -target-feature -Xclang +alu32``. In CPU version 3, support is automatically included. + +Atomic operations +================= + +Clang can generate atomic instructions by default when ``-mcpu=v3`` is +enabled. If a lower version for ``-mcpu`` is set, the only atomic instruction +Clang can generate is ``BPF_ADD`` *without* ``BPF_FETCH``. If you need to enable +the atomics features, while keeping a lower ``-mcpu`` version, you can use +``-Xclang -target-feature -Xclang +alu32``. diff --git a/Documentation/bpf/index.rst b/Documentation/bpf/index.rst index 1bc2c5c58bdb..1b50de1983ee 100644 --- a/Documentation/bpf/index.rst +++ b/Documentation/bpf/index.rst @@ -26,6 +26,8 @@ that goes into great technical depth about the BPF Architecture. classic_vs_extended.rst bpf_licensing test_debug + clang-notes + linux-notes other .. only:: subproject and html diff --git a/Documentation/bpf/instruction-set.rst b/Documentation/bpf/instruction-set.rst index 1b0e6711dec9..5d798437dad4 100644 --- a/Documentation/bpf/instruction-set.rst +++ b/Documentation/bpf/instruction-set.rst @@ -1,7 +1,12 @@ +.. contents:: +.. sectnum:: + +======================================== +eBPF Instruction Set Specification, v1.0 +======================================== + +This document specifies version 1.0 of the eBPF instruction set. -==================== -eBPF Instruction Set -==================== Registers and calling convention ================================ @@ -11,10 +16,10 @@ all of which are 64-bits wide. The eBPF calling convention is defined as: - * R0: return value from function calls, and exit value for eBPF programs - * R1 - R5: arguments for function calls - * R6 - R9: callee saved registers that function calls will preserve - * R10: read-only frame pointer to access stack +* R0: return value from function calls, and exit value for eBPF programs +* R1 - R5: arguments for function calls +* R6 - R9: callee saved registers that function calls will preserve +* R10: read-only frame pointer to access stack R0 - R5 are scratch registers and eBPF programs needs to spill/fill them if necessary across calls. @@ -24,17 +29,17 @@ Instruction encoding eBPF has two instruction encodings: - * the basic instruction encoding, which uses 64 bits to encode an instruction - * the wide instruction encoding, which appends a second 64-bit immediate value - (imm64) after the basic instruction for a total of 128 bits. +* the basic instruction encoding, which uses 64 bits to encode an instruction +* the wide instruction encoding, which appends a second 64-bit immediate value + (imm64) after the basic instruction for a total of 128 bits. The basic instruction encoding looks as follows: - ============= ======= =============== ==================== ============ - 32 bits (MSB) 16 bits 4 bits 4 bits 8 bits (LSB) - ============= ======= =============== ==================== ============ - immediate offset source register destination register opcode - ============= ======= =============== ==================== ============ +============= ======= =============== ==================== ============ +32 bits (MSB) 16 bits 4 bits 4 bits 8 bits (LSB) +============= ======= =============== ==================== ============ +immediate offset source register destination register opcode +============= ======= =============== ==================== ============ Note that most instructions do not use all of the fields. Unused fields shall be cleared to zero. @@ -44,30 +49,30 @@ Instruction classes The three LSB bits of the 'opcode' field store the instruction class: - ========= ===== =============================== - class value description - ========= ===== =============================== - BPF_LD 0x00 non-standard load operations - BPF_LDX 0x01 load into register operations - BPF_ST 0x02 store from immediate operations - BPF_STX 0x03 store from register operations - BPF_ALU 0x04 32-bit arithmetic operations - BPF_JMP 0x05 64-bit jump operations - BPF_JMP32 0x06 32-bit jump operations - BPF_ALU64 0x07 64-bit arithmetic operations - ========= ===== =============================== +========= ===== =============================== =================================== +class value description reference +========= ===== =============================== =================================== +BPF_LD 0x00 non-standard load operations `Load and store instructions`_ +BPF_LDX 0x01 load into register operations `Load and store instructions`_ +BPF_ST 0x02 store from immediate operations `Load and store instructions`_ +BPF_STX 0x03 store from register operations `Load and store instructions`_ +BPF_ALU 0x04 32-bit arithmetic operations `Arithmetic and jump instructions`_ +BPF_JMP 0x05 64-bit jump operations `Arithmetic and jump instructions`_ +BPF_JMP32 0x06 32-bit jump operations `Arithmetic and jump instructions`_ +BPF_ALU64 0x07 64-bit arithmetic operations `Arithmetic and jump instructions`_ +========= ===== =============================== =================================== Arithmetic and jump instructions ================================ -For arithmetic and jump instructions (BPF_ALU, BPF_ALU64, BPF_JMP and -BPF_JMP32), the 8-bit 'opcode' field is divided into three parts: +For arithmetic and jump instructions (``BPF_ALU``, ``BPF_ALU64``, ``BPF_JMP`` and +``BPF_JMP32``), the 8-bit 'opcode' field is divided into three parts: - ============== ====== ================= - 4 bits (MSB) 1 bit 3 bits (LSB) - ============== ====== ================= - operation code source instruction class - ============== ====== ================= +============== ====== ================= +4 bits (MSB) 1 bit 3 bits (LSB) +============== ====== ================= +operation code source instruction class +============== ====== ================= The 4th bit encodes the source operand: @@ -84,66 +89,66 @@ The four MSB bits store the operation code. Arithmetic instructions ----------------------- -BPF_ALU uses 32-bit wide operands while BPF_ALU64 uses 64-bit wide operands for +``BPF_ALU`` uses 32-bit wide operands while ``BPF_ALU64`` uses 64-bit wide operands for otherwise identical operations. -The code field encodes the operation as below: - - ======== ===== ================================================= - code value description - ======== ===== ================================================= - BPF_ADD 0x00 dst += src - BPF_SUB 0x10 dst -= src - BPF_MUL 0x20 dst \*= src - BPF_DIV 0x30 dst /= src - BPF_OR 0x40 dst \|= src - BPF_AND 0x50 dst &= src - BPF_LSH 0x60 dst <<= src - BPF_RSH 0x70 dst >>= src - BPF_NEG 0x80 dst = ~src - BPF_MOD 0x90 dst %= src - BPF_XOR 0xa0 dst ^= src - BPF_MOV 0xb0 dst = src - BPF_ARSH 0xc0 sign extending shift right - BPF_END 0xd0 byte swap operations (see separate section below) - ======== ===== ================================================= - -BPF_ADD | BPF_X | BPF_ALU means:: +The 'code' field encodes the operation as below: + +======== ===== ========================================================== +code value description +======== ===== ========================================================== +BPF_ADD 0x00 dst += src +BPF_SUB 0x10 dst -= src +BPF_MUL 0x20 dst \*= src +BPF_DIV 0x30 dst /= src +BPF_OR 0x40 dst \|= src +BPF_AND 0x50 dst &= src +BPF_LSH 0x60 dst <<= src +BPF_RSH 0x70 dst >>= src +BPF_NEG 0x80 dst = ~src +BPF_MOD 0x90 dst %= src +BPF_XOR 0xa0 dst ^= src +BPF_MOV 0xb0 dst = src +BPF_ARSH 0xc0 sign extending shift right +BPF_END 0xd0 byte swap operations (see `Byte swap instructions`_ below) +======== ===== ========================================================== + +``BPF_ADD | BPF_X | BPF_ALU`` means:: dst_reg = (u32) dst_reg + (u32) src_reg; -BPF_ADD | BPF_X | BPF_ALU64 means:: +``BPF_ADD | BPF_X | BPF_ALU64`` means:: dst_reg = dst_reg + src_reg -BPF_XOR | BPF_K | BPF_ALU means:: +``BPF_XOR | BPF_K | BPF_ALU`` means:: src_reg = (u32) src_reg ^ (u32) imm32 -BPF_XOR | BPF_K | BPF_ALU64 means:: +``BPF_XOR | BPF_K | BPF_ALU64`` means:: src_reg = src_reg ^ imm32 Byte swap instructions ----------------------- +~~~~~~~~~~~~~~~~~~~~~~ The byte swap instructions use an instruction class of ``BPF_ALU`` and a 4-bit -code field of ``BPF_END``. +'code' field of ``BPF_END``. The byte swap instructions operate on the destination register only and do not use a separate source register or immediate value. -The 1-bit source operand field in the opcode is used to to select what byte +The 1-bit source operand field in the opcode is used to select what byte order the operation convert from or to: - ========= ===== ================================================= - source value description - ========= ===== ================================================= - BPF_TO_LE 0x00 convert between host byte order and little endian - BPF_TO_BE 0x08 convert between host byte order and big endian - ========= ===== ================================================= +========= ===== ================================================= +source value description +========= ===== ================================================= +BPF_TO_LE 0x00 convert between host byte order and little endian +BPF_TO_BE 0x08 convert between host byte order and big endian +========= ===== ================================================= -The imm field encodes the width of the swap operations. The following widths +The 'imm' field encodes the width of the swap operations. The following widths are supported: 16, 32 and 64. Examples: @@ -156,35 +161,31 @@ Examples: dst_reg = htobe64(dst_reg) -``BPF_FROM_LE`` and ``BPF_FROM_BE`` exist as aliases for ``BPF_TO_LE`` and -``BPF_TO_BE`` respectively. - - Jump instructions ----------------- -BPF_JMP32 uses 32-bit wide operands while BPF_JMP uses 64-bit wide operands for +``BPF_JMP32`` uses 32-bit wide operands while ``BPF_JMP`` uses 64-bit wide operands for otherwise identical operations. -The code field encodes the operation as below: - - ======== ===== ========================= ============ - code value description notes - ======== ===== ========================= ============ - BPF_JA 0x00 PC += off BPF_JMP only - BPF_JEQ 0x10 PC += off if dst == src - BPF_JGT 0x20 PC += off if dst > src unsigned - BPF_JGE 0x30 PC += off if dst >= src unsigned - BPF_JSET 0x40 PC += off if dst & src - BPF_JNE 0x50 PC += off if dst != src - BPF_JSGT 0x60 PC += off if dst > src signed - BPF_JSGE 0x70 PC += off if dst >= src signed - BPF_CALL 0x80 function call - BPF_EXIT 0x90 function / program return BPF_JMP only - BPF_JLT 0xa0 PC += off if dst < src unsigned - BPF_JLE 0xb0 PC += off if dst <= src unsigned - BPF_JSLT 0xc0 PC += off if dst < src signed - BPF_JSLE 0xd0 PC += off if dst <= src signed - ======== ===== ========================= ============ +The 'code' field encodes the operation as below: + +======== ===== ========================= ============ +code value description notes +======== ===== ========================= ============ +BPF_JA 0x00 PC += off BPF_JMP only +BPF_JEQ 0x10 PC += off if dst == src +BPF_JGT 0x20 PC += off if dst > src unsigned +BPF_JGE 0x30 PC += off if dst >= src unsigned +BPF_JSET 0x40 PC += off if dst & src +BPF_JNE 0x50 PC += off if dst != src +BPF_JSGT 0x60 PC += off if dst > src signed +BPF_JSGE 0x70 PC += off if dst >= src signed +BPF_CALL 0x80 function call +BPF_EXIT 0x90 function / program return BPF_JMP only +BPF_JLT 0xa0 PC += off if dst < src unsigned +BPF_JLE 0xb0 PC += off if dst <= src unsigned +BPF_JSLT 0xc0 PC += off if dst < src signed +BPF_JSLE 0xd0 PC += off if dst <= src signed +======== ===== ========================= ============ The eBPF program needs to store the return value into register R0 before doing a BPF_EXIT. @@ -193,14 +194,26 @@ BPF_EXIT. Load and store instructions =========================== -For load and store instructions (BPF_LD, BPF_LDX, BPF_ST and BPF_STX), the +For load and store instructions (``BPF_LD``, ``BPF_LDX``, ``BPF_ST``, and ``BPF_STX``), the 8-bit 'opcode' field is divided as: - ============ ====== ================= - 3 bits (MSB) 2 bits 3 bits (LSB) - ============ ====== ================= - mode size instruction class - ============ ====== ================= +============ ====== ================= +3 bits (MSB) 2 bits 3 bits (LSB) +============ ====== ================= +mode size instruction class +============ ====== ================= + +The mode modifier is one of: + + ============= ===== ==================================== ============= + mode modifier value description reference + ============= ===== ==================================== ============= + BPF_IMM 0x00 64-bit immediate instructions `64-bit immediate instructions`_ + BPF_ABS 0x20 legacy BPF packet access (absolute) `Legacy BPF Packet access instructions`_ + BPF_IND 0x40 legacy BPF packet access (indirect) `Legacy BPF Packet access instructions`_ + BPF_MEM 0x60 regular load and store operations `Regular load and store operations`_ + BPF_ATOMIC 0xc0 atomic operations `Atomic operations`_ + ============= ===== ==================================== ============= The size modifier is one of: @@ -213,19 +226,6 @@ The size modifier is one of: BPF_DW 0x18 double word (8 bytes) ============= ===== ===================== -The mode modifier is one of: - - ============= ===== ==================================== - mode modifier value description - ============= ===== ==================================== - BPF_IMM 0x00 64-bit immediate instructions - BPF_ABS 0x20 legacy BPF packet access (absolute) - BPF_IND 0x40 legacy BPF packet access (indirect) - BPF_MEM 0x60 regular load and store operations - BPF_ATOMIC 0xc0 atomic operations - ============= ===== ==================================== - - Regular load and store operations --------------------------------- @@ -256,44 +256,42 @@ by other eBPF programs or means outside of this specification. All atomic operations supported by eBPF are encoded as store operations that use the ``BPF_ATOMIC`` mode modifier as follows: - * ``BPF_ATOMIC | BPF_W | BPF_STX`` for 32-bit operations - * ``BPF_ATOMIC | BPF_DW | BPF_STX`` for 64-bit operations - * 8-bit and 16-bit wide atomic operations are not supported. +* ``BPF_ATOMIC | BPF_W | BPF_STX`` for 32-bit operations +* ``BPF_ATOMIC | BPF_DW | BPF_STX`` for 64-bit operations +* 8-bit and 16-bit wide atomic operations are not supported. -The imm field is used to encode the actual atomic operation. +The 'imm' field is used to encode the actual atomic operation. Simple atomic operation use a subset of the values defined to encode -arithmetic operations in the imm field to encode the atomic operation: +arithmetic operations in the 'imm' field to encode the atomic operation: - ======== ===== =========== - imm value description - ======== ===== =========== - BPF_ADD 0x00 atomic add - BPF_OR 0x40 atomic or - BPF_AND 0x50 atomic and - BPF_XOR 0xa0 atomic xor - ======== ===== =========== +======== ===== =========== +imm value description +======== ===== =========== +BPF_ADD 0x00 atomic add +BPF_OR 0x40 atomic or +BPF_AND 0x50 atomic and +BPF_XOR 0xa0 atomic xor +======== ===== =========== -``BPF_ATOMIC | BPF_W | BPF_STX`` with imm = BPF_ADD means:: +``BPF_ATOMIC | BPF_W | BPF_STX`` with 'imm' = BPF_ADD means:: *(u32 *)(dst_reg + off16) += src_reg -``BPF_ATOMIC | BPF_DW | BPF_STX`` with imm = BPF ADD means:: +``BPF_ATOMIC | BPF_DW | BPF_STX`` with 'imm' = BPF ADD means:: *(u64 *)(dst_reg + off16) += src_reg -``BPF_XADD`` is a deprecated name for ``BPF_ATOMIC | BPF_ADD``. - In addition to the simple atomic operations, there also is a modifier and two complex atomic operations: - =========== ================ =========================== - imm value description - =========== ================ =========================== - BPF_FETCH 0x01 modifier: return old value - BPF_XCHG 0xe0 | BPF_FETCH atomic exchange - BPF_CMPXCHG 0xf0 | BPF_FETCH atomic compare and exchange - =========== ================ =========================== +=========== ================ =========================== +imm value description +=========== ================ =========================== +BPF_FETCH 0x01 modifier: return old value +BPF_XCHG 0xe0 | BPF_FETCH atomic exchange +BPF_CMPXCHG 0xf0 | BPF_FETCH atomic compare and exchange +=========== ================ =========================== The ``BPF_FETCH`` modifier is optional for simple atomic operations, and always set for the complex atomic operations. If the ``BPF_FETCH`` flag @@ -309,16 +307,10 @@ The ``BPF_CMPXCHG`` operation atomically compares the value addressed by value that was at ``dst_reg + off`` before the operation is zero-extended and loaded back to ``R0``. -Clang can generate atomic instructions by default when ``-mcpu=v3`` is -enabled. If a lower version for ``-mcpu`` is set, the only atomic instruction -Clang can generate is ``BPF_ADD`` *without* ``BPF_FETCH``. If you need to enable -the atomics features, while keeping a lower ``-mcpu`` version, you can use -``-Xclang -target-feature -Xclang +alu32``. - 64-bit immediate instructions ----------------------------- -Instructions with the ``BPF_IMM`` mode modifier use the wide instruction +Instructions with the ``BPF_IMM`` 'mode' modifier use the wide instruction encoding for an extra imm64 value. There is currently only one such instruction. @@ -331,36 +323,6 @@ There is currently only one such instruction. Legacy BPF Packet access instructions ------------------------------------- -eBPF has special instructions for access to packet data that have been -carried over from classic BPF to retain the performance of legacy socket -filters running in the eBPF interpreter. - -The instructions come in two forms: ``BPF_ABS | <size> | BPF_LD`` and -``BPF_IND | <size> | BPF_LD``. - -These instructions are used to access packet data and can only be used when -the program context is a pointer to networking packet. ``BPF_ABS`` -accesses packet data at an absolute offset specified by the immediate data -and ``BPF_IND`` access packet data at an offset that includes the value of -a register in addition to the immediate data. - -These instructions have seven implicit operands: - - * Register R6 is an implicit input that must contain pointer to a - struct sk_buff. - * Register R0 is an implicit output which contains the data fetched from - the packet. - * Registers R1-R5 are scratch registers that are clobbered after a call to - ``BPF_ABS | BPF_LD`` or ``BPF_IND | BPF_LD`` instructions. - -These instructions have an implicit program exit condition as well. When an -eBPF program is trying to access the data beyond the packet boundary, the -program execution will be aborted. - -``BPF_ABS | BPF_W | BPF_LD`` means:: - - R0 = ntohl(*(u32 *) (((struct sk_buff *) R6)->data + imm32)) - -``BPF_IND | BPF_W | BPF_LD`` means:: - - R0 = ntohl(*(u32 *) (((struct sk_buff *) R6)->data + src_reg + imm32)) +eBPF previously introduced special instructions for access to packet data that were +carried over from classic BPF. However, these instructions are +deprecated and should no longer be used. diff --git a/Documentation/bpf/kfuncs.rst b/Documentation/bpf/kfuncs.rst index c0b7dae6dbf5..0f858156371d 100644 --- a/Documentation/bpf/kfuncs.rst +++ b/Documentation/bpf/kfuncs.rst @@ -137,14 +137,37 @@ KF_ACQUIRE and KF_RET_NULL flags. -------------------------- The KF_TRUSTED_ARGS flag is used for kfuncs taking pointer arguments. It -indicates that the all pointer arguments will always be refcounted, and have -their offset set to 0. It can be used to enforce that a pointer to a refcounted -object acquired from a kfunc or BPF helper is passed as an argument to this -kfunc without any modifications (e.g. pointer arithmetic) such that it is -trusted and points to the original object. This flag is often used for kfuncs -that operate (change some property, perform some operation) on an object that -was obtained using an acquire kfunc. Such kfuncs need an unchanged pointer to -ensure the integrity of the operation being performed on the expected object. +indicates that the all pointer arguments will always have a guaranteed lifetime, +and pointers to kernel objects are always passed to helpers in their unmodified +form (as obtained from acquire kfuncs). + +It can be used to enforce that a pointer to a refcounted object acquired from a +kfunc or BPF helper is passed as an argument to this kfunc without any +modifications (e.g. pointer arithmetic) such that it is trusted and points to +the original object. + +Meanwhile, it is also allowed pass pointers to normal memory to such kfuncs, +but those can have a non-zero offset. + +This flag is often used for kfuncs that operate (change some property, perform +some operation) on an object that was obtained using an acquire kfunc. Such +kfuncs need an unchanged pointer to ensure the integrity of the operation being +performed on the expected object. + +2.4.6 KF_SLEEPABLE flag +----------------------- + +The KF_SLEEPABLE flag is used for kfuncs that may sleep. Such kfuncs can only +be called by sleepable BPF programs (BPF_F_SLEEPABLE). + +2.4.7 KF_DESTRUCTIVE flag +-------------------------- + +The KF_DESTRUCTIVE flag is used to indicate functions calling which is +destructive to the system. For example such a call can result in system +rebooting or panicking. Due to this additional restrictions apply to these +calls. At the moment they only require CAP_SYS_BOOT capability, but more can be +added later. 2.5 Registering the kfuncs -------------------------- diff --git a/Documentation/bpf/linux-notes.rst b/Documentation/bpf/linux-notes.rst new file mode 100644 index 000000000000..956b0c86699d --- /dev/null +++ b/Documentation/bpf/linux-notes.rst @@ -0,0 +1,53 @@ +.. contents:: +.. sectnum:: + +========================== +Linux implementation notes +========================== + +This document provides more details specific to the Linux kernel implementation of the eBPF instruction set. + +Byte swap instructions +====================== + +``BPF_FROM_LE`` and ``BPF_FROM_BE`` exist as aliases for ``BPF_TO_LE`` and ``BPF_TO_BE`` respectively. + +Legacy BPF Packet access instructions +===================================== + +As mentioned in the `ISA standard documentation <instruction-set.rst#legacy-bpf-packet-access-instructions>`_, +Linux has special eBPF instructions for access to packet data that have been +carried over from classic BPF to retain the performance of legacy socket +filters running in the eBPF interpreter. + +The instructions come in two forms: ``BPF_ABS | <size> | BPF_LD`` and +``BPF_IND | <size> | BPF_LD``. + +These instructions are used to access packet data and can only be used when +the program context is a pointer to a networking packet. ``BPF_ABS`` +accesses packet data at an absolute offset specified by the immediate data +and ``BPF_IND`` access packet data at an offset that includes the value of +a register in addition to the immediate data. + +These instructions have seven implicit operands: + +* Register R6 is an implicit input that must contain a pointer to a + struct sk_buff. +* Register R0 is an implicit output which contains the data fetched from + the packet. +* Registers R1-R5 are scratch registers that are clobbered by the + instruction. + +These instructions have an implicit program exit condition as well. If an +eBPF program attempts access data beyond the packet boundary, the +program execution will be aborted. + +``BPF_ABS | BPF_W | BPF_LD`` (0x20) means:: + + R0 = ntohl(*(u32 *) ((struct sk_buff *) R6->data + imm)) + +where ``ntohl()`` converts a 32-bit value from network byte order to host byte order. + +``BPF_IND | BPF_W | BPF_LD`` (0x40) means:: + + R0 = ntohl(*(u32 *) ((struct sk_buff *) R6->data + src + imm)) diff --git a/Documentation/bpf/map_cgroup_storage.rst b/Documentation/bpf/map_cgroup_storage.rst index cab9543017bf..8e5fe532c07e 100644 --- a/Documentation/bpf/map_cgroup_storage.rst +++ b/Documentation/bpf/map_cgroup_storage.rst @@ -31,7 +31,7 @@ The map uses key of type of either ``__u64 cgroup_inode_id`` or }; ``cgroup_inode_id`` is the inode id of the cgroup directory. -``attach_type`` is the the program's attach type. +``attach_type`` is the program's attach type. Linux 5.9 added support for type ``__u64 cgroup_inode_id`` as the key type. When this key type is used, then all attach types of the particular cgroup and @@ -155,7 +155,7 @@ However, the BPF program can still only associate with one map of each type ``BPF_MAP_TYPE_CGROUP_STORAGE`` or more than one ``BPF_MAP_TYPE_PERCPU_CGROUP_STORAGE``. -In all versions, userspace may use the the attach parameters of cgroup and +In all versions, userspace may use the attach parameters of cgroup and attach type pair in ``struct bpf_cgroup_storage_key`` as the key to the BPF map APIs to read or update the storage for a given attachment. For Linux 5.9 attach type shared storages, only the first value in the struct, cgroup inode diff --git a/Documentation/conf.py b/Documentation/conf.py index 255384d094bf..b50c85083149 100644 --- a/Documentation/conf.py +++ b/Documentation/conf.py @@ -15,6 +15,18 @@ import sys import os import sphinx +import shutil + +# helper +# ------ + +def have_command(cmd): + """Search ``cmd`` in the ``PATH`` environment. + + If found, return True. + If not found, return False. + """ + return shutil.which(cmd) is not None # Get Sphinx version major, minor, patch = sphinx.version_info[:3] @@ -107,7 +119,32 @@ else: autosectionlabel_prefix_document = True autosectionlabel_maxdepth = 2 -extensions.append("sphinx.ext.imgmath") +# Load math renderer: +# For html builder, load imgmath only when its dependencies are met. +# mathjax is the default math renderer since Sphinx 1.8. +have_latex = have_command('latex') +have_dvipng = have_command('dvipng') +load_imgmath = have_latex and have_dvipng + +# Respect SPHINX_IMGMATH (for html docs only) +if 'SPHINX_IMGMATH' in os.environ: + env_sphinx_imgmath = os.environ['SPHINX_IMGMATH'] + if 'yes' in env_sphinx_imgmath: + load_imgmath = True + elif 'no' in env_sphinx_imgmath: + load_imgmath = False + else: + sys.stderr.write("Unknown env SPHINX_IMGMATH=%s ignored.\n" % env_sphinx_imgmath) + +# Always load imgmath for Sphinx <1.8 or for epub docs +load_imgmath = (load_imgmath or (major == 1 and minor < 8) + or 'epub' in sys.argv) + +if load_imgmath: + extensions.append("sphinx.ext.imgmath") + math_renderer = 'imgmath' +else: + math_renderer = 'mathjax' # Add any paths that contain templates here, relative to this directory. templates_path = ['_templates'] @@ -333,7 +370,8 @@ html_static_path = ['sphinx-static'] html_use_smartypants = False # Custom sidebar templates, maps document names to template names. -#html_sidebars = {} +# Note that the RTD theme ignores this. +html_sidebars = { '**': ['searchbox.html', 'localtoc.html', 'sourcelink.html']} # Additional templates that should be rendered to pages, maps page names to # template names. diff --git a/Documentation/asm-annotations.rst b/Documentation/core-api/asm-annotations.rst index a64f2ca469d4..bc514ed59887 100644 --- a/Documentation/asm-annotations.rst +++ b/Documentation/core-api/asm-annotations.rst @@ -43,10 +43,11 @@ annotated objects like this, tools can be run on them to generate more useful information. In particular, on properly annotated objects, ``objtool`` can be run to check and fix the object if needed. Currently, ``objtool`` can report missing frame pointer setup/destruction in functions. It can also -automatically generate annotations for :doc:`ORC unwinder <x86/orc-unwinder>` +automatically generate annotations for the ORC unwinder +(Documentation/x86/orc-unwinder.rst) for most code. Both of these are especially important to support reliable -stack traces which are in turn necessary for :doc:`Kernel live patching -<livepatch/livepatch>`. +stack traces which are in turn necessary for kernel live patching +(Documentation/livepatch/livepatch.rst). Caveat and Discussion --------------------- diff --git a/Documentation/core-api/cpu_hotplug.rst b/Documentation/core-api/cpu_hotplug.rst index c6f4ba2fb32d..f75778d37488 100644 --- a/Documentation/core-api/cpu_hotplug.rst +++ b/Documentation/core-api/cpu_hotplug.rst @@ -560,7 +560,7 @@ available: * cpuhp_state_remove_instance(state, node) * cpuhp_state_remove_instance_nocalls(state, node) -The arguments are the same as for the the cpuhp_state_add_instance*() +The arguments are the same as for the cpuhp_state_add_instance*() variants above. The functions differ in the way how the installed callbacks are treated: diff --git a/Documentation/core-api/index.rst b/Documentation/core-api/index.rst index dc95df462eea..77eb775b8b42 100644 --- a/Documentation/core-api/index.rst +++ b/Documentation/core-api/index.rst @@ -23,6 +23,7 @@ it. printk-formats printk-index symbol-namespaces + asm-annotations Data structures and low-level utilities ======================================= @@ -36,6 +37,7 @@ Library functionality that is used throughout the kernel. kref assoc_array xarray + maple_tree idr circular-buffers rbtree @@ -44,6 +46,8 @@ Library functionality that is used throughout the kernel. this_cpu_ops timekeeping errseq + wrappers/atomic_t + wrappers/atomic_bitops Low level entry and exit ======================== @@ -67,6 +71,7 @@ Documentation/locking/index.rst for more related documentation. local_ops padata ../RCU/index + wrappers/memory-barriers.rst Low-level hardware management ============================= diff --git a/Documentation/core-api/irq/irq-domain.rst b/Documentation/core-api/irq/irq-domain.rst index d30b4d0a9769..f88a6ee67a35 100644 --- a/Documentation/core-api/irq/irq-domain.rst +++ b/Documentation/core-api/irq/irq-domain.rst @@ -71,7 +71,7 @@ variety of methods: Note that irq domain lookups must happen in contexts that are compatible with a RCU read-side critical section. -The irq_create_mapping() function must be called *atleast once* +The irq_create_mapping() function must be called *at least once* before any call to irq_find_mapping(), lest the descriptor will not be allocated. diff --git a/Documentation/core-api/maple_tree.rst b/Documentation/core-api/maple_tree.rst new file mode 100644 index 000000000000..45defcf15da7 --- /dev/null +++ b/Documentation/core-api/maple_tree.rst @@ -0,0 +1,217 @@ +.. SPDX-License-Identifier: GPL-2.0+ + + +========== +Maple Tree +========== + +:Author: Liam R. Howlett + +Overview +======== + +The Maple Tree is a B-Tree data type which is optimized for storing +non-overlapping ranges, including ranges of size 1. The tree was designed to +be simple to use and does not require a user written search method. It +supports iterating over a range of entries and going to the previous or next +entry in a cache-efficient manner. The tree can also be put into an RCU-safe +mode of operation which allows reading and writing concurrently. Writers must +synchronize on a lock, which can be the default spinlock, or the user can set +the lock to an external lock of a different type. + +The Maple Tree maintains a small memory footprint and was designed to use +modern processor cache efficiently. The majority of the users will be able to +use the normal API. An :ref:`maple-tree-advanced-api` exists for more complex +scenarios. The most important usage of the Maple Tree is the tracking of the +virtual memory areas. + +The Maple Tree can store values between ``0`` and ``ULONG_MAX``. The Maple +Tree reserves values with the bottom two bits set to '10' which are below 4096 +(ie 2, 6, 10 .. 4094) for internal use. If the entries may use reserved +entries then the users can convert the entries using xa_mk_value() and convert +them back by calling xa_to_value(). If the user needs to use a reserved +value, then the user can convert the value when using the +:ref:`maple-tree-advanced-api`, but are blocked by the normal API. + +The Maple Tree can also be configured to support searching for a gap of a given +size (or larger). + +Pre-allocating of nodes is also supported using the +:ref:`maple-tree-advanced-api`. This is useful for users who must guarantee a +successful store operation within a given +code segment when allocating cannot be done. Allocations of nodes are +relatively small at around 256 bytes. + +.. _maple-tree-normal-api: + +Normal API +========== + +Start by initialising a maple tree, either with DEFINE_MTREE() for statically +allocated maple trees or mt_init() for dynamically allocated ones. A +freshly-initialised maple tree contains a ``NULL`` pointer for the range ``0`` +- ``ULONG_MAX``. There are currently two types of maple trees supported: the +allocation tree and the regular tree. The regular tree has a higher branching +factor for internal nodes. The allocation tree has a lower branching factor +but allows the user to search for a gap of a given size or larger from either +``0`` upwards or ``ULONG_MAX`` down. An allocation tree can be used by +passing in the ``MT_FLAGS_ALLOC_RANGE`` flag when initialising the tree. + +You can then set entries using mtree_store() or mtree_store_range(). +mtree_store() will overwrite any entry with the new entry and return 0 on +success or an error code otherwise. mtree_store_range() works in the same way +but takes a range. mtree_load() is used to retrieve the entry stored at a +given index. You can use mtree_erase() to erase an entire range by only +knowing one value within that range, or mtree_store() call with an entry of +NULL may be used to partially erase a range or many ranges at once. + +If you want to only store a new entry to a range (or index) if that range is +currently ``NULL``, you can use mtree_insert_range() or mtree_insert() which +return -EEXIST if the range is not empty. + +You can search for an entry from an index upwards by using mt_find(). + +You can walk each entry within a range by calling mt_for_each(). You must +provide a temporary variable to store a cursor. If you want to walk each +element of the tree then ``0`` and ``ULONG_MAX`` may be used as the range. If +the caller is going to hold the lock for the duration of the walk then it is +worth looking at the mas_for_each() API in the :ref:`maple-tree-advanced-api` +section. + +Sometimes it is necessary to ensure the next call to store to a maple tree does +not allocate memory, please see :ref:`maple-tree-advanced-api` for this use case. + +Finally, you can remove all entries from a maple tree by calling +mtree_destroy(). If the maple tree entries are pointers, you may wish to free +the entries first. + +Allocating Nodes +---------------- + +The allocations are handled by the internal tree code. See +:ref:`maple-tree-advanced-alloc` for other options. + +Locking +------- + +You do not have to worry about locking. See :ref:`maple-tree-advanced-locks` +for other options. + +The Maple Tree uses RCU and an internal spinlock to synchronise access: + +Takes RCU read lock: + * mtree_load() + * mt_find() + * mt_for_each() + * mt_next() + * mt_prev() + +Takes ma_lock internally: + * mtree_store() + * mtree_store_range() + * mtree_insert() + * mtree_insert_range() + * mtree_erase() + * mtree_destroy() + * mt_set_in_rcu() + * mt_clear_in_rcu() + +If you want to take advantage of the internal lock to protect the data +structures that you are storing in the Maple Tree, you can call mtree_lock() +before calling mtree_load(), then take a reference count on the object you +have found before calling mtree_unlock(). This will prevent stores from +removing the object from the tree between looking up the object and +incrementing the refcount. You can also use RCU to avoid dereferencing +freed memory, but an explanation of that is beyond the scope of this +document. + +.. _maple-tree-advanced-api: + +Advanced API +============ + +The advanced API offers more flexibility and better performance at the +cost of an interface which can be harder to use and has fewer safeguards. +You must take care of your own locking while using the advanced API. +You can use the ma_lock, RCU or an external lock for protection. +You can mix advanced and normal operations on the same array, as long +as the locking is compatible. The :ref:`maple-tree-normal-api` is implemented +in terms of the advanced API. + +The advanced API is based around the ma_state, this is where the 'mas' +prefix originates. The ma_state struct keeps track of tree operations to make +life easier for both internal and external tree users. + +Initialising the maple tree is the same as in the :ref:`maple-tree-normal-api`. +Please see above. + +The maple state keeps track of the range start and end in mas->index and +mas->last, respectively. + +mas_walk() will walk the tree to the location of mas->index and set the +mas->index and mas->last according to the range for the entry. + +You can set entries using mas_store(). mas_store() will overwrite any entry +with the new entry and return the first existing entry that is overwritten. +The range is passed in as members of the maple state: index and last. + +You can use mas_erase() to erase an entire range by setting index and +last of the maple state to the desired range to erase. This will erase +the first range that is found in that range, set the maple state index +and last as the range that was erased and return the entry that existed +at that location. + +You can walk each entry within a range by using mas_for_each(). If you want +to walk each element of the tree then ``0`` and ``ULONG_MAX`` may be used as +the range. If the lock needs to be periodically dropped, see the locking +section mas_pause(). + +Using a maple state allows mas_next() and mas_prev() to function as if the +tree was a linked list. With such a high branching factor the amortized +performance penalty is outweighed by cache optimization. mas_next() will +return the next entry which occurs after the entry at index. mas_prev() +will return the previous entry which occurs before the entry at index. + +mas_find() will find the first entry which exists at or above index on +the first call, and the next entry from every subsequent calls. + +mas_find_rev() will find the fist entry which exists at or below the last on +the first call, and the previous entry from every subsequent calls. + +If the user needs to yield the lock during an operation, then the maple state +must be paused using mas_pause(). + +There are a few extra interfaces provided when using an allocation tree. +If you wish to search for a gap within a range, then mas_empty_area() +or mas_empty_area_rev() can be used. mas_empty_area() searches for a gap +starting at the lowest index given up to the maximum of the range. +mas_empty_area_rev() searches for a gap starting at the highest index given +and continues downward to the lower bound of the range. + +.. _maple-tree-advanced-alloc: + +Advanced Allocating Nodes +------------------------- + +Allocations are usually handled internally to the tree, however if allocations +need to occur before a write occurs then calling mas_expected_entries() will +allocate the worst-case number of needed nodes to insert the provided number of +ranges. This also causes the tree to enter mass insertion mode. Once +insertions are complete calling mas_destroy() on the maple state will free the +unused allocations. + +.. _maple-tree-advanced-locks: + +Advanced Locking +---------------- + +The maple tree uses a spinlock by default, but external locks can be used for +tree updates as well. To use an external lock, the tree must be initialized +with the ``MT_FLAGS_LOCK_EXTERN flag``, this is usually done with the +MTREE_INIT_EXT() #define, which takes an external lock as an argument. + +Functions and structures +======================== + +.. kernel-doc:: include/linux/maple_tree.h +.. kernel-doc:: lib/maple_tree.c diff --git a/Documentation/core-api/mm-api.rst b/Documentation/core-api/mm-api.rst index 1ebcc6c3fafe..f5dde5bceaea 100644 --- a/Documentation/core-api/mm-api.rst +++ b/Documentation/core-api/mm-api.rst @@ -19,9 +19,6 @@ User Space Memory Access Memory Allocation Controls ========================== -.. kernel-doc:: include/linux/gfp.h - :internal: - .. kernel-doc:: include/linux/gfp_types.h :doc: Page mobility and placement hints diff --git a/Documentation/core-api/printk-formats.rst b/Documentation/core-api/printk-formats.rst index 5e89497ba314..dbe1aacc79d0 100644 --- a/Documentation/core-api/printk-formats.rst +++ b/Documentation/core-api/printk-formats.rst @@ -625,6 +625,16 @@ Examples:: %p4cc Y10 little-endian (0x20303159) %p4cc NV12 big-endian (0xb231564e) +Rust +---- + +:: + + %pA + +Only intended to be used from Rust code to format ``core::fmt::Arguments``. +Do *not* use it from C. + Thanks ====== diff --git a/Documentation/core-api/wrappers/atomic_bitops.rst b/Documentation/core-api/wrappers/atomic_bitops.rst new file mode 100644 index 000000000000..bf24e4081a8f --- /dev/null +++ b/Documentation/core-api/wrappers/atomic_bitops.rst @@ -0,0 +1,18 @@ +.. SPDX-License-Identifier: GPL-2.0 + This is a simple wrapper to bring atomic_bitops.txt into the RST world + until such a time as that file can be converted directly. + +============= +Atomic bitops +============= + +.. raw:: latex + + \footnotesize + +.. include:: ../../atomic_bitops.txt + :literal: + +.. raw:: latex + + \normalsize diff --git a/Documentation/core-api/wrappers/atomic_t.rst b/Documentation/core-api/wrappers/atomic_t.rst new file mode 100644 index 000000000000..ed109a964c77 --- /dev/null +++ b/Documentation/core-api/wrappers/atomic_t.rst @@ -0,0 +1,19 @@ +.. SPDX-License-Identifier: GPL-2.0 + This is a simple wrapper to bring atomic_t.txt into the RST world + until such a time as that file can be converted directly. + +============ +Atomic types +============ + +.. raw:: latex + + \footnotesize + +.. include:: ../../atomic_t.txt + :literal: + +.. raw:: latex + + \normalsize + diff --git a/Documentation/core-api/wrappers/memory-barriers.rst b/Documentation/core-api/wrappers/memory-barriers.rst new file mode 100644 index 000000000000..532460b5e3eb --- /dev/null +++ b/Documentation/core-api/wrappers/memory-barriers.rst @@ -0,0 +1,18 @@ +.. SPDX-License-Identifier: GPL-2.0 + This is a simple wrapper to bring memory-barriers.txt into the RST world + until such a time as that file can be converted directly. + +============================ +Linux kernel memory barriers +============================ + +.. raw:: latex + + \footnotesize + +.. include:: ../../memory-barriers.txt + :literal: + +.. raw:: latex + + \normalsize diff --git a/Documentation/dev-tools/checkpatch.rst b/Documentation/dev-tools/checkpatch.rst index b52452bc2963..c3389c6f3838 100644 --- a/Documentation/dev-tools/checkpatch.rst +++ b/Documentation/dev-tools/checkpatch.rst @@ -612,6 +612,13 @@ Commit message See: https://www.kernel.org/doc/html/latest/process/submitting-patches.html#describe-your-changes + **BAD_FIXES_TAG** + The Fixes: tag is malformed or does not follow the community conventions. + This can occur if the tag have been split into multiple lines (e.g., when + pasted in an email program with word wrapping enabled). + + See: https://www.kernel.org/doc/html/latest/process/submitting-patches.html#describe-your-changes + Comparison style ---------------- diff --git a/Documentation/dev-tools/index.rst b/Documentation/dev-tools/index.rst index 4621eac290f4..6b0663075dc0 100644 --- a/Documentation/dev-tools/index.rst +++ b/Documentation/dev-tools/index.rst @@ -24,6 +24,7 @@ Documentation/dev-tools/testing-overview.rst kcov gcov kasan + kmsan ubsan kmemleak kcsan diff --git a/Documentation/dev-tools/kasan.rst b/Documentation/dev-tools/kasan.rst index 1772fd457fed..5c93ab915049 100644 --- a/Documentation/dev-tools/kasan.rst +++ b/Documentation/dev-tools/kasan.rst @@ -111,9 +111,17 @@ parameter can be used to control panic and reporting behaviour: report or also panic the kernel (default: ``report``). The panic happens even if ``kasan_multi_shot`` is enabled. -Hardware Tag-Based KASAN mode (see the section about various modes below) is -intended for use in production as a security mitigation. Therefore, it supports -additional boot parameters that allow disabling KASAN or controlling features: +Software and Hardware Tag-Based KASAN modes (see the section about various +modes below) support altering stack trace collection behavior: + +- ``kasan.stacktrace=off`` or ``=on`` disables or enables alloc and free stack + traces collection (default: ``on``). +- ``kasan.stack_ring_size=<number of entries>`` specifies the number of entries + in the stack ring (default: ``32768``). + +Hardware Tag-Based KASAN mode is intended for use in production as a security +mitigation. Therefore, it supports additional boot parameters that allow +disabling KASAN altogether or controlling its features: - ``kasan=off`` or ``=on`` controls whether KASAN is enabled (default: ``on``). @@ -132,9 +140,6 @@ additional boot parameters that allow disabling KASAN or controlling features: - ``kasan.vmalloc=off`` or ``=on`` disables or enables tagging of vmalloc allocations (default: ``on``). -- ``kasan.stacktrace=off`` or ``=on`` disables or enables alloc and free stack - traces collection (default: ``on``). - Error reports ~~~~~~~~~~~~~ diff --git a/Documentation/dev-tools/kmsan.rst b/Documentation/dev-tools/kmsan.rst new file mode 100644 index 000000000000..2a53a801198c --- /dev/null +++ b/Documentation/dev-tools/kmsan.rst @@ -0,0 +1,427 @@ +.. SPDX-License-Identifier: GPL-2.0 +.. Copyright (C) 2022, Google LLC. + +=================================== +The Kernel Memory Sanitizer (KMSAN) +=================================== + +KMSAN is a dynamic error detector aimed at finding uses of uninitialized +values. It is based on compiler instrumentation, and is quite similar to the +userspace `MemorySanitizer tool`_. + +An important note is that KMSAN is not intended for production use, because it +drastically increases kernel memory footprint and slows the whole system down. + +Usage +===== + +Building the kernel +------------------- + +In order to build a kernel with KMSAN you will need a fresh Clang (14.0.6+). +Please refer to `LLVM documentation`_ for the instructions on how to build Clang. + +Now configure and build the kernel with CONFIG_KMSAN enabled. + +Example report +-------------- + +Here is an example of a KMSAN report:: + + ===================================================== + BUG: KMSAN: uninit-value in test_uninit_kmsan_check_memory+0x1be/0x380 [kmsan_test] + test_uninit_kmsan_check_memory+0x1be/0x380 mm/kmsan/kmsan_test.c:273 + kunit_run_case_internal lib/kunit/test.c:333 + kunit_try_run_case+0x206/0x420 lib/kunit/test.c:374 + kunit_generic_run_threadfn_adapter+0x6d/0xc0 lib/kunit/try-catch.c:28 + kthread+0x721/0x850 kernel/kthread.c:327 + ret_from_fork+0x1f/0x30 ??:? + + Uninit was stored to memory at: + do_uninit_local_array+0xfa/0x110 mm/kmsan/kmsan_test.c:260 + test_uninit_kmsan_check_memory+0x1a2/0x380 mm/kmsan/kmsan_test.c:271 + kunit_run_case_internal lib/kunit/test.c:333 + kunit_try_run_case+0x206/0x420 lib/kunit/test.c:374 + kunit_generic_run_threadfn_adapter+0x6d/0xc0 lib/kunit/try-catch.c:28 + kthread+0x721/0x850 kernel/kthread.c:327 + ret_from_fork+0x1f/0x30 ??:? + + Local variable uninit created at: + do_uninit_local_array+0x4a/0x110 mm/kmsan/kmsan_test.c:256 + test_uninit_kmsan_check_memory+0x1a2/0x380 mm/kmsan/kmsan_test.c:271 + + Bytes 4-7 of 8 are uninitialized + Memory access of size 8 starts at ffff888083fe3da0 + + CPU: 0 PID: 6731 Comm: kunit_try_catch Tainted: G B E 5.16.0-rc3+ #104 + Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS 1.14.0-2 04/01/2014 + ===================================================== + +The report says that the local variable ``uninit`` was created uninitialized in +``do_uninit_local_array()``. The third stack trace corresponds to the place +where this variable was created. + +The first stack trace shows where the uninit value was used (in +``test_uninit_kmsan_check_memory()``). The tool shows the bytes which were left +uninitialized in the local variable, as well as the stack where the value was +copied to another memory location before use. + +A use of uninitialized value ``v`` is reported by KMSAN in the following cases: + - in a condition, e.g. ``if (v) { ... }``; + - in an indexing or pointer dereferencing, e.g. ``array[v]`` or ``*v``; + - when it is copied to userspace or hardware, e.g. ``copy_to_user(..., &v, ...)``; + - when it is passed as an argument to a function, and + ``CONFIG_KMSAN_CHECK_PARAM_RETVAL`` is enabled (see below). + +The mentioned cases (apart from copying data to userspace or hardware, which is +a security issue) are considered undefined behavior from the C11 Standard point +of view. + +Disabling the instrumentation +----------------------------- + +A function can be marked with ``__no_kmsan_checks``. Doing so makes KMSAN +ignore uninitialized values in that function and mark its output as initialized. +As a result, the user will not get KMSAN reports related to that function. + +Another function attribute supported by KMSAN is ``__no_sanitize_memory``. +Applying this attribute to a function will result in KMSAN not instrumenting +it, which can be helpful if we do not want the compiler to interfere with some +low-level code (e.g. that marked with ``noinstr`` which implicitly adds +``__no_sanitize_memory``). + +This however comes at a cost: stack allocations from such functions will have +incorrect shadow/origin values, likely leading to false positives. Functions +called from non-instrumented code may also receive incorrect metadata for their +parameters. + +As a rule of thumb, avoid using ``__no_sanitize_memory`` explicitly. + +It is also possible to disable KMSAN for a single file (e.g. main.o):: + + KMSAN_SANITIZE_main.o := n + +or for the whole directory:: + + KMSAN_SANITIZE := n + +in the Makefile. Think of this as applying ``__no_sanitize_memory`` to every +function in the file or directory. Most users won't need KMSAN_SANITIZE, unless +their code gets broken by KMSAN (e.g. runs at early boot time). + +Support +======= + +In order for KMSAN to work the kernel must be built with Clang, which so far is +the only compiler that has KMSAN support. The kernel instrumentation pass is +based on the userspace `MemorySanitizer tool`_. + +The runtime library only supports x86_64 at the moment. + +How KMSAN works +=============== + +KMSAN shadow memory +------------------- + +KMSAN associates a metadata byte (also called shadow byte) with every byte of +kernel memory. A bit in the shadow byte is set iff the corresponding bit of the +kernel memory byte is uninitialized. Marking the memory uninitialized (i.e. +setting its shadow bytes to ``0xff``) is called poisoning, marking it +initialized (setting the shadow bytes to ``0x00``) is called unpoisoning. + +When a new variable is allocated on the stack, it is poisoned by default by +instrumentation code inserted by the compiler (unless it is a stack variable +that is immediately initialized). Any new heap allocation done without +``__GFP_ZERO`` is also poisoned. + +Compiler instrumentation also tracks the shadow values as they are used along +the code. When needed, instrumentation code invokes the runtime library in +``mm/kmsan/`` to persist shadow values. + +The shadow value of a basic or compound type is an array of bytes of the same +length. When a constant value is written into memory, that memory is unpoisoned. +When a value is read from memory, its shadow memory is also obtained and +propagated into all the operations which use that value. For every instruction +that takes one or more values the compiler generates code that calculates the +shadow of the result depending on those values and their shadows. + +Example:: + + int a = 0xff; // i.e. 0x000000ff + int b; + int c = a | b; + +In this case the shadow of ``a`` is ``0``, shadow of ``b`` is ``0xffffffff``, +shadow of ``c`` is ``0xffffff00``. This means that the upper three bytes of +``c`` are uninitialized, while the lower byte is initialized. + +Origin tracking +--------------- + +Every four bytes of kernel memory also have a so-called origin mapped to them. +This origin describes the point in program execution at which the uninitialized +value was created. Every origin is associated with either the full allocation +stack (for heap-allocated memory), or the function containing the uninitialized +variable (for locals). + +When an uninitialized variable is allocated on stack or heap, a new origin +value is created, and that variable's origin is filled with that value. When a +value is read from memory, its origin is also read and kept together with the +shadow. For every instruction that takes one or more values, the origin of the +result is one of the origins corresponding to any of the uninitialized inputs. +If a poisoned value is written into memory, its origin is written to the +corresponding storage as well. + +Example 1:: + + int a = 42; + int b; + int c = a + b; + +In this case the origin of ``b`` is generated upon function entry, and is +stored to the origin of ``c`` right before the addition result is written into +memory. + +Several variables may share the same origin address, if they are stored in the +same four-byte chunk. In this case every write to either variable updates the +origin for all of them. We have to sacrifice precision in this case, because +storing origins for individual bits (and even bytes) would be too costly. + +Example 2:: + + int combine(short a, short b) { + union ret_t { + int i; + short s[2]; + } ret; + ret.s[0] = a; + ret.s[1] = b; + return ret.i; + } + +If ``a`` is initialized and ``b`` is not, the shadow of the result would be +0xffff0000, and the origin of the result would be the origin of ``b``. +``ret.s[0]`` would have the same origin, but it will never be used, because +that variable is initialized. + +If both function arguments are uninitialized, only the origin of the second +argument is preserved. + +Origin chaining +~~~~~~~~~~~~~~~ + +To ease debugging, KMSAN creates a new origin for every store of an +uninitialized value to memory. The new origin references both its creation stack +and the previous origin the value had. This may cause increased memory +consumption, so we limit the length of origin chains in the runtime. + +Clang instrumentation API +------------------------- + +Clang instrumentation pass inserts calls to functions defined in +``mm/kmsan/nstrumentation.c`` into the kernel code. + +Shadow manipulation +~~~~~~~~~~~~~~~~~~~ + +For every memory access the compiler emits a call to a function that returns a +pair of pointers to the shadow and origin addresses of the given memory:: + + typedef struct { + void *shadow, *origin; + } shadow_origin_ptr_t + + shadow_origin_ptr_t __msan_metadata_ptr_for_load_{1,2,4,8}(void *addr) + shadow_origin_ptr_t __msan_metadata_ptr_for_store_{1,2,4,8}(void *addr) + shadow_origin_ptr_t __msan_metadata_ptr_for_load_n(void *addr, uintptr_t size) + shadow_origin_ptr_t __msan_metadata_ptr_for_store_n(void *addr, uintptr_t size) + +The function name depends on the memory access size. + +The compiler makes sure that for every loaded value its shadow and origin +values are read from memory. When a value is stored to memory, its shadow and +origin are also stored using the metadata pointers. + +Handling locals +~~~~~~~~~~~~~~~ + +A special function is used to create a new origin value for a local variable and +set the origin of that variable to that value:: + + void __msan_poison_alloca(void *addr, uintptr_t size, char *descr) + +Access to per-task data +~~~~~~~~~~~~~~~~~~~~~~~ + +At the beginning of every instrumented function KMSAN inserts a call to +``__msan_get_context_state()``:: + + kmsan_context_state *__msan_get_context_state(void) + +``kmsan_context_state`` is declared in ``include/linux/kmsan.h``:: + + struct kmsan_context_state { + char param_tls[KMSAN_PARAM_SIZE]; + char retval_tls[KMSAN_RETVAL_SIZE]; + char va_arg_tls[KMSAN_PARAM_SIZE]; + char va_arg_origin_tls[KMSAN_PARAM_SIZE]; + u64 va_arg_overflow_size_tls; + char param_origin_tls[KMSAN_PARAM_SIZE]; + depot_stack_handle_t retval_origin_tls; + }; + +This structure is used by KMSAN to pass parameter shadows and origins between +instrumented functions (unless the parameters are checked immediately by +``CONFIG_KMSAN_CHECK_PARAM_RETVAL``). + +Passing uninitialized values to functions +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +Clang's MemorySanitizer instrumentation has an option, +``-fsanitize-memory-param-retval``, which makes the compiler check function +parameters passed by value, as well as function return values. + +The option is controlled by ``CONFIG_KMSAN_CHECK_PARAM_RETVAL``, which is +enabled by default to let KMSAN report uninitialized values earlier. +Please refer to the `LKML discussion`_ for more details. + +Because of the way the checks are implemented in LLVM (they are only applied to +parameters marked as ``noundef``), not all parameters are guaranteed to be +checked, so we cannot give up the metadata storage in ``kmsan_context_state``. + +String functions +~~~~~~~~~~~~~~~~ + +The compiler replaces calls to ``memcpy()``/``memmove()``/``memset()`` with the +following functions. These functions are also called when data structures are +initialized or copied, making sure shadow and origin values are copied alongside +with the data:: + + void *__msan_memcpy(void *dst, void *src, uintptr_t n) + void *__msan_memmove(void *dst, void *src, uintptr_t n) + void *__msan_memset(void *dst, int c, uintptr_t n) + +Error reporting +~~~~~~~~~~~~~~~ + +For each use of a value the compiler emits a shadow check that calls +``__msan_warning()`` in the case that value is poisoned:: + + void __msan_warning(u32 origin) + +``__msan_warning()`` causes KMSAN runtime to print an error report. + +Inline assembly instrumentation +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +KMSAN instruments every inline assembly output with a call to:: + + void __msan_instrument_asm_store(void *addr, uintptr_t size) + +, which unpoisons the memory region. + +This approach may mask certain errors, but it also helps to avoid a lot of +false positives in bitwise operations, atomics etc. + +Sometimes the pointers passed into inline assembly do not point to valid memory. +In such cases they are ignored at runtime. + + +Runtime library +--------------- + +The code is located in ``mm/kmsan/``. + +Per-task KMSAN state +~~~~~~~~~~~~~~~~~~~~ + +Every task_struct has an associated KMSAN task state that holds the KMSAN +context (see above) and a per-task flag disallowing KMSAN reports:: + + struct kmsan_context { + ... + bool allow_reporting; + struct kmsan_context_state cstate; + ... + } + + struct task_struct { + ... + struct kmsan_context kmsan; + ... + } + +KMSAN contexts +~~~~~~~~~~~~~~ + +When running in a kernel task context, KMSAN uses ``current->kmsan.cstate`` to +hold the metadata for function parameters and return values. + +But in the case the kernel is running in the interrupt, softirq or NMI context, +where ``current`` is unavailable, KMSAN switches to per-cpu interrupt state:: + + DEFINE_PER_CPU(struct kmsan_ctx, kmsan_percpu_ctx); + +Metadata allocation +~~~~~~~~~~~~~~~~~~~ + +There are several places in the kernel for which the metadata is stored. + +1. Each ``struct page`` instance contains two pointers to its shadow and +origin pages:: + + struct page { + ... + struct page *shadow, *origin; + ... + }; + +At boot-time, the kernel allocates shadow and origin pages for every available +kernel page. This is done quite late, when the kernel address space is already +fragmented, so normal data pages may arbitrarily interleave with the metadata +pages. + +This means that in general for two contiguous memory pages their shadow/origin +pages may not be contiguous. Consequently, if a memory access crosses the +boundary of a memory block, accesses to shadow/origin memory may potentially +corrupt other pages or read incorrect values from them. + +In practice, contiguous memory pages returned by the same ``alloc_pages()`` +call will have contiguous metadata, whereas if these pages belong to two +different allocations their metadata pages can be fragmented. + +For the kernel data (``.data``, ``.bss`` etc.) and percpu memory regions +there also are no guarantees on metadata contiguity. + +In the case ``__msan_metadata_ptr_for_XXX_YYY()`` hits the border between two +pages with non-contiguous metadata, it returns pointers to fake shadow/origin regions:: + + char dummy_load_page[PAGE_SIZE] __attribute__((aligned(PAGE_SIZE))); + char dummy_store_page[PAGE_SIZE] __attribute__((aligned(PAGE_SIZE))); + +``dummy_load_page`` is zero-initialized, so reads from it always yield zeroes. +All stores to ``dummy_store_page`` are ignored. + +2. For vmalloc memory and modules, there is a direct mapping between the memory +range, its shadow and origin. KMSAN reduces the vmalloc area by 3/4, making only +the first quarter available to ``vmalloc()``. The second quarter of the vmalloc +area contains shadow memory for the first quarter, the third one holds the +origins. A small part of the fourth quarter contains shadow and origins for the +kernel modules. Please refer to ``arch/x86/include/asm/pgtable_64_types.h`` for +more details. + +When an array of pages is mapped into a contiguous virtual memory space, their +shadow and origin pages are similarly mapped into contiguous regions. + +References +========== + +E. Stepanov, K. Serebryany. `MemorySanitizer: fast detector of uninitialized +memory use in C++ +<https://static.googleusercontent.com/media/research.google.com/en//pubs/archive/43308.pdf>`_. +In Proceedings of CGO 2015. + +.. _MemorySanitizer tool: https://clang.llvm.org/docs/MemorySanitizer.html +.. _LLVM documentation: https://llvm.org/docs/GettingStarted.html +.. _LKML discussion: https://lore.kernel.org/all/20220614144853.3693273-1-glider@google.com/ diff --git a/Documentation/dev-tools/kselftest.rst b/Documentation/dev-tools/kselftest.rst index e87973763b91..12b575b76b20 100644 --- a/Documentation/dev-tools/kselftest.rst +++ b/Documentation/dev-tools/kselftest.rst @@ -320,7 +320,7 @@ A bare bones test module might look like this: #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt - #include "../tools/testing/selftests/kselftest/module.h" + #include "../tools/testing/selftests/kselftest_module.h" KSTM_MODULE_GLOBALS(); diff --git a/Documentation/dev-tools/kunit/architecture.rst b/Documentation/dev-tools/kunit/architecture.rst index cf9e6e3eeae4..8efe792bdcb9 100644 --- a/Documentation/dev-tools/kunit/architecture.rst +++ b/Documentation/dev-tools/kunit/architecture.rst @@ -6,8 +6,8 @@ KUnit Architecture The KUnit architecture can be divided into two parts: -- Kernel testing library -- kunit_tool (Command line test harness) +- `In-Kernel Testing Framework`_ +- `kunit_tool (Command Line Test Harness)`_ In-Kernel Testing Framework =========================== diff --git a/Documentation/dev-tools/kunit/faq.rst b/Documentation/dev-tools/kunit/faq.rst index 172e239791a8..fae426f2634a 100644 --- a/Documentation/dev-tools/kunit/faq.rst +++ b/Documentation/dev-tools/kunit/faq.rst @@ -31,13 +31,16 @@ For the most part, the KUnit core framework (what we use to write the tests) can compile to any architecture. It compiles like just another part of the kernel and runs when the kernel boots, or when built as a module, when the module is loaded. However, there is infrastructure, like the KUnit Wrapper -(``tools/testing/kunit/kunit.py``) that does not support other architectures. +(``tools/testing/kunit/kunit.py``) that might not support some architectures +(see :ref:`kunit-on-qemu`). In short, yes, you can run KUnit on other architectures, but it might require more work than using KUnit on UML. For more information, see :ref:`kunit-on-non-uml`. +.. _kinds-of-tests: + What is the difference between a unit test and other kinds of tests? ==================================================================== Most existing tests for the Linux kernel would be categorized as an integration @@ -95,8 +98,7 @@ things to try. seeing. When tests are built-in, they will execute when the kernel boots, and modules will automatically execute associated tests when loaded. Test results can be collected from ``/sys/kernel/debug/kunit/<test suite>/results``, and - can be parsed with ``kunit.py parse``. For more details, see "KUnit on - non-UML architectures" in Documentation/dev-tools/kunit/usage.rst. + can be parsed with ``kunit.py parse``. For more details, see :ref:`kunit-on-qemu`. If none of the above tricks help, you are always welcome to email any issues to kunit-dev@googlegroups.com. diff --git a/Documentation/dev-tools/kunit/index.rst b/Documentation/dev-tools/kunit/index.rst index 595205348d2d..f5d13f1d37be 100644 --- a/Documentation/dev-tools/kunit/index.rst +++ b/Documentation/dev-tools/kunit/index.rst @@ -13,7 +13,6 @@ KUnit - Linux Kernel Unit Testing run_wrapper run_manual usage - kunit-tool api/index style faq @@ -29,10 +28,10 @@ KUnit (Kernel unit testing framework) provides a common framework for unit tests within the Linux kernel. Using KUnit, you can define groups of test cases called test suites. The tests either run on kernel boot if built-in, or load as a module. KUnit automatically flags and reports -failed test cases in the kernel log. The test results appear in `TAP -(Test Anything Protocol) format <https://testanything.org/>`_. It is inspired by -JUnit, Python’s unittest.mock, and GoogleTest/GoogleMock (C++ unit testing -framework). +failed test cases in the kernel log. The test results appear in +:doc:`KTAP (Kernel - Test Anything Protocol) format</dev-tools/ktap>`. +It is inspired by JUnit, Python’s unittest.mock, and GoogleTest/GoogleMock +(C++ unit testing framework). KUnit tests are part of the kernel, written in the C (programming) language, and test parts of the Kernel implementation (example: a C @@ -46,8 +45,9 @@ internal system functionality. KUnit runs in kernel space and is not restricted to things exposed to user-space. In addition, KUnit has kunit_tool, a script (``tools/testing/kunit/kunit.py``) -that configures the Linux kernel, runs KUnit tests under QEMU or UML (`User Mode -Linux <http://user-mode-linux.sourceforge.net/>`_), parses the test results and +that configures the Linux kernel, runs KUnit tests under QEMU or UML +(:doc:`User Mode Linux </virt/uml/user_mode_linux_howto_v2>`), +parses the test results and displays them in a user friendly manner. Features @@ -95,6 +95,8 @@ Unit Testing Advantages - Improves code quality. - Encourages writing testable code. +Read also :ref:`kinds-of-tests`. + How do I use it? ================ @@ -107,7 +109,5 @@ How do I use it? examples. * Documentation/dev-tools/kunit/api/index.rst - KUnit APIs used for testing. -* Documentation/dev-tools/kunit/kunit-tool.rst - kunit_tool helper - script. * Documentation/dev-tools/kunit/faq.rst - KUnit common questions and answers. diff --git a/Documentation/dev-tools/kunit/kunit-tool.rst b/Documentation/dev-tools/kunit/kunit-tool.rst deleted file mode 100644 index ae52e0f489f9..000000000000 --- a/Documentation/dev-tools/kunit/kunit-tool.rst +++ /dev/null @@ -1,232 +0,0 @@ -.. SPDX-License-Identifier: GPL-2.0 - -================= -kunit_tool How-To -================= - -What is kunit_tool? -=================== - -kunit_tool is a script (``tools/testing/kunit/kunit.py``) that aids in building -the Linux kernel as UML (`User Mode Linux -<http://user-mode-linux.sourceforge.net/>`_), running KUnit tests, parsing -the test results and displaying them in a user friendly manner. - -kunit_tool addresses the problem of being able to run tests without needing a -virtual machine or actual hardware with User Mode Linux. User Mode Linux is a -Linux architecture, like ARM or x86; however, unlike other architectures it -compiles the kernel as a standalone Linux executable that can be run like any -other program directly inside of a host operating system. To be clear, it does -not require any virtualization support: it is just a regular program. - -What is a .kunitconfig? -======================= - -It's just a defconfig that kunit_tool looks for in the build directory -(``.kunit`` by default). kunit_tool uses it to generate a .config as you might -expect. In addition, it verifies that the generated .config contains the CONFIG -options in the .kunitconfig; the reason it does this is so that it is easy to -be sure that a CONFIG that enables a test actually ends up in the .config. - -It's also possible to pass a separate .kunitconfig fragment to kunit_tool, -which is useful if you have several different groups of tests you wish -to run independently, or if you want to use pre-defined test configs for -certain subsystems. - -Getting Started with kunit_tool -=============================== - -If a kunitconfig is present at the root directory, all you have to do is: - -.. code-block:: bash - - ./tools/testing/kunit/kunit.py run - -However, you most likely want to use it with the following options: - -.. code-block:: bash - - ./tools/testing/kunit/kunit.py run --timeout=30 --jobs=`nproc --all` - -- ``--timeout`` sets a maximum amount of time to allow tests to run. -- ``--jobs`` sets the number of threads to use to build the kernel. - -.. note:: - This command will work even without a .kunitconfig file: if no - .kunitconfig is present, a default one will be used instead. - -If you wish to use a different .kunitconfig file (such as one provided for -testing a particular subsystem), you can pass it as an option. - -.. code-block:: bash - - ./tools/testing/kunit/kunit.py run --kunitconfig=fs/ext4/.kunitconfig - -For a list of all the flags supported by kunit_tool, you can run: - -.. code-block:: bash - - ./tools/testing/kunit/kunit.py run --help - -Configuring, Building, and Running Tests -======================================== - -It's also possible to run just parts of the KUnit build process independently, -which is useful if you want to make manual changes to part of the process. - -A .config can be generated from a .kunitconfig by using the ``config`` argument -when running kunit_tool: - -.. code-block:: bash - - ./tools/testing/kunit/kunit.py config - -Similarly, if you just want to build a KUnit kernel from the current .config, -you can use the ``build`` argument: - -.. code-block:: bash - - ./tools/testing/kunit/kunit.py build - -And, if you already have a built UML kernel with built-in KUnit tests, you can -run the kernel and display the test results with the ``exec`` argument: - -.. code-block:: bash - - ./tools/testing/kunit/kunit.py exec - -The ``run`` command which is discussed above is equivalent to running all three -of these in sequence. - -All of these commands accept a number of optional command-line arguments. The -``--help`` flag will give a complete list of these, or keep reading this page -for a guide to some of the more useful ones. - -Parsing Test Results -==================== - -KUnit tests output their results in TAP (Test Anything Protocol) format. -kunit_tool will, when running tests, parse this output and print a summary -which is much more pleasant to read. If you wish to look at the raw test -results in TAP format, you can pass the ``--raw_output`` argument. - -.. code-block:: bash - - ./tools/testing/kunit/kunit.py run --raw_output - -The raw output from test runs may contain other, non-KUnit kernel log -lines. You can see just KUnit output with ``--raw_output=kunit``: - -.. code-block:: bash - - ./tools/testing/kunit/kunit.py run --raw_output=kunit - -If you have KUnit results in their raw TAP format, you can parse them and print -the human-readable summary with the ``parse`` command for kunit_tool. This -accepts a filename for an argument, or will read from standard input. - -.. code-block:: bash - - # Reading from a file - ./tools/testing/kunit/kunit.py parse /var/log/dmesg - # Reading from stdin - dmesg | ./tools/testing/kunit/kunit.py parse - -This is very useful if you wish to run tests in a configuration not supported -by kunit_tool (such as on real hardware, or an unsupported architecture). - -Filtering Tests -=============== - -It's possible to run only a subset of the tests built into a kernel by passing -a filter to the ``exec`` or ``run`` commands. For example, if you only wanted -to run KUnit resource tests, you could use: - -.. code-block:: bash - - ./tools/testing/kunit/kunit.py run 'kunit-resource*' - -This uses the standard glob format for wildcards. - -Running Tests on QEMU -===================== - -kunit_tool supports running tests on QEMU as well as via UML (as mentioned -elsewhere). The default way of running tests on QEMU requires two flags: - -``--arch`` - Selects a collection of configs (Kconfig as well as QEMU configs - options, etc) that allow KUnit tests to be run on the specified - architecture in a minimal way; this is usually not much slower than - using UML. The architecture argument is the same as the name of the - option passed to the ``ARCH`` variable used by Kbuild. Not all - architectures are currently supported by this flag, but can be handled - by the ``--qemu_config`` discussed later. If ``um`` is passed (or this - this flag is ignored) the tests will run via UML. Non-UML architectures, - e.g. i386, x86_64, arm, um, etc. Non-UML run on QEMU. - -``--cross_compile`` - Specifies the use of a toolchain by Kbuild. The argument passed here is - the same passed to the ``CROSS_COMPILE`` variable used by Kbuild. As a - reminder this will be the prefix for the toolchain binaries such as gcc - for example ``sparc64-linux-gnu-`` if you have the sparc toolchain - installed on your system, or - ``$HOME/toolchains/microblaze/gcc-9.2.0-nolibc/microblaze-linux/bin/microblaze-linux-`` - if you have downloaded the microblaze toolchain from the 0-day website - to a directory in your home directory called ``toolchains``. - -In many cases it is likely that you may want to run an architecture which is -not supported by the ``--arch`` flag, or you may want to just run KUnit tests -on QEMU using a non-default configuration. For this use case, you can write -your own QemuConfig. These QemuConfigs are written in Python. They must have an -import line ``from ..qemu_config import QemuArchParams`` at the top of the file -and the file must contain a variable called ``QEMU_ARCH`` that has an instance -of ``QemuArchParams`` assigned to it. An example can be seen in -``tools/testing/kunit/qemu_configs/x86_64.py``. - -Once you have a QemuConfig you can pass it into kunit_tool using the -``--qemu_config`` flag; when used this flag replaces the ``--arch`` flag. If we -were to do this with the ``x86_64.py`` example from above, the invocation would -look something like this: - -.. code-block:: bash - - ./tools/testing/kunit/kunit.py run \ - --timeout=60 \ - --jobs=12 \ - --qemu_config=./tools/testing/kunit/qemu_configs/x86_64.py - -Other Useful Options -==================== - -kunit_tool has a number of other command-line arguments which can be useful -when adapting it to fit your environment or needs. - -Some of the more useful ones are: - -``--help`` - Lists all of the available options. Note that different commands - (``config``, ``build``, ``run``, etc) will have different supported - options. Place ``--help`` before the command to list common options, - and after the command for options specific to that command. - -``--build_dir`` - Specifies the build directory that kunit_tool will use. This is where - the .kunitconfig file is located, as well as where the .config and - compiled kernel will be placed. Defaults to ``.kunit``. - -``--make_options`` - Specifies additional options to pass to ``make`` when compiling a - kernel (with the ``build`` or ``run`` commands). For example, to enable - compiler warnings, you can pass ``--make_options W=1``. - -``--alltests`` - Builds a UML kernel with all config options enabled using ``make - allyesconfig``. This allows you to run as many tests as is possible, - but is very slow and prone to breakage as new options are added or - modified. In most cases, enabling all tests which have satisfied - dependencies by adding ``CONFIG_KUNIT_ALL_TESTS=1`` to your - .kunitconfig is preferable. - -There are several other options (and new ones are often added), so do check -``--help`` if you're looking for something not mentioned here. diff --git a/Documentation/dev-tools/kunit/run_wrapper.rst b/Documentation/dev-tools/kunit/run_wrapper.rst index cce203138fb7..6b33caf6c8ab 100644 --- a/Documentation/dev-tools/kunit/run_wrapper.rst +++ b/Documentation/dev-tools/kunit/run_wrapper.rst @@ -1,8 +1,8 @@ .. SPDX-License-Identifier: GPL-2.0 -========================= -Run Tests with kunit_tool -========================= +============================= +Running tests with kunit_tool +============================= We can either run KUnit tests using kunit_tool or can run tests manually, and then use kunit_tool to parse the results. To run tests @@ -22,7 +22,7 @@ We should see the following: .. code-block:: - Generating .config... + Configuring KUnit Kernel ... Building KUnit kernel... Starting KUnit kernel... @@ -30,7 +30,7 @@ We may want to use the following options: .. code-block:: - ./tools/testing/kunit/kunit.py run --timeout=30 --jobs=`nproc --all + ./tools/testing/kunit/kunit.py run --timeout=30 --jobs=`nproc --all` - ``--timeout`` sets a maximum amount of time for tests to run. - ``--jobs`` sets the number of threads to build the kernel. @@ -58,8 +58,8 @@ To view kunit_tool flags (optional command-line arguments), run: ./tools/testing/kunit/kunit.py run --help -Create a ``.kunitconfig`` File -=============================== +Creating a ``.kunitconfig`` file +================================ If we want to run a specific set of tests (rather than those listed in the KUnit ``defconfig``), we can provide Kconfig options in the @@ -98,8 +98,8 @@ have not included the options dependencies. The build dir needs to be set for ``make menuconfig`` to work, therefore by default use ``make O=.kunit menuconfig``. -Configure, Build, and Run Tests -=============================== +Configuring, building, and running tests +======================================== If we want to make manual changes to the KUnit build process, we can run part of the KUnit build process independently. @@ -125,11 +125,11 @@ argument: ./tools/testing/kunit/kunit.py exec -The ``run`` command discussed in section: **Run Tests with kunit_tool**, +The ``run`` command discussed in section: **Running tests with kunit_tool**, is equivalent to running the above three commands in sequence. -Parse Test Results -================== +Parsing test results +==================== KUnit tests output displays results in TAP (Test Anything Protocol) format. When running tests, kunit_tool parses this output and prints @@ -152,8 +152,8 @@ standard input. # Reading from stdin dmesg | ./tools/testing/kunit/kunit.py parse -Run Selected Test Suites -======================== +Filtering tests +=============== By passing a bash style glob filter to the ``exec`` or ``run`` commands, we can run a subset of the tests built into a kernel . For @@ -165,8 +165,10 @@ example: if we only want to run KUnit resource tests, use: This uses the standard glob format with wildcard characters. -Run Tests on qemu -================= +.. _kunit-on-qemu: + +Running tests on QEMU +===================== kunit_tool supports running tests on qemu as well as via UML. To run tests on qemu, by default it requires two flags: @@ -229,8 +231,8 @@ as --jobs=12 \ --qemu_config=./tools/testing/kunit/qemu_configs/x86_64.py -Command-Line Arguments -====================== +Running command-line arguments +============================== kunit_tool has a number of other command-line arguments which can be useful for our test environment. Below are the most commonly used diff --git a/Documentation/dev-tools/kunit/start.rst b/Documentation/dev-tools/kunit/start.rst index 867a4bba6bf6..f4f504f1fb15 100644 --- a/Documentation/dev-tools/kunit/start.rst +++ b/Documentation/dev-tools/kunit/start.rst @@ -4,6 +4,10 @@ Getting Started =============== +This page contains an overview of the kunit_tool and KUnit framework, +teaching how to run existing tests and then how to write a simple test case, +and covers common problems users face when using KUnit for the first time. + Installing Dependencies ======================= KUnit has the same dependencies as the Linux kernel. As long as you can @@ -19,30 +23,53 @@ can run kunit_tool: ./tools/testing/kunit/kunit.py run -For more information on this wrapper, see: -Documentation/dev-tools/kunit/run_wrapper.rst. +.. note :: + You may see the following error: + "The source tree is not clean, please run 'make ARCH=um mrproper'" -Creating a ``.kunitconfig`` ---------------------------- + This happens because internally kunit.py specifies ``.kunit`` + (default option) as the build directory in the command ``make O=output/dir`` + through the argument ``--build_dir``. Hence, before starting an + out-of-tree build, the source tree must be clean. -By default, kunit_tool runs a selection of tests. However, you can specify which -unit tests to run by creating a ``.kunitconfig`` file with kernel config options -that enable only a specific set of tests and their dependencies. -The ``.kunitconfig`` file contains a list of kconfig options which are required -to run the desired targets. The ``.kunitconfig`` also contains any other test -specific config options, such as test dependencies. For example: the -``FAT_FS`` tests - ``FAT_KUNIT_TEST``, depends on -``FAT_FS``. ``FAT_FS`` can be enabled by selecting either ``MSDOS_FS`` -or ``VFAT_FS``. To run ``FAT_KUNIT_TEST``, the ``.kunitconfig`` has: + There is also the same caveat mentioned in the "Build directory for + the kernel" section of the :doc:`admin-guide </admin-guide/README>`, + that is, its use, it must be used for all invocations of ``make``. + The good news is that it can indeed be solved by running + ``make ARCH=um mrproper``, just be aware that this will delete the + current configuration and all generated files. -.. code-block:: none +If everything worked correctly, you should see the following: - CONFIG_KUNIT=y - CONFIG_MSDOS_FS=y - CONFIG_FAT_KUNIT_TEST=y +.. code-block:: -1. A good starting point for the ``.kunitconfig`` is the KUnit default config. - You can generate it by running: + Configuring KUnit Kernel ... + Building KUnit Kernel ... + Starting KUnit Kernel ... + +The tests will pass or fail. + +.. note :: + Because it is building a lot of sources for the first time, + the ``Building KUnit Kernel`` step may take a while. + +For detailed information on this wrapper, see: +Documentation/dev-tools/kunit/run_wrapper.rst. + +Selecting which tests to run +---------------------------- + +By default, kunit_tool runs all tests reachable with minimal configuration, +that is, using default values for most of the kconfig options. However, +you can select which tests to run by: + +- `Customizing Kconfig`_ used to compile the kernel, or +- `Filtering tests by name`_ to select specifically which compiled tests to run. + +Customizing Kconfig +~~~~~~~~~~~~~~~~~~~ +A good starting point for the ``.kunitconfig`` is the KUnit default config. +If you didn't run ``kunit.py run`` yet, you can generate it by running: .. code-block:: bash @@ -54,48 +81,69 @@ or ``VFAT_FS``. To run ``FAT_KUNIT_TEST``, the ``.kunitconfig`` has: ``.kunitconfig`` lives in the ``--build_dir`` used by kunit.py, which is ``.kunit`` by default. -.. note :: +Before running the tests, kunit_tool ensures that all config options +set in ``.kunitconfig`` are set in the kernel ``.config``. It will warn +you if you have not included dependencies for the options used. + +There are many ways to customize the configurations: + +a. Edit ``.kunit/.kunitconfig``. The file should contain the list of kconfig + options required to run the desired tests, including their dependencies. You may want to remove CONFIG_KUNIT_ALL_TESTS from the ``.kunitconfig`` as it will enable a number of additional tests that you may not want. + If you need to run on an architecture other than UML see :ref:`kunit-on-qemu`. -2. You can then add any other Kconfig options, for example: +b. Enable additional kconfig options on top of ``.kunit/.kunitconfig``. + For example, to include the kernel's linked-list test you can run:: -.. code-block:: none + ./tools/testing/kunit/kunit.py run \ + --kconfig_add CONFIG_LIST_KUNIT_TEST=y - CONFIG_LIST_KUNIT_TEST=y +c. Provide the path of one or more .kunitconfig files from the tree. + For example, to run only ``FAT_FS`` and ``EXT4`` tests you can run:: -Before running the tests, kunit_tool ensures that all config options -set in ``.kunitconfig`` are set in the kernel ``.config``. It will warn -you if you have not included dependencies for the options used. + ./tools/testing/kunit/kunit.py run \ + --kunitconfig ./fs/fat/.kunitconfig \ + --kunitconfig ./fs/ext4/.kunitconfig -.. note :: - If you change the ``.kunitconfig``, kunit.py will trigger a rebuild of the +d. If you change the ``.kunitconfig``, kunit.py will trigger a rebuild of the ``.config`` file. But you can edit the ``.config`` file directly or with tools like ``make menuconfig O=.kunit``. As long as its a superset of ``.kunitconfig``, kunit.py won't overwrite your changes. -Running Tests (KUnit Wrapper) ------------------------------ -1. To make sure that everything is set up correctly, invoke the Python - wrapper from your kernel repository: -.. code-block:: bash +.. note :: - ./tools/testing/kunit/kunit.py run + To save a .kunitconfig after finding a satisfactory configuration:: -If everything worked correctly, you should see the following: + make savedefconfig O=.kunit + cp .kunit/defconfig .kunit/.kunitconfig -.. code-block:: +Filtering tests by name +~~~~~~~~~~~~~~~~~~~~~~~ +If you want to be more specific than Kconfig can provide, it is also possible +to select which tests to execute at boot-time by passing a glob filter +(read instructions regarding the pattern in the manpage :manpage:`glob(7)`). +If there is a ``"."`` (period) in the filter, it will be interpreted as a +separator between the name of the test suite and the test case, +otherwise, it will be interpreted as the name of the test suite. +For example, let's assume we are using the default config: - Generating .config ... - Building KUnit Kernel ... - Starting KUnit Kernel ... +a. inform the name of a test suite, like ``"kunit_executor_test"``, + to run every test case it contains:: -The tests will pass or fail. + ./tools/testing/kunit/kunit.py run "kunit_executor_test" -.. note :: - Because it is building a lot of sources for the first time, the - ``Building KUnit kernel`` may take a while. +b. inform the name of a test case prefixed by its test suite, + like ``"example.example_simple_test"``, to run specifically that test case:: + + ./tools/testing/kunit/kunit.py run "example.example_simple_test" + +c. use wildcard characters (``*?[``) to run any test case that matches the pattern, + like ``"*.*64*"`` to run test cases containing ``"64"`` in the name inside + any test suite:: + + ./tools/testing/kunit/kunit.py run "*.*64*" Running Tests without the KUnit Wrapper ======================================= @@ -217,7 +265,7 @@ Now we are ready to write the test cases. obj-$(CONFIG_MISC_EXAMPLE_TEST) += example_test.o -4. Add the following lines to ``.kunitconfig``: +4. Add the following lines to ``.kunit/.kunitconfig``: .. code-block:: none @@ -254,7 +302,5 @@ Next Steps examples. * Documentation/dev-tools/kunit/api/index.rst - KUnit APIs used for testing. -* Documentation/dev-tools/kunit/kunit-tool.rst - kunit_tool helper - script. * Documentation/dev-tools/kunit/faq.rst - KUnit common questions and answers. diff --git a/Documentation/dev-tools/kunit/usage.rst b/Documentation/dev-tools/kunit/usage.rst index 44158eecb51e..2737863ef365 100644 --- a/Documentation/dev-tools/kunit/usage.rst +++ b/Documentation/dev-tools/kunit/usage.rst @@ -165,6 +165,8 @@ built as a module). For more information, see Documentation/dev-tools/kunit/api/test.rst. +.. _kunit-on-non-uml: + Writing Tests For Other Architectures ------------------------------------- @@ -544,8 +546,6 @@ By reusing the same ``cases`` array from above, we can write the test as a {} }; -.. _kunit-on-non-uml: - Exiting Early on Failed Expectations ------------------------------------ diff --git a/Documentation/devicetree/bindings/Makefile b/Documentation/devicetree/bindings/Makefile index 1eaccf135b30..bf2d8a8ced77 100644 --- a/Documentation/devicetree/bindings/Makefile +++ b/Documentation/devicetree/bindings/Makefile @@ -75,3 +75,6 @@ always-$(CHECK_DT_BINDING) += $(patsubst $(srctree)/$(src)/%.yaml,%.example.dtb, # build artifacts here before they are processed by scripts/Makefile.clean clean-files = $(shell find $(obj) \( -name '*.example.dts' -o \ -name '*.example.dtb' \) -delete 2>/dev/null) + +dt_compatible_check: $(obj)/processed-schema.json + $(Q)$(srctree)/scripts/dtc/dt-extract-compatibles $(srctree) | xargs dt-check-compatible -v -s $< diff --git a/Documentation/devicetree/bindings/arm/actions.yaml b/Documentation/devicetree/bindings/arm/actions.yaml index 02dc72c97645..e012f612f039 100644 --- a/Documentation/devicetree/bindings/arm/actions.yaml +++ b/Documentation/devicetree/bindings/arm/actions.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/actions.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Actions Semi platforms device tree bindings +title: Actions Semi platforms maintainers: - Andreas Färber <afaerber@suse.de> diff --git a/Documentation/devicetree/bindings/arm/airoha.yaml b/Documentation/devicetree/bindings/arm/airoha.yaml index fc19b1a6f37b..3292c669ee11 100644 --- a/Documentation/devicetree/bindings/arm/airoha.yaml +++ b/Documentation/devicetree/bindings/arm/airoha.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/airoha.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Airoha SoC based Platforms Device Tree Bindings +title: Airoha SoC based Platforms maintainers: - Felix Fietkau <nbd@nbd.name> diff --git a/Documentation/devicetree/bindings/arm/altera.yaml b/Documentation/devicetree/bindings/arm/altera.yaml index e6de1d7f516c..3eee03aa935c 100644 --- a/Documentation/devicetree/bindings/arm/altera.yaml +++ b/Documentation/devicetree/bindings/arm/altera.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/altera.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Altera's SoCFPGA platform device tree bindings +title: Altera's SoCFPGA platform maintainers: - Dinh Nguyen <dinguyen@kernel.org> diff --git a/Documentation/devicetree/bindings/arm/amazon,al.yaml b/Documentation/devicetree/bindings/arm/amazon,al.yaml index 0f03135d91b6..37dbb4768e5b 100644 --- a/Documentation/devicetree/bindings/arm/amazon,al.yaml +++ b/Documentation/devicetree/bindings/arm/amazon,al.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/amazon,al.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Amazon's Annapurna Labs Alpine Platform Device Tree Bindings +title: Amazon's Annapurna Labs Alpine Platform maintainers: - Hanna Hawa <hhhawa@amazon.com> diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documentation/devicetree/bindings/arm/amlogic.yaml index 61a6cabb375b..9fda2436c618 100644 --- a/Documentation/devicetree/bindings/arm/amlogic.yaml +++ b/Documentation/devicetree/bindings/arm/amlogic.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/amlogic.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Amlogic MesonX device tree bindings +title: Amlogic MesonX maintainers: - Kevin Hilman <khilman@baylibre.com> @@ -120,6 +120,7 @@ properties: - enum: - amlogic,q200 - amlogic,q201 + - azw,gt1-ultimate - khadas,vim2 - kingnovel,r-box-pro - libretech,aml-s912-pc @@ -136,6 +137,7 @@ properties: - enum: - amlogic,s400 - jethome,jethub-j100 + - jethome,jethub-j110 - const: amlogic,a113d - const: amlogic,meson-axg diff --git a/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-gx-ao-secure.yaml b/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-gx-ao-secure.yaml index 6cc74523ebfd..1748f1605cc7 100644 --- a/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-gx-ao-secure.yaml +++ b/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-gx-ao-secure.yaml @@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#" title: Amlogic Meson Firmware registers Interface maintainers: - - Neil Armstrong <narmstrong@baylibre.com> + - Neil Armstrong <neil.armstrong@linaro.org> description: | The Meson SoCs have a register bank with status and data shared with the diff --git a/Documentation/devicetree/bindings/arm/apple.yaml b/Documentation/devicetree/bindings/arm/apple.yaml index 8d93e8a6cc18..7262f3c09867 100644 --- a/Documentation/devicetree/bindings/arm/apple.yaml +++ b/Documentation/devicetree/bindings/arm/apple.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/apple.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Apple ARM Machine Device Tree Bindings +title: Apple ARM Machine maintainers: - Hector Martin <marcan@marcan.st> diff --git a/Documentation/devicetree/bindings/arm/arm,cci-400.yaml b/Documentation/devicetree/bindings/arm/arm,cci-400.yaml index 1706134b75a3..d28303d909e1 100644 --- a/Documentation/devicetree/bindings/arm/arm,cci-400.yaml +++ b/Documentation/devicetree/bindings/arm/arm,cci-400.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/arm,cci-400.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: ARM CCI Cache Coherent Interconnect Device Tree Binding +title: ARM CCI Cache Coherent Interconnect maintainers: - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-catu.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-catu.yaml index d783d9276124..2bae06eed693 100644 --- a/Documentation/devicetree/bindings/arm/arm,coresight-catu.yaml +++ b/Documentation/devicetree/bindings/arm/arm,coresight-catu.yaml @@ -61,6 +61,9 @@ properties: maxItems: 1 description: Address translation error interrupt + power-domains: + maxItems: 1 + in-ports: $ref: /schemas/graph.yaml#/properties/ports additionalProperties: false diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml index 72ffe4d1e948..0c5b875cb654 100644 --- a/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml +++ b/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml @@ -98,6 +98,9 @@ properties: base cti node if compatible string arm,coresight-cti-v8-arch is used, or may appear in a trig-conns child node when appropriate. + power-domains: + maxItems: 1 + arm,cti-ctm-id: $ref: /schemas/types.yaml#/definitions/uint32 description: diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-dynamic-funnel.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-dynamic-funnel.yaml index 1eeedc22857c..44a1041cb0fc 100644 --- a/Documentation/devicetree/bindings/arm/arm,coresight-dynamic-funnel.yaml +++ b/Documentation/devicetree/bindings/arm/arm,coresight-dynamic-funnel.yaml @@ -54,6 +54,9 @@ properties: - const: apb_pclk - const: atclk + power-domains: + maxItems: 1 + in-ports: $ref: /schemas/graph.yaml#/properties/ports diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-dynamic-replicator.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-dynamic-replicator.yaml index a26ed9214e00..03792e9bd97a 100644 --- a/Documentation/devicetree/bindings/arm/arm,coresight-dynamic-replicator.yaml +++ b/Documentation/devicetree/bindings/arm/arm,coresight-dynamic-replicator.yaml @@ -54,6 +54,9 @@ properties: - const: apb_pclk - const: atclk + power-domains: + maxItems: 1 + qcom,replicator-loses-context: type: boolean description: diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-etb10.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-etb10.yaml index fd06ede26ceb..90679788e0bf 100644 --- a/Documentation/devicetree/bindings/arm/arm,coresight-etb10.yaml +++ b/Documentation/devicetree/bindings/arm/arm,coresight-etb10.yaml @@ -54,6 +54,9 @@ properties: - const: apb_pclk - const: atclk + power-domains: + maxItems: 1 + in-ports: $ref: /schemas/graph.yaml#/properties/ports additionalProperties: false diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-etm.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-etm.yaml index e0377ce48537..01200f67504a 100644 --- a/Documentation/devicetree/bindings/arm/arm,coresight-etm.yaml +++ b/Documentation/devicetree/bindings/arm/arm,coresight-etm.yaml @@ -73,6 +73,9 @@ properties: - const: apb_pclk - const: atclk + power-domains: + maxItems: 1 + arm,coresight-loses-context-with-cpu: type: boolean description: diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-static-funnel.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-static-funnel.yaml index 374083956b20..cc8c3baa79b4 100644 --- a/Documentation/devicetree/bindings/arm/arm,coresight-static-funnel.yaml +++ b/Documentation/devicetree/bindings/arm/arm,coresight-static-funnel.yaml @@ -27,6 +27,9 @@ properties: compatible: const: arm,coresight-static-funnel + power-domains: + maxItems: 1 + in-ports: $ref: /schemas/graph.yaml#/properties/ports diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-static-replicator.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-static-replicator.yaml index a34d8583830c..1892a091ac35 100644 --- a/Documentation/devicetree/bindings/arm/arm,coresight-static-replicator.yaml +++ b/Documentation/devicetree/bindings/arm/arm,coresight-static-replicator.yaml @@ -27,6 +27,9 @@ properties: compatible: const: arm,coresight-static-replicator + power-domains: + maxItems: 1 + in-ports: $ref: /schemas/graph.yaml#/properties/ports additionalProperties: false diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-stm.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-stm.yaml index 905008faa012..378380c3f5aa 100644 --- a/Documentation/devicetree/bindings/arm/arm,coresight-stm.yaml +++ b/Documentation/devicetree/bindings/arm/arm,coresight-stm.yaml @@ -61,6 +61,9 @@ properties: - const: apb_pclk - const: atclk + power-domains: + maxItems: 1 + out-ports: $ref: /schemas/graph.yaml#/properties/ports additionalProperties: false diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml index 3463b6e53aef..cb8dceaca70e 100644 --- a/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml +++ b/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml @@ -55,6 +55,12 @@ properties: - const: apb_pclk - const: atclk + iommus: + maxItems: 1 + + power-domains: + maxItems: 1 + arm,buffer-size: $ref: /schemas/types.yaml#/definitions/uint32 deprecated: true diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-tpiu.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-tpiu.yaml index e80d48200c37..61a0cdc27745 100644 --- a/Documentation/devicetree/bindings/arm/arm,coresight-tpiu.yaml +++ b/Documentation/devicetree/bindings/arm/arm,coresight-tpiu.yaml @@ -54,6 +54,9 @@ properties: - const: apb_pclk - const: atclk + power-domains: + maxItems: 1 + in-ports: $ref: /schemas/graph.yaml#/properties/ports additionalProperties: false diff --git a/Documentation/devicetree/bindings/arm/arm,corstone1000.yaml b/Documentation/devicetree/bindings/arm/arm,corstone1000.yaml index a77f88223801..693f3fe7be60 100644 --- a/Documentation/devicetree/bindings/arm/arm,corstone1000.yaml +++ b/Documentation/devicetree/bindings/arm/arm,corstone1000.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/arm,corstone1000.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: ARM Corstone1000 Device Tree Bindings +title: ARM Corstone1000 maintainers: - Vishnu Banavath <vishnu.banavath@arm.com> diff --git a/Documentation/devicetree/bindings/arm/arm,embedded-trace-extension.yaml b/Documentation/devicetree/bindings/arm/arm,embedded-trace-extension.yaml index 5f07fb166c56..108460627d9a 100644 --- a/Documentation/devicetree/bindings/arm/arm,embedded-trace-extension.yaml +++ b/Documentation/devicetree/bindings/arm/arm,embedded-trace-extension.yaml @@ -33,6 +33,9 @@ properties: Handle to the cpu this ETE is bound to. $ref: /schemas/types.yaml#/definitions/phandle + power-domains: + maxItems: 1 + out-ports: description: | Output connections from the ETE to legacy CoreSight trace bus. diff --git a/Documentation/devicetree/bindings/arm/arm,integrator.yaml b/Documentation/devicetree/bindings/arm/arm,integrator.yaml index 528eee64290a..98ff5698ae1f 100644 --- a/Documentation/devicetree/bindings/arm/arm,integrator.yaml +++ b/Documentation/devicetree/bindings/arm/arm,integrator.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/arm,integrator.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: ARM Integrator Boards Device Tree Bindings +title: ARM Integrator Boards maintainers: - Linus Walleij <linus.walleij@linaro.org> diff --git a/Documentation/devicetree/bindings/arm/arm,realview.yaml b/Documentation/devicetree/bindings/arm/arm,realview.yaml index 4f9b21f49e84..8d3ed2e4ed31 100644 --- a/Documentation/devicetree/bindings/arm/arm,realview.yaml +++ b/Documentation/devicetree/bindings/arm/arm,realview.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/arm,realview.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: ARM RealView Boards Device Tree Bindings +title: ARM RealView Boards maintainers: - Linus Walleij <linus.walleij@linaro.org> diff --git a/Documentation/devicetree/bindings/arm/arm,versatile-sysreg.yaml b/Documentation/devicetree/bindings/arm/arm,versatile-sysreg.yaml new file mode 100644 index 000000000000..491eef1e1b10 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/arm,versatile-sysreg.yaml @@ -0,0 +1,35 @@ +# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/arm,versatile-sysreg.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Arm Versatile system registers + +maintainers: + - Linus Walleij <linus.walleij@linaro.org> + +description: + This is a system control registers block, providing multiple low level + platform functions like board detection and identification, software + interrupt generation, MMC and NOR Flash control, etc. + +properties: + compatible: + items: + - const: arm,versatile-sysreg + - const: syscon + - const: simple-mfd + + reg: + maxItems: 1 + + panel: + type: object + +required: + - compatible + - reg + +additionalProperties: false +... diff --git a/Documentation/devicetree/bindings/arm/arm,versatile.yaml b/Documentation/devicetree/bindings/arm/arm,versatile.yaml index 34b437c72751..13e52ba92060 100644 --- a/Documentation/devicetree/bindings/arm/arm,versatile.yaml +++ b/Documentation/devicetree/bindings/arm/arm,versatile.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/arm,versatile.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: ARM Versatile Boards Device Tree Bindings +title: ARM Versatile Boards maintainers: - Linus Walleij <linus.walleij@linaro.org> diff --git a/Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml b/Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml index a4b4452afc1d..eec190a96225 100644 --- a/Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml +++ b/Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/arm,vexpress-juno.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: ARM Versatile Express and Juno Boards Device Tree Bindings +title: ARM Versatile Express and Juno Boards maintainers: - Sudeep Holla <sudeep.holla@arm.com> diff --git a/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml b/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml index 1895ce9de461..217a1d674863 100644 --- a/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml +++ b/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml @@ -29,6 +29,7 @@ properties: - description: AST2500 based boards items: - enum: + - amd,daytonax-bmc - amd,ethanolx-bmc - ampere,mtjade-bmc - aspeed,ast2500-evb @@ -69,6 +70,7 @@ properties: - description: AST2600 based boards items: - enum: + - ampere,mtmitchell-bmc - aspeed,ast2600-evb - aspeed,ast2600-evb-a1 - facebook,bletchley-bmc diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.yaml b/Documentation/devicetree/bindings/arm/atmel-at91.yaml index 2b7848bb7769..2224b18801a1 100644 --- a/Documentation/devicetree/bindings/arm/atmel-at91.yaml +++ b/Documentation/devicetree/bindings/arm/atmel-at91.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/atmel-at91.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Atmel AT91 device tree bindings. +title: Atmel AT91. maintainers: - Alexandre Belloni <alexandre.belloni@bootlin.com> @@ -127,6 +127,13 @@ properties: - const: atmel,sama5d3 - const: atmel,sama5 + - description: Microchip SAMA5D3 Ethernet Development System Board + items: + - const: microchip,sama5d3-eds + - const: atmel,sama5d36 + - const: atmel,sama5d3 + - const: atmel,sama5 + - description: CalAmp LMU5000 board items: - const: calamp,lmu5000 diff --git a/Documentation/devicetree/bindings/arm/axxia.yaml b/Documentation/devicetree/bindings/arm/axxia.yaml index e0d2bb71cf50..d60907e43efc 100644 --- a/Documentation/devicetree/bindings/arm/axxia.yaml +++ b/Documentation/devicetree/bindings/arm/axxia.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/axxia.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Axxia AXM55xx device tree bindings +title: Axxia AXM55xx maintainers: - Anders Berg <anders.berg@lsi.com> diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4908.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4908.yaml deleted file mode 100644 index 9b745531ff04..000000000000 --- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4908.yaml +++ /dev/null @@ -1,42 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/arm/bcm/brcm,bcm4908.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Broadcom BCM4908 device tree bindings - -description: - Broadcom BCM4906 / BCM4908 / BCM49408 Wi-Fi/network SoCs with Brahma CPUs. - -maintainers: - - RafaÅ‚ MiÅ‚ecki <rafal@milecki.pl> - -properties: - $nodename: - const: '/' - compatible: - oneOf: - - description: BCM4906 based boards - items: - - enum: - - netgear,r8000p - - tplink,archer-c2300-v1 - - const: brcm,bcm4906 - - const: brcm,bcm4908 - - - description: BCM4908 based boards - items: - - enum: - - asus,gt-ac5300 - - netgear,raxe500 - - const: brcm,bcm4908 - - - description: BCM49408 based boards - items: - - const: brcm,bcm49408 - - const: brcm,bcm4908 - -additionalProperties: true - -... diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml index 324e59104360..84866e29cab0 100644 --- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml +++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml @@ -15,6 +15,7 @@ maintainers: - William Zhang <william.zhang@broadcom.com> - Anand Gore <anand.gore@broadcom.com> - Kursad Oney <kursad.oney@broadcom.com> + - RafaÅ‚ MiÅ‚ecki <rafal@milecki.pl> properties: $nodename: @@ -28,6 +29,30 @@ properties: - const: brcm,bcm47622 - const: brcm,bcmbca + - description: BCM4906 based boards + items: + - enum: + - netgear,r8000p + - tplink,archer-c2300-v1 + - const: brcm,bcm4906 + - const: brcm,bcm4908 + - const: brcm,bcmbca + + - description: BCM4908 based boards + items: + - enum: + - asus,gt-ac5300 + - brcm,bcm94908 + - netgear,raxe500 + - const: brcm,bcm4908 + - const: brcm,bcmbca + + - description: BCM49408 based boards + items: + - const: brcm,bcm49408 + - const: brcm,bcm4908 + - const: brcm,bcmbca + - description: BCM4912 based boards items: - enum: diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt index 104cc9b41df4..071421dbc4d0 100644 --- a/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt +++ b/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt @@ -187,15 +187,8 @@ Required properties: Sequencer DRAM parameters and control registers. Used for Self-Refresh Power-Down (SRPD), among other things. -Required properties: -- compatible : should contain one of these - "brcm,brcmstb-memc-ddr-rev-b.2.1" - "brcm,brcmstb-memc-ddr-rev-b.2.2" - "brcm,brcmstb-memc-ddr-rev-b.2.3" - "brcm,brcmstb-memc-ddr-rev-b.3.0" - "brcm,brcmstb-memc-ddr-rev-b.3.1" - "brcm,brcmstb-memc-ddr" -- reg : the MEMC DDR register range +See Documentation/devicetree/bindings/memory-controllers/brcm,brcmstb-memc-ddr.yaml for a +full list of supported compatible strings and properties. Example: diff --git a/Documentation/devicetree/bindings/arm/bitmain.yaml b/Documentation/devicetree/bindings/arm/bitmain.yaml index 90ba02be48ce..55a5a570b5bc 100644 --- a/Documentation/devicetree/bindings/arm/bitmain.yaml +++ b/Documentation/devicetree/bindings/arm/bitmain.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/bitmain.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Bitmain platform device tree bindings +title: Bitmain platform maintainers: - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> diff --git a/Documentation/devicetree/bindings/arm/calxeda.yaml b/Documentation/devicetree/bindings/arm/calxeda.yaml index 46f78addebb0..3e9f5e1d862e 100644 --- a/Documentation/devicetree/bindings/arm/calxeda.yaml +++ b/Documentation/devicetree/bindings/arm/calxeda.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/calxeda.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Calxeda Platforms Device Tree Bindings +title: Calxeda Platforms maintainers: - Rob Herring <robh@kernel.org> diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index a07c5bac7c46..5c13b73e4d57 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -174,6 +174,7 @@ properties: - nvidia,tegra194-carmel - qcom,krait - qcom,kryo + - qcom,kryo240 - qcom,kryo250 - qcom,kryo260 - qcom,kryo280 diff --git a/Documentation/devicetree/bindings/arm/digicolor.yaml b/Documentation/devicetree/bindings/arm/digicolor.yaml index a35de3c9e284..0cf9ddaa527e 100644 --- a/Documentation/devicetree/bindings/arm/digicolor.yaml +++ b/Documentation/devicetree/bindings/arm/digicolor.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/digicolor.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Conexant Digicolor Platforms Device Tree Bindings +title: Conexant Digicolor Platforms maintainers: - Baruch Siach <baruch@tkos.co.il> diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 7431579ab0e8..fbfc4f99c01e 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/fsl.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Freescale i.MX Platforms Device Tree Bindings +title: Freescale i.MX Platforms maintainers: - Shawn Guo <shawnguo@kernel.org> @@ -554,8 +554,7 @@ properties: - engicam,imx6ul-isiot # Engicam Is.IoT MX6UL eMMC/NAND Starter kit - fsl,imx6ul-14x14-evk # i.MX6 UltraLite 14x14 EVK Board - karo,imx6ul-tx6ul # Ka-Ro electronics TXUL-0010 Module - - kontron,imx6ul-n6310-som # Kontron N6310 SOM - - kontron,imx6ul-n6311-som # Kontron N6311 SOM + - kontron,sl-imx6ul # Kontron SL i.MX6UL SoM - prt,prti6g # Protonic PRTI6G Board - technexion,imx6ul-pico-dwarf # TechNexion i.MX6UL Pico-Dwarf - technexion,imx6ul-pico-hobbit # TechNexion i.MX6UL Pico-Hobbit @@ -591,23 +590,17 @@ properties: - const: phytec,imx6ul-pcl063 # PHYTEC phyCORE-i.MX 6UL - const: fsl,imx6ul - - description: Kontron N6310 S Board + - description: Kontron BL i.MX6UL (N631X S) Board items: - - const: kontron,imx6ul-n6310-s - - const: kontron,imx6ul-n6310-som + - const: kontron,bl-imx6ul # Kontron BL i.MX6UL Carrier Board + - const: kontron,sl-imx6ul # Kontron SL i.MX6UL SoM - const: fsl,imx6ul - - description: Kontron N6311 S Board + - description: Kontron BL i.MX6UL 43 (N631X S 43) Board items: - - const: kontron,imx6ul-n6311-s - - const: kontron,imx6ul-n6311-som - - const: fsl,imx6ul - - - description: Kontron N6310 S 43 Board - items: - - const: kontron,imx6ul-n6310-s-43 - - const: kontron,imx6ul-n6310-s - - const: kontron,imx6ul-n6310-som + - const: kontron,bl-imx6ul-43 # Kontron BL i.MX6UL Carrier Board with 4.3" Display + - const: kontron,bl-imx6ul # Kontron BL i.MX6UL Carrier Board + - const: kontron,sl-imx6ul # Kontron SL i.MX6UL SoM - const: fsl,imx6ul - description: TQ-Systems TQMa6UL1 SoM on MBa6ULx board @@ -637,7 +630,7 @@ properties: - enum: - fsl,imx6ull-14x14-evk # i.MX6 UltraLiteLite 14x14 EVK Board - joz,jozacp # JOZ Access Point - - kontron,imx6ull-n6411-som # Kontron N6411 SOM + - kontron,sl-imx6ull # Kontron SL i.MX6ULL SoM - myir,imx6ull-mys-6ulx-eval # MYiR Tech iMX6ULL Evaluation Board - toradex,colibri-imx6ull # Colibri iMX6ULL Modules - toradex,colibri-imx6ull-emmc # Colibri iMX6ULL 1GB (eMMC) Module @@ -698,10 +691,10 @@ properties: - const: toradex,colibri-imx6ull-wifi # Colibri iMX6ULL Wi-Fi / BT Module - const: fsl,imx6ull - - description: Kontron N6411 S Board + - description: Kontron BL i.MX6ULL (N6411 S) Board items: - - const: kontron,imx6ull-n6411-s - - const: kontron,imx6ull-n6411-som + - const: kontron,bl-imx6ull # Kontron BL i.MX6ULL Carrier Board + - const: kontron,sl-imx6ull # Kontron SL i.MX6ULL SoM - const: fsl,imx6ull - description: TQ Systems TQMa6ULLx SoM on MBa6ULx board @@ -825,13 +818,15 @@ properties: - emtrion,emcon-mx8mm-avari # emCON-MX8MM SoM on Avari Base - fsl,imx8mm-ddr4-evk # i.MX8MM DDR4 EVK Board - fsl,imx8mm-evk # i.MX8MM EVK Board + - gateworks,imx8mm-gw7904 - gw,imx8mm-gw71xx-0x # i.MX8MM Gateworks Development Kit - gw,imx8mm-gw72xx-0x # i.MX8MM Gateworks Development Kit - gw,imx8mm-gw73xx-0x # i.MX8MM Gateworks Development Kit - gw,imx8mm-gw7901 # i.MX8MM Gateworks Board - gw,imx8mm-gw7902 # i.MX8MM Gateworks Board - gw,imx8mm-gw7903 # i.MX8MM Gateworks Board - - kontron,imx8mm-n801x-som # i.MX8MM Kontron SL (N801X) SOM + - kontron,imx8mm-sl # i.MX8MM Kontron SL (N801X) SOM + - kontron,imx8mm-osm-s # i.MX8MM Kontron OSM-S (N802X) SOM - menlo,mx8menlo # i.MX8MM Menlo board with Verdin SoM - toradex,verdin-imx8mm # Verdin iMX8M Mini Modules - toradex,verdin-imx8mm-nonwifi # Verdin iMX8M Mini Modules without Wi-Fi / BT @@ -850,8 +845,14 @@ properties: - description: Kontron BL i.MX8MM (N801X S) Board items: - - const: kontron,imx8mm-n801x-s - - const: kontron,imx8mm-n801x-som + - const: kontron,imx8mm-bl + - const: kontron,imx8mm-sl + - const: fsl,imx8mm + + - description: Kontron BL i.MX8MM OSM-S (N802X S) Board + items: + - const: kontron,imx8mm-bl-osm-s + - const: kontron,imx8mm-osm-s - const: fsl,imx8mm - description: Toradex Boards with Verdin iMX8M Mini Modules @@ -936,6 +937,13 @@ properties: - toradex,verdin-imx8mp-wifi # Verdin iMX8M Plus Wi-Fi / BT Modules - const: fsl,imx8mp + - description: Avnet (MSC Branded) Boards with SM2S i.MX8M Plus Modules + items: + - const: avnet,sm2s-imx8mp-14N0600E-ep1 # SM2S-IMX8PLUS-14N0600E on SM2-MB-EP1 Carrier Board + - const: avnet,sm2s-imx8mp-14N0600E # 14N0600E variant of SM2S-IMX8PLUS SoM + - const: avnet,sm2s-imx8mp # SM2S-IMX8PLUS SoM + - const: fsl,imx8mp + - description: Engicam i.Core MX8M Plus SoM based boards items: - enum: @@ -1034,6 +1042,12 @@ properties: - toradex,colibri-imx8x # Colibri iMX8X Modules - const: fsl,imx8qxp + - description: i.MX8DXL based Boards + items: + - enum: + - fsl,imx8dxl-evk # i.MX8DXL EVK Board + - const: fsl,imx8dxl + - description: i.MX8QXP Boards with Toradex Coilbri iMX8X Modules items: - enum: diff --git a/Documentation/devicetree/bindings/arm/intel,keembay.yaml b/Documentation/devicetree/bindings/arm/intel,keembay.yaml index 107e686ab207..53d2ce02b207 100644 --- a/Documentation/devicetree/bindings/arm/intel,keembay.yaml +++ b/Documentation/devicetree/bindings/arm/intel,keembay.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/intel,keembay.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Keem Bay platform device tree bindings +title: Keem Bay platform maintainers: - Paul J. Murphy <paul.j.murphy@intel.com> diff --git a/Documentation/devicetree/bindings/arm/intel,socfpga.yaml b/Documentation/devicetree/bindings/arm/intel,socfpga.yaml index 61a454a40e87..4b4dcf551eb6 100644 --- a/Documentation/devicetree/bindings/arm/intel,socfpga.yaml +++ b/Documentation/devicetree/bindings/arm/intel,socfpga.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/intel,socfpga.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Intel SoCFPGA platform device tree bindings +title: Intel SoCFPGA platform maintainers: - Dinh Nguyen <dinguyen@kernel.org> diff --git a/Documentation/devicetree/bindings/arm/intel-ixp4xx.yaml b/Documentation/devicetree/bindings/arm/intel-ixp4xx.yaml index 230bffeec0e5..553dcbc70e35 100644 --- a/Documentation/devicetree/bindings/arm/intel-ixp4xx.yaml +++ b/Documentation/devicetree/bindings/arm/intel-ixp4xx.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/intel-ixp4xx.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Intel IXP4xx Device Tree Bindings +title: Intel IXP4xx maintainers: - Linus Walleij <linus.walleij@linaro.org> diff --git a/Documentation/devicetree/bindings/arm/marvell/armada-37xx.txt b/Documentation/devicetree/bindings/arm/marvell/armada-37xx.txt index f6d6642d81c0..29fa93dad52b 100644 --- a/Documentation/devicetree/bindings/arm/marvell/armada-37xx.txt +++ b/Documentation/devicetree/bindings/arm/marvell/armada-37xx.txt @@ -1,21 +1,3 @@ -Marvell Armada 37xx Platforms Device Tree Bindings --------------------------------------------------- - -Boards using a SoC of the Marvell Armada 37xx family must carry the -following root node property: - - - compatible: must contain "marvell,armada3710" - -In addition, boards using the Marvell Armada 3720 SoC shall have the -following property before the previous one: - - - compatible: must contain "marvell,armada3720" - -Example: - -compatible = "marvell,armada-3720-db", "marvell,armada3720", "marvell,armada3710"; - - Power management ---------------- @@ -48,11 +30,3 @@ avs: avs@11500 { compatible = "marvell,armada-3700-avs", "syscon"; reg = <0x11500 0x40>; } - - -CZ.NIC's Turris Mox SOHO router Device Tree Bindings ----------------------------------------------------- - -Required root node property: - - - compatible: must contain "cznic,turris-mox" diff --git a/Documentation/devicetree/bindings/arm/marvell/armada-37xx.yaml b/Documentation/devicetree/bindings/arm/marvell/armada-37xx.yaml new file mode 100644 index 000000000000..6905d29f3108 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/marvell/armada-37xx.yaml @@ -0,0 +1,47 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/marvell/armada-37xx.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Armada 37xx Platforms + +maintainers: + - Robert Marko <robert.marko@sartura.hr> + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - description: Armada 3720 SoC boards + items: + - enum: + - cznic,turris-mox + - globalscale,espressobin + - marvell,armada-3720-db + - methode,edpu + - methode,udpu + - const: marvell,armada3720 + - const: marvell,armada3710 + + - description: Globalscale Espressobin boards + items: + - enum: + - globalscale,espressobin-emmc + - globalscale,espressobin-ultra + - globalscale,espressobin-v7 + - const: globalscale,espressobin + - const: marvell,armada3720 + - const: marvell,armada3710 + + - description: Globalscale Espressobin V7 boards + items: + - enum: + - globalscale,espressobin-v7-emmc + - const: globalscale,espressobin-v7 + - const: globalscale,espressobin + - const: marvell,armada3720 + - const: marvell,armada3710 + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml index 07c0ea94e850..d76ce4c3819d 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/mediatek.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: MediaTek SoC based Platforms Device Tree Bindings +title: MediaTek SoC based Platforms maintainers: - Sean Wang <sean.wang@mediatek.com> diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.yaml index 8681b785ed6d..1d7c837d9378 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.yaml @@ -23,6 +23,7 @@ properties: - mediatek,mt2701-infracfg - mediatek,mt2712-infracfg - mediatek,mt6765-infracfg + - mediatek,mt6795-infracfg - mediatek,mt6779-infracfg_ao - mediatek,mt6797-infracfg - mediatek,mt7622-infracfg @@ -60,6 +61,7 @@ if: enum: - mediatek,mt2701-infracfg - mediatek,mt2712-infracfg + - mediatek,mt6795-infracfg - mediatek,mt7622-infracfg - mediatek,mt7986-infracfg - mediatek,mt8135-infracfg diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml index 6ad023eec193..eb451bec23d3 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml @@ -25,6 +25,7 @@ properties: - mediatek,mt2712-mmsys - mediatek,mt6765-mmsys - mediatek,mt6779-mmsys + - mediatek,mt6795-mmsys - mediatek,mt6797-mmsys - mediatek,mt8167-mmsys - mediatek,mt8173-mmsys @@ -52,7 +53,8 @@ properties: description: Using mailbox to communicate with GCE, it should have this property and list of phandle, mailbox specifiers. See - Documentation/devicetree/bindings/mailbox/mtk-gce.txt for details. + Documentation/devicetree/bindings/mailbox/mediatek,gce-mailbox.yaml + for details. $ref: /schemas/types.yaml#/definitions/phandle-array mediatek,gce-client-reg: diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7622-wed.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7622-wed.yaml index 787d6673f952..84fb0a146b6e 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7622-wed.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7622-wed.yaml @@ -20,6 +20,7 @@ properties: items: - enum: - mediatek,mt7622-wed + - mediatek,mt7986-wed - const: syscon reg: diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wed-pcie.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wed-pcie.yaml new file mode 100644 index 000000000000..96221f51c1c3 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wed-pcie.yaml @@ -0,0 +1,43 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/arm/mediatek/mediatek,mt7986-wed-pcie.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: MediaTek PCIE WED Controller for MT7986 + +maintainers: + - Lorenzo Bianconi <lorenzo@kernel.org> + - Felix Fietkau <nbd@nbd.name> + +description: + The mediatek WED PCIE provides a configuration interface for PCIE + controller on MT7986 soc. + +properties: + compatible: + items: + - enum: + - mediatek,mt7986-wed-pcie + - const: syscon + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + soc { + #address-cells = <2>; + #size-cells = <2>; + wed_pcie: wed-pcie@10003000 { + compatible = "mediatek,mt7986-wed-pcie", + "syscon"; + reg = <0 0x10003000 0 0x10>; + }; + }; diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml index 8585f6f18f69..ef62cbb13590 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml @@ -21,6 +21,7 @@ properties: - mediatek,mt2701-pericfg - mediatek,mt2712-pericfg - mediatek,mt6765-pericfg + - mediatek,mt6795-pericfg - mediatek,mt7622-pericfg - mediatek,mt7629-pericfg - mediatek,mt8135-pericfg diff --git a/Documentation/devicetree/bindings/arm/microchip,sparx5.yaml b/Documentation/devicetree/bindings/arm/microchip,sparx5.yaml index 6193388c6318..9a0d54e9799c 100644 --- a/Documentation/devicetree/bindings/arm/microchip,sparx5.yaml +++ b/Documentation/devicetree/bindings/arm/microchip,sparx5.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/microchip,sparx5.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Microchip Sparx5 Boards Device Tree Bindings +title: Microchip Sparx5 Boards maintainers: - Lars Povlsen <lars.povlsen@microchip.com> diff --git a/Documentation/devicetree/bindings/arm/moxart.yaml b/Documentation/devicetree/bindings/arm/moxart.yaml index 670d24ce8ec5..42565280914c 100644 --- a/Documentation/devicetree/bindings/arm/moxart.yaml +++ b/Documentation/devicetree/bindings/arm/moxart.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/moxart.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: MOXA ART device tree bindings +title: MOXA ART maintainers: - Jonas Jensen <jonas.jensen@gmail.com> diff --git a/Documentation/devicetree/bindings/arm/nvidia,tegra194-ccplex.yaml b/Documentation/devicetree/bindings/arm/nvidia,tegra194-ccplex.yaml index c9675c4cdc1b..b6f57d79a753 100644 --- a/Documentation/devicetree/bindings/arm/nvidia,tegra194-ccplex.yaml +++ b/Documentation/devicetree/bindings/arm/nvidia,tegra194-ccplex.yaml @@ -4,7 +4,7 @@ $id: "http://devicetree.org/schemas/arm/nvidia,tegra194-ccplex.yaml#" $schema: "http://devicetree.org/meta-schemas/core.yaml#" -title: NVIDIA Tegra194 CPU Complex device tree bindings +title: NVIDIA Tegra194 CPU Complex maintainers: - Thierry Reding <thierry.reding@gmail.com> diff --git a/Documentation/devicetree/bindings/arm/psci.yaml b/Documentation/devicetree/bindings/arm/psci.yaml index dd83ef278af0..3a2c908ff282 100644 --- a/Documentation/devicetree/bindings/arm/psci.yaml +++ b/Documentation/devicetree/bindings/arm/psci.yaml @@ -43,29 +43,24 @@ properties: - description: For implementations complying to PSCI 0.2. - const: arm,psci-0.2 - - - description: - For implementations complying to PSCI 0.2. Function IDs are not required and should be ignored by an OS with PSCI 0.2 support, but are permitted to be present for compatibility with existing software when "arm,psci" is later in the compatible list. + minItems: 1 items: - const: arm,psci-0.2 - const: arm,psci - description: For implementations complying to PSCI 1.0. - const: arm,psci-1.0 - - - description: - For implementations complying to PSCI 1.0. PSCI 1.0 is backward compatible with PSCI 0.2 with minor specification updates, as defined in the PSCI specification[2]. + minItems: 1 items: - const: arm,psci-1.0 - const: arm,psci-0.2 + - const: arm,psci method: description: The method of calling the PSCI firmware. diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index fb1d00bcc847..1b5ac6b02bc5 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/qcom.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: QCOM device tree bindings +title: QCOM maintainers: - Bjorn Andersson <bjorn.andersson@linaro.org> @@ -176,6 +176,9 @@ properties: - longcheer,l8910 - samsung,a3u-eur - samsung,a5u-eur + - samsung,e5 + - samsung,e7 + - samsung,grandmax - samsung,j5 - samsung,serranove - wingtech,wt88047 @@ -450,6 +453,7 @@ properties: - description: Google Pazquel with LTE and Parade (newest rev) items: + - const: google,pazquel-sku6 - const: google,pazquel-sku4 - const: qcom,sc7180 @@ -550,6 +554,7 @@ properties: - description: Qualcomm Technologies, Inc. sc7280 CRD platform (newest rev) items: + - const: google,zoglin - const: google,hoglin - const: qcom,sc7280 @@ -565,16 +570,31 @@ properties: - const: google,piglin - const: qcom,sc7280 + - description: Google Evoker (newest rev) + items: + - const: google,evoker + - const: qcom,sc7280 + - description: Google Herobrine (newest rev) items: - const: google,herobrine - const: qcom,sc7280 + - description: Google Villager (rev0) + items: + - const: google,villager-rev0 + - const: qcom,sc7280 + - description: Google Villager (newest rev) items: - const: google,villager - const: qcom,sc7280 + - description: Google Villager with LTE (newest rev) + items: + - const: google,villager-sku512 + - const: qcom,sc7280 + - items: - enum: - lenovo,flex-5g @@ -716,6 +736,7 @@ properties: - enum: - qcom,sm8450-hdk - qcom,sm8450-qrd + - sony,pdx223 - const: qcom,sm8450 additionalProperties: true diff --git a/Documentation/devicetree/bindings/arm/rda.yaml b/Documentation/devicetree/bindings/arm/rda.yaml index a5c0444aa2b4..09241ea1d228 100644 --- a/Documentation/devicetree/bindings/arm/rda.yaml +++ b/Documentation/devicetree/bindings/arm/rda.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/rda.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: RDA Micro platforms device tree bindings +title: RDA Micro platforms maintainers: - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> diff --git a/Documentation/devicetree/bindings/arm/realtek.yaml b/Documentation/devicetree/bindings/arm/realtek.yaml index 9fb0297fe1ce..ddd9a85099e9 100644 --- a/Documentation/devicetree/bindings/arm/realtek.yaml +++ b/Documentation/devicetree/bindings/arm/realtek.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/realtek.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Realtek platforms device tree bindings +title: Realtek platforms maintainers: - Andreas Färber <afaerber@suse.de> diff --git a/Documentation/devicetree/bindings/arm/renesas.yaml b/Documentation/devicetree/bindings/arm/renesas.yaml index ff80152f092f..f51464a08aff 100644 --- a/Documentation/devicetree/bindings/arm/renesas.yaml +++ b/Documentation/devicetree/bindings/arm/renesas.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/renesas.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Renesas SH-Mobile, R-Mobile, and R-Car Platform Device Tree Bindings +title: Renesas SH-Mobile, R-Mobile, and R-Car Platform maintainers: - Geert Uytterhoeven <geert+renesas@glider.be> @@ -264,6 +264,7 @@ properties: - renesas,r8a779m4 - renesas,r8a779m5 - renesas,r8a779m8 + - renesas,r8a779mb - enum: - renesas,r8a7795 - renesas,r8a77961 @@ -291,6 +292,13 @@ properties: - renesas,v3hsk # V3HSK (Y-ASK-RCAR-V3H-WS10) - const: renesas,r8a77980 + - description: R-Car V3H2 (R8A77980A) + items: + - enum: + - renesas,condor-i # Condor-I (RTP0RC77980SEBS012SA01) + - const: renesas,r8a77980a + - const: renesas,r8a77980 + - description: R-Car E3 (R8A77990) items: - enum: @@ -409,6 +417,14 @@ properties: - const: renesas,r8a779m8 - const: renesas,r8a7795 + - description: R-Car H3Ne-1.7G (R8A779MB) + items: + - enum: + - renesas,h3ulcb # H3ULCB (R-Car Starter Kit Premier) + - renesas,salvator-xs # Salvator-XS (Salvator-X 2nd version) + - const: renesas,r8a779mb + - const: renesas,r8a7795 + - description: RZ/N1D (R9A06G032) items: - enum: diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index 7811ba64149c..c6c69a4e3777 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/rockchip.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Rockchip platforms device tree bindings +title: Rockchip platforms maintainers: - Heiko Stuebner <heiko@sntech.de> @@ -30,6 +30,16 @@ properties: - const: amarula,vyasa-rk3288 - const: rockchip,rk3288 + - description: Anbernic RG353P + items: + - const: anbernic,rg353p + - const: rockchip,rk3566 + + - description: Anbernic RG503 + items: + - const: anbernic,rg503 + - const: rockchip,rk3566 + - description: Asus Tinker board items: - const: asus,rk3288-tinker @@ -151,6 +161,7 @@ properties: - friendlyarm,nanopi-m4b - friendlyarm,nanopi-neo4 - friendlyarm,nanopi-r4s + - friendlyarm,nanopi-r4s-enterprise - const: rockchip,rk3399 - description: GeekBuying GeekBox @@ -363,30 +374,55 @@ properties: - const: google,gru - const: rockchip,rk3399 - - description: Google Scarlet - Innolux display (Acer Chromebook Tab 10) + - description: | + Google Scarlet - Innolux display (Acer Chromebook Tab 10 and more) items: + - const: google,scarlet-rev15-sku2 + - const: google,scarlet-rev15-sku4 - const: google,scarlet-rev15-sku6 - const: google,scarlet-rev15 + - const: google,scarlet-rev14-sku2 + - const: google,scarlet-rev14-sku4 - const: google,scarlet-rev14-sku6 - const: google,scarlet-rev14 + - const: google,scarlet-rev13-sku2 + - const: google,scarlet-rev13-sku4 - const: google,scarlet-rev13-sku6 - const: google,scarlet-rev13 + - const: google,scarlet-rev12-sku2 + - const: google,scarlet-rev12-sku4 - const: google,scarlet-rev12-sku6 - const: google,scarlet-rev12 + - const: google,scarlet-rev11-sku2 + - const: google,scarlet-rev11-sku4 - const: google,scarlet-rev11-sku6 - const: google,scarlet-rev11 + - const: google,scarlet-rev10-sku2 + - const: google,scarlet-rev10-sku4 - const: google,scarlet-rev10-sku6 - const: google,scarlet-rev10 + - const: google,scarlet-rev9-sku2 + - const: google,scarlet-rev9-sku4 - const: google,scarlet-rev9-sku6 - const: google,scarlet-rev9 + - const: google,scarlet-rev8-sku2 + - const: google,scarlet-rev8-sku4 - const: google,scarlet-rev8-sku6 - const: google,scarlet-rev8 + - const: google,scarlet-rev7-sku2 + - const: google,scarlet-rev7-sku4 - const: google,scarlet-rev7-sku6 - const: google,scarlet-rev7 + - const: google,scarlet-rev6-sku2 + - const: google,scarlet-rev6-sku4 - const: google,scarlet-rev6-sku6 - const: google,scarlet-rev6 + - const: google,scarlet-rev5-sku2 + - const: google,scarlet-rev5-sku4 - const: google,scarlet-rev5-sku6 - const: google,scarlet-rev5 + - const: google,scarlet-rev4-sku2 + - const: google,scarlet-rev4-sku4 - const: google,scarlet-rev4-sku6 - const: google,scarlet-rev4 - const: google,scarlet @@ -470,6 +506,11 @@ properties: - const: netxeon,r89 - const: rockchip,rk3288 + - description: OPEN AI LAB EAIDK-610 + items: + - const: openailab,eaidk-610 + - const: rockchip,rk3399 + - description: Orange Pi RK3399 board items: - const: rockchip,rk3399-orangepi @@ -494,6 +535,11 @@ properties: - const: pine64,pinenote - const: rockchip,rk3566 + - description: Pine64 PinePhonePro + items: + - const: pine64,pinephone-pro + - const: rockchip,rk3399 + - description: Pine64 Rock64 items: - const: pine64,rock64 @@ -537,6 +583,11 @@ properties: - const: radxa,rockpi4 - const: rockchip,rk3399 + - description: Radxa ROCK 4C+ + items: + - const: radxa,rock-4c-plus + - const: rockchip,rk3399 + - description: Radxa ROCK Pi E items: - const: radxa,rockpi-e diff --git a/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml b/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml index 5ece38065e54..8c73bc7f4009 100644 --- a/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml @@ -21,10 +21,12 @@ select: enum: - rockchip,px30-pmu - rockchip,rk3066-pmu + - rockchip,rk3128-pmu - rockchip,rk3288-pmu - rockchip,rk3368-pmu - rockchip,rk3399-pmu - rockchip,rk3568-pmu + - rockchip,rk3588-pmu required: - compatible @@ -35,10 +37,12 @@ properties: - enum: - rockchip,px30-pmu - rockchip,rk3066-pmu + - rockchip,rk3128-pmu - rockchip,rk3288-pmu - rockchip,rk3368-pmu - rockchip,rk3399-pmu - rockchip,rk3568-pmu + - rockchip,rk3588-pmu - const: syscon - const: simple-mfd diff --git a/Documentation/devicetree/bindings/arm/socionext/socionext,uniphier-system-cache.yaml b/Documentation/devicetree/bindings/arm/socionext/socionext,uniphier-system-cache.yaml index 7ca5375f278f..6096c082d56d 100644 --- a/Documentation/devicetree/bindings/arm/socionext/socionext,uniphier-system-cache.yaml +++ b/Documentation/devicetree/bindings/arm/socionext/socionext,uniphier-system-cache.yaml @@ -22,7 +22,6 @@ properties: description: | should contain 3 regions: control register, revision register, operation register, in this order. - minItems: 3 maxItems: 3 interrupts: diff --git a/Documentation/devicetree/bindings/arm/spear.yaml b/Documentation/devicetree/bindings/arm/spear.yaml index 605ad3f882ef..a465c9eca76e 100644 --- a/Documentation/devicetree/bindings/arm/spear.yaml +++ b/Documentation/devicetree/bindings/arm/spear.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/spear.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: ST SPEAr Platforms Device Tree Bindings +title: ST SPEAr Platforms maintainers: - Viresh Kumar <vireshk@kernel.org> diff --git a/Documentation/devicetree/bindings/arm/sti.yaml b/Documentation/devicetree/bindings/arm/sti.yaml index a41cd8764885..3ca054c64377 100644 --- a/Documentation/devicetree/bindings/arm/sti.yaml +++ b/Documentation/devicetree/bindings/arm/sti.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/sti.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: ST STi Platforms Device Tree Bindings +title: ST STi Platforms maintainers: - Patrice Chotard <patrice.chotard@foss.st.com> diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml b/Documentation/devicetree/bindings/arm/sunxi.yaml index 0c2356778208..3ad1cd50e3fe 100644 --- a/Documentation/devicetree/bindings/arm/sunxi.yaml +++ b/Documentation/devicetree/bindings/arm/sunxi.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/sunxi.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner platforms device tree bindings +title: Allwinner platforms maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/arm/tegra.yaml b/Documentation/devicetree/bindings/arm/tegra.yaml index 49841ca272ee..1f62253f9410 100644 --- a/Documentation/devicetree/bindings/arm/tegra.yaml +++ b/Documentation/devicetree/bindings/arm/tegra.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/tegra.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: NVIDIA Tegra device tree bindings +title: NVIDIA Tegra maintainers: - Thierry Reding <thierry.reding@gmail.com> diff --git a/Documentation/devicetree/bindings/arm/tesla.yaml b/Documentation/devicetree/bindings/arm/tesla.yaml index 09856da657dc..d670a0d56222 100644 --- a/Documentation/devicetree/bindings/arm/tesla.yaml +++ b/Documentation/devicetree/bindings/arm/tesla.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/tesla.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Tesla Full Self Driving(FSD) platforms device tree bindings +title: Tesla Full Self Driving(FSD) platforms maintainers: - Alim Akhtar <alim.akhtar@samsung.com> diff --git a/Documentation/devicetree/bindings/arm/ti/k3.yaml b/Documentation/devicetree/bindings/arm/ti/k3.yaml index 61c6ab4f52e2..28b8232e1c5b 100644 --- a/Documentation/devicetree/bindings/arm/ti/k3.yaml +++ b/Documentation/devicetree/bindings/arm/ti/k3.yaml @@ -19,32 +19,11 @@ properties: compatible: oneOf: - - description: K3 AM654 SoC + - description: K3 AM62A7 SoC items: - enum: - - ti,am654-evm - - siemens,iot2050-basic - - siemens,iot2050-basic-pg2 - - siemens,iot2050-advanced - - siemens,iot2050-advanced-pg2 - - const: ti,am654 - - - description: K3 J721E SoC - oneOf: - - const: ti,j721e - - items: - - enum: - - ti,j721e-evm - - ti,j721e-sk - - const: ti,j721e - - - description: K3 J7200 SoC - oneOf: - - const: ti,j7200 - - items: - - enum: - - ti,j7200-evm - - const: ti,j7200 + - ti,am62a7-sk + - const: ti,am62a7 - description: K3 AM625 SoC items: @@ -59,6 +38,33 @@ properties: - ti,am642-sk - const: ti,am642 + - description: K3 AM654 SoC + items: + - enum: + - siemens,iot2050-advanced + - siemens,iot2050-advanced-pg2 + - siemens,iot2050-basic + - siemens,iot2050-basic-pg2 + - ti,am654-evm + - const: ti,am654 + + - description: K3 J7200 SoC + oneOf: + - const: ti,j7200 + - items: + - enum: + - ti,j7200-evm + - const: ti,j7200 + + - description: K3 J721E SoC + oneOf: + - const: ti,j721e + - items: + - enum: + - ti,j721e-evm + - ti,j721e-sk + - const: ti,j721e + - description: K3 J721s2 SoC items: - enum: diff --git a/Documentation/devicetree/bindings/arm/toshiba.yaml b/Documentation/devicetree/bindings/arm/toshiba.yaml index 9c1cacbdc916..716ba4a3cab4 100644 --- a/Documentation/devicetree/bindings/arm/toshiba.yaml +++ b/Documentation/devicetree/bindings/arm/toshiba.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/toshiba.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Toshiba Visconti Platform Device Tree Bindings +title: Toshiba Visconti Platform maintainers: - Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> diff --git a/Documentation/devicetree/bindings/arm/ux500.yaml b/Documentation/devicetree/bindings/arm/ux500.yaml index 17accb31bca0..b42d20fa4359 100644 --- a/Documentation/devicetree/bindings/arm/ux500.yaml +++ b/Documentation/devicetree/bindings/arm/ux500.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/ux500.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Ux500 platforms device tree bindings +title: Ux500 platforms maintainers: - Linus Walleij <linus.walleij@linaro.org> diff --git a/Documentation/devicetree/bindings/arm/versatile-sysreg.txt b/Documentation/devicetree/bindings/arm/versatile-sysreg.txt deleted file mode 100644 index a4f15262d717..000000000000 --- a/Documentation/devicetree/bindings/arm/versatile-sysreg.txt +++ /dev/null @@ -1,10 +0,0 @@ -ARM Versatile system registers --------------------------------------- - -This is a system control registers block, providing multiple low level -platform functions like board detection and identification, software -interrupt generation, MMC and NOR Flash control etc. - -Required node properties: -- compatible value : = "arm,versatile-sysreg", "syscon" -- reg : physical base address and the size of the registers window diff --git a/Documentation/devicetree/bindings/arm/vt8500.yaml b/Documentation/devicetree/bindings/arm/vt8500.yaml index 7b762bfc11e7..5d5ad5a60451 100644 --- a/Documentation/devicetree/bindings/arm/vt8500.yaml +++ b/Documentation/devicetree/bindings/arm/vt8500.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/vt8500.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: VIA/Wondermedia VT8500 Platforms Device Tree Bindings +title: VIA/Wondermedia VT8500 Platforms maintainers: - Tony Prisk <linux@prisktech.co.nz> diff --git a/Documentation/devicetree/bindings/arm/xilinx.yaml b/Documentation/devicetree/bindings/arm/xilinx.yaml index 4dc0e0195974..969cfe6dc434 100644 --- a/Documentation/devicetree/bindings/arm/xilinx.yaml +++ b/Documentation/devicetree/bindings/arm/xilinx.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/arm/xilinx.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Xilinx Zynq Platforms Device Tree Bindings +title: Xilinx Zynq Platforms maintainers: - Michal Simek <michal.simek@xilinx.com> diff --git a/Documentation/devicetree/bindings/ata/ahci-common.yaml b/Documentation/devicetree/bindings/ata/ahci-common.yaml new file mode 100644 index 000000000000..94d72aeaad0f --- /dev/null +++ b/Documentation/devicetree/bindings/ata/ahci-common.yaml @@ -0,0 +1,123 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/ata/ahci-common.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Common Properties for Serial ATA AHCI controllers + +maintainers: + - Hans de Goede <hdegoede@redhat.com> + - Damien Le Moal <damien.lemoal@opensource.wdc.com> + +description: + This document defines device tree properties for a common AHCI SATA + controller implementation. It's hardware interface is supposed to + conform to the technical standard defined by Intel (see Serial ATA + Advanced Host Controller Interface specification for details). The + document doesn't constitute a DT-node binding by itself but merely + defines a set of common properties for the AHCI-compatible devices. + +select: false + +allOf: + - $ref: sata-common.yaml# + +properties: + reg: + description: + Generic AHCI registers space conforming to the Serial ATA AHCI + specification. + + reg-names: + description: CSR space IDs + contains: + const: ahci + + interrupts: + description: + Generic AHCI state change interrupt. Can be implemented either as a + single line attached to the controller or as a set of the signals + indicating the particular port events. + minItems: 1 + maxItems: 32 + + ahci-supply: + description: Power regulator for AHCI controller + + target-supply: + description: Power regulator for SATA target device + + phy-supply: + description: Power regulator for SATA PHY + + phys: + description: Reference to the SATA PHY node + maxItems: 1 + + phy-names: + const: sata-phy + + hba-cap: + $ref: '/schemas/types.yaml#/definitions/uint32' + description: + Bitfield of the HBA generic platform capabilities like Staggered + Spin-up or Mechanical Presence Switch support. It can be used to + appropriately initialize the HWinit fields of the HBA CAP register + in case if the system firmware hasn't done it. + + ports-implemented: + $ref: '/schemas/types.yaml#/definitions/uint32' + description: + Mask that indicates which ports the HBA supports. Useful if PI is not + programmed by the BIOS, which is true for some embedded SoC's. + +patternProperties: + "^sata-port@[0-9a-f]+$": + $ref: '#/$defs/ahci-port' + description: + It is optionally possible to describe the ports as sub-nodes so + to enable each port independently when dealing with multiple PHYs. + +required: + - reg + - interrupts + +additionalProperties: true + +$defs: + ahci-port: + $ref: /schemas/ata/sata-common.yaml#/$defs/sata-port + + properties: + reg: + description: + AHCI SATA port identifier. By design AHCI controller can't have + more than 32 ports due to the CAP.NP fields and PI register size + constraints. + minimum: 0 + maximum: 31 + + phys: + description: Individual AHCI SATA port PHY + maxItems: 1 + + phy-names: + description: AHCI SATA port PHY ID + const: sata-phy + + target-supply: + description: Power regulator for SATA port target device + + hba-port-cap: + $ref: '/schemas/types.yaml#/definitions/uint32' + description: + Bitfield of the HBA port-specific platform capabilities like Hot + plugging, eSATA, FIS-based Switching, etc (see AHCI specification + for details). It can be used to initialize the HWinit fields of + the PxCMD register in case if the system firmware hasn't done it. + + required: + - reg + +... diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.yaml b/Documentation/devicetree/bindings/ata/ahci-platform.yaml index c146ab8e14e5..7dc2a2e8f598 100644 --- a/Documentation/devicetree/bindings/ata/ahci-platform.yaml +++ b/Documentation/devicetree/bindings/ata/ahci-platform.yaml @@ -30,14 +30,11 @@ select: - marvell,armada-3700-ahci - marvell,armada-8k-ahci - marvell,berlin2q-ahci - - snps,dwc-ahci - - snps,spear-ahci required: - compatible allOf: - - $ref: "sata-common.yaml#" - + - $ref: "ahci-common.yaml#" properties: compatible: @@ -49,17 +46,11 @@ properties: - marvell,berlin2-ahci - marvell,berlin2q-ahci - const: generic-ahci - - items: - - enum: - - rockchip,rk3568-dwc-ahci - - const: snps,dwc-ahci - enum: - cavium,octeon-7130-ahci - hisilicon,hisi-ahci - ibm,476gtr-ahci - marvell,armada-3700-ahci - - snps,dwc-ahci - - snps,spear-ahci reg: minItems: 1 @@ -69,92 +60,37 @@ properties: maxItems: 1 clocks: - description: - Clock IDs array as required by the controller. minItems: 1 maxItems: 3 clock-names: - description: - Names of clocks corresponding to IDs in the clock property. minItems: 1 maxItems: 3 interrupts: maxItems: 1 - ahci-supply: - description: - regulator for AHCI controller - - dma-coherent: true - - phy-supply: - description: - regulator for PHY power - - phys: - description: - List of all PHYs on this controller - maxItems: 1 - - phy-names: - description: - Name specifier for the PHYs - maxItems: 1 - - ports-implemented: - $ref: '/schemas/types.yaml#/definitions/uint32' - description: | - Mask that indicates which ports that the HBA supports - are available for software to use. Useful if PORTS_IMPL - is not programmed by the BIOS, which is true with - some embedded SoCs. - maximum: 0x1f - power-domains: maxItems: 1 resets: maxItems: 1 - target-supply: - description: - regulator for SATA target power - -required: - - compatible - - reg - - interrupts - patternProperties: "^sata-port@[0-9a-f]+$": - type: object - additionalProperties: false - description: - Subnode with configuration of the Ports. - - properties: - reg: - maxItems: 1 - - phys: - maxItems: 1 - - phy-names: - maxItems: 1 - - target-supply: - description: - regulator for SATA target power - - required: - - reg + $ref: /schemas/ata/ahci-common.yaml#/$defs/ahci-port anyOf: - required: [ phys ] - required: [ target-supply ] + unevaluatedProperties: false + +required: + - compatible + - reg + - interrupts + unevaluatedProperties: false examples: @@ -167,6 +103,8 @@ examples: - | #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/berlin2q.h> + #include <dt-bindings/ata/ahci.h> + sata@f7e90000 { compatible = "marvell,berlin2q-ahci", "generic-ahci"; reg = <0xf7e90000 0x1000>; @@ -175,15 +113,23 @@ examples: #address-cells = <1>; #size-cells = <0>; + hba-cap = <HBA_SMPS>; + sata0: sata-port@0 { reg = <0>; + phys = <&sata_phy 0>; target-supply = <®_sata0>; + + hba-port-cap = <(HBA_PORT_FBSCP | HBA_PORT_ESP)>; }; sata1: sata-port@1 { reg = <1>; + phys = <&sata_phy 1>; target-supply = <®_sata1>; + + hba-port-cap = <(HBA_PORT_HPCP | HBA_PORT_MPSP | HBA_PORT_FBSCP)>; }; }; diff --git a/Documentation/devicetree/bindings/ata/baikal,bt1-ahci.yaml b/Documentation/devicetree/bindings/ata/baikal,bt1-ahci.yaml new file mode 100644 index 000000000000..9b7ca4759bd7 --- /dev/null +++ b/Documentation/devicetree/bindings/ata/baikal,bt1-ahci.yaml @@ -0,0 +1,115 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/ata/baikal,bt1-ahci.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Baikal-T1 SoC AHCI SATA controller + +maintainers: + - Serge Semin <fancer.lancer@gmail.com> + +description: + AHCI SATA controller embedded into the Baikal-T1 SoC is based on the + DWC AHCI SATA v4.10a IP-core. + +allOf: + - $ref: snps,dwc-ahci-common.yaml# + +properties: + compatible: + const: baikal,bt1-ahci + + clocks: + items: + - description: Peripheral APB bus clock + - description: Application AXI BIU clock + - description: SATA Ports reference clock + + clock-names: + items: + - const: pclk + - const: aclk + - const: ref + + resets: + items: + - description: Application AXI BIU domain reset + - description: SATA Ports clock domain reset + + reset-names: + items: + - const: arst + - const: ref + + ports-implemented: + maximum: 0x3 + +patternProperties: + "^sata-port@[0-1]$": + $ref: /schemas/ata/snps,dwc-ahci-common.yaml#/$defs/dwc-ahci-port + + properties: + reg: + minimum: 0 + maximum: 1 + + snps,tx-ts-max: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Due to having AXI3 bus interface utilized the maximum Tx DMA + transaction size can't exceed 16 beats (AxLEN[3:0]). + enum: [ 1, 2, 4, 8, 16 ] + + snps,rx-ts-max: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Due to having AXI3 bus interface utilized the maximum Rx DMA + transaction size can't exceed 16 beats (AxLEN[3:0]). + enum: [ 1, 2, 4, 8, 16 ] + + unevaluatedProperties: false + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - resets + +unevaluatedProperties: false + +examples: + - | + sata@1f050000 { + compatible = "baikal,bt1-ahci"; + reg = <0x1f050000 0x2000>; + #address-cells = <1>; + #size-cells = <0>; + + interrupts = <0 64 4>; + + clocks = <&ccu_sys 1>, <&ccu_axi 2>, <&sata_ref_clk>; + clock-names = "pclk", "aclk", "ref"; + + resets = <&ccu_axi 2>, <&ccu_sys 0>; + reset-names = "arst", "ref"; + + ports-implemented = <0x3>; + + sata-port@0 { + reg = <0>; + + snps,tx-ts-max = <4>; + snps,rx-ts-max = <4>; + }; + + sata-port@1 { + reg = <1>; + + snps,tx-ts-max = <4>; + snps,rx-ts-max = <4>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/ata/brcm,sata-brcm.yaml b/Documentation/devicetree/bindings/ata/brcm,sata-brcm.yaml index 235a93ac86b0..fe7f091e744f 100644 --- a/Documentation/devicetree/bindings/ata/brcm,sata-brcm.yaml +++ b/Documentation/devicetree/bindings/ata/brcm,sata-brcm.yaml @@ -14,7 +14,7 @@ maintainers: - Florian Fainelli <f.fainelli@gmail.com> allOf: - - $ref: sata-common.yaml# + - $ref: ahci-common.yaml# properties: compatible: @@ -30,7 +30,6 @@ properties: - const: brcm,bcm-nsp-ahci reg: - minItems: 2 maxItems: 2 reg-names: @@ -41,8 +40,6 @@ properties: interrupts: maxItems: 1 - dma-coherent: true - if: properties: compatible: diff --git a/Documentation/devicetree/bindings/ata/cortina,gemini-sata-bridge.yaml b/Documentation/devicetree/bindings/ata/cortina,gemini-sata-bridge.yaml index 21a90975593b..529093666508 100644 --- a/Documentation/devicetree/bindings/ata/cortina,gemini-sata-bridge.yaml +++ b/Documentation/devicetree/bindings/ata/cortina,gemini-sata-bridge.yaml @@ -22,7 +22,6 @@ properties: maxItems: 1 resets: - minItems: 2 maxItems: 2 description: phandles to the reset lines for both SATA bridges @@ -32,7 +31,6 @@ properties: - const: sata1 clocks: - minItems: 2 maxItems: 2 description: phandles to the compulsory peripheral clocks diff --git a/Documentation/devicetree/bindings/ata/sata-common.yaml b/Documentation/devicetree/bindings/ata/sata-common.yaml index 7ac77b1c5850..58c9342b9925 100644 --- a/Documentation/devicetree/bindings/ata/sata-common.yaml +++ b/Documentation/devicetree/bindings/ata/sata-common.yaml @@ -31,22 +31,27 @@ properties: "#size-cells": const: 0 + dma-coherent: true + patternProperties: "^sata-port@[0-9a-e]$": + $ref: '#/$defs/sata-port' description: | DT nodes for ports connected on the SATA host. The SATA port nodes will be named "sata-port". + +additionalProperties: true + +$defs: + sata-port: type: object properties: reg: minimum: 0 - maximum: 14 description: - The ID number of the drive port SATA can potentially use a port - multiplier making it possible to connect up to 15 disks to a single - SATA port. - -additionalProperties: true + The ID number of the SATA port. Aside with being directly used, + each port can have a Port Multiplier attached thus allowing to + access more than one drive by means of a single SATA port. ... diff --git a/Documentation/devicetree/bindings/ata/sata_highbank.yaml b/Documentation/devicetree/bindings/ata/sata_highbank.yaml index 49679b58041c..f23f26a8f21c 100644 --- a/Documentation/devicetree/bindings/ata/sata_highbank.yaml +++ b/Documentation/devicetree/bindings/ata/sata_highbank.yaml @@ -52,7 +52,6 @@ properties: minItems: 1 maxItems: 8 items: - minItems: 2 maxItems: 2 calxeda,tx-atten: diff --git a/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml b/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml new file mode 100644 index 000000000000..c1457910520b --- /dev/null +++ b/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml @@ -0,0 +1,102 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/ata/snps,dwc-ahci-common.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Synopsys DWC AHCI SATA controller properties + +maintainers: + - Serge Semin <fancer.lancer@gmail.com> + +description: + This document defines device tree schema for the generic Synopsys DWC + AHCI controller properties. + +select: false + +allOf: + - $ref: ahci-common.yaml# + +properties: + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + description: + Basic DWC AHCI SATA clock sources like application AXI/AHB BIU clock, + PM-alive clock, RxOOB detection clock, embedded PHYs reference (Rx/Tx) + clock, etc. + minItems: 1 + maxItems: 4 + + clock-names: + minItems: 1 + maxItems: 4 + items: + oneOf: + - description: Application APB/AHB/AXI BIU clock + enum: + - pclk + - aclk + - hclk + - sata + - description: Power Module keep-alive clock + const: pmalive + - description: RxOOB detection clock + const: rxoob + - description: SATA Ports reference clock + const: ref + + resets: + description: + At least basic application and reference clock domains resets are + normally supported by the DWC AHCI SATA controller. + minItems: 1 + maxItems: 4 + + reset-names: + minItems: 1 + maxItems: 4 + items: + oneOf: + - description: Application AHB/AXI BIU clock domain reset control + enum: + - arst + - hrst + - description: Power Module keep-alive clock domain reset control + const: pmalive + - description: RxOOB detection clock domain reset control + const: rxoob + - description: Reference clock domain reset control + const: ref + +patternProperties: + "^sata-port@[0-9a-e]$": + $ref: '#/$defs/dwc-ahci-port' + +additionalProperties: true + +$defs: + dwc-ahci-port: + $ref: /schemas/ata/ahci-common.yaml#/$defs/ahci-port + + properties: + reg: + minimum: 0 + maximum: 7 + + snps,tx-ts-max: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Maximal size of Tx DMA transactions in FIFO words + enum: [ 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024 ] + + snps,rx-ts-max: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Maximal size of Rx DMA transactions in FIFO words + enum: [ 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024 ] + +... diff --git a/Documentation/devicetree/bindings/ata/snps,dwc-ahci.yaml b/Documentation/devicetree/bindings/ata/snps,dwc-ahci.yaml new file mode 100644 index 000000000000..5afa4b57ce20 --- /dev/null +++ b/Documentation/devicetree/bindings/ata/snps,dwc-ahci.yaml @@ -0,0 +1,75 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/ata/snps,dwc-ahci.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Synopsys DWC AHCI SATA controller + +maintainers: + - Serge Semin <fancer.lancer@gmail.com> + +description: + This document defines device tree bindings for the generic Synopsys DWC + implementation of the AHCI SATA controller. + +allOf: + - $ref: snps,dwc-ahci-common.yaml# + +properties: + compatible: + oneOf: + - description: Synopsys AHCI SATA-compatible devices + const: snps,dwc-ahci + - description: SPEAr1340 AHCI SATA device + const: snps,spear-ahci + - description: Rockhip RK3568 AHCI controller + items: + - const: rockchip,rk3568-dwc-ahci + - const: snps,dwc-ahci + +patternProperties: + "^sata-port@[0-9a-e]$": + $ref: /schemas/ata/snps,dwc-ahci-common.yaml#/$defs/dwc-ahci-port + + unevaluatedProperties: false + +required: + - compatible + - reg + - interrupts + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/ata/ahci.h> + + sata@122f0000 { + compatible = "snps,dwc-ahci"; + reg = <0x122F0000 0x1ff>; + #address-cells = <1>; + #size-cells = <0>; + + interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; + + clocks = <&clock1>, <&clock2>; + clock-names = "aclk", "ref"; + + phys = <&sata_phy>; + phy-names = "sata-phy"; + + ports-implemented = <0x1>; + + sata-port@0 { + reg = <0>; + + hba-port-cap = <HBA_PORT_FBSCP>; + + snps,tx-ts-max = <512>; + snps,rx-ts-max = <512>; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/bus/allwinner,sun50i-a64-de2.yaml b/Documentation/devicetree/bindings/bus/allwinner,sun50i-a64-de2.yaml index ad313ccaaaef..85c4a979aec4 100644 --- a/Documentation/devicetree/bindings/bus/allwinner,sun50i-a64-de2.yaml +++ b/Documentation/devicetree/bindings/bus/allwinner,sun50i-a64-de2.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/bus/allwinner,sun50i-a64-de2.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A64 Display Engine Bus Device Tree Bindings +title: Allwinner A64 Display Engine Bus maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/bus/allwinner,sun8i-a23-rsb.yaml b/Documentation/devicetree/bindings/bus/allwinner,sun8i-a23-rsb.yaml index 3d719f468a5b..bee5f53f837f 100644 --- a/Documentation/devicetree/bindings/bus/allwinner,sun8i-a23-rsb.yaml +++ b/Documentation/devicetree/bindings/bus/allwinner,sun8i-a23-rsb.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/bus/allwinner,sun8i-a23-rsb.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A23 RSB Device Tree Bindings +title: Allwinner A23 RSB maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/bus/palmbus.yaml b/Documentation/devicetree/bindings/bus/palmbus.yaml index f5cbfaf52d53..30fa6526cfc2 100644 --- a/Documentation/devicetree/bindings/bus/palmbus.yaml +++ b/Documentation/devicetree/bindings/bus/palmbus.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/bus/palmbus.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Ralink PalmBus Device Tree Bindings +title: Ralink PalmBus maintainers: - Sergio Paracuellos <sergio.paracuellos@gmail.com> diff --git a/Documentation/devicetree/bindings/clock/airoha,en7523-scu.yaml b/Documentation/devicetree/bindings/clock/airoha,en7523-scu.yaml index d60e74654809..79b0752faa91 100644 --- a/Documentation/devicetree/bindings/clock/airoha,en7523-scu.yaml +++ b/Documentation/devicetree/bindings/clock/airoha,en7523-scu.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/airoha,en7523-scu.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: EN7523 Clock Device Tree Bindings +title: EN7523 Clock maintainers: - Felix Fietkau <nbd@nbd.name> diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ahb-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ahb-clk.yaml index 558db4b6ed17..93587b700476 100644 --- a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ahb-clk.yaml +++ b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ahb-clk.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-ahb-clk.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 AHB Clock Device Tree Bindings +title: Allwinner A10 AHB Clock maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-apb0-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-apb0-clk.yaml index b1e3d739beb2..e14e1aad9fd6 100644 --- a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-apb0-clk.yaml +++ b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-apb0-clk.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-apb0-clk.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 APB0 Bus Clock Device Tree Bindings +title: Allwinner A10 APB0 Bus Clock maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-apb1-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-apb1-clk.yaml index 51b7a6d4ea54..8a4747ebe0ba 100644 --- a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-apb1-clk.yaml +++ b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-apb1-clk.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-apb1-clk.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 APB1 Bus Clock Device Tree Bindings +title: Allwinner A10 APB1 Bus Clock maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-axi-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-axi-clk.yaml index d801158e15de..aa08dd49dd61 100644 --- a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-axi-clk.yaml +++ b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-axi-clk.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-axi-clk.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 AXI Clock Device Tree Bindings +title: Allwinner A10 AXI Clock maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ccu.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ccu.yaml index 15ed64d35261..1690b9d99c3d 100644 --- a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ccu.yaml +++ b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ccu.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-ccu.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner Clock Control Unit Device Tree Bindings +title: Allwinner Clock Control Unit maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-cpu-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-cpu-clk.yaml index 0dfafba1a168..08d073520cfa 100644 --- a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-cpu-clk.yaml +++ b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-cpu-clk.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-cpu-clk.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 CPU Clock Device Tree Bindings +title: Allwinner A10 CPU Clock maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-display-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-display-clk.yaml index 7484a7ab7dea..e665e50c1785 100644 --- a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-display-clk.yaml +++ b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-display-clk.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-display-clk.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 Display Clock Device Tree Bindings +title: Allwinner A10 Display Clock maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-gates-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-gates-clk.yaml index 9a37a357cb4e..c4714d0fbe07 100644 --- a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-gates-clk.yaml +++ b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-gates-clk.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-gates-clk.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 Bus Gates Clock Device Tree Bindings +title: Allwinner A10 Bus Gates Clock maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mbus-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mbus-clk.yaml index 18f131e262b4..e824e33489b6 100644 --- a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mbus-clk.yaml +++ b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mbus-clk.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-mbus-clk.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 MBUS Clock Device Tree Bindings +title: Allwinner A10 MBUS Clock maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mmc-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mmc-clk.yaml index 5199285a661a..c612f94befb9 100644 --- a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mmc-clk.yaml +++ b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mmc-clk.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-mmc-clk.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 Module 1 Clock Device Tree Bindings +title: Allwinner A10 Module 1 Clock maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mod0-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mod0-clk.yaml index 3e2abe3e67c1..80ae3a7a588c 100644 --- a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mod0-clk.yaml +++ b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mod0-clk.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-mod0-clk.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 Module 0 Clock Device Tree Bindings +title: Allwinner A10 Module 0 Clock maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mod1-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mod1-clk.yaml index 7ddb55c75cff..4f9a8d44d42a 100644 --- a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mod1-clk.yaml +++ b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mod1-clk.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-mod1-clk.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 Module 1 Clock Device Tree Bindings +title: Allwinner A10 Module 1 Clock maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-osc-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-osc-clk.yaml index c604822cda07..52a7b6e7124c 100644 --- a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-osc-clk.yaml +++ b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-osc-clk.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-osc-clk.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 Gatable Oscillator Clock Device Tree Bindings +title: Allwinner A10 Gatable Oscillator Clock maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-pll1-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-pll1-clk.yaml index e5d9d45dab8a..b13a1f21d5da 100644 --- a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-pll1-clk.yaml +++ b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-pll1-clk.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-pll1-clk.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 CPU PLL Device Tree Bindings +title: Allwinner A10 CPU PLL maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-pll3-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-pll3-clk.yaml index 4b80a42fb3da..418d207d23b8 100644 --- a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-pll3-clk.yaml +++ b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-pll3-clk.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-pll3-clk.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 Video PLL Device Tree Bindings +title: Allwinner A10 Video PLL maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-pll5-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-pll5-clk.yaml index 415bd77de53d..76ef3f0c7f2c 100644 --- a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-pll5-clk.yaml +++ b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-pll5-clk.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-pll5-clk.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 DRAM PLL Device Tree Bindings +title: Allwinner A10 DRAM PLL maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-pll6-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-pll6-clk.yaml index ec5652f76027..a94c93c90ece 100644 --- a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-pll6-clk.yaml +++ b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-pll6-clk.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-pll6-clk.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 Peripheral PLL Device Tree Bindings +title: Allwinner A10 Peripheral PLL maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-tcon-ch0-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-tcon-ch0-clk.yaml index 0a335c615efd..6646b2a99fc1 100644 --- a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-tcon-ch0-clk.yaml +++ b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-tcon-ch0-clk.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-tcon-ch0-clk.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 TCON Channel 0 Clock Device Tree Bindings +title: Allwinner A10 TCON Channel 0 Clock maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-usb-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-usb-clk.yaml index cd95d25bfe7c..5103b675e488 100644 --- a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-usb-clk.yaml +++ b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-usb-clk.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-usb-clk.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 USB Clock Device Tree Bindings +title: Allwinner A10 USB Clock maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ve-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ve-clk.yaml index 5dfd0c1c27b4..80337e38d6e5 100644 --- a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ve-clk.yaml +++ b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ve-clk.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-ve-clk.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 Video Engine Clock Device Tree Bindings +title: Allwinner A10 Video Engine Clock maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun5i-a13-ahb-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun5i-a13-ahb-clk.yaml index 99add7991c48..c6a6fbb6863b 100644 --- a/Documentation/devicetree/bindings/clock/allwinner,sun5i-a13-ahb-clk.yaml +++ b/Documentation/devicetree/bindings/clock/allwinner,sun5i-a13-ahb-clk.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/allwinner,sun5i-a13-ahb-clk.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A13 AHB Clock Device Tree Bindings +title: Allwinner A13 AHB Clock maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun6i-a31-pll6-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun6i-a31-pll6-clk.yaml index 5f377205af71..7d6a6a34d20c 100644 --- a/Documentation/devicetree/bindings/clock/allwinner,sun6i-a31-pll6-clk.yaml +++ b/Documentation/devicetree/bindings/clock/allwinner,sun6i-a31-pll6-clk.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/allwinner,sun6i-a31-pll6-clk.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A31 Peripheral PLL Device Tree Bindings +title: Allwinner A31 Peripheral PLL maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun7i-a20-gmac-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun7i-a20-gmac-clk.yaml index 59e5dce1b65a..b6202de35707 100644 --- a/Documentation/devicetree/bindings/clock/allwinner,sun7i-a20-gmac-clk.yaml +++ b/Documentation/devicetree/bindings/clock/allwinner,sun7i-a20-gmac-clk.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/allwinner,sun7i-a20-gmac-clk.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A20 GMAC TX Clock Device Tree Bindings +title: Allwinner A20 GMAC TX Clock maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun7i-a20-out-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun7i-a20-out-clk.yaml index c745733bcf04..fde7f7dc3d34 100644 --- a/Documentation/devicetree/bindings/clock/allwinner,sun7i-a20-out-clk.yaml +++ b/Documentation/devicetree/bindings/clock/allwinner,sun7i-a20-out-clk.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/allwinner,sun7i-a20-out-clk.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A20 Output Clock Device Tree Bindings +title: Allwinner A20 Output Clock maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml index 17caf78f0ccf..70369bd633e4 100644 --- a/Documentation/devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml +++ b/Documentation/devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/allwinner,sun8i-a83t-de2-clk.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A83t Display Engine 2/3 Clock Controller Device Tree Bindings +title: Allwinner A83t Display Engine 2/3 Clock Controller maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun8i-h3-bus-gates-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun8i-h3-bus-gates-clk.yaml index 3eb2bf65b230..45b9e2c7c1d1 100644 --- a/Documentation/devicetree/bindings/clock/allwinner,sun8i-h3-bus-gates-clk.yaml +++ b/Documentation/devicetree/bindings/clock/allwinner,sun8i-h3-bus-gates-clk.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/allwinner,sun8i-h3-bus-gates-clk.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 Bus Gates Clock Device Tree Bindings +title: Allwinner A10 Bus Gates Clock maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-ahb-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-ahb-clk.yaml index d178da90aaec..f0f65af8ae22 100644 --- a/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-ahb-clk.yaml +++ b/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-ahb-clk.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-ahb-clk.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A80 AHB Clock Device Tree Bindings +title: Allwinner A80 AHB Clock maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-apb0-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-apb0-clk.yaml index 0351c79bd221..e9f9bc8f5794 100644 --- a/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-apb0-clk.yaml +++ b/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-apb0-clk.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-apb0-clk.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A80 APB0 Bus Clock Device Tree Bindings +title: Allwinner A80 APB0 Bus Clock maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-cpus-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-cpus-clk.yaml index 24d5b2f1a314..c48db2d49340 100644 --- a/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-cpus-clk.yaml +++ b/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-cpus-clk.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-cpus-clk.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A80 CPUS Clock Device Tree Bindings +title: Allwinner A80 CPUS Clock maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-de-clks.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-de-clks.yaml index a82c7c7e942b..e9f81a343be1 100644 --- a/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-de-clks.yaml +++ b/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-de-clks.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-de-clks.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A80 Display Engine Clock Controller Device Tree Bindings +title: Allwinner A80 Display Engine Clock Controller maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-gt-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-gt-clk.yaml index 43963c3062c8..d3ce5eb18d4e 100644 --- a/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-gt-clk.yaml +++ b/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-gt-clk.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-gt-clk.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A80 GT Bus Clock Device Tree Bindings +title: Allwinner A80 GT Bus Clock maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-mmc-config-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-mmc-config-clk.yaml index 20dc115fa211..65ee5afe83cc 100644 --- a/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-mmc-config-clk.yaml +++ b/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-mmc-config-clk.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-mmc-config-clk.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A80 MMC Configuration Clock Device Tree Bindings +title: Allwinner A80 MMC Configuration Clock maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-pll4-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-pll4-clk.yaml index b76bab6a30e9..261264a8aef6 100644 --- a/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-pll4-clk.yaml +++ b/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-pll4-clk.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-pll4-clk.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A80 Peripheral PLL Device Tree Bindings +title: Allwinner A80 Peripheral PLL maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-usb-clks.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-usb-clks.yaml index 6532fb6821bc..515c15d5f661 100644 --- a/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-usb-clks.yaml +++ b/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-usb-clks.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-usb-clks.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A80 USB Clock Controller Device Tree Bindings +title: Allwinner A80 USB Clock Controller maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-usb-mod-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-usb-mod-clk.yaml index 15218d10e78e..3f7b8d9511f1 100644 --- a/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-usb-mod-clk.yaml +++ b/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-usb-mod-clk.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-usb-mod-clk.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A80 USB Module Clock Device Tree Bindings +title: Allwinner A80 USB Module Clock maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-usb-phy-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-usb-phy-clk.yaml index 2569041684e6..0d49072d47ca 100644 --- a/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-usb-phy-clk.yaml +++ b/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-usb-phy-clk.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-usb-phy-clk.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A80 USB PHY Clock Device Tree Bindings +title: Allwinner A80 USB PHY Clock maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/clock/amlogic,meson8-ddr-clkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,meson8-ddr-clkc.yaml index 4b8669f870ec..d98d95d8e8c9 100644 --- a/Documentation/devicetree/bindings/clock/amlogic,meson8-ddr-clkc.yaml +++ b/Documentation/devicetree/bindings/clock/amlogic,meson8-ddr-clkc.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/amlogic,meson8-ddr-clkc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Amlogic DDR Clock Controller Device Tree Bindings +title: Amlogic DDR Clock Controller maintainers: - Martin Blumenstingl <martin.blumenstingl@googlemail.com> diff --git a/Documentation/devicetree/bindings/clock/brcm,bcm2711-dvp.yaml b/Documentation/devicetree/bindings/clock/brcm,bcm2711-dvp.yaml index 08543ecbe35b..2d40df2d34df 100644 --- a/Documentation/devicetree/bindings/clock/brcm,bcm2711-dvp.yaml +++ b/Documentation/devicetree/bindings/clock/brcm,bcm2711-dvp.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/brcm,bcm2711-dvp.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Broadcom BCM2711 HDMI DVP Device Tree Bindings +title: Broadcom BCM2711 HDMI DVP maintainers: - Maxime Ripard <mripard@kernel.org> diff --git a/Documentation/devicetree/bindings/clock/canaan,k210-clk.yaml b/Documentation/devicetree/bindings/clock/canaan,k210-clk.yaml index 7f5cf4001f76..998e5cce652f 100644 --- a/Documentation/devicetree/bindings/clock/canaan,k210-clk.yaml +++ b/Documentation/devicetree/bindings/clock/canaan,k210-clk.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/canaan,k210-clk.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Canaan Kendryte K210 Clock Device Tree Bindings +title: Canaan Kendryte K210 Clock maintainers: - Damien Le Moal <damien.lemoal@wdc.com> diff --git a/Documentation/devicetree/bindings/clock/cirrus,cs2000-cp.yaml b/Documentation/devicetree/bindings/clock/cirrus,cs2000-cp.yaml index 0abd6ba82dfd..82836086cac1 100644 --- a/Documentation/devicetree/bindings/clock/cirrus,cs2000-cp.yaml +++ b/Documentation/devicetree/bindings/clock/cirrus,cs2000-cp.yaml @@ -23,7 +23,6 @@ properties: clocks: description: Common clock binding for CLK_IN, XTI/REF_CLK - minItems: 2 maxItems: 2 clock-names: diff --git a/Documentation/devicetree/bindings/clock/gpio-gate-clock.txt b/Documentation/devicetree/bindings/clock/gpio-gate-clock.txt deleted file mode 100644 index d3379ff9b84b..000000000000 --- a/Documentation/devicetree/bindings/clock/gpio-gate-clock.txt +++ /dev/null @@ -1,21 +0,0 @@ -Binding for simple gpio gated clock. - -This binding uses the common clock binding[1]. - -[1] Documentation/devicetree/bindings/clock/clock-bindings.txt - -Required properties: -- compatible : shall be "gpio-gate-clock". -- #clock-cells : from common clock binding; shall be set to 0. -- enable-gpios : GPIO reference for enabling and disabling the clock. - -Optional properties: -- clocks: Maximum of one parent clock is supported. - -Example: - clock { - compatible = "gpio-gate-clock"; - clocks = <&parentclk>; - #clock-cells = <0>; - enable-gpios = <&gpio 1 GPIO_ACTIVE_HIGH>; - }; diff --git a/Documentation/devicetree/bindings/clock/gpio-gate-clock.yaml b/Documentation/devicetree/bindings/clock/gpio-gate-clock.yaml new file mode 100644 index 000000000000..d09d0e3f0c6e --- /dev/null +++ b/Documentation/devicetree/bindings/clock/gpio-gate-clock.yaml @@ -0,0 +1,42 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/gpio-gate-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Simple GPIO clock gate + +maintainers: + - Jyri Sarha <jsarha@ti.com> + +properties: + compatible: + const: gpio-gate-clock + + clocks: + maxItems: 1 + + '#clock-cells': + const: 0 + + enable-gpios: + description: GPIO reference for enabling and disabling the clock. + maxItems: 1 + +required: + - compatible + - '#clock-cells' + - enable-gpios + +additionalProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + + clock { + compatible = "gpio-gate-clock"; + clocks = <&parentclk>; + #clock-cells = <0>; + enable-gpios = <&gpio 1 GPIO_ACTIVE_HIGH>; + }; diff --git a/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml b/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml index 7c331bfbe370..f9ba9864d8b5 100644 --- a/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml +++ b/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml @@ -56,6 +56,7 @@ properties: - idt,5p49v5935 - idt,5p49v6901 - idt,5p49v6965 + - idt,5p49v6975 reg: description: I2C device address @@ -108,7 +109,7 @@ patternProperties: properties: idt,mode: description: - The output drive mode. Values defined in dt-bindings/clk/versaclock.h + The output drive mode. Values defined in dt-bindings/clock/versaclock.h $ref: /schemas/types.yaml#/definitions/uint32 minimum: 0 maximum: 6 @@ -134,6 +135,7 @@ allOf: enum: - idt,5p49v5933 - idt,5p49v5935 + - idt,5p49v6975 then: # Devices with builtin crystal + optional external input properties: @@ -151,7 +153,7 @@ additionalProperties: false examples: - | - #include <dt-bindings/clk/versaclock.h> + #include <dt-bindings/clock/versaclock.h> /* 25MHz reference crystal */ ref25: ref25m { diff --git a/Documentation/devicetree/bindings/clock/mediatek,apmixedsys.yaml b/Documentation/devicetree/bindings/clock/mediatek,apmixedsys.yaml index 770546195fb5..731bfe0408c2 100644 --- a/Documentation/devicetree/bindings/clock/mediatek,apmixedsys.yaml +++ b/Documentation/devicetree/bindings/clock/mediatek,apmixedsys.yaml @@ -34,6 +34,7 @@ properties: - mediatek,mt2712-apmixedsys - mediatek,mt6765-apmixedsys - mediatek,mt6779-apmixedsys + - mediatek,mt6795-apmixedsys - mediatek,mt7629-apmixedsys - mediatek,mt8167-apmixedsys - mediatek,mt8183-apmixedsys diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt6795-clock.yaml b/Documentation/devicetree/bindings/clock/mediatek,mt6795-clock.yaml new file mode 100644 index 000000000000..04469eabc8fa --- /dev/null +++ b/Documentation/devicetree/bindings/clock/mediatek,mt6795-clock.yaml @@ -0,0 +1,66 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/mediatek,mt6795-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek Functional Clock Controller for MT6795 + +maintainers: + - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> + - Chun-Jie Chen <chun-jie.chen@mediatek.com> + +description: | + The clock architecture in MediaTek like below + PLLs --> + dividers --> + muxes + --> + clock gate + + The devices provide clock gate control in different IP blocks. + +properties: + compatible: + enum: + - mediatek,mt6795-mfgcfg + - mediatek,mt6795-vdecsys + - mediatek,mt6795-vencsys + + reg: + maxItems: 1 + + '#clock-cells': + const: 1 + +required: + - compatible + - reg + - '#clock-cells' + +additionalProperties: false + +examples: + - | + soc { + #address-cells = <2>; + #size-cells = <2>; + + mfgcfg: clock-controller@13000000 { + compatible = "mediatek,mt6795-mfgcfg"; + reg = <0 0x13000000 0 0x1000>; + #clock-cells = <1>; + }; + + vdecsys: clock-controller@16000000 { + compatible = "mediatek,mt6795-vdecsys"; + reg = <0 0x16000000 0 0x1000>; + #clock-cells = <1>; + }; + + vencsys: clock-controller@18000000 { + compatible = "mediatek,mt6795-vencsys"; + reg = <0 0x18000000 0 0x1000>; + #clock-cells = <1>; + }; + }; diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt6795-sys-clock.yaml b/Documentation/devicetree/bindings/clock/mediatek,mt6795-sys-clock.yaml new file mode 100644 index 000000000000..378b761237d3 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/mediatek,mt6795-sys-clock.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/mediatek,mt6795-sys-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek System Clock Controller for MT6795 + +maintainers: + - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> + - Chun-Jie Chen <chun-jie.chen@mediatek.com> + +description: + The Mediatek system clock controller provides various clocks and system + configuration like reset and bus protection on MT6795. + +properties: + compatible: + items: + - enum: + - mediatek,mt6795-apmixedsys + - mediatek,mt6795-infracfg + - mediatek,mt6795-pericfg + - mediatek,mt6795-topckgen + - const: syscon + + reg: + maxItems: 1 + + '#clock-cells': + const: 1 + + '#reset-cells': + const: 1 + +required: + - compatible + - reg + - '#clock-cells' + +additionalProperties: false + +examples: + - | + soc { + #address-cells = <2>; + #size-cells = <2>; + + topckgen: clock-controller@10000000 { + compatible = "mediatek,mt6795-topckgen", "syscon"; + reg = <0 0x10000000 0 0x1000>; + #clock-cells = <1>; + }; + }; diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt7621-sysc.yaml b/Documentation/devicetree/bindings/clock/mediatek,mt7621-sysc.yaml index 0c0b0ae5e2ac..b42f0f5c11b7 100644 --- a/Documentation/devicetree/bindings/clock/mediatek,mt7621-sysc.yaml +++ b/Documentation/devicetree/bindings/clock/mediatek,mt7621-sysc.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/mediatek,mt7621-sysc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: MT7621 Clock Device Tree Bindings +title: MT7621 Clock maintainers: - Sergio Paracuellos <sergio.paracuellos@gmail.com> diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt8365-clock.yaml b/Documentation/devicetree/bindings/clock/mediatek,mt8365-clock.yaml new file mode 100644 index 000000000000..b327ecb4e524 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/mediatek,mt8365-clock.yaml @@ -0,0 +1,42 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/mediatek,mt8365-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek Functional Clock Controller for MT8365 + +maintainers: + - Markus Schneider-Pargmann <msp@baylibre.com> + +properties: + compatible: + items: + - enum: + - mediatek,mt8365-apu + - mediatek,mt8365-imgsys + - mediatek,mt8365-mfgcfg + - mediatek,mt8365-vdecsys + - mediatek,mt8365-vencsys + - const: syscon + + reg: + maxItems: 1 + + '#clock-cells': + const: 1 + +required: + - compatible + - reg + - '#clock-cells' + +additionalProperties: false + +examples: + - | + apu: clock-controller@19020000 { + compatible = "mediatek,mt8365-apu", "syscon"; + reg = <0x19020000 0x1000>; + #clock-cells = <1>; + }; diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt8365-sys-clock.yaml b/Documentation/devicetree/bindings/clock/mediatek,mt8365-sys-clock.yaml new file mode 100644 index 000000000000..643f84660c8e --- /dev/null +++ b/Documentation/devicetree/bindings/clock/mediatek,mt8365-sys-clock.yaml @@ -0,0 +1,47 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/mediatek,mt8365-sys-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek System Clock Controller for MT8365 + +maintainers: + - Markus Schneider-Pargmann <msp@baylibre.com> + +description: + The apmixedsys module provides most of PLLs which generated from SoC 26m. + The topckgen provides dividers and muxes which provides the clock source to other IP blocks. + The infracfg_ao and pericfg_ao provides clock gate in peripheral and infrastructure IP blocks. + +properties: + compatible: + items: + - enum: + - mediatek,mt8365-topckgen + - mediatek,mt8365-infracfg + - mediatek,mt8365-apmixedsys + - mediatek,mt8365-pericfg + - mediatek,mt8365-mcucfg + - const: syscon + + reg: + maxItems: 1 + + '#clock-cells': + const: 1 + +required: + - compatible + - reg + - '#clock-cells' + +additionalProperties: false + +examples: + - | + topckgen: clock-controller@10000000 { + compatible = "mediatek,mt8365-topckgen", "syscon"; + reg = <0x10000000 0x1000>; + #clock-cells = <1>; + }; diff --git a/Documentation/devicetree/bindings/clock/mediatek,topckgen.yaml b/Documentation/devicetree/bindings/clock/mediatek,topckgen.yaml index 5b8b37a2e594..81531b5b0db7 100644 --- a/Documentation/devicetree/bindings/clock/mediatek,topckgen.yaml +++ b/Documentation/devicetree/bindings/clock/mediatek,topckgen.yaml @@ -33,6 +33,7 @@ properties: - mediatek,mt2712-topckgen - mediatek,mt6765-topckgen - mediatek,mt6779-topckgen + - mediatek,mt6795-topckgen - mediatek,mt7629-topckgen - mediatek,mt7986-topckgen - mediatek,mt8167-topckgen diff --git a/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml b/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml new file mode 100644 index 000000000000..f1770360798f --- /dev/null +++ b/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml @@ -0,0 +1,80 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/microchip,mpfs-ccc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip PolarFire SoC Fabric Clock Conditioning Circuitry + +maintainers: + - Conor Dooley <conor.dooley@microchip.com> + +description: | + Microchip PolarFire SoC has 4 Clock Conditioning Circuitry blocks. Each of + these blocks contains two PLLs and 2 DLLs & are located in the four corners of + the FPGA. For more information see "PolarFire SoC FPGA Clocking Resources" at: + https://onlinedocs.microchip.com/pr/GUID-8F0CC4C0-0317-4262-89CA-CE7773ED1931-en-US-1/index.html + +properties: + compatible: + const: microchip,mpfs-ccc + + reg: + items: + - description: PLL0's control registers + - description: PLL1's control registers + - description: DLL0's control registers + - description: DLL1's control registers + + clocks: + description: + The CCC PLL's have two input clocks. It is required that even if the input + clocks are identical that both are provided. + minItems: 2 + items: + - description: PLL0's refclk0 + - description: PLL0's refclk1 + - description: PLL1's refclk0 + - description: PLL1's refclk1 + - description: DLL0's refclk + - description: DLL1's refclk + + clock-names: + minItems: 2 + items: + - const: pll0_ref0 + - const: pll0_ref1 + - const: pll1_ref0 + - const: pll1_ref1 + - const: dll0_ref + - const: dll1_ref + + '#clock-cells': + const: 1 + description: | + The clock consumer should specify the desired clock by having the clock + ID in its "clocks" phandle cell. + See include/dt-bindings/clock/microchip,mpfs-clock.h for the full list of + PolarFire clock IDs. + +required: + - compatible + - reg + - clocks + - clock-names + - '#clock-cells' + +additionalProperties: false + +examples: + - | + clock-controller@38100000 { + compatible = "microchip,mpfs-ccc"; + reg = <0x38010000 0x1000>, <0x38020000 0x1000>, + <0x39010000 0x1000>, <0x39020000 0x1000>; + #clock-cells = <1>; + clocks = <&refclk_ccc>, <&refclk_ccc>, <&refclk_ccc>, <&refclk_ccc>, + <&refclk_ccc>, <&refclk_ccc>; + clock-names = "pll0_ref0", "pll0_ref1", "pll1_ref0", "pll1_ref1", + "dll0_ref", "dll1_ref"; + }; diff --git a/Documentation/devicetree/bindings/clock/microchip,mpfs.yaml b/Documentation/devicetree/bindings/clock/microchip,mpfs-clkcfg.yaml index 016a4f378b9b..b2ce78722247 100644 --- a/Documentation/devicetree/bindings/clock/microchip,mpfs.yaml +++ b/Documentation/devicetree/bindings/clock/microchip,mpfs-clkcfg.yaml @@ -1,7 +1,7 @@ # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- -$id: http://devicetree.org/schemas/clock/microchip,mpfs.yaml# +$id: http://devicetree.org/schemas/clock/microchip,mpfs-clkcfg.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Microchip PolarFire Clock Control Module Binding @@ -40,8 +40,21 @@ properties: const: 1 description: | The clock consumer should specify the desired clock by having the clock - ID in its "clocks" phandle cell. See include/dt-bindings/clock/microchip,mpfs-clock.h - for the full list of PolarFire clock IDs. + ID in its "clocks" phandle cell. + See include/dt-bindings/clock/microchip,mpfs-clock.h for the full list of + PolarFire clock IDs. + + resets: + maxItems: 1 + + '#reset-cells': + description: + The AHB/AXI peripherals on the PolarFire SoC have reset support, so from + CLK_ENVM to CLK_CFM. The reset consumer should specify the desired + peripheral via the clock ID in its "resets" phandle cell. + See include/dt-bindings/clock/microchip,mpfs-clock.h for the full list of + PolarFire clock IDs. + const: 1 required: - compatible diff --git a/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml b/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml index fbd758470b88..fe6ca4f68bbe 100644 --- a/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm A53 PLL Binding maintainers: - - Sivaprakash Murugesan <sivaprak@codeaurora.org> + - Bjorn Andersson <andersson@kernel.org> description: The A53 PLL on few Qualcomm platforms is the main CPU PLL used used for @@ -17,6 +17,7 @@ properties: compatible: enum: - qcom,ipq6018-a53pll + - qcom,ipq8074-a53pll - qcom,msm8916-a53pll - qcom,msm8939-a53pll diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-apq8064.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-apq8064.yaml index 3cf404c9325a..6b4efd64c154 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-apq8064.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-apq8064.yaml @@ -38,6 +38,15 @@ properties: description: child tsens device $ref: /schemas/thermal/qcom-tsens.yaml# + clocks: + maxItems: 3 + + clock-names: + items: + - const: cxo + - const: pxo + - const: pll4 + nvmem-cells: minItems: 1 maxItems: 2 diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8660.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8660.yaml new file mode 100644 index 000000000000..09b2ea60d356 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8660.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,gcc-msm8660.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Global Clock & Reset Controller Binding for MSM8660 + +maintainers: + - Stephen Boyd <sboyd@kernel.org> + - Taniya Das <quic_tdas@quicinc.com> + +description: | + Qualcomm global clock control module which supports the clocks and resets on + MSM8660 + + See also: + - dt-bindings/clock/qcom,gcc-msm8660.h + - dt-bindings/reset/qcom,gcc-msm8660.h + +allOf: + - $ref: "qcom,gcc.yaml#" + +properties: + compatible: + enum: + - qcom,gcc-msm8660 + + clocks: + maxItems: 2 + + clock-names: + items: + - const: pxo + - const: cxo + +required: + - compatible + +unevaluatedProperties: false + +examples: + # Example for GCC for MSM8974: + - | + clock-controller@900000 { + compatible = "qcom,gcc-msm8660"; + reg = <0x900000 0x4000>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + clocks = <&pxo_board>, <&cxo_board>; + clock-names = "pxo", "cxo"; + }; +... diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8909.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8909.yaml new file mode 100644 index 000000000000..2272ea5f78d0 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8909.yaml @@ -0,0 +1,58 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,gcc-msm8909.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Global Clock & Reset Controller Binding for MSM8909 + +maintainers: + - Stephan Gerhold <stephan@gerhold.net> + +description: | + Qualcomm global clock control module which supports the clocks, resets and + power domains on MSM8909. + + See also: + - dt-bindings/clock/qcom,gcc-msm8909.h + +properties: + compatible: + const: qcom,gcc-msm8909 + + clocks: + items: + - description: XO source + - description: Sleep clock source + - description: DSI phy instance 0 dsi clock + - description: DSI phy instance 0 byte clock + + clock-names: + items: + - const: xo + - const: sleep_clk + - const: dsi0pll + - const: dsi0pllbyte + +required: + - compatible + - clocks + - clock-names + +allOf: + - $ref: qcom,gcc.yaml# + +unevaluatedProperties: false + +examples: + - | + gcc: clock-controller@1800000 { + compatible = "qcom,gcc-msm8909"; + reg = <0x01800000 0x80000>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + clocks = <&xo_board>, <&sleep_clk>, <&dsi0_phy 1>, <&dsi0_phy 0>; + clock-names = "xo", "sleep_clk", "dsi0pll", "dsi0pllbyte"; + }; +... diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8916.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8916.yaml new file mode 100644 index 000000000000..2ceb1e501ef9 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8916.yaml @@ -0,0 +1,66 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,gcc-msm8916.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Global Clock & Reset Controller Binding for MSM8916 and MSM8939 + +maintainers: + - Stephen Boyd <sboyd@kernel.org> + - Taniya Das <quic_tdas@quicinc.com> + +description: | + Qualcomm global clock control module which supports the clocks, resets and + power domains on MSM8916 or MSM8939. + + See also: + - dt-bindings/clock/qcom,gcc-msm8916.h + - dt-bindings/clock/qcom,gcc-msm8939.h + - dt-bindings/reset/qcom,gcc-msm8916.h + - dt-bindings/reset/qcom,gcc-msm8939.h + +properties: + compatible: + enum: + - qcom,gcc-msm8916 + - qcom,gcc-msm8939 + + clocks: + items: + - description: XO source + - description: Sleep clock source + - description: DSI phy instance 0 dsi clock + - description: DSI phy instance 0 byte clock + - description: External MCLK clock + - description: External Primary I2S clock + - description: External Secondary I2S clock + + clock-names: + items: + - const: xo + - const: sleep_clk + - const: dsi0pll + - const: dsi0pllbyte + - const: ext_mclk + - const: ext_pri_i2s + - const: ext_sec_i2s + +required: + - compatible + +allOf: + - $ref: qcom,gcc.yaml# + +unevaluatedProperties: false + +examples: + - | + clock-controller@300000 { + compatible = "qcom,gcc-msm8916"; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + reg = <0x300000 0x90000>; + }; +... diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8976.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8976.yaml index f3430b159caa..4b7d69518371 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8976.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8976.yaml @@ -45,29 +45,16 @@ properties: description: Phandle to voltage regulator providing power to the GX domain. - '#clock-cells': - const: 1 - - '#reset-cells': - const: 1 - - '#power-domain-cells': - const: 1 - - reg: - maxItems: 1 - required: - compatible - - reg - clocks - clock-names - vdd_gfx-supply - - '#clock-cells' - - '#reset-cells' - - '#power-domain-cells' -additionalProperties: false +allOf: + - $ref: qcom,gcc.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8994.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8994.yaml index 22e67b238bb6..7b9fef6d9b23 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8994.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8994.yaml @@ -32,28 +32,15 @@ properties: - const: xo - const: sleep - '#clock-cells': - const: 1 - - '#reset-cells': - const: 1 - - '#power-domain-cells': - const: 1 - - reg: - maxItems: 1 - required: - compatible - clocks - clock-names - - reg - - '#clock-cells' - - '#reset-cells' - - '#power-domain-cells' -additionalProperties: false +allOf: + - $ref: qcom,gcc.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8996.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8996.yaml index 005e0edd4609..dfc5165db9f1 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8996.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8996.yaml @@ -49,30 +49,13 @@ properties: - const: ufs_rx_symbol_1_clk_src - const: ufs_tx_symbol_0_clk_src - '#clock-cells': - const: 1 - - '#reset-cells': - const: 1 - - '#power-domain-cells': - const: 1 - - reg: - maxItems: 1 - - protected-clocks: - description: - Protected clock specifier list as per common clock binding. - required: - compatible - - reg - - '#clock-cells' - - '#reset-cells' - - '#power-domain-cells' -additionalProperties: false +allOf: + - $ref: qcom,gcc.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8998.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8998.yaml index 8151c0a05649..544a2335cf05 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8998.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8998.yaml @@ -37,32 +37,15 @@ properties: - const: core_bi_pll_test_se # Optional clock minItems: 2 - '#clock-cells': - const: 1 - - '#reset-cells': - const: 1 - - '#power-domain-cells': - const: 1 - - reg: - maxItems: 1 - - protected-clocks: - description: - Protected clock specifier list as per common clock binding. - required: - compatible - clocks - clock-names - - reg - - '#clock-cells' - - '#reset-cells' - - '#power-domain-cells' -additionalProperties: false +allOf: + - $ref: qcom,gcc.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml index 6c78df0c46a9..76988e04c7db 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml @@ -18,11 +18,7 @@ description: | - dt-bindings/clock/qcom,gcc-ipq4019.h - dt-bindings/clock/qcom,gcc-ipq6018.h - dt-bindings/reset/qcom,gcc-ipq6018.h - - dt-bindings/clock/qcom,gcc-msm8939.h - dt-bindings/clock/qcom,gcc-msm8953.h - - dt-bindings/reset/qcom,gcc-msm8939.h - - dt-bindings/clock/qcom,gcc-msm8660.h - - dt-bindings/reset/qcom,gcc-msm8660.h - dt-bindings/clock/qcom,gcc-msm8974.h (qcom,gcc-msm8226 and qcom,gcc-msm8974) - dt-bindings/reset/qcom,gcc-msm8974.h (qcom,gcc-msm8226 and qcom,gcc-msm8974) - dt-bindings/clock/qcom,gcc-mdm9607.h @@ -40,9 +36,6 @@ properties: - qcom,gcc-ipq6018 - qcom,gcc-mdm9607 - qcom,gcc-msm8226 - - qcom,gcc-msm8660 - - qcom,gcc-msm8916 - - qcom,gcc-msm8939 - qcom,gcc-msm8953 - qcom,gcc-msm8974 - qcom,gcc-msm8974pro diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-qcm2290.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-qcm2290.yaml index 5de9c8263138..aec37e3f5e30 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-qcm2290.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-qcm2290.yaml @@ -30,32 +30,15 @@ properties: - const: bi_tcxo - const: sleep_clk - '#clock-cells': - const: 1 - - '#reset-cells': - const: 1 - - '#power-domain-cells': - const: 1 - - reg: - maxItems: 1 - - protected-clocks: - description: - Protected clock specifier list as per common clock binding. - required: - compatible - clocks - clock-names - - reg - - '#clock-cells' - - '#reset-cells' - - '#power-domain-cells' -additionalProperties: false +allOf: + - $ref: qcom,gcc.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sc7180.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sc7180.yaml index a404c8fbee67..e4d490e65d14 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-sc7180.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sc7180.yaml @@ -33,32 +33,15 @@ properties: - const: bi_tcxo_ao - const: sleep_clk - '#clock-cells': - const: 1 - - '#reset-cells': - const: 1 - - '#power-domain-cells': - const: 1 - - reg: - maxItems: 1 - - protected-clocks: - description: - Protected clock specifier list as per common clock binding. - required: - compatible - clocks - clock-names - - reg - - '#clock-cells' - - '#reset-cells' - - '#power-domain-cells' -additionalProperties: false +allOf: + - $ref: qcom,gcc.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sc7280.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sc7280.yaml index 5693b8997570..ea61367e5abc 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-sc7280.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sc7280.yaml @@ -44,28 +44,15 @@ properties: - const: ufs_phy_tx_symbol_0_clk - const: usb3_phy_wrapper_gcc_usb30_pipe_clk - '#clock-cells': - const: 1 - - '#reset-cells': - const: 1 - - '#power-domain-cells': - const: 1 - - reg: - maxItems: 1 - required: - compatible - clocks - clock-names - - reg - - '#clock-cells' - - '#reset-cells' - - '#power-domain-cells' -additionalProperties: false +allOf: + - $ref: qcom,gcc.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sc8180x.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sc8180x.yaml index f03ef96e57fa..30b5d1215fa8 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-sc8180x.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sc8180x.yaml @@ -32,32 +32,15 @@ properties: - const: bi_tcxo_ao - const: sleep_clk - '#clock-cells': - const: 1 - - '#reset-cells': - const: 1 - - '#power-domain-cells': - const: 1 - - reg: - maxItems: 1 - - protected-clocks: - description: - Protected clock specifier list as per common clock binding. - required: - compatible - clocks - clock-names - - reg - - '#clock-cells' - - '#reset-cells' - - '#power-domain-cells' -additionalProperties: false +allOf: + - $ref: qcom,gcc.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sc8280xp.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sc8280xp.yaml index 0bcdc69c6f89..b1bf768530a3 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-sc8280xp.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sc8280xp.yaml @@ -33,7 +33,7 @@ properties: - description: Primary USB SuperSpeed pipe clock - description: USB4 PHY pipegmux clock source - description: USB4 PHY DP gmux clock source - - description: USB4 PHY sys piegmux clock source + - description: USB4 PHY sys pipegmux clock source - description: USB4 PHY PCIe pipe clock - description: USB4 PHY router max pipe clock - description: Primary USB4 RX0 clock @@ -46,7 +46,7 @@ properties: - description: Second USB4 PHY router max pipe clock - description: Secondary USB4 RX0 clock - description: Secondary USB4 RX1 clock - - description: Multiport USB first SupserSpeed pipe clock + - description: Multiport USB first SuperSpeed pipe clock - description: Multiport USB second SuperSpeed pipe clock - description: PCIe 2a pipe clock - description: PCIe 2b pipe clock @@ -56,30 +56,17 @@ properties: - description: First EMAC controller reference clock - description: Second EMAC controller reference clock - '#clock-cells': - const: 1 - - '#reset-cells': - const: 1 - - '#power-domain-cells': - const: 1 - - reg: - maxItems: 1 - protected-clocks: maxItems: 389 required: - compatible - clocks - - reg - - '#clock-cells' - - '#reset-cells' - - '#power-domain-cells' -additionalProperties: false +allOf: + - $ref: qcom,gcc.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml index daf7906ebc40..e169d46c78f8 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml @@ -19,51 +19,67 @@ description: | properties: compatible: - const: qcom,gcc-sdm845 + enum: + - qcom,gcc-sdm670 + - qcom,gcc-sdm845 clocks: - items: - - description: Board XO source - - description: Board active XO source - - description: Sleep clock source - - description: PCIE 0 Pipe clock source - - description: PCIE 1 Pipe clock source + minItems: 3 + maxItems: 5 clock-names: - items: - - const: bi_tcxo - - const: bi_tcxo_ao - - const: sleep_clk - - const: pcie_0_pipe_clk - - const: pcie_1_pipe_clk - - '#clock-cells': - const: 1 - - '#reset-cells': - const: 1 + minItems: 3 + maxItems: 5 power-domains: maxItems: 1 - '#power-domain-cells': - const: 1 - - reg: - maxItems: 1 - - protected-clocks: - description: - Protected clock specifier list as per common clock binding. - required: - compatible - - reg - - '#clock-cells' - - '#reset-cells' - - '#power-domain-cells' -additionalProperties: false +allOf: + - $ref: qcom,gcc.yaml# + - if: + properties: + compatible: + contains: + const: qcom,gcc-sdm670 + then: + properties: + clocks: + items: + - description: Board XO source + - description: Board active XO source + - description: Sleep clock source + clock-names: + items: + - const: bi_tcxo + - const: bi_tcxo_ao + - const: sleep_clk + + - if: + properties: + compatible: + contains: + const: qcom,gcc-sdm845 + then: + properties: + clocks: + items: + - description: Board XO source + - description: Board active XO source + - description: Sleep clock source + - description: PCIE 0 Pipe clock source + - description: PCIE 1 Pipe clock source + clock-names: + items: + - const: bi_tcxo + - const: bi_tcxo_ao + - const: sleep_clk + - const: pcie_0_pipe_clk + - const: pcie_1_pipe_clk + +unevaluatedProperties: false examples: # Example for GCC for SDM845: diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sdx55.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sdx55.yaml index b0d1c65aa354..13ffa16e0833 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-sdx55.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sdx55.yaml @@ -35,28 +35,15 @@ properties: - const: core_bi_pll_test_se # Optional clock minItems: 2 - '#clock-cells': - const: 1 - - '#reset-cells': - const: 1 - - '#power-domain-cells': - const: 1 - - reg: - maxItems: 1 - required: - compatible - clocks - clock-names - - reg - - '#clock-cells' - - '#reset-cells' - - '#power-domain-cells' -additionalProperties: false +allOf: + - $ref: qcom,gcc.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sdx65.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sdx65.yaml index 16c4cdc7b4d6..8a1419c4d465 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-sdx65.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sdx65.yaml @@ -20,9 +20,6 @@ properties: compatible: const: qcom,gcc-sdx65 - reg: - maxItems: 1 - clocks: items: - description: Board XO source @@ -43,25 +40,15 @@ properties: - const: core_bi_pll_test_se # Optional clock minItems: 5 - '#clock-cells': - const: 1 - - '#reset-cells': - const: 1 - - '#power-domain-cells': - const: 1 - required: - compatible - - reg - clocks - clock-names - - '#clock-cells' - - '#reset-cells' - - '#power-domain-cells' -additionalProperties: false +allOf: + - $ref: qcom,gcc.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sm6115.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sm6115.yaml index 26050da844d5..bb81a27a1b16 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-sm6115.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sm6115.yaml @@ -30,32 +30,15 @@ properties: - const: bi_tcxo - const: sleep_clk - '#clock-cells': - const: 1 - - '#reset-cells': - const: 1 - - '#power-domain-cells': - const: 1 - - reg: - maxItems: 1 - - protected-clocks: - description: - Protected clock specifier list as per common clock binding. - required: - compatible - clocks - clock-names - - reg - - '#clock-cells' - - '#reset-cells' - - '#power-domain-cells' -additionalProperties: false +allOf: + - $ref: qcom,gcc.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sm6125.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sm6125.yaml index ab12b391effc..03e84e15815c 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-sm6125.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sm6125.yaml @@ -30,32 +30,15 @@ properties: - const: bi_tcxo - const: sleep_clk - '#clock-cells': - const: 1 - - '#reset-cells': - const: 1 - - '#power-domain-cells': - const: 1 - - reg: - maxItems: 1 - - protected-clocks: - description: - Protected clock specifier list as per common clock binding. - required: - compatible - clocks - clock-names - - reg - - '#clock-cells' - - '#reset-cells' - - '#power-domain-cells' -additionalProperties: false +allOf: + - $ref: qcom,gcc.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sm6350.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sm6350.yaml index 20926cd8293e..cbe98c01c085 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-sm6350.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sm6350.yaml @@ -32,32 +32,15 @@ properties: - const: bi_tcxo_ao - const: sleep_clk - '#clock-cells': - const: 1 - - '#reset-cells': - const: 1 - - '#power-domain-cells': - const: 1 - - reg: - maxItems: 1 - - protected-clocks: - description: - Protected clock specifier list as per common clock binding. - required: - compatible - clocks - clock-names - - reg - - '#clock-cells' - - '#reset-cells' - - '#power-domain-cells' -additionalProperties: false +allOf: + - $ref: qcom,gcc.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sm8150.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sm8150.yaml index 12766a866625..0333ccb07d8d 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-sm8150.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sm8150.yaml @@ -31,32 +31,15 @@ properties: - const: bi_tcxo - const: sleep_clk - '#clock-cells': - const: 1 - - '#reset-cells': - const: 1 - - '#power-domain-cells': - const: 1 - - reg: - maxItems: 1 - - protected-clocks: - description: - Protected clock specifier list as per common clock binding. - required: - compatible - clocks - clock-names - - reg - - '#clock-cells' - - '#reset-cells' - - '#power-domain-cells' -additionalProperties: false +allOf: + - $ref: qcom,gcc.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sm8250.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sm8250.yaml index 80bd6caf5bc9..4e2a9cac0a91 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-sm8250.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sm8250.yaml @@ -31,32 +31,15 @@ properties: - const: bi_tcxo - const: sleep_clk - '#clock-cells': - const: 1 - - '#reset-cells': - const: 1 - - '#power-domain-cells': - const: 1 - - reg: - maxItems: 1 - - protected-clocks: - description: - Protected clock specifier list as per common clock binding. - required: - compatible - clocks - clock-names - - reg - - '#clock-cells' - - '#reset-cells' - - '#power-domain-cells' -additionalProperties: false +allOf: + - $ref: qcom,gcc.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sm8350.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sm8350.yaml index 1122700dcc2b..3edbeca70a9c 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-sm8350.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sm8350.yaml @@ -54,28 +54,15 @@ properties: - const: usb3_uni_phy_sec_gcc_usb30_pipe_clk # Optional clock minItems: 2 - '#clock-cells': - const: 1 - - '#reset-cells': - const: 1 - - '#power-domain-cells': - const: 1 - - reg: - maxItems: 1 - required: - compatible - clocks - clock-names - - reg - - '#clock-cells' - - '#reset-cells' - - '#power-domain-cells' -additionalProperties: false +allOf: + - $ref: qcom,gcc.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sm8450.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sm8450.yaml index 58d98a766de6..102ce6862e24 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-sm8450.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sm8450.yaml @@ -46,28 +46,15 @@ properties: - const: usb3_phy_wrapper_gcc_usb30_pipe_clk # Optional clock minItems: 2 - '#clock-cells': - const: 1 - - '#reset-cells': - const: 1 - - '#power-domain-cells': - const: 1 - - reg: - maxItems: 1 - required: - compatible - - reg - clocks - clock-names - - '#clock-cells' - - '#reset-cells' - - '#power-domain-cells' -additionalProperties: false +allOf: + - $ref: qcom,gcc.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml index 9ebcb1943b0a..a7d0af1bd9e0 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml @@ -17,6 +17,7 @@ description: | dt-bindings/clock/qcom,gpucc-sdm845.h dt-bindings/clock/qcom,gpucc-sc7180.h dt-bindings/clock/qcom,gpucc-sc7280.h + dt-bindings/clock/qcom,gpucc-sc8280xp.h dt-bindings/clock/qcom,gpucc-sm6350.h dt-bindings/clock/qcom,gpucc-sm8150.h dt-bindings/clock/qcom,gpucc-sm8250.h @@ -28,6 +29,7 @@ properties: - qcom,sc7180-gpucc - qcom,sc7280-gpucc - qcom,sc8180x-gpucc + - qcom,sc8280xp-gpucc - qcom,sm6350-gpucc - qcom,sm8150-gpucc - qcom,sm8250-gpucc diff --git a/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml b/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml index 32e87014bb55..03faab5b6a41 100644 --- a/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml @@ -31,30 +31,12 @@ properties: - qcom,mmcc-sdm660 clocks: - items: - - description: Board XO source - - description: Board sleep source - - description: Global PLL 0 clock - - description: DSI phy instance 0 dsi clock - - description: DSI phy instance 0 byte clock - - description: DSI phy instance 1 dsi clock - - description: DSI phy instance 1 byte clock - - description: HDMI phy PLL clock - - description: DisplayPort phy PLL vco clock - - description: DisplayPort phy PLL link clock + minItems: 8 + maxItems: 10 clock-names: - items: - - const: xo - - const: sleep - - const: gpll0 - - const: dsi0dsi - - const: dsi0byte - - const: dsi1dsi - - const: dsi1byte - - const: hdmipll - - const: dpvco - - const: dplink + minItems: 8 + maxItems: 10 '#clock-cells': const: 1 @@ -85,16 +67,179 @@ required: additionalProperties: false -if: - properties: - compatible: - contains: - const: qcom,mmcc-msm8998 - -then: - required: - - clocks - - clock-names +allOf: + - if: + properties: + compatible: + contains: + enum: + - qcom,mmcc-apq8064 + - qcom,mmcc-msm8960 + then: + properties: + clocks: + items: + - description: Board PXO source + - description: PLL 3 clock + - description: PLL 3 Vote clock + - description: DSI phy instance 1 dsi clock + - description: DSI phy instance 1 byte clock + - description: DSI phy instance 2 dsi clock + - description: DSI phy instance 2 byte clock + - description: HDMI phy PLL clock + + clock-names: + items: + - const: pxo + - const: pll3 + - const: pll8_vote + - const: dsi1pll + - const: dsi1pllbyte + - const: dsi2pll + - const: dsi2pllbyte + - const: hdmipll + + - if: + properties: + compatible: + contains: + enum: + - qcom,mmcc-msm8994 + - qcom,mmcc-msm8998 + - qcom,mmcc-sdm630 + - qcom,mmcc-sdm660 + then: + required: + - clocks + - clock-names + + - if: + properties: + compatible: + contains: + const: qcom,mmcc-msm8994 + then: + properties: + clocks: + items: + - description: Board XO source + - description: Global PLL 0 clock + - description: MMSS NoC AHB clock + - description: GFX3D clock + - description: DSI phy instance 0 dsi clock + - description: DSI phy instance 0 byte clock + - description: DSI phy instance 1 dsi clock + - description: DSI phy instance 1 byte clock + - description: HDMI phy PLL clock + + clock-names: + items: + - const: xo + - const: gpll0 + - const: mmssnoc_ahb + - const: oxili_gfx3d_clk_src + - const: dsi0pll + - const: dsi0pllbyte + - const: dsi1pll + - const: dsi1pllbyte + - const: hdmipll + + - if: + properties: + compatible: + contains: + const: qcom,mmcc-msm8996 + then: + properties: + clocks: + items: + - description: Board XO source + - description: Global PLL 0 clock + - description: MMSS NoC AHB clock + - description: DSI phy instance 0 dsi clock + - description: DSI phy instance 0 byte clock + - description: DSI phy instance 1 dsi clock + - description: DSI phy instance 1 byte clock + - description: HDMI phy PLL clock + + clock-names: + items: + - const: xo + - const: gpll0 + - const: gcc_mmss_noc_cfg_ahb_clk + - const: dsi0pll + - const: dsi0pllbyte + - const: dsi1pll + - const: dsi1pllbyte + - const: hdmipll + + - if: + properties: + compatible: + contains: + const: qcom,mmcc-msm8998 + then: + properties: + clocks: + items: + - description: Board XO source + - description: Global PLL 0 clock + - description: DSI phy instance 0 dsi clock + - description: DSI phy instance 0 byte clock + - description: DSI phy instance 1 dsi clock + - description: DSI phy instance 1 byte clock + - description: HDMI phy PLL clock + - description: DisplayPort phy PLL link clock + - description: DisplayPort phy PLL vco clock + - description: Test clock + + clock-names: + items: + - const: xo + - const: gpll0 + - const: dsi0dsi + - const: dsi0byte + - const: dsi1dsi + - const: dsi1byte + - const: hdmipll + - const: dplink + - const: dpvco + - const: core_bi_pll_test_se + + - if: + properties: + compatible: + contains: + enum: + - qcom,mmcc-sdm630 + - qcom,mmcc-sdm660 + then: + properties: + clocks: + items: + - description: Board XO source + - description: Board sleep source + - description: Global PLL 0 clock + - description: Global PLL 0 DIV clock + - description: DSI phy instance 0 dsi clock + - description: DSI phy instance 0 byte clock + - description: DSI phy instance 1 dsi clock + - description: DSI phy instance 1 byte clock + - description: DisplayPort phy PLL link clock + - description: DisplayPort phy PLL vco clock + + clock-names: + items: + - const: xo + - const: sleep_clk + - const: gpll0 + - const: gpll0_div + - const: dsi0pll + - const: dsi0pllbyte + - const: dsi1pll + - const: dsi1pllbyte + - const: dp_link_2x_clk_divsel_five + - const: dp_vco_divided_clk_src_mux examples: # Example for MMCC for MSM8960: diff --git a/Documentation/devicetree/bindings/clock/qcom,msm8996-apcc.yaml b/Documentation/devicetree/bindings/clock/qcom,msm8996-apcc.yaml index a20cb10636dd..c4971234fef8 100644 --- a/Documentation/devicetree/bindings/clock/qcom,msm8996-apcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,msm8996-apcc.yaml @@ -26,22 +26,18 @@ properties: clocks: items: - - description: Primary PLL clock for power cluster (little) - - description: Primary PLL clock for perf cluster (big) - - description: Alternate PLL clock for power cluster (little) - - description: Alternate PLL clock for perf cluster (big) + - description: XO source clock-names: items: - - const: pwrcl_pll - - const: perfcl_pll - - const: pwrcl_alt_pll - - const: perfcl_alt_pll + - const: xo required: - compatible - reg - '#clock-cells' + - clocks + - clock-names additionalProperties: false @@ -51,4 +47,7 @@ examples: compatible = "qcom,msm8996-apcc"; reg = <0x6400000 0x90000>; #clock-cells = <1>; + + clocks = <&xo_board>; + clock-names = "xo"; }; diff --git a/Documentation/devicetree/bindings/clock/qcom,rpmcc.yaml b/Documentation/devicetree/bindings/clock/qcom,rpmcc.yaml index d63b45ad06e8..2a95bf8664f9 100644 --- a/Documentation/devicetree/bindings/clock/qcom,rpmcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,rpmcc.yaml @@ -29,6 +29,7 @@ properties: - qcom,rpmcc-mdm9607 - qcom,rpmcc-msm8226 - qcom,rpmcc-msm8660 + - qcom,rpmcc-msm8909 - qcom,rpmcc-msm8916 - qcom,rpmcc-msm8936 - qcom,rpmcc-msm8953 @@ -43,6 +44,7 @@ properties: - qcom,rpmcc-sdm660 - qcom,rpmcc-sm6115 - qcom,rpmcc-sm6125 + - qcom,rpmcc-sm6375 - const: qcom,rpmcc '#clock-cells': diff --git a/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml b/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml index 8fcaf418f84a..437a34b930e3 100644 --- a/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml @@ -21,6 +21,7 @@ properties: - qcom,sc7280-rpmh-clk - qcom,sc8180x-rpmh-clk - qcom,sc8280xp-rpmh-clk + - qcom,sdm670-rpmh-clk - qcom,sdm845-rpmh-clk - qcom,sdx55-rpmh-clk - qcom,sdx65-rpmh-clk diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml index 47028d7b98e4..633887dc2f8a 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml @@ -36,13 +36,11 @@ properties: items: - description: LPASS qdsp6ss register - description: LPASS top-cc register - - description: LPASS cc register reg-names: items: - const: qdsp6ss - const: top_cc - - const: cc required: - compatible @@ -59,8 +57,8 @@ examples: #include <dt-bindings/clock/qcom,lpass-sc7280.h> clock-controller@3000000 { compatible = "qcom,sc7280-lpasscc"; - reg = <0x03000000 0x40>, <0x03c04000 0x4>, <0x03389000 0x24>; - reg-names = "qdsp6ss", "top_cc", "cc"; + reg = <0x03000000 0x40>, <0x03c04000 0x4>; + reg-names = "qdsp6ss", "top_cc"; clocks = <&gcc GCC_CFG_NOC_LPASS_CLK>; clock-names = "iface"; #clock-cells = <1>; diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml index bad9135489de..f50e284e5f46 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml @@ -22,6 +22,8 @@ properties: clock-names: true + reg: true + compatible: enum: - qcom,sc7280-lpassaoncc @@ -38,8 +40,14 @@ properties: '#power-domain-cells': const: 1 - reg: - maxItems: 1 + '#reset-cells': + const: 1 + + qcom,adsp-pil-mode: + description: + Indicates if the LPASS would be brought out of reset using + peripheral loader. + type: boolean required: - compatible @@ -69,6 +77,11 @@ allOf: items: - const: bi_tcxo - const: lpass_aon_cc_main_rcg_clk_src + + reg: + items: + - description: lpass core cc register + - description: lpass audio csr register - if: properties: compatible: @@ -90,6 +103,8 @@ allOf: - const: bi_tcxo_ao - const: iface + reg: + maxItems: 1 - if: properties: compatible: @@ -108,6 +123,8 @@ allOf: items: - const: bi_tcxo + reg: + maxItems: 1 examples: - | #include <dt-bindings/clock/qcom,rpmh.h> @@ -116,13 +133,15 @@ examples: #include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h> lpass_audiocc: clock-controller@3300000 { compatible = "qcom,sc7280-lpassaudiocc"; - reg = <0x3300000 0x30000>; + reg = <0x3300000 0x30000>, + <0x32a9000 0x1000>; clocks = <&rpmhcc RPMH_CXO_CLK>, <&lpass_aon LPASS_AON_CC_MAIN_RCG_CLK_SRC>; clock-names = "bi_tcxo", "lpass_aon_cc_main_rcg_clk_src"; power-domains = <&lpass_aon LPASS_AON_CC_LPASS_AUDIO_HM_GDSC>; #clock-cells = <1>; #power-domain-cells = <1>; + #reset-cells = <1>; }; - | @@ -165,6 +184,7 @@ examples: clocks = <&rpmhcc RPMH_CXO_CLK>, <&rpmhcc RPMH_CXO_CLK_A>, <&lpasscore LPASS_CORE_CC_CORE_CLK>; clock-names = "bi_tcxo", "bi_tcxo_ao","iface"; + qcom,adsp-pil-mode; #clock-cells = <1>; #power-domain-cells = <1>; }; diff --git a/Documentation/devicetree/bindings/clock/qcom,sm6115-dispcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm6115-dispcc.yaml new file mode 100644 index 000000000000..6660ff16ad1b --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,sm6115-dispcc.yaml @@ -0,0 +1,70 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,sm6115-dispcc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Display Clock Controller for SM6115 + +maintainers: + - Bjorn Andersson <andersson@kernel.org> + +description: | + Qualcomm display clock control module which supports the clocks and + power domains on SM6115. + + See also: + include/dt-bindings/clock/qcom,sm6115-dispcc.h + +properties: + compatible: + enum: + - qcom,sm6115-dispcc + + clocks: + items: + - description: Board XO source + - description: Board sleep clock + - description: Byte clock from DSI PHY0 + - description: Pixel clock from DSI PHY0 + - description: GPLL0 DISP DIV clock from GCC + + '#clock-cells': + const: 1 + + '#reset-cells': + const: 1 + + '#power-domain-cells': + const: 1 + + reg: + maxItems: 1 + +required: + - compatible + - reg + - clocks + - '#clock-cells' + - '#reset-cells' + - '#power-domain-cells' + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,rpmcc.h> + #include <dt-bindings/clock/qcom,gcc-sm6115.h> + clock-controller@5f00000 { + compatible = "qcom,sm6115-dispcc"; + reg = <0x5f00000 0x20000>; + clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, + <&sleep_clk>, + <&dsi0_phy 0>, + <&dsi0_phy 1>, + <&gcc GCC_DISP_GPLL0_DIV_CLK_SRC>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; +... diff --git a/Documentation/devicetree/bindings/clock/qcom,sm6375-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm6375-gcc.yaml new file mode 100644 index 000000000000..3c573e1a1257 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,sm6375-gcc.yaml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,sm6375-gcc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Global Clock & Reset Controller Binding for SM6375 + +maintainers: + - Konrad Dybcio <konrad.dybcio@somainline.org> + +description: | + Qualcomm global clock control module which supports the clocks, resets and + power domains on SM6375 + + See also: + - dt-bindings/clock/qcom,sm6375-gcc.h + +allOf: + - $ref: qcom,gcc.yaml# + +properties: + compatible: + const: qcom,sm6375-gcc + + clocks: + items: + - description: Board XO source + - description: Board XO Active-Only source + - description: Sleep clock source + +required: + - compatible + - clocks + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,rpmcc.h> + clock-controller@1400000 { + compatible = "qcom,sm6375-gcc"; + reg = <0x01400000 0x1f0000>; + clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, + <&rpmcc RPM_SMD_XO_A_CLK_SRC>, + <&sleep_clk>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; + +... diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8450-dispcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8450-dispcc.yaml new file mode 100644 index 000000000000..1cc2457f8208 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,sm8450-dispcc.yaml @@ -0,0 +1,98 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,sm8450-dispcc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Display Clock & Reset Controller for SM8450 + +maintainers: + - Dmitry Baryshkov <dmitry.baryshkov@linaro.org> + +description: | + Qualcomm display clock control module which supports the clocks, resets and + power domains on SM8450. + + See also: + include/dt-bindings/clock/qcom,sm8450-dispcc.h + +properties: + compatible: + enum: + - qcom,sm8450-dispcc + + clocks: + minItems: 3 + items: + - description: Board XO source + - description: Board Always On XO source + - description: Display's AHB clock + - description: sleep clock + - description: Byte clock from DSI PHY0 + - description: Pixel clock from DSI PHY0 + - description: Byte clock from DSI PHY1 + - description: Pixel clock from DSI PHY1 + - description: Link clock from DP PHY0 + - description: VCO DIV clock from DP PHY0 + - description: Link clock from DP PHY1 + - description: VCO DIV clock from DP PHY1 + - description: Link clock from DP PHY2 + - description: VCO DIV clock from DP PHY2 + - description: Link clock from DP PHY3 + - description: VCO DIV clock from DP PHY3 + + '#clock-cells': + const: 1 + + '#reset-cells': + const: 1 + + '#power-domain-cells': + const: 1 + + reg: + maxItems: 1 + + power-domains: + description: + A phandle and PM domain specifier for the MMCX power domain. + maxItems: 1 + + required-opps: + description: + A phandle to an OPP node describing required MMCX performance point. + maxItems: 1 + +required: + - compatible + - reg + - clocks + - '#clock-cells' + - '#reset-cells' + - '#power-domain-cells' + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,gcc-sm8450.h> + #include <dt-bindings/clock/qcom,rpmh.h> + #include <dt-bindings/power/qcom-rpmpd.h> + clock-controller@af00000 { + compatible = "qcom,sm8450-dispcc"; + reg = <0x0af00000 0x10000>; + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&rpmhcc RPMH_CXO_CLK_A>, + <&gcc GCC_DISP_AHB_CLK>, + <&sleep_clk>, + <&dsi0_phy 0>, + <&dsi0_phy 1>, + <&dsi1_phy 0>, + <&dsi1_phy 1>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + power-domains = <&rpmhpd SM8450_MMCX>; + required-opps = <&rpmhpd_opp_low_svs>; + }; +... diff --git a/Documentation/devicetree/bindings/clock/renesas,rcar-usb2-clock-sel.yaml b/Documentation/devicetree/bindings/clock/renesas,rcar-usb2-clock-sel.yaml index 6eaabb4d82ec..81f09df7147e 100644 --- a/Documentation/devicetree/bindings/clock/renesas,rcar-usb2-clock-sel.yaml +++ b/Documentation/devicetree/bindings/clock/renesas,rcar-usb2-clock-sel.yaml @@ -47,7 +47,6 @@ properties: maxItems: 1 clocks: - minItems: 4 maxItems: 4 clock-names: @@ -64,7 +63,6 @@ properties: maxItems: 1 resets: - minItems: 2 maxItems: 2 reset-names: diff --git a/Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml b/Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml index d036675e0779..487f74cdc749 100644 --- a/Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml +++ b/Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml @@ -24,7 +24,7 @@ description: | properties: compatible: enum: - - renesas,r9a07g043-cpg # RZ/G2UL{Type-1,Type-2} + - renesas,r9a07g043-cpg # RZ/G2UL{Type-1,Type-2} and RZ/Five - renesas,r9a07g044-cpg # RZ/G2{L,LC} - renesas,r9a07g054-cpg # RZ/V2L - renesas,r9a09g011-cpg # RZ/V2M diff --git a/Documentation/devicetree/bindings/clock/renesas,versaclock7.yaml b/Documentation/devicetree/bindings/clock/renesas,versaclock7.yaml new file mode 100644 index 000000000000..8d4eb4475fc8 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/renesas,versaclock7.yaml @@ -0,0 +1,64 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/renesas,versaclock7.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas Versaclock7 Programmable Clock Device Tree Bindings + +maintainers: + - Alex Helms <alexander.helms.jy@renesas.com> + +description: | + Renesas Versaclock7 is a family of configurable clock generator and + jitter attenuator ICs with fractional and integer dividers. + +properties: + '#clock-cells': + const: 1 + + compatible: + enum: + - renesas,rc21008a + + reg: + maxItems: 1 + + clocks: + items: + - description: External crystal or oscillator + + clock-names: + items: + - const: xin + +required: + - '#clock-cells' + - compatible + - reg + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + vc7_xin: clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <49152000>; + }; + + i2c@0 { + reg = <0x0 0x100>; + #address-cells = <1>; + #size-cells = <0>; + + vc7: clock-controller@9 { + compatible = "renesas,rc21008a"; + reg = <0x9>; + #clock-cells = <1>; + clocks = <&vc7_xin>; + clock-names = "xin"; + }; + }; diff --git a/Documentation/devicetree/bindings/clock/rockchip,px30-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,px30-cru.yaml index 3eec381c7cf5..0f0f64b6f8cb 100644 --- a/Documentation/devicetree/bindings/clock/rockchip,px30-cru.yaml +++ b/Documentation/devicetree/bindings/clock/rockchip,px30-cru.yaml @@ -1,4 +1,4 @@ -# SPDX-License-Identifier: GPL-2.0 +# SPDX-License-Identifier: (GPL-2.0+ OR MIT) %YAML 1.2 --- $id: http://devicetree.org/schemas/clock/rockchip,px30-cru.yaml# diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.yaml index 1376230fede6..ba5b45464315 100644 --- a/Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.yaml +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.yaml @@ -1,4 +1,4 @@ -# SPDX-License-Identifier: GPL-2.0 +# SPDX-License-Identifier: (GPL-2.0+ OR MIT) %YAML 1.2 --- $id: http://devicetree.org/schemas/clock/rockchip,rk3036-cru.yaml# diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3128-cru.txt b/Documentation/devicetree/bindings/clock/rockchip,rk3128-cru.txt deleted file mode 100644 index 6f8744fd301b..000000000000 --- a/Documentation/devicetree/bindings/clock/rockchip,rk3128-cru.txt +++ /dev/null @@ -1,58 +0,0 @@ -* Rockchip RK3126/RK3128 Clock and Reset Unit - -The RK3126/RK3128 clock controller generates and supplies clock to various -controllers within the SoC and also implements a reset controller for SoC -peripherals. - -Required Properties: - -- compatible: should be "rockchip,rk3126-cru" or "rockchip,rk3128-cru" - "rockchip,rk3126-cru" - controller compatible with RK3126 SoC. - "rockchip,rk3128-cru" - controller compatible with RK3128 SoC. -- reg: physical base address of the controller and length of memory mapped - region. -- #clock-cells: should be 1. -- #reset-cells: should be 1. - -Optional Properties: - -- rockchip,grf: phandle to the syscon managing the "general register files" - If missing pll rates are not changeable, due to the missing pll lock status. - -Each clock is assigned an identifier and client nodes can use this identifier -to specify the clock which they consume. All available clocks are defined as -preprocessor macros in the dt-bindings/clock/rk3128-cru.h headers and can be -used in device tree sources. Similar macros exist for the reset sources in -these files. - -External clocks: - -There are several clocks that are generated outside the SoC. It is expected -that they are defined using standard clock bindings with following -clock-output-names: - - "xin24m" - crystal input - required, - - "ext_i2s" - external I2S clock - optional, - - "gmac_clkin" - external GMAC clock - optional - -Example: Clock controller node: - - cru: cru@20000000 { - compatible = "rockchip,rk3128-cru"; - reg = <0x20000000 0x1000>; - rockchip,grf = <&grf>; - - #clock-cells = <1>; - #reset-cells = <1>; - }; - -Example: UART controller node that consumes the clock generated by the clock - controller: - - uart2: serial@20068000 { - compatible = "rockchip,serial"; - reg = <0x20068000 0x100>; - interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; - clock-frequency = <24000000>; - clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>; - clock-names = "sclk_uart", "pclk_uart"; - }; diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3128-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rk3128-cru.yaml new file mode 100644 index 000000000000..b3d9c8eca989 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3128-cru.yaml @@ -0,0 +1,76 @@ +# SPDX-License-Identifier: (GPL-2.0+ OR MIT) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/rockchip,rk3128-cru.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip RK3126/RK3128 Clock and Reset Unit (CRU) + +maintainers: + - Elaine Zhang <zhangqing@rock-chips.com> + - Heiko Stuebner <heiko@sntech.de> + +description: | + The RK3126/RK3128 clock controller generates and supplies clock to various + controllers within the SoC and also implements a reset controller for SoC + peripherals. + Each clock is assigned an identifier and client nodes can use this identifier + to specify the clock which they consume. All available clocks are defined as + preprocessor macros in the dt-bindings/clock/rk3128-cru.h headers and can be + used in device tree sources. Similar macros exist for the reset sources in + these files. + +properties: + compatible: + enum: + - rockchip,rk3126-cru + - rockchip,rk3128-cru + + reg: + maxItems: 1 + + "#clock-cells": + const: 1 + + "#reset-cells": + const: 1 + + clocks: + minItems: 1 + maxItems: 3 + + clock-names: + minItems: 1 + items: + - const: xin24m + - enum: + - ext_i2s + - gmac_clkin + - enum: + - ext_i2s + - gmac_clkin + + rockchip,grf: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to the syscon managing the "general register files" (GRF), + if missing pll rates are not changeable, due to the missing pll + lock status. + +required: + - compatible + - reg + - "#clock-cells" + - "#reset-cells" + +additionalProperties: false + +examples: + - | + cru: clock-controller@20000000 { + compatible = "rockchip,rk3128-cru"; + reg = <0x20000000 0x1000>; + rockchip,grf = <&grf>; + #clock-cells = <1>; + #reset-cells = <1>; + }; diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3228-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rk3228-cru.yaml index cf7dc01d9478..1050fff72ade 100644 --- a/Documentation/devicetree/bindings/clock/rockchip,rk3228-cru.yaml +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3228-cru.yaml @@ -1,4 +1,4 @@ -# SPDX-License-Identifier: GPL-2.0 +# SPDX-License-Identifier: (GPL-2.0+ OR MIT) %YAML 1.2 --- $id: http://devicetree.org/schemas/clock/rockchip,rk3228-cru.yaml# diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.yaml index 96bc05749e1a..6655e97d52e4 100644 --- a/Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.yaml +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.yaml @@ -1,4 +1,4 @@ -# SPDX-License-Identifier: GPL-2.0 +# SPDX-License-Identifier: (GPL-2.0+ OR MIT) %YAML 1.2 --- $id: http://devicetree.org/schemas/clock/rockchip,rk3288-cru.yaml# diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3308-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rk3308-cru.yaml index 523ee578a586..fec37f5b80f6 100644 --- a/Documentation/devicetree/bindings/clock/rockchip,rk3308-cru.yaml +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3308-cru.yaml @@ -1,4 +1,4 @@ -# SPDX-License-Identifier: GPL-2.0 +# SPDX-License-Identifier: (GPL-2.0+ OR MIT) %YAML 1.2 --- $id: http://devicetree.org/schemas/clock/rockchip,rk3308-cru.yaml# diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3368-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rk3368-cru.yaml index adb67877720d..90af242b41c1 100644 --- a/Documentation/devicetree/bindings/clock/rockchip,rk3368-cru.yaml +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3368-cru.yaml @@ -1,4 +1,4 @@ -# SPDX-License-Identifier: GPL-2.0 +# SPDX-License-Identifier: (GPL-2.0+ OR MIT) %YAML 1.2 --- $id: http://devicetree.org/schemas/clock/rockchip,rk3368-cru.yaml# diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.yaml index 54da1e31ea73..0b758e015ee3 100644 --- a/Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.yaml +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.yaml @@ -1,4 +1,4 @@ -# SPDX-License-Identifier: GPL-2.0-only +# SPDX-License-Identifier: (GPL-2.0+ OR MIT) %YAML 1.2 --- $id: http://devicetree.org/schemas/clock/rockchip,rk3399-cru.yaml# diff --git a/Documentation/devicetree/bindings/clock/rockchip,rv1108-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rv1108-cru.yaml index 20421c22f184..4611d920b8df 100644 --- a/Documentation/devicetree/bindings/clock/rockchip,rv1108-cru.yaml +++ b/Documentation/devicetree/bindings/clock/rockchip,rv1108-cru.yaml @@ -1,4 +1,4 @@ -# SPDX-License-Identifier: GPL-2.0 +# SPDX-License-Identifier: (GPL-2.0+ OR MIT) %YAML 1.2 --- $id: http://devicetree.org/schemas/clock/rockchip,rv1108-cru.yaml# diff --git a/Documentation/devicetree/bindings/clock/rockchip,rv1126-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rv1126-cru.yaml new file mode 100644 index 000000000000..0998f8b922bd --- /dev/null +++ b/Documentation/devicetree/bindings/clock/rockchip,rv1126-cru.yaml @@ -0,0 +1,62 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/rockchip,rv1126-cru.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip RV1126 Clock and Reset Unit + +maintainers: + - Jagan Teki <jagan@edgeble.ai> + - Finley Xiao <finley.xiao@rock-chips.com> + - Heiko Stuebner <heiko@sntech.de> + +description: + The RV1126 clock controller generates the clock and also implements a + reset controller for SoC peripherals. + +properties: + compatible: + enum: + - rockchip,rv1126-cru + - rockchip,rv1126-pmucru + + reg: + maxItems: 1 + + "#clock-cells": + const: 1 + + "#reset-cells": + const: 1 + + clocks: + maxItems: 1 + + clock-names: + const: xin24m + + rockchip,grf: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to the syscon managing the "general register files" (GRF), + if missing pll rates are not changeable, due to the missing pll + lock status. + +required: + - compatible + - reg + - "#clock-cells" + - "#reset-cells" + +additionalProperties: false + +examples: + - | + cru: clock-controller@ff490000 { + compatible = "rockchip,rv1126-cru"; + reg = <0xff490000 0x1000>; + rockchip,grf = <&grf>; + #clock-cells = <1>; + #reset-cells = <1>; + }; diff --git a/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml index aa11815ad3a3..141cf173f87d 100644 --- a/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml +++ b/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml @@ -33,10 +33,13 @@ properties: enum: - samsung,exynos850-cmu-top - samsung,exynos850-cmu-apm + - samsung,exynos850-cmu-aud - samsung,exynos850-cmu-cmgp - samsung,exynos850-cmu-core - samsung,exynos850-cmu-dpu - samsung,exynos850-cmu-hsi + - samsung,exynos850-cmu-is + - samsung,exynos850-cmu-mfcmscl - samsung,exynos850-cmu-peri clocks: @@ -92,6 +95,24 @@ allOf: properties: compatible: contains: + const: samsung,exynos850-cmu-aud + + then: + properties: + clocks: + items: + - description: External reference clock (26 MHz) + - description: AUD clock (from CMU_TOP) + + clock-names: + items: + - const: oscclk + - const: dout_aud + + - if: + properties: + compatible: + contains: const: samsung,exynos850-cmu-cmgp then: @@ -176,6 +197,54 @@ allOf: properties: compatible: contains: + const: samsung,exynos850-cmu-is + + then: + properties: + clocks: + items: + - description: External reference clock (26 MHz) + - description: CMU_IS bus clock (from CMU_TOP) + - description: Image Texture Processing core clock (from CMU_TOP) + - description: Visual Recognition Accelerator clock (from CMU_TOP) + - description: Geometric Distortion Correction clock (from CMU_TOP) + + clock-names: + items: + - const: oscclk + - const: dout_is_bus + - const: dout_is_itp + - const: dout_is_vra + - const: dout_is_gdc + + - if: + properties: + compatible: + contains: + const: samsung,exynos850-cmu-mfcmscl + + then: + properties: + clocks: + items: + - description: External reference clock (26 MHz) + - description: Multi-Format Codec clock (from CMU_TOP) + - description: Memory to Memory Scaler clock (from CMU_TOP) + - description: Multi-Channel Scaler clock (from CMU_TOP) + - description: JPEG codec clock (from CMU_TOP) + + clock-names: + items: + - const: oscclk + - const: dout_mfcmscl_mfc + - const: dout_mfcmscl_m2m + - const: dout_mfcmscl_mcsc + - const: dout_mfcmscl_jpeg + + - if: + properties: + compatible: + contains: const: samsung,exynos850-cmu-peri then: diff --git a/Documentation/devicetree/bindings/clock/samsung,exynosautov9-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynosautov9-clock.yaml index eafc715d2d02..2ab4642679c0 100644 --- a/Documentation/devicetree/bindings/clock/samsung,exynosautov9-clock.yaml +++ b/Documentation/devicetree/bindings/clock/samsung,exynosautov9-clock.yaml @@ -35,6 +35,8 @@ properties: - samsung,exynosautov9-cmu-top - samsung,exynosautov9-cmu-busmc - samsung,exynosautov9-cmu-core + - samsung,exynosautov9-cmu-fsys0 + - samsung,exynosautov9-cmu-fsys1 - samsung,exynosautov9-cmu-fsys2 - samsung,exynosautov9-cmu-peric0 - samsung,exynosautov9-cmu-peric1 @@ -111,6 +113,48 @@ allOf: properties: compatible: contains: + const: samsung,exynosautov9-cmu-fsys0 + + then: + properties: + clocks: + items: + - description: External reference clock (26 MHz) + - description: CMU_FSYS0 bus clock (from CMU_TOP) + - description: CMU_FSYS0 pcie clock (from CMU_TOP) + + clock-names: + items: + - const: oscclk + - const: dout_clkcmu_fsys0_bus + - const: dout_clkcmu_fsys0_pcie + + - if: + properties: + compatible: + contains: + const: samsung,exynosautov9-cmu-fsys1 + + then: + properties: + clocks: + items: + - description: External reference clock (26 MHz) + - description: CMU_FSYS1 bus clock (from CMU_TOP) + - description: CMU_FSYS1 mmc card clock (from CMU_TOP) + - description: CMU_FSYS1 usb clock (from CMU_TOP) + + clock-names: + items: + - const: oscclk + - const: dout_clkcmu_fsys1_bus + - const: dout_clkcmu_fsys1_mmc_card + - const: dout_clkcmu_fsys1_usbdrd + + - if: + properties: + compatible: + contains: const: samsung,exynosautov9-cmu-fsys2 then: diff --git a/Documentation/devicetree/bindings/clock/samsung,s2mps11.yaml b/Documentation/devicetree/bindings/clock/samsung,s2mps11.yaml index 9248bfc16d48..d5296e6053a1 100644 --- a/Documentation/devicetree/bindings/clock/samsung,s2mps11.yaml +++ b/Documentation/devicetree/bindings/clock/samsung,s2mps11.yaml @@ -34,7 +34,6 @@ properties: const: 1 clock-output-names: - minItems: 3 maxItems: 3 description: Names for AP, CP and BT clocks. diff --git a/Documentation/devicetree/bindings/clock/sprd,sc9863a-clk.yaml b/Documentation/devicetree/bindings/clock/sprd,sc9863a-clk.yaml index 47e1ab08c95d..785a12797a42 100644 --- a/Documentation/devicetree/bindings/clock/sprd,sc9863a-clk.yaml +++ b/Documentation/devicetree/bindings/clock/sprd,sc9863a-clk.yaml @@ -5,7 +5,7 @@ $id: "http://devicetree.org/schemas/clock/sprd,sc9863a-clk.yaml#" $schema: "http://devicetree.org/meta-schemas/core.yaml#" -title: SC9863A Clock Control Unit Device Tree Bindings +title: SC9863A Clock Control Unit maintainers: - Orson Zhai <orsonzhai@gmail.com> diff --git a/Documentation/devicetree/bindings/clock/ti/gate.txt b/Documentation/devicetree/bindings/clock/ti/gate.txt index b4820b1de4f0..4982615c01b9 100644 --- a/Documentation/devicetree/bindings/clock/ti/gate.txt +++ b/Documentation/devicetree/bindings/clock/ti/gate.txt @@ -10,7 +10,7 @@ will be controlled instead and the corresponding hw-ops for that is used. [1] Documentation/devicetree/bindings/clock/clock-bindings.txt -[2] Documentation/devicetree/bindings/clock/gpio-gate-clock.txt +[2] Documentation/devicetree/bindings/clock/gpio-gate-clock.yaml [3] Documentation/devicetree/bindings/clock/ti/clockdomain.txt Required properties: diff --git a/Documentation/devicetree/bindings/clock/ti/interface.txt b/Documentation/devicetree/bindings/clock/ti/interface.txt index 94ec77dc3c59..d3eb5ca92a7f 100644 --- a/Documentation/devicetree/bindings/clock/ti/interface.txt +++ b/Documentation/devicetree/bindings/clock/ti/interface.txt @@ -9,7 +9,7 @@ companion clock finding (match corresponding functional gate clock) and hardware autoidle enable / disable. [1] Documentation/devicetree/bindings/clock/clock-bindings.txt -[2] Documentation/devicetree/bindings/clock/gpio-gate-clock.txt +[2] Documentation/devicetree/bindings/clock/gpio-gate-clock.yaml Required properties: - compatible : shall be one of: diff --git a/Documentation/devicetree/bindings/clock/toshiba,tmpv770x-pipllct.yaml b/Documentation/devicetree/bindings/clock/toshiba,tmpv770x-pipllct.yaml index 7b7300ce96d6..d36558aa39f3 100644 --- a/Documentation/devicetree/bindings/clock/toshiba,tmpv770x-pipllct.yaml +++ b/Documentation/devicetree/bindings/clock/toshiba,tmpv770x-pipllct.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/toshiba,tmpv770x-pipllct.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Toshiba Visconti5 TMPV770X PLL Controller Device Tree Bindings +title: Toshiba Visconti5 TMPV770X PLL Controller maintainers: - Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> diff --git a/Documentation/devicetree/bindings/clock/toshiba,tmpv770x-pismu.yaml b/Documentation/devicetree/bindings/clock/toshiba,tmpv770x-pismu.yaml index ed79f16fe6bc..081f85b1eb88 100644 --- a/Documentation/devicetree/bindings/clock/toshiba,tmpv770x-pismu.yaml +++ b/Documentation/devicetree/bindings/clock/toshiba,tmpv770x-pismu.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/toshiba,tmpv770x-pismu.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Toshiba Visconti5 TMPV770x SMU controller Device Tree Bindings +title: Toshiba Visconti5 TMPV770x SMU controller maintainers: - Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> diff --git a/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml b/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml new file mode 100644 index 000000000000..634b7b964606 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml @@ -0,0 +1,77 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/clock/xlnx,clocking-wizard.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Xilinx clocking wizard + +maintainers: + - Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> + +description: + The clocking wizard is a soft ip clocking block of Xilinx versal. It + reads required input clock frequencies from the devicetree and acts as clock + clock output. + +properties: + compatible: + enum: + - xlnx,clocking-wizard + - xlnx,clocking-wizard-v5.2 + - xlnx,clocking-wizard-v6.0 + + + reg: + maxItems: 1 + + "#clock-cells": + const: 1 + + clocks: + items: + - description: clock input + - description: axi clock + + clock-names: + items: + - const: clk_in1 + - const: s_axi_aclk + + + xlnx,speed-grade: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [1, 2, 3] + description: + Speed grade of the device. Higher the speed grade faster is the FPGA device. + + xlnx,nr-outputs: + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 1 + maximum: 8 + description: + Number of outputs. + +required: + - compatible + - reg + - "#clock-cells" + - clocks + - clock-names + - xlnx,speed-grade + - xlnx,nr-outputs + +additionalProperties: false + +examples: + - | + clock-controller@b0000000 { + compatible = "xlnx,clocking-wizard"; + reg = <0xb0000000 0x10000>; + #clock-cells = <1>; + xlnx,speed-grade = <1>; + xlnx,nr-outputs = <6>; + clock-names = "clk_in1", "s_axi_aclk"; + clocks = <&clkc 15>, <&clkc 15>; + }; +... diff --git a/Documentation/devicetree/bindings/counter/ti,am62-ecap-capture.yaml b/Documentation/devicetree/bindings/counter/ti,am62-ecap-capture.yaml new file mode 100644 index 000000000000..4e0b2d2b303e --- /dev/null +++ b/Documentation/devicetree/bindings/counter/ti,am62-ecap-capture.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/counter/ti,am62-ecap-capture.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments Enhanced Capture (eCAP) Module + +maintainers: + - Julien Panis <jpanis@baylibre.com> + +description: | + The eCAP module resources can be used to capture timestamps + on input signal events (falling/rising edges). + +properties: + compatible: + const: ti,am62-ecap-capture + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + const: fck + + power-domains: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/soc/ti,sci_pm_domain.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + + capture@23100000 { /* eCAP in capture mode on am62x */ + compatible = "ti,am62-ecap-capture"; + reg = <0x00 0x23100000 0x00 0x100>; + interrupts = <GIC_SPI 113 IRQ_TYPE_EDGE_RISING>; + power-domains = <&k3_pds 51 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 51 0>; + clock-names = "fck"; + }; + }; diff --git a/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml b/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml index dedc99e34ebc..0401c11da8d9 100644 --- a/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml +++ b/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/crypto/allwinner,sun4i-a10-crypto.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 Security System Device Tree Bindings +title: Allwinner A10 Security System maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/crypto/aspeed,ast2500-hace.yaml b/Documentation/devicetree/bindings/crypto/aspeed,ast2500-hace.yaml new file mode 100644 index 000000000000..a772d232de09 --- /dev/null +++ b/Documentation/devicetree/bindings/crypto/aspeed,ast2500-hace.yaml @@ -0,0 +1,53 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/crypto/aspeed,ast2500-hace.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ASPEED HACE hash and crypto Hardware Accelerator Engines + +maintainers: + - Neal Liu <neal_liu@aspeedtech.com> + +description: | + The Hash and Crypto Engine (HACE) is designed to accelerate the throughput + of hash data digest, encryption, and decryption. Basically, HACE can be + divided into two independently engines - Hash Engine and Crypto Engine. + +properties: + compatible: + enum: + - aspeed,ast2500-hace + - aspeed,ast2600-hace + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + interrupts: + maxItems: 1 + + resets: + maxItems: 1 + +required: + - compatible + - reg + - clocks + - interrupts + - resets + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/ast2600-clock.h> + hace: crypto@1e6d0000 { + compatible = "aspeed,ast2600-hace"; + reg = <0x1e6d0000 0x200>; + interrupts = <4>; + clocks = <&syscon ASPEED_CLK_GATE_YCLK>; + resets = <&syscon ASPEED_RESET_HACE>; + }; diff --git a/Documentation/devicetree/bindings/crypto/intel,keembay-ocs-aes.yaml b/Documentation/devicetree/bindings/crypto/intel,keembay-ocs-aes.yaml index ee2c099981b2..fedd8be56ad6 100644 --- a/Documentation/devicetree/bindings/crypto/intel,keembay-ocs-aes.yaml +++ b/Documentation/devicetree/bindings/crypto/intel,keembay-ocs-aes.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/crypto/intel,keembay-ocs-aes.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Intel Keem Bay OCS AES Device Tree Bindings +title: Intel Keem Bay OCS AES maintainers: - Daniele Alessandrelli <daniele.alessandrelli@intel.com> diff --git a/Documentation/devicetree/bindings/crypto/intel,keembay-ocs-ecc.yaml b/Documentation/devicetree/bindings/crypto/intel,keembay-ocs-ecc.yaml index a3c16451b1ad..2bb95247b64f 100644 --- a/Documentation/devicetree/bindings/crypto/intel,keembay-ocs-ecc.yaml +++ b/Documentation/devicetree/bindings/crypto/intel,keembay-ocs-ecc.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/crypto/intel,keembay-ocs-ecc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Intel Keem Bay OCS ECC Device Tree Bindings +title: Intel Keem Bay OCS ECC maintainers: - Daniele Alessandrelli <daniele.alessandrelli@intel.com> diff --git a/Documentation/devicetree/bindings/crypto/intel,keembay-ocs-hcu.yaml b/Documentation/devicetree/bindings/crypto/intel,keembay-ocs-hcu.yaml index acb92706d280..46e2853ab8f4 100644 --- a/Documentation/devicetree/bindings/crypto/intel,keembay-ocs-hcu.yaml +++ b/Documentation/devicetree/bindings/crypto/intel,keembay-ocs-hcu.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/crypto/intel,keembay-ocs-hcu.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Intel Keem Bay OCS HCU Device Tree Bindings +title: Intel Keem Bay OCS HCU maintainers: - Declan Murphy <declan.murphy@intel.com> diff --git a/Documentation/devicetree/bindings/crypto/samsung-slimsss.yaml b/Documentation/devicetree/bindings/crypto/samsung-slimsss.yaml index 676950bb7b37..5b31891c97fe 100644 --- a/Documentation/devicetree/bindings/crypto/samsung-slimsss.yaml +++ b/Documentation/devicetree/bindings/crypto/samsung-slimsss.yaml @@ -24,7 +24,6 @@ properties: maxItems: 1 clocks: - minItems: 2 maxItems: 2 clock-names: diff --git a/Documentation/devicetree/bindings/crypto/ti,sa2ul.yaml b/Documentation/devicetree/bindings/crypto/ti,sa2ul.yaml index 02f47c2e7998..0c15fefb6671 100644 --- a/Documentation/devicetree/bindings/crypto/ti,sa2ul.yaml +++ b/Documentation/devicetree/bindings/crypto/ti,sa2ul.yaml @@ -35,8 +35,6 @@ properties: - const: rx1 - const: rx2 - dma-coherent: true - "#address-cells": const: 2 @@ -72,16 +70,6 @@ required: - dmas - dma-names -if: - properties: - compatible: - enum: - - ti,j721e-sa2ul - - ti,am654-sa2ul -then: - required: - - dma-coherent - additionalProperties: false examples: @@ -95,5 +83,4 @@ examples: dmas = <&main_udmap 0xc000>, <&main_udmap 0x4000>, <&main_udmap 0x4001>; dma-names = "tx", "rx1", "rx2"; - dma-coherent; }; diff --git a/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-aes.yaml b/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-aes.yaml index 55dd6e3d270d..9e8fbd02b150 100644 --- a/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-aes.yaml +++ b/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-aes.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/crypto/xlnx,zynqmp-aes.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Xilinx ZynqMP AES-GCM Hardware Accelerator Device Tree Bindings +title: Xilinx ZynqMP AES-GCM Hardware Accelerator maintainers: - Kalyani Akula <kalyani.akula@xilinx.com> diff --git a/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-display-backend.yaml b/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-display-backend.yaml index 3d8ea3c2d8dd..ba06d1857b7d 100644 --- a/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-display-backend.yaml +++ b/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-display-backend.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-display-backend.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 Display Engine Backend Device Tree Bindings +title: Allwinner A10 Display Engine Backend maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-display-engine.yaml b/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-display-engine.yaml index c9c346e6228e..e6088f379f70 100644 --- a/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-display-engine.yaml +++ b/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-display-engine.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-display-engine.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 Display Engine Pipeline Device Tree Bindings +title: Allwinner A10 Display Engine Pipeline maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-display-frontend.yaml b/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-display-frontend.yaml index 055157fbf3bf..98e8240a05bd 100644 --- a/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-display-frontend.yaml +++ b/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-display-frontend.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-display-frontend.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 Display Engine Frontend Device Tree Bindings +title: Allwinner A10 Display Engine Frontend maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-hdmi.yaml b/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-hdmi.yaml index 7f11452539f4..55703caacb9c 100644 --- a/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-hdmi.yaml +++ b/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-hdmi.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-hdmi.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 HDMI Controller Device Tree Bindings +title: Allwinner A10 HDMI Controller description: | The HDMI Encoder supports the HDMI video and audio outputs, and does diff --git a/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-tcon.yaml b/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-tcon.yaml index f8168986a0a9..724d93b9193b 100644 --- a/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-tcon.yaml +++ b/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-tcon.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-tcon.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 Timings Controller (TCON) Device Tree Bindings +title: Allwinner A10 Timings Controller (TCON) maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-tv-encoder.yaml b/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-tv-encoder.yaml index afc0ed799e0e..c39e90a5945f 100644 --- a/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-tv-encoder.yaml +++ b/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-tv-encoder.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-tv-encoder.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 TV Encoder Device Tree Bindings +title: Allwinner A10 TV Encoder maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-drc.yaml b/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-drc.yaml index 71cce5687580..895506d93f4c 100644 --- a/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-drc.yaml +++ b/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-drc.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/display/allwinner,sun6i-a31-drc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A31 Dynamic Range Controller Device Tree Bindings +title: Allwinner A31 Dynamic Range Controller maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml b/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml index bf0bdf54e5f9..7910831fa4b8 100644 --- a/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml +++ b/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/display/allwinner,sun6i-a31-mipi-dsi.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A31 MIPI-DSI Controller Device Tree Bindings +title: Allwinner A31 MIPI-DSI Controller maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-de2-mixer.yaml b/Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-de2-mixer.yaml index cb243bc58ef7..b75c1ec686ad 100644 --- a/Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-de2-mixer.yaml +++ b/Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-de2-mixer.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/display/allwinner,sun8i-a83t-de2-mixer.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner Display Engine 2.0 Mixer Device Tree Bindings +title: Allwinner Display Engine 2.0 Mixer maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-dw-hdmi.yaml b/Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-dw-hdmi.yaml index 4951b5ef5c6a..60fd927b5a06 100644 --- a/Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-dw-hdmi.yaml +++ b/Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-dw-hdmi.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/display/allwinner,sun8i-a83t-dw-hdmi.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A83t DWC HDMI TX Encoder Device Tree Bindings +title: Allwinner A83t DWC HDMI TX Encoder description: | The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller diff --git a/Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-hdmi-phy.yaml b/Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-hdmi-phy.yaml index a97366aaf924..1b47f3d99a78 100644 --- a/Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-hdmi-phy.yaml +++ b/Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-hdmi-phy.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/display/allwinner,sun8i-a83t-hdmi-phy.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A83t HDMI PHY Device Tree Bindings +title: Allwinner A83t HDMI PHY maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/display/allwinner,sun8i-r40-tcon-top.yaml b/Documentation/devicetree/bindings/display/allwinner,sun8i-r40-tcon-top.yaml index 845e226d7aff..7d849c4095a3 100644 --- a/Documentation/devicetree/bindings/display/allwinner,sun8i-r40-tcon-top.yaml +++ b/Documentation/devicetree/bindings/display/allwinner,sun8i-r40-tcon-top.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/display/allwinner,sun8i-r40-tcon-top.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner R40 TCON TOP Device Tree Bindings +title: Allwinner R40 TCON TOP maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/display/allwinner,sun9i-a80-deu.yaml b/Documentation/devicetree/bindings/display/allwinner,sun9i-a80-deu.yaml index 637372ec4614..193afee2c3c1 100644 --- a/Documentation/devicetree/bindings/display/allwinner,sun9i-a80-deu.yaml +++ b/Documentation/devicetree/bindings/display/allwinner,sun9i-a80-deu.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/display/allwinner,sun9i-a80-deu.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A80 Detail Enhancement Unit Device Tree Bindings +title: Allwinner A80 Detail Enhancement Unit maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/display/amlogic,meson-dw-hdmi.yaml b/Documentation/devicetree/bindings/display/amlogic,meson-dw-hdmi.yaml index 2e208d2fc98f..7cdffdb131ac 100644 --- a/Documentation/devicetree/bindings/display/amlogic,meson-dw-hdmi.yaml +++ b/Documentation/devicetree/bindings/display/amlogic,meson-dw-hdmi.yaml @@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#" title: Amlogic specific extensions to the Synopsys Designware HDMI Controller maintainers: - - Neil Armstrong <narmstrong@baylibre.com> + - Neil Armstrong <neil.armstrong@linaro.org> allOf: - $ref: /schemas/sound/name-prefix.yaml# diff --git a/Documentation/devicetree/bindings/display/amlogic,meson-vpu.yaml b/Documentation/devicetree/bindings/display/amlogic,meson-vpu.yaml index 047fd69e0377..6655a93b1874 100644 --- a/Documentation/devicetree/bindings/display/amlogic,meson-vpu.yaml +++ b/Documentation/devicetree/bindings/display/amlogic,meson-vpu.yaml @@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#" title: Amlogic Meson Display Controller maintainers: - - Neil Armstrong <narmstrong@baylibre.com> + - Neil Armstrong <neil.armstrong@linaro.org> description: | The Amlogic Meson Display controller is composed of several components diff --git a/Documentation/devicetree/bindings/display/arm,komeda.yaml b/Documentation/devicetree/bindings/display/arm,komeda.yaml index 9f4aade97f10..3ad3eef89ca8 100644 --- a/Documentation/devicetree/bindings/display/arm,komeda.yaml +++ b/Documentation/devicetree/bindings/display/arm,komeda.yaml @@ -58,6 +58,7 @@ properties: patternProperties: '^pipeline@[01]$': type: object + additionalProperties: false description: clocks diff --git a/Documentation/devicetree/bindings/display/brcm,bcm2711-hdmi.yaml b/Documentation/devicetree/bindings/display/brcm,bcm2711-hdmi.yaml index a9d34dd7bbc5..5b35adf34c7b 100644 --- a/Documentation/devicetree/bindings/display/brcm,bcm2711-hdmi.yaml +++ b/Documentation/devicetree/bindings/display/brcm,bcm2711-hdmi.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/display/brcm,bcm2711-hdmi.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Broadcom BCM2711 HDMI Controller Device Tree Bindings +title: Broadcom BCM2711 HDMI Controller maintainers: - Eric Anholt <eric@anholt.net> diff --git a/Documentation/devicetree/bindings/display/bridge/adi,adv7511.yaml b/Documentation/devicetree/bindings/display/bridge/adi,adv7511.yaml index f08a01dfedf3..5bbe81862c8f 100644 --- a/Documentation/devicetree/bindings/display/bridge/adi,adv7511.yaml +++ b/Documentation/devicetree/bindings/display/bridge/adi,adv7511.yaml @@ -117,23 +117,21 @@ properties: ports: description: - The ADV7511(W)/13 has two video ports and one audio port. This node - models their connections as documented in - Documentation/devicetree/bindings/media/video-interfaces.txt - Documentation/devicetree/bindings/graph.txt - type: object + The ADV7511(W)/13 has two video ports and one audio port. + $ref: /schemas/graph.yaml#/properties/ports + properties: port@0: description: Video port for the RGB or YUV input. - type: object + $ref: /schemas/graph.yaml#/properties/port port@1: description: Video port for the HDMI output. - type: object + $ref: /schemas/graph.yaml#/properties/port port@2: description: Audio port for the HDMI output. - type: object + $ref: /schemas/graph.yaml#/properties/port # adi,input-colorspace and adi,input-clock are required except in # "rgb 1x" and "yuv444 1x" modes, in which case they must not be diff --git a/Documentation/devicetree/bindings/display/bridge/adi,adv7533.yaml b/Documentation/devicetree/bindings/display/bridge/adi,adv7533.yaml index f36209137c8a..987aa83c2649 100644 --- a/Documentation/devicetree/bindings/display/bridge/adi,adv7533.yaml +++ b/Documentation/devicetree/bindings/display/bridge/adi,adv7533.yaml @@ -91,25 +91,23 @@ properties: ports: description: - The ADV7533/35 has two video ports and one audio port. This node - models their connections as documented in - Documentation/devicetree/bindings/media/video-interfaces.txt - Documentation/devicetree/bindings/graph.txt - type: object + The ADV7533/35 has two video ports and one audio port. + $ref: /schemas/graph.yaml#/properties/ports + properties: port@0: description: Video port for the DSI input. The remote endpoint phandle should be a reference to a valid mipi_dsi_host_device. - type: object + $ref: /schemas/graph.yaml#/properties/port port@1: description: Video port for the HDMI output. - type: object + $ref: /schemas/graph.yaml#/properties/port port@2: description: Audio port for the HDMI output. - type: object + $ref: /schemas/graph.yaml#/properties/port required: - compatible diff --git a/Documentation/devicetree/bindings/display/bridge/analogix,anx7814.yaml b/Documentation/devicetree/bindings/display/bridge/analogix,anx7814.yaml index bce96b5b0db0..4a5e5d9d6f90 100644 --- a/Documentation/devicetree/bindings/display/bridge/analogix,anx7814.yaml +++ b/Documentation/devicetree/bindings/display/bridge/analogix,anx7814.yaml @@ -8,7 +8,7 @@ title: Analogix ANX7814 SlimPort (Full-HD Transmitter) maintainers: - Andrzej Hajda <andrzej.hajda@intel.com> - - Neil Armstrong <narmstrong@baylibre.com> + - Neil Armstrong <neil.armstrong@linaro.org> - Robert Foss <robert.foss@linaro.org> properties: diff --git a/Documentation/devicetree/bindings/display/bridge/chipone,icn6211.yaml b/Documentation/devicetree/bindings/display/bridge/chipone,icn6211.yaml index 4f0b7c71313c..5fb54375aeb6 100644 --- a/Documentation/devicetree/bindings/display/bridge/chipone,icn6211.yaml +++ b/Documentation/devicetree/bindings/display/bridge/chipone,icn6211.yaml @@ -24,6 +24,15 @@ properties: maxItems: 1 description: virtual channel number of a DSI peripheral + clock-names: + const: refclk + + clocks: + maxItems: 1 + description: | + Optional external clock connected to REF_CLK input. + The clock rate must be in 10..154 MHz range. + enable-gpios: description: Bridge EN pin, chip is reset when EN is low. diff --git a/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml b/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml index 2ebaa43eb62e..b19be0804abe 100644 --- a/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml +++ b/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml @@ -25,7 +25,6 @@ properties: const: ldb reg: - minItems: 2 maxItems: 2 reg-names: diff --git a/Documentation/devicetree/bindings/display/bridge/ite,it66121.yaml b/Documentation/devicetree/bindings/display/bridge/ite,it66121.yaml index c6e81f532215..1b2185be92cd 100644 --- a/Documentation/devicetree/bindings/display/bridge/ite,it66121.yaml +++ b/Documentation/devicetree/bindings/display/bridge/ite,it66121.yaml @@ -8,7 +8,7 @@ title: ITE it66121 HDMI bridge Device Tree Bindings maintainers: - Phong LE <ple@baylibre.com> - - Neil Armstrong <narmstrong@baylibre.com> + - Neil Armstrong <neil.armstrong@linaro.org> description: | The IT66121 is a high-performance and low-power single channel HDMI diff --git a/Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml b/Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml index 3a8614e0f627..84aafcbf0919 100644 --- a/Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml +++ b/Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml @@ -51,6 +51,7 @@ properties: properties: port@0: $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false description: | For LVDS encoders, port 0 is the parallel input For LVDS decoders, port 0 is the LVDS input diff --git a/Documentation/devicetree/bindings/display/bridge/nxp,tda998x.yaml b/Documentation/devicetree/bindings/display/bridge/nxp,tda998x.yaml new file mode 100644 index 000000000000..c4bf54397473 --- /dev/null +++ b/Documentation/devicetree/bindings/display/bridge/nxp,tda998x.yaml @@ -0,0 +1,109 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/bridge/nxp,tda998x.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP TDA998x HDMI transmitter + +maintainers: + - Russell King <linux@armlinux.org.uk> + +properties: + compatible: + const: nxp,tda998x + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + video-ports: + default: 0x230145 + maximum: 0xffffff + description: + 24 bits value which defines how the video controller output is wired to + the TDA998x input. + + audio-ports: + description: + Array of 8-bit values, 2 values per DAI (Documentation/sound/soc/dai.rst). + The implementation allows one or two DAIs. + If two DAIs are defined, they must be of different type. + $ref: /schemas/types.yaml#/definitions/uint32-matrix + items: + minItems: 1 + items: + - description: | + The first value defines the DAI type: TDA998x_SPDIF or TDA998x_I2S + (see include/dt-bindings/display/tda998x.h). + - description: + The second value defines the tda998x AP_ENA reg content when the + DAI in question is used. + + '#sound-dai-cells': + enum: [ 0, 1 ] + + nxp,calib-gpios: + maxItems: 1 + description: + Calibration GPIO, which must correspond with the gpio used for the + TDA998x interrupt pin. + + port: + $ref: /schemas/graph.yaml#/properties/port + description: Parallel input port + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + type: object + description: Parallel input port + + port@1: + type: object + description: HDMI output port + +required: + - compatible + - reg + +oneOf: + - required: + - port + - required: + - ports + +additionalProperties: false + +examples: + - | + #include <dt-bindings/display/tda998x.h> + #include <dt-bindings/interrupt-controller/irq.h> + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + tda998x: hdmi-encoder@70 { + compatible = "nxp,tda998x"; + reg = <0x70>; + interrupt-parent = <&gpio0>; + interrupts = <27 IRQ_TYPE_EDGE_FALLING>; + video-ports = <0x230145>; + + #sound-dai-cells = <1>; + /* DAI-format / AP_ENA reg value */ + audio-ports = <TDA998x_SPDIF 0x04>, + <TDA998x_I2S 0x03>; + + port { + tda998x_in: endpoint { + remote-endpoint = <&lcdc_0>; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.yaml b/Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.yaml index 0c9785c8db51..e3ec697f89e7 100644 --- a/Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.yaml +++ b/Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.yaml @@ -38,6 +38,9 @@ properties: clock-names: maxItems: 2 + resets: + maxItems: 1 + ports: $ref: /schemas/graph.yaml#/properties/ports @@ -67,6 +70,7 @@ required: - reg - clocks - clock-names + - resets - interrupts - ports @@ -85,6 +89,7 @@ examples: clocks = <&cpg CPG_CORE R8A7795_CLK_S0D4>, <&cpg CPG_MOD 729>; clock-names = "iahb", "isfr"; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + resets = <&cpg 729>; ports { #address-cells = <1>; diff --git a/Documentation/devicetree/bindings/display/bridge/synopsys,dw-hdmi.yaml b/Documentation/devicetree/bindings/display/bridge/synopsys,dw-hdmi.yaml index b00246faea57..4b7e54a8f037 100644 --- a/Documentation/devicetree/bindings/display/bridge/synopsys,dw-hdmi.yaml +++ b/Documentation/devicetree/bindings/display/bridge/synopsys,dw-hdmi.yaml @@ -26,7 +26,6 @@ properties: reg-io-width: description: Width (in bytes) of the registers specified by the reg property. - $ref: /schemas/types.yaml#/definitions/uint32 enum: [1, 4] default: 1 diff --git a/Documentation/devicetree/bindings/display/bridge/tda998x.txt b/Documentation/devicetree/bindings/display/bridge/tda998x.txt deleted file mode 100644 index f5a02f61dd36..000000000000 --- a/Documentation/devicetree/bindings/display/bridge/tda998x.txt +++ /dev/null @@ -1,54 +0,0 @@ -Device-Tree bindings for the NXP TDA998x HDMI transmitter - -Required properties; - - compatible: must be "nxp,tda998x" - - - reg: I2C address - -Required node: - - port: Input port node with endpoint definition, as described - in Documentation/devicetree/bindings/graph.txt - -Optional properties: - - interrupts: interrupt number and trigger type - default: polling - - - pinctrl-0: pin control group to be used for - screen plug/unplug interrupt. - - - pinctrl-names: must contain a "default" entry. - - - video-ports: 24 bits value which defines how the video controller - output is wired to the TDA998x input - default: <0x230145> - - - audio-ports: array of 8-bit values, 2 values per one DAI[1]. - The first value defines the DAI type: TDA998x_SPDIF or TDA998x_I2S[2]. - The second value defines the tda998x AP_ENA reg content when the DAI - in question is used. The implementation allows one or two DAIs. If two - DAIs are defined, they must be of different type. - - - nxp,calib-gpios: calibration GPIO, which must correspond with the - gpio used for the TDA998x interrupt pin. - -[1] Documentation/sound/soc/dai.rst -[2] include/dt-bindings/display/tda998x.h - -Example: - -#include <dt-bindings/display/tda998x.h> - - tda998x: hdmi-encoder { - compatible = "nxp,tda998x"; - reg = <0x70>; - interrupt-parent = <&gpio0>; - interrupts = <27 2>; /* falling edge */ - pinctrl-0 = <&pmx_camera>; - pinctrl-names = "default"; - video-ports = <0x230145>; - - #sound-dai-cells = <2>; - /* DAI-format AP_ENA reg value */ - audio-ports = < TDA998x_SPDIF 0x04 - TDA998x_I2S 0x03>; - - }; diff --git a/Documentation/devicetree/bindings/display/ilitek,ili9486.yaml b/Documentation/devicetree/bindings/display/ilitek,ili9486.yaml index aecff34f505d..1f8f2182e2f1 100644 --- a/Documentation/devicetree/bindings/display/ilitek,ili9486.yaml +++ b/Documentation/devicetree/bindings/display/ilitek,ili9486.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/display/ilitek,ili9486.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Ilitek ILI9486 display panels device tree bindings +title: Ilitek ILI9486 display panels maintainers: - Kamlesh Gurudasani <kamlesh.gurudasani@gmail.com> diff --git a/Documentation/devicetree/bindings/display/ingenic,lcd.yaml b/Documentation/devicetree/bindings/display/ingenic,lcd.yaml index 0049010b37ca..c0bb02fb49f4 100644 --- a/Documentation/devicetree/bindings/display/ingenic,lcd.yaml +++ b/Documentation/devicetree/bindings/display/ingenic,lcd.yaml @@ -17,6 +17,8 @@ properties: enum: - ingenic,jz4740-lcd - ingenic,jz4725b-lcd + - ingenic,jz4760-lcd + - ingenic,jz4760b-lcd - ingenic,jz4770-lcd - ingenic,jz4780-lcd diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml new file mode 100644 index 000000000000..ff781f2174a0 --- /dev/null +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml @@ -0,0 +1,116 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/mediatek/mediatek,dp.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek Display Port Controller + +maintainers: + - Chun-Kuang Hu <chunkuang.hu@kernel.org> + - Jitao shi <jitao.shi@mediatek.com> + +description: | + MediaTek DP and eDP are different hardwares and there are some features + which are not supported for eDP. For example, audio is not supported for + eDP. Therefore, we need to use two different compatibles to describe them. + In addition, We just need to enable the power domain of DP, so the clock + of DP is generated by itself and we are not using other PLL to generate + clocks. + +properties: + compatible: + enum: + - mediatek,mt8195-dp-tx + - mediatek,mt8195-edp-tx + + reg: + maxItems: 1 + + nvmem-cells: + maxItems: 1 + description: efuse data for display port calibration + + nvmem-cell-names: + const: dp_calibration_data + + power-domains: + maxItems: 1 + + interrupts: + maxItems: 1 + + ports: + $ref: /schemas/graph.yaml#/properties/ports + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: Input endpoint of the controller, usually dp_intf + + port@1: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: Output endpoint of the controller + properties: + endpoint: + $ref: /schemas/media/video-interfaces.yaml# + unevaluatedProperties: false + properties: + data-lanes: + description: | + number of lanes supported by the hardware. + The possible values: + 0 - For 1 lane enabled in IP. + 0 1 - For 2 lanes enabled in IP. + 0 1 2 3 - For 4 lanes enabled in IP. + minItems: 1 + maxItems: 4 + required: + - data-lanes + + required: + - port@0 + - port@1 + + max-linkrate-mhz: + enum: [ 1620, 2700, 5400, 8100 ] + description: maximum link rate supported by the hardware. + +required: + - compatible + - reg + - interrupts + - ports + - max-linkrate-mhz + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/power/mt8195-power.h> + dptx@1c600000 { + compatible = "mediatek,mt8195-dp-tx"; + reg = <0x1c600000 0x8000>; + power-domains = <&spm MT8195_POWER_DOMAIN_DP_TX>; + interrupts = <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH 0>; + max-linkrate-mhz = <8100>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dptx_in: endpoint { + remote-endpoint = <&dp_intf0_out>; + }; + }; + port@1 { + reg = <1>; + dptx_out: endpoint { + data-lanes = <0 1 2 3>; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml index 94bc6e1b6451..f2515af8256f 100644 --- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml +++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml @@ -24,6 +24,7 @@ properties: - qcom,sm8350-dp reg: + minItems: 4 items: - description: ahb register block - description: aux register block @@ -70,14 +71,28 @@ properties: operating-points-v2: maxItems: 1 + opp-table: true + power-domains: maxItems: 1 + aux-bus: + $ref: /schemas/display/dp-aux-bus.yaml# + + data-lanes: + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 1 + maxItems: 4 + items: + maximum: 3 + "#sound-dai-cells": const: 0 - vdda-0p9-supply: true - vdda-1p2-supply: true + vdda-0p9-supply: + deprecated: true + vdda-1p2-supply: + deprecated: true ports: $ref: /schemas/graph.yaml#/properties/ports @@ -98,10 +113,33 @@ required: - clock-names - phys - phy-names - - "#sound-dai-cells" - power-domains - ports +allOf: + # AUX BUS does not exist on DP controllers + # Audio output also is present only on DP output + # p1 regions is present on DP, but not on eDP + - if: + properties: + compatible: + contains: + enum: + - qcom,sc7280-edp + - qcom,sc8180x-edp + then: + properties: + "#sound-dai-cells": false + reg: + maxItems: 4 + else: + properties: + aux-bus: false + reg: + minItems: 5 + required: + - "#sound-dai-cells" + additionalProperties: false examples: @@ -140,9 +178,6 @@ examples: power-domains = <&rpmhpd SC7180_CX>; - vdda-0p9-supply = <&vdda_usb_ss_dp_core>; - vdda-1p2-supply = <&vdda_usb_ss_dp_1p2>; - ports { #address-cells = <1>; #size-cells = <0>; diff --git a/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml b/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml index 2df64afb76e6..253665c693e6 100644 --- a/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml +++ b/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml @@ -62,6 +62,7 @@ patternProperties: "^display-controller@[0-9a-f]+$": type: object description: Node containing the properties of DPU. + additionalProperties: false properties: compatible: @@ -105,6 +106,9 @@ patternProperties: maxItems: 1 operating-points-v2: true + opp-table: + type: object + ports: $ref: /schemas/graph.yaml#/properties/ports description: | diff --git a/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml b/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml index 734d14de966d..c5824e1d2382 100644 --- a/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml +++ b/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml @@ -74,6 +74,7 @@ patternProperties: "^display-controller@[0-9a-f]+$": type: object description: Node containing the properties of DPU. + additionalProperties: false properties: compatible: @@ -113,6 +114,8 @@ patternProperties: maxItems: 1 operating-points-v2: true + opp-table: + type: object ports: $ref: /schemas/graph.yaml#/properties/ports diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml index d3c3e4b07897..4890bc25f3fd 100644 --- a/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml +++ b/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml @@ -73,6 +73,7 @@ patternProperties: "^display-controller@[0-9a-f]+$": type: object description: Node containing the properties of DPU. + additionalProperties: false properties: compatible: @@ -114,6 +115,8 @@ patternProperties: maxItems: 1 operating-points-v2: true + opp-table: + type: object ports: $ref: /schemas/graph.yaml#/properties/ports diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml index f427eec3d3a4..584d646021d5 100644 --- a/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml +++ b/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml @@ -72,6 +72,7 @@ patternProperties: "^display-controller@[0-9a-f]+$": type: object description: Node containing the properties of DPU. + additionalProperties: false properties: compatible: @@ -112,6 +113,8 @@ patternProperties: maxItems: 1 operating-points-v2: true + opp-table: + type: object ports: $ref: /schemas/graph.yaml#/properties/ports diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml index 2bb8896beffc..7d1037373175 100644 --- a/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml +++ b/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml @@ -65,6 +65,7 @@ patternProperties: "^display-controller@[0-9a-f]+$": type: object description: Node containing the properties of DPU. + additionalProperties: false properties: compatible: @@ -102,6 +103,9 @@ patternProperties: maxItems: 1 operating-points-v2: true + opp-table: + type: object + ports: $ref: /schemas/graph.yaml#/properties/ports description: | diff --git a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml index 880bfe930830..3b609c19e0bc 100644 --- a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml +++ b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml @@ -66,13 +66,11 @@ properties: 2 DSI links. assigned-clocks: - minItems: 2 maxItems: 2 description: | Parents of "byte" and "pixel" for the given platform. assigned-clock-parents: - minItems: 2 maxItems: 2 description: | The Byte clock and Pixel clock PLL outputs provided by a DSI PHY block. diff --git a/Documentation/devicetree/bindings/display/msm/dsi-phy-10nm.yaml b/Documentation/devicetree/bindings/display/msm/dsi-phy-10nm.yaml index 716f921e3532..d9ad8b659f58 100644 --- a/Documentation/devicetree/bindings/display/msm/dsi-phy-10nm.yaml +++ b/Documentation/devicetree/bindings/display/msm/dsi-phy-10nm.yaml @@ -37,7 +37,6 @@ properties: qcom,phy-rescode-offset-top: $ref: /schemas/types.yaml#/definitions/int8-array - minItems: 5 maxItems: 5 description: Integer array of offset for pull-up legs rescode for all five lanes. @@ -49,7 +48,6 @@ properties: qcom,phy-rescode-offset-bot: $ref: /schemas/types.yaml#/definitions/int8-array - minItems: 5 maxItems: 5 description: Integer array of offset for pull-down legs rescode for all five lanes. diff --git a/Documentation/devicetree/bindings/display/msm/gmu.yaml b/Documentation/devicetree/bindings/display/msm/gmu.yaml index fe55611d2603..67fdeeabae0c 100644 --- a/Documentation/devicetree/bindings/display/msm/gmu.yaml +++ b/Documentation/devicetree/bindings/display/msm/gmu.yaml @@ -20,35 +20,24 @@ description: | properties: compatible: items: - - enum: - - qcom,adreno-gmu-630.2 + - pattern: '^qcom,adreno-gmu-6[0-9][0-9]\.[0-9]$' - const: qcom,adreno-gmu reg: - items: - - description: Core GMU registers - - description: GMU PDC registers - - description: GMU PDC sequence registers + minItems: 3 + maxItems: 4 reg-names: - items: - - const: gmu - - const: gmu_pdc - - const: gmu_pdc_seq + minItems: 3 + maxItems: 4 clocks: - items: - - description: GMU clock - - description: GPU CX clock - - description: GPU AXI clock - - description: GPU MEMNOC clock + minItems: 4 + maxItems: 7 clock-names: - items: - - const: gmu - - const: cxo - - const: axi - - const: memnoc + minItems: 4 + maxItems: 7 interrupts: items: @@ -76,6 +65,9 @@ properties: operating-points-v2: true + opp-table: + type: object + required: - compatible - reg @@ -91,6 +83,140 @@ required: additionalProperties: false +allOf: + - if: + properties: + compatible: + contains: + enum: + - qcom,adreno-gmu-618.0 + - qcom,adreno-gmu-630.2 + then: + properties: + reg: + items: + - description: Core GMU registers + - description: GMU PDC registers + - description: GMU PDC sequence registers + reg-names: + items: + - const: gmu + - const: gmu_pdc + - const: gmu_pdc_seq + clocks: + items: + - description: GMU clock + - description: GPU CX clock + - description: GPU AXI clock + - description: GPU MEMNOC clock + clock-names: + items: + - const: gmu + - const: cxo + - const: axi + - const: memnoc + + - if: + properties: + compatible: + contains: + enum: + - qcom,adreno-gmu-635.0 + then: + properties: + reg: + items: + - description: Core GMU registers + - description: Resource controller registers + - description: GMU PDC registers + reg-names: + items: + - const: gmu + - const: rscc + - const: gmu_pdc + clocks: + items: + - description: GMU clock + - description: GPU CX clock + - description: GPU AXI clock + - description: GPU MEMNOC clock + - description: GPU AHB clock + - description: GPU HUB CX clock + - description: GPU SMMU vote clock + clock-names: + items: + - const: gmu + - const: cxo + - const: axi + - const: memnoc + - const: ahb + - const: hub + - const: smmu_vote + + - if: + properties: + compatible: + contains: + enum: + - qcom,adreno-gmu-640.1 + then: + properties: + reg: + items: + - description: Core GMU registers + - description: GMU PDC registers + - description: GMU PDC sequence registers + reg-names: + items: + - const: gmu + - const: gmu_pdc + - const: gmu_pdc_seq + + - if: + properties: + compatible: + contains: + enum: + - qcom,adreno-gmu-650.2 + then: + properties: + reg: + items: + - description: Core GMU registers + - description: Resource controller registers + - description: GMU PDC registers + - description: GMU PDC sequence registers + reg-names: + items: + - const: gmu + - const: rscc + - const: gmu_pdc + - const: gmu_pdc_seq + + - if: + properties: + compatible: + contains: + enum: + - qcom,adreno-gmu-640.1 + - qcom,adreno-gmu-650.2 + then: + properties: + clocks: + items: + - description: GPU AHB clock + - description: GMU clock + - description: GPU CX clock + - description: GPU AXI clock + - description: GPU MEMNOC clock + clock-names: + items: + - const: ahb + - const: gmu + - const: cxo + - const: axi + - const: memnoc + examples: - | #include <dt-bindings/clock/qcom,gpucc-sdm845.h> diff --git a/Documentation/devicetree/bindings/display/msm/gpu.yaml b/Documentation/devicetree/bindings/display/msm/gpu.yaml index 3397bc31d087..ec4b1a75f46a 100644 --- a/Documentation/devicetree/bindings/display/msm/gpu.yaml +++ b/Documentation/devicetree/bindings/display/msm/gpu.yaml @@ -58,7 +58,8 @@ properties: - const: ocmem iommus: - maxItems: 1 + minItems: 1 + maxItems: 64 sram: $ref: /schemas/types.yaml#/definitions/phandle-array @@ -81,6 +82,7 @@ properties: zap-shader: type: object + additionalProperties: false description: | For a5xx and a6xx devices this node contains a memory-region that points to reserved memory to store the zap shader that can be used to diff --git a/Documentation/devicetree/bindings/display/msm/mdp4.yaml b/Documentation/devicetree/bindings/display/msm/mdp4.yaml index f63f60fea27c..58c13f5277b6 100644 --- a/Documentation/devicetree/bindings/display/msm/mdp4.yaml +++ b/Documentation/devicetree/bindings/display/msm/mdp4.yaml @@ -36,7 +36,7 @@ properties: maxItems: 1 iommus: - maxItems: 1 + maxItems: 4 ports: $ref: /schemas/graph.yaml#/properties/ports diff --git a/Documentation/devicetree/bindings/display/panel/arm,versatile-tft-panel.yaml b/Documentation/devicetree/bindings/display/panel/arm,versatile-tft-panel.yaml index be69e0cc50fc..c9958f824d9a 100644 --- a/Documentation/devicetree/bindings/display/panel/arm,versatile-tft-panel.yaml +++ b/Documentation/devicetree/bindings/display/panel/arm,versatile-tft-panel.yaml @@ -37,9 +37,6 @@ examples: compatible = "arm,versatile-sysreg", "syscon", "simple-mfd"; reg = <0x00000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - panel { compatible = "arm,versatile-tft-panel"; diff --git a/Documentation/devicetree/bindings/display/panel/kingdisplay,kd035g6-54nt.yaml b/Documentation/devicetree/bindings/display/panel/kingdisplay,kd035g6-54nt.yaml index 2a2756d19681..b4be9bd8ddde 100644 --- a/Documentation/devicetree/bindings/display/panel/kingdisplay,kd035g6-54nt.yaml +++ b/Documentation/devicetree/bindings/display/panel/kingdisplay,kd035g6-54nt.yaml @@ -23,6 +23,8 @@ properties: reg: true reset-gpios: true + spi-3wire: true + required: - compatible - power-supply diff --git a/Documentation/devicetree/bindings/display/panel/leadtek,ltk035c5444t.yaml b/Documentation/devicetree/bindings/display/panel/leadtek,ltk035c5444t.yaml index 817a9bed7d5a..ebdca5f5a001 100644 --- a/Documentation/devicetree/bindings/display/panel/leadtek,ltk035c5444t.yaml +++ b/Documentation/devicetree/bindings/display/panel/leadtek,ltk035c5444t.yaml @@ -24,6 +24,8 @@ properties: reg: true reset-gpios: true + spi-3wire: true + required: - compatible - power-supply diff --git a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml index bc8e9c0c1dc3..18241f4051d2 100644 --- a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml +++ b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml @@ -234,6 +234,8 @@ properties: - mitsubishi,aa070mc01-ca1 # Multi-Inno Technology Co.,Ltd MI0700S4T-6 7" 800x480 TFT Resistive Touch Module - multi-inno,mi0700s4t-6 + # Multi-Inno Technology Co.,Ltd MI0800FT-9 8" 800x600 TFT Resistive Touch Module + - multi-inno,mi0800ft-9 # Multi-Inno Technology Co.,Ltd MI1010AIT-1CP 10.1" 1280x800 LVDS IPS Cap Touch Mod. - multi-inno,mi1010ait-1cp # NEC LCD Technologies, Ltd. 12.1" WXGA (1280x800) LVDS TFT LCD panel @@ -280,6 +282,8 @@ properties: - samsung,atna33xc20 # Samsung 12.2" (2560x1600 pixels) TFT LCD panel - samsung,lsn122dl01-c01 + # Samsung Electronics 10.1" WXGA (1280x800) TFT LCD panel + - samsung,ltl101al01 # Samsung Electronics 10.1" WSVGA TFT LCD panel - samsung,ltn101nt05 # Samsung Electronics 14" WXGA (1366x768) TFT LCD panel diff --git a/Documentation/devicetree/bindings/display/panel/samsung,s6e63m0.yaml b/Documentation/devicetree/bindings/display/panel/samsung,s6e63m0.yaml index 940f7f88526f..6f1fc7469f07 100644 --- a/Documentation/devicetree/bindings/display/panel/samsung,s6e63m0.yaml +++ b/Documentation/devicetree/bindings/display/panel/samsung,s6e63m0.yaml @@ -24,6 +24,10 @@ properties: default-brightness: true max-brightness: true + spi-3wire: true + spi-cpha: true + spi-cpol: true + vdd3-supply: description: VDD regulator diff --git a/Documentation/devicetree/bindings/display/panel/sgd,gktw70sdae4se.yaml b/Documentation/devicetree/bindings/display/panel/sgd,gktw70sdae4se.yaml index 44e02decdf3a..2e75e3738ff0 100644 --- a/Documentation/devicetree/bindings/display/panel/sgd,gktw70sdae4se.yaml +++ b/Documentation/devicetree/bindings/display/panel/sgd,gktw70sdae4se.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Solomon Goldentek Display GKTW70SDAE4SE 7" WVGA LVDS Display Panel maintainers: - - Neil Armstrong <narmstrong@baylibre.com> + - Neil Armstrong <neil.armstrong@linaro.org> - Thierry Reding <thierry.reding@gmail.com> allOf: diff --git a/Documentation/devicetree/bindings/display/panel/sitronix,st7701.yaml b/Documentation/devicetree/bindings/display/panel/sitronix,st7701.yaml index 6dff59fe4be1..34d5e20c6cb3 100644 --- a/Documentation/devicetree/bindings/display/panel/sitronix,st7701.yaml +++ b/Documentation/devicetree/bindings/display/panel/sitronix,st7701.yaml @@ -17,6 +17,9 @@ description: | Techstar TS8550B is 480x854, 2-lane MIPI DSI LCD panel which has inbuilt ST7701 chip. + Densitron DMT028VGHMCMI-1A is 480x640, 2-lane MIPI DSI LCD panel + which has built-in ST7701 chip. + allOf: - $ref: panel-common.yaml# @@ -24,6 +27,7 @@ properties: compatible: items: - enum: + - densitron,dmt028vghmcmi-1a - techstar,ts8550b - const: sitronix,st7701 diff --git a/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt index 39792f051d2d..9a223df8530c 100644 --- a/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt +++ b/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt @@ -8,6 +8,7 @@ Required properties: "rockchip,px30-mipi-dsi", "snps,dw-mipi-dsi" "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi" "rockchip,rk3399-mipi-dsi", "snps,dw-mipi-dsi" + "rockchip,rk3568-mipi-dsi", "snps,dw-mipi-dsi" - reg: Represent the physical address range of the controller. - interrupts: Represent the controller's interrupt to the CPU(s). - clocks, clock-names: Phandles to the controller's pll reference diff --git a/Documentation/devicetree/bindings/display/samsung/samsung,exynos5433-decon.yaml b/Documentation/devicetree/bindings/display/samsung/samsung,exynos5433-decon.yaml index 921bfe925cd6..6380eeebb073 100644 --- a/Documentation/devicetree/bindings/display/samsung/samsung,exynos5433-decon.yaml +++ b/Documentation/devicetree/bindings/display/samsung/samsung,exynos5433-decon.yaml @@ -24,7 +24,6 @@ properties: - samsung,exynos5433-decon-tv clocks: - minItems: 11 maxItems: 11 clock-names: @@ -59,7 +58,6 @@ properties: - const: te iommus: - minItems: 2 maxItems: 2 iommu-names: diff --git a/Documentation/devicetree/bindings/display/samsung/samsung,exynos5433-mic.yaml b/Documentation/devicetree/bindings/display/samsung/samsung,exynos5433-mic.yaml index 7d405f2febcd..26e5017737a3 100644 --- a/Documentation/devicetree/bindings/display/samsung/samsung,exynos5433-mic.yaml +++ b/Documentation/devicetree/bindings/display/samsung/samsung,exynos5433-mic.yaml @@ -24,7 +24,6 @@ properties: const: samsung,exynos5433-mic clocks: - minItems: 2 maxItems: 2 clock-names: diff --git a/Documentation/devicetree/bindings/display/samsung/samsung,exynos7-decon.yaml b/Documentation/devicetree/bindings/display/samsung/samsung,exynos7-decon.yaml index 969bd8c563a5..992c23ca7a4e 100644 --- a/Documentation/devicetree/bindings/display/samsung/samsung,exynos7-decon.yaml +++ b/Documentation/devicetree/bindings/display/samsung/samsung,exynos7-decon.yaml @@ -22,7 +22,6 @@ properties: const: samsung,exynos7-decon clocks: - minItems: 4 maxItems: 4 clock-names: @@ -37,6 +36,7 @@ properties: i80-if-timings: type: object + additionalProperties: false description: timing configuration for lcd i80 interface support properties: cs-setup: diff --git a/Documentation/devicetree/bindings/display/samsung/samsung,fimd.yaml b/Documentation/devicetree/bindings/display/samsung/samsung,fimd.yaml index 5d5cc220f78a..075231716b2f 100644 --- a/Documentation/devicetree/bindings/display/samsung/samsung,fimd.yaml +++ b/Documentation/devicetree/bindings/display/samsung/samsung,fimd.yaml @@ -27,7 +27,6 @@ properties: const: 1 clocks: - minItems: 2 maxItems: 2 clock-names: @@ -40,6 +39,7 @@ properties: i80-if-timings: type: object + additionalProperties: false description: | Timing configuration for lcd i80 interface support. The parameters are defined as:: diff --git a/Documentation/devicetree/bindings/display/simple-framebuffer.yaml b/Documentation/devicetree/bindings/display/simple-framebuffer.yaml index 1f905d85dd9c..dd64f70b5014 100644 --- a/Documentation/devicetree/bindings/display/simple-framebuffer.yaml +++ b/Documentation/devicetree/bindings/display/simple-framebuffer.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/display/simple-framebuffer.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Simple Framebuffer Device Tree Bindings +title: Simple Framebuffer maintainers: - Hans de Goede <hdegoede@redhat.com> diff --git a/Documentation/devicetree/bindings/display/sitronix,st7735r.yaml b/Documentation/devicetree/bindings/display/sitronix,st7735r.yaml index 53f181ef3670..621f27148419 100644 --- a/Documentation/devicetree/bindings/display/sitronix,st7735r.yaml +++ b/Documentation/devicetree/bindings/display/sitronix,st7735r.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/display/sitronix,st7735r.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Sitronix ST7735R Display Panels Device Tree Bindings +title: Sitronix ST7735R Display Panels maintainers: - David Lechner <david@lechnology.com> diff --git a/Documentation/devicetree/bindings/display/st,stm32-dsi.yaml b/Documentation/devicetree/bindings/display/st,stm32-dsi.yaml index 54f67cb51040..c488308d7be1 100644 --- a/Documentation/devicetree/bindings/display/st,stm32-dsi.yaml +++ b/Documentation/devicetree/bindings/display/st,stm32-dsi.yaml @@ -58,9 +58,20 @@ properties: DSI input port node, connected to the ltdc rgb output port. port@1: - $ref: /schemas/graph.yaml#/properties/port - description: - DSI output port node, connected to a panel or a bridge input port" + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: | + DSI output port node, connected to a panel or a bridge input port. + properties: + endpoint: + $ref: /schemas/media/video-interfaces.yaml# + unevaluatedProperties: false + properties: + data-lanes: + minItems: 1 + items: + - const: 1 + - const: 2 required: - "#address-cells" diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-gr3d.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-gr3d.yaml index dbdf0229d9f6..4755a73473c7 100644 --- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-gr3d.yaml +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-gr3d.yaml @@ -59,7 +59,6 @@ properties: maxItems: 2 power-domain-names: - minItems: 2 maxItems: 2 allOf: diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-mpe.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-mpe.yaml index 4154ae01ad13..5f4f0fb4b692 100644 --- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-mpe.yaml +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-mpe.yaml @@ -42,11 +42,9 @@ properties: maxItems: 1 interconnects: - minItems: 6 maxItems: 6 interconnect-names: - minItems: 6 maxItems: 6 operating-points-v2: diff --git a/Documentation/devicetree/bindings/dma/allwinner,sun4i-a10-dma.yaml b/Documentation/devicetree/bindings/dma/allwinner,sun4i-a10-dma.yaml index 83808199657b..26d0d8ab7984 100644 --- a/Documentation/devicetree/bindings/dma/allwinner,sun4i-a10-dma.yaml +++ b/Documentation/devicetree/bindings/dma/allwinner,sun4i-a10-dma.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/dma/allwinner,sun4i-a10-dma.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 DMA Controller Device Tree Bindings +title: Allwinner A10 DMA Controller maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/dma/allwinner,sun50i-a64-dma.yaml b/Documentation/devicetree/bindings/dma/allwinner,sun50i-a64-dma.yaml index e712444abff1..bd599bda2653 100644 --- a/Documentation/devicetree/bindings/dma/allwinner,sun50i-a64-dma.yaml +++ b/Documentation/devicetree/bindings/dma/allwinner,sun50i-a64-dma.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/dma/allwinner,sun50i-a64-dma.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A64 DMA Controller Device Tree Bindings +title: Allwinner A64 DMA Controller maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/dma/allwinner,sun6i-a31-dma.yaml b/Documentation/devicetree/bindings/dma/allwinner,sun6i-a31-dma.yaml index a6df6f8b54db..344dc7e04931 100644 --- a/Documentation/devicetree/bindings/dma/allwinner,sun6i-a31-dma.yaml +++ b/Documentation/devicetree/bindings/dma/allwinner,sun6i-a31-dma.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/dma/allwinner,sun6i-a31-dma.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A31 DMA Controller Device Tree Bindings +title: Allwinner A31 DMA Controller maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/dma/apple,admac.yaml b/Documentation/devicetree/bindings/dma/apple,admac.yaml index bdc8c129c4f5..3b1e667f7ea0 100644 --- a/Documentation/devicetree/bindings/dma/apple,admac.yaml +++ b/Documentation/devicetree/bindings/dma/apple,admac.yaml @@ -49,6 +49,13 @@ properties: in an interrupts-extended list the disconnected positions will contain an empty phandle reference <0>. + iommus: + minItems: 1 + maxItems: 2 + + power-domains: + maxItems: 1 + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/dma/arm,pl330.yaml b/Documentation/devicetree/bindings/dma/arm,pl330.yaml index 2bec69b308f8..4a3dd6f5309b 100644 --- a/Documentation/devicetree/bindings/dma/arm,pl330.yaml +++ b/Documentation/devicetree/bindings/dma/arm,pl330.yaml @@ -55,6 +55,12 @@ properties: dma-coherent: true + iommus: + minItems: 1 + maxItems: 9 + description: Up to 1 IOMMU entry per DMA channel for writes and 1 + IOMMU entry for reads. + power-domains: maxItems: 1 diff --git a/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml b/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml index 19ea8dcbcbce..9ab4d81ead35 100644 --- a/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml +++ b/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml @@ -22,6 +22,7 @@ properties: - items: - enum: - mediatek,mt2712-uart-dma + - mediatek,mt6795-uart-dma - mediatek,mt8365-uart-dma - mediatek,mt8516-uart-dma - const: mediatek,mt6577-uart-dma diff --git a/Documentation/devicetree/bindings/dma/moxa,moxart-dma.txt b/Documentation/devicetree/bindings/dma/moxa,moxart-dma.txt index 8a9f3559335b..7e14e26676ec 100644 --- a/Documentation/devicetree/bindings/dma/moxa,moxart-dma.txt +++ b/Documentation/devicetree/bindings/dma/moxa,moxart-dma.txt @@ -34,8 +34,8 @@ Example: Use specific request line passing from dma For example, MMC request line is 5 - sdhci: sdhci@98e00000 { - compatible = "moxa,moxart-sdhci"; + mmc: mmc@98e00000 { + compatible = "moxa,moxart-mmc"; reg = <0x98e00000 0x5C>; interrupts = <5 0>; clocks = <&clk_apb>; diff --git a/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml b/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml index 7e575296df0c..c8894476b6ab 100644 --- a/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml +++ b/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/dma/nvidia,tegra186-gpc-dma.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: NVIDIA Tegra GPC DMA Controller Device Tree Bindings +title: NVIDIA Tegra GPC DMA Controller description: | The Tegra General Purpose Central (GPC) DMA controller is used for faster diff --git a/Documentation/devicetree/bindings/dma/qcom,adm.yaml b/Documentation/devicetree/bindings/dma/qcom,adm.yaml new file mode 100644 index 000000000000..6a9d7bc74aff --- /dev/null +++ b/Documentation/devicetree/bindings/dma/qcom,adm.yaml @@ -0,0 +1,99 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/qcom,adm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm ADM DMA Controller + +maintainers: + - Christian Marangi <ansuelsmth@gmail.com> + - Bjorn Andersson <bjorn.andersson@linaro.org> + +description: | + QCOM ADM DMA controller provides DMA capabilities for + peripheral buses such as NAND and SPI. + +properties: + compatible: + const: qcom,adm + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + "#dma-cells": + const: 1 + + clocks: + items: + - description: phandle to the core clock + - description: phandle to the iface clock + + clock-names: + items: + - const: core + - const: iface + + resets: + items: + - description: phandle to the clk reset + - description: phandle to the pbus reset + - description: phandle to the c0 reset + - description: phandle to the c1 reset + - description: phandle to the c2 reset + + reset-names: + items: + - const: clk + - const: pbus + - const: c0 + - const: c1 + - const: c2 + + qcom,ee: + $ref: /schemas/types.yaml#/definitions/uint32 + description: indicates the security domain identifier used in the secure world. + minimum: 0 + maximum: 255 + +required: + - compatible + - reg + - interrupts + - "#dma-cells" + - clocks + - clock-names + - resets + - reset-names + - qcom,ee + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,gcc-ipq806x.h> + #include <dt-bindings/reset/qcom,gcc-ipq806x.h> + + adm_dma: dma-controller@18300000 { + compatible = "qcom,adm"; + reg = <0x18300000 0x100000>; + interrupts = <0 170 0>; + #dma-cells = <1>; + + clocks = <&gcc ADM0_CLK>, + <&gcc ADM0_PBUS_CLK>; + clock-names = "core", "iface"; + + resets = <&gcc ADM0_RESET>, + <&gcc ADM0_PBUS_RESET>, + <&gcc ADM0_C0_RESET>, + <&gcc ADM0_C1_RESET>, + <&gcc ADM0_C2_RESET>; + reset-names = "clk", "pbus", "c0", "c1", "c2"; + qcom,ee = <0>; + }; + +... diff --git a/Documentation/devicetree/bindings/dma/qcom,bam-dma.yaml b/Documentation/devicetree/bindings/dma/qcom,bam-dma.yaml index 9bf3a1b164f1..003098caf709 100644 --- a/Documentation/devicetree/bindings/dma/qcom,bam-dma.yaml +++ b/Documentation/devicetree/bindings/dma/qcom,bam-dma.yaml @@ -8,7 +8,7 @@ title: Qualcomm Technologies Inc BAM DMA controller maintainers: - Andy Gross <agross@kernel.org> - - Bjorn Andersson <bjorn.andersson@linaro.org> + - Bjorn Andersson <andersson@kernel.org> allOf: - $ref: "dma-controller.yaml#" @@ -20,7 +20,7 @@ properties: - qcom,bam-v1.3.0 # MSM8974, APQ8074 and APQ8084 - qcom,bam-v1.4.0 - # MSM8916 + # MSM8916 and SDM845 - qcom,bam-v1.7.0 clocks: @@ -90,8 +90,8 @@ examples: dma-controller@f9944000 { compatible = "qcom,bam-v1.4.0"; - reg = <0xf9944000 0x15000>; - interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; + reg = <0xf9944000 0x19000>; + interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>; clocks = <&gcc GCC_BLSP2_AHB_CLK>; clock-names = "bam_clk"; #dma-cells = <1>; diff --git a/Documentation/devicetree/bindings/dma/qcom,gpi.yaml b/Documentation/devicetree/bindings/dma/qcom,gpi.yaml index 7d2fc4eb5530..eabf8a76d3a0 100644 --- a/Documentation/devicetree/bindings/dma/qcom,gpi.yaml +++ b/Documentation/devicetree/bindings/dma/qcom,gpi.yaml @@ -21,6 +21,7 @@ properties: enum: - qcom,sc7280-gpi-dma - qcom,sdm845-gpi-dma + - qcom,sm6350-gpi-dma - qcom,sm8150-gpi-dma - qcom,sm8250-gpi-dma - qcom,sm8350-gpi-dma diff --git a/Documentation/devicetree/bindings/dma/qcom_adm.txt b/Documentation/devicetree/bindings/dma/qcom_adm.txt deleted file mode 100644 index 9d3b2f917b7b..000000000000 --- a/Documentation/devicetree/bindings/dma/qcom_adm.txt +++ /dev/null @@ -1,61 +0,0 @@ -QCOM ADM DMA Controller - -Required properties: -- compatible: must contain "qcom,adm" for IPQ/APQ8064 and MSM8960 -- reg: Address range for DMA registers -- interrupts: Should contain one interrupt shared by all channels -- #dma-cells: must be <2>. First cell denotes the channel number. Second cell - denotes CRCI (client rate control interface) flow control assignment. -- clocks: Should contain the core clock and interface clock. -- clock-names: Must contain "core" for the core clock and "iface" for the - interface clock. -- resets: Must contain an entry for each entry in reset names. -- reset-names: Must include the following entries: - - clk - - c0 - - c1 - - c2 -- qcom,ee: indicates the security domain identifier used in the secure world. - -Example: - adm_dma: dma@18300000 { - compatible = "qcom,adm"; - reg = <0x18300000 0x100000>; - interrupts = <0 170 0>; - #dma-cells = <2>; - - clocks = <&gcc ADM0_CLK>, <&gcc ADM0_PBUS_CLK>; - clock-names = "core", "iface"; - - resets = <&gcc ADM0_RESET>, - <&gcc ADM0_C0_RESET>, - <&gcc ADM0_C1_RESET>, - <&gcc ADM0_C2_RESET>; - reset-names = "clk", "c0", "c1", "c2"; - qcom,ee = <0>; - }; - -DMA clients must use the format descripted in the dma.txt file, using a three -cell specifier for each channel. - -Each dmas request consists of 3 cells: - 1. phandle pointing to the DMA controller - 2. channel number - 3. CRCI assignment, if applicable. If no CRCI flow control is required, use 0. - The CRCI is used for flow control. It identifies the peripheral device that - is the source/destination for the transferred data. - -Example: - - spi4: spi@1a280000 { - spi-max-frequency = <50000000>; - - pinctrl-0 = <&spi_pins>; - pinctrl-names = "default"; - - cs-gpios = <&qcom_pinmux 20 0>; - - dmas = <&adm_dma 6 9>, - <&adm_dma 5 10>; - dma-names = "rx", "tx"; - }; diff --git a/Documentation/devicetree/bindings/dma/renesas,rcar-dmac.yaml b/Documentation/devicetree/bindings/dma/renesas,rcar-dmac.yaml index 7202cd68e759..89b591a05bce 100644 --- a/Documentation/devicetree/bindings/dma/renesas,rcar-dmac.yaml +++ b/Documentation/devicetree/bindings/dma/renesas,rcar-dmac.yaml @@ -45,6 +45,7 @@ properties: - enum: - renesas,dmac-r8a779a0 # R-Car V3U - renesas,dmac-r8a779f0 # R-Car S4-8 + - renesas,dmac-r8a779g0 # R-Car V4H - const: renesas,rcar-gen4-dmac # R-Car Gen4 reg: true diff --git a/Documentation/devicetree/bindings/dma/ti-dma-crossbar.txt b/Documentation/devicetree/bindings/dma/ti-dma-crossbar.txt index b849a1ed389d..47e477cce6d2 100644 --- a/Documentation/devicetree/bindings/dma/ti-dma-crossbar.txt +++ b/Documentation/devicetree/bindings/dma/ti-dma-crossbar.txt @@ -4,7 +4,7 @@ Required properties: - compatible: "ti,dra7-dma-crossbar" for DRA7xx DMA crossbar "ti,am335x-edma-crossbar" for AM335x and AM437x - reg: Memory map for accessing module -- #dma-cells: Should be set to to match with the DMA controller's dma-cells +- #dma-cells: Should be set to match with the DMA controller's dma-cells for ti,dra7-dma-crossbar and <3> for ti,am335x-edma-crossbar. - dma-requests: Number of DMA requests the crossbar can receive - dma-masters: phandle pointing to the DMA controller diff --git a/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml b/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml index e66ef2da7879..9af40da5688e 100644 --- a/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml +++ b/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml @@ -20,6 +20,7 @@ properties: - fsl,imx8qxp-dsp - fsl,imx8qm-dsp - fsl,imx8mp-dsp + - fsl,imx8ulp-dsp - fsl,imx8qxp-hifi4 - fsl,imx8qm-hifi4 - fsl,imx8mp-hifi4 diff --git a/Documentation/devicetree/bindings/firmware/fsl,scu.yaml b/Documentation/devicetree/bindings/firmware/fsl,scu.yaml index b40b0ef56978..557e524786c2 100644 --- a/Documentation/devicetree/bindings/firmware/fsl,scu.yaml +++ b/Documentation/devicetree/bindings/firmware/fsl,scu.yaml @@ -30,6 +30,11 @@ properties: Clock controller node that provides the clocks controlled by the SCU $ref: /schemas/clock/fsl,scu-clk.yaml + gpio: + description: + Control the GPIO PINs on SCU domain over the firmware APIs + $ref: /schemas/gpio/fsl,imx8qxp-sc-gpio.yaml + ocotp: description: OCOTP controller node provided by the SCU diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.txt b/Documentation/devicetree/bindings/firmware/qcom,scm.txt deleted file mode 100644 index b3f702cbed87..000000000000 --- a/Documentation/devicetree/bindings/firmware/qcom,scm.txt +++ /dev/null @@ -1,61 +0,0 @@ -QCOM Secure Channel Manager (SCM) - -Qualcomm processors include an interface to communicate to the secure firmware. -This interface allows for clients to request different types of actions. These -can include CPU power up/down, HDCP requests, loading of firmware, and other -assorted actions. - -Required properties: -- compatible: must contain one of the following: - * "qcom,scm-apq8064" - * "qcom,scm-apq8084" - * "qcom,scm-ipq4019" - * "qcom,scm-ipq806x" - * "qcom,scm-ipq8074" - * "qcom,scm-mdm9607" - * "qcom,scm-msm8226" - * "qcom,scm-msm8660" - * "qcom,scm-msm8916" - * "qcom,scm-msm8953" - * "qcom,scm-msm8960" - * "qcom,scm-msm8974" - * "qcom,scm-msm8976" - * "qcom,scm-msm8994" - * "qcom,scm-msm8996" - * "qcom,scm-msm8998" - * "qcom,scm-qcs404" - * "qcom,scm-sc7180" - * "qcom,scm-sc7280" - * "qcom,scm-sm6125" - * "qcom,scm-sdm845" - * "qcom,scm-sdx55" - * "qcom,scm-sdx65" - * "qcom,scm-sm6350" - * "qcom,scm-sm8150" - * "qcom,scm-sm8250" - * "qcom,scm-sm8350" - * "qcom,scm-sm8450" - and: - * "qcom,scm" -- clocks: Specifies clocks needed by the SCM interface, if any: - * core clock required for "qcom,scm-apq8064", "qcom,scm-msm8660" and - "qcom,scm-msm8960" - * core, iface and bus clocks required for "qcom,scm-apq8084", - "qcom,scm-msm8916", "qcom,scm-msm8953", "qcom,scm-msm8974" and "qcom,scm-msm8976" -- clock-names: Must contain "core" for the core clock, "iface" for the interface - clock and "bus" for the bus clock per the requirements of the compatible. -- qcom,dload-mode: phandle to the TCSR hardware block and offset of the - download mode control register (optional) -- interconnects: Specifies the bandwidth requirements of the SCM interface (optional) - -Example for MSM8916: - - firmware { - scm { - compatible = "qcom,msm8916", "qcom,scm"; - clocks = <&gcc GCC_CRYPTO_CLK> , - <&gcc GCC_CRYPTO_AXI_CLK>, - <&gcc GCC_CRYPTO_AHB_CLK>; - clock-names = "core", "bus", "iface"; - }; - }; diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.yaml b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml new file mode 100644 index 000000000000..c5b76c9f7ad0 --- /dev/null +++ b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml @@ -0,0 +1,148 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/firmware/qcom,scm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: QCOM Secure Channel Manager (SCM) + +description: | + Qualcomm processors include an interface to communicate to the secure firmware. + This interface allows for clients to request different types of actions. + These can include CPU power up/down, HDCP requests, loading of firmware, + and other assorted actions. + +maintainers: + - Bjorn Andersson <bjorn.andersson@linaro.org> + - Robert Marko <robimarko@gmail.com> + - Guru Das Srinagesh <quic_gurus@quicinc.com> + +properties: + compatible: + items: + - enum: + - qcom,scm-apq8064 + - qcom,scm-apq8084 + - qcom,scm-ipq4019 + - qcom,scm-ipq6018 + - qcom,scm-ipq806x + - qcom,scm-ipq8074 + - qcom,scm-mdm9607 + - qcom,scm-msm8226 + - qcom,scm-msm8660 + - qcom,scm-msm8916 + - qcom,scm-msm8953 + - qcom,scm-msm8960 + - qcom,scm-msm8974 + - qcom,scm-msm8976 + - qcom,scm-msm8994 + - qcom,scm-msm8996 + - qcom,scm-msm8998 + - qcom,scm-sc7180 + - qcom,scm-sc7280 + - qcom,scm-sc8280xp + - qcom,scm-sdm845 + - qcom,scm-sdx55 + - qcom,scm-sdx65 + - qcom,scm-sm6115 + - qcom,scm-sm6125 + - qcom,scm-sm6350 + - qcom,scm-sm8150 + - qcom,scm-sm8250 + - qcom,scm-sm8350 + - qcom,scm-sm8450 + - qcom,scm-qcs404 + - const: qcom,scm + + clocks: + minItems: 1 + maxItems: 3 + + clock-names: + minItems: 1 + maxItems: 3 + + interconnects: + maxItems: 1 + + interconnect-names: + maxItems: 1 + + '#reset-cells': + const: 1 + + qcom,dload-mode: + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: phandle to TCSR hardware block + - description: offset of the download mode control register + description: TCSR hardware block + +allOf: + - if: + properties: + compatible: + contains: + enum: + - qcom,scm-apq8064 + - qcom,scm-msm8660 + - qcom,scm-msm8960 + then: + properties: + clock-names: + items: + - const: core + + clocks: + maxItems: 1 + + required: + - clocks + - clock-names + + - if: + properties: + compatible: + contains: + enum: + - qcom,scm-apq8084 + - qcom,scm-mdm9607 + - qcom,scm-msm8916 + - qcom,scm-msm8953 + - qcom,scm-msm8974 + - qcom,scm-msm8976 + then: + properties: + clock-names: + items: + - const: core + - const: bus + - const: iface + + clocks: + minItems: 3 + maxItems: 3 + + required: + - clocks + - clock-names + +required: + - compatible + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,gcc-msm8916.h> + + firmware { + scm { + compatible = "qcom,scm-msm8916", "qcom,scm"; + clocks = <&gcc GCC_CRYPTO_CLK>, + <&gcc GCC_CRYPTO_AXI_CLK>, + <&gcc GCC_CRYPTO_AHB_CLK>; + clock-names = "core", "bus", "iface"; + }; + }; diff --git a/Documentation/devicetree/bindings/fpga/microchip,mpf-spi-fpga-mgr.yaml b/Documentation/devicetree/bindings/fpga/microchip,mpf-spi-fpga-mgr.yaml index aee45cb15592..527532f039ce 100644 --- a/Documentation/devicetree/bindings/fpga/microchip,mpf-spi-fpga-mgr.yaml +++ b/Documentation/devicetree/bindings/fpga/microchip,mpf-spi-fpga-mgr.yaml @@ -22,13 +22,14 @@ properties: description: SPI chip select maxItems: 1 - spi-max-frequency: true - required: - compatible - reg -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/fpga/xilinx-zynq-fpga-mgr.yaml b/Documentation/devicetree/bindings/fpga/xilinx-zynq-fpga-mgr.yaml index 29daca4be47f..f47b6140a742 100644 --- a/Documentation/devicetree/bindings/fpga/xilinx-zynq-fpga-mgr.yaml +++ b/Documentation/devicetree/bindings/fpga/xilinx-zynq-fpga-mgr.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/fpga/xilinx-zynq-fpga-mgr.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Xilinx Zynq FPGA Manager Device Tree Bindings +title: Xilinx Zynq FPGA Manager maintainers: - Michal Simek <michal.simek@xilinx.com> diff --git a/Documentation/devicetree/bindings/fpga/xlnx,zynqmp-pcap-fpga.yaml b/Documentation/devicetree/bindings/fpga/xlnx,zynqmp-pcap-fpga.yaml index 6cd2bdc06b5f..00a8d92ff736 100644 --- a/Documentation/devicetree/bindings/fpga/xlnx,zynqmp-pcap-fpga.yaml +++ b/Documentation/devicetree/bindings/fpga/xlnx,zynqmp-pcap-fpga.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/fpga/xlnx,zynqmp-pcap-fpga.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Xilinx Zynq Ultrascale MPSoC FPGA Manager Device Tree Bindings +title: Xilinx Zynq Ultrascale MPSoC FPGA Manager maintainers: - Nava kishore Manne <navam@xilinx.com> diff --git a/Documentation/devicetree/bindings/gnss/brcm,bcm4751.yaml b/Documentation/devicetree/bindings/gnss/brcm,bcm4751.yaml index e62b30386ac2..c21549e0fba6 100644 --- a/Documentation/devicetree/bindings/gnss/brcm,bcm4751.yaml +++ b/Documentation/devicetree/bindings/gnss/brcm,bcm4751.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/gnss/brcm,bcm4751.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Broadcom BCM4751 family GNSS Receiver Device Tree Bindings +title: Broadcom BCM4751 family GNSS Receiver maintainers: - Johan Hovold <johan@kernel.org> diff --git a/Documentation/devicetree/bindings/gnss/mediatek.yaml b/Documentation/devicetree/bindings/gnss/mediatek.yaml index 45cf01b27700..c0eb35beb2ef 100644 --- a/Documentation/devicetree/bindings/gnss/mediatek.yaml +++ b/Documentation/devicetree/bindings/gnss/mediatek.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/gnss/mediatek.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Mediatek GNSS Receiver Device Tree Bindings +title: Mediatek GNSS Receiver maintainers: - Johan Hovold <johan@kernel.org> diff --git a/Documentation/devicetree/bindings/gnss/sirfstar.yaml b/Documentation/devicetree/bindings/gnss/sirfstar.yaml index 991599cdaa6b..0bbe684d82e1 100644 --- a/Documentation/devicetree/bindings/gnss/sirfstar.yaml +++ b/Documentation/devicetree/bindings/gnss/sirfstar.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/gnss/sirfstar.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: SiRFstar GNSS Receiver Device Tree Bindings +title: SiRFstar GNSS Receiver maintainers: - Johan Hovold <johan@kernel.org> diff --git a/Documentation/devicetree/bindings/gnss/u-blox,neo-6m.yaml b/Documentation/devicetree/bindings/gnss/u-blox,neo-6m.yaml index 35a760cfd343..4835a280b3bf 100644 --- a/Documentation/devicetree/bindings/gnss/u-blox,neo-6m.yaml +++ b/Documentation/devicetree/bindings/gnss/u-blox,neo-6m.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/gnss/u-blox,neo-6m.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: U-blox GNSS Receiver Device Tree Bindings +title: U-blox GNSS Receiver allOf: - $ref: gnss-common.yaml# diff --git a/Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml b/Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml index a99e7842ca17..c0ad70e66f76 100644 --- a/Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml +++ b/Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml @@ -33,8 +33,6 @@ properties: description: GPIO connected to the OE (Output Enable) pin. maxItems: 1 - spi-max-frequency: true - patternProperties: "^(hog-[0-9]+|.+-hog(-[0-9]+)?)$": type: object @@ -59,7 +57,10 @@ required: - '#gpio-cells' - registers-number -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/gpio/fsl,imx8qxp-sc-gpio.yaml b/Documentation/devicetree/bindings/gpio/fsl,imx8qxp-sc-gpio.yaml new file mode 100644 index 000000000000..b7b32220935d --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/fsl,imx8qxp-sc-gpio.yaml @@ -0,0 +1,39 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/fsl,imx8qxp-sc-gpio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: GPIO driver over IMX SCU firmware API + +maintainers: + - Shenwei Wang <shenwei.wang@nxp.com> + +description: | + This module provides the standard interface to control the + resource pins in SCU domain on i.MX8 platforms. + +properties: + compatible: + enum: + - fsl,imx8qxp-sc-gpio + + "#gpio-cells": + const: 2 + + gpio-controller: true + +required: + - compatible + - "#gpio-cells" + - gpio-controller + +additionalProperties: false + +examples: + - | + gpio0: gpio { + compatible = "fsl,imx8qxp-sc-gpio"; + gpio-controller; + #gpio-cells = <2>; + }; diff --git a/Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml b/Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml index 977b14db09b0..1b70e9f308f3 100644 --- a/Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml +++ b/Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml @@ -15,52 +15,59 @@ description: |+ properties: compatible: - enum: - - exar,xra1202 - - maxim,max7310 - - maxim,max7312 - - maxim,max7313 - - maxim,max7315 - - maxim,max7319 - - maxim,max7320 - - maxim,max7321 - - maxim,max7322 - - maxim,max7323 - - maxim,max7324 - - maxim,max7325 - - maxim,max7326 - - maxim,max7327 - - nxp,pca6408 - - nxp,pca6416 - - nxp,pca9505 - - nxp,pca9506 - - nxp,pca9534 - - nxp,pca9535 - - nxp,pca9536 - - nxp,pca9537 - - nxp,pca9538 - - nxp,pca9539 - - nxp,pca9554 - - nxp,pca9555 - - nxp,pca9556 - - nxp,pca9557 - - nxp,pca9574 - - nxp,pca9575 - - nxp,pca9698 - - nxp,pcal6416 - - nxp,pcal6524 - - nxp,pcal9535 - - nxp,pcal9554b - - nxp,pcal9555a - - onnn,cat9554 - - onnn,pca9654 - - ti,pca6107 - - ti,pca9536 - - ti,tca6408 - - ti,tca6416 - - ti,tca6424 - - ti,tca9539 - - ti,tca9554 + oneOf: + - items: + - const: diodes,pi4ioe5v6534q + - const: nxp,pcal6534 + - items: + - enum: + - exar,xra1202 + - maxim,max7310 + - maxim,max7312 + - maxim,max7313 + - maxim,max7315 + - maxim,max7319 + - maxim,max7320 + - maxim,max7321 + - maxim,max7322 + - maxim,max7323 + - maxim,max7324 + - maxim,max7325 + - maxim,max7326 + - maxim,max7327 + - nxp,pca6408 + - nxp,pca6416 + - nxp,pca9505 + - nxp,pca9506 + - nxp,pca9534 + - nxp,pca9535 + - nxp,pca9536 + - nxp,pca9537 + - nxp,pca9538 + - nxp,pca9539 + - nxp,pca9554 + - nxp,pca9555 + - nxp,pca9556 + - nxp,pca9557 + - nxp,pca9574 + - nxp,pca9575 + - nxp,pca9698 + - nxp,pcal6408 + - nxp,pcal6416 + - nxp,pcal6524 + - nxp,pcal6534 + - nxp,pcal9535 + - nxp,pcal9554b + - nxp,pcal9555a + - onnn,cat9554 + - onnn,pca9654 + - ti,pca6107 + - ti,pca9536 + - ti,tca6408 + - ti,tca6416 + - ti,tca6424 + - ti,tca9539 + - ti,tca9554 reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/gpio/gpio-stmpe.txt b/Documentation/devicetree/bindings/gpio/gpio-stmpe.txt index a0e4cf885213..b33f8f02c0d7 100644 --- a/Documentation/devicetree/bindings/gpio/gpio-stmpe.txt +++ b/Documentation/devicetree/bindings/gpio/gpio-stmpe.txt @@ -8,8 +8,7 @@ Optional properties: - st,norequest-mask: bitmask specifying which GPIOs should _not_ be requestable due to different usage (e.g. touch, keypad) -Node name must be stmpe_gpio and should be child node of stmpe node to which it -belongs. +Node should be child node of stmpe node to which it belongs. Example: stmpe_gpio { diff --git a/Documentation/devicetree/bindings/gpio/gpio-xilinx.txt b/Documentation/devicetree/bindings/gpio/gpio-xilinx.txt deleted file mode 100644 index e506f30e1a95..000000000000 --- a/Documentation/devicetree/bindings/gpio/gpio-xilinx.txt +++ /dev/null @@ -1,48 +0,0 @@ -Xilinx plb/axi GPIO controller - -Dual channel GPIO controller with configurable number of pins -(from 1 to 32 per channel). Every pin can be configured as -input/output/tristate. Both channels share the same global IRQ but -local interrupts can be enabled on channel basis. - -Required properties: -- compatible : Should be "xlnx,xps-gpio-1.00.a" -- reg : Address and length of the register set for the device -- #gpio-cells : Should be two. The first cell is the pin number and the - second cell is used to specify optional parameters (currently unused). -- gpio-controller : Marks the device node as a GPIO controller. - -Optional properties: -- clocks : Input clock specifier. Refer to common clock bindings. -- interrupts : Interrupt mapping for GPIO IRQ. -- xlnx,all-inputs : if n-th bit is setup, GPIO-n is input -- xlnx,dout-default : if n-th bit is 1, GPIO-n default value is 1 -- xlnx,gpio-width : gpio width -- xlnx,tri-default : if n-th bit is 1, GPIO-n is in tristate mode -- xlnx,is-dual : if 1, controller also uses the second channel -- xlnx,all-inputs-2 : as above but for the second channel -- xlnx,dout-default-2 : as above but the second channel -- xlnx,gpio2-width : as above but for the second channel -- xlnx,tri-default-2 : as above but for the second channel - - -Example: -gpio: gpio@40000000 { - #gpio-cells = <2>; - compatible = "xlnx,xps-gpio-1.00.a"; - clocks = <&clkc25>; - gpio-controller ; - interrupt-parent = <µblaze_0_intc>; - interrupts = < 6 2 >; - reg = < 0x40000000 0x10000 >; - xlnx,all-inputs = <0x0>; - xlnx,all-inputs-2 = <0x0>; - xlnx,dout-default = <0x0>; - xlnx,dout-default-2 = <0x0>; - xlnx,gpio-width = <0x2>; - xlnx,gpio2-width = <0x2>; - xlnx,interrupt-present = <0x1>; - xlnx,is-dual = <0x1>; - xlnx,tri-default = <0xffffffff>; - xlnx,tri-default-2 = <0xffffffff>; -} ; diff --git a/Documentation/devicetree/bindings/gpio/gpio-zynq.yaml b/Documentation/devicetree/bindings/gpio/gpio-zynq.yaml index 29c27eadbac8..572e1718f501 100644 --- a/Documentation/devicetree/bindings/gpio/gpio-zynq.yaml +++ b/Documentation/devicetree/bindings/gpio/gpio-zynq.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/gpio/gpio-zynq.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Xilinx Zynq GPIO controller Device Tree Bindings +title: Xilinx Zynq GPIO controller maintainers: - Michal Simek <michal.simek@xilinx.com> diff --git a/Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml b/Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml index 110651eafa70..d481e78958a7 100644 --- a/Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/gpio/microchip,mpfs-gpio.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Microchip MPFS GPIO Controller Device Tree Bindings +title: Microchip MPFS GPIO Controller maintainers: - Conor Dooley <conor.dooley@microchip.com> @@ -44,6 +44,24 @@ properties: gpio-controller: true +patternProperties: + "^.+-hog(-[0-9]+)?$": + type: object + + additionalProperties: false + + properties: + gpio-hog: true + gpios: true + input: true + output-high: true + output-low: true + line-name: true + + required: + - gpio-hog + - gpios + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/gpio/renesas,rcar-gpio.yaml b/Documentation/devicetree/bindings/gpio/renesas,rcar-gpio.yaml index 75e5da6a7cc0..aa424e2b95f8 100644 --- a/Documentation/devicetree/bindings/gpio/renesas,rcar-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/renesas,rcar-gpio.yaml @@ -52,6 +52,7 @@ properties: - enum: - renesas,gpio-r8a779a0 # R-Car V3U - renesas,gpio-r8a779f0 # R-Car S4-8 + - renesas,gpio-r8a779g0 # R-Car V4H - const: renesas,rcar-gen4-gpio # R-Car Gen4 reg: diff --git a/Documentation/devicetree/bindings/gpio/x-powers,axp209-gpio.yaml b/Documentation/devicetree/bindings/gpio/x-powers,axp209-gpio.yaml index 14486aee97b4..7f26f6b1eea1 100644 --- a/Documentation/devicetree/bindings/gpio/x-powers,axp209-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/x-powers,axp209-gpio.yaml @@ -4,7 +4,7 @@ $id: "http://devicetree.org/schemas/gpio/x-powers,axp209-gpio.yaml#" $schema: "http://devicetree.org/meta-schemas/core.yaml#" -title: X-Powers AXP209 GPIO Device Tree Bindings +title: X-Powers AXP209 GPIO maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/gpio/xlnx,gpio-xilinx.yaml b/Documentation/devicetree/bindings/gpio/xlnx,gpio-xilinx.yaml new file mode 100644 index 000000000000..f333ee2288e7 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/xlnx,gpio-xilinx.yaml @@ -0,0 +1,154 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/xlnx,gpio-xilinx.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Xilinx AXI GPIO controller + +maintainers: + - Neeli Srinivas <srinivas.neeli@xilinx.com> + +description: + The AXI GPIO design provides a general purpose input/output interface + to an AXI4-Lite interface. The AXI GPIO can be configured as either + a single or a dual-channel device. The width of each channel is + independently configurable. The channels can be configured to + generate an interrupt when a transition on any of their inputs occurs. + +properties: + compatible: + enum: + - xlnx,xps-gpio-1.00.a + + reg: + maxItems: 1 + + "#gpio-cells": + const: 2 + + interrupts: + maxItems: 1 + + gpio-controller: true + + gpio-line-names: + description: strings describing the names of each gpio line + minItems: 1 + maxItems: 64 + + interrupt-controller: true + + "#interrupt-cells": + const: 2 + + clocks: + maxItems: 1 + + interrupt-names: true + + xlnx,all-inputs: + $ref: /schemas/types.yaml#/definitions/uint32 + description: This option sets this GPIO channel1 bits in input mode. + + xlnx,all-inputs-2: + $ref: /schemas/types.yaml#/definitions/uint32 + description: This option sets this GPIO channel2 bits in input mode. + + xlnx,all-outputs: + $ref: /schemas/types.yaml#/definitions/uint32 + description: This option sets this GPIO channel1 bits in output mode. + + xlnx,all-outputs-2: + $ref: /schemas/types.yaml#/definitions/uint32 + description: This option sets this GPIO channel2 bits in output mode. + + xlnx,dout-default: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Sets the default value of all the enabled bits of + channel1. + default: 0 + + xlnx,dout-default-2: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Sets the default value of all the enabled bits of + channel2. + default: 0 + + xlnx,gpio-width: + $ref: /schemas/types.yaml#/definitions/uint32 + description: The value defines the bit width of the GPIO channel1. + minimum: 1 + maximum: 32 + default: 32 + + xlnx,gpio2-width: + $ref: /schemas/types.yaml#/definitions/uint32 + description: The value defines the bit width of the GPIO channel2. + minimum: 1 + maximum: 32 + default: 32 + + xlnx,interrupt-present: + $ref: /schemas/types.yaml#/definitions/uint32 + description: This parameter enables interrupt control logic + and interrupt registers in GPIO module. + minimum: 0 + maximum: 1 + default: 0 + + xlnx,is-dual: + $ref: /schemas/types.yaml#/definitions/uint32 + description: This parameter enables a second GPIO channel (GPIO2). + minimum: 0 + maximum: 1 + default: 0 + + xlnx,tri-default: + $ref: /schemas/types.yaml#/definitions/uint32 + description: This value configures the input or output mode + of each bit of GPIO channel1. + + xlnx,tri-default-2: + $ref: /schemas/types.yaml#/definitions/uint32 + description: This value configures the input or output mode + of each bit of GPIO channel2. + +required: + - reg + - compatible + - gpio-controller + - "#gpio-cells" + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + + gpio@e000a000 { + compatible = "xlnx,xps-gpio-1.00.a"; + reg = <0xa0020000 0x10000>; + #gpio-cells = <2>; + #interrupt-cells = <0x2>; + clocks = <&zynqmp_clk 71>; + gpio-controller; + interrupt-controller; + interrupt-names = "ip2intc_irpt"; + interrupt-parent = <&gic>; + interrupts = <0 89 4>; + xlnx,all-inputs = <0x0>; + xlnx,all-inputs-2 = <0x0>; + xlnx,all-outputs = <0x0>; + xlnx,all-outputs-2 = <0x0>; + xlnx,dout-default = <0x0>; + xlnx,dout-default-2 = <0x0>; + xlnx,gpio-width = <0x20>; + xlnx,gpio2-width = <0x20>; + xlnx,interrupt-present = <0x1>; + xlnx,is-dual = <0x1>; + xlnx,tri-default = <0xFFFFFFFF>; + xlnx,tri-default-2 = <0xFFFFFFFF>; + }; + +... diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml index d209f272625d..2a25384ca3ef 100644 --- a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml +++ b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml @@ -74,7 +74,8 @@ properties: - const: bus mali-supply: true - opp-table: true + opp-table: + type: object power-domains: maxItems: 1 diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml index eceaa176bd57..318122d95eb5 100644 --- a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml +++ b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml @@ -101,7 +101,8 @@ properties: mali-supply: true - opp-table: true + opp-table: + type: object power-domains: maxItems: 1 diff --git a/Documentation/devicetree/bindings/hwmon/adi,axi-fan-control.yaml b/Documentation/devicetree/bindings/hwmon/adi,axi-fan-control.yaml index 6747b870f297..f2f99afb3a3b 100644 --- a/Documentation/devicetree/bindings/hwmon/adi,axi-fan-control.yaml +++ b/Documentation/devicetree/bindings/hwmon/adi,axi-fan-control.yaml @@ -5,7 +5,7 @@ $id: http://devicetree.org/schemas/hwmon/adi,axi-fan-control.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Analog Devices AXI FAN Control Device Tree Bindings +title: Analog Devices AXI FAN Control maintainers: - Nuno Sá <nuno.sa@analog.com> diff --git a/Documentation/devicetree/bindings/hwmon/adi,max31760.yaml b/Documentation/devicetree/bindings/hwmon/adi,max31760.yaml new file mode 100644 index 000000000000..9f2d08d7b978 --- /dev/null +++ b/Documentation/devicetree/bindings/hwmon/adi,max31760.yaml @@ -0,0 +1,42 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/hwmon/adi,max31760.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices MAX31760 Fan-Speed Controller + +maintainers: + - Ibrahim Tilki <Ibrahim.Tilki@analog.com> + +description: | + Analog Devices MAX31760 Fan-Speed Controller + https://datasheets.maximintegrated.com/en/ds/MAX31760.pdf + +properties: + compatible: + enum: + - adi,max31760 + + reg: + description: I2C address of slave device. + minimum: 0x50 + maximum: 0x57 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + fan-controller@50 { + reg = <0x50>; + compatible = "adi,max31760"; + }; + }; diff --git a/Documentation/devicetree/bindings/hwmon/ibm,occ-hwmon.yaml b/Documentation/devicetree/bindings/hwmon/ibm,occ-hwmon.yaml new file mode 100644 index 000000000000..3dbdc5af2804 --- /dev/null +++ b/Documentation/devicetree/bindings/hwmon/ibm,occ-hwmon.yaml @@ -0,0 +1,39 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/hwmon/ibm,occ-hwmon.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: IBM On-Chip Controller (OCC) accessed from a service processor + +maintainers: + - Eddie James <eajames@linux.ibm.com> + +description: | + The POWER processor On-Chip Controller (OCC) helps manage power and + thermals for the system. A service processor or baseboard management + controller can query the OCC for it's power and thermal data to report + through hwmon. + +properties: + compatible: + enum: + - ibm,p9-occ-hwmon + - ibm,p10-occ-hwmon + + ibm,no-poll-on-init: + description: This property describes whether or not the OCC should + be polled during driver initialization. + type: boolean + +required: + - compatible + +additionalProperties: false + +examples: + - | + hwmon { + compatible = "ibm,p10-occ-hwmon"; + ibm,no-poll-on-init; + }; diff --git a/Documentation/devicetree/bindings/hwmon/iio-hwmon.yaml b/Documentation/devicetree/bindings/hwmon/iio-hwmon.yaml index f5a6cc3efd33..e1ccbd30e0eb 100644 --- a/Documentation/devicetree/bindings/hwmon/iio-hwmon.yaml +++ b/Documentation/devicetree/bindings/hwmon/iio-hwmon.yaml @@ -4,7 +4,7 @@ $id: "http://devicetree.org/schemas/hwmon/iio-hwmon.yaml#" $schema: "http://devicetree.org/meta-schemas/core.yaml#" -title: ADC-attached Hardware Sensor Device Tree Bindings +title: ADC-attached Hardware Sensor maintainers: - Jonathan Cameron <jic23@kernel.org> diff --git a/Documentation/devicetree/bindings/hwmon/microchip,sparx5-temp.yaml b/Documentation/devicetree/bindings/hwmon/microchip,sparx5-temp.yaml index 76be625d5646..51e8619dbf3c 100644 --- a/Documentation/devicetree/bindings/hwmon/microchip,sparx5-temp.yaml +++ b/Documentation/devicetree/bindings/hwmon/microchip,sparx5-temp.yaml @@ -22,7 +22,7 @@ properties: clocks: items: - - description: AHB reference clock + - description: System reference clock '#thermal-sensor-cells': const: 0 @@ -40,5 +40,5 @@ examples: compatible = "microchip,sparx5-temp"; reg = <0x10508110 0xc>; #thermal-sensor-cells = <0>; - clocks = <&ahb_clk>; + clocks = <&sys_clk>; }; diff --git a/Documentation/devicetree/bindings/hwmon/moortec,mr75203.yaml b/Documentation/devicetree/bindings/hwmon/moortec,mr75203.yaml index b79f069a04c2..d0d549749208 100644 --- a/Documentation/devicetree/bindings/hwmon/moortec,mr75203.yaml +++ b/Documentation/devicetree/bindings/hwmon/moortec,mr75203.yaml @@ -9,6 +9,32 @@ title: Moortec Semiconductor MR75203 PVT Controller bindings maintainers: - Rahul Tanwar <rtanwar@maxlinear.com> +description: | + A Moortec PVT (Process, Voltage, Temperature) monitoring logic design can + include many different units. + Such a design will usually consists of several Moortec's embedded analog IPs, + and a single Moortec controller (mr75203) to configure and control the IPs. + + Some of the Moortec's analog hard IPs that can be used in a design: + *) Temperature Sensor (TS) - used to monitor core temperature (e.g. mr74137). + *) Voltage Monitor (VM) - used to monitor voltage levels (e.g. mr74138). + *) Process Detector (PD) - used to assess silicon speed (e.g. mr74139). + *) Delay Chain - ring oscillator connected to the PD, used to measure IO + based transistors (e.g. mr76008 ring oscillator at 1.1V, mr76007 ring + oscillator at 1.8V). + *) Pre Scaler - provides divide-by-X scaling of input voltage, which can then + be presented for VM for measurement within its range (e.g. mr76006 - + divide by 2 pre-scaler). + + TS, VM & PD also include a digital interface, which consists of configuration + inputs and measurement outputs. + + Some of the units have number of series, each series can have slightly + different characteristics. + + The mr75203 binding describes configuration for the controller unit, but also + for some of the analog IPs. + properties: compatible: const: moortec,mr75203 @@ -44,13 +70,76 @@ properties: "#thermal-sensor-cells": const: 1 + moortec,vm-active-channels: + description: + Defines the number of channels per VM that are actually used and are + connected to some input source. + Maximum number of items - number of VMs. + Maximum value of each item - number of channels. + Minimum value of each item - 0 (which means entire VM sensor is not used). + $ref: /schemas/types.yaml#/definitions/uint8-array + + moortec,vm-pre-scaler-x2: + description: + Defines the channels that use a mr76006 pre-scaler to divide the input + source by 2. + The pre-scaler is used for input sources that exceed the VM input range. + The driver uses this information to present to the user with the actual + value of the voltage source. + For channels that are not listed, no pre-scaler is assumed. + Maximum number of items - total number of channels in all VMs. + Each channel should not appear more than once. + $ref: /schemas/types.yaml#/definitions/uint8-array + + moortec,ts-series: + description: + Definition of the temperature equation and coefficients that shall be + used to convert the digital output to value in milli-Celsius. + minimum: 5 + maximum: 6 + default: 5 + $ref: /schemas/types.yaml#/definitions/uint32 + + moortec,ts-coeff-g: + description: + G coefficient for temperature equation. + Default for series 5 = 60000 + Default for series 6 = 57400 + multipleOf: 1000 + minimum: 1000 + $ref: /schemas/types.yaml#/definitions/uint32 + + moortec,ts-coeff-h: + description: + H coefficient for temperature equation. + Default for series 5 = 200000 + Default for series 6 = 249400 + multipleOf: 1000 + minimum: 1000 + $ref: /schemas/types.yaml#/definitions/uint32 + + moortec,ts-coeff-cal5: + description: + cal5 coefficient for temperature equation. + Default for series 5 = 4094 + Default for series 6 = 4096 + minimum: 1 + $ref: /schemas/types.yaml#/definitions/uint32 + + moortec,ts-coeff-j: + description: + J coefficient for temperature equation. + Default for series 5 = -100 + Default for series 6 = 0 + multipleOf: 1000 + maximum: 0 + $ref: /schemas/types.yaml#/definitions/int32 + required: - compatible - reg - reg-names - - intel,vm-map - clocks - - resets - "#thermal-sensor-cells" additionalProperties: false @@ -67,5 +156,9 @@ examples: intel,vm-map = [03 01 04 ff ff]; clocks = <&osc0>; resets = <&rcu0 0x40 7>; + moortec,vm-active-channels = /bits/ 8 <0x10 0x05>; + moortec,vm-pre-scaler-x2 = /bits/ 8 <5 6 20>; + moortec,ts-coeff-g = <61400>; + moortec,ts-coeff-h = <253700>; #thermal-sensor-cells = <1>; }; diff --git a/Documentation/devicetree/bindings/hwmon/sensirion,shtc1.yaml b/Documentation/devicetree/bindings/hwmon/sensirion,shtc1.yaml index 7d49478d9668..159238efa9ed 100644 --- a/Documentation/devicetree/bindings/hwmon/sensirion,shtc1.yaml +++ b/Documentation/devicetree/bindings/hwmon/sensirion,shtc1.yaml @@ -10,7 +10,7 @@ maintainers: - Christopher Ruehl chris.ruehl@gtsys.com.hk description: | - The SHTC1, SHTW1 and SHTC3 are digital humidity and temperature sensor + The SHTC1, SHTW1 and SHTC3 are digital humidity and temperature sensors designed especially for battery-driven high-volume consumer electronics applications. For further information refere to Documentation/hwmon/shtc1.rst @@ -31,13 +31,13 @@ properties: sensirion,blocking-io: $ref: /schemas/types.yaml#/definitions/flag description: - If set, the driver hold the i2c bus until measurement is finished. + If set, the driver holds the i2c bus until the measurement is finished. sensirion,low-precision: $ref: /schemas/types.yaml#/definitions/flag description: - If set, the sensor aquire data with low precision (not recommended). - The driver aquire data with high precision by default. + If set, the sensor acquires data with low precision (not recommended). + The driver acquires data with high precision by default. required: - compatible diff --git a/Documentation/devicetree/bindings/i2c/allwinner,sun6i-a31-p2wi.yaml b/Documentation/devicetree/bindings/i2c/allwinner,sun6i-a31-p2wi.yaml index 1b03810d4b4d..5a799246a373 100644 --- a/Documentation/devicetree/bindings/i2c/allwinner,sun6i-a31-p2wi.yaml +++ b/Documentation/devicetree/bindings/i2c/allwinner,sun6i-a31-p2wi.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/i2c/allwinner,sun6i-a31-p2wi.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A31 P2WI (Push/Pull 2 Wires Interface) Device Tree Bindings +title: Allwinner A31 P2WI (Push/Pull 2 Wires Interface) maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/i2c/amlogic,meson6-i2c.yaml b/Documentation/devicetree/bindings/i2c/amlogic,meson6-i2c.yaml index 6ecb0270d88d..199a354ccb97 100644 --- a/Documentation/devicetree/bindings/i2c/amlogic,meson6-i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/amlogic,meson6-i2c.yaml @@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#" title: Amlogic Meson I2C Controller maintainers: - - Neil Armstrong <narmstrong@baylibre.com> + - Neil Armstrong <neil.armstrong@linaro.org> - Beniamino Galvani <b.galvani@gmail.com> allOf: diff --git a/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml b/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml index f597f73ccd87..869b4d633353 100644 --- a/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/i2c/aspeed,i2c.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: ASPEED I2C on the AST24XX, AST25XX, and AST26XX SoCs Device Tree Bindings +title: ASPEED I2C on the AST24XX, AST25XX, and AST26XX SoCs maintainers: - Rayn Chen <rayn_chen@aspeedtech.com> diff --git a/Documentation/devicetree/bindings/i2c/cdns,i2c-r1p10.yaml b/Documentation/devicetree/bindings/i2c/cdns,i2c-r1p10.yaml index 1ca1cd19bd1d..2e95cda7262a 100644 --- a/Documentation/devicetree/bindings/i2c/cdns,i2c-r1p10.yaml +++ b/Documentation/devicetree/bindings/i2c/cdns,i2c-r1p10.yaml @@ -4,7 +4,7 @@ $id: "http://devicetree.org/schemas/i2c/cdns,i2c-r1p10.yaml#" $schema: "http://devicetree.org/meta-schemas/core.yaml#" -title: Cadence I2C controller Device Tree Bindings +title: Cadence I2C controller maintainers: - Michal Simek <michal.simek@xilinx.com> diff --git a/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml b/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml index 529bea56d324..4656f5112b84 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml +++ b/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml @@ -23,6 +23,7 @@ properties: - fsl,imx8dxl-lpi2c - fsl,imx8qm-lpi2c - fsl,imx8ulp-lpi2c + - fsl,imx93-lpi2c - const: fsl,imx7ulp-lpi2c reg: @@ -37,10 +38,22 @@ properties: clock-frequency: true clock-names: - maxItems: 1 + items: + - const: per + - const: ipg clocks: - maxItems: 1 + maxItems: 2 + + dmas: + items: + - description: DMA controller phandle and request line for TX + - description: DMA controller phandle and request line for RX + + dma-names: + items: + - const: tx + - const: rx power-domains: maxItems: 1 @@ -63,5 +76,6 @@ examples: reg = <0x40A50000 0x10000>; interrupt-parent = <&intc>; interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX7ULP_CLK_LPI2C7>; + clocks = <&clks IMX7ULP_CLK_LPI2C7>, + <&clks IMX7ULP_CLK_NIC1_BUS_DIV>; }; diff --git a/Documentation/devicetree/bindings/i2c/i2c-imx.yaml b/Documentation/devicetree/bindings/i2c/i2c-imx.yaml index 01720e338b4c..85ee1282d6d2 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-imx.yaml +++ b/Documentation/devicetree/bindings/i2c/i2c-imx.yaml @@ -19,6 +19,17 @@ properties: - const: fsl,imx21-i2c - const: fsl,vf610-i2c - items: + - enum: + - fsl,ls1012a-i2c + - fsl,ls1021a-i2c + - fsl,ls1028a-i2c + - fsl,ls1043a-i2c + - fsl,ls1046a-i2c + - fsl,ls1088a-i2c + - fsl,ls208xa-i2c + - fsl,lx2160a-i2c + - const: fsl,vf610-i2c + - items: - const: fsl,imx35-i2c - const: fsl,imx1-i2c - items: diff --git a/Documentation/devicetree/bindings/i2c/i2c-mt7621.txt b/Documentation/devicetree/bindings/i2c/i2c-mt7621.txt deleted file mode 100644 index bc36f0eb94cd..000000000000 --- a/Documentation/devicetree/bindings/i2c/i2c-mt7621.txt +++ /dev/null @@ -1,25 +0,0 @@ -MediaTek MT7621/MT7628 I2C master controller - -Required properties: - -- compatible: Should be one of the following: - - "mediatek,mt7621-i2c": for MT7621/MT7628/MT7688 platforms -- #address-cells: should be 1. -- #size-cells: should be 0. -- reg: Address and length of the register set for the device -- resets: phandle to the reset controller asserting this device in - reset - See ../reset/reset.txt for details. - -Optional properties : - -Example: - -i2c: i2c@900 { - compatible = "mediatek,mt7621-i2c"; - reg = <0x900 0x100>; - #address-cells = <1>; - #size-cells = <0>; - resets = <&rstctrl 16>; - reset-names = "i2c"; -}; diff --git a/Documentation/devicetree/bindings/i2c/i2c-rk3x.yaml b/Documentation/devicetree/bindings/i2c/i2c-rk3x.yaml index ee9f8b91d2e2..82b9d6682297 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-rk3x.yaml +++ b/Documentation/devicetree/bindings/i2c/i2c-rk3x.yaml @@ -29,6 +29,7 @@ properties: - items: - enum: - rockchip,rk3036-i2c + - rockchip,rk3128-i2c - rockchip,rk3368-i2c - const: rockchip,rk3288-i2c - items: diff --git a/Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml b/Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml index 0ec033e48830..93c164aa00da 100644 --- a/Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/i2c/marvell,mv64xxx-i2c.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Marvell MV64XXX I2C Controller Device Tree Bindings +title: Marvell MV64XXX I2C Controller maintainers: - Gregory CLEMENT <gregory.clement@bootlin.com> @@ -66,6 +66,19 @@ properties: resets: maxItems: 1 + dmas: + items: + - description: RX DMA Channel + - description: TX DMA Channel + + dma-names: + items: + - const: rx + - const: tx + +dependencies: + dmas: [ dma-names ] + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/i2c/mediatek,mt7621-i2c.yaml b/Documentation/devicetree/bindings/i2c/mediatek,mt7621-i2c.yaml new file mode 100644 index 000000000000..118ec00fc190 --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/mediatek,mt7621-i2c.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/i2c/mediatek,mt7621-i2c.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +maintainers: + - Stefan Roese <sr@denx.de> + +title: Mediatek MT7621/MT7628 I2C master controller + +allOf: + - $ref: /schemas/i2c/i2c-controller.yaml# + +properties: + compatible: + const: mediatek,mt7621-i2c + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + const: i2c + + resets: + maxItems: 1 + + reset-names: + const: i2c + +required: + - compatible + - reg + - resets + - "#address-cells" + - "#size-cells" + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/mt7621-clk.h> + #include <dt-bindings/reset/mt7621-reset.h> + + i2c: i2c@900 { + compatible = "mediatek,mt7621-i2c"; + reg = <0x900 0x100>; + clocks = <&sysc MT7621_CLK_I2C>; + clock-names = "i2c"; + resets = <&sysc MT7621_RST_I2C>; + reset-names = "i2c"; + + #address-cells = <1>; + #size-cells = <0>; + + pinctrl-names = "default"; + pinctrl-0 = <&i2c_pins>; + }; diff --git a/Documentation/devicetree/bindings/i2c/mellanox,i2c-mlxbf.yaml b/Documentation/devicetree/bindings/i2c/mellanox,i2c-mlxbf.yaml deleted file mode 100644 index 93198d5d43a6..000000000000 --- a/Documentation/devicetree/bindings/i2c/mellanox,i2c-mlxbf.yaml +++ /dev/null @@ -1,77 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/i2c/mellanox,i2c-mlxbf.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Mellanox I2C SMBus on BlueField SoCs - -maintainers: - - Khalil Blaiech <kblaiech@nvidia.com> - -allOf: - - $ref: /schemas/i2c/i2c-controller.yaml# - -properties: - compatible: - enum: - - mellanox,i2c-mlxbf1 - - mellanox,i2c-mlxbf2 - - reg: - minItems: 3 - items: - - description: Smbus block registers - - description: Cause master registers - - description: Cause slave registers - - description: Cause coalesce registers - - interrupts: - maxItems: 1 - - clock-frequency: - enum: [ 100000, 400000, 1000000 ] - description: - bus frequency used to configure timing registers; - The frequency is expressed in Hz. Default is 100000. - -required: - - compatible - - reg - - interrupts - -unevaluatedProperties: false - -if: - properties: - compatible: - contains: - enum: - - mellanox,i2c-mlxbf1 - -then: - properties: - reg: - maxItems: 3 - -examples: - - | - i2c@2804000 { - compatible = "mellanox,i2c-mlxbf1"; - reg = <0x02804000 0x800>, - <0x02801200 0x020>, - <0x02801260 0x020>; - interrupts = <57>; - clock-frequency = <100000>; - }; - - - | - i2c@2808800 { - compatible = "mellanox,i2c-mlxbf2"; - reg = <0x02808800 0x600>, - <0x02808e00 0x020>, - <0x02808e20 0x020>, - <0x02808e40 0x010>; - interrupts = <57>; - clock-frequency = <400000>; - }; diff --git a/Documentation/devicetree/bindings/i2c/microchip,corei2c.yaml b/Documentation/devicetree/bindings/i2c/microchip,corei2c.yaml index 7bad4b946a34..afa3db726229 100644 --- a/Documentation/devicetree/bindings/i2c/microchip,corei2c.yaml +++ b/Documentation/devicetree/bindings/i2c/microchip,corei2c.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/i2c/microchip,corei2c.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Microchip MPFS I2C Controller Device Tree Bindings +title: Microchip MPFS I2C Controller maintainers: - Daire McNamara <daire.mcnamara@microchip.com> diff --git a/Documentation/devicetree/bindings/i2c/nuvoton,npcm7xx-i2c.yaml b/Documentation/devicetree/bindings/i2c/nuvoton,npcm7xx-i2c.yaml index 09d2591e1fa3..00eb6ff6f5b1 100644 --- a/Documentation/devicetree/bindings/i2c/nuvoton,npcm7xx-i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/nuvoton,npcm7xx-i2c.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/i2c/nuvoton,npcm7xx-i2c.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: nuvoton NPCM7XX I2C Controller Device Tree Bindings +title: nuvoton NPCM7XX I2C Controller description: | I2C bus controllers of the NPCM series support both master and diff --git a/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml b/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml index 90c9e401229e..cf9f8fda595f 100644 --- a/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml +++ b/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml @@ -13,6 +13,7 @@ maintainers: properties: compatible: enum: + - qcom,msm8226-cci - qcom,msm8916-cci - qcom,msm8974-cci - qcom,msm8996-cci @@ -27,11 +28,11 @@ properties: const: 0 clocks: - minItems: 4 + minItems: 3 maxItems: 6 clock-names: - minItems: 4 + minItems: 3 maxItems: 6 interrupts: @@ -78,6 +79,7 @@ allOf: compatible: contains: enum: + - qcom,msm8226-cci - qcom,msm8916-cci then: properties: @@ -88,6 +90,23 @@ allOf: compatible: contains: enum: + - qcom,msm8226-cci + - qcom,msm8974-cci + then: + properties: + clocks: + maxItems: 3 + clock-names: + items: + - const: camss_top_ahb + - const: cci_ahb + - const: cci + + - if: + properties: + compatible: + contains: + enum: - qcom,msm8916-cci - qcom,msm8996-cci then: @@ -126,6 +145,7 @@ allOf: contains: enum: - qcom,sm8250-cci + - qcom,sm8450-cci then: properties: clocks: diff --git a/Documentation/devicetree/bindings/i2c/renesas,rcar-i2c.yaml b/Documentation/devicetree/bindings/i2c/renesas,rcar-i2c.yaml index f9929578c761..c4ace5585e1e 100644 --- a/Documentation/devicetree/bindings/i2c/renesas,rcar-i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/renesas,rcar-i2c.yaml @@ -52,6 +52,7 @@ properties: - enum: - renesas,i2c-r8a779a0 # R-Car V3U - renesas,i2c-r8a779f0 # R-Car S4-8 + - renesas,i2c-r8a779g0 # R-Car V4H - const: renesas,rcar-gen4-i2c # R-Car Gen4 reg: diff --git a/Documentation/devicetree/bindings/i2c/renesas,riic.yaml b/Documentation/devicetree/bindings/i2c/renesas,riic.yaml index 2f315489aaae..d3c0d5c427ac 100644 --- a/Documentation/devicetree/bindings/i2c/renesas,riic.yaml +++ b/Documentation/devicetree/bindings/i2c/renesas,riic.yaml @@ -60,6 +60,9 @@ properties: power-domains: maxItems: 1 + resets: + maxItems: 1 + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml b/Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml index a41588763786..bf396e9466aa 100644 --- a/Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml @@ -57,6 +57,11 @@ properties: - description: interrupt ID for I2C event - description: interrupt ID for I2C error + interrupt-names: + items: + - const: event + - const: error + resets: maxItems: 1 @@ -92,6 +97,8 @@ properties: - description: register offset within syscfg - description: register bitmask for FMP bit + wakeup-source: true + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/i2c/xlnx,xps-iic-2.00.a.yaml b/Documentation/devicetree/bindings/i2c/xlnx,xps-iic-2.00.a.yaml index 715dcfa5a922..8d241a703d85 100644 --- a/Documentation/devicetree/bindings/i2c/xlnx,xps-iic-2.00.a.yaml +++ b/Documentation/devicetree/bindings/i2c/xlnx,xps-iic-2.00.a.yaml @@ -4,7 +4,7 @@ $id: "http://devicetree.org/schemas/i2c/xlnx,xps-iic-2.00.a.yaml#" $schema: "http://devicetree.org/meta-schemas/core.yaml#" -title: Xilinx IIC controller Device Tree Bindings +title: Xilinx IIC controller maintainers: - info@mocean-labs.com diff --git a/Documentation/devicetree/bindings/i3c/mipi-i3c-hci.yaml b/Documentation/devicetree/bindings/i3c/mipi-i3c-hci.yaml index 04da001fc6ec..c002afdbfc7c 100644 --- a/Documentation/devicetree/bindings/i3c/mipi-i3c-hci.yaml +++ b/Documentation/devicetree/bindings/i3c/mipi-i3c-hci.yaml @@ -4,7 +4,7 @@ $id: "http://devicetree.org/schemas/i3c/mipi-i3c-hci.yaml#" $schema: "http://devicetree.org/meta-schemas/core.yaml#" -title: MIPI I3C HCI Device Tree Bindings +title: MIPI I3C HCI maintainers: - Nicolas Pitre <npitre@baylibre.com> diff --git a/Documentation/devicetree/bindings/iio/accel/adi,adis16201.yaml b/Documentation/devicetree/bindings/iio/accel/adi,adis16201.yaml index 6f8f8a6258fe..7332442e5661 100644 --- a/Documentation/devicetree/bindings/iio/accel/adi,adis16201.yaml +++ b/Documentation/devicetree/bindings/iio/accel/adi,adis16201.yaml @@ -27,15 +27,16 @@ properties: interrupts: maxItems: 1 - spi-max-frequency: true - vdd-supply: true required: - compatible - reg -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/accel/adi,adis16240.yaml b/Documentation/devicetree/bindings/iio/accel/adi,adis16240.yaml index 8d829ef878bc..f6f97164c2ca 100644 --- a/Documentation/devicetree/bindings/iio/accel/adi,adis16240.yaml +++ b/Documentation/devicetree/bindings/iio/accel/adi,adis16240.yaml @@ -25,14 +25,15 @@ properties: interrupts: maxItems: 1 - spi-max-frequency: true - required: - compatible - reg - interrupts -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/accel/adi,adxl313.yaml b/Documentation/devicetree/bindings/iio/accel/adi,adxl313.yaml index d6afc1b8c272..185b68ffb536 100644 --- a/Documentation/devicetree/bindings/iio/accel/adi,adxl313.yaml +++ b/Documentation/devicetree/bindings/iio/accel/adi,adxl313.yaml @@ -4,28 +4,30 @@ $id: http://devicetree.org/schemas/iio/accel/adi,adxl313.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Analog Devices ADXL313 3-Axis Digital Accelerometer +title: Analog Devices ADXL312, ADXL313, and ADXL314 3-Axis Digital Accelerometers maintainers: - Lucas Stankus <lucas.p.stankus@gmail.com> description: | - Analog Devices ADXL313 3-Axis Digital Accelerometer that supports - both I2C & SPI interfaces. + Analog Devices ADXL312, ADXL313, and ADXL314 3-Axis Digital Accelerometer that + support both I2C & SPI interfaces. + https://www.analog.com/en/products/adxl312.html https://www.analog.com/en/products/adxl313.html + https://www.analog.com/en/products/adxl314.html properties: compatible: enum: + - adi,adxl312 - adi,adxl313 + - adi,adxl314 reg: maxItems: 1 spi-3wire: true - spi-max-frequency: true - vs-supply: description: Regulator that supplies power to the accelerometer @@ -48,7 +50,10 @@ required: - compatible - reg -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml b/Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml index 9bb039e2f533..346abfb13a3a 100644 --- a/Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml +++ b/Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml @@ -32,8 +32,6 @@ properties: spi-cpol: true - spi-max-frequency: true - interrupts: maxItems: 1 @@ -42,7 +40,10 @@ required: - reg - interrupts -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/accel/adi,adxl355.yaml b/Documentation/devicetree/bindings/iio/accel/adi,adxl355.yaml index ba54d6998f2e..14b487088ab4 100644 --- a/Documentation/devicetree/bindings/iio/accel/adi,adxl355.yaml +++ b/Documentation/devicetree/bindings/iio/accel/adi,adxl355.yaml @@ -45,13 +45,14 @@ properties: vddio-supply: description: Regulator that provides power to the bus - spi-max-frequency: true - required: - compatible - reg -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/accel/adi,adxl367.yaml b/Documentation/devicetree/bindings/iio/accel/adi,adxl367.yaml index d259e796c1d6..f10d98d34cb8 100644 --- a/Documentation/devicetree/bindings/iio/accel/adi,adxl367.yaml +++ b/Documentation/devicetree/bindings/iio/accel/adi,adxl367.yaml @@ -35,8 +35,6 @@ properties: interrupts: maxItems: 1 - spi-max-frequency: true - vdd-supply: true vddio-supply: true @@ -45,7 +43,10 @@ required: - reg - interrupts -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/accel/adi,adxl372.yaml b/Documentation/devicetree/bindings/iio/accel/adi,adxl372.yaml index 38b59b6454ce..73a5c8f814cc 100644 --- a/Documentation/devicetree/bindings/iio/accel/adi,adxl372.yaml +++ b/Documentation/devicetree/bindings/iio/accel/adi,adxl372.yaml @@ -25,14 +25,15 @@ properties: interrupts: maxItems: 1 - spi-max-frequency: true - required: - compatible - reg - interrupts -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/accel/bosch,bma220.yaml b/Documentation/devicetree/bindings/iio/accel/bosch,bma220.yaml index 942b23ad0712..5dd06f5905b4 100644 --- a/Documentation/devicetree/bindings/iio/accel/bosch,bma220.yaml +++ b/Documentation/devicetree/bindings/iio/accel/bosch,bma220.yaml @@ -20,8 +20,6 @@ properties: interrupts: maxItems: 1 - spi-max-frequency: true - vdda-supply: true vddd-supply: true vddio-supply: true @@ -30,7 +28,10 @@ required: - compatible - reg -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/accel/bosch,bma255.yaml b/Documentation/devicetree/bindings/iio/accel/bosch,bma255.yaml index 478e75ae0885..457a709b583c 100644 --- a/Documentation/devicetree/bindings/iio/accel/bosch,bma255.yaml +++ b/Documentation/devicetree/bindings/iio/accel/bosch,bma255.yaml @@ -72,7 +72,10 @@ required: - compatible - reg -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/accel/bosch,bmi088.yaml b/Documentation/devicetree/bindings/iio/accel/bosch,bmi088.yaml index 272eb48eef5a..3cb82576d758 100644 --- a/Documentation/devicetree/bindings/iio/accel/bosch,bmi088.yaml +++ b/Documentation/devicetree/bindings/iio/accel/bosch,bmi088.yaml @@ -24,8 +24,6 @@ properties: reg: maxItems: 1 - spi-max-frequency: true - vdd-supply: true vddio-supply: true @@ -50,7 +48,10 @@ required: - compatible - reg -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/accel/fsl,mma7455.yaml b/Documentation/devicetree/bindings/iio/accel/fsl,mma7455.yaml index 9c7c66feeffc..c8659c5eba2a 100644 --- a/Documentation/devicetree/bindings/iio/accel/fsl,mma7455.yaml +++ b/Documentation/devicetree/bindings/iio/accel/fsl,mma7455.yaml @@ -39,13 +39,14 @@ properties: - "INT1" - "INT2" - spi-max-frequency: true - required: - compatible - reg -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/accel/kionix,kxsd9.yaml b/Documentation/devicetree/bindings/iio/accel/kionix,kxsd9.yaml index 390b87242fcb..f64d99b35492 100644 --- a/Documentation/devicetree/bindings/iio/accel/kionix,kxsd9.yaml +++ b/Documentation/devicetree/bindings/iio/accel/kionix,kxsd9.yaml @@ -29,13 +29,14 @@ properties: mount-matrix: description: an optional 3x3 mounting rotation matrix. - spi-max-frequency: true - required: - compatible - reg -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/accel/memsensing,msa311.yaml b/Documentation/devicetree/bindings/iio/accel/memsensing,msa311.yaml new file mode 100644 index 000000000000..23528dcaa073 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/accel/memsensing,msa311.yaml @@ -0,0 +1,53 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause + +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/iio/accel/memsensing,msa311.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: MEMSensing digital 3-Axis accelerometer + +maintainers: + - Dmitry Rokosov <ddrokosov@sberdevices.ru> + +description: | + MSA311 is a tri-axial, low-g accelerometer with I2C digital output for + sensitivity consumer applications. It has dynamical user selectable full + scales range of +-2g/+-4g/+-8g/+-16g and allows acceleration measurements + with output data rates from 1Hz to 1000Hz. + Datasheet can be found at following URL + https://cdn-shop.adafruit.com/product-files/5309/MSA311-V1.1-ENG.pdf + +properties: + compatible: + const: memsensing,msa311 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + vdd-supply: true + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + i2c { + #address-cells = <1>; + #size-cells = <0>; + + accelerometer@62 { + compatible = "memsensing,msa311"; + reg = <0x62>; + interrupt-parent = <&gpio_intc>; + interrupts = <29 IRQ_TYPE_EDGE_RISING>; + vdd-supply = <&vcc_5v>; + }; + }; diff --git a/Documentation/devicetree/bindings/iio/accel/murata,sca3300.yaml b/Documentation/devicetree/bindings/iio/accel/murata,sca3300.yaml index f6e2a16a710b..00c990caa1e4 100644 --- a/Documentation/devicetree/bindings/iio/accel/murata,sca3300.yaml +++ b/Documentation/devicetree/bindings/iio/accel/murata,sca3300.yaml @@ -29,7 +29,10 @@ required: - compatible - reg -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/accel/nxp,fxls8962af.yaml b/Documentation/devicetree/bindings/iio/accel/nxp,fxls8962af.yaml index ad529ab2c6e2..65ce8ea14b52 100644 --- a/Documentation/devicetree/bindings/iio/accel/nxp,fxls8962af.yaml +++ b/Documentation/devicetree/bindings/iio/accel/nxp,fxls8962af.yaml @@ -27,8 +27,6 @@ properties: vdd-supply: description: phandle to the regulator that provides power to the accelerometer - spi-max-frequency: true - interrupts: maxItems: 1 @@ -44,7 +42,10 @@ required: - compatible - reg -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml index fb3d0dae9bae..75a7184a4735 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml @@ -52,8 +52,6 @@ properties: avdd-supply: description: avdd supply can be used as reference for conversion. - spi-max-frequency: true - required: - compatible - reg @@ -106,7 +104,10 @@ patternProperties: additionalProperties: false -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml index 22b7ed3723f6..cc347dade4ef 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml @@ -30,8 +30,6 @@ properties: spi-cpha: true - spi-max-frequency: true - clocks: maxItems: 1 description: phandle to the master clock (mclk) @@ -94,7 +92,10 @@ required: - spi-cpol - spi-cpha -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7280a.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7280a.yaml index a694d5794d4a..dfb8f305e2f0 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7280a.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7280a.yaml @@ -28,8 +28,6 @@ properties: description: IRQ line for the ADC maxItems: 1 - spi-max-frequency: true - adi,voltage-alert-last-chan: $ref: /schemas/types.yaml#/definitions/uint32 description: @@ -55,7 +53,10 @@ required: - compatible - reg -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7292.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7292.yaml index a3e39a40c9b3..1bfbeed6f299 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7292.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7292.yaml @@ -30,8 +30,6 @@ properties: spi-cpha: true - spi-max-frequency: true - '#address-cells': const: 1 @@ -65,7 +63,10 @@ patternProperties: additionalProperties: true -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7298.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7298.yaml index ca414bb396c5..cd8ac5162d27 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7298.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7298.yaml @@ -24,13 +24,15 @@ properties: vref-supply: true vdd-supply: true - spi-max-frequency: true required: - compatible - reg -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7476.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7476.yaml index 666414a9c0de..44c671eeda73 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7476.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7476.yaml @@ -66,8 +66,6 @@ properties: to the other supplies. Needed to be able to establish channel scaling unless there is also an internal reference available (e.g. ad7091r) - spi-max-frequency: true - adi,conversion-start-gpios: description: A GPIO used to trigger the start of a conversion maxItems: 1 @@ -76,9 +74,9 @@ required: - compatible - reg -additionalProperties: false - allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + # Devices where reference is vcc - if: properties: @@ -158,6 +156,8 @@ allOf: properties: adi,conversion-start-gpios: false +unevaluatedProperties: false + examples: - | spi { diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml index 516fc24d3346..ac5a47c8f070 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml @@ -32,8 +32,6 @@ properties: spi-cpol: true - spi-max-frequency: true - avcc-supply: true interrupts: @@ -105,7 +103,10 @@ required: - interrupts - adi,conversion-start-gpios -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7768-1.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7768-1.yaml index a85a28145ef6..3ce59d4d065f 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7768-1.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7768-1.yaml @@ -50,8 +50,6 @@ properties: reset-gpios: maxItems: 1 - spi-max-frequency: true - spi-cpol: true spi-cpha: true @@ -88,7 +86,10 @@ patternProperties: - reg additionalProperties: false -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7923.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7923.yaml index e82194974eea..07f9d1c09c7d 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7923.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7923.yaml @@ -8,7 +8,6 @@ title: Analog Devices AD7923 and similars with 4 and 8 Channel ADCs. maintainers: - Michael Hennerich <michael.hennerich@analog.com> - - Patrick Vasseur <patrick.vasseur@c-s.fr> description: | Analog Devices AD7904, AD7914, AD7923, AD7924 4 Channel ADCs, and AD7908, @@ -37,19 +36,24 @@ properties: description: | The regulator supply for ADC reference voltage. + adi,range-double: + description: Sets the analog input range from 0 to 2xVREF. + type: boolean + '#address-cells': const: 1 '#size-cells': const: 0 - spi-max-frequency: true - required: - compatible - reg -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7949.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7949.yaml index 0b10ed5f74ae..9ee4d977c5ed 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7949.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7949.yaml @@ -49,8 +49,6 @@ properties: default: 4096000 - spi-max-frequency: true - '#io-channel-cells': const: 1 @@ -64,7 +62,10 @@ required: - compatible - reg -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/adc/holt,hi8435.yaml b/Documentation/devicetree/bindings/iio/adc/holt,hi8435.yaml index 52490cbb0af0..56bcbe5dcd79 100644 --- a/Documentation/devicetree/bindings/iio/adc/holt,hi8435.yaml +++ b/Documentation/devicetree/bindings/iio/adc/holt,hi8435.yaml @@ -24,8 +24,6 @@ properties: GPIO used for controlling the reset pin maxItems: 1 - spi-max-frequency: true - "#io-channel-cells": const: 1 @@ -33,7 +31,10 @@ required: - compatible - reg -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/adc/lltc,ltc2496.yaml b/Documentation/devicetree/bindings/iio/adc/lltc,ltc2496.yaml index 0bd2fc0356c8..5207c919abe0 100644 --- a/Documentation/devicetree/bindings/iio/adc/lltc,ltc2496.yaml +++ b/Documentation/devicetree/bindings/iio/adc/lltc,ltc2496.yaml @@ -22,15 +22,15 @@ properties: reg: maxItems: 1 - spi-max-frequency: - description: maximal spi bus frequency supported - required: - compatible - vref-supply - reg -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/adc/lltc,ltc2497.yaml b/Documentation/devicetree/bindings/iio/adc/lltc,ltc2497.yaml index c1772b568cd1..875f394576c2 100644 --- a/Documentation/devicetree/bindings/iio/adc/lltc,ltc2497.yaml +++ b/Documentation/devicetree/bindings/iio/adc/lltc,ltc2497.yaml @@ -13,10 +13,14 @@ description: | 16bit ADC supporting up to 16 single ended or 8 differential inputs. I2C interface. + https://www.analog.com/media/en/technical-documentation/data-sheets/2497fb.pdf + https://www.analog.com/media/en/technical-documentation/data-sheets/2499fe.pdf + properties: compatible: - const: - lltc,ltc2497 + enum: + - lltc,ltc2497 + - lltc,ltc2499 reg: true vref-supply: true diff --git a/Documentation/devicetree/bindings/iio/adc/maxim,max1027.yaml b/Documentation/devicetree/bindings/iio/adc/maxim,max1027.yaml index 46b7747076b9..d0a7ed26d9ea 100644 --- a/Documentation/devicetree/bindings/iio/adc/maxim,max1027.yaml +++ b/Documentation/devicetree/bindings/iio/adc/maxim,max1027.yaml @@ -45,7 +45,10 @@ required: - compatible - reg -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/adc/maxim,max11100.yaml b/Documentation/devicetree/bindings/iio/adc/maxim,max11100.yaml index 0cf87556ef82..4f74cb33383a 100644 --- a/Documentation/devicetree/bindings/iio/adc/maxim,max11100.yaml +++ b/Documentation/devicetree/bindings/iio/adc/maxim,max11100.yaml @@ -26,13 +26,16 @@ properties: minimum: 100000 maximum: 4800000 -additionalProperties: false - required: - compatible - reg - vref-supply +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + examples: - | spi { diff --git a/Documentation/devicetree/bindings/iio/adc/maxim,max1118.yaml b/Documentation/devicetree/bindings/iio/adc/maxim,max1118.yaml index e948b3e37b0c..bb336e33ebe2 100644 --- a/Documentation/devicetree/bindings/iio/adc/maxim,max1118.yaml +++ b/Documentation/devicetree/bindings/iio/adc/maxim,max1118.yaml @@ -28,23 +28,25 @@ properties: vref-supply: description: External reference, needed to establish input scaling -if: - properties: - compatible: - contains: - const: maxim,max1118 -then: - required: - - vref-supply -else: - properties: - vref-supply: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + - if: + properties: + compatible: + contains: + const: maxim,max1118 + then: + required: + - vref-supply + else: + properties: + vref-supply: false required: - compatible - reg -additionalProperties: false +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/adc/maxim,max11205.yaml b/Documentation/devicetree/bindings/iio/adc/maxim,max11205.yaml new file mode 100644 index 000000000000..5f9e043cf5cd --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/maxim,max11205.yaml @@ -0,0 +1,69 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/maxim,max11205.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Maxim MAX11205 ADC + +maintainers: + - Ramona Bolboaca <ramona.bolboaca@analog.com> + +description: | + The MAX11205 is an ultra-low-power (< 300FA max active current), + high-resolution, serial-output ADC. + + https://datasheets.maximintegrated.com/en/ds/MAX11205.pdf + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +properties: + compatible: + enum: + - maxim,max11205a + - maxim,max11205b + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + spi-max-frequency: + maximum: 5000000 + + spi-cpha: true + + vref-supply: + description: + The regulator supply for the ADC reference voltage. This is a differential + reference. It is equal to the V_REFP - V_REFN. The maximum value is 3.6V. + +required: + - compatible + - reg + - interrupts + - spi-max-frequency + - spi-cpha + - vref-supply + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + spi { + #address-cells = <1>; + #size-cells = <0>; + adc@0 { + compatible = "maxim,max11205a"; + reg = <0>; + spi-max-frequency = <5000000>; + spi-cpha; + interrupt-parent = <&gpio>; + interrupts = <19 IRQ_TYPE_EDGE_FALLING>; + vref-supply = <&max11205_vref>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/iio/adc/maxim,max1241.yaml b/Documentation/devicetree/bindings/iio/adc/maxim,max1241.yaml index 4c7e0d94bff1..58b12fe8070c 100644 --- a/Documentation/devicetree/bindings/iio/adc/maxim,max1241.yaml +++ b/Documentation/devicetree/bindings/iio/adc/maxim,max1241.yaml @@ -39,15 +39,16 @@ properties: thus enabling power-down mode. maxItems: 1 - spi-max-frequency: true - required: - compatible - reg - vdd-supply - vref-supply -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/adc/microchip,mcp3201.yaml b/Documentation/devicetree/bindings/iio/adc/microchip,mcp3201.yaml index fcc1ba53b20d..18108f0f3731 100644 --- a/Documentation/devicetree/bindings/iio/adc/microchip,mcp3201.yaml +++ b/Documentation/devicetree/bindings/iio/adc/microchip,mcp3201.yaml @@ -32,7 +32,6 @@ properties: reg: maxItems: 1 - spi-max-frequency: true spi-cpha: true spi-cpol: true @@ -51,7 +50,10 @@ required: - reg - vref-supply -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/adc/microchip,mcp3911.yaml b/Documentation/devicetree/bindings/iio/adc/microchip,mcp3911.yaml index 95ab285f4eba..2c93fb41f172 100644 --- a/Documentation/devicetree/bindings/iio/adc/microchip,mcp3911.yaml +++ b/Documentation/devicetree/bindings/iio/adc/microchip,mcp3911.yaml @@ -36,6 +36,13 @@ properties: description: IRQ line of the ADC maxItems: 1 + microchip,data-ready-hiz: + description: + Data Ready Pin Inactive State Control + true = The DR pin state is high-impedance + false = The DR pin state is logic high + type: boolean + microchip,device-addr: description: Device address when multiple MCP3911 chips are present on the same SPI bus. $ref: /schemas/types.yaml#/definitions/uint32 @@ -51,7 +58,10 @@ required: - compatible - reg -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.yaml b/Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.yaml index 74a4a9d95798..8bac0c4120dd 100644 --- a/Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.yaml +++ b/Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.yaml @@ -58,6 +58,7 @@ required: patternProperties: "^.*@[0-9a-f]+$": type: object + additionalProperties: false description: | Represents the external channels which are connected to the ADC. For compatible property "qcom,spmi-vadc" following channels, also known as diff --git a/Documentation/devicetree/bindings/iio/adc/richtek,rtq6056.yaml b/Documentation/devicetree/bindings/iio/adc/richtek,rtq6056.yaml new file mode 100644 index 000000000000..88e008629ea8 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/richtek,rtq6056.yaml @@ -0,0 +1,56 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/richtek,rtq6056.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: RTQ6056 Bi-Directional Current and Power Monitor with 16-bit ADC + +maintainers: + - ChiYuan Huang <cy_huang@richtek.com> + +description: | + The RTQ6056 is a high accuracy current-sense monitor with I2C and SMBus + interface, and the device provides full information for system by reading + out the loading current and power. + + The device monitors both of the drops across sense resistor and the BUS + voltage, converts into the current in amperes, and power in watts through + internal analog-to-digital converter ADC. The programmable calibration, + adjustable conversion time, and averaging function are also built in for + more design flexibility. + + Datasheet is available at + https://www.richtek.com/assets/product_file/RTQ6056/DSQ6056-00.pdf + +properties: + compatible: + const: richtek,rtq6056 + + reg: + maxItems: 1 + + "#io-channel-cells": + const: 1 + + shunt-resistor-micro-ohms: + description: Shunt IN+/IN- sensing node resistor + +required: + - compatible + - reg + - "#io-channel-cells" + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + adc@40 { + compatible = "richtek,rtq6056"; + reg = <0x40>; + #io-channel-cells = <1>; + }; + }; diff --git a/Documentation/devicetree/bindings/iio/adc/st,stm32-dfsdm-adc.yaml b/Documentation/devicetree/bindings/iio/adc/st,stm32-dfsdm-adc.yaml index 92f9472a77ae..1970503389aa 100644 --- a/Documentation/devicetree/bindings/iio/adc/st,stm32-dfsdm-adc.yaml +++ b/Documentation/devicetree/bindings/iio/adc/st,stm32-dfsdm-adc.yaml @@ -72,6 +72,7 @@ additionalProperties: false patternProperties: "^filter@[0-9]+$": type: object + unevaluatedProperties: false description: child node properties: @@ -225,6 +226,7 @@ patternProperties: patternProperties: "^dfsdm-dai+$": type: object + additionalProperties: false description: child node properties: diff --git a/Documentation/devicetree/bindings/iio/adc/st,stmpe-adc.yaml b/Documentation/devicetree/bindings/iio/adc/st,stmpe-adc.yaml index 9049c699152f..333744a2159c 100644 --- a/Documentation/devicetree/bindings/iio/adc/st,stmpe-adc.yaml +++ b/Documentation/devicetree/bindings/iio/adc/st,stmpe-adc.yaml @@ -13,8 +13,7 @@ description: This ADC forms part of an ST microelectronics STMPE multifunction device . The ADC is shared with the STMPE touchscreen. As a result some ADC related settings are specified in the parent node. - The node name myst be stmpe_adc and should be a child node of the stmpe node - to which it belongs. + The node should be a child node of the stmpe node to which it belongs. properties: compatible: diff --git a/Documentation/devicetree/bindings/iio/adc/ti,adc0832.yaml b/Documentation/devicetree/bindings/iio/adc/ti,adc0832.yaml index f5a923cc847f..686721176a58 100644 --- a/Documentation/devicetree/bindings/iio/adc/ti,adc0832.yaml +++ b/Documentation/devicetree/bindings/iio/adc/ti,adc0832.yaml @@ -24,8 +24,6 @@ properties: reg: maxItems: 1 - spi-max-frequency: true - vref-supply: description: External reference, needed to establish input scaling @@ -37,7 +35,10 @@ required: - reg - vref-supply -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/adc/ti,adc084s021.yaml b/Documentation/devicetree/bindings/iio/adc/ti,adc084s021.yaml index 1a113b30a414..726d2cbfa368 100644 --- a/Documentation/devicetree/bindings/iio/adc/ti,adc084s021.yaml +++ b/Documentation/devicetree/bindings/iio/adc/ti,adc084s021.yaml @@ -19,8 +19,6 @@ properties: reg: maxItems: 1 - spi-max-frequency: true - vref-supply: description: External reference, needed to establish input scaling @@ -37,7 +35,10 @@ required: - spi-cpol - spi-cpha -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/adc/ti,adc108s102.yaml b/Documentation/devicetree/bindings/iio/adc/ti,adc108s102.yaml index ae5ce60987fe..9b072b057f16 100644 --- a/Documentation/devicetree/bindings/iio/adc/ti,adc108s102.yaml +++ b/Documentation/devicetree/bindings/iio/adc/ti,adc108s102.yaml @@ -19,7 +19,6 @@ properties: reg: true vref-supply: true - spi-max-frequency: true "#io-channel-cells": const: 1 @@ -28,7 +27,10 @@ required: - reg - vref-supply -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/adc/ti,adc12138.yaml b/Documentation/devicetree/bindings/iio/adc/ti,adc12138.yaml index ec3b2edf1fb7..076088a328c3 100644 --- a/Documentation/devicetree/bindings/iio/adc/ti,adc12138.yaml +++ b/Documentation/devicetree/bindings/iio/adc/ti,adc12138.yaml @@ -31,8 +31,6 @@ properties: maxItems: 1 description: Conversion clock input. - spi-max-frequency: true - vref-p-supply: description: The regulator supply for positive analog voltage reference @@ -62,7 +60,10 @@ required: - clocks - vref-p-supply -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/adc/ti,adc128s052.yaml b/Documentation/devicetree/bindings/iio/adc/ti,adc128s052.yaml index d54a0183f024..775eee972b12 100644 --- a/Documentation/devicetree/bindings/iio/adc/ti,adc128s052.yaml +++ b/Documentation/devicetree/bindings/iio/adc/ti,adc128s052.yaml @@ -27,8 +27,6 @@ properties: reg: maxItems: 1 - spi-max-frequency: true - vref-supply: true "#io-channel-cells": @@ -39,7 +37,10 @@ required: - reg - vref-supply -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/adc/ti,adc161s626.yaml b/Documentation/devicetree/bindings/iio/adc/ti,adc161s626.yaml index 3f4f334d6f73..afe782522904 100644 --- a/Documentation/devicetree/bindings/iio/adc/ti,adc161s626.yaml +++ b/Documentation/devicetree/bindings/iio/adc/ti,adc161s626.yaml @@ -21,8 +21,6 @@ properties: reg: maxItems: 1 - spi-max-frequency: true - vdda-supply: true "#io-channel-cells": @@ -32,7 +30,10 @@ required: - compatible - reg -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/adc/ti,ads1015.yaml b/Documentation/devicetree/bindings/iio/adc/ti,ads1015.yaml index a3b79438a13a..2c3c2cf2145c 100644 --- a/Documentation/devicetree/bindings/iio/adc/ti,ads1015.yaml +++ b/Documentation/devicetree/bindings/iio/adc/ti,ads1015.yaml @@ -43,6 +43,7 @@ additionalProperties: false patternProperties: "^channel@[0-7]+$": type: object + additionalProperties: false description: Child nodes needed for each channel that the platform uses. diff --git a/Documentation/devicetree/bindings/iio/adc/ti,ads124s08.yaml b/Documentation/devicetree/bindings/iio/adc/ti,ads124s08.yaml index 2e6abc9d746a..56a3f1766aab 100644 --- a/Documentation/devicetree/bindings/iio/adc/ti,ads124s08.yaml +++ b/Documentation/devicetree/bindings/iio/adc/ti,ads124s08.yaml @@ -18,8 +18,6 @@ properties: reg: maxItems: 1 - spi-max-frequency: true - spi-cpha: true reset-gpios: @@ -32,7 +30,10 @@ required: - compatible - reg -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/adc/ti,ads131e08.yaml b/Documentation/devicetree/bindings/iio/adc/ti,ads131e08.yaml index e0670e3fbb72..55c2c73626f4 100644 --- a/Documentation/devicetree/bindings/iio/adc/ti,ads131e08.yaml +++ b/Documentation/devicetree/bindings/iio/adc/ti,ads131e08.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Texas Instruments ADS131E0x 4-, 6- and 8-Channel ADCs maintainers: - - Tomislav Denis <tomislav.denis@avl.com> + - Jonathan Cameron <jic23@kernel.org> description: | The ADS131E0x are a family of multichannel, simultaneous sampling, @@ -28,8 +28,6 @@ properties: reg: maxItems: 1 - spi-max-frequency: true - spi-cpha: true clocks: @@ -120,7 +118,10 @@ patternProperties: additionalProperties: false -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/adc/ti,ads8344.yaml b/Documentation/devicetree/bindings/iio/adc/ti,ads8344.yaml index b8c398187d5c..f75b2c702986 100644 --- a/Documentation/devicetree/bindings/iio/adc/ti,ads8344.yaml +++ b/Documentation/devicetree/bindings/iio/adc/ti,ads8344.yaml @@ -19,8 +19,6 @@ properties: reg: maxItems: 1 - spi-max-frequency: true - vref-supply: description: Supply the 2.5V or 5V reference voltage @@ -32,7 +30,10 @@ required: - reg - vref-supply -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/adc/ti,ads8688.yaml b/Documentation/devicetree/bindings/iio/adc/ti,ads8688.yaml index a0af4b24877f..f26fdbc15f84 100644 --- a/Documentation/devicetree/bindings/iio/adc/ti,ads8688.yaml +++ b/Documentation/devicetree/bindings/iio/adc/ti,ads8688.yaml @@ -25,13 +25,14 @@ properties: description: Optional external reference. If not supplied, assume REFSEL input tied low to enable the internal reference. - spi-max-frequency: true - required: - compatible - reg -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/adc/ti,am3359-adc.yaml b/Documentation/devicetree/bindings/iio/adc/ti,am3359-adc.yaml index d6f21d5cccd7..b32be24a9f98 100644 --- a/Documentation/devicetree/bindings/iio/adc/ti,am3359-adc.yaml +++ b/Documentation/devicetree/bindings/iio/adc/ti,am3359-adc.yaml @@ -11,9 +11,14 @@ maintainers: properties: compatible: - enum: - - ti,am3359-adc - - ti,am4372-adc + oneOf: + - enum: + - ti,am3359-adc + - ti,am4372-adc + - items: + - enum: + - ti,am654-adc + - const: ti,am3359-adc '#io-channel-cells': const: 1 diff --git a/Documentation/devicetree/bindings/iio/adc/ti,tlc4541.yaml b/Documentation/devicetree/bindings/iio/adc/ti,tlc4541.yaml index 6c2539b3d707..314d1d99bf73 100644 --- a/Documentation/devicetree/bindings/iio/adc/ti,tlc4541.yaml +++ b/Documentation/devicetree/bindings/iio/adc/ti,tlc4541.yaml @@ -21,8 +21,6 @@ properties: reg: maxItems: 1 - spi-max-frequency: true - vref-supply: true "#io-channel-cells": @@ -33,7 +31,10 @@ required: - reg - vref-supply -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/adc/ti,tsc2046.yaml b/Documentation/devicetree/bindings/iio/adc/ti,tsc2046.yaml index 601d69971d84..bdf3bba2d750 100644 --- a/Documentation/devicetree/bindings/iio/adc/ti,tsc2046.yaml +++ b/Documentation/devicetree/bindings/iio/adc/ti,tsc2046.yaml @@ -23,7 +23,8 @@ properties: interrupts: maxItems: 1 - spi-max-frequency: true + vref-supply: + description: Optional supply of the reference voltage "#io-channel-cells": const: 1 @@ -59,7 +60,10 @@ patternProperties: additionalProperties: false -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/adc/xlnx,zynqmp-ams.yaml b/Documentation/devicetree/bindings/iio/adc/xlnx,zynqmp-ams.yaml index 3698b4b0900f..be93c109d6ac 100644 --- a/Documentation/devicetree/bindings/iio/adc/xlnx,zynqmp-ams.yaml +++ b/Documentation/devicetree/bindings/iio/adc/xlnx,zynqmp-ams.yaml @@ -134,6 +134,7 @@ properties: ams-pl@400: type: object + additionalProperties: false description: PL-SYSMON is capable of monitoring off chip voltage and temperature. PL-SYSMON block has DRP, JTAG and I2C interface to enable monitoring diff --git a/Documentation/devicetree/bindings/iio/addac/adi,ad74413r.yaml b/Documentation/devicetree/bindings/iio/addac/adi,ad74413r.yaml index baa65a521bad..03bb90a7f4f8 100644 --- a/Documentation/devicetree/bindings/iio/addac/adi,ad74413r.yaml +++ b/Documentation/devicetree/bindings/iio/addac/adi,ad74413r.yaml @@ -63,6 +63,7 @@ additionalProperties: false patternProperties: "^channel@[0-3]$": type: object + additionalProperties: false description: Represents the external channels which are connected to the device. properties: diff --git a/Documentation/devicetree/bindings/iio/amplifiers/adi,ada4250.yaml b/Documentation/devicetree/bindings/iio/amplifiers/adi,ada4250.yaml index 5277479be382..c15da155d300 100644 --- a/Documentation/devicetree/bindings/iio/amplifiers/adi,ada4250.yaml +++ b/Documentation/devicetree/bindings/iio/amplifiers/adi,ada4250.yaml @@ -27,14 +27,15 @@ properties: Enable internal buffer to drive the reference pin. type: boolean - spi-max-frequency: true - required: - compatible - reg - avdd-supply -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/dac/adi,ad3552r.yaml b/Documentation/devicetree/bindings/iio/dac/adi,ad3552r.yaml index 9c48c76993fe..fee0f023a8c8 100644 --- a/Documentation/devicetree/bindings/iio/dac/adi,ad3552r.yaml +++ b/Documentation/devicetree/bindings/iio/dac/adi,ad3552r.yaml @@ -78,6 +78,7 @@ patternProperties: custom-output-range-config: type: object + additionalProperties: false description: Configuration of custom range when adi,output-range-microvolt is not present. The formulas for calculation the output voltages are diff --git a/Documentation/devicetree/bindings/iio/dac/adi,ad5064.yaml b/Documentation/devicetree/bindings/iio/dac/adi,ad5064.yaml index 05ed4e0ec364..c04165fa9259 100644 --- a/Documentation/devicetree/bindings/iio/dac/adi,ad5064.yaml +++ b/Documentation/devicetree/bindings/iio/dac/adi,ad5064.yaml @@ -95,15 +95,12 @@ properties: vrefD-supply: true vref-supply: true - spi-max-frequency: true - -additionalProperties: false - required: - compatible - reg allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# - # Shared external vref, no internal reference if: properties: @@ -232,6 +229,8 @@ allOf: - vrefA-supply - vrefB-supply +unevaluatedProperties: false + examples: - | spi { diff --git a/Documentation/devicetree/bindings/iio/dac/adi,ad5360.yaml b/Documentation/devicetree/bindings/iio/dac/adi,ad5360.yaml index 65f86f26947c..86e2884cdfb1 100644 --- a/Documentation/devicetree/bindings/iio/dac/adi,ad5360.yaml +++ b/Documentation/devicetree/bindings/iio/dac/adi,ad5360.yaml @@ -28,10 +28,6 @@ properties: vref1-supply: true vref2-supply: true - spi-max-frequency: true - -additionalProperties: false - required: - compatible - reg @@ -39,6 +35,7 @@ required: - vref1-supply allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# - if: properties: compatible: @@ -63,6 +60,8 @@ allOf: required: - vref2-supply +unevaluatedProperties: false + examples: - | spi { diff --git a/Documentation/devicetree/bindings/iio/dac/adi,ad5380.yaml b/Documentation/devicetree/bindings/iio/dac/adi,ad5380.yaml index d599b418a020..ff50c72c62b5 100644 --- a/Documentation/devicetree/bindings/iio/dac/adi,ad5380.yaml +++ b/Documentation/devicetree/bindings/iio/dac/adi,ad5380.yaml @@ -39,14 +39,15 @@ properties: description: If not supplied devices will use internal regulators. - spi-max-frequency: true - -additionalProperties: false - required: - compatible - reg +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + examples: - | spi { diff --git a/Documentation/devicetree/bindings/iio/dac/adi,ad5421.yaml b/Documentation/devicetree/bindings/iio/dac/adi,ad5421.yaml index 188f656617e3..52d089ebde95 100644 --- a/Documentation/devicetree/bindings/iio/dac/adi,ad5421.yaml +++ b/Documentation/devicetree/bindings/iio/dac/adi,ad5421.yaml @@ -26,13 +26,14 @@ properties: maxItems: 1 description: Fault signal. - spi-max-frequency: true - required: - compatible - reg -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/dac/adi,ad5449.yaml b/Documentation/devicetree/bindings/iio/dac/adi,ad5449.yaml index 044332c97743..d2af2d491986 100644 --- a/Documentation/devicetree/bindings/iio/dac/adi,ad5449.yaml +++ b/Documentation/devicetree/bindings/iio/dac/adi,ad5449.yaml @@ -27,19 +27,16 @@ properties: reg: maxItems: 1 - spi-max-frequency: true - VREF-supply: true VREFA-supply: true VREFB-supply: true -additionalProperties: false - required: - compatible - reg allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# - if: properties: compatible: @@ -72,6 +69,8 @@ allOf: - VREFA-supply - VREFB-supply +unevaluatedProperties: false + examples: - | spi { diff --git a/Documentation/devicetree/bindings/iio/dac/adi,ad5624r.yaml b/Documentation/devicetree/bindings/iio/dac/adi,ad5624r.yaml index 330383b85eeb..4d5111a5f9bd 100644 --- a/Documentation/devicetree/bindings/iio/dac/adi,ad5624r.yaml +++ b/Documentation/devicetree/bindings/iio/dac/adi,ad5624r.yaml @@ -22,17 +22,18 @@ properties: reg: maxItems: 1 - spi-max-frequency: true - vref-supply: description: If not present, internal reference will be used. -additionalProperties: false - required: - compatible - reg +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + examples: - | spi { diff --git a/Documentation/devicetree/bindings/iio/dac/adi,ad5686.yaml b/Documentation/devicetree/bindings/iio/dac/adi,ad5686.yaml index 5c26441eae9f..13f214234b8e 100644 --- a/Documentation/devicetree/bindings/iio/dac/adi,ad5686.yaml +++ b/Documentation/devicetree/bindings/iio/dac/adi,ad5686.yaml @@ -53,14 +53,15 @@ properties: vcc-supply: description: If not supplied the internal reference is used. - spi-max-frequency: true - -additionalProperties: false - required: - compatible - reg +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + examples: - | spi { diff --git a/Documentation/devicetree/bindings/iio/dac/adi,ad5755.yaml b/Documentation/devicetree/bindings/iio/dac/adi,ad5755.yaml index f866b88e1440..9a3c2926bf85 100644 --- a/Documentation/devicetree/bindings/iio/dac/adi,ad5755.yaml +++ b/Documentation/devicetree/bindings/iio/dac/adi,ad5755.yaml @@ -25,8 +25,6 @@ properties: description: Either this or spi-cpol but not both. spi-cpol: true - spi-max-frequency: true - adi,ext-dc-dc-compenstation-resistor: $ref: /schemas/types.yaml#/definitions/flag description: @@ -67,8 +65,6 @@ required: - compatible - reg -additionalProperties: false - patternProperties: "^channel@[0-7]$": type: object @@ -123,6 +119,11 @@ oneOf: - required: - spi-cpol +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + examples: - | spi { diff --git a/Documentation/devicetree/bindings/iio/dac/adi,ad5758.yaml b/Documentation/devicetree/bindings/iio/dac/adi,ad5758.yaml index fd4edca34a28..e49e7556175d 100644 --- a/Documentation/devicetree/bindings/iio/dac/adi,ad5758.yaml +++ b/Documentation/devicetree/bindings/iio/dac/adi,ad5758.yaml @@ -16,7 +16,6 @@ properties: reg: maxItems: 1 - spi-max-frequency: true spi-cpha: true adi,dc-dc-mode: @@ -99,6 +98,7 @@ required: - adi,dc-dc-mode allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# - if: properties: adi,dc-dc-mode: @@ -115,7 +115,7 @@ allOf: required: - adi,range-microvolt -additionalProperties: false +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/dac/adi,ad5761.yaml b/Documentation/devicetree/bindings/iio/dac/adi,ad5761.yaml index 7f95a9ed55fe..df550b5af2f7 100644 --- a/Documentation/devicetree/bindings/iio/dac/adi,ad5761.yaml +++ b/Documentation/devicetree/bindings/iio/dac/adi,ad5761.yaml @@ -22,18 +22,15 @@ properties: reg: maxItems: 1 - spi-max-frequency: true - vref-supply: description: If not supplied, internal reference will be used. -additionalProperties: false - required: - compatible - reg allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# - if: properties: compatible: @@ -45,6 +42,8 @@ allOf: required: - vref-supply +unevaluatedProperties: false + examples: - | spi { diff --git a/Documentation/devicetree/bindings/iio/dac/adi,ad5764.yaml b/Documentation/devicetree/bindings/iio/dac/adi,ad5764.yaml index 8e893d52bfb1..0b409a727a43 100644 --- a/Documentation/devicetree/bindings/iio/dac/adi,ad5764.yaml +++ b/Documentation/devicetree/bindings/iio/dac/adi,ad5764.yaml @@ -22,18 +22,15 @@ properties: reg: maxItems: 1 - spi-max-frequency: true - vrefAB-supply: true vrefCD-supply: true -additionalProperties: false - required: - compatible - reg allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# - if: properties: compatible: @@ -46,6 +43,8 @@ allOf: - vrefAB-supply - vrefCD-supply +unevaluatedProperties: false + examples: - | spi { diff --git a/Documentation/devicetree/bindings/iio/dac/adi,ad5770r.yaml b/Documentation/devicetree/bindings/iio/dac/adi,ad5770r.yaml index 24ac40180ac1..8e7da0de918f 100644 --- a/Documentation/devicetree/bindings/iio/dac/adi,ad5770r.yaml +++ b/Documentation/devicetree/bindings/iio/dac/adi,ad5770r.yaml @@ -49,8 +49,6 @@ properties: asserted during driver probe. maxItems: 1 - spi-max-frequency: true - '#address-cells': const: 1 @@ -62,6 +60,7 @@ properties: connected to the DAC. Channel 0 can act both as a current source and sink. type: object + additionalProperties: false properties: reg: @@ -85,6 +84,7 @@ properties: description: Represents an external channel which are connected to the DAC. type: object + additionalProperties: false properties: reg: @@ -101,6 +101,7 @@ properties: description: Represents an external channel which are connected to the DAC. type: object + additionalProperties: false properties: reg: @@ -116,6 +117,7 @@ properties: patternProperties: "^channel@([3-5])$": type: object + additionalProperties: false description: Represents the external channels which are connected to the DAC. properties: reg: @@ -138,7 +140,10 @@ required: - channel@4 - channel@5 -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/dac/adi,ad5791.yaml b/Documentation/devicetree/bindings/iio/dac/adi,ad5791.yaml index 650d1ebdcec3..3a84739736f6 100644 --- a/Documentation/devicetree/bindings/iio/dac/adi,ad5791.yaml +++ b/Documentation/devicetree/bindings/iio/dac/adi,ad5791.yaml @@ -23,19 +23,20 @@ properties: reg: maxItems: 1 - spi-max-frequency: true - vdd-supply: true vss-supply: true -additionalProperties: false - required: - compatible - reg - vdd-supply - vss-supply +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + examples: - | spi { diff --git a/Documentation/devicetree/bindings/iio/dac/adi,ad8801.yaml b/Documentation/devicetree/bindings/iio/dac/adi,ad8801.yaml index 6a3990a8d0ad..1849a2ff05c7 100644 --- a/Documentation/devicetree/bindings/iio/dac/adi,ad8801.yaml +++ b/Documentation/devicetree/bindings/iio/dac/adi,ad8801.yaml @@ -19,19 +19,16 @@ properties: reg: maxItems: 1 - spi-max-frequency: true - vrefh-supply: true vrefl-supply: true -additionalProperties: false - required: - compatible - reg - vrefh-supply allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# - if: properties: compatible: @@ -44,6 +41,8 @@ allOf: properties: vrefl-supply: false +unevaluatedProperties: false + examples: - | spi { diff --git a/Documentation/devicetree/bindings/iio/dac/adi,ltc2688.yaml b/Documentation/devicetree/bindings/iio/dac/adi,ltc2688.yaml index 48f9e7d29423..15cc6bf59b13 100644 --- a/Documentation/devicetree/bindings/iio/dac/adi,ltc2688.yaml +++ b/Documentation/devicetree/bindings/iio/dac/adi,ltc2688.yaml @@ -48,6 +48,7 @@ properties: patternProperties: "^channel@([0-9]|1[0-5])$": type: object + additionalProperties: false properties: reg: diff --git a/Documentation/devicetree/bindings/iio/dac/microchip,mcp4922.yaml b/Documentation/devicetree/bindings/iio/dac/microchip,mcp4922.yaml index 4c430abcdbf9..19374401e509 100644 --- a/Documentation/devicetree/bindings/iio/dac/microchip,mcp4922.yaml +++ b/Documentation/devicetree/bindings/iio/dac/microchip,mcp4922.yaml @@ -21,17 +21,18 @@ properties: reg: maxItems: 1 - spi-max-frequency: true - vref-supply: true -additionalProperties: false - required: - compatible - reg - vref-supply +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + examples: - | spi { diff --git a/Documentation/devicetree/bindings/iio/dac/ti,dac082s085.yaml b/Documentation/devicetree/bindings/iio/dac/ti,dac082s085.yaml index b0157050f1ee..201b04af2b22 100644 --- a/Documentation/devicetree/bindings/iio/dac/ti,dac082s085.yaml +++ b/Documentation/devicetree/bindings/iio/dac/ti,dac082s085.yaml @@ -33,21 +33,22 @@ properties: vref-supply: description: Needed to provide output scaling. - spi-max-frequency: true - required: - compatible - reg - vref-supply -additionalProperties: false - oneOf: - required: - spi-cpha - required: - spi-cpol +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + examples: - | vref_2v5_reg: regulator-vref { diff --git a/Documentation/devicetree/bindings/iio/dac/ti,dac7311.yaml b/Documentation/devicetree/bindings/iio/dac/ti,dac7311.yaml index 10be98d1f19c..a6814587dbc4 100644 --- a/Documentation/devicetree/bindings/iio/dac/ti,dac7311.yaml +++ b/Documentation/devicetree/bindings/iio/dac/ti,dac7311.yaml @@ -24,14 +24,15 @@ properties: Reference voltage must be supplied to establish the scaling of the output voltage. - spi-max-frequency: true - required: - compatible - reg - vref-supply -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/dac/ti,dac7612.yaml b/Documentation/devicetree/bindings/iio/dac/ti,dac7612.yaml index d172b142f6ed..20dd1370660d 100644 --- a/Documentation/devicetree/bindings/iio/dac/ti,dac7612.yaml +++ b/Documentation/devicetree/bindings/iio/dac/ti,dac7612.yaml @@ -29,13 +29,14 @@ properties: DACs are loaded when the pin connected to this GPIO is pulled low. maxItems: 1 - spi-max-frequency: true - required: - compatible - reg -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml b/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml index 6b3a611e1cf1..0144f74a4768 100644 --- a/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml +++ b/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml @@ -40,15 +40,16 @@ properties: output stage will shut down until the ADF4371/ADF4372 achieves lock as measured by the digital lock detect circuitry. - spi-max-frequency: true - required: - compatible - reg - clocks - clock-names -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/health/ti,afe4403.yaml b/Documentation/devicetree/bindings/iio/health/ti,afe4403.yaml index d861526c5c42..6c5ad426a016 100644 --- a/Documentation/devicetree/bindings/iio/health/ti,afe4403.yaml +++ b/Documentation/devicetree/bindings/iio/health/ti,afe4403.yaml @@ -25,14 +25,15 @@ properties: reset-gpios: true - spi-max-frequency: true - -additionalProperties: false - required: - compatible - reg +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + examples: - | #include <dt-bindings/gpio/gpio.h> diff --git a/Documentation/devicetree/bindings/iio/imu/adi,adis16460.yaml b/Documentation/devicetree/bindings/iio/imu/adi,adis16460.yaml index 340be256f283..d166dbca18c3 100644 --- a/Documentation/devicetree/bindings/iio/imu/adi,adis16460.yaml +++ b/Documentation/devicetree/bindings/iio/imu/adi,adis16460.yaml @@ -25,8 +25,6 @@ properties: spi-cpol: true - spi-max-frequency: true - interrupts: maxItems: 1 @@ -35,7 +33,10 @@ required: - reg - interrupts -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/imu/adi,adis16480.yaml b/Documentation/devicetree/bindings/iio/imu/adi,adis16480.yaml index dd29dc6c4c19..56e0dc20f5e4 100644 --- a/Documentation/devicetree/bindings/iio/imu/adi,adis16480.yaml +++ b/Documentation/devicetree/bindings/iio/imu/adi,adis16480.yaml @@ -47,8 +47,6 @@ properties: - DIO3 - DIO4 - spi-max-frequency: true - spi-cpha: true spi-cpol: true @@ -96,8 +94,6 @@ properties: - DIO3 - DIO4 -additionalProperties: false - required: - compatible - reg @@ -106,6 +102,11 @@ required: - spi-cpol - spi-max-frequency +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + examples: - | #include <dt-bindings/interrupt-controller/irq.h> diff --git a/Documentation/devicetree/bindings/iio/imu/bosch,bmi160.yaml b/Documentation/devicetree/bindings/iio/imu/bosch,bmi160.yaml index 6e73cd889b5c..a0760382548d 100644 --- a/Documentation/devicetree/bindings/iio/imu/bosch,bmi160.yaml +++ b/Documentation/devicetree/bindings/iio/imu/bosch,bmi160.yaml @@ -46,13 +46,14 @@ properties: mount-matrix: description: an optional 3x3 mounting rotation matrix - spi-max-frequency: true - required: - compatible - reg -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/imu/bosch,bno055.yaml b/Documentation/devicetree/bindings/iio/imu/bosch,bno055.yaml new file mode 100644 index 000000000000..e0d06db161a9 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/imu/bosch,bno055.yaml @@ -0,0 +1,59 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/imu/bosch,bno055.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Bosch BNO055 + +maintainers: + - Andrea Merello <andrea.merello@iit.it> + +description: | + Inertial Measurement Unit with Accelerometer, Gyroscope, Magnetometer and + internal MCU for sensor fusion + https://www.bosch-sensortec.com/products/smart-sensors/bno055/ + +properties: + compatible: + enum: + - bosch,bno055 + + reg: + maxItems: 1 + + reset-gpios: + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + +additionalProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + serial { + imu { + compatible = "bosch,bno055"; + reset-gpios = <&gpio0 54 GPIO_ACTIVE_LOW>; + clocks = <&imu_clk>; + }; + }; + + - | + #include <dt-bindings/gpio/gpio.h> + i2c { + #address-cells = <1>; + #size-cells = <0>; + + imu@28 { + compatible = "bosch,bno055"; + reg = <0x28>; + reset-gpios = <&gpio0 54 GPIO_ACTIVE_LOW>; + clocks = <&imu_clk>; + }; + }; diff --git a/Documentation/devicetree/bindings/iio/imu/invensense,icm42600.yaml b/Documentation/devicetree/bindings/iio/imu/invensense,icm42600.yaml index 4c1c083d0e92..488349755c99 100644 --- a/Documentation/devicetree/bindings/iio/imu/invensense,icm42600.yaml +++ b/Documentation/devicetree/bindings/iio/imu/invensense,icm42600.yaml @@ -47,7 +47,6 @@ properties: vddio-supply: description: Regulator that provides power to the bus - spi-max-frequency: true spi-cpha: true spi-cpol: true @@ -56,7 +55,10 @@ required: - reg - interrupts -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/imu/invensense,mpu6050.yaml b/Documentation/devicetree/bindings/iio/imu/invensense,mpu6050.yaml index 3ebc6526d82d..ec64d7877fe5 100644 --- a/Documentation/devicetree/bindings/iio/imu/invensense,mpu6050.yaml +++ b/Documentation/devicetree/bindings/iio/imu/invensense,mpu6050.yaml @@ -40,8 +40,6 @@ properties: interrupts: maxItems: 1 - spi-max-frequency: true - vdd-supply: true vddio-supply: true @@ -54,6 +52,7 @@ properties: These devices also support an auxiliary i2c bus via an i2c-gate. allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# - if: not: properties: @@ -67,7 +66,7 @@ allOf: properties: i2c-gate: false -additionalProperties: false +unevaluatedProperties: false required: - compatible diff --git a/Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml b/Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml index 0203b83b8587..24416b59b782 100644 --- a/Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml +++ b/Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml @@ -36,13 +36,14 @@ properties: drive-open-drain: type: boolean - spi-max-frequency: true - required: - compatible - reg -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/imu/st,lsm6dsx.yaml b/Documentation/devicetree/bindings/iio/imu/st,lsm6dsx.yaml index 5d4839f00898..fe1e02e5d7b3 100644 --- a/Documentation/devicetree/bindings/iio/imu/st,lsm6dsx.yaml +++ b/Documentation/devicetree/bindings/iio/imu/st,lsm6dsx.yaml @@ -35,6 +35,9 @@ properties: - items: - const: st,asm330lhhx - const: st,lsm6dsr + - items: + - const: st,lsm6dstx + - const: st,lsm6dst reg: maxItems: 1 @@ -45,8 +48,6 @@ properties: description: Supports up to 2 interrupt lines via the INT1 and INT2 pins. - spi-max-frequency: true - vdd-supply: description: if defined provides VDD power to the sensor. @@ -81,12 +82,15 @@ properties: wakeup-source: $ref: /schemas/types.yaml#/definitions/flag -additionalProperties: false - required: - compatible - reg +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + examples: - | #include <dt-bindings/interrupt-controller/irq.h> diff --git a/Documentation/devicetree/bindings/iio/light/liteon,ltrf216a.yaml b/Documentation/devicetree/bindings/iio/light/liteon,ltrf216a.yaml new file mode 100644 index 000000000000..7de1b0e721ca --- /dev/null +++ b/Documentation/devicetree/bindings/iio/light/liteon,ltrf216a.yaml @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/light/liteon,ltrf216a.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: LTRF216A Ambient Light Sensor + +maintainers: + - Shreeya Patel <shreeya.patel@collabora.com> + +description: + Ambient light sensing with an i2c interface. + +properties: + compatible: + const: liteon,ltrf216a + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + vdd-supply: + description: Regulator that provides power to the sensor. + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + light-sensor@53 { + compatible = "liteon,ltrf216a"; + reg = <0x53>; + vdd-supply = <&vdd_regulator>; + interrupt-parent = <&gpio0>; + interrupts = <5 IRQ_TYPE_LEVEL_LOW>; + }; + }; diff --git a/Documentation/devicetree/bindings/iio/potentiometer/microchip,mcp41010.yaml b/Documentation/devicetree/bindings/iio/potentiometer/microchip,mcp41010.yaml index 567697d996ec..87e88f2a9908 100644 --- a/Documentation/devicetree/bindings/iio/potentiometer/microchip,mcp41010.yaml +++ b/Documentation/devicetree/bindings/iio/potentiometer/microchip,mcp41010.yaml @@ -25,14 +25,15 @@ properties: reg: maxItems: 1 - spi-max-frequency: true - -additionalProperties: false - required: - compatible - reg +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + examples: - | spi { diff --git a/Documentation/devicetree/bindings/iio/potentiometer/microchip,mcp4131.yaml b/Documentation/devicetree/bindings/iio/potentiometer/microchip,mcp4131.yaml index 32e92bced81f..896fe0b5edcc 100644 --- a/Documentation/devicetree/bindings/iio/potentiometer/microchip,mcp4131.yaml +++ b/Documentation/devicetree/bindings/iio/potentiometer/microchip,mcp4131.yaml @@ -80,14 +80,15 @@ properties: reg: maxItems: 1 - spi-max-frequency: true - -additionalProperties: false - required: - compatible - reg +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + examples: - | spi { diff --git a/Documentation/devicetree/bindings/iio/pressure/asc,dlhl60d.yaml b/Documentation/devicetree/bindings/iio/pressure/asc,dlhl60d.yaml index be2be4b556db..1f9fe15b4b3c 100644 --- a/Documentation/devicetree/bindings/iio/pressure/asc,dlhl60d.yaml +++ b/Documentation/devicetree/bindings/iio/pressure/asc,dlhl60d.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: All Sensors DLH series low voltage digital pressure sensors maintainers: - - Tomislav Denis <tomislav.denis@avl.com> + - Jonathan Cameron <jic23@kernel.org> description: | Bindings for the All Sensors DLH series pressure sensors. diff --git a/Documentation/devicetree/bindings/iio/pressure/bmp085.yaml b/Documentation/devicetree/bindings/iio/pressure/bmp085.yaml index 49257f9251e8..72cd2c2d3f17 100644 --- a/Documentation/devicetree/bindings/iio/pressure/bmp085.yaml +++ b/Documentation/devicetree/bindings/iio/pressure/bmp085.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/iio/pressure/bmp085.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: BMP085/BMP180/BMP280/BME280 pressure iio sensors +title: BMP085/BMP180/BMP280/BME280/BMP380 pressure iio sensors maintainers: - Andreas Klinger <ak@it-klinger.de> @@ -16,6 +16,7 @@ description: | https://www.bosch-sensortec.com/bst/products/all_products/bmp180 https://www.bosch-sensortec.com/bst/products/all_products/bmp280 https://www.bosch-sensortec.com/bst/products/all_products/bme280 + https://www.bosch-sensortec.com/bst/products/all_products/bmp380 properties: compatible: @@ -24,6 +25,7 @@ properties: - bosch,bmp180 - bosch,bmp280 - bosch,bme280 + - bosch,bmp380 reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/iio/samsung,sensorhub-rinato.yaml b/Documentation/devicetree/bindings/iio/samsung,sensorhub-rinato.yaml index a88b3b14d6bd..dd2ae2bd1ad7 100644 --- a/Documentation/devicetree/bindings/iio/samsung,sensorhub-rinato.yaml +++ b/Documentation/devicetree/bindings/iio/samsung,sensorhub-rinato.yaml @@ -40,10 +40,6 @@ properties: description: Reset the sensorhub. - spi-max-frequency: true - -additionalProperties: false - required: - compatible - reg @@ -52,6 +48,11 @@ required: - mcu-ap-gpios - mcu-reset-gpios +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + examples: - | spi { diff --git a/Documentation/devicetree/bindings/iio/st,st-sensors.yaml b/Documentation/devicetree/bindings/iio/st,st-sensors.yaml index fcb2902683c7..250439b13152 100644 --- a/Documentation/devicetree/bindings/iio/st,st-sensors.yaml +++ b/Documentation/devicetree/bindings/iio/st,st-sensors.yaml @@ -73,6 +73,7 @@ properties: - description: STMicroelectronics Pressure Sensors enum: - st,lps001wp-press + - st,lps22df - st,lps22hb-press - st,lps22hh - st,lps25h-press @@ -141,6 +142,7 @@ allOf: - st,lis2mdl - st,lis3l02dq - st,lis3lv02dl-accel + - st,lps22df - st,lps22hb-press - st,lps22hh - st,lps25h-press diff --git a/Documentation/devicetree/bindings/iio/temperature/maxim,max31855k.yaml b/Documentation/devicetree/bindings/iio/temperature/maxim,max31855k.yaml index 9969bac66aa1..0805ed7e2113 100644 --- a/Documentation/devicetree/bindings/iio/temperature/maxim,max31855k.yaml +++ b/Documentation/devicetree/bindings/iio/temperature/maxim,max31855k.yaml @@ -32,7 +32,6 @@ properties: reg: maxItems: 1 - spi-max-frequency: true spi-cpha: true required: @@ -40,6 +39,7 @@ required: - reg allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# - if: properties: compatible: @@ -53,7 +53,7 @@ allOf: properties: spi-cpha: false -additionalProperties: false +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/temperature/maxim,max31856.yaml b/Documentation/devicetree/bindings/iio/temperature/maxim,max31856.yaml index 873b34766676..228a94165487 100644 --- a/Documentation/devicetree/bindings/iio/temperature/maxim,max31856.yaml +++ b/Documentation/devicetree/bindings/iio/temperature/maxim,max31856.yaml @@ -19,7 +19,6 @@ properties: reg: maxItems: 1 - spi-max-frequency: true spi-cpha: true thermocouple-type: @@ -34,7 +33,10 @@ required: - reg - spi-cpha -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/temperature/maxim,max31865.yaml b/Documentation/devicetree/bindings/iio/temperature/maxim,max31865.yaml index aafb33b16549..a2823ed6867b 100644 --- a/Documentation/devicetree/bindings/iio/temperature/maxim,max31865.yaml +++ b/Documentation/devicetree/bindings/iio/temperature/maxim,max31865.yaml @@ -25,7 +25,6 @@ properties: enables 3-wire RTD connection. Else 2-wire or 4-wire RTD connection. type: boolean - spi-max-frequency: true spi-cpha: true required: @@ -33,7 +32,10 @@ required: - reg - spi-cpha -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/temperature/melexis,mlx90632.yaml b/Documentation/devicetree/bindings/iio/temperature/melexis,mlx90632.yaml index b547ddcd544a..4a55e7f25ae7 100644 --- a/Documentation/devicetree/bindings/iio/temperature/melexis,mlx90632.yaml +++ b/Documentation/devicetree/bindings/iio/temperature/melexis,mlx90632.yaml @@ -35,6 +35,9 @@ properties: maxItems: 1 description: Default is 0x3a, but can be reprogrammed. + vdd-supply: + description: provide VDD power to the sensor. + required: - compatible - reg @@ -50,6 +53,7 @@ examples: temp-sensor@3a { compatible = "melexis,mlx90632"; reg = <0x3a>; + vdd-supply = <&ldo4_reg>; }; }; ... diff --git a/Documentation/devicetree/bindings/input/adc-joystick.yaml b/Documentation/devicetree/bindings/input/adc-joystick.yaml index 64d961458ac7..da0f8dfca8bf 100644 --- a/Documentation/devicetree/bindings/input/adc-joystick.yaml +++ b/Documentation/devicetree/bindings/input/adc-joystick.yaml @@ -14,6 +14,9 @@ description: > Bindings for joystick devices connected to ADC controllers supporting the Industrial I/O subsystem. +allOf: + - $ref: input.yaml# + properties: compatible: const: adc-joystick @@ -28,6 +31,8 @@ properties: https://github.com/devicetree-org/dt-schema/blob/master/schemas/iio/iio-consumer.yaml for details. + poll-interval: true + '#address-cells': const: 1 diff --git a/Documentation/devicetree/bindings/input/adi,adp5588.yaml b/Documentation/devicetree/bindings/input/adi,adp5588.yaml new file mode 100644 index 000000000000..26ea66834ae2 --- /dev/null +++ b/Documentation/devicetree/bindings/input/adi,adp5588.yaml @@ -0,0 +1,111 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/input/adi,adp5588.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices ADP5588 Keypad Controller + +maintainers: + - Nuno Sá <nuno.sa@analog.com> + +description: | + Analog Devices Mobile I/O Expander and QWERTY Keypad Controller + https://www.analog.com/media/en/technical-documentation/data-sheets/ADP5588.pdf + +allOf: + - $ref: matrix-keymap.yaml# + - $ref: input.yaml# + +properties: + compatible: + enum: + - adi,adp5587 + - adi,adp5588 + + reg: + maxItems: 1 + + vcc-supply: + description: Supply Voltage Input + + reset-gpios: + description: + If specified, it will be asserted during driver probe. As the line is + active low, it should be marked GPIO_ACTIVE_LOW. + maxItems: 1 + + interrupts: + maxItems: 1 + + gpio-controller: + description: + This property applies if either keypad,num-rows lower than 8 or + keypad,num-columns lower than 10. + + '#gpio-cells': + const: 2 + + interrupt-controller: + description: + This property applies if either keypad,num-rows lower than 8 or + keypad,num-columns lower than 10. + + '#interrupt-cells': + const: 2 + + adi,unlock-keys: + description: + Specifies a maximum of 2 keys that can be used to unlock the keypad. + If this property is set, the keyboard will be locked and only unlocked + after these keys are pressed. If only one key is set, a double click is + needed to unlock the keypad. The value of this property cannot be bigger + or equal than keypad,num-rows * keypad,num-columns. + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 1 + maxItems: 2 + +required: + - compatible + - reg + - interrupts + - keypad,num-rows + - keypad,num-columns + - linux,keymap + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/input/input.h> + #include <dt-bindings/gpio/gpio.h> + i2c { + #address-cells = <1>; + #size-cells = <0>; + + keys@34 { + compatible = "adi,adp5588"; + reg = <0x34>; + + vcc-supply = <&vcc>; + interrupts = <21 IRQ_TYPE_EDGE_FALLING>; + interrupt-parent = <&gpio>; + reset-gpios = <&gpio 20 GPIO_ACTIVE_LOW>; + + keypad,num-rows = <1>; + keypad,num-columns = <9>; + linux,keymap = < + MATRIX_KEY(0x00, 0x00, KEY_1) + MATRIX_KEY(0x00, 0x01, KEY_2) + MATRIX_KEY(0x00, 0x02, KEY_3) + MATRIX_KEY(0x00, 0x03, KEY_4) + MATRIX_KEY(0x00, 0x04, KEY_5) + MATRIX_KEY(0x00, 0x05, KEY_6) + MATRIX_KEY(0x00, 0x06, KEY_7) + MATRIX_KEY(0x00, 0x07, KEY_8) + MATRIX_KEY(0x00, 0x08, KEY_9) + >; + }; + }; +... diff --git a/Documentation/devicetree/bindings/input/allwinner,sun4i-a10-lradc-keys.yaml b/Documentation/devicetree/bindings/input/allwinner,sun4i-a10-lradc-keys.yaml index 9700dc468b25..5d631f7137e7 100644 --- a/Documentation/devicetree/bindings/input/allwinner,sun4i-a10-lradc-keys.yaml +++ b/Documentation/devicetree/bindings/input/allwinner,sun4i-a10-lradc-keys.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/input/allwinner,sun4i-a10-lradc-keys.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 LRADC Device Tree Bindings +title: Allwinner A10 LRADC maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/input/hid-over-i2c.txt b/Documentation/devicetree/bindings/input/hid-over-i2c.txt deleted file mode 100644 index 34c43d3bddfd..000000000000 --- a/Documentation/devicetree/bindings/input/hid-over-i2c.txt +++ /dev/null @@ -1,46 +0,0 @@ -* HID over I2C Device-Tree bindings - -HID over I2C provides support for various Human Interface Devices over the -I2C bus. These devices can be for example touchpads, keyboards, touch screens -or sensors. - -The specification has been written by Microsoft and is currently available here: -http://msdn.microsoft.com/en-us/library/windows/hardware/hh852380.aspx - -If this binding is used, the kernel module i2c-hid will handle the communication -with the device and the generic hid core layer will handle the protocol. - -Required properties: -- compatible: must be "hid-over-i2c" -- reg: i2c slave address -- hid-descr-addr: HID descriptor address -- interrupts: interrupt line - -Additional optional properties: - -Some devices may support additional optional properties to help with, e.g., -power sequencing. The following properties can be supported by one or more -device-specific compatible properties, which should be used in addition to the -"hid-over-i2c" string. - -- compatible: - * "wacom,w9013" (Wacom W9013 digitizer). Supports: - - vdd-supply (3.3V) - - vddl-supply (1.8V) - - post-power-on-delay-ms - -- vdd-supply: phandle of the regulator that provides the supply voltage. -- post-power-on-delay-ms: time required by the device after enabling its regulators - or powering it on, before it is ready for communication. -- touchscreen-inverted-x: See touchscreen.txt -- touchscreen-inverted-y: See touchscreen.txt - -Example: - - i2c-hid-dev@2c { - compatible = "hid-over-i2c"; - reg = <0x2c>; - hid-descr-addr = <0x0020>; - interrupt-parent = <&gpx3>; - interrupts = <3 2>; - }; diff --git a/Documentation/devicetree/bindings/input/hid-over-i2c.yaml b/Documentation/devicetree/bindings/input/hid-over-i2c.yaml new file mode 100644 index 000000000000..7156b08f7645 --- /dev/null +++ b/Documentation/devicetree/bindings/input/hid-over-i2c.yaml @@ -0,0 +1,83 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/input/hid-over-i2c.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: HID over I2C Devices + +maintainers: + - Benjamin Tissoires <benjamin.tissoires@redhat.com> + - Jiri Kosina <jkosina@suse.cz> + +description: |+ + HID over I2C provides support for various Human Interface Devices over the + I2C bus. These devices can be for example touchpads, keyboards, touch screens + or sensors. + + The specification has been written by Microsoft and is currently available here: + https://msdn.microsoft.com/en-us/library/windows/hardware/hh852380.aspx + + If this binding is used, the kernel module i2c-hid will handle the communication + with the device and the generic hid core layer will handle the protocol. + +allOf: + - $ref: /schemas/input/touchscreen/touchscreen.yaml# + +properties: + compatible: + oneOf: + - items: + - enum: + - wacom,w9013 + - const: hid-over-i2c + - description: Just "hid-over-i2c" alone is allowed, but not recommended. + const: hid-over-i2c + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + hid-descr-addr: + description: HID descriptor address + $ref: /schemas/types.yaml#/definitions/uint32 + + post-power-on-delay-ms: + description: Time required by the device after enabling its regulators + or powering it on, before it is ready for communication. + + touchscreen-inverted-x: true + + touchscreen-inverted-y: true + + vdd-supply: + description: 3.3V supply + + vddl-supply: + description: 1.8V supply + + wakeup-source: true + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + hid@2c { + compatible = "hid-over-i2c"; + reg = <0x2c>; + hid-descr-addr = <0x0020>; + interrupts = <3 2>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/input/ibm,op-panel.yaml b/Documentation/devicetree/bindings/input/ibm,op-panel.yaml new file mode 100644 index 000000000000..29a1879e356d --- /dev/null +++ b/Documentation/devicetree/bindings/input/ibm,op-panel.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/input/ibm,op-panel.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: IBM Operation Panel + +maintainers: + - Eddie James <eajames@linux.ibm.com> + +allOf: + - $ref: input.yaml# + +description: | + The IBM Operation Panel provides a simple interface to control the connected + server. It has a display and three buttons: two directional arrows and one + 'Enter' button. + +properties: + compatible: + const: ibm,op-panel + + reg: + maxItems: 1 + + linux,keycodes: + minItems: 1 + maxItems: 3 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include <dt-bindings/i2c/i2c.h> + #include <dt-bindings/input/input.h> + i2c { + #address-cells = <1>; + #size-cells = <0>; + + ibm-op-panel@62 { + compatible = "ibm,op-panel"; + reg = <(0x62 | I2C_OWN_SLAVE_ADDRESS)>; + linux,keycodes = <KEY_UP>, <KEY_DOWN>, <KEY_ENTER>; + }; + }; diff --git a/Documentation/devicetree/bindings/input/imx-keypad.yaml b/Documentation/devicetree/bindings/input/imx-keypad.yaml index f21db81206b4..7514df62b592 100644 --- a/Documentation/devicetree/bindings/input/imx-keypad.yaml +++ b/Documentation/devicetree/bindings/input/imx-keypad.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/input/imx-keypad.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Freescale i.MX Keypad Port(KPP) device tree bindings +title: Freescale i.MX Keypad Port(KPP) maintainers: - Liu Ying <gnuiyl@gmail.com> diff --git a/Documentation/devicetree/bindings/input/mediatek,mt6779-keypad.yaml b/Documentation/devicetree/bindings/input/mediatek,mt6779-keypad.yaml index 03ebd2665d07..d768c30f48fb 100644 --- a/Documentation/devicetree/bindings/input/mediatek,mt6779-keypad.yaml +++ b/Documentation/devicetree/bindings/input/mediatek,mt6779-keypad.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/input/mediatek,mt6779-keypad.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Mediatek's Keypad Controller device tree bindings +title: Mediatek's Keypad Controller maintainers: - Mattijs Korpershoek <mkorpershoek@baylibre.com> @@ -49,6 +49,12 @@ properties: maximum: 256 default: 16 + mediatek,keys-per-group: + description: each (row, column) group has multiple keys + $ref: /schemas/types.yaml#/definitions/uint32 + default: 1 + maximum: 2 + required: - compatible - reg @@ -56,7 +62,7 @@ required: - clocks - clock-names -additionalProperties: false +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/input/mediatek,pmic-keys.yaml b/Documentation/devicetree/bindings/input/mediatek,pmic-keys.yaml new file mode 100644 index 000000000000..2f72ec418415 --- /dev/null +++ b/Documentation/devicetree/bindings/input/mediatek,pmic-keys.yaml @@ -0,0 +1,114 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/input/mediatek,pmic-keys.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek PMIC Keys + +maintainers: + - Chen Zhong <chen.zhong@mediatek.com> + +allOf: + - $ref: input.yaml# + +description: | + There are two key functions provided by MT6397, MT6323 and other MediaTek + PMICs: pwrkey and homekey. + The key functions are defined as the subnode of the function node provided + by the PMIC that is defined as a Multi-Function Device (MFD). + + For MediaTek MT6323/MT6397 PMIC bindings see + Documentation/devicetree/bindings/mfd/mt6397.txt + +properties: + compatible: + enum: + - mediatek,mt6323-keys + - mediatek,mt6331-keys + - mediatek,mt6358-keys + - mediatek,mt6397-keys + + power-off-time-sec: true + + mediatek,long-press-mode: + description: | + Key long-press force shutdown setting + 0 - disabled + 1 - pwrkey + 2 - pwrkey+homekey + $ref: /schemas/types.yaml#/definitions/uint32 + default: 0 + maximum: 2 + +patternProperties: + "^((power|home)|(key-[a-z0-9-]+|[a-z0-9-]+-key))$": + $ref: input.yaml# + + properties: + interrupts: + minItems: 1 + items: + - description: Key press interrupt + - description: Key release interrupt + + interrupt-names: true + + linux-keycodes: + maxItems: 1 + + wakeup-source: true + + required: + - linux,keycodes + + if: + properties: + interrupt-names: + contains: + const: powerkey + then: + properties: + interrupt-names: + minItems: 1 + items: + - const: powerkey + - const: powerkey_r + else: + properties: + interrupt-names: + minItems: 1 + items: + - const: homekey + - const: homekey_r + + unevaluatedProperties: false + +required: + - compatible + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/input/input.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + + pmic { + compatible = "mediatek,mt6397"; + + keys { + compatible = "mediatek,mt6397-keys"; + mediatek,long-press-mode = <1>; + power-off-time-sec = <0>; + + key-power { + linux,keycodes = <KEY_POWER>; + wakeup-source; + }; + + key-home { + linux,keycodes = <KEY_VOLUMEDOWN>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/input/mtk-pmic-keys.txt b/Documentation/devicetree/bindings/input/mtk-pmic-keys.txt deleted file mode 100644 index 9d00f2a8e13a..000000000000 --- a/Documentation/devicetree/bindings/input/mtk-pmic-keys.txt +++ /dev/null @@ -1,46 +0,0 @@ -MediaTek MT6397/MT6323 PMIC Keys Device Driver - -There are two key functions provided by MT6397/MT6323 PMIC, pwrkey -and homekey. The key functions are defined as the subnode of the function -node provided by MT6397/MT6323 PMIC that is being defined as one kind -of Muti-Function Device (MFD) - -For MT6397/MT6323 MFD bindings see: -Documentation/devicetree/bindings/mfd/mt6397.txt - -Required properties: -- compatible: Should be one of: - - "mediatek,mt6397-keys" - - "mediatek,mt6323-keys" - - "mediatek,mt6358-keys" -- linux,keycodes: See Documentation/devicetree/bindings/input/input.yaml - -Optional Properties: -- wakeup-source: See Documentation/devicetree/bindings/power/wakeup-source.txt -- mediatek,long-press-mode: Long press key shutdown setting, 1 for - pwrkey only, 2 for pwrkey/homekey together, others for disabled. -- power-off-time-sec: See Documentation/devicetree/bindings/input/input.yaml - -Example: - - pmic: mt6397 { - compatible = "mediatek,mt6397"; - - ... - - mt6397keys: mt6397keys { - compatible = "mediatek,mt6397-keys"; - mediatek,long-press-mode = <1>; - power-off-time-sec = <0>; - - power { - linux,keycodes = <116>; - wakeup-source; - }; - - home { - linux,keycodes = <114>; - }; - }; - - }; diff --git a/Documentation/devicetree/bindings/input/pine64,pinephone-keyboard.yaml b/Documentation/devicetree/bindings/input/pine64,pinephone-keyboard.yaml new file mode 100644 index 000000000000..e4a0ac0fff9a --- /dev/null +++ b/Documentation/devicetree/bindings/input/pine64,pinephone-keyboard.yaml @@ -0,0 +1,66 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/input/pine64,pinephone-keyboard.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Pine64 PinePhone keyboard device tree bindings + +maintainers: + - Samuel Holland <samuel@sholland.org> + +description: + A keyboard accessory is available for the Pine64 PinePhone and PinePhone Pro. + It connects via I2C, providing a raw scan matrix, a flashing interface, and a + subordinate I2C bus for communication with a battery charger IC. + +properties: + compatible: + const: pine64,pinephone-keyboard + + reg: + const: 0x15 + + interrupts: + maxItems: 1 + + vbat-supply: + description: Supply for the keyboard MCU + + wakeup-source: true + + i2c: + $ref: /schemas/i2c/i2c-controller.yaml# + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + #include <dt-bindings/input/input.h> + #include <dt-bindings/interrupt-controller/irq.h> + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + keyboard@15 { + compatible = "pine64,pinephone-keyboard"; + reg = <0x15>; + interrupt-parent = <&r_pio>; + interrupts = <0 12 IRQ_TYPE_EDGE_FALLING>; /* PL12 */ + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + charger@75 { + reg = <0x75>; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/input/qcom,pm8xxx-vib.txt b/Documentation/devicetree/bindings/input/qcom,pm8xxx-vib.txt deleted file mode 100644 index 64bb990075c3..000000000000 --- a/Documentation/devicetree/bindings/input/qcom,pm8xxx-vib.txt +++ /dev/null @@ -1,23 +0,0 @@ -Qualcomm PM8xxx PMIC Vibrator - -PROPERTIES - -- compatible: - Usage: required - Value type: <string> - Definition: must be one of: - "qcom,pm8058-vib" - "qcom,pm8916-vib" - "qcom,pm8921-vib" - -- reg: - Usage: required - Value type: <prop-encoded-array> - Definition: address of vibration control register - -EXAMPLE - - vibrator@4a { - compatible = "qcom,pm8058-vib"; - reg = <0x4a>; - }; diff --git a/Documentation/devicetree/bindings/input/qcom,pm8xxx-vib.yaml b/Documentation/devicetree/bindings/input/qcom,pm8xxx-vib.yaml new file mode 100644 index 000000000000..c8832cd0d7da --- /dev/null +++ b/Documentation/devicetree/bindings/input/qcom,pm8xxx-vib.yaml @@ -0,0 +1,38 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/input/qcom,pm8xxx-vib.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm PM8xxx PMIC Vibrator + +maintainers: + - Bjorn Andersson <andersson@kernel.org> + +properties: + compatible: + enum: + - qcom,pm8058-vib + - qcom,pm8916-vib + - qcom,pm8921-vib + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + pmic { + #address-cells = <1>; + #size-cells = <0>; + + vibrator@4a { + compatible = "qcom,pm8058-vib"; + reg = <0x4a>; + }; + }; diff --git a/Documentation/devicetree/bindings/input/regulator-haptic.yaml b/Documentation/devicetree/bindings/input/regulator-haptic.yaml index b1ae72f9cd2d..627891e1ef55 100644 --- a/Documentation/devicetree/bindings/input/regulator-haptic.yaml +++ b/Documentation/devicetree/bindings/input/regulator-haptic.yaml @@ -4,7 +4,7 @@ $id: "http://devicetree.org/schemas/input/regulator-haptic.yaml#" $schema: "http://devicetree.org/meta-schemas/core.yaml#" -title: Regulator Haptic Device Tree Bindings +title: Regulator Haptic maintainers: - Jaewon Kim <jaewon02.kim@samsung.com> diff --git a/Documentation/devicetree/bindings/input/sprd,sc27xx-vibrator.yaml b/Documentation/devicetree/bindings/input/sprd,sc27xx-vibrator.yaml index 5d67fc8ebc18..a401a0bfcbec 100644 --- a/Documentation/devicetree/bindings/input/sprd,sc27xx-vibrator.yaml +++ b/Documentation/devicetree/bindings/input/sprd,sc27xx-vibrator.yaml @@ -5,7 +5,7 @@ $id: http://devicetree.org/schemas/input/sprd,sc27xx-vibrator.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Spreadtrum SC27xx PMIC Vibrator Device Tree Bindings +title: Spreadtrum SC27xx PMIC Vibrator maintainers: - Orson Zhai <orsonzhai@gmail.com> diff --git a/Documentation/devicetree/bindings/input/touchscreen/auo_pixcir_ts.txt b/Documentation/devicetree/bindings/input/touchscreen/auo_pixcir_ts.txt index f40f21c642b9..b8db975e9f77 100644 --- a/Documentation/devicetree/bindings/input/touchscreen/auo_pixcir_ts.txt +++ b/Documentation/devicetree/bindings/input/touchscreen/auo_pixcir_ts.txt @@ -17,10 +17,10 @@ Example: auo_pixcir_ts@5c { compatible = "auo,auo_pixcir_ts"; reg = <0x5c>; - interrupts = <2 0>; + interrupts = <2 IRQ_TYPE_LEVEL_HIGH>; - gpios = <&gpf 2 0 2>, /* INT */ - <&gpf 5 1 0>; /* RST */ + gpios = <&gpf 2 0 GPIO_LEVEL_HIGH>, /* INT */ + <&gpf 5 1 GPIO_LEVEL_LOW>; /* RST */ x-size = <800>; y-size = <600>; diff --git a/Documentation/devicetree/bindings/input/touchscreen/colibri-vf50-ts.txt b/Documentation/devicetree/bindings/input/touchscreen/colibri-vf50-ts.txt index 2e1490a8fe74..ca304357c374 100644 --- a/Documentation/devicetree/bindings/input/touchscreen/colibri-vf50-ts.txt +++ b/Documentation/devicetree/bindings/input/touchscreen/colibri-vf50-ts.txt @@ -3,15 +3,16 @@ Required Properties: - compatible must be toradex,vf50-touchscreen - io-channels: adc channels being used by the Colibri VF50 module + IIO ADC for Y-, X-, Y+, X+ connections - xp-gpios: FET gate driver for input of X+ - xm-gpios: FET gate driver for input of X- - yp-gpios: FET gate driver for input of Y+ - ym-gpios: FET gate driver for input of Y- -- interrupts: pen irq interrupt for touch detection -- pinctrl-names: "idle", "default", "gpios" -- pinctrl-0: pinctrl node for pen/touch detection state pinmux +- interrupts: pen irq interrupt for touch detection, signal from X plate +- pinctrl-names: "idle", "default" +- pinctrl-0: pinctrl node for pen/touch detection, pinctrl must provide + pull-up resistor on X+, X-. - pinctrl-1: pinctrl node for X/Y and pressure measurement (ADC) state pinmux -- pinctrl-2: pinctrl node for gpios functioning as FET gate drivers - vf50-ts-min-pressure: pressure level at which to stop measuring X/Y values Example: @@ -26,9 +27,8 @@ Example: ym-gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>; interrupt-parent = <&gpio0>; interrupts = <8 IRQ_TYPE_LEVEL_LOW>; - pinctrl-names = "idle","default","gpios"; - pinctrl-0 = <&pinctrl_touchctrl_idle>; - pinctrl-1 = <&pinctrl_touchctrl_default>; - pinctrl-2 = <&pinctrl_touchctrl_gpios>; + pinctrl-names = "idle","default"; + pinctrl-0 = <&pinctrl_touchctrl_idle>, <&pinctrl_touchctrl_gpios>; + pinctrl-1 = <&pinctrl_touchctrl_default>, <&pinctrl_touchctrl_gpios>; vf50-ts-min-pressure = <200>; }; diff --git a/Documentation/devicetree/bindings/input/touchscreen/elan,elants_i2c.yaml b/Documentation/devicetree/bindings/input/touchscreen/elan,elants_i2c.yaml index a9b53c2e6f0a..f9053e5e9b24 100644 --- a/Documentation/devicetree/bindings/input/touchscreen/elan,elants_i2c.yaml +++ b/Documentation/devicetree/bindings/input/touchscreen/elan,elants_i2c.yaml @@ -14,9 +14,13 @@ allOf: properties: compatible: - enum: - - elan,ektf3624 - - elan,ekth3500 + oneOf: + - enum: + - elan,ektf3624 + - elan,ekth3500 + - items: + - const: elan,ekth3915 + - const: elan,ekth3500 reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/input/touchscreen/stmpe.txt b/Documentation/devicetree/bindings/input/touchscreen/stmpe.txt index c549924603d2..238b51555c04 100644 --- a/Documentation/devicetree/bindings/input/touchscreen/stmpe.txt +++ b/Documentation/devicetree/bindings/input/touchscreen/stmpe.txt @@ -54,8 +54,7 @@ Optional properties common with MFD (deprecated): 1 -> 3.25 MHz 2 || 3 -> 6.5 MHz -Node name must be stmpe_touchscreen and should be child node of stmpe node to -which it belongs. +Node should be child node of stmpe node to which it belongs. Note that common ADC settings of stmpe_touchscreen (child) will take precedence over the settings done in MFD. diff --git a/Documentation/devicetree/bindings/interconnect/fsl,imx8m-noc.yaml b/Documentation/devicetree/bindings/interconnect/fsl,imx8m-noc.yaml index 09c8948b5e25..f7a5e31c506e 100644 --- a/Documentation/devicetree/bindings/interconnect/fsl,imx8m-noc.yaml +++ b/Documentation/devicetree/bindings/interconnect/fsl,imx8m-noc.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Generic i.MX bus frequency device maintainers: - - Leonard Crestez <leonard.crestez@nxp.com> + - Peng Fan <peng.fan@nxp.com> description: | The i.MX SoC family has multiple buses for which clock frequency (and @@ -47,7 +47,8 @@ properties: maxItems: 1 operating-points-v2: true - opp-table: true + opp-table: + type: object fsl,ddrc: $ref: "/schemas/types.yaml#/definitions/phandle" diff --git a/Documentation/devicetree/bindings/interconnect/mediatek,cci.yaml b/Documentation/devicetree/bindings/interconnect/mediatek,cci.yaml index 449c7c988229..58611ba2a0f4 100644 --- a/Documentation/devicetree/bindings/interconnect/mediatek,cci.yaml +++ b/Documentation/devicetree/bindings/interconnect/mediatek,cci.yaml @@ -36,7 +36,8 @@ properties: - const: intermediate operating-points-v2: true - opp-table: true + opp-table: + type: object proc-supply: description: diff --git a/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml b/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml index c2e697f6e6cf..2684562df4d9 100644 --- a/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml +++ b/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml @@ -24,9 +24,12 @@ properties: oneOf: - items: - enum: + - qcom,sc7280-bwmon - qcom,sdm845-bwmon - const: qcom,msm8998-bwmon - const: qcom,msm8998-bwmon # BWMON v4 + - const: qcom,sc7280-llcc-bwmon # BWMON v5 + - const: qcom,sdm845-llcc-bwmon # BWMON v5 interconnects: maxItems: 1 @@ -35,7 +38,8 @@ properties: maxItems: 1 operating-points-v2: true - opp-table: true + opp-table: + type: object reg: # BWMON v4 (currently described) and BWMON v5 use one register address diff --git a/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun4i-a10-ic.yaml b/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun4i-a10-ic.yaml index 953d875b5e74..a713633be733 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun4i-a10-ic.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun4i-a10-ic.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/interrupt-controller/allwinner,sun4i-a10-ic.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 Interrupt Controller Device Tree Bindings +title: Allwinner A10 Interrupt Controller maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun6i-a31-r-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun6i-a31-r-intc.yaml index 4db24b8a9ffe..4fa6fd400eef 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun6i-a31-r-intc.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun6i-a31-r-intc.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/interrupt-controller/allwinner,sun6i-a31-r-intc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A31 NMI/Wakeup Interrupt Controller Device Tree Bindings +title: Allwinner A31 NMI/Wakeup Interrupt Controller maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml b/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml index 7fc9ad5ef38c..83603180d8d9 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A20 Non-Maskable Interrupt Controller Device Tree Bindings +title: Allwinner A20 Non-Maskable Interrupt Controller maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml b/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml index 85c85b694217..e18107eafe7c 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml @@ -96,7 +96,7 @@ properties: Documentation/devicetree/bindings/arm/cpus.yaml). required: - - fiq-index + - apple,fiq-index - cpus required: diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml b/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml index 3912a89162f0..9f7d3e11aacb 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml @@ -170,7 +170,6 @@ dependencies: required: - compatible - - interrupts - reg patternProperties: diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml b/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml index 62219a5c21c5..220256907461 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml @@ -64,9 +64,9 @@ properties: interrupt-controller: true "#address-cells": - enum: [ 0, 1 ] + enum: [ 0, 1, 2 ] "#size-cells": - const: 1 + enum: [ 1, 2 ] "#interrupt-cells": const: 3 diff --git a/Documentation/devicetree/bindings/interrupt-controller/fsl,mu-msi.yaml b/Documentation/devicetree/bindings/interrupt-controller/fsl,mu-msi.yaml new file mode 100644 index 000000000000..799ae5c3e32a --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/fsl,mu-msi.yaml @@ -0,0 +1,99 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/fsl,mu-msi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale/NXP i.MX Messaging Unit (MU) work as msi controller + +maintainers: + - Frank Li <Frank.Li@nxp.com> + +description: | + The Messaging Unit module enables two processors within the SoC to + communicate and coordinate by passing messages (e.g. data, status + and control) through the MU interface. The MU also provides the ability + for one processor (A side) to signal the other processor (B side) using + interrupts. + + Because the MU manages the messaging between processors, the MU uses + different clocks (from each side of the different peripheral buses). + Therefore, the MU must synchronize the accesses from one side to the + other. The MU accomplishes synchronization using two sets of matching + registers (Processor A-side, Processor B-side). + + MU can work as msi interrupt controller to do doorbell + +allOf: + - $ref: /schemas/interrupt-controller/msi-controller.yaml# + +properties: + compatible: + enum: + - fsl,imx6sx-mu-msi + - fsl,imx7ulp-mu-msi + - fsl,imx8ulp-mu-msi + - fsl,imx8ulp-mu-msi-s4 + + reg: + items: + - description: a side register base address + - description: b side register base address + + reg-names: + items: + - const: processor-a-side + - const: processor-b-side + + interrupts: + description: a side interrupt number. + maxItems: 1 + + clocks: + maxItems: 1 + + power-domains: + items: + - description: a side power domain + - description: b side power domain + + power-domain-names: + items: + - const: processor-a-side + - const: processor-b-side + + interrupt-controller: true + + msi-controller: true + + "#msi-cells": + const: 0 + +required: + - compatible + - reg + - interrupts + - interrupt-controller + - msi-controller + - "#msi-cells" + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/firmware/imx/rsrc.h> + + msi-controller@5d270000 { + compatible = "fsl,imx6sx-mu-msi"; + msi-controller; + #msi-cells = <0>; + interrupt-controller; + reg = <0x5d270000 0x10000>, /* A side */ + <0x5d300000 0x10000>; /* B side */ + reg-names = "processor-a-side", "processor-b-side"; + interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&pd IMX_SC_R_MU_12A>, + <&pd IMX_SC_R_MU_12B>; + power-domain-names = "processor-a-side", "processor-b-side"; + }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/idt,32434-pic.yaml b/Documentation/devicetree/bindings/interrupt-controller/idt,32434-pic.yaml index 160ff4b07cac..afb3dd80b643 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/idt,32434-pic.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/idt,32434-pic.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/interrupt-controller/idt,32434-pic.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: IDT 79RC32434 Interrupt Controller Device Tree Bindings +title: IDT 79RC32434 Interrupt Controller maintainers: - Thomas Bogendoerfer <tsbogend@alpha.franken.de> diff --git a/Documentation/devicetree/bindings/interrupt-controller/mti,cpu-interrupt-controller.yaml b/Documentation/devicetree/bindings/interrupt-controller/mti,cpu-interrupt-controller.yaml new file mode 100644 index 000000000000..46a1f5f54b74 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/mti,cpu-interrupt-controller.yaml @@ -0,0 +1,46 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/mti,cpu-interrupt-controller.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MIPS CPU Interrupt Controller + +description: > + On MIPS the mips_cpu_irq_of_init() helper can be used to initialize the 8 CPU + IRQs from a devicetree file and create a irq_domain for IRQ controller. + + With the irq_domain in place we can describe how the 8 IRQs are wired to the + platforms internal interrupt controller cascade. + +maintainers: + - Thomas Bogendoerfer <tsbogend@alpha.franken.de> + +properties: + compatible: + const: mti,cpu-interrupt-controller + + '#interrupt-cells': + const: 1 + + '#address-cells': + const: 0 + + interrupt-controller: true + +additionalProperties: false + +required: + - compatible + - '#interrupt-cells' + - '#address-cells' + - interrupt-controller + +examples: + - | + interrupt-controller { + compatible = "mti,cpu-interrupt-controller"; + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; + }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.txt b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.txt deleted file mode 100644 index 159a423e5586..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.txt +++ /dev/null @@ -1,78 +0,0 @@ -PDC interrupt controller - -Qualcomm Technologies Inc. SoCs based on the RPM Hardened architecture have a -Power Domain Controller (PDC) that is on always-on domain. In addition to -providing power control for the power domains, the hardware also has an -interrupt controller that can be used to help detect edge low interrupts as -well detect interrupts when the GIC is non-operational. - -GIC is parent interrupt controller at the highest level. Platform interrupt -controller PDC is next in hierarchy, followed by others. Drivers requiring -wakeup capabilities of their device interrupts routed through the PDC, must -specify PDC as their interrupt controller and request the PDC port associated -with the GIC interrupt. See example below. - -Properties: - -- compatible: - Usage: required - Value type: <string> - Definition: Should contain "qcom,<soc>-pdc" and "qcom,pdc" - - "qcom,sc7180-pdc": For SC7180 - - "qcom,sc7280-pdc": For SC7280 - - "qcom,sdm845-pdc": For SDM845 - - "qcom,sm6350-pdc": For SM6350 - - "qcom,sm8150-pdc": For SM8150 - - "qcom,sm8250-pdc": For SM8250 - - "qcom,sm8350-pdc": For SM8350 - -- reg: - Usage: required - Value type: <prop-encoded-array> - Definition: Specifies the base physical address for PDC hardware. - -- interrupt-cells: - Usage: required - Value type: <u32> - Definition: Specifies the number of cells needed to encode an interrupt - source. - Must be 2. - The first element of the tuple is the PDC pin for the - interrupt. - The second element is the trigger type. - -- interrupt-controller: - Usage: required - Value type: <bool> - Definition: Identifies the node as an interrupt controller. - -- qcom,pdc-ranges: - Usage: required - Value type: <u32 array> - Definition: Specifies the PDC pin offset and the number of PDC ports. - The tuples indicates the valid mapping of valid PDC ports - and their hwirq mapping. - The first element of the tuple is the starting PDC port. - The second element is the GIC hwirq number for the PDC port. - The third element is the number of interrupts in sequence. - -Example: - - pdc: interrupt-controller@b220000 { - compatible = "qcom,sdm845-pdc"; - reg = <0xb220000 0x30000>; - qcom,pdc-ranges = <0 512 94>, <94 641 15>, <115 662 7>; - #interrupt-cells = <2>; - interrupt-parent = <&intc>; - interrupt-controller; - }; - -DT binding of a device that wants to use the GIC SPI 514 as a wakeup -interrupt, must do - - - wake-device { - interrupts-extended = <&pdc 2 IRQ_TYPE_LEVEL_HIGH>; - }; - -In this case interrupt 514 would be mapped to port 2 on the PDC as defined by -the qcom,pdc-ranges property. diff --git a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml new file mode 100644 index 000000000000..b6f56cf5fbe3 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml @@ -0,0 +1,87 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/qcom,pdc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: PDC interrupt controller + +maintainers: + - Bjorn Andersson <bjorn.andersson@linaro.org> + +description: | + Qualcomm Technologies Inc. SoCs based on the RPM Hardened architecture have a + Power Domain Controller (PDC) that is on always-on domain. In addition to + providing power control for the power domains, the hardware also has an + interrupt controller that can be used to help detect edge low interrupts as + well detect interrupts when the GIC is non-operational. + + GIC is parent interrupt controller at the highest level. Platform interrupt + controller PDC is next in hierarchy, followed by others. Drivers requiring + wakeup capabilities of their device interrupts routed through the PDC, must + specify PDC as their interrupt controller and request the PDC port associated + with the GIC interrupt. See example below. + +properties: + compatible: + items: + - enum: + - qcom,sc7180-pdc + - qcom,sc7280-pdc + - qcom,sdm845-pdc + - qcom,sm6350-pdc + - qcom,sm8150-pdc + - qcom,sm8250-pdc + - qcom,sm8350-pdc + - const: qcom,pdc + + reg: + minItems: 1 + items: + - description: PDC base register region + - description: Edge or Level config register for SPI interrupts + + '#interrupt-cells': + const: 2 + + interrupt-controller: true + + qcom,pdc-ranges: + $ref: /schemas/types.yaml#/definitions/uint32-matrix + minItems: 1 + maxItems: 32 # no hard limit + items: + items: + - description: starting PDC port + - description: GIC hwirq number for the PDC port + - description: number of interrupts in sequence + description: | + Specifies the PDC pin offset and the number of PDC ports. + The tuples indicates the valid mapping of valid PDC ports + and their hwirq mapping. + +required: + - compatible + - reg + - '#interrupt-cells' + - interrupt-controller + - qcom,pdc-ranges + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + + pdc: interrupt-controller@b220000 { + compatible = "qcom,sdm845-pdc", "qcom,pdc"; + reg = <0xb220000 0x30000>; + qcom,pdc-ranges = <0 512 94>, <94 641 15>, <115 662 7>; + #interrupt-cells = <2>; + interrupt-parent = <&intc>; + interrupt-controller; + }; + + wake-device { + interrupts-extended = <&pdc 2 IRQ_TYPE_LEVEL_HIGH>; + }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/realtek,rtl-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/realtek,rtl-intc.yaml index 9e76fff20323..13a893b18fb6 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/realtek,rtl-intc.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/realtek,rtl-intc.yaml @@ -6,6 +6,14 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Realtek RTL SoC interrupt controller devicetree bindings +description: + Interrupt controller and router for Realtek MIPS SoCs, allowing each SoC + interrupt to be routed to one parent CPU (hardware) interrupt, or left + disconnected. + All connected input lines from SoC peripherals can be masked individually, + and an interrupt status register is present to indicate which interrupts are + pending. + maintainers: - Birger Koblitz <mail@birger-koblitz.de> - Bert Vermeulen <bert@biot.com> @@ -13,23 +21,33 @@ maintainers: properties: compatible: - const: realtek,rtl-intc + oneOf: + - items: + - enum: + - realtek,rtl8380-intc + - const: realtek,rtl-intc + - const: realtek,rtl-intc + deprecated: true "#interrupt-cells": + description: + SoC interrupt line index. const: 1 reg: maxItems: 1 interrupts: - maxItems: 1 + minItems: 1 + maxItems: 15 + description: + List of parent interrupts, in the order that they are connected to this + interrupt router's outputs, starting at the first output. interrupt-controller: true - "#address-cells": - const: 0 - interrupt-map: + deprecated: true description: Describes mapping from SoC interrupts to CPU interrupts required: @@ -37,21 +55,33 @@ required: - reg - "#interrupt-cells" - interrupt-controller - - "#address-cells" - - interrupt-map + +allOf: + - if: + properties: + compatible: + const: realtek,rtl-intc + then: + properties: + "#address-cells": + const: 0 + required: + - "#address-cells" + - interrupt-map + else: + required: + - interrupts additionalProperties: false examples: - | - intc: interrupt-controller@3000 { - compatible = "realtek,rtl-intc"; + interrupt-controller@3000 { + compatible = "realtek,rtl8380-intc", "realtek,rtl-intc"; #interrupt-cells = <1>; interrupt-controller; - reg = <0x3000 0x20>; - #address-cells = <0>; - interrupt-map = - <31 &cpuintc 2>, - <30 &cpuintc 1>, - <29 &cpuintc 5>; + reg = <0x3000 0x18>; + + interrupt-parent = <&cpuintc>; + interrupts = <2>, <3>, <4>, <5>, <6>; }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.yaml b/Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.yaml index 620f01775e42..62fd47c88275 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.yaml @@ -37,6 +37,7 @@ properties: - renesas,intc-ex-r8a77990 # R-Car E3 - renesas,intc-ex-r8a77995 # R-Car D3 - renesas,intc-ex-r8a779a0 # R-Car V3U + - renesas,intc-ex-r8a779g0 # R-Car V4H - const: renesas,irqc '#interrupt-cells': diff --git a/Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.yaml b/Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.yaml index e44daa09b137..00c10a8258f1 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/interrupt-controller/st,stm32-exti.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: STM32 External Interrupt Controller Device Tree Bindings +title: STM32 External Interrupt Controller maintainers: - Alexandre Torgue <alexandre.torgue@foss.st.com> diff --git a/Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.yaml b/Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.yaml index 88c46e61732e..1151518859bd 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.yaml @@ -59,6 +59,9 @@ properties: interrupt-controller: true + '#interrupt-cells': + const: 0 + msi-controller: true ti,interrupt-ranges: diff --git a/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml b/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml index e12aee42b126..c99cc7323c71 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml @@ -58,6 +58,9 @@ properties: 1 = If intr supports edge triggered interrupts. 4 = If intr supports level triggered interrupts. + reg: + maxItems: 1 + interrupt-controller: true '#interrupt-cells': diff --git a/Documentation/devicetree/bindings/iommu/allwinner,sun50i-h6-iommu.yaml b/Documentation/devicetree/bindings/iommu/allwinner,sun50i-h6-iommu.yaml index 5e125cf2a88b..e20016f12017 100644 --- a/Documentation/devicetree/bindings/iommu/allwinner,sun50i-h6-iommu.yaml +++ b/Documentation/devicetree/bindings/iommu/allwinner,sun50i-h6-iommu.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/iommu/allwinner,sun50i-h6-iommu.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner H6 IOMMU Device Tree Bindings +title: Allwinner H6 IOMMU maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml index c57a53d87e4e..75fcf4cb52d9 100644 --- a/Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml +++ b/Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml @@ -39,16 +39,11 @@ properties: any others. - minItems: 1 items: - - enum: - - eventq # Event Queue not empty - - gerror # Global Error activated - - const: gerror - - enum: - - cmdq-sync # CMD_SYNC complete - - priq # PRI Queue not empty - - enum: - - cmdq-sync - - priq + enum: + - eventq # Event Queue not empty + - gerror # Global Error activated + - cmdq-sync # CMD_SYNC complete + - priq # PRI Queue not empty '#iommu-cells': const: 1 diff --git a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml index fee0241b5098..839e3be0bf3c 100644 --- a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml +++ b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml @@ -73,6 +73,7 @@ properties: - mediatek,mt2701-m4u # generation one - mediatek,mt2712-m4u # generation two - mediatek,mt6779-m4u # generation two + - mediatek,mt6795-m4u # generation two - mediatek,mt8167-m4u # generation two - mediatek,mt8173-m4u # generation two - mediatek,mt8183-m4u # generation two @@ -124,6 +125,7 @@ properties: dt-binding/memory/mt2701-larb-port.h for mt2701 and mt7623, dt-binding/memory/mt2712-larb-port.h for mt2712, dt-binding/memory/mt6779-larb-port.h for mt6779, + dt-binding/memory/mt6795-larb-port.h for mt6795, dt-binding/memory/mt8167-larb-port.h for mt8167, dt-binding/memory/mt8173-larb-port.h for mt8173, dt-binding/memory/mt8183-larb-port.h for mt8183, @@ -148,6 +150,7 @@ allOf: enum: - mediatek,mt2701-m4u - mediatek,mt2712-m4u + - mediatek,mt6795-m4u - mediatek,mt8173-m4u - mediatek,mt8186-iommu-mm - mediatek,mt8192-m4u @@ -177,6 +180,7 @@ allOf: contains: enum: - mediatek,mt2712-m4u + - mediatek,mt6795-m4u - mediatek,mt8173-m4u then: diff --git a/Documentation/devicetree/bindings/ipmi/npcm7xx-kcs-bmc.txt b/Documentation/devicetree/bindings/ipmi/npcm7xx-kcs-bmc.txt index 352f5e9c759b..4fda76e63396 100644 --- a/Documentation/devicetree/bindings/ipmi/npcm7xx-kcs-bmc.txt +++ b/Documentation/devicetree/bindings/ipmi/npcm7xx-kcs-bmc.txt @@ -1,12 +1,13 @@ -* Nuvoton NPCM7xx KCS (Keyboard Controller Style) IPMI interface +* Nuvoton NPCM KCS (Keyboard Controller Style) IPMI interface -The Nuvoton SOCs (NPCM7xx) are commonly used as BMCs +The Nuvoton SOCs (NPCM) are commonly used as BMCs (Baseboard Management Controllers) and the KCS interface can be used to perform in-band IPMI communication with their host. Required properties: - compatible : should be one of "nuvoton,npcm750-kcs-bmc" + "nuvoton,npcm845-kcs-bmc", "nuvoton,npcm750-kcs-bmc" - interrupts : interrupt generated by the controller - kcs_chan : The KCS channel number in the controller diff --git a/Documentation/devicetree/bindings/leds/backlight/mediatek,mt6370-backlight.yaml b/Documentation/devicetree/bindings/leds/backlight/mediatek,mt6370-backlight.yaml new file mode 100644 index 000000000000..5533b6562d92 --- /dev/null +++ b/Documentation/devicetree/bindings/leds/backlight/mediatek,mt6370-backlight.yaml @@ -0,0 +1,121 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/leds/backlight/mediatek,mt6370-backlight.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek MT6370 Backlight + +maintainers: + - ChiaEn Wu <chiaen_wu@richtek.com> + +description: | + This module is part of the MT6370 MFD device. + The MT6370 Backlight WLED driver supports up to a 29V output voltage for + 4 channels of 8 series WLEDs. Each channel supports up to 30mA of current + capability with 2048 current steps (11 bits, only for MT6370/MT6371) or + 16384 current steps (14 bits, only for MT6372) in exponential or linear + mapping curves. + +allOf: + - $ref: common.yaml# + +properties: + compatible: + enum: + - mediatek,mt6370-backlight + - mediatek,mt6372-backlight + + default-brightness: + minimum: 0 + + max-brightness: + minimum: 0 + + enable-gpios: + description: External backlight 'enable' pin + maxItems: 1 + + mediatek,bled-pwm-enable: + description: | + Enable external PWM input for backlight dimming + type: boolean + + mediatek,bled-pwm-hys-enable: + description: | + Enable the backlight input-hysteresis for PWM mode + type: boolean + + mediatek,bled-pwm-hys-input-th-steps: + $ref: /schemas/types.yaml#/definitions/uint8 + enum: [1, 4, 16, 64] + description: | + The selection of the upper and lower bounds threshold of backlight + PWM resolution. If we choose selection 64, the variation of PWM + resolution needs more than 64 steps. + + mediatek,bled-ovp-shutdown: + description: | + Enable the backlight shutdown when OVP level triggered + type: boolean + + mediatek,bled-ovp-microvolt: + enum: [17000000, 21000000, 25000000, 29000000] + description: | + Backlight OVP level selection. + + mediatek,bled-ocp-shutdown: + description: | + Enable the backlight shutdown when OCP level triggerred. + type: boolean + + mediatek,bled-ocp-microamp: + enum: [900000, 1200000, 1500000, 1800000] + description: | + Backlight OC level selection. + + mediatek,bled-exponential-mode-enable: + description: | + Enable the exponential mode of backlight brightness. If this property + is not enabled, the default is to use linear mode. + type: boolean + + mediatek,bled-channel-use: + $ref: /schemas/types.yaml#/definitions/uint8 + description: | + Backlight LED channel to be used. + Each bit mapping to: + - 0: CH4 + - 1: CH3 + - 2: CH2 + - 3: CH1 + minimum: 1 + maximum: 15 + +if: + properties: + compatible: + contains: + const: mediatek,mt6372-backlight + +then: + properties: + default-brightness: + maximum: 16384 + + max-brightness: + maximum: 16384 + +else: + properties: + default-brightness: + maximum: 2048 + + max-brightness: + maximum: 2048 + +required: + - compatible + - mediatek,bled-channel-use + +additionalProperties: false diff --git a/Documentation/devicetree/bindings/leds/backlight/qcom-wled.yaml b/Documentation/devicetree/bindings/leds/backlight/qcom-wled.yaml index 5d66c3e4def5..4c15693f7a01 100644 --- a/Documentation/devicetree/bindings/leds/backlight/qcom-wled.yaml +++ b/Documentation/devicetree/bindings/leds/backlight/qcom-wled.yaml @@ -26,7 +26,8 @@ properties: - qcom,pm8150l-wled reg: - maxItems: 1 + minItems: 1 + maxItems: 2 default-brightness: description: | @@ -171,6 +172,9 @@ allOf: then: properties: + reg: + maxItems: 1 + qcom,current-boost-limit: enum: [ 105, 385, 525, 805, 980, 1260, 1400, 1680 ] default: 805 @@ -189,6 +193,9 @@ allOf: else: properties: + reg: + minItems: 2 + qcom,current-boost-limit: enum: [ 105, 280, 450, 620, 970, 1150, 1300, 1500 ] default: 970 diff --git a/Documentation/devicetree/bindings/leds/mediatek,mt6370-flashlight.yaml b/Documentation/devicetree/bindings/leds/mediatek,mt6370-flashlight.yaml new file mode 100644 index 000000000000..e9d02ed6a590 --- /dev/null +++ b/Documentation/devicetree/bindings/leds/mediatek,mt6370-flashlight.yaml @@ -0,0 +1,41 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/leds/mediatek,mt6370-flashlight.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Flash LED driver for MT6370 PMIC from MediaTek Integrated. + +maintainers: + - Alice Chen <alice_chen@richtek.com> + +description: | + This module is part of the MT6370 MFD device. + Add MT6370 flash LED driver include 2-channel flash LED support Torch/Strobe Mode. + +properties: + compatible: + const: mediatek,mt6370-flashlight + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + +patternProperties: + "^led@[0-1]$": + type: object + $ref: common.yaml# + unevaluatedProperties: false + + properties: + reg: + enum: [0, 1] + +required: + - compatible + - "#address-cells" + - "#size-cells" + +additionalProperties: false diff --git a/Documentation/devicetree/bindings/leds/mediatek,mt6370-indicator.yaml b/Documentation/devicetree/bindings/leds/mediatek,mt6370-indicator.yaml new file mode 100644 index 000000000000..204b103ffc2c --- /dev/null +++ b/Documentation/devicetree/bindings/leds/mediatek,mt6370-indicator.yaml @@ -0,0 +1,81 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/leds/mediatek,mt6370-indicator.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: LED driver for MT6370 PMIC from MediaTek Integrated. + +maintainers: + - Alice Chen <alice_chen@richtek.com> + +description: | + This module is part of the MT6370 MFD device. + Add MT6370 LED driver include 4-channel RGB LED support Register/PWM/Breath Mode + +allOf: + - $ref: leds-class-multicolor.yaml# + +properties: + compatible: + const: mediatek,mt6370-indicator + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + +patternProperties: + "^multi-led@[0-3]$": + type: object + + properties: + reg: + enum: [0, 1, 2, 3] + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + patternProperties: + "^led@[0-2]$": + type: object + $ref: common.yaml# + unevaluatedProperties: false + + properties: + reg: + enum: [0, 1, 2] + + required: + - reg + - color + + required: + - reg + - color + - "#address-cells" + - "#size-cells" + + "^led@[0-3]$": + type: object + $ref: common.yaml# + unevaluatedProperties: false + + properties: + reg: + enum: [0, 1, 2, 3] + + required: + - reg + - color + +required: + - compatible + - "#address-cells" + - "#size-cells" + +additionalProperties: false diff --git a/Documentation/devicetree/bindings/mailbox/amlogic,meson-gxbb-mhu.yaml b/Documentation/devicetree/bindings/mailbox/amlogic,meson-gxbb-mhu.yaml index ea06976fbbc7..dfd26b998189 100644 --- a/Documentation/devicetree/bindings/mailbox/amlogic,meson-gxbb-mhu.yaml +++ b/Documentation/devicetree/bindings/mailbox/amlogic,meson-gxbb-mhu.yaml @@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#" title: Amlogic Meson Message-Handling-Unit Controller maintainers: - - Neil Armstrong <narmstrong@baylibre.com> + - Neil Armstrong <neil.armstrong@linaro.org> description: | The Amlogic's Meson SoCs Message-Handling-Unit (MHU) is a mailbox controller diff --git a/Documentation/devicetree/bindings/mailbox/mediatek,gce-mailbox.yaml b/Documentation/devicetree/bindings/mailbox/mediatek,gce-mailbox.yaml new file mode 100644 index 000000000000..c579ac074ca7 --- /dev/null +++ b/Documentation/devicetree/bindings/mailbox/mediatek,gce-mailbox.yaml @@ -0,0 +1,85 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mailbox/mediatek,gce-mailbox.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mediatek Global Command Engine Mailbox + +maintainers: + - Houlong Wei <houlong.wei@mediatek.com> + +description: + The Global Command Engine (GCE) is used to help read/write registers with + critical time limitation, such as updating display configuration during the + vblank. The GCE can be used to implement the Command Queue (CMDQ) driver. + +properties: + compatible: + enum: + - mediatek,mt6779-gce + - mediatek,mt8173-gce + - mediatek,mt8183-gce + - mediatek,mt8186-gce + - mediatek,mt8192-gce + - mediatek,mt8195-gce + + "#mbox-cells": + const: 2 + description: + The first cell describes the Thread ID of the GCE, + the second cell describes the priority of the GCE thread + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: Global Command Engine clock + + clock-names: + items: + - const: gce + +required: + - compatible + - "#mbox-cells" + - reg + - interrupts + - clocks + +allOf: + - if: + not: + properties: + compatible: + contains: + const: mediatek,mt8195-gce + then: + required: + - clock-names + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/mt8173-clk.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + + gce: mailbox@10212000 { + compatible = "mediatek,mt8173-gce"; + reg = <0 0x10212000 0 0x1000>; + interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_LOW>; + #mbox-cells = <2>; + clocks = <&infracfg CLK_INFRA_GCE>; + clock-names = "gce"; + }; + }; diff --git a/Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml b/Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml index 082d397d3e89..935937c67133 100644 --- a/Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml +++ b/Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml @@ -14,9 +14,15 @@ properties: const: microchip,mpfs-mailbox reg: - items: - - description: mailbox data registers - - description: mailbox interrupt registers + oneOf: + - items: + - description: mailbox control & data registers + - description: mailbox interrupt registers + deprecated: true + - items: + - description: mailbox control registers + - description: mailbox interrupt registers + - description: mailbox data registers interrupts: maxItems: 1 @@ -39,7 +45,8 @@ examples: #size-cells = <2>; mbox: mailbox@37020000 { compatible = "microchip,mpfs-mailbox"; - reg = <0x0 0x37020000 0x0 0x1000>, <0x0 0x2000318c 0x0 0x40>; + reg = <0x0 0x37020000 0x0 0x58>, <0x0 0x2000318C 0x0 0x40>, + <0x0 0x37020800 0x0 0x100>; interrupt-parent = <&L1>; interrupts = <96>; #mbox-cells = <1>; diff --git a/Documentation/devicetree/bindings/mailbox/mtk-gce.txt b/Documentation/devicetree/bindings/mailbox/mtk-gce.txt deleted file mode 100644 index c2aeba63bd47..000000000000 --- a/Documentation/devicetree/bindings/mailbox/mtk-gce.txt +++ /dev/null @@ -1,82 +0,0 @@ -MediaTek GCE -=============== - -The Global Command Engine (GCE) is used to help read/write registers with -critical time limitation, such as updating display configuration during the -vblank. The GCE can be used to implement the Command Queue (CMDQ) driver. - -CMDQ driver uses mailbox framework for communication. Please refer to -mailbox.txt for generic information about mailbox device-tree bindings. - -Required properties: -- compatible: can be "mediatek,mt8173-gce", "mediatek,mt8183-gce", - "mediatek,mt8186-gce", "mediatek,mt8192-gce", "mediatek,mt8195-gce" or - "mediatek,mt6779-gce". -- reg: Address range of the GCE unit -- interrupts: The interrupt signal from the GCE block -- clock: Clocks according to the common clock binding -- clock-names: Must be "gce" to stand for GCE clock -- #mbox-cells: Should be 2. - <&phandle channel priority> - phandle: Label name of a gce node. - channel: Channel of mailbox. Be equal to the thread id of GCE. - priority: Priority of GCE thread. - -Required properties for a client device: -- mboxes: Client use mailbox to communicate with GCE, it should have this - property and list of phandle, mailbox specifiers. -Optional properties for a client device: -- mediatek,gce-client-reg: Specify the sub-system id which is corresponding - to the register address, it should have this property and list of phandle, - sub-system specifiers. - <&phandle subsys_number start_offset size> - phandle: Label name of a gce node. - subsys_number: specify the sub-system id which is corresponding - to the register address. - start_offset: the start offset of register address that GCE can access. - size: the total size of register address that GCE can access. - -Optional properties for a client mutex node: -- mediatek,gce-events: GCE events used by clients. The event numbers are - defined in 'dt-bindings/gce/<chip>-gce.h'. - -Some vaules of properties are defined in 'dt-bindings/gce/mt8173-gce.h', -'dt-bindings/gce/mt8183-gce.h', 'dt-bindings/gce/mt8186-gce.h' -'dt-bindings/gce/mt8192-gce.h', 'dt-bindings/gce/mt8195-gce.h' or -'dt-bindings/gce/mt6779-gce.h'. -Such as sub-system ids, thread priority, event ids. - -Example: - - gce: gce@10212000 { - compatible = "mediatek,mt8173-gce"; - reg = <0 0x10212000 0 0x1000>; - interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_LOW>; - clocks = <&infracfg CLK_INFRA_GCE>; - clock-names = "gce"; - #mbox-cells = <2>; - }; - -Example for a client device: - - mmsys: clock-controller@14000000 { - compatible = "mediatek,mt8173-mmsys"; - mboxes = <&gce 0 CMDQ_THR_PRIO_LOWEST>, - <&gce 1 CMDQ_THR_PRIO_LOWEST>; - mutex-event-eof = <CMDQ_EVENT_MUTEX0_STREAM_EOF - CMDQ_EVENT_MUTEX1_STREAM_EOF>; - mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x3000 0x1000>, - <&gce SUBSYS_1401XXXX 0x2000 0x100>; - ... - }; - -Example for a client mutex node: - mutex: mutex@14020000 { - compatible = "mediatek,mt8173-disp-mutex"; - reg = <0 0x14020000 0 0x1000>; - interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_LOW>; - power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; - clocks = <&mmsys CLK_MM_MUTEX_32K>; - mediatek,gce-events = <CMDQ_EVENT_MUTEX0_STREAM_EOF>, - <CMDQ_EVENT_MUTEX1_STREAM_EOF>; - }; diff --git a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml index f504652fc0ea..f24fd84b4b05 100644 --- a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml +++ b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml @@ -45,23 +45,17 @@ properties: clocks: description: phandles to the parent clocks of the clock driver minItems: 2 - items: - - description: primary pll parent of the clock driver - - description: auxiliary parent - - description: reference clock + maxItems: 3 '#mbox-cells': const: 1 '#clock-cells': - const: 0 + enum: [0, 1] clock-names: minItems: 2 - items: - - const: pll - - const: aux - - const: ref + maxItems: 3 required: - compatible @@ -75,8 +69,6 @@ allOf: properties: compatible: enum: - - qcom,ipq6018-apcs-apps-global - - qcom,ipq8074-apcs-apps-global - qcom,msm8916-apcs-kpss-global - qcom,msm8994-apcs-kpss-global - qcom,msm8996-apcs-hmss-global @@ -90,7 +82,13 @@ allOf: then: properties: clocks: - maxItems: 2 + items: + - description: primary pll parent of the clock driver + - description: auxiliary parent + clock-names: + items: + - const: pll + - const: aux - if: properties: compatible: @@ -99,7 +97,46 @@ allOf: then: properties: clocks: - maxItems: 3 + items: + - description: primary pll parent of the clock driver + - description: auxiliary parent + - description: reference clock + clock-names: + items: + - const: pll + - const: aux + - const: ref + - if: + properties: + compatible: + enum: + - qcom,ipq6018-apcs-apps-global + - qcom,ipq8074-apcs-apps-global + then: + properties: + clocks: + items: + - description: primary pll parent of the clock driver + - description: XO clock + clock-names: + items: + - const: pll + - const: xo + - if: + properties: + compatible: + enum: + - qcom,ipq6018-apcs-apps-global + - qcom,ipq8074-apcs-apps-global + then: + properties: + '#clock-cells': + const: 1 + else: + properties: + '#clock-cells': + const: 0 + examples: # Example apcs with msm8996 diff --git a/Documentation/devicetree/bindings/media/allegro,al5e.yaml b/Documentation/devicetree/bindings/media/allegro,al5e.yaml index 135bea94b587..2899d26d690e 100644 --- a/Documentation/devicetree/bindings/media/allegro,al5e.yaml +++ b/Documentation/devicetree/bindings/media/allegro,al5e.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/media/allegro,al5e.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allegro DVT Video IP Codecs Device Tree Bindings +title: Allegro DVT Video IP Codecs maintainers: - Michael Tretter <m.tretter@pengutronix.de> diff --git a/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-csi.yaml b/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-csi.yaml index 6ced94064215..617264ce477d 100644 --- a/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-csi.yaml +++ b/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-csi.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/media/allwinner,sun4i-a10-csi.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 CMOS Sensor Interface (CSI) Device Tree Bindings +title: Allwinner A10 CMOS Sensor Interface (CSI) maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml b/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml index 6d8395d6bca0..704033e21ee8 100644 --- a/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml +++ b/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/media/allwinner,sun4i-a10-ir.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 Infrared Controller Device Tree Bindings +title: Allwinner A10 Infrared Controller maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine.yaml b/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine.yaml index ee7fc3515d89..541325f900a1 100644 --- a/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine.yaml +++ b/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/media/allwinner,sun4i-a10-video-engine.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 Video Engine Device Tree Bindings +title: Allwinner A10 Video Engine maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-csi.yaml b/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-csi.yaml index 8551c4a711dc..f1ccca35a790 100644 --- a/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-csi.yaml +++ b/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-csi.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/media/allwinner,sun6i-a31-csi.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A31 CMOS Sensor Interface (CSI) Device Tree Bindings +title: Allwinner A31 CMOS Sensor Interface (CSI) maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-mipi-csi2.yaml b/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-mipi-csi2.yaml index 09725ca955f6..54e15ab8a7f5 100644 --- a/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-mipi-csi2.yaml +++ b/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-mipi-csi2.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/media/allwinner,sun6i-a31-mipi-csi2.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A31 MIPI CSI-2 Device Tree Bindings +title: Allwinner A31 MIPI CSI-2 maintainers: - Paul Kocialkowski <paul.kocialkowski@bootlin.com> diff --git a/Documentation/devicetree/bindings/media/allwinner,sun8i-a83t-de2-rotate.yaml b/Documentation/devicetree/bindings/media/allwinner,sun8i-a83t-de2-rotate.yaml index a258832d520c..c2f292dd01ed 100644 --- a/Documentation/devicetree/bindings/media/allwinner,sun8i-a83t-de2-rotate.yaml +++ b/Documentation/devicetree/bindings/media/allwinner,sun8i-a83t-de2-rotate.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/media/allwinner,sun8i-a83t-de2-rotate.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A83T DE2 Rotate Device Tree Bindings +title: Allwinner A83T DE2 Rotate maintainers: - Jernej Skrabec <jernej.skrabec@siol.net> diff --git a/Documentation/devicetree/bindings/media/allwinner,sun8i-a83t-mipi-csi2.yaml b/Documentation/devicetree/bindings/media/allwinner,sun8i-a83t-mipi-csi2.yaml index 5b27482b5687..3cac68a87ad7 100644 --- a/Documentation/devicetree/bindings/media/allwinner,sun8i-a83t-mipi-csi2.yaml +++ b/Documentation/devicetree/bindings/media/allwinner,sun8i-a83t-mipi-csi2.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/media/allwinner,sun8i-a83t-mipi-csi2.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A83T MIPI CSI-2 Device Tree Bindings +title: Allwinner A83T MIPI CSI-2 maintainers: - Paul Kocialkowski <paul.kocialkowski@bootlin.com> diff --git a/Documentation/devicetree/bindings/media/allwinner,sun8i-h3-deinterlace.yaml b/Documentation/devicetree/bindings/media/allwinner,sun8i-h3-deinterlace.yaml index b80980b1908e..3ccd52164f5b 100644 --- a/Documentation/devicetree/bindings/media/allwinner,sun8i-h3-deinterlace.yaml +++ b/Documentation/devicetree/bindings/media/allwinner,sun8i-h3-deinterlace.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/media/allwinner,sun8i-h3-deinterlace.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner H3 Deinterlace Device Tree Bindings +title: Allwinner H3 Deinterlace maintainers: - Jernej Skrabec <jernej.skrabec@siol.net> diff --git a/Documentation/devicetree/bindings/media/amlogic,axg-ge2d.yaml b/Documentation/devicetree/bindings/media/amlogic,axg-ge2d.yaml index bee93bd84771..e551be5e680e 100644 --- a/Documentation/devicetree/bindings/media/amlogic,axg-ge2d.yaml +++ b/Documentation/devicetree/bindings/media/amlogic,axg-ge2d.yaml @@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#" title: Amlogic GE2D Acceleration Unit maintainers: - - Neil Armstrong <narmstrong@baylibre.com> + - Neil Armstrong <neil.armstrong@linaro.org> properties: compatible: diff --git a/Documentation/devicetree/bindings/media/amlogic,gx-vdec.yaml b/Documentation/devicetree/bindings/media/amlogic,gx-vdec.yaml index 5044c4bb94e0..b827edabcafa 100644 --- a/Documentation/devicetree/bindings/media/amlogic,gx-vdec.yaml +++ b/Documentation/devicetree/bindings/media/amlogic,gx-vdec.yaml @@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#" title: Amlogic Video Decoder maintainers: - - Neil Armstrong <narmstrong@baylibre.com> + - Neil Armstrong <neil.armstrong@linaro.org> - Maxime Jourdan <mjourdan@baylibre.com> description: | diff --git a/Documentation/devicetree/bindings/media/amlogic,meson-gx-ao-cec.yaml b/Documentation/devicetree/bindings/media/amlogic,meson-gx-ao-cec.yaml index d93aea6a0258..8d844f4312d1 100644 --- a/Documentation/devicetree/bindings/media/amlogic,meson-gx-ao-cec.yaml +++ b/Documentation/devicetree/bindings/media/amlogic,meson-gx-ao-cec.yaml @@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#" title: Amlogic Meson AO-CEC Controller maintainers: - - Neil Armstrong <narmstrong@baylibre.com> + - Neil Armstrong <neil.armstrong@linaro.org> description: | The Amlogic Meson AO-CEC module is present is Amlogic SoCs and its purpose is diff --git a/Documentation/devicetree/bindings/media/exynos5-gsc.txt b/Documentation/devicetree/bindings/media/exynos5-gsc.txt deleted file mode 100644 index 1872688fa408..000000000000 --- a/Documentation/devicetree/bindings/media/exynos5-gsc.txt +++ /dev/null @@ -1,38 +0,0 @@ -* Samsung Exynos5 G-Scaler device - -G-Scaler is used for scaling and color space conversion on Exynos5 SoCs. - -Required properties: -- compatible: should be one of - "samsung,exynos5250-gsc" - "samsung,exynos5420-gsc" - "samsung,exynos5433-gsc" - "samsung,exynos5-gsc" (deprecated) -- reg: should contain G-Scaler physical address location and length. -- interrupts: should contain G-Scaler interrupt number - -Optional properties: -- samsung,sysreg: handle to syscon used to control the system registers to - set writeback input and destination - -Example: - -gsc_0: gsc@13e00000 { - compatible = "samsung,exynos5250-gsc"; - reg = <0x13e00000 0x1000>; - interrupts = <0 85 0>; -}; - -Aliases: -Each G-Scaler node should have a numbered alias in the aliases node, -in the form of gscN, N = 0...3. G-Scaler driver uses these aliases -to retrieve the device IDs using "of_alias_get_id()" call. - -Example: - -aliases { - gsc0 =&gsc_0; - gsc1 =&gsc_1; - gsc2 =&gsc_2; - gsc3 =&gsc_3; -}; diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml new file mode 100644 index 000000000000..9cfc0c7d23e0 --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml @@ -0,0 +1,95 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/mediatek,mdp3-rdma.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek Read Direct Memory Access + +maintainers: + - Matthias Brugger <matthias.bgg@gmail.com> + - Moudy Ho <moudy.ho@mediatek.com> + +description: | + MediaTek Read Direct Memory Access(RDMA) component used to do read DMA. + It contains one line buffer to store the sufficient pixel data, and + must be siblings to the central MMSYS_CONFIG node. + For a description of the MMSYS_CONFIG binding, see + Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml + for details. + +properties: + compatible: + items: + - const: mediatek,mt8183-mdp3-rdma + + reg: + maxItems: 1 + + mediatek,gce-client-reg: + $ref: '/schemas/types.yaml#/definitions/phandle-array' + items: + items: + - description: phandle of GCE + - description: GCE subsys id + - description: register offset + - description: register size + description: The register of client driver can be configured by gce with + 4 arguments defined in this property. Each GCE subsys id is mapping to + a client defined in the header include/dt-bindings/gce/<chip>-gce.h. + + mediatek,gce-events: + description: + The event id which is mapping to the specific hardware event signal + to gce. The event id is defined in the gce header + include/dt-bindings/gce/<chip>-gce.h of each chips. + $ref: /schemas/types.yaml#/definitions/uint32-array + + power-domains: + maxItems: 1 + + clocks: + items: + - description: RDMA clock + - description: RSZ clock + + iommus: + maxItems: 1 + + mboxes: + items: + - description: used for 1st data pipe from RDMA + - description: used for 2nd data pipe from RDMA + +required: + - compatible + - reg + - mediatek,gce-client-reg + - mediatek,gce-events + - power-domains + - clocks + - iommus + - mboxes + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/mt8183-clk.h> + #include <dt-bindings/gce/mt8183-gce.h> + #include <dt-bindings/power/mt8183-power.h> + #include <dt-bindings/memory/mt8183-larb-port.h> + + mdp3_rdma0: mdp3-rdma0@14001000 { + compatible = "mediatek,mt8183-mdp3-rdma"; + reg = <0x14001000 0x1000>; + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x1000 0x1000>; + mediatek,gce-events = <CMDQ_EVENT_MDP_RDMA0_SOF>, + <CMDQ_EVENT_MDP_RDMA0_EOF>; + power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; + clocks = <&mmsys CLK_MM_MDP_RDMA0>, + <&mmsys CLK_MM_MDP_RSZ1>; + iommus = <&iommu>; + mboxes = <&gce 20 CMDQ_THR_PRIO_LOWEST>, + <&gce 21 CMDQ_THR_PRIO_LOWEST>; + }; diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-rsz.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-rsz.yaml new file mode 100644 index 000000000000..78f9de6192ef --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-rsz.yaml @@ -0,0 +1,77 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/mediatek,mdp3-rsz.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek Resizer + +maintainers: + - Matthias Brugger <matthias.bgg@gmail.com> + - Moudy Ho <moudy.ho@mediatek.com> + +description: | + One of Media Data Path 3 (MDP3) components used to do frame resizing. + +properties: + compatible: + items: + - enum: + - mediatek,mt8183-mdp3-rsz + + reg: + maxItems: 1 + + mediatek,gce-client-reg: + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + items: + - description: phandle of GCE + - description: GCE subsys id + - description: register offset + - description: register size + description: The register of client driver can be configured by gce with + 4 arguments defined in this property. Each GCE subsys id is mapping to + a client defined in the header include/dt-bindings/gce/<chip>-gce.h. + + mediatek,gce-events: + description: + The event id which is mapping to the specific hardware event signal + to gce. The event id is defined in the gce header + include/dt-bindings/gce/<chip>-gce.h of each chips. + $ref: /schemas/types.yaml#/definitions/uint32-array + + clocks: + minItems: 1 + +required: + - compatible + - reg + - mediatek,gce-client-reg + - mediatek,gce-events + - clocks + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/mt8183-clk.h> + #include <dt-bindings/gce/mt8183-gce.h> + + mdp3_rsz0: mdp3-rsz0@14003000 { + compatible = "mediatek,mt8183-mdp3-rsz"; + reg = <0x14003000 0x1000>; + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x3000 0x1000>; + mediatek,gce-events = <CMDQ_EVENT_MDP_RSZ0_SOF>, + <CMDQ_EVENT_MDP_RSZ0_EOF>; + clocks = <&mmsys CLK_MM_MDP_RSZ0>; + }; + + mdp3_rsz1: mdp3-rsz1@14004000 { + compatible = "mediatek,mt8183-mdp3-rsz"; + reg = <0x14004000 0x1000>; + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x4000 0x1000>; + mediatek,gce-events = <CMDQ_EVENT_MDP_RSZ1_SOF>, + <CMDQ_EVENT_MDP_RSZ1_EOF>; + clocks = <&mmsys CLK_MM_MDP_RSZ1>; + }; diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml new file mode 100644 index 000000000000..0baa77198fa2 --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml @@ -0,0 +1,80 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/mediatek,mdp3-wrot.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek Write DMA with Rotation + +maintainers: + - Matthias Brugger <matthias.bgg@gmail.com> + - Moudy Ho <moudy.ho@mediatek.com> + +description: | + One of Media Data Path 3 (MDP3) components used to write DMA with frame rotation. + +properties: + compatible: + items: + - enum: + - mediatek,mt8183-mdp3-wrot + + reg: + maxItems: 1 + + mediatek,gce-client-reg: + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + items: + - description: phandle of GCE + - description: GCE subsys id + - description: register offset + - description: register size + description: The register of client driver can be configured by gce with + 4 arguments defined in this property. Each GCE subsys id is mapping to + a client defined in the header include/dt-bindings/gce/<chip>-gce.h. + + mediatek,gce-events: + description: + The event id which is mapping to the specific hardware event signal + to gce. The event id is defined in the gce header + include/dt-bindings/gce/<chip>-gce.h of each chips. + $ref: /schemas/types.yaml#/definitions/uint32-array + + power-domains: + maxItems: 1 + + clocks: + minItems: 1 + + iommus: + maxItems: 1 + +required: + - compatible + - reg + - mediatek,gce-client-reg + - mediatek,gce-events + - power-domains + - clocks + - iommus + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/mt8183-clk.h> + #include <dt-bindings/gce/mt8183-gce.h> + #include <dt-bindings/power/mt8183-power.h> + #include <dt-bindings/memory/mt8183-larb-port.h> + + mdp3_wrot0: mdp3-wrot0@14005000 { + compatible = "mediatek,mt8183-mdp3-wrot"; + reg = <0x14005000 0x1000>; + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x5000 0x1000>; + mediatek,gce-events = <CMDQ_EVENT_MDP_WROT0_SOF>, + <CMDQ_EVENT_MDP_WROT0_EOF>; + power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; + clocks = <&mmsys CLK_MM_MDP_WROT0>; + iommus = <&iommu>; + }; diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-encoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-encoder.yaml index d36fcca04cbc..32aee09aea33 100644 --- a/Documentation/devicetree/bindings/media/mediatek,vcodec-encoder.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,vcodec-encoder.yaml @@ -20,6 +20,7 @@ properties: - mediatek,mt8173-vcodec-enc-vp8 - mediatek,mt8173-vcodec-enc - mediatek,mt8183-vcodec-enc + - mediatek,mt8188-vcodec-enc - mediatek,mt8192-vcodec-enc - mediatek,mt8195-vcodec-enc diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml index d4e2051beeb6..c4f20acdc1f8 100644 --- a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml @@ -57,6 +57,7 @@ properties: enum: - mediatek,mt8192-vcodec-dec - mediatek,mt8186-vcodec-dec + - mediatek,mt8188-vcodec-dec - mediatek,mt8195-vcodec-dec reg: diff --git a/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml index 052e752157b4..5e8d001492cc 100644 --- a/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml +++ b/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/media/mediatek-jpeg-decoder.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: MediaTek JPEG Decoder Device Tree Bindings +title: MediaTek JPEG Decoder maintainers: - Xia Jiang <xia.jiang@mediatek.com> diff --git a/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml b/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml index 4fd390c042a9..fc727300b493 100644 --- a/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml +++ b/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/media/mediatek-jpeg-encoder.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: MediaTek JPEG Encoder Device Tree Bindings +title: MediaTek JPEG Encoder maintainers: - Xia Jiang <xia.jiang@mediatek.com> diff --git a/Documentation/devicetree/bindings/media/microchip,csi2dc.yaml b/Documentation/devicetree/bindings/media/microchip,csi2dc.yaml index e8544fb2d034..b3a345fc6464 100644 --- a/Documentation/devicetree/bindings/media/microchip,csi2dc.yaml +++ b/Documentation/devicetree/bindings/media/microchip,csi2dc.yaml @@ -75,6 +75,7 @@ properties: properties: port@0: $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false description: Input port node, single endpoint describing the input port. @@ -103,6 +104,7 @@ properties: port@1: $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false description: Output port node, single endpoint describing the output port. diff --git a/Documentation/devicetree/bindings/media/nxp,dw100.yaml b/Documentation/devicetree/bindings/media/nxp,dw100.yaml new file mode 100644 index 000000000000..21910ff0e1c3 --- /dev/null +++ b/Documentation/devicetree/bindings/media/nxp,dw100.yaml @@ -0,0 +1,69 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/nxp,dw100.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP i.MX8MP DW100 Dewarper core + +maintainers: + - Xavier Roumegue <xavier.roumegue@oss.nxp.com> + +description: |- + The Dewarp Engine provides high-performance dewarp processing for the + correction of the distortion that is introduced in images produced by fisheye + and wide angle lenses. It is implemented with a line/tile-cache based + architecture. With configurable address mapping look up tables and per tile + processing, it successfully generates a corrected output image. + The engine can be used to perform scaling, cropping and pixel format + conversion. + +properties: + compatible: + enum: + - nxp,imx8mp-dw100 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: The AXI clock + - description: The AHB clock + + clock-names: + items: + - const: axi + - const: ahb + + power-domains: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - power-domains + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/imx8mp-clock.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/power/imx8mp-power.h> + + dewarp: dwe@32e30000 { + compatible = "nxp,imx8mp-dw100"; + reg = <0x32e30000 0x10000>; + interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>, + <&clk IMX8MP_CLK_MEDIA_APB_ROOT>; + clock-names = "axi", "ahb"; + power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_DWE>; + }; diff --git a/Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml b/Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml index 3cc6f42aeb76..3d9d1db37040 100644 --- a/Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml +++ b/Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/media/nxp,imx8-jpeg.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: i.MX8QXP/QM JPEG decoder/encoder Device Tree Bindings +title: i.MX8QXP/QM JPEG decoder/encoder maintainers: - Mirela Rabulea <mirela.rabulea@nxp.com> diff --git a/Documentation/devicetree/bindings/media/qcom,msm8916-venus.yaml b/Documentation/devicetree/bindings/media/qcom,msm8916-venus.yaml index 59ab16ad12f1..2abb7d21c0d1 100644 --- a/Documentation/devicetree/bindings/media/qcom,msm8916-venus.yaml +++ b/Documentation/devicetree/bindings/media/qcom,msm8916-venus.yaml @@ -68,6 +68,7 @@ properties: video-firmware: type: object + additionalProperties: false description: | Firmware subnode is needed when the platform does not diff --git a/Documentation/devicetree/bindings/media/qcom,msm8996-venus.yaml b/Documentation/devicetree/bindings/media/qcom,msm8996-venus.yaml index 199f45217b4a..29d0cb6c6ebe 100644 --- a/Documentation/devicetree/bindings/media/qcom,msm8996-venus.yaml +++ b/Documentation/devicetree/bindings/media/qcom,msm8996-venus.yaml @@ -95,6 +95,7 @@ properties: video-firmware: type: object + additionalProperties: false description: | Firmware subnode is needed when the platform does not diff --git a/Documentation/devicetree/bindings/media/qcom,sc7180-venus.yaml b/Documentation/devicetree/bindings/media/qcom,sc7180-venus.yaml index 90b4af2c9724..42ee3f06c6be 100644 --- a/Documentation/devicetree/bindings/media/qcom,sc7180-venus.yaml +++ b/Documentation/devicetree/bindings/media/qcom,sc7180-venus.yaml @@ -86,6 +86,7 @@ properties: video-firmware: type: object + additionalProperties: false description: | Firmware subnode is needed when the platform does not diff --git a/Documentation/devicetree/bindings/media/qcom,sc7280-venus.yaml b/Documentation/devicetree/bindings/media/qcom,sc7280-venus.yaml index e2874683b4d5..cf361dd9de08 100644 --- a/Documentation/devicetree/bindings/media/qcom,sc7280-venus.yaml +++ b/Documentation/devicetree/bindings/media/qcom,sc7280-venus.yaml @@ -86,6 +86,7 @@ properties: video-firmware: type: object + additionalProperties: false description: | Firmware subnode is needed when the platform does not diff --git a/Documentation/devicetree/bindings/media/qcom,sdm660-venus.yaml b/Documentation/devicetree/bindings/media/qcom,sdm660-venus.yaml index 33da7d3cfd38..45e3f58f52bd 100644 --- a/Documentation/devicetree/bindings/media/qcom,sdm660-venus.yaml +++ b/Documentation/devicetree/bindings/media/qcom,sdm660-venus.yaml @@ -104,6 +104,7 @@ properties: video-firmware: type: object + additionalProperties: false description: | Firmware subnode is needed when the platform does not diff --git a/Documentation/devicetree/bindings/media/qcom,sdm845-venus-v2.yaml b/Documentation/devicetree/bindings/media/qcom,sdm845-venus-v2.yaml index 177bf81544b1..8edc8a2f43a5 100644 --- a/Documentation/devicetree/bindings/media/qcom,sdm845-venus-v2.yaml +++ b/Documentation/devicetree/bindings/media/qcom,sdm845-venus-v2.yaml @@ -81,6 +81,7 @@ properties: video-firmware: type: object + additionalProperties: false description: | Firmware subnode is needed when the platform does not diff --git a/Documentation/devicetree/bindings/media/qcom,sdm845-venus.yaml b/Documentation/devicetree/bindings/media/qcom,sdm845-venus.yaml index 680f37726fdf..57d503373efe 100644 --- a/Documentation/devicetree/bindings/media/qcom,sdm845-venus.yaml +++ b/Documentation/devicetree/bindings/media/qcom,sdm845-venus.yaml @@ -96,6 +96,7 @@ properties: video-firmware: type: object + additionalProperties: false description: | Firmware subnode is needed when the platform does not diff --git a/Documentation/devicetree/bindings/media/qcom,sm8250-venus.yaml b/Documentation/devicetree/bindings/media/qcom,sm8250-venus.yaml index ebf8f3d866a5..4b7a12523dcf 100644 --- a/Documentation/devicetree/bindings/media/qcom,sm8250-venus.yaml +++ b/Documentation/devicetree/bindings/media/qcom,sm8250-venus.yaml @@ -92,6 +92,7 @@ properties: video-firmware: type: object + additionalProperties: false description: | Firmware subnode is needed when the platform does not diff --git a/Documentation/devicetree/bindings/media/rc.yaml b/Documentation/devicetree/bindings/media/rc.yaml index b11d14ab89c4..e732b7f3a635 100644 --- a/Documentation/devicetree/bindings/media/rc.yaml +++ b/Documentation/devicetree/bindings/media/rc.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/media/rc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Generic Infrared Remote Controller Device Tree Bindings +title: Generic Infrared Remote Controller maintainers: - Mauro Carvalho Chehab <mchehab@kernel.org> diff --git a/Documentation/devicetree/bindings/media/renesas,vsp1.yaml b/Documentation/devicetree/bindings/media/renesas,vsp1.yaml index 990e9c1dbc43..7a8f32473852 100644 --- a/Documentation/devicetree/bindings/media/renesas,vsp1.yaml +++ b/Documentation/devicetree/bindings/media/renesas,vsp1.yaml @@ -17,6 +17,7 @@ description: properties: compatible: enum: + - renesas,r9a07g044-vsp2 # RZ/G2L - renesas,vsp1 # R-Car Gen2 and RZ/G1 - renesas,vsp2 # R-Car Gen3 and RZ/G2 @@ -26,8 +27,8 @@ properties: interrupts: maxItems: 1 - clocks: - maxItems: 1 + clocks: true + clock-names: true power-domains: maxItems: 1 @@ -50,17 +51,43 @@ required: additionalProperties: false -if: - properties: - compatible: - items: - - const: renesas,vsp1 -then: - properties: - renesas,fcp: false -else: - required: - - renesas,fcp +allOf: + - if: + properties: + compatible: + contains: + const: renesas,vsp1 + then: + properties: + renesas,fcp: false + else: + required: + - renesas,fcp + + - if: + properties: + compatible: + contains: + const: renesas,r9a07g044-vsp2 + then: + properties: + clocks: + items: + - description: Main clock + - description: Register access clock + - description: Video clock + clock-names: + items: + - const: aclk + - const: pclk + - const: vclk + required: + - clock-names + else: + properties: + clocks: + maxItems: 1 + clock-names: false examples: # R8A7790 (R-Car H2) VSP1-S diff --git a/Documentation/devicetree/bindings/media/rockchip,vdec.yaml b/Documentation/devicetree/bindings/media/rockchip,vdec.yaml index 3bcfb8e12333..08b02ec16755 100644 --- a/Documentation/devicetree/bindings/media/rockchip,vdec.yaml +++ b/Documentation/devicetree/bindings/media/rockchip,vdec.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/media/rockchip,vdec.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Rockchip Video Decoder (VDec) Device Tree Bindings +title: Rockchip Video Decoder (VDec) maintainers: - Heiko Stuebner <heiko@sntech.de> diff --git a/Documentation/devicetree/bindings/media/samsung,exynos5250-gsc.yaml b/Documentation/devicetree/bindings/media/samsung,exynos5250-gsc.yaml new file mode 100644 index 000000000000..878397830a4d --- /dev/null +++ b/Documentation/devicetree/bindings/media/samsung,exynos5250-gsc.yaml @@ -0,0 +1,109 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/samsung,exynos5250-gsc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung Exynos SoC G-Scaler + +maintainers: + - Inki Dae <inki.dae@samsung.com> + - Krzysztof Kozlowski <krzk@kernel.org> + - Seung-Woo Kim <sw0312.kim@samsung.com + +description: + G-Scaler is used for scaling and color space conversion on Samsung Exynos + SoCs. + + Each G-Scaler node should have a numbered alias in the aliases node, in the + form of gscN, N = 0...3. + +properties: + compatible: + oneOf: + - items: + - enum: + - samsung,exynos5250-gsc + - samsung,exynos5420-gsc + - const: samsung,exynos5-gsc + - enum: + - samsung,exynos5433-gsc + - const: samsung,exynos5-gsc + deprecated: True + + clocks: + minItems: 1 + maxItems: 5 + + clock-names: + minItems: 1 + maxItems: 5 + + interrupts: + maxItems: 1 + + iommus: + maxItems: 1 + + power-domains: + maxItems: 1 + + reg: + maxItems: 1 + + samsung,sysreg: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Syscon used to control the system registers to set writeback input and destination. + +required: + - compatible + - clocks + - clock-names + - interrupts + - reg + +allOf: + - if: + properties: + compatible: + contains: + enum: + - samsung,exynos5-gsc + - samsung,exynos5250-gsc + - samsung,exynos5420-gsc + then: + properties: + clocks: + maxItems: 1 + clock-names: + items: + - const: gscl + else: + properties: + clocks: + minItems: 5 + clock-names: + items: + - const: pclk + - const: aclk + - const: aclk_xiu + - const: aclk_gsclbend + - const: gsd + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/exynos5250.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + + video-scaler@13e00000 { + compatible = "samsung,exynos5250-gsc", "samsung,exynos5-gsc"; + reg = <0x13e00000 0x1000>; + interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&pd_gsc>; + clocks = <&clock CLK_GSCL0>; + clock-names = "gscl"; + iommus = <&sysmmu_gsc0>; + }; diff --git a/Documentation/devicetree/bindings/media/ti,cal.yaml b/Documentation/devicetree/bindings/media/ti,cal.yaml index 7e078424ca4d..f8e4d260d10a 100644 --- a/Documentation/devicetree/bindings/media/ti,cal.yaml +++ b/Documentation/devicetree/bindings/media/ti,cal.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/media/ti,cal.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Texas Instruments DRA72x CAMERA ADAPTATION LAYER (CAL) Device Tree Bindings +title: Texas Instruments DRA72x CAMERA ADAPTATION LAYER (CAL) maintainers: - Benoit Parrot <bparrot@ti.com> diff --git a/Documentation/devicetree/bindings/media/ti,vpe.yaml b/Documentation/devicetree/bindings/media/ti,vpe.yaml index ef473f287399..7fa8a367ed22 100644 --- a/Documentation/devicetree/bindings/media/ti,vpe.yaml +++ b/Documentation/devicetree/bindings/media/ti,vpe.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/media/ti,vpe.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Texas Instruments DRA7x Video Processing Engine (VPE) Device Tree Bindings +title: Texas Instruments DRA7x Video Processing Engine (VPE) maintainers: - Benoit Parrot <bparrot@ti.com> diff --git a/Documentation/devicetree/bindings/memory-controllers/brcm,brcmstb-memc-ddr.yaml b/Documentation/devicetree/bindings/memory-controllers/brcm,brcmstb-memc-ddr.yaml new file mode 100644 index 000000000000..4b072c879b02 --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/brcm,brcmstb-memc-ddr.yaml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/memory-controllers/brcm,brcmstb-memc-ddr.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Memory controller (MEMC) for Broadcom STB + +maintainers: + - Florian Fainelli <f.fainelli@gmail.com> + +properties: + compatible: + items: + - enum: + - brcm,brcmstb-memc-ddr-rev-b.1.x + - brcm,brcmstb-memc-ddr-rev-b.2.0 + - brcm,brcmstb-memc-ddr-rev-b.2.1 + - brcm,brcmstb-memc-ddr-rev-b.2.2 + - brcm,brcmstb-memc-ddr-rev-b.2.3 + - brcm,brcmstb-memc-ddr-rev-b.2.5 + - brcm,brcmstb-memc-ddr-rev-b.2.6 + - brcm,brcmstb-memc-ddr-rev-b.2.7 + - brcm,brcmstb-memc-ddr-rev-b.2.8 + - brcm,brcmstb-memc-ddr-rev-b.3.0 + - brcm,brcmstb-memc-ddr-rev-b.3.1 + - brcm,brcmstb-memc-ddr-rev-c.1.0 + - brcm,brcmstb-memc-ddr-rev-c.1.1 + - brcm,brcmstb-memc-ddr-rev-c.1.2 + - brcm,brcmstb-memc-ddr-rev-c.1.3 + - brcm,brcmstb-memc-ddr-rev-c.1.4 + - const: brcm,brcmstb-memc-ddr + + reg: + maxItems: 1 + + clock-frequency: + description: DDR PHY frequency in Hz + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + memory-controller@9902000 { + compatible = "brcm,brcmstb-memc-ddr-rev-c.1.1", "brcm,brcmstb-memc-ddr"; + reg = <0x9902000 0x600>; + clock-frequency = <2133000000>; + }; diff --git a/Documentation/devicetree/bindings/memory-controllers/fsl/imx8m-ddrc.yaml b/Documentation/devicetree/bindings/memory-controllers/fsl/imx8m-ddrc.yaml index 445e46feda69..519b123116dc 100644 --- a/Documentation/devicetree/bindings/memory-controllers/fsl/imx8m-ddrc.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/fsl/imx8m-ddrc.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: i.MX8M DDR Controller maintainers: - - Leonard Crestez <leonard.crestez@nxp.com> + - Peng Fan <peng.fan@nxp.com> description: The DDRC block is integrated in i.MX8M for interfacing with DDR based @@ -47,7 +47,8 @@ properties: - const: apb operating-points-v2: true - opp-table: true + opp-table: + type: object required: - reg diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,mt7621-memc.yaml b/Documentation/devicetree/bindings/memory-controllers/mediatek,mt7621-memc.yaml index 85e02854f083..6ccdaf99c778 100644 --- a/Documentation/devicetree/bindings/memory-controllers/mediatek,mt7621-memc.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,mt7621-memc.yaml @@ -11,7 +11,9 @@ maintainers: properties: compatible: - const: mediatek,mt7621-memc + items: + - const: mediatek,mt7621-memc + - const: syscon reg: maxItems: 1 @@ -25,6 +27,6 @@ additionalProperties: false examples: - | memory-controller@5000 { - compatible = "mediatek,mt7621-memc"; + compatible = "mediatek,mt7621-memc", "syscon"; reg = <0x5000 0x1000>; }; diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml index 71bc5cefb49c..a8fda30cccbb 100644 --- a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml @@ -16,7 +16,7 @@ description: | MediaTek SMI have two generations of HW architecture, here is the list which generation the SoCs use: generation 1: mt2701 and mt7623. - generation 2: mt2712, mt6779, mt8167, mt8173, mt8183, mt8186, mt8192 and mt8195. + generation 2: mt2712, mt6779, mt8167, mt8173, mt8183, mt8186, mt8188, mt8192 and mt8195. There's slight differences between the two SMI, for generation 2, the register which control the iommu port is at each larb's register base. But @@ -37,6 +37,8 @@ properties: - mediatek,mt8173-smi-common - mediatek,mt8183-smi-common - mediatek,mt8186-smi-common + - mediatek,mt8188-smi-common-vdo + - mediatek,mt8188-smi-common-vpp - mediatek,mt8192-smi-common - mediatek,mt8195-smi-common-vdo - mediatek,mt8195-smi-common-vpp @@ -144,7 +146,16 @@ allOf: - const: gals0 - const: gals1 - else: # for gen2 HW that don't have gals + - if: # for gen2 HW that don't have gals + properties: + compatible: + enum: + - mediatek,mt2712-smi-common + - mediatek,mt6795-smi-common + - mediatek,mt8167-smi-common + - mediatek,mt8173-smi-common + + then: properties: clocks: minItems: 2 diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml index 59dcd163668f..5f4ac3609887 100644 --- a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml @@ -25,6 +25,7 @@ properties: - mediatek,mt8173-smi-larb - mediatek,mt8183-smi-larb - mediatek,mt8186-smi-larb + - mediatek,mt8188-smi-larb - mediatek,mt8192-smi-larb - mediatek,mt8195-smi-larb @@ -78,6 +79,7 @@ allOf: enum: - mediatek,mt8183-smi-larb - mediatek,mt8186-smi-larb + - mediatek,mt8188-smi-larb - mediatek,mt8195-smi-larb then: @@ -111,6 +113,7 @@ allOf: - mediatek,mt2712-smi-larb - mediatek,mt6779-smi-larb - mediatek,mt8186-smi-larb + - mediatek,mt8188-smi-larb - mediatek,mt8192-smi-larb - mediatek,mt8195-smi-larb diff --git a/Documentation/devicetree/bindings/memory-controllers/snps,dw-umctl2-ddrc.yaml b/Documentation/devicetree/bindings/memory-controllers/snps,dw-umctl2-ddrc.yaml new file mode 100644 index 000000000000..e68c4306025a --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/snps,dw-umctl2-ddrc.yaml @@ -0,0 +1,118 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/memory-controllers/snps,dw-umctl2-ddrc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Synopsys DesignWare Universal Multi-Protocol Memory Controller + +maintainers: + - Krzysztof Kozlowski <krzk@kernel.org> + - Manish Narani <manish.narani@xilinx.com> + - Michal Simek <michal.simek@xilinx.com> + +description: | + Synopsys DesignWare Enhanced uMCTL2 DDR Memory Controller is capable of + working with the memory devices supporting up to (LP)DDR4 protocol. It can + be equipped with SEC/DEC ECC feature if DRAM data bus width is either + 16-bits or 32-bits or 64-bits wide. + + For instance the ZynqMP DDR controller is based on the DW uMCTL2 v2.40a + controller. It has an optional SEC/DEC ECC support in 64- and 32-bits + bus width configurations. + +properties: + compatible: + oneOf: + - deprecated: true + description: Synopsys DW uMCTL2 DDR controller v3.80a + const: snps,ddrc-3.80a + - description: Synopsys DW uMCTL2 DDR controller + const: snps,dw-umctl2-ddrc + - description: Xilinx ZynqMP DDR controller v2.40a + const: xlnx,zynqmp-ddrc-2.40a + + interrupts: + description: + DW uMCTL2 DDRC IP-core provides individual IRQ signal for each event":" + ECC Corrected Error, ECC Uncorrected Error, ECC Address Protection, + Scrubber-Done signal, DFI Parity/CRC Error. Some platforms may have the + signals merged before they reach the IRQ controller or have some of them + absent in case if the corresponding feature is unavailable/disabled. + minItems: 1 + maxItems: 5 + + interrupt-names: + minItems: 1 + maxItems: 5 + oneOf: + - description: Common ECC CE/UE/Scrubber/DFI Errors IRQ + items: + - const: ecc + - description: Individual ECC CE/UE/Scrubber/DFI Errors IRQs + items: + enum: [ ecc_ce, ecc_ue, ecc_ap, ecc_sbr, dfi_e ] + + reg: + maxItems: 1 + + clocks: + description: + A standard set of the clock sources contains CSRs bus clock, AXI-ports + reference clock, DDRC core clock, Scrubber standalone clock + (synchronous to the DDRC clock). + minItems: 1 + maxItems: 4 + + clock-names: + minItems: 1 + maxItems: 4 + items: + enum: [ pclk, aclk, core, sbr ] + + resets: + description: + Each clock domain can have separate reset signal. + minItems: 1 + maxItems: 4 + + reset-names: + minItems: 1 + maxItems: 4 + items: + enum: [ prst, arst, core, sbr ] + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + + memory-controller@fd070000 { + compatible = "xlnx,zynqmp-ddrc-2.40a"; + reg = <0xfd070000 0x30000>; + + interrupt-parent = <&gic>; + interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "ecc"; + }; + - | + #include <dt-bindings/interrupt-controller/irq.h> + + memory-controller@3d400000 { + compatible = "snps,dw-umctl2-ddrc"; + reg = <0x3d400000 0x400000>; + + interrupts = <147 IRQ_TYPE_LEVEL_HIGH>, <148 IRQ_TYPE_LEVEL_HIGH>, + <149 IRQ_TYPE_LEVEL_HIGH>, <150 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "ecc_ce", "ecc_ue", "ecc_sbr", "dfi_e"; + + clocks = <&pclk>, <&aclk>, <&core_clk>, <&sbr_clk>; + clock-names = "pclk", "aclk", "core", "sbr"; + }; +... diff --git a/Documentation/devicetree/bindings/memory-controllers/synopsys,ddrc-ecc.yaml b/Documentation/devicetree/bindings/memory-controllers/synopsys,ddrc-ecc.yaml deleted file mode 100644 index f46e95704f53..000000000000 --- a/Documentation/devicetree/bindings/memory-controllers/synopsys,ddrc-ecc.yaml +++ /dev/null @@ -1,76 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/memory-controllers/synopsys,ddrc-ecc.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Synopsys IntelliDDR Multi Protocol memory controller - -maintainers: - - Krzysztof Kozlowski <krzk@kernel.org> - - Manish Narani <manish.narani@xilinx.com> - - Michal Simek <michal.simek@xilinx.com> - -description: | - The ZynqMP DDR ECC controller has an optional ECC support in 64-bit and - 32-bit bus width configurations. - - The Zynq DDR ECC controller has an optional ECC support in half-bus width - (16-bit) configuration. - - These both ECC controllers correct single bit ECC errors and detect double bit - ECC errors. - -properties: - compatible: - enum: - - snps,ddrc-3.80a - - xlnx,zynq-ddrc-a05 - - xlnx,zynqmp-ddrc-2.40a - - interrupts: - maxItems: 1 - - reg: - maxItems: 1 - -required: - - compatible - - reg - -allOf: - - if: - properties: - compatible: - contains: - enum: - - snps,ddrc-3.80a - - xlnx,zynqmp-ddrc-2.40a - then: - required: - - interrupts - else: - properties: - interrupts: false - -additionalProperties: false - -examples: - - | - memory-controller@f8006000 { - compatible = "xlnx,zynq-ddrc-a05"; - reg = <0xf8006000 0x1000>; - }; - - - | - axi { - #address-cells = <2>; - #size-cells = <2>; - - memory-controller@fd070000 { - compatible = "xlnx,zynqmp-ddrc-2.40a"; - reg = <0x0 0xfd070000 0x0 0x30000>; - interrupt-parent = <&gic>; - interrupts = <0 112 4>; - }; - }; diff --git a/Documentation/devicetree/bindings/memory-controllers/xlnx,zynq-ddrc-a05.yaml b/Documentation/devicetree/bindings/memory-controllers/xlnx,zynq-ddrc-a05.yaml new file mode 100644 index 000000000000..8f72e2f8588a --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/xlnx,zynq-ddrc-a05.yaml @@ -0,0 +1,38 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/memory-controllers/xlnx,zynq-ddrc-a05.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Zynq A05 DDR Memory Controller + +maintainers: + - Krzysztof Kozlowski <krzk@kernel.org> + - Manish Narani <manish.narani@xilinx.com> + - Michal Simek <michal.simek@xilinx.com> + +description: + The Zynq DDR ECC controller has an optional ECC support in half-bus width + (16-bit) configuration. It is cappable of correcting single bit ECC errors + and detecting double bit ECC errors. + +properties: + compatible: + const: xlnx,zynq-ddrc-a05 + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + memory-controller@f8006000 { + compatible = "xlnx,zynq-ddrc-a05"; + reg = <0xf8006000 0x1000>; + }; +... diff --git a/Documentation/devicetree/bindings/mfd/allwinner,sun4i-a10-ts.yaml b/Documentation/devicetree/bindings/mfd/allwinner,sun4i-a10-ts.yaml index f591332fc462..93f5065a6280 100644 --- a/Documentation/devicetree/bindings/mfd/allwinner,sun4i-a10-ts.yaml +++ b/Documentation/devicetree/bindings/mfd/allwinner,sun4i-a10-ts.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/mfd/allwinner,sun4i-a10-ts.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 Resistive Touchscreen Controller Device Tree Bindings +title: Allwinner A10 Resistive Touchscreen Controller maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/mfd/allwinner,sun6i-a31-prcm.yaml b/Documentation/devicetree/bindings/mfd/allwinner,sun6i-a31-prcm.yaml index d131759ccaf3..cf94176fe1eb 100644 --- a/Documentation/devicetree/bindings/mfd/allwinner,sun6i-a31-prcm.yaml +++ b/Documentation/devicetree/bindings/mfd/allwinner,sun6i-a31-prcm.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/mfd/allwinner,sun6i-a31-prcm.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A31 PRCM Device Tree Bindings +title: Allwinner A31 PRCM maintainers: - Chen-Yu Tsai <wens@csie.org> @@ -22,6 +22,7 @@ properties: patternProperties: "^.*_(clk|rst)$": type: object + unevaluatedProperties: false properties: compatible: @@ -38,6 +39,45 @@ patternProperties: properties: compatible: contains: + const: fixed-factor-clock + + then: + $ref: /schemas/clock/fixed-factor-clock.yaml# + + - if: + properties: + compatible: + contains: + const: allwinner,sun4i-a10-mod0-clk + + then: + properties: + "#clock-cells": + const: 0 + + # Already checked in the main schema + compatible: true + + clocks: + maxItems: 2 + + clock-output-names: + maxItems: 1 + + phandle: true + + required: + - "#clock-cells" + - compatible + - clocks + - clock-output-names + + additionalProperties: false + + - if: + properties: + compatible: + contains: const: allwinner,sun6i-a31-apb0-clk then: diff --git a/Documentation/devicetree/bindings/mfd/allwinner,sun8i-a23-prcm.yaml b/Documentation/devicetree/bindings/mfd/allwinner,sun8i-a23-prcm.yaml index aa5e683b236c..16c80a7eec49 100644 --- a/Documentation/devicetree/bindings/mfd/allwinner,sun8i-a23-prcm.yaml +++ b/Documentation/devicetree/bindings/mfd/allwinner,sun8i-a23-prcm.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/mfd/allwinner,sun8i-a23-prcm.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A23 PRCM Device Tree Bindings +title: Allwinner A23 PRCM maintainers: - Chen-Yu Tsai <wens@csie.org> @@ -22,6 +22,7 @@ properties: patternProperties: "^.*(clk|rst|codec).*$": type: object + unevaluatedProperties: false properties: compatible: @@ -40,6 +41,15 @@ patternProperties: properties: compatible: contains: + const: fixed-factor-clock + + then: + $ref: /schemas/clock/fixed-factor-clock.yaml# + + - if: + properties: + compatible: + contains: const: allwinner,sun8i-a23-apb0-clk then: diff --git a/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml b/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml new file mode 100644 index 000000000000..1689b986f441 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml @@ -0,0 +1,110 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/aspeed,ast2x00-scu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Aspeed System Control Unit + +description: + The Aspeed System Control Unit manages the global behaviour of the SoC, + configuring elements such as clocks, pinmux, and reset. + +maintainers: + - Joel Stanley <joel@jms.id.au> + - Andrew Jeffery <andrew@aj.id.au> + +properties: + compatible: + items: + - enum: + - aspeed,ast2400-scu + - aspeed,ast2500-scu + - aspeed,ast2600-scu + - const: syscon + - const: simple-mfd + + reg: + maxItems: 1 + + ranges: true + + '#address-cells': + const: 1 + + '#size-cells': + const: 1 + + '#clock-cells': + const: 1 + + '#reset-cells': + const: 1 + +patternProperties: + '^p2a-control@[0-9a-f]+$': + description: See Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt + type: object + + '^pinctrl(@[0-9a-f]+)?$': + oneOf: + - $ref: /schemas/pinctrl/aspeed,ast2400-pinctrl.yaml + - $ref: /schemas/pinctrl/aspeed,ast2500-pinctrl.yaml + - $ref: /schemas/pinctrl/aspeed,ast2600-pinctrl.yaml + + '^interrupt-controller@[0-9a-f]+$': + description: See Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2xxx-scu-ic.txt + type: object + + '^silicon-id@[0-9a-f]+$': + description: Unique hardware silicon identifiers within the SoC + type: object + additionalProperties: false + + properties: + compatible: + items: + - enum: + - aspeed,ast2400-silicon-id + - aspeed,ast2500-silicon-id + - aspeed,ast2600-silicon-id + - const: aspeed,silicon-id + + reg: + description: + The reg should be the unique silicon id register, and not backwards + compatible one in eg. the 2600. + minItems: 1 + items: + - description: silicon id information registers + - description: unique chip id registers + +required: + - compatible + - reg + - ranges + - '#address-cells' + - '#size-cells' + - '#clock-cells' + - '#reset-cells' + +additionalProperties: false + +examples: + - | + syscon@1e6e2000 { + compatible = "aspeed,ast2400-scu", "syscon", "simple-mfd"; + reg = <0x1e6e2000 0x1a8>; + #clock-cells = <1>; + #reset-cells = <1>; + + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x1e6e2000 0x1000>; + + silicon-id@7c { + compatible = "aspeed,ast2500-silicon-id", "aspeed,silicon-id"; + reg = <0x7c 0x4>, <0x150 0x8>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/mfd/aspeed-scu.txt b/Documentation/devicetree/bindings/mfd/aspeed-scu.txt deleted file mode 100644 index 857ee33f7329..000000000000 --- a/Documentation/devicetree/bindings/mfd/aspeed-scu.txt +++ /dev/null @@ -1,48 +0,0 @@ -The Aspeed System Control Unit manages the global behaviour of the SoC, -configuring elements such as clocks, pinmux, and reset. - -Required properties: -- compatible: One of: - "aspeed,ast2400-scu", "syscon", "simple-mfd" - "aspeed,ast2500-scu", "syscon", "simple-mfd" - -- reg: contains the offset and length of the SCU memory region -- #clock-cells: should be set to <1> - the system controller is also a - clock provider -- #reset-cells: should be set to <1> - the system controller is also a - reset line provider - -Example: - -syscon: syscon@1e6e2000 { - compatible = "aspeed,ast2400-scu", "syscon", "simple-mfd"; - reg = <0x1e6e2000 0x1a8>; - #clock-cells = <1>; - #reset-cells = <1>; -}; - -Silicon ID ------------------ - -Families have unique hardware silicon identifiers within the SoC. - -Required properties: - - - compatible: "aspeed,silicon-id" or: - "aspeed,ast2400-silicon-id" or - "aspeed,ast2500-silicon-id" or - "aspeed,ast2600-silicon-id" - - - reg: offset and length of the silicon id information - optionally, a second offset and length describes the unique chip id - - The reg should be the unique silicon id register, and - not backwards compatible one in eg. the 2600. - -Example: - - -silicon-id@7c { - compatible = "aspeed,ast2500-silicon-id", "aspeed,silicon-id"; - reg = <0x7c 0x4 0x150 0x8>; -}; diff --git a/Documentation/devicetree/bindings/mfd/atmel-usart.txt b/Documentation/devicetree/bindings/mfd/atmel-usart.txt deleted file mode 100644 index a09133066aff..000000000000 --- a/Documentation/devicetree/bindings/mfd/atmel-usart.txt +++ /dev/null @@ -1,98 +0,0 @@ -* Atmel Universal Synchronous Asynchronous Receiver/Transmitter (USART) - -Required properties for USART: -- compatible: Should be one of the following: - - "atmel,at91rm9200-usart" - - "atmel,at91sam9260-usart" - - "microchip,sam9x60-usart" - - "atmel,at91rm9200-dbgu", "atmel,at91rm9200-usart" - - "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart" - - "microchip,sam9x60-dbgu", "microchip,sam9x60-usart" -- reg: Should contain registers location and length -- interrupts: Should contain interrupt -- clock-names: tuple listing input clock names. - Required elements: "usart" -- clocks: phandles to input clocks. - -Required properties for USART in SPI mode: -- #size-cells : Must be <0> -- #address-cells : Must be <1> -- cs-gpios: chipselects (internal cs not supported) -- atmel,usart-mode : Must be <AT91_USART_MODE_SPI> (found in dt-bindings/mfd/at91-usart.h) - -Optional properties in serial and SPI mode: -- dma bindings for dma transfer: - - dmas: DMA specifier, consisting of a phandle to DMA controller node, - memory peripheral interface and USART DMA channel ID, FIFO configuration. - The order of DMA channels is fixed. The first DMA channel must be TX - associated channel and the second one must be RX associated channel. - Refer to dma.txt and atmel-dma.txt for details. - - dma-names: "tx" for TX channel. - "rx" for RX channel. - The order of dma-names is also fixed. The first name must be "tx" - and the second one must be "rx" as in the examples below. - -Optional properties in serial mode: -- atmel,use-dma-rx: use of PDC or DMA for receiving data -- atmel,use-dma-tx: use of PDC or DMA for transmitting data -- {rts,cts,dtr,dsr,rng,dcd}-gpios: specify a GPIO for RTS/CTS/DTR/DSR/RI/DCD line respectively. - It will use specified PIO instead of the peripheral function pin for the USART feature. - If unsure, don't specify this property. -- atmel,fifo-size: maximum number of data the RX and TX FIFOs can store for FIFO - capable USARTs. -- rs485-rts-delay, rs485-rx-during-tx, linux,rs485-enabled-at-boot-time: see rs485.txt - -<chip> compatible description: -- at91rm9200: legacy USART support -- at91sam9260: generic USART implementation for SAM9 SoCs - -Example: -- use PDC: - usart0: serial@fff8c000 { - compatible = "atmel,at91sam9260-usart"; - reg = <0xfff8c000 0x4000>; - interrupts = <7>; - clocks = <&usart0_clk>; - clock-names = "usart"; - atmel,use-dma-rx; - atmel,use-dma-tx; - rts-gpios = <&pioD 15 GPIO_ACTIVE_LOW>; - cts-gpios = <&pioD 16 GPIO_ACTIVE_LOW>; - dtr-gpios = <&pioD 17 GPIO_ACTIVE_LOW>; - dsr-gpios = <&pioD 18 GPIO_ACTIVE_LOW>; - dcd-gpios = <&pioD 20 GPIO_ACTIVE_LOW>; - rng-gpios = <&pioD 19 GPIO_ACTIVE_LOW>; - }; - -- use DMA: - usart0: serial@f001c000 { - compatible = "atmel,at91sam9260-usart"; - reg = <0xf001c000 0x100>; - interrupts = <12 4 5>; - clocks = <&usart0_clk>; - clock-names = "usart"; - atmel,use-dma-rx; - atmel,use-dma-tx; - dmas = <&dma0 2 0x3>, - <&dma0 2 0x204>; - dma-names = "tx", "rx"; - atmel,fifo-size = <32>; - }; - -- SPI mode: - #include <dt-bindings/mfd/at91-usart.h> - - spi0: spi@f001c000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "atmel,at91rm9200-usart", "atmel,at91sam9260-usart"; - atmel,usart-mode = <AT91_USART_MODE_SPI>; - reg = <0xf001c000 0x100>; - interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>; - clocks = <&usart0_clk>; - clock-names = "usart"; - dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>, - <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>; - dma-names = "tx", "rx"; - cs-gpios = <&pioB 3 0>; - }; diff --git a/Documentation/devicetree/bindings/mfd/brcm,bcm6318-gpio-sysctl.yaml b/Documentation/devicetree/bindings/mfd/brcm,bcm6318-gpio-sysctl.yaml index afc569bc15cf..148f1da47603 100644 --- a/Documentation/devicetree/bindings/mfd/brcm,bcm6318-gpio-sysctl.yaml +++ b/Documentation/devicetree/bindings/mfd/brcm,bcm6318-gpio-sysctl.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/mfd/brcm,bcm6318-gpio-sysctl.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Broadcom BCM6318 GPIO System Controller Device Tree Bindings +title: Broadcom BCM6318 GPIO System Controller maintainers: - Ãlvaro Fernández Rojas <noltari@gmail.com> diff --git a/Documentation/devicetree/bindings/mfd/brcm,bcm63268-gpio-sysctl.yaml b/Documentation/devicetree/bindings/mfd/brcm,bcm63268-gpio-sysctl.yaml index c7771c86d7c1..7e582243ea76 100644 --- a/Documentation/devicetree/bindings/mfd/brcm,bcm63268-gpio-sysctl.yaml +++ b/Documentation/devicetree/bindings/mfd/brcm,bcm63268-gpio-sysctl.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/mfd/brcm,bcm63268-gpio-sysctl.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Broadcom BCM63268 GPIO System Controller Device Tree Bindings +title: Broadcom BCM63268 GPIO System Controller maintainers: - Ãlvaro Fernández Rojas <noltari@gmail.com> diff --git a/Documentation/devicetree/bindings/mfd/brcm,bcm6328-gpio-sysctl.yaml b/Documentation/devicetree/bindings/mfd/brcm,bcm6328-gpio-sysctl.yaml index 33963c11ae62..2230848e11c3 100644 --- a/Documentation/devicetree/bindings/mfd/brcm,bcm6328-gpio-sysctl.yaml +++ b/Documentation/devicetree/bindings/mfd/brcm,bcm6328-gpio-sysctl.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/mfd/brcm,bcm6328-gpio-sysctl.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Broadcom BCM6328 GPIO System Controller Device Tree Bindings +title: Broadcom BCM6328 GPIO System Controller maintainers: - Ãlvaro Fernández Rojas <noltari@gmail.com> diff --git a/Documentation/devicetree/bindings/mfd/brcm,bcm6358-gpio-sysctl.yaml b/Documentation/devicetree/bindings/mfd/brcm,bcm6358-gpio-sysctl.yaml index 3e44bea78b03..c06693b6f7aa 100644 --- a/Documentation/devicetree/bindings/mfd/brcm,bcm6358-gpio-sysctl.yaml +++ b/Documentation/devicetree/bindings/mfd/brcm,bcm6358-gpio-sysctl.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/mfd/brcm,bcm6358-gpio-sysctl.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Broadcom BCM6358 GPIO System Controller Device Tree Bindings +title: Broadcom BCM6358 GPIO System Controller maintainers: - Ãlvaro Fernández Rojas <noltari@gmail.com> diff --git a/Documentation/devicetree/bindings/mfd/brcm,bcm6362-gpio-sysctl.yaml b/Documentation/devicetree/bindings/mfd/brcm,bcm6362-gpio-sysctl.yaml index 48d14a5fe0d5..c560bede0e37 100644 --- a/Documentation/devicetree/bindings/mfd/brcm,bcm6362-gpio-sysctl.yaml +++ b/Documentation/devicetree/bindings/mfd/brcm,bcm6362-gpio-sysctl.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/mfd/brcm,bcm6362-gpio-sysctl.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Broadcom BCM6362 GPIO System Controller Device Tree Bindings +title: Broadcom BCM6362 GPIO System Controller maintainers: - Ãlvaro Fernández Rojas <noltari@gmail.com> diff --git a/Documentation/devicetree/bindings/mfd/brcm,bcm6368-gpio-sysctl.yaml b/Documentation/devicetree/bindings/mfd/brcm,bcm6368-gpio-sysctl.yaml index 307270b0cfed..c534f5f2404e 100644 --- a/Documentation/devicetree/bindings/mfd/brcm,bcm6368-gpio-sysctl.yaml +++ b/Documentation/devicetree/bindings/mfd/brcm,bcm6368-gpio-sysctl.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/mfd/brcm,bcm6368-gpio-sysctl.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Broadcom BCM6368 GPIO System Controller Device Tree Bindings +title: Broadcom BCM6368 GPIO System Controller maintainers: - Ãlvaro Fernández Rojas <noltari@gmail.com> diff --git a/Documentation/devicetree/bindings/mfd/canaan,k210-sysctl.yaml b/Documentation/devicetree/bindings/mfd/canaan,k210-sysctl.yaml index c24ad45cabb5..e2046f07a40e 100644 --- a/Documentation/devicetree/bindings/mfd/canaan,k210-sysctl.yaml +++ b/Documentation/devicetree/bindings/mfd/canaan,k210-sysctl.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/mfd/canaan,k210-sysctl.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Canaan Kendryte K210 System Controller Device Tree Bindings +title: Canaan Kendryte K210 System Controller maintainers: - Damien Le Moal <damien.lemoal@wdc.com> diff --git a/Documentation/devicetree/bindings/mfd/cirrus,lochnagar.yaml b/Documentation/devicetree/bindings/mfd/cirrus,lochnagar.yaml index ad285cb480c9..ebbedabb2bd4 100644 --- a/Documentation/devicetree/bindings/mfd/cirrus,lochnagar.yaml +++ b/Documentation/devicetree/bindings/mfd/cirrus,lochnagar.yaml @@ -144,6 +144,7 @@ properties: CODECs digital core if not being provided by an internal regulator. type: object $ref: /schemas/regulator/regulator.yaml# + unevaluatedProperties: false properties: compatible: enum: @@ -161,6 +162,7 @@ properties: CODECs MICVDD. type: object $ref: /schemas/regulator/regulator.yaml# + unevaluatedProperties: false properties: compatible: enum: @@ -177,6 +179,7 @@ properties: Initialisation data for the MIC1VDD supplies. type: object $ref: /schemas/regulator/regulator.yaml# + unevaluatedProperties: false properties: compatible: enum: @@ -202,6 +205,7 @@ properties: Initialisation data for the MIC2VDD supplies. type: object $ref: /schemas/regulator/regulator.yaml# + unevaluatedProperties: false properties: compatible: enum: @@ -228,6 +232,7 @@ properties: the CODECs analog and 1.8V digital supplies. type: object $ref: /schemas/regulator/regulator.yaml# + unevaluatedProperties: false properties: compatible: enum: @@ -261,7 +266,7 @@ additionalProperties: false examples: - | - #include <dt-bindings/clk/lochnagar.h> + #include <dt-bindings/clock/lochnagar.h> #include <dt-bindings/pinctrl/lochnagar.h> i2c@e0004000 { #address-cells = <1>; diff --git a/Documentation/devicetree/bindings/mfd/dlg,da9063.yaml b/Documentation/devicetree/bindings/mfd/dlg,da9063.yaml index d71933460e90..e8e74e91070c 100644 --- a/Documentation/devicetree/bindings/mfd/dlg,da9063.yaml +++ b/Documentation/devicetree/bindings/mfd/dlg,da9063.yaml @@ -71,8 +71,9 @@ properties: regulators: type: object + additionalProperties: false patternProperties: - "^(ldo[1-11]|bcore[1-2]|bpro|bmem|bio|bperi)$": + "^(ldo([1-9]|1[01])|bcore([1-2]|s-merged)|b(pro|mem|io|peri)|bmem-bio-merged)$": $ref: /schemas/regulator/regulator.yaml unevaluatedProperties: false @@ -112,7 +113,7 @@ examples: }; regulators { - regulator-bcore1 { + bcore1 { regulator-name = "BCORE1"; regulator-min-microvolt = <300000>; regulator-max-microvolt = <1570000>; @@ -120,7 +121,7 @@ examples: regulator-max-microamp = <2000000>; regulator-boot-on; }; - regulator-ldo11 { + ldo11 { regulator-name = "LDO_11"; regulator-min-microvolt = <900000>; regulator-max-microvolt = <3600000>; diff --git a/Documentation/devicetree/bindings/mfd/gateworks-gsc.yaml b/Documentation/devicetree/bindings/mfd/gateworks-gsc.yaml index 5e0fe3ebe1d2..acb9c54942d9 100644 --- a/Documentation/devicetree/bindings/mfd/gateworks-gsc.yaml +++ b/Documentation/devicetree/bindings/mfd/gateworks-gsc.yaml @@ -46,6 +46,7 @@ properties: adc: type: object + additionalProperties: false description: Optional hardware monitoring module properties: @@ -59,8 +60,9 @@ properties: const: 0 patternProperties: - "^channel@[0-9]+$": + "^channel@[0-9a-f]+$": type: object + additionalProperties: false description: | Properties for a single ADC which can report cooked values (i.e. temperature sensor based on thermister), raw values @@ -113,6 +115,7 @@ properties: patternProperties: "^fan-controller@[0-9a-f]+$": type: object + additionalProperties: false description: Optional fan controller properties: diff --git a/Documentation/devicetree/bindings/mfd/khadas,mcu.yaml b/Documentation/devicetree/bindings/mfd/khadas,mcu.yaml index a3b976f101e8..084960fd5a1f 100644 --- a/Documentation/devicetree/bindings/mfd/khadas,mcu.yaml +++ b/Documentation/devicetree/bindings/mfd/khadas,mcu.yaml @@ -4,10 +4,10 @@ $id: http://devicetree.org/schemas/mfd/khadas,mcu.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Khadas on-board Microcontroller Device Tree Bindings +title: Khadas on-board Microcontroller maintainers: - - Neil Armstrong <narmstrong@baylibre.com> + - Neil Armstrong <neil.armstrong@linaro.org> description: | Khadas embeds a microcontroller on their VIM and Edge boards adding some diff --git a/Documentation/devicetree/bindings/mfd/maxim,max14577.yaml b/Documentation/devicetree/bindings/mfd/maxim,max14577.yaml index 52edd1bf549f..995e96ee7445 100644 --- a/Documentation/devicetree/bindings/mfd/maxim,max14577.yaml +++ b/Documentation/devicetree/bindings/mfd/maxim,max14577.yaml @@ -39,6 +39,7 @@ properties: extcon: type: object + additionalProperties: false properties: compatible: enum: diff --git a/Documentation/devicetree/bindings/mfd/maxim,max77843.yaml b/Documentation/devicetree/bindings/mfd/maxim,max77843.yaml index f30f96bbff43..2e2a2a86b57d 100644 --- a/Documentation/devicetree/bindings/mfd/maxim,max77843.yaml +++ b/Documentation/devicetree/bindings/mfd/maxim,max77843.yaml @@ -32,6 +32,7 @@ properties: motor-driver: type: object + additionalProperties: false properties: compatible: const: maxim,max77843-haptic diff --git a/Documentation/devicetree/bindings/mfd/mediatek,mt6370.yaml b/Documentation/devicetree/bindings/mfd/mediatek,mt6370.yaml new file mode 100644 index 000000000000..250484d59ecd --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/mediatek,mt6370.yaml @@ -0,0 +1,280 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/mediatek,mt6370.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek MT6370 SubPMIC + +maintainers: + - ChiYuan Huang <cy_huang@richtek.com> + +description: | + MT6370 is a highly-integrated smart power management IC, which includes a + single cell Li-Ion/Li-Polymer switching battery charger, a USB Type-C & + Power Delivery (PD) controller, dual flash LED current sources, a RGB LED + driver, a backlight WLED driver, a display bias driver and a general LDO for + portable devices. + +properties: + compatible: + const: mediatek,mt6370 + + reg: + maxItems: 1 + + wakeup-source: true + + interrupts: + maxItems: 1 + + interrupt-controller: true + + "#interrupt-cells": + const: 1 + + adc: + type: object + description: | + Provides 9 channels for system monitoring, including VBUSDIV5 (lower + accuracy, higher measure range), VBUSDIV2 (higher accuracy, lower + measure range), VBAT, VSYS, CHG_VDDP, TS_BAT, IBUS, IBAT, and TEMP_JC. + + properties: + compatible: + const: mediatek,mt6370-adc + + "#io-channel-cells": + const: 1 + + required: + - compatible + - "#io-channel-cells" + + backlight: + type: object + $ref: /schemas/leds/backlight/mediatek,mt6370-backlight.yaml# + + charger: + type: object + $ref: /schemas/power/supply/mediatek,mt6370-charger.yaml# + + tcpc: + type: object + $ref: /schemas/usb/mediatek,mt6370-tcpc.yaml# + + indicator: + type: object + $ref: /schemas/leds/mediatek,mt6370-indicator.yaml# + + flashlight: + type: object + $ref: /schemas/leds/mediatek,mt6370-flashlight.yaml# + + regulators: + type: object + description: | + List all supported regulators, which support the control for DisplayBias + voltages and one general purpose LDO which commonly used to drive the + vibrator. + + patternProperties: + "^(dsvbst|vibldo)$": + $ref: /schemas/regulator/regulator.yaml# + type: object + unevaluatedProperties: false + + "^(dsvpos|dsvneg)$": + $ref: /schemas/regulator/regulator.yaml# + type: object + unevaluatedProperties: false + + properties: + enable-gpios: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - interrupt-controller + - "#interrupt-cells" + - regulators + - adc + - backlight + - indicator + - tcpc + - charger + - flashlight + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/leds/common.h> + #include <dt-bindings/iio/adc/mediatek,mt6370_adc.h> + #include <dt-bindings/usb/pd.h> + i2c { + #address-cells = <1>; + #size-cells = <0>; + + pmic@34 { + compatible = "mediatek,mt6370"; + reg = <0x34>; + wakeup-source; + interrupts-extended = <&gpio26 3 IRQ_TYPE_LEVEL_LOW>; + interrupt-controller; + #interrupt-cells = <1>; + + mt6370_adc: adc { + compatible = "mediatek,mt6370-adc"; + #io-channel-cells = <1>; + }; + + backlight { + compatible = "mediatek,mt6370-backlight"; + mediatek,bled-channel-use = /bits/ 8 <15>; + }; + + charger { + compatible = "mediatek,mt6370-charger"; + interrupts = <48>, <68>, <6>; + interrupt-names = "attach_i", "uvp_d_evt", "mivr"; + io-channels = <&mt6370_adc MT6370_CHAN_IBUS>; + + mt6370_otg_vbus: usb-otg-vbus-regulator { + regulator-name = "mt6370-usb-otg-vbus"; + regulator-min-microvolt = <4350000>; + regulator-max-microvolt = <5800000>; + regulator-min-microamp = <500000>; + regulator-max-microamp = <3000000>; + }; + }; + + indicator { + compatible = "mediatek,mt6370-indicator"; + #address-cells = <1>; + #size-cells = <0>; + + multi-led@0 { + reg = <0>; + function = LED_FUNCTION_INDICATOR; + color = <LED_COLOR_ID_RGB>; + led-max-microamp = <24000>; + #address-cells = <1>; + #size-cells = <0>; + led@0 { + reg = <0>; + color = <LED_COLOR_ID_RED>; + }; + led@1 { + reg = <1>; + color = <LED_COLOR_ID_GREEN>; + }; + led@2 { + reg = <2>; + color = <LED_COLOR_ID_BLUE>; + }; + }; + led@3 { + reg = <3>; + function = LED_FUNCTION_INDICATOR; + color = <LED_COLOR_ID_WHITE>; + led-max-microamp = <6000>; + }; + }; + + flashlight { + compatible = "mediatek,mt6370-flashlight"; + #address-cells = <1>; + #size-cells = <0>; + led@0 { + reg = <0>; + led-sources = <0>; + function = LED_FUNCTION_FLASH; + color = <LED_COLOR_ID_WHITE>; + function-enumerator = <1>; + led-max-microamp = <200000>; + flash-max-microamp = <500000>; + flash-max-timeout-us = <1248000>; + }; + led@1 { + reg = <1>; + led-sources = <1>; + function = LED_FUNCTION_FLASH; + color = <LED_COLOR_ID_WHITE>; + function-enumerator = <2>; + led-max-microamp = <200000>; + flash-max-microamp = <500000>; + flash-max-timeout-us = <1248000>; + }; + }; + + tcpc { + compatible = "mediatek,mt6370-tcpc"; + interrupts-extended = <&gpio26 4 IRQ_TYPE_LEVEL_LOW>; + + connector { + compatible = "usb-c-connector"; + label = "USB-C"; + vbus-supply = <&mt6370_otg_vbus>; + data-role = "dual"; + power-role = "dual"; + try-power-role = "sink"; + source-pdos = <PDO_FIXED(5000, 1000, PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP)>; + sink-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP)>; + op-sink-microwatt = <10000000>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + endpoint { + remote-endpoint = <&usb_hs>; + }; + }; + port@1 { + reg = <1>; + endpoint { + remote-endpoint = <&usb_ss>; + }; + }; + port@2 { + reg = <2>; + endpoint { + remote-endpoint = <&dp_aux>; + }; + }; + }; + }; + }; + + regulators { + dsvbst { + regulator-name = "mt6370-dsv-vbst"; + regulator-min-microvolt = <4000000>; + regulator-max-microvolt = <6200000>; + }; + dsvpos { + regulator-name = "mt6370-dsv-vpos"; + regulator-min-microvolt = <4000000>; + regulator-max-microvolt = <6000000>; + regulator-boot-on; + }; + dsvneg { + regulator-name = "mt6370-dsv-vneg"; + regulator-min-microvolt = <4000000>; + regulator-max-microvolt = <6000000>; + regulator-boot-on; + }; + vibldo { + regulator-name = "mt6370-vib-ldo"; + regulator-min-microvolt = <1600000>; + regulator-max-microvolt = <4000000>; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/mfd/mediatek,mt8195-scpsys.yaml b/Documentation/devicetree/bindings/mfd/mediatek,mt8195-scpsys.yaml new file mode 100644 index 000000000000..c8c4812fffe2 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/mediatek,mt8195-scpsys.yaml @@ -0,0 +1,68 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/mediatek,mt8195-scpsys.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek System Control Processor System + +maintainers: + - MandyJH Liu <mandyjh.liu@mediatek.com> + +description: + MediaTek System Control Processor System (SCPSYS) has several + power management tasks. The tasks include MTCMOS power + domain control, thermal measurement, DVFS, etc. + +properties: + compatible: + items: + - enum: + - mediatek,mt8167-scpsys + - mediatek,mt8173-scpsys + - mediatek,mt8183-scpsys + - mediatek,mt8186-scpsys + - mediatek,mt8192-scpsys + - mediatek,mt8195-scpsys + - const: syscon + - const: simple-mfd + + reg: + maxItems: 1 + + power-controller: + $ref: /schemas/power/mediatek,power-controller.yaml# + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/mt8195-clk.h> + #include <dt-bindings/power/mt8195-power.h> + + syscon@10006000 { + compatible = "mediatek,mt8195-scpsys", "syscon", "simple-mfd"; + reg = <0x10006000 0x100>; + + spm: power-controller { + compatible = "mediatek,mt8195-power-controller"; + #address-cells = <1>; + #size-cells = <0>; + #power-domain-cells = <1>; + + /* sample of power domain nodes */ + power-domain@MT8195_POWER_DOMAIN_PCIE_PHY { + reg = <MT8195_POWER_DOMAIN_PCIE_PHY>; + #power-domain-cells = <0>; + }; + + power-domain@MT8195_POWER_DOMAIN_SSUSB_PCIE_PHY { + reg = <MT8195_POWER_DOMAIN_SSUSB_PCIE_PHY>; + #power-domain-cells = <0>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/mfd/mscc,ocelot.yaml b/Documentation/devicetree/bindings/mfd/mscc,ocelot.yaml new file mode 100644 index 000000000000..8bf45a5673a4 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/mscc,ocelot.yaml @@ -0,0 +1,160 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */ +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/mscc,ocelot.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Ocelot Externally-Controlled Ethernet Switch + +maintainers: + - Colin Foster <colin.foster@in-advantage.com> + +description: | + The Ocelot ethernet switch family contains chips that have an internal CPU + (VSC7513, VSC7514) and chips that don't (VSC7511, VSC7512). All switches have + the option to be controlled externally, which is the purpose of this driver. + + The switch family is a multi-port networking switch that supports many + interfaces. Additionally, the device can perform pin control, MDIO buses, and + external GPIO expanders. + +properties: + compatible: + enum: + - mscc,vsc7512 + + reg: + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + + spi-max-frequency: + maxItems: 1 + +patternProperties: + "^pinctrl@[0-9a-f]+$": + type: object + $ref: /schemas/pinctrl/mscc,ocelot-pinctrl.yaml + + "^gpio@[0-9a-f]+$": + type: object + $ref: /schemas/pinctrl/microchip,sparx5-sgpio.yaml + properties: + compatible: + enum: + - mscc,ocelot-sgpio + + "^mdio@[0-9a-f]+$": + type: object + $ref: /schemas/net/mscc,miim.yaml + properties: + compatible: + enum: + - mscc,ocelot-miim + +required: + - compatible + - reg + - '#address-cells' + - '#size-cells' + - spi-max-frequency + +additionalProperties: false + +examples: + - | + ocelot_clock: ocelot-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <125000000>; + }; + + spi { + #address-cells = <1>; + #size-cells = <0>; + + soc@0 { + compatible = "mscc,vsc7512"; + spi-max-frequency = <2500000>; + reg = <0>; + #address-cells = <1>; + #size-cells = <1>; + + mdio@7107009c { + compatible = "mscc,ocelot-miim"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x7107009c 0x24>; + + sw_phy0: ethernet-phy@0 { + reg = <0x0>; + }; + }; + + mdio@710700c0 { + compatible = "mscc,ocelot-miim"; + pinctrl-names = "default"; + pinctrl-0 = <&miim1_pins>; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x710700c0 0x24>; + + sw_phy4: ethernet-phy@4 { + reg = <0x4>; + }; + }; + + gpio: pinctrl@71070034 { + compatible = "mscc,ocelot-pinctrl"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&gpio 0 0 22>; + reg = <0x71070034 0x6c>; + + sgpio_pins: sgpio-pins { + pins = "GPIO_0", "GPIO_1", "GPIO_2", "GPIO_3"; + function = "sg0"; + }; + + miim1_pins: miim1-pins { + pins = "GPIO_14", "GPIO_15"; + function = "miim"; + }; + }; + + gpio@710700f8 { + compatible = "mscc,ocelot-sgpio"; + #address-cells = <1>; + #size-cells = <0>; + bus-frequency = <12500000>; + clocks = <&ocelot_clock>; + microchip,sgpio-port-ranges = <0 15>; + pinctrl-names = "default"; + pinctrl-0 = <&sgpio_pins>; + reg = <0x710700f8 0x100>; + + sgpio_in0: gpio@0 { + compatible = "microchip,sparx5-sgpio-bank"; + reg = <0>; + gpio-controller; + #gpio-cells = <3>; + ngpios = <64>; + }; + + sgpio_out1: gpio@1 { + compatible = "microchip,sparx5-sgpio-bank"; + reg = <1>; + gpio-controller; + #gpio-cells = <3>; + ngpios = <64>; + }; + }; + }; + }; + +... + diff --git a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml index 65cbc6dee545..6a3e3ede1ede 100644 --- a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml +++ b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml @@ -33,19 +33,22 @@ properties: compatible: items: - enum: - - qcom,pm660 - - qcom,pm660l - qcom,pm6150 - qcom,pm6150l - qcom,pm6350 + - qcom,pm660 + - qcom,pm660l + - qcom,pm7250b - qcom,pm7325 - qcom,pm8004 - qcom,pm8005 - qcom,pm8009 - qcom,pm8019 + - qcom,pm8028 - qcom,pm8110 - qcom,pm8150 - qcom,pm8150b + - qcom,pm8150c - qcom,pm8150l - qcom,pm8226 - qcom,pm8350 @@ -56,6 +59,7 @@ properties: - qcom,pm8916 - qcom,pm8941 - qcom,pm8950 + - qcom,pm8953 - qcom,pm8994 - qcom,pm8998 - qcom,pma8084 @@ -64,8 +68,10 @@ properties: - qcom,pmi8962 - qcom,pmi8994 - qcom,pmi8998 + - qcom,pmk8002 - qcom,pmk8350 - qcom,pmm8155au + - qcom,pmp8074 - qcom,pmr735a - qcom,pmr735b - qcom,pms405 @@ -90,7 +96,7 @@ properties: regulators: type: object - $ref: /schemas/regulator/regulator.yaml# + $ref: /schemas/regulator/qcom,spmi-regulator.yaml# patternProperties: "^adc@[0-9a-f]+$": @@ -99,7 +105,7 @@ patternProperties: "^adc-tm@[0-9a-f]+$": type: object - $ref: /schemas/thermal/qcom-spmi-adc-tm5.yaml# + # ref depends on compatible, see allOf below "^audio-codec@[0-9a-f]+$": type: object @@ -146,6 +152,22 @@ required: - compatible - reg +allOf: + - if: + properties: + compatible: + contains: + enum: + - qcom,pm8998 + then: + patternProperties: + "^adc-tm@[0-9a-f]+$": + $ref: /schemas/thermal/qcom-spmi-adc-tm-hc.yaml# + else: + patternProperties: + "^adc-tm@[0-9a-f]+$": + $ref: /schemas/thermal/qcom-spmi-adc-tm5.yaml# + additionalProperties: false examples: @@ -188,3 +210,87 @@ examples: }; }; }; + + - | + #include <dt-bindings/input/input.h> + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/iio/qcom,spmi-vadc.h> + #include <dt-bindings/spmi/spmi.h> + + pmic@0 { + compatible = "qcom,pm6150", "qcom,spmi-pmic"; + reg = <0x0 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pon@800 { + compatible = "qcom,pm8998-pon"; + reg = <0x800>; + mode-bootloader = <0x2>; + mode-recovery = <0x1>; + + pwrkey { + compatible = "qcom,pm8941-pwrkey"; + interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>; + debounce = <15625>; + bias-pull-up; + linux,code = <KEY_POWER>; + }; + }; + + temp-alarm@2400 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0x2400>; + interrupts = <0x0 0x24 0x0 IRQ_TYPE_EDGE_RISING>; + io-channels = <&pm6150_adc ADC5_DIE_TEMP>; + io-channel-names = "thermal"; + #thermal-sensor-cells = <0>; + }; + + pm6150_adc: adc@3100 { + compatible = "qcom,spmi-adc5"; + reg = <0x3100>; + interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; + #address-cells = <1>; + #size-cells = <0>; + #io-channel-cells = <1>; + + adc-chan@6 { + reg = <ADC5_DIE_TEMP>; + label = "die_temp"; + }; + + adc-chan@4f { + reg = <ADC5_AMUX_THM3_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + }; + + adc-tm@3500 { + compatible = "qcom,spmi-adc-tm5"; + reg = <0x3500>; + interrupts = <0x0 0x35 0x0 IRQ_TYPE_EDGE_RISING>; + #thermal-sensor-cells = <1>; + #address-cells = <1>; + #size-cells = <0>; + + charger-thermistor@0 { + reg = <0>; + io-channels = <&pm6150_adc ADC5_AMUX_THM3_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; + }; + + pm6150_gpio: gpios@c000 { + compatible = "qcom,pm6150-gpio", "qcom,spmi-gpio"; + reg = <0xc000>; + gpio-controller; + gpio-ranges = <&pm6150_gpio 0 0 10>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; diff --git a/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml b/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml index 2f816fd0c9ec..b12809b5cc22 100644 --- a/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml +++ b/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml @@ -15,23 +15,27 @@ description: properties: compatible: - oneOf: - - items: - - enum: - - qcom,tcsr-apq8064 - - qcom,tcsr-apq8084 - - qcom,tcsr-ipq8064 - - qcom,tcsr-mdm9615 - - qcom,tcsr-msm8660 - - qcom,tcsr-msm8916 - - qcom,tcsr-msm8953 - - qcom,tcsr-msm8960 - - qcom,tcsr-msm8974 - - const: syscon - - items: - - const: qcom,tcsr-ipq6018 - - const: syscon - - const: simple-mfd + items: + - enum: + - qcom,msm8998-tcsr + - qcom,qcs404-tcsr + - qcom,sc7180-tcsr + - qcom,sc7280-tcsr + - qcom,sdm630-tcsr + - qcom,sdm845-tcsr + - qcom,sm8150-tcsr + - qcom,tcsr-apq8064 + - qcom,tcsr-apq8084 + - qcom,tcsr-ipq6018 + - qcom,tcsr-ipq8064 + - qcom,tcsr-mdm9615 + - qcom,tcsr-msm8660 + - qcom,tcsr-msm8916 + - qcom,tcsr-msm8953 + - qcom,tcsr-msm8960 + - qcom,tcsr-msm8974 + - qcom,tcsr-msm8996 + - const: syscon reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/mfd/richtek,rt5120.yaml b/Documentation/devicetree/bindings/mfd/richtek,rt5120.yaml new file mode 100644 index 000000000000..f73b8b25d7d5 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/richtek,rt5120.yaml @@ -0,0 +1,178 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/richtek,rt5120.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Richtek RT5120 PMIC + +maintainers: + - ChiYuan Huang <cy_huang@richtek.com> + +description: | + The RT5120 provides four high-efficiency buck converters and one LDO voltage + regulator. The device is targeted at providingthe processor voltage, memory, + I/O, and peripheral rails in home entertainment devices. The I2C interface is + used for dynamic voltage scaling of the processor voltage, power rails on/off + sequence control, operation mode selection. + +properties: + compatible: + enum: + - richtek,rt5120 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + interrupt-controller: true + + "#interrupt-cells": + const: 1 + + wakeup-source: true + + richtek,enable-undervolt-hiccup: + type: boolean + description: | + If used, under voltage protection trigger hiccup behavior, else latchup as + default + + richtek,enable-overvolt-hiccup: + type: boolean + description: + Like as 'enable-uv-hiccup', it configures over voltage protection to + hiccup, else latchup as default + + vin1-supply: + description: phandle for buck1 input power source + + vin2-supply: + description: phandle for buck2 input power source + + vin3-supply: + description: phandle for buck3 input power source + + vin4-supply: + description: phandle for buck4 input power source + + vinldo-supply: + description: phandle for ldo input power source + + regulators: + type: object + + patternProperties: + "^buck[1-4]$": + type: object + $ref: /schemas/regulator/regulator.yaml# + unevaluatedProperties: false + + properties: + regulator-allowed-modes: + description: | + Used to specify the allowed buck converter operating mode + mode mapping: + 0: auto mode + 1: force pwm mode + items: + enum: [0, 1] + + "^(ldo|exten)$": + type: object + $ref: /schemas/regulator/regulator.yaml# + unevaluatedProperties: false + + additionalProperties: false + + powerkey: + type: object + description: + PON key that connected to RT5120 PMIC. + + properties: + compatible: + enum: + - richtek,rt5120-pwrkey + + required: + - compatible + + additionalProperties: false + +required: + - compatible + - reg + - interrupts + - '#interrupt-cells' + - interrupt-controller + - regulators + - powerkey + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + pmic@62 { + compatible = "richtek,rt5120"; + reg = <0x62>; + interrupts-extended = <&gpio_intc 32 IRQ_TYPE_LEVEL_LOW>; + interrupt-controller; + #interrupt-cells = <1>; + wakeup-source; + + regulators { + buck1 { + regulator-name = "rt5120-buck1"; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <1393750>; + regulator-allowed-modes = <0 1>; + regulator-boot-on; + }; + buck2 { + regulator-name = "rt5120-buck2"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-allowed-modes = <0 1>; + regulator-always-on; + }; + buck3 { + regulator-name = "rt5120-buck3"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-allowed-modes = <0 1>; + regulator-always-on; + }; + buck4 { + regulator-name = "rt5120-buck4"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-allowed-modes = <0 1>; + regulator-always-on; + }; + ldo { + regulator-name = "rt5120-ldo"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + exten { + regulator-name = "rt5120-exten"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + }; + }; + powerkey { + compatible = "richtek,rt5120-pwrkey"; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/mfd/rockchip,rk817.yaml b/Documentation/devicetree/bindings/mfd/rockchip,rk817.yaml index bfc1720adc43..935e17099213 100644 --- a/Documentation/devicetree/bindings/mfd/rockchip,rk817.yaml +++ b/Documentation/devicetree/bindings/mfd/rockchip,rk817.yaml @@ -87,6 +87,7 @@ properties: patternProperties: "^(LDO_REG[1-9]|DCDC_REG[1-4]|BOOST|OTG_SWITCH)$": type: object + unevaluatedProperties: false $ref: ../regulator/regulator.yaml# unevaluatedProperties: false @@ -111,12 +112,56 @@ properties: additional properties are required for the codec, this node can be omitted. type: object + additionalProperties: false properties: rockchip,mic-in-differential: type: boolean description: Describes if the microphone uses differential mode. + charger: + description: | + The child node for the charger to hold additional properties. If a + battery is not in use, this node can be omitted. + type: object + properties: + monitored-battery: + description: | + A phandle to a monitored battery node that contains a valid + value for: + charge-full-design-microamp-hours, + charge-term-current-microamp, + constant-charge-current-max-microamp, + constant-charge-voltage-max-microvolt, + voltage-max-design-microvolt, + voltage-min-design-microvolt, + and a valid ocv-capacity table. + + rockchip,resistor-sense-micro-ohms: + description: | + Value in microohms of the battery sense resistor. This value is + used by the driver to set the correct divisor value to translate + ADC readings into the proper units of measure. + enum: [10000, 20000] + + rockchip,sleep-enter-current-microamp: + description: | + Value in microamps of the sleep enter current for the charger. + Value is used by the driver to calibrate the relax threshold. + + rockchip,sleep-filter-current-microamp: + description: + Value in microamps of the sleep filter current for the charger. + Value is used by the driver to derive the sleep sample current. + + required: + - monitored-battery + - rockchip,resistor-sense-micro-ohms + - rockchip,sleep-enter-current-microamp + - rockchip,sleep-filter-current-microamp + + additionalProperties: false + allOf: - if: properties: @@ -323,6 +368,13 @@ examples: }; }; + rk817_charger: charger { + monitored-battery = <&battery>; + rockchip,resistor-sense-micro-ohms = <10000>; + rockchip,sleep-enter-current-microamp = <300000>; + rockchip,sleep-filter-current-microamp = <100000>; + }; + rk817_codec: codec { rockchip,mic-in-differential; }; diff --git a/Documentation/devicetree/bindings/mfd/silergy,sy7636a.yaml b/Documentation/devicetree/bindings/mfd/silergy,sy7636a.yaml index 6de74c701635..ee0be32ac020 100644 --- a/Documentation/devicetree/bindings/mfd/silergy,sy7636a.yaml +++ b/Documentation/devicetree/bindings/mfd/silergy,sy7636a.yaml @@ -42,6 +42,7 @@ properties: vcom: type: object $ref: /schemas/regulator/regulator.yaml# + unevaluatedProperties: false description: The regulator for the compenstation voltage. Enabling/disabling this enables/disables the entire device. diff --git a/Documentation/devicetree/bindings/mfd/sprd,ums512-glbreg.yaml b/Documentation/devicetree/bindings/mfd/sprd,ums512-glbreg.yaml new file mode 100644 index 000000000000..996bd4a17ca3 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/sprd,ums512-glbreg.yaml @@ -0,0 +1,71 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright 2022 Unisoc Inc. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/sprd,ums512-glbreg.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Unisoc System Global Register + +maintainers: + - Orson Zhai <orsonzhai@gmail.com> + - Baolin Wang <baolin.wang7@gmail.com> + - Chunyan Zhang <zhang.lyra@gmail.com> + +description: + Unisoc system global registers provide register map + for clocks and some multimedia modules of the SoC. + +properties: + compatible: + items: + - const: sprd,ums512-glbregs + - const: syscon + - const: simple-mfd + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + + ranges: + maxItems: 1 + + reg: + maxItems: 1 + +patternProperties: + "^clock-controller@[0-9a-f]+$": + type: object + $ref: /schemas/clock/sprd,ums512-clk.yaml# + description: + Clock controller for the SoC clocks. + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + ap_apb_regs: syscon@71000000 { + compatible = "sprd,ums512-glbregs", "syscon", "simple-mfd"; + reg = <0x71000000 0x3000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x71000000 0x3000>; + + clock-controller@0 { + compatible = "sprd,ums512-apahb-gate"; + reg = <0x0 0x2000>; + #clock-cells = <1>; + }; + }; + + - | + ap_intc5_regs: syscon@32360000 { + compatible = "sprd,ums512-glbregs", "syscon", "simple-mfd"; + reg = <0x32360000 0x1000>; + }; diff --git a/Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml b/Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml index a58f08aa430d..d950dd5d48bd 100644 --- a/Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml +++ b/Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml @@ -46,6 +46,7 @@ properties: pwm: type: object + additionalProperties: false properties: compatible: @@ -60,6 +61,7 @@ properties: counter: type: object + additionalProperties: false properties: compatible: @@ -70,6 +72,7 @@ properties: timer: type: object + additionalProperties: false properties: compatible: @@ -81,6 +84,7 @@ properties: patternProperties: "^trigger@[0-9]+$": type: object + additionalProperties: false properties: compatible: diff --git a/Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml b/Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml index 5db00af8e116..e2c3c3b44abb 100644 --- a/Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml +++ b/Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml @@ -69,6 +69,7 @@ properties: pwm: type: object + additionalProperties: false properties: compatible: @@ -104,6 +105,7 @@ properties: counter: type: object + additionalProperties: false properties: compatible: @@ -115,6 +117,7 @@ properties: patternProperties: "^timer@[0-9]+$": type: object + additionalProperties: false properties: compatible: diff --git a/Documentation/devicetree/bindings/mfd/st,stmfx.yaml b/Documentation/devicetree/bindings/mfd/st,stmfx.yaml index b2a4e4aa7ff6..b4d54302582f 100644 --- a/Documentation/devicetree/bindings/mfd/st,stmfx.yaml +++ b/Documentation/devicetree/bindings/mfd/st,stmfx.yaml @@ -57,6 +57,7 @@ properties: patternProperties: "^[a-zA-Z]*-pins$": type: object + additionalProperties: false allOf: - $ref: ../pinctrl/pinmux-node.yaml diff --git a/Documentation/devicetree/bindings/mfd/stericsson,ab8500.yaml b/Documentation/devicetree/bindings/mfd/stericsson,ab8500.yaml index 623a4b5cd27a..6c8d42f27fe8 100644 --- a/Documentation/devicetree/bindings/mfd/stericsson,ab8500.yaml +++ b/Documentation/devicetree/bindings/mfd/stericsson,ab8500.yaml @@ -51,6 +51,7 @@ properties: provides the reference clock for the entire U8500 system and the DB8500 counterpart. type: object + additionalProperties: false properties: compatible: @@ -63,6 +64,7 @@ properties: description: Node describing the AB8500 GPIO controller. A few GPIO pins available for misc usage. type: object + additionalProperties: false properties: compatible: @@ -78,6 +80,7 @@ properties: rtc: description: Node describing the AB8500 battery-backed RTC. type: object + additionalProperties: false properties: compatible: @@ -337,34 +340,40 @@ properties: description: The voltage for the auxilary LDO regulator 1 type: object $ref: ../regulator/regulator.yaml# + unevaluatedProperties: false ab8500_ldo_aux2: description: The voltage for the auxilary LDO regulator 2 type: object $ref: ../regulator/regulator.yaml# + unevaluatedProperties: false ab8500_ldo_aux3: description: The voltage for the auxilary LDO regulator 3 type: object $ref: ../regulator/regulator.yaml# + unevaluatedProperties: false ab8500_ldo_aux4: description: The voltage for the auxilary LDO regulator 4 only present on AB8505 type: object $ref: ../regulator/regulator.yaml# + unevaluatedProperties: false ab8500_ldo_aux5: description: The voltage for the auxilary LDO regulator 5 only present on AB8505 type: object $ref: ../regulator/regulator.yaml# + unevaluatedProperties: false ab8500_ldo_aux6: description: The voltage for the auxilary LDO regulator 6 only present on AB8505 type: object $ref: ../regulator/regulator.yaml# + unevaluatedProperties: false # There is never any AUX7 regulator which is confusing @@ -373,18 +382,21 @@ properties: only present on AB8505 type: object $ref: ../regulator/regulator.yaml# + unevaluatedProperties: false ab8500_ldo_intcore: description: The LDO regulator for the internal core voltage of the AB8500 type: object $ref: ../regulator/regulator.yaml# + unevaluatedProperties: false ab8500_ldo_adc: description: Analog power regulator for the analog to digital converter ADC, only present on AB8505 type: object $ref: ../regulator/regulator.yaml# + unevaluatedProperties: false ab8500_ldo_tvout: description: The voltage for the TV output regulator, incidentally @@ -393,33 +405,39 @@ properties: Only present on AB8500. type: object $ref: ../regulator/regulator.yaml# + unevaluatedProperties: false ab8500_ldo_audio: description: The LDO regulator for the audio codec output type: object $ref: ../regulator/regulator.yaml# + unevaluatedProperties: false ab8500_ldo_anamic1: description: The LDO regulator for the analog microphone 1 type: object $ref: ../regulator/regulator.yaml# + unevaluatedProperties: false ab8500_ldo_anamic2: description: The LDO regulator for the analog microphone 2 type: object $ref: ../regulator/regulator.yaml# + unevaluatedProperties: false ab8500_ldo_dmic: description: The LDO regulator for the digital microphone only present on AB8500 type: object $ref: ../regulator/regulator.yaml# + unevaluatedProperties: false ab8500_ldo_ana: description: Analog power regulator for CSI and DSI interfaces, Camera Serial Interface CSI and Display Serial Interface DSI. type: object $ref: ../regulator/regulator.yaml# + unevaluatedProperties: false required: - compatible @@ -442,16 +460,19 @@ properties: description: The voltage for the VSMPS1 external regulator type: object $ref: ../regulator/regulator.yaml# + unevaluatedProperties: false ab8500_ext2: description: The voltage for the VSMPS2 external regulator type: object $ref: ../regulator/regulator.yaml# + unevaluatedProperties: false ab8500_ext3: description: The voltage for the VSMPS3 external regulator type: object $ref: ../regulator/regulator.yaml# + unevaluatedProperties: false required: - compatible @@ -462,6 +483,7 @@ patternProperties: "^pwm@[1-9]+?$": type: object $ref: ../pwm/pwm.yaml# + unevaluatedProperties: false description: Represents each of the PWM blocks in the AB8500 properties: diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml index c10f0b577268..4e4baf53796d 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/mfd/syscon.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: System Controller Registers R/W Device Tree Bindings +title: System Controller Registers R/W description: | System controller node represents a register region containing a set @@ -40,6 +40,8 @@ properties: - allwinner,sun50i-a64-system-controller - brcm,cru-clkset - freecom,fsg-cs2-system-controller + - fsl,imx93-aonmix-ns-syscfg + - fsl,imx93-wakeupmix-syscfg - hisilicon,dsa-subctrl - hisilicon,hi6220-sramctrl - hisilicon,pcie-sas-subctrl @@ -59,6 +61,8 @@ properties: - rockchip,rk3368-qos - rockchip,rk3399-qos - rockchip,rk3568-qos + - rockchip,rk3588-qos + - rockchip,rv1126-qos - samsung,exynos3-sysreg - samsung,exynos4-sysreg - samsung,exynos5-sysreg @@ -71,7 +75,7 @@ properties: - contains: const: syscon minItems: 2 - maxItems: 4 # Should be enough + maxItems: 5 # Should be enough reg: maxItems: 1 @@ -80,7 +84,6 @@ properties: description: | The size (in bytes) of the IO accesses that should be performed on the device. - $ref: /schemas/types.yaml#/definitions/uint32 enum: [1, 2, 4, 8] hwlocks: @@ -92,6 +95,18 @@ required: - compatible - reg +allOf: + - if: + properties: + compatible: + contains: + const: simple-mfd + then: + properties: + compatible: + minItems: 3 + maxItems: 5 + additionalProperties: true examples: diff --git a/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml b/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml index 73cffc45e056..873ee0c0973f 100644 --- a/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml +++ b/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml @@ -5,7 +5,7 @@ $id: http://devicetree.org/schemas/mfd/ti,j721e-system-controller.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: TI J721e System Controller Registers R/W Device Tree Bindings +title: TI J721e System Controller Registers R/W description: | This represents the Control Module registers (CTRL_MMR0) on the SoC. @@ -54,6 +54,12 @@ patternProperties: description: Clock provider for TI EHRPWM nodes. + "phy@[0-9a-f]+$": + type: object + $ref: /schemas/phy/ti,phy-gmii-sel.yaml# + description: + The phy node corresponding to the ethernet MAC. + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/mfd/ti,tps65086.yaml b/Documentation/devicetree/bindings/mfd/ti,tps65086.yaml index 6aeedda3be15..3fdd9cb5b347 100644 --- a/Documentation/devicetree/bindings/mfd/ti,tps65086.yaml +++ b/Documentation/devicetree/bindings/mfd/ti,tps65086.yaml @@ -38,6 +38,7 @@ properties: regulators: type: object + additionalProperties: false description: | List of child nodes that specify the regulator initialization data. Child nodes must be named after their hardware counterparts: diff --git a/Documentation/devicetree/bindings/mfd/x-powers,ac100.yaml b/Documentation/devicetree/bindings/mfd/x-powers,ac100.yaml index de330c9869ff..309606d2d806 100644 --- a/Documentation/devicetree/bindings/mfd/x-powers,ac100.yaml +++ b/Documentation/devicetree/bindings/mfd/x-powers,ac100.yaml @@ -4,7 +4,7 @@ $id: "http://devicetree.org/schemas/mfd/x-powers,ac100.yaml#" $schema: "http://devicetree.org/meta-schemas/core.yaml#" -title: X-Powers AC100 Device Tree Bindings +title: X-Powers AC100 maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml b/Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml index 3a53bae611bc..b7a8747d5fa0 100644 --- a/Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml +++ b/Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/mfd/x-powers,axp152.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: X-Powers AXP PMIC Device Tree Bindings +title: X-Powers AXP PMIC maintainers: - Chen-Yu Tsai <wens@csie.org> @@ -93,6 +93,9 @@ properties: - x-powers,axp809 - x-powers,axp813 - items: + - const: x-powers,axp228 + - const: x-powers,axp221 + - items: - const: x-powers,axp805 - const: x-powers,axp806 - items: @@ -260,6 +263,7 @@ properties: "^(([a-f])?ldo[0-9]|dcdc[0-7a-e]|ldo(_|-)io(0|1)|(dc1)?sw|rtc(_|-)ldo|drivevbus|dc5ldo)$": $ref: /schemas/regulator/regulator.yaml# type: object + unevaluatedProperties: false properties: regulator-ramp-delay: diff --git a/Documentation/devicetree/bindings/mips/cpu_irq.txt b/Documentation/devicetree/bindings/mips/cpu_irq.txt deleted file mode 100644 index f080f06da6d8..000000000000 --- a/Documentation/devicetree/bindings/mips/cpu_irq.txt +++ /dev/null @@ -1,47 +0,0 @@ -MIPS CPU interrupt controller - -On MIPS the mips_cpu_irq_of_init() helper can be used to initialize the 8 CPU -IRQs from a devicetree file and create a irq_domain for IRQ controller. - -With the irq_domain in place we can describe how the 8 IRQs are wired to the -platforms internal interrupt controller cascade. - -Below is an example of a platform describing the cascade inside the devicetree -and the code used to load it inside arch_init_irq(). - -Required properties: -- compatible : Should be "mti,cpu-interrupt-controller" - -Example devicetree: - cpu-irq: cpu-irq { - #address-cells = <0>; - - interrupt-controller; - #interrupt-cells = <1>; - - compatible = "mti,cpu-interrupt-controller"; - }; - - intc: intc@200 { - compatible = "ralink,rt2880-intc"; - reg = <0x200 0x100>; - - interrupt-controller; - #interrupt-cells = <1>; - - interrupt-parent = <&cpu-irq>; - interrupts = <2>; - }; - - -Example platform irq.c: -static struct of_device_id __initdata of_irq_ids[] = { - { .compatible = "mti,cpu-interrupt-controller", .data = mips_cpu_irq_of_init }, - { .compatible = "ralink,rt2880-intc", .data = intc_of_init }, - {}, -}; - -void __init arch_init_irq(void) -{ - of_irq_init(of_irq_ids); -} diff --git a/Documentation/devicetree/bindings/mips/ralink.yaml b/Documentation/devicetree/bindings/mips/ralink.yaml index 0588cee25ae9..704b5b595127 100644 --- a/Documentation/devicetree/bindings/mips/ralink.yaml +++ b/Documentation/devicetree/bindings/mips/ralink.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/mips/ralink.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Ralink SoC based Platforms Device Tree Bindings +title: Ralink SoC based Platforms maintainers: - Sergio Paracuellos <sergio.paracuellos@gmail.com> diff --git a/Documentation/devicetree/bindings/mips/realtek-rtl.yaml b/Documentation/devicetree/bindings/mips/realtek-rtl.yaml index aadff8ce0f49..f8ac309d2994 100644 --- a/Documentation/devicetree/bindings/mips/realtek-rtl.yaml +++ b/Documentation/devicetree/bindings/mips/realtek-rtl.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/mips/realtek-rtl.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Realtek RTL83xx/93xx SoC series device tree bindings +title: Realtek RTL83xx/93xx SoC series maintainers: - Bert Vermeulen <bert@biot.com> diff --git a/Documentation/devicetree/bindings/misc/qcom,fastrpc.txt b/Documentation/devicetree/bindings/misc/qcom,fastrpc.txt deleted file mode 100644 index 5ec124b138a6..000000000000 --- a/Documentation/devicetree/bindings/misc/qcom,fastrpc.txt +++ /dev/null @@ -1,88 +0,0 @@ -Qualcomm Technologies, Inc. FastRPC Driver - -The FastRPC implements an IPC (Inter-Processor Communication) -mechanism that allows for clients to transparently make remote method -invocations across DSP and APPS boundaries. This enables developers -to offload tasks to the DSP and free up the application processor for -other tasks. - -- compatible: - Usage: required - Value type: <stringlist> - Definition: must be "qcom,fastrpc" - -- label - Usage: required - Value type: <string> - Definition: should specify the dsp domain name this fastrpc - corresponds to. must be one of this: "adsp", "mdsp", "sdsp", "cdsp" - -- qcom,non-secure-domain: - Usage: required - Value type: <boolean> - Definition: Property to specify that dsp domain is non-secure. - -- qcom,vmids: - Usage: optional - Value type: <u32 array> - Definition: Virtual machine IDs for remote processor. - -- #address-cells - Usage: required - Value type: <u32> - Definition: Must be 1 - -- #size-cells - Usage: required - Value type: <u32> - Definition: Must be 0 - -= COMPUTE BANKS -Each subnode of the Fastrpc represents compute context banks available -on the dsp. -- All Compute context banks MUST contain the following properties: - -- compatible: - Usage: required - Value type: <stringlist> - Definition: must be "qcom,fastrpc-compute-cb" - -- reg - Usage: required - Value type: <u32> - Definition: Context Bank ID. - -- qcom,nsessions: - Usage: Optional - Value type: <u32> - Defination: A value indicating how many sessions can share this - context bank. Defaults to 1 when this property - is not specified. - -Example: - -adsp-pil { - compatible = "qcom,msm8996-adsp-pil"; - ... - smd-edge { - label = "lpass"; - fastrpc { - compatible = "qcom,fastrpc"; - qcom,smd-channels = "fastrpcsmd-apps-dsp"; - label = "adsp"; - #address-cells = <1>; - #size-cells = <0>; - - cb@1 { - compatible = "qcom,fastrpc-compute-cb"; - reg = <1>; - }; - - cb@2 { - compatible = "qcom,fastrpc-compute-cb"; - reg = <2>; - }; - ... - }; - }; -}; diff --git a/Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml b/Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml new file mode 100644 index 000000000000..d7576f8ac94b --- /dev/null +++ b/Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml @@ -0,0 +1,144 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/misc/qcom,fastrpc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm FastRPC Driver + +maintainers: + - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> + +description: | + The FastRPC implements an IPC (Inter-Processor Communication) + mechanism that allows for clients to transparently make remote method + invocations across DSP and APPS boundaries. This enables developers + to offload tasks to the DSP and free up the application processor for + other tasks. + +properties: + compatible: + const: qcom,fastrpc + + label: + enum: + - adsp + - mdsp + - sdsp + - cdsp + + memory-region: + maxItems: 1 + description: + Phandle to a node describing memory to be used for remote heap CMA. + + qcom,glink-channels: + description: + A list of channels tied to this function, used for matching + the function to a set of virtual channels. + $ref: "/schemas/types.yaml#/definitions/string-array" + items: + - const: fastrpcglink-apps-dsp + + qcom,non-secure-domain: + description: + Used to mark the current domain as non-secure. + type: boolean + + qcom,smd-channels: + description: + Channel name used for the RPM communication + $ref: "/schemas/types.yaml#/definitions/string-array" + items: + - const: fastrpcsmd-apps-dsp + + qcom,vmids: + description: + Virtual machine IDs for remote processor. + $ref: "/schemas/types.yaml#/definitions/uint32-array" + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + +patternProperties: + "(compute-)?cb@[0-9]*$": + type: object + + description: > + Each subnode of the Fastrpc represents compute context banks available on the dsp. + + properties: + compatible: + const: qcom,fastrpc-compute-cb + + reg: + maxItems: 1 + + iommus: + minItems: 1 + maxItems: 2 + + qcom,nsessions: + $ref: /schemas/types.yaml#/definitions/uint32 + default: 1 + description: > + A value indicating how many sessions can share this context bank. + + required: + - compatible + - reg + + additionalProperties: false + +required: + - compatible + - label + - "#address-cells" + - "#size-cells" + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/mailbox/qcom-ipcc.h> + + glink-edge { + interrupts-extended = <&ipcc IPCC_CLIENT_LPASS + IPCC_MPROC_SIGNAL_GLINK_QMP + IRQ_TYPE_EDGE_RISING>; + mboxes = <&ipcc IPCC_CLIENT_LPASS + IPCC_MPROC_SIGNAL_GLINK_QMP>; + label = "lpass"; + qcom,remote-pid = <2>; + + fastrpc { + compatible = "qcom,fastrpc"; + qcom,glink-channels = "fastrpcglink-apps-dsp"; + label = "sdsp"; + qcom,non-secure-domain; + #address-cells = <1>; + #size-cells = <0>; + + compute-cb@1 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <1>; + iommus = <&apps_smmu 0x0541 0x0>; + }; + + compute-cb@2 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <2>; + iommus = <&apps_smmu 0x0542 0x0>; + }; + + compute-cb@3 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <3>; + iommus = <&apps_smmu 0x0543 0x0>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/mmc/allwinner,sun4i-a10-mmc.yaml b/Documentation/devicetree/bindings/mmc/allwinner,sun4i-a10-mmc.yaml index 7803597b6366..02ecc93417ef 100644 --- a/Documentation/devicetree/bindings/mmc/allwinner,sun4i-a10-mmc.yaml +++ b/Documentation/devicetree/bindings/mmc/allwinner,sun4i-a10-mmc.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/mmc/allwinner,sun4i-a10-mmc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 MMC Controller Device Tree Bindings +title: Allwinner A10 MMC Controller allOf: - $ref: "mmc-controller.yaml" diff --git a/Documentation/devicetree/bindings/mmc/amlogic,meson-mx-sdhc.yaml b/Documentation/devicetree/bindings/mmc/amlogic,meson-mx-sdhc.yaml index 60955acb8e57..1c391bec43dc 100644 --- a/Documentation/devicetree/bindings/mmc/amlogic,meson-mx-sdhc.yaml +++ b/Documentation/devicetree/bindings/mmc/amlogic,meson-mx-sdhc.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/mmc/amlogic,meson-mx-sdhc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Amlogic Meson SDHC controller Device Tree Bindings +title: Amlogic Meson SDHC controller allOf: - $ref: "mmc-controller.yaml" diff --git a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml index 4207fed62dfe..8b1a0fdcb5e3 100644 --- a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml @@ -8,7 +8,6 @@ title: Cadence SD/SDIO/eMMC Host Controller (SD4HC) maintainers: - Masahiro Yamada <yamada.masahiro@socionext.com> - - Piotr Sroka <piotrs@cadence.com> allOf: - $ref: mmc-controller.yaml diff --git a/Documentation/devicetree/bindings/mmc/mmc-card.yaml b/Documentation/devicetree/bindings/mmc/mmc-card.yaml index b17d454442b3..fd347126449a 100644 --- a/Documentation/devicetree/bindings/mmc/mmc-card.yaml +++ b/Documentation/devicetree/bindings/mmc/mmc-card.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/mmc/mmc-card.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: MMC Card / eMMC Generic Device Tree Bindings +title: MMC Card / eMMC Generic maintainers: - Ulf Hansson <ulf.hansson@linaro.org> diff --git a/Documentation/devicetree/bindings/mmc/mmc-controller.yaml b/Documentation/devicetree/bindings/mmc/mmc-controller.yaml index ff5ce89e5111..802e3ca8be4d 100644 --- a/Documentation/devicetree/bindings/mmc/mmc-controller.yaml +++ b/Documentation/devicetree/bindings/mmc/mmc-controller.yaml @@ -88,11 +88,18 @@ properties: default: 1 max-frequency: - description: - Maximum operating frequency of the bus. + description: | + Maximum operating frequency of the bus: + - for eMMC, the maximum supported frequency is 200MHz, + - for SD/SDIO cards the SDR104 mode has a max supported + frequency of 208MHz, + - some mmc host controllers do support a max frequency upto + 384MHz. + So, lets keep the maximum supported value here. + $ref: /schemas/types.yaml#/definitions/uint32 minimum: 400000 - maximum: 200000000 + maximum: 384000000 disable-wp: $ref: /schemas/types.yaml#/definitions/flag diff --git a/Documentation/devicetree/bindings/mmc/mmc-spi-slot.yaml b/Documentation/devicetree/bindings/mmc/mmc-spi-slot.yaml index c45b91099325..c0662ce9946d 100644 --- a/Documentation/devicetree/bindings/mmc/mmc-spi-slot.yaml +++ b/Documentation/devicetree/bindings/mmc/mmc-spi-slot.yaml @@ -23,8 +23,6 @@ properties: reg: maxItems: 1 - spi-max-frequency: true - interrupts: maxItems: 1 diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml index 083d1ec2f661..d8e1e2e9adf2 100644 --- a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml +++ b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml @@ -20,6 +20,7 @@ properties: - mediatek,mt2701-mmc - mediatek,mt2712-mmc - mediatek,mt6779-mmc + - mediatek,mt6795-mmc - mediatek,mt7620-mmc - mediatek,mt7622-mmc - mediatek,mt8135-mmc diff --git a/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml b/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml index 14945ebc31d2..0424b06cb655 100644 --- a/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml +++ b/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml @@ -89,6 +89,9 @@ properties: - tx - rx + iommus: + maxItems: 1 + power-domains: maxItems: 1 diff --git a/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml b/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml index 8d888b435817..95f59a5e3576 100644 --- a/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml +++ b/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/mmc/rockchip-dw-mshc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Rockchip designware mobile storage host controller device tree bindings +title: Rockchip designware mobile storage host controller description: Rockchip uses the Synopsys designware mobile storage host controller @@ -32,6 +32,7 @@ properties: - rockchip,px30-dw-mshc - rockchip,rk1808-dw-mshc - rockchip,rk3036-dw-mshc + - rockchip,rk3128-dw-mshc - rockchip,rk3228-dw-mshc - rockchip,rk3308-dw-mshc - rockchip,rk3328-dw-mshc diff --git a/Documentation/devicetree/bindings/mmc/sdhci-am654.yaml b/Documentation/devicetree/bindings/mmc/sdhci-am654.yaml index 0ab07759b472..ea9121fb188d 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-am654.yaml +++ b/Documentation/devicetree/bindings/mmc/sdhci-am654.yaml @@ -51,6 +51,9 @@ properties: sdhci-caps-mask: true + dma-coherent: + type: boolean + # PHY output tap delays: # Used to delay the data valid window and align it to the sampling clock. # Binding needs to be provided for each supported speed mode otherwise the diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml index fc0e81c2066c..a96f143479c7 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml @@ -38,9 +38,11 @@ properties: - qcom,sc7180-sdhci - qcom,sc7280-sdhci - qcom,sdm630-sdhci + - qcom,sdm670-sdhci - qcom,sdm845-sdhci - qcom,sdx55-sdhci - qcom,sdx65-sdhci + - qcom,sm6115-sdhci - qcom,sm6125-sdhci - qcom,sm6350-sdhci - qcom,sm8150-sdhci @@ -96,6 +98,10 @@ properties: description: Should specify pin control groups used for this controller. + pinctrl-1: + description: + Should specify sleep pin control groups used for this controller. + resets: maxItems: 1 diff --git a/Documentation/devicetree/bindings/mtd/allwinner,sun4i-a10-nand.yaml b/Documentation/devicetree/bindings/mtd/allwinner,sun4i-a10-nand.yaml index c033ac3f147d..4741864da48e 100644 --- a/Documentation/devicetree/bindings/mtd/allwinner,sun4i-a10-nand.yaml +++ b/Documentation/devicetree/bindings/mtd/allwinner,sun4i-a10-nand.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/mtd/allwinner,sun4i-a10-nand.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 NAND Controller Device Tree Bindings +title: Allwinner A10 NAND Controller allOf: - $ref: "nand-controller.yaml" diff --git a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt deleted file mode 100644 index 5794ab1147c1..000000000000 --- a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt +++ /dev/null @@ -1,60 +0,0 @@ -Amlogic NAND Flash Controller (NFC) for GXBB/GXL/AXG family SoCs - -This file documents the properties in addition to those available in -the MTD NAND bindings. - -Required properties: -- compatible : contains one of: - - "amlogic,meson-gxl-nfc" - - "amlogic,meson-axg-nfc" -- clocks : - A list of phandle + clock-specifier pairs for the clocks listed - in clock-names. - -- clock-names: Should contain the following: - "core" - NFC module gate clock - "device" - device clock from eMMC sub clock controller - "rx" - rx clock phase - "tx" - tx clock phase - -- amlogic,mmc-syscon : Required for NAND clocks, it's shared with SD/eMMC - controller port C - -Optional children nodes: -Children nodes represent the available nand chips. - -Other properties: -see Documentation/devicetree/bindings/mtd/nand-controller.yaml for generic bindings. - -Example demonstrate on AXG SoC: - - sd_emmc_c_clkc: mmc@7000 { - compatible = "amlogic,meson-axg-mmc-clkc", "syscon"; - reg = <0x0 0x7000 0x0 0x800>; - }; - - nand-controller@7800 { - compatible = "amlogic,meson-axg-nfc"; - reg = <0x0 0x7800 0x0 0x100>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>; - - clocks = <&clkc CLKID_SD_EMMC_C>, - <&sd_emmc_c_clkc CLKID_MMC_DIV>, - <&sd_emmc_c_clkc CLKID_MMC_PHASE_RX>, - <&sd_emmc_c_clkc CLKID_MMC_PHASE_TX>; - clock-names = "core", "device", "rx", "tx"; - amlogic,mmc-syscon = <&sd_emmc_c_clkc>; - - pinctrl-names = "default"; - pinctrl-0 = <&nand_pins>; - - nand@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <1>; - - nand-on-flash-bbt; - }; - }; diff --git a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml new file mode 100644 index 000000000000..28fb9a7dd70f --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml @@ -0,0 +1,93 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mtd/amlogic,meson-nand.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Amlogic NAND Flash Controller (NFC) for GXBB/GXL/AXG family SoCs + +allOf: + - $ref: nand-controller.yaml + +maintainers: + - liang.yang@amlogic.com + +properties: + compatible: + enum: + - amlogic,meson-gxl-nfc + - amlogic,meson-axg-nfc + + reg: + maxItems: 2 + + reg-names: + items: + - const: nfc + - const: emmc + + interrupts: + maxItems: 1 + + clocks: + minItems: 2 + + clock-names: + items: + - const: core + - const: device + +patternProperties: + "^nand@[0-7]$": + type: object + properties: + reg: + minimum: 0 + maximum: 1 + + nand-ecc-mode: + const: hw + + nand-ecc-step-size: + const: 1024 + + nand-ecc-strength: + enum: [8, 16, 24, 30, 40, 50, 60] + description: | + The ECC configurations that can be supported are as follows. + meson-gxl-nfc 8, 16, 24, 30, 40, 50, 60 + meson-axg-nfc 8 + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/axg-clkc.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + nand-controller@ffe07800 { + compatible = "amlogic,meson-axg-nfc"; + reg = <0xffe07800 0x100>, <0xffe07000 0x800>; + reg-names = "nfc", "emmc"; + interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>; + clocks = <&clkc CLKID_SD_EMMC_C>, <&clkc CLKID_FCLK_DIV2>; + clock-names = "core", "device"; + + pinctrl-0 = <&nand_pins>; + pinctrl-names = "default"; + + #address-cells = <1>; + #size-cells = <0>; + + nand@0 { + reg = <0>; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/mtd/arasan,nand-controller.yaml b/Documentation/devicetree/bindings/mtd/arasan,nand-controller.yaml index b32876933269..f013fb976d95 100644 --- a/Documentation/devicetree/bindings/mtd/arasan,nand-controller.yaml +++ b/Documentation/devicetree/bindings/mtd/arasan,nand-controller.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/mtd/arasan,nand-controller.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Arasan NAND Flash Controller with ONFI 3.1 support device tree bindings +title: Arasan NAND Flash Controller with ONFI 3.1 support allOf: - $ref: "nand-controller.yaml" diff --git a/Documentation/devicetree/bindings/mtd/arm,pl353-nand-r2p1.yaml b/Documentation/devicetree/bindings/mtd/arm,pl353-nand-r2p1.yaml index 5f126bb9b202..023f3ef0fa13 100644 --- a/Documentation/devicetree/bindings/mtd/arm,pl353-nand-r2p1.yaml +++ b/Documentation/devicetree/bindings/mtd/arm,pl353-nand-r2p1.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/mtd/arm,pl353-nand-r2p1.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: PL353 NAND Controller device tree bindings +title: PL353 NAND Controller allOf: - $ref: "nand-controller.yaml" diff --git a/Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml b/Documentation/devicetree/bindings/mtd/intel,lgm-ebunand.yaml index 30e0c66ab0eb..741c66ee06c3 100644 --- a/Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml +++ b/Documentation/devicetree/bindings/mtd/intel,lgm-ebunand.yaml @@ -1,10 +1,10 @@ # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 --- -$id: http://devicetree.org/schemas/mtd/intel,lgm-nand.yaml# +$id: http://devicetree.org/schemas/mtd/intel,lgm-ebunand.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Intel LGM SoC NAND Controller Device Tree Bindings +title: Intel LGM SoC NAND Controller allOf: - $ref: "nand-controller.yaml" @@ -14,7 +14,7 @@ maintainers: properties: compatible: - const: intel,lgm-nand + const: intel,lgm-ebunand reg: maxItems: 6 @@ -51,7 +51,7 @@ patternProperties: properties: reg: minimum: 0 - maximum: 7 + maximum: 1 nand-ecc-mode: true @@ -75,7 +75,7 @@ additionalProperties: false examples: - | nand-controller@e0f00000 { - compatible = "intel,lgm-nand"; + compatible = "intel,lgm-ebunand"; reg = <0xe0f00000 0x100>, <0xe1000000 0x300>, <0xe1400000 0x8000>, diff --git a/Documentation/devicetree/bindings/mtd/mtd.yaml b/Documentation/devicetree/bindings/mtd/mtd.yaml index 376b679cfc70..3498e485679b 100644 --- a/Documentation/devicetree/bindings/mtd/mtd.yaml +++ b/Documentation/devicetree/bindings/mtd/mtd.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/mtd/mtd.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: MTD (Memory Technology Device) Device Tree Bindings +title: MTD (Memory Technology Device) maintainers: - Miquel Raynal <miquel.raynal@bootlin.com> diff --git a/Documentation/devicetree/bindings/mtd/mxicy,nand-ecc-engine.yaml b/Documentation/devicetree/bindings/mtd/mxicy,nand-ecc-engine.yaml index 804479999ccb..f92e7234deab 100644 --- a/Documentation/devicetree/bindings/mtd/mxicy,nand-ecc-engine.yaml +++ b/Documentation/devicetree/bindings/mtd/mxicy,nand-ecc-engine.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/mtd/mxicy,nand-ecc-engine.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Macronix NAND ECC engine device tree bindings +title: Macronix NAND ECC engine maintainers: - Miquel Raynal <miquel.raynal@bootlin.com> diff --git a/Documentation/devicetree/bindings/mtd/partitions/u-boot.yaml b/Documentation/devicetree/bindings/mtd/partitions/u-boot.yaml new file mode 100644 index 000000000000..8a88e7d16524 --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/partitions/u-boot.yaml @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mtd/partitions/u-boot.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: U-Boot bootloader partition + +description: | + U-Boot is a bootlodaer commonly used in embedded devices. It's almost always + located on some kind of flash device. + + Device configuration is stored as a set of environment variables that are + located in a (usually standalone) block of data. + +maintainers: + - RafaÅ‚ MiÅ‚ecki <rafal@milecki.pl> + +allOf: + - $ref: partition.yaml# + +properties: + compatible: + oneOf: + - const: brcm,u-boot + description: | + Broadcom stores environment variables inside a U-Boot partition. They + can be identified by a custom header with magic value. + +unevaluatedProperties: false + +examples: + - | + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + compatible = "brcm,u-boot"; + reg = <0x0 0x100000>; + label = "u-boot"; + }; + + partition@100000 { + reg = <0x100000 0x1ff00000>; + label = "firmware"; + }; + }; diff --git a/Documentation/devicetree/bindings/mtd/renesas-nandc.yaml b/Documentation/devicetree/bindings/mtd/renesas-nandc.yaml index 7b18bc5cc8b3..f0dc78bb0515 100644 --- a/Documentation/devicetree/bindings/mtd/renesas-nandc.yaml +++ b/Documentation/devicetree/bindings/mtd/renesas-nandc.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/mtd/renesas-nandc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Renesas R-Car Gen3 & RZ/N1x NAND flash controller device tree bindings +title: Renesas R-Car Gen3 & RZ/N1x NAND flash controller maintainers: - Miquel Raynal <miquel.raynal@bootlin.com> diff --git a/Documentation/devicetree/bindings/mtd/spi-nand.yaml b/Documentation/devicetree/bindings/mtd/spi-nand.yaml index dd3cd1d53009..4d095e613204 100644 --- a/Documentation/devicetree/bindings/mtd/spi-nand.yaml +++ b/Documentation/devicetree/bindings/mtd/spi-nand.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/mtd/spi-nand.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: SPI-NAND flash device tree bindings +title: SPI-NAND flash maintainers: - Miquel Raynal <miquel.raynal@bootlin.com> diff --git a/Documentation/devicetree/bindings/net/adi,adin1110.yaml b/Documentation/devicetree/bindings/net/adi,adin1110.yaml new file mode 100644 index 000000000000..b6bd8ee38a18 --- /dev/null +++ b/Documentation/devicetree/bindings/net/adi,adin1110.yaml @@ -0,0 +1,77 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/adi,adin1110.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ADI ADIN1110 MAC-PHY + +maintainers: + - Alexandru Tachici <alexandru.tachici@analog.com> + +description: | + The ADIN1110 is a low power single port 10BASE-T1L MAC- + PHY designed for industrial Ethernet applications. It integrates + an Ethernet PHY core with a MAC and all the associated analog + circuitry, input and output clock buffering. + + The ADIN2111 is a low power, low complexity, two-Ethernet ports + switch with integrated 10BASE-T1L PHYs and one serial peripheral + interface (SPI) port. The device is designed for industrial Ethernet + applications using low power constrained nodes and is compliant + with the IEEE 802.3cg-2019 Ethernet standard for long reach + 10 Mbps single pair Ethernet (SPE). + + The device has a 4-wire SPI interface for communication + between the MAC and host processor. + +allOf: + - $ref: ethernet-controller.yaml# + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +properties: + compatible: + enum: + - adi,adin1110 + - adi,adin2111 + + reg: + maxItems: 1 + + adi,spi-crc: + description: | + Enable CRC8 checks on SPI read/writes. + type: boolean + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + + spi { + + #address-cells = <1>; + #size-cells = <0>; + + ethernet@0 { + compatible = "adi,adin2111"; + reg = <0>; + spi-max-frequency = <24500000>; + + adi,spi-crc; + + interrupt-parent = <&gpio>; + interrupts = <25 IRQ_TYPE_LEVEL_LOW>; + + local-mac-address = [ 00 11 22 33 44 55 ]; + }; + }; diff --git a/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-emac.yaml b/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-emac.yaml index 098b2bf7d976..987b91b9afe9 100644 --- a/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-emac.yaml +++ b/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-emac.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/net/allwinner,sun4i-a10-emac.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 EMAC Ethernet Controller Device Tree Bindings +title: Allwinner A10 EMAC Ethernet Controller allOf: - $ref: "ethernet-controller.yaml#" diff --git a/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-mdio.yaml b/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-mdio.yaml index 767193ec1d32..ede977cdfb8d 100644 --- a/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-mdio.yaml +++ b/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-mdio.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/net/allwinner,sun4i-a10-mdio.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 MDIO Controller Device Tree Bindings +title: Allwinner A10 MDIO Controller maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.yaml b/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.yaml index 703d0d886884..3bd912ed7c7e 100644 --- a/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.yaml +++ b/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/net/allwinner,sun7i-a20-gmac.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A20 GMAC Device Tree Bindings +title: Allwinner A20 GMAC allOf: - $ref: "snps,dwmac.yaml#" diff --git a/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml b/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml index 55fc620c72cd..1432fda3b603 100644 --- a/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml +++ b/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/net/allwinner,sun8i-a83t-emac.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A83t EMAC Device Tree Bindings +title: Allwinner A83t EMAC maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/net/altera_tse.txt b/Documentation/devicetree/bindings/net/altera_tse.txt deleted file mode 100644 index 1d9148ff5130..000000000000 --- a/Documentation/devicetree/bindings/net/altera_tse.txt +++ /dev/null @@ -1,113 +0,0 @@ -* Altera Triple-Speed Ethernet MAC driver (TSE) - -Required properties: -- compatible: Should be "altr,tse-1.0" for legacy SGDMA based TSE, and should - be "altr,tse-msgdma-1.0" for the preferred MSGDMA based TSE. - ALTR is supported for legacy device trees, but is deprecated. - altr should be used for all new designs. -- reg: Address and length of the register set for the device. It contains - the information of registers in the same order as described by reg-names -- reg-names: Should contain the reg names - "control_port": MAC configuration space region - "tx_csr": xDMA Tx dispatcher control and status space region - "tx_desc": MSGDMA Tx dispatcher descriptor space region - "rx_csr" : xDMA Rx dispatcher control and status space region - "rx_desc": MSGDMA Rx dispatcher descriptor space region - "rx_resp": MSGDMA Rx dispatcher response space region - "s1": SGDMA descriptor memory -- interrupts: Should contain the TSE interrupts and its mode. -- interrupt-names: Should contain the interrupt names - "rx_irq": xDMA Rx dispatcher interrupt - "tx_irq": xDMA Tx dispatcher interrupt -- rx-fifo-depth: MAC receive FIFO buffer depth in bytes -- tx-fifo-depth: MAC transmit FIFO buffer depth in bytes -- phy-mode: See ethernet.txt in the same directory. -- phy-handle: See ethernet.txt in the same directory. -- phy-addr: See ethernet.txt in the same directory. A configuration should - include phy-handle or phy-addr. -- altr,has-supplementary-unicast: - If present, TSE supports additional unicast addresses. - Otherwise additional unicast addresses are not supported. -- altr,has-hash-multicast-filter: - If present, TSE supports a hash based multicast filter. - Otherwise, hash-based multicast filtering is not supported. - -- mdio device tree subnode: When the TSE has a phy connected to its local - mdio, there must be device tree subnode with the following - required properties: - - - compatible: Must be "altr,tse-mdio". - - #address-cells: Must be <1>. - - #size-cells: Must be <0>. - - For each phy on the mdio bus, there must be a node with the following - fields: - - - reg: phy id used to communicate to phy. - - device_type: Must be "ethernet-phy". - -The MAC address will be determined using the optional properties defined in -ethernet.txt. - -Example: - - tse_sub_0_eth_tse_0: ethernet@1,00000000 { - compatible = "altr,tse-msgdma-1.0"; - reg = <0x00000001 0x00000000 0x00000400>, - <0x00000001 0x00000460 0x00000020>, - <0x00000001 0x00000480 0x00000020>, - <0x00000001 0x000004A0 0x00000008>, - <0x00000001 0x00000400 0x00000020>, - <0x00000001 0x00000420 0x00000020>; - reg-names = "control_port", "rx_csr", "rx_desc", "rx_resp", "tx_csr", "tx_desc"; - interrupt-parent = <&hps_0_arm_gic_0>; - interrupts = <0 41 4>, <0 40 4>; - interrupt-names = "rx_irq", "tx_irq"; - rx-fifo-depth = <2048>; - tx-fifo-depth = <2048>; - address-bits = <48>; - max-frame-size = <1500>; - local-mac-address = [ 00 00 00 00 00 00 ]; - phy-mode = "gmii"; - altr,has-supplementary-unicast; - altr,has-hash-multicast-filter; - phy-handle = <&phy0>; - mdio { - compatible = "altr,tse-mdio"; - #address-cells = <1>; - #size-cells = <0>; - phy0: ethernet-phy@0 { - reg = <0x0>; - device_type = "ethernet-phy"; - }; - - phy1: ethernet-phy@1 { - reg = <0x1>; - device_type = "ethernet-phy"; - }; - - }; - }; - - tse_sub_1_eth_tse_0: ethernet@1,00001000 { - compatible = "altr,tse-msgdma-1.0"; - reg = <0x00000001 0x00001000 0x00000400>, - <0x00000001 0x00001460 0x00000020>, - <0x00000001 0x00001480 0x00000020>, - <0x00000001 0x000014A0 0x00000008>, - <0x00000001 0x00001400 0x00000020>, - <0x00000001 0x00001420 0x00000020>; - reg-names = "control_port", "rx_csr", "rx_desc", "rx_resp", "tx_csr", "tx_desc"; - interrupt-parent = <&hps_0_arm_gic_0>; - interrupts = <0 43 4>, <0 42 4>; - interrupt-names = "rx_irq", "tx_irq"; - rx-fifo-depth = <2048>; - tx-fifo-depth = <2048>; - address-bits = <48>; - max-frame-size = <1500>; - local-mac-address = [ 00 00 00 00 00 00 ]; - phy-mode = "gmii"; - altr,has-supplementary-unicast; - altr,has-hash-multicast-filter; - phy-handle = <&phy1>; - }; diff --git a/Documentation/devicetree/bindings/net/altr,tse.yaml b/Documentation/devicetree/bindings/net/altr,tse.yaml new file mode 100644 index 000000000000..8d1d94494349 --- /dev/null +++ b/Documentation/devicetree/bindings/net/altr,tse.yaml @@ -0,0 +1,168 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/altr,tse.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Altera Triple Speed Ethernet MAC driver (TSE) + +maintainers: + - Maxime Chevallier <maxime.chevallier@bootlin.com> + +properties: + compatible: + oneOf: + - const: altr,tse-1.0 + - const: ALTR,tse-1.0 + deprecated: true + - const: altr,tse-msgdma-1.0 + + interrupts: + minItems: 2 + + interrupt-names: + items: + - const: rx_irq + - const: tx_irq + + rx-fifo-depth: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Depth in bytes of the RX FIFO + + tx-fifo-depth: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Depth in bytes of the TX FIFO + + altr,has-supplementary-unicast: + type: boolean + description: + If present, TSE supports additional unicast addresses. + + altr,has-hash-multicast-filter: + type: boolean + description: + If present, TSE supports hash based multicast filter. + + mdio: + $ref: mdio.yaml# + unevaluatedProperties: false + description: + Creates and registers an MDIO bus. + + properties: + compatible: + const: altr,tse-mdio + + required: + - compatible + +required: + - compatible + - reg + - interrupts + - rx-fifo-depth + - tx-fifo-depth + +allOf: + - $ref: "ethernet-controller.yaml#" + - if: + properties: + compatible: + contains: + enum: + - const: altr,tse-1.0 + - const: ALTR,tse-1.0 + then: + properties: + reg: + minItems: 4 + reg-names: + items: + - const: control_port + - const: rx_csr + - const: tx_csr + - const: s1 + + - if: + properties: + compatible: + contains: + enum: + - altr,tse-msgdma-1.0 + then: + properties: + reg: + minItems: 6 + maxItems: 7 + reg-names: + minItems: 6 + items: + - const: control_port + - const: rx_csr + - const: rx_desc + - const: rx_resp + - const: tx_csr + - const: tx_desc + - const: pcs + +unevaluatedProperties: false + +examples: + - | + tse_sub_0: ethernet@c0100000 { + compatible = "altr,tse-msgdma-1.0"; + reg = <0xc0100000 0x00000400>, + <0xc0101000 0x00000020>, + <0xc0102000 0x00000020>, + <0xc0103000 0x00000008>, + <0xc0104000 0x00000020>, + <0xc0105000 0x00000020>, + <0xc0106000 0x00000100>; + reg-names = "control_port", "rx_csr", "rx_desc", "rx_resp", "tx_csr", "tx_desc", "pcs"; + interrupt-parent = <&intc>; + interrupts = <0 44 4>,<0 45 4>; + interrupt-names = "rx_irq","tx_irq"; + rx-fifo-depth = <2048>; + tx-fifo-depth = <2048>; + max-frame-size = <1500>; + local-mac-address = [ 00 00 00 00 00 00 ]; + altr,has-supplementary-unicast; + altr,has-hash-multicast-filter; + sfp = <&sfp0>; + phy-mode = "sgmii"; + managed = "in-band-status"; + }; + - | + tse_sub_1_eth_tse_0: ethernet@1,00001000 { + compatible = "altr,tse-msgdma-1.0"; + reg = <0x00001000 0x00000400>, + <0x00001460 0x00000020>, + <0x00001480 0x00000020>, + <0x000014A0 0x00000008>, + <0x00001400 0x00000020>, + <0x00001420 0x00000020>; + reg-names = "control_port", "rx_csr", "rx_desc", "rx_resp", "tx_csr", "tx_desc"; + interrupt-parent = <&hps_0_arm_gic_0>; + interrupts = <0 43 4>, <0 42 4>; + interrupt-names = "rx_irq", "tx_irq"; + rx-fifo-depth = <2048>; + tx-fifo-depth = <2048>; + max-frame-size = <1500>; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-mode = "gmii"; + altr,has-supplementary-unicast; + altr,has-hash-multicast-filter; + phy-handle = <&phy1>; + mdio { + compatible = "altr,tse-mdio"; + #address-cells = <1>; + #size-cells = <0>; + phy1: ethernet-phy@1 { + reg = <0x1>; + }; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml b/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml index 608e1d62bed5..ddd5a073c3a8 100644 --- a/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml +++ b/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml @@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#" title: Amlogic Meson DWMAC Ethernet controller maintainers: - - Neil Armstrong <narmstrong@baylibre.com> + - Neil Armstrong <neil.armstrong@linaro.org> - Martin Blumenstingl <martin.blumenstingl@googlemail.com> # We need a select here so we don't match all nodes with 'snps,dwmac' diff --git a/Documentation/devicetree/bindings/net/brcm,amac.yaml b/Documentation/devicetree/bindings/net/brcm,amac.yaml index 8f031932c8af..ee2eac8f5710 100644 --- a/Documentation/devicetree/bindings/net/brcm,amac.yaml +++ b/Documentation/devicetree/bindings/net/brcm,amac.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/net/brcm,amac.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Broadcom AMAC Ethernet Controller Device Tree Bindings +title: Broadcom AMAC Ethernet Controller maintainers: - Florian Fainelli <f.fainelli@gmail.com> diff --git a/Documentation/devicetree/bindings/net/can/nxp,sja1000.yaml b/Documentation/devicetree/bindings/net/can/nxp,sja1000.yaml index b1327c5b86cf..144a3785132c 100644 --- a/Documentation/devicetree/bindings/net/can/nxp,sja1000.yaml +++ b/Documentation/devicetree/bindings/net/can/nxp,sja1000.yaml @@ -30,8 +30,10 @@ properties: clocks: maxItems: 1 + power-domains: + maxItems: 1 + reg-io-width: - $ref: /schemas/types.yaml#/definitions/uint32 description: I/O register width (in bytes) implemented by this device default: 1 enum: [ 1, 2, 4 ] @@ -105,6 +107,7 @@ allOf: then: required: - clocks + - power-domains unevaluatedProperties: false @@ -129,4 +132,5 @@ examples: reg-io-width = <4>; interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; clocks = <&sysctrl R9A06G032_HCLK_CAN0>; + power-domains = <&sysctrl>; }; diff --git a/Documentation/devicetree/bindings/net/cortina,gemini-ethernet.yaml b/Documentation/devicetree/bindings/net/cortina,gemini-ethernet.yaml index cc01b9b5752a..253b5d1407ee 100644 --- a/Documentation/devicetree/bindings/net/cortina,gemini-ethernet.yaml +++ b/Documentation/devicetree/bindings/net/cortina,gemini-ethernet.yaml @@ -37,6 +37,7 @@ properties: patternProperties: "^ethernet-port@[0-9]+$": type: object + unevaluatedProperties: false description: contains the resources for ethernet port allOf: - $ref: ethernet-controller.yaml# diff --git a/Documentation/devicetree/bindings/net/dsa/ar9331.txt b/Documentation/devicetree/bindings/net/dsa/ar9331.txt index 320607cbbb17..f824fdae0da2 100644 --- a/Documentation/devicetree/bindings/net/dsa/ar9331.txt +++ b/Documentation/devicetree/bindings/net/dsa/ar9331.txt @@ -76,7 +76,6 @@ eth1: ethernet@1a000000 { switch_port0: port@0 { reg = <0x0>; - label = "cpu"; ethernet = <ð1>; phy-mode = "gmii"; diff --git a/Documentation/devicetree/bindings/net/dsa/arrow,xrs700x.yaml b/Documentation/devicetree/bindings/net/dsa/arrow,xrs700x.yaml index 3f01b65f3b22..259a0c6547f3 100644 --- a/Documentation/devicetree/bindings/net/dsa/arrow,xrs700x.yaml +++ b/Documentation/devicetree/bindings/net/dsa/arrow,xrs700x.yaml @@ -61,8 +61,9 @@ examples: }; ethernet-port@3 { reg = <3>; - label = "cpu"; ethernet = <&fec1>; + phy-mode = "rgmii-id"; + fixed-link { speed = <1000>; full-duplex; diff --git a/Documentation/devicetree/bindings/net/dsa/brcm,b53.yaml b/Documentation/devicetree/bindings/net/dsa/brcm,b53.yaml index 23114d691d2a..1219b830b1a4 100644 --- a/Documentation/devicetree/bindings/net/dsa/brcm,b53.yaml +++ b/Documentation/devicetree/bindings/net/dsa/brcm,b53.yaml @@ -169,7 +169,6 @@ examples: port@8 { reg = <8>; - label = "cpu"; phy-mode = "rgmii-txid"; ethernet = <ð0>; fixed-link { @@ -252,8 +251,9 @@ examples: port@8 { ethernet = <&amac2>; - label = "cpu"; reg = <8>; + phy-mode = "internal"; + fixed-link { speed = <1000>; full-duplex; diff --git a/Documentation/devicetree/bindings/net/dsa/dsa-port.yaml b/Documentation/devicetree/bindings/net/dsa/dsa-port.yaml index 09317e16cb5d..10ad7e71097b 100644 --- a/Documentation/devicetree/bindings/net/dsa/dsa-port.yaml +++ b/Documentation/devicetree/bindings/net/dsa/dsa-port.yaml @@ -76,6 +76,23 @@ properties: required: - reg +# CPU and DSA ports must have phylink-compatible link descriptions +if: + oneOf: + - required: [ ethernet ] + - required: [ link ] +then: + allOf: + - required: + - phy-mode + - oneOf: + - required: + - fixed-link + - required: + - phy-handle + - required: + - managed + additionalProperties: true ... diff --git a/Documentation/devicetree/bindings/net/dsa/hirschmann,hellcreek.yaml b/Documentation/devicetree/bindings/net/dsa/hirschmann,hellcreek.yaml index 228683773151..73b774eadd0b 100644 --- a/Documentation/devicetree/bindings/net/dsa/hirschmann,hellcreek.yaml +++ b/Documentation/devicetree/bindings/net/dsa/hirschmann,hellcreek.yaml @@ -91,8 +91,13 @@ examples: port@0 { reg = <0>; - label = "cpu"; ethernet = <&gmac0>; + phy-mode = "mii"; + + fixed-link { + speed = <100>; + full-duplex; + }; }; port@2 { diff --git a/Documentation/devicetree/bindings/net/dsa/lan9303.txt b/Documentation/devicetree/bindings/net/dsa/lan9303.txt index 464d6bf87605..46a732087f5c 100644 --- a/Documentation/devicetree/bindings/net/dsa/lan9303.txt +++ b/Documentation/devicetree/bindings/net/dsa/lan9303.txt @@ -46,7 +46,6 @@ I2C managed mode: port@0 { /* RMII fixed link to master */ reg = <0>; - label = "cpu"; ethernet = <&master>; }; @@ -83,7 +82,6 @@ MDIO managed mode: port@0 { reg = <0>; - label = "cpu"; ethernet = <&master>; }; diff --git a/Documentation/devicetree/bindings/net/dsa/lantiq-gswip.txt b/Documentation/devicetree/bindings/net/dsa/lantiq-gswip.txt index e3829d3e480e..8bb1eff21cb1 100644 --- a/Documentation/devicetree/bindings/net/dsa/lantiq-gswip.txt +++ b/Documentation/devicetree/bindings/net/dsa/lantiq-gswip.txt @@ -96,7 +96,6 @@ switch@e108000 { port@6 { reg = <0x6>; - label = "cpu"; ethernet = <ð0>; }; }; diff --git a/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml b/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml index 17ab6c69ecc7..f2e9ff3f580b 100644 --- a/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml +++ b/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml @@ -4,67 +4,92 @@ $id: http://devicetree.org/schemas/net/dsa/mediatek,mt7530.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Mediatek MT7530 Ethernet switch +title: Mediatek MT7530 and MT7531 Ethernet Switches maintainers: - - Sean Wang <sean.wang@mediatek.com> + - Arınç ÃœNAL <arinc.unal@arinc9.com> - Landen Chao <Landen.Chao@mediatek.com> - DENG Qingfang <dqfext@gmail.com> + - Sean Wang <sean.wang@mediatek.com> description: | - Port 5 of mt7530 and mt7621 switch is muxed between: - 1. GMAC5: GMAC5 can interface with another external MAC or PHY. - 2. PHY of port 0 or port 4: PHY interfaces with an external MAC like 2nd GMAC - of the SOC. Used in many setups where port 0/4 becomes the WAN port. - Note: On a MT7621 SOC with integrated switch: 2nd GMAC can only connected to - GMAC5 when the gpios for RGMII2 (GPIO 22-33) are not used and not - connected to external component! - - Port 5 modes/configurations: - 1. Port 5 is disabled and isolated: An external phy can interface to the 2nd - GMAC of the SOC. - In the case of a build-in MT7530 switch, port 5 shares the RGMII bus with 2nd - GMAC and an optional external phy. Mind the GPIO/pinctl settings of the SOC! - 2. Port 5 is muxed to PHY of port 0/4: Port 0/4 interfaces with 2nd GMAC. - It is a simple MAC to PHY interface, port 5 needs to be setup for xMII mode - and RGMII delay. - 3. Port 5 is muxed to GMAC5 and can interface to an external phy. - Port 5 becomes an extra switch port. - Only works on platform where external phy TX<->RX lines are swapped. - Like in the Ubiquiti ER-X-SFP. - 4. Port 5 is muxed to GMAC5 and interfaces with the 2nd GAMC as 2nd CPU port. - Currently a 2nd CPU port is not supported by DSA code. - - Depending on how the external PHY is wired: - 1. normal: The PHY can only connect to 2nd GMAC but not to the switch - 2. swapped: RGMII TX, RX are swapped; external phy interface with the switch as - a ethernet port. But can't interface to the 2nd GMAC. - - Based on the DT the port 5 mode is configured. - - Driver tries to lookup the phy-handle of the 2nd GMAC of the master device. - When phy-handle matches PHY of port 0 or 4 then port 5 set-up as mode 2. - phy-mode must be set, see also example 2 below! - * mt7621: phy-mode = "rgmii-txid"; - * mt7623: phy-mode = "rgmii"; - - CPU-Ports need a phy-mode property: - Allowed values on mt7530 and mt7621: - - "rgmii" - - "trgmii" - On mt7531: - - "1000base-x" - - "2500base-x" - - "rgmii" - - "sgmii" + There are two versions of MT7530, standalone and in a multi-chip module. + + MT7530 is a part of the multi-chip module in MT7620AN, MT7620DA, MT7620DAN, + MT7620NN, MT7621AT, MT7621DAT, MT7621ST and MT7623AI SoCs. + + MT7530 in MT7620AN, MT7620DA, MT7620DAN and MT7620NN SoCs has got 10/100 PHYs + and the switch registers are directly mapped into SoC's memory map rather than + using MDIO. The DSA driver currently doesn't support this. + + There is only the standalone version of MT7531. + + Port 5 on MT7530 has got various ways of configuration. + + For standalone MT7530: + + - Port 5 can be used as a CPU port. + + - PHY 0 or 4 of the switch can be muxed to connect to the gmac of the SoC + which port 5 is wired to. Usually used for connecting the wan port + directly to the CPU to achieve 2 Gbps routing in total. + + The driver looks up the reg on the ethernet-phy node which the phy-handle + property refers to on the gmac node to mux the specified phy. + + The driver requires the gmac of the SoC to have "mediatek,eth-mac" as the + compatible string and the reg must be 1. So, for now, only gmac1 of an + MediaTek SoC can benefit this. Banana Pi BPI-R2 suits this. + Check out example 5 for a similar configuration. + + - Port 5 can be wired to an external phy. Port 5 becomes a DSA slave. + Check out example 7 for a similar configuration. + + For multi-chip module MT7530: + + - Port 5 can be used as a CPU port. + + - PHY 0 or 4 of the switch can be muxed to connect to gmac1 of the SoC. + Usually used for connecting the wan port directly to the CPU to achieve 2 + Gbps routing in total. + + The driver looks up the reg on the ethernet-phy node which the phy-handle + property refers to on the gmac node to mux the specified phy. + + For the MT7621 SoCs, rgmii2 group must be claimed with rgmii2 function. + Check out example 5. + + - In case of an external phy wired to gmac1 of the SoC, port 5 must not be + enabled. + + In case of muxing PHY 0 or 4, the external phy must not be enabled. + + For the MT7621 SoCs, rgmii2 group must be claimed with rgmii2 function. + Check out example 6. + - Port 5 can be muxed to an external phy. Port 5 becomes a DSA slave. + The external phy must be wired TX to TX to gmac1 of the SoC for this to + work. Ubiquiti EdgeRouter X SFP is wired this way. + + Muxing PHY 0 or 4 won't work when the external phy is connected TX to TX. + + For the MT7621 SoCs, rgmii2 group must be claimed with gpio function. + Check out example 7. properties: compatible: - enum: - - mediatek,mt7530 - - mediatek,mt7531 - - mediatek,mt7621 + oneOf: + - description: + Standalone MT7530 and multi-chip module MT7530 in MT7623AI SoC + const: mediatek,mt7530 + + - description: + Standalone MT7531 + const: mediatek,mt7531 + + - description: + Multi-chip module MT7530 in MT7621AT, MT7621DAT and MT7621ST SoCs + const: mediatek,mt7621 reg: maxItems: 1 @@ -79,7 +104,14 @@ properties: gpio-controller: type: boolean description: - if defined, MT7530's LED controller will run on GPIO mode. + If defined, LED controller of the MT7530 switch will run on GPIO mode. + + There are 15 controllable pins. + port 0 LED 0..2 as GPIO 0..2 + port 1 LED 0..2 as GPIO 3..5 + port 2 LED 0..2 as GPIO 6..8 + port 3 LED 0..2 as GPIO 9..11 + port 4 LED 0..2 as GPIO 12..14 "#interrupt-cells": const: 1 @@ -92,17 +124,21 @@ properties: io-supply: description: Phandle to the regulator node necessary for the I/O power. - See Documentation/devicetree/bindings/regulator/mt6323-regulator.txt - for details for the regulator setup on these boards. + See Documentation/devicetree/bindings/regulator/mt6323-regulator.txt for + details for the regulator setup on these boards. mediatek,mcm: type: boolean description: - if defined, indicates that either MT7530 is the part on multi-chip - module belong to MT7623A has or the remotely standalone chip as the - function MT7623N reference board provided for. + Used for MT7621AT, MT7621DAT, MT7621ST and MT7623AI SoCs which the MT7530 + switch is a part of the multi-chip module. reset-gpios: + description: + GPIO to reset the switch. Use this if mediatek,mcm is not used. + This property is optional because some boards share the reset line with + other components which makes it impossible to probe the switch if the + reset line is used. maxItems: 1 reset-names: @@ -110,8 +146,8 @@ properties: resets: description: - Phandle pointing to the system reset controller with line index for - the ethsys. + Phandle pointing to the system reset controller with line index for the + ethsys. maxItems: 1 patternProperties: @@ -128,31 +164,88 @@ patternProperties: properties: reg: description: - Port address described must be 5 or 6 for CPU port and from 0 - to 5 for user ports. + Port address described must be 5 or 6 for CPU port and from 0 to 5 + for user ports. allOf: - $ref: dsa-port.yaml# - if: - properties: - label: - items: - - const: cpu + required: [ ethernet ] then: - required: - - reg - - phy-mode + properties: + reg: + enum: + - 5 + - 6 required: - compatible - reg +$defs: + mt7530-dsa-port: + patternProperties: + "^(ethernet-)?ports$": + patternProperties: + "^(ethernet-)?port@[0-9]+$": + if: + required: [ ethernet ] + then: + if: + properties: + reg: + const: 5 + then: + properties: + phy-mode: + enum: + - gmii + - mii + - rgmii + else: + properties: + phy-mode: + enum: + - rgmii + - trgmii + + mt7531-dsa-port: + patternProperties: + "^(ethernet-)?ports$": + patternProperties: + "^(ethernet-)?port@[0-9]+$": + if: + required: [ ethernet ] + then: + if: + properties: + reg: + const: 5 + then: + properties: + phy-mode: + enum: + - 1000base-x + - 2500base-x + - rgmii + - sgmii + else: + properties: + phy-mode: + enum: + - 1000base-x + - 2500base-x + - sgmii + allOf: - - $ref: "dsa.yaml#" + - $ref: dsa.yaml# - if: required: - mediatek,mcm then: + properties: + reset-gpios: false + required: - resets - reset-names @@ -163,52 +256,139 @@ allOf: - if: properties: compatible: - items: - - const: mediatek,mt7530 + const: mediatek,mt7530 then: + $ref: "#/$defs/mt7530-dsa-port" required: - core-supply - io-supply + - if: + properties: + compatible: + const: mediatek,mt7531 + then: + $ref: "#/$defs/mt7531-dsa-port" + properties: + gpio-controller: false + mediatek,mcm: false + + - if: + properties: + compatible: + const: mediatek,mt7621 + then: + $ref: "#/$defs/mt7530-dsa-port" + required: + - mediatek,mcm + unevaluatedProperties: false examples: + # Example 1: Standalone MT7530 - | #include <dt-bindings/gpio/gpio.h> + mdio { #address-cells = <1>; #size-cells = <0>; - switch@0 { + + switch@1f { compatible = "mediatek,mt7530"; - reg = <0>; + reg = <0x1f>; + + reset-gpios = <&pio 33 0>; core-supply = <&mt6323_vpa_reg>; io-supply = <&mt6323_vemc3v3_reg>; - reset-gpios = <&pio 33 GPIO_ACTIVE_HIGH>; ethernet-ports { #address-cells = <1>; #size-cells = <0>; + port@0 { reg = <0>; - label = "lan0"; + label = "lan1"; }; port@1 { reg = <1>; - label = "lan1"; + label = "lan2"; }; port@2 { reg = <2>; - label = "lan2"; + label = "lan3"; }; port@3 { reg = <3>; + label = "lan4"; + }; + + port@4 { + reg = <4>; + label = "wan"; + }; + + port@6 { + reg = <6>; + ethernet = <&gmac0>; + phy-mode = "rgmii"; + + fixed-link { + speed = <1000>; + full-duplex; + pause; + }; + }; + }; + }; + }; + + # Example 2: MT7530 in MT7623AI SoC + - | + #include <dt-bindings/reset/mt2701-resets.h> + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + switch@1f { + compatible = "mediatek,mt7530"; + reg = <0x1f>; + + mediatek,mcm; + resets = <ðsys MT2701_ETHSYS_MCM_RST>; + reset-names = "mcm"; + + core-supply = <&mt6323_vpa_reg>; + io-supply = <&mt6323_vemc3v3_reg>; + + ethernet-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "lan1"; + }; + + port@1 { + reg = <1>; + label = "lan2"; + }; + + port@2 { + reg = <2>; label = "lan3"; }; + port@3 { + reg = <3>; + label = "lan4"; + }; + port@4 { reg = <4>; label = "wan"; @@ -216,96 +396,226 @@ examples: port@6 { reg = <6>; - label = "cpu"; ethernet = <&gmac0>; phy-mode = "trgmii"; + fixed-link { speed = <1000>; full-duplex; + pause; }; }; }; }; }; + # Example 3: Standalone MT7531 - | - //Example 2: MT7621: Port 4 is WAN port: 2nd GMAC -> Port 5 -> PHY port 4. + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interrupt-controller/irq.h> - ethernet { + mdio { #address-cells = <1>; #size-cells = <0>; - gmac0: mac@0 { - compatible = "mediatek,eth-mac"; + + switch@0 { + compatible = "mediatek,mt7531"; reg = <0>; - phy-mode = "rgmii"; - fixed-link { - speed = <1000>; - full-duplex; - pause; + reset-gpios = <&pio 54 0>; + + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&pio>; + interrupts = <53 IRQ_TYPE_LEVEL_HIGH>; + + ethernet-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "lan1"; + }; + + port@1 { + reg = <1>; + label = "lan2"; + }; + + port@2 { + reg = <2>; + label = "lan3"; + }; + + port@3 { + reg = <3>; + label = "lan4"; + }; + + port@4 { + reg = <4>; + label = "wan"; + }; + + port@6 { + reg = <6>; + ethernet = <&gmac0>; + phy-mode = "2500base-x"; + + fixed-link { + speed = <2500>; + full-duplex; + pause; + }; + }; + }; + }; + }; + + # Example 4: MT7530 in MT7621AT, MT7621DAT and MT7621ST SoCs + - | + #include <dt-bindings/interrupt-controller/mips-gic.h> + #include <dt-bindings/reset/mt7621-reset.h> + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + switch@1f { + compatible = "mediatek,mt7621"; + reg = <0x1f>; + + mediatek,mcm; + resets = <&sysc MT7621_RST_MCM>; + reset-names = "mcm"; + + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&gic>; + interrupts = <GIC_SHARED 23 IRQ_TYPE_LEVEL_HIGH>; + + ethernet-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "lan1"; + }; + + port@1 { + reg = <1>; + label = "lan2"; + }; + + port@2 { + reg = <2>; + label = "lan3"; + }; + + port@3 { + reg = <3>; + label = "lan4"; + }; + + port@4 { + reg = <4>; + label = "wan"; + }; + + port@6 { + reg = <6>; + ethernet = <&gmac0>; + phy-mode = "trgmii"; + + fixed-link { + speed = <1000>; + full-duplex; + pause; + }; + }; }; }; + }; - gmac1: mac@1 { + # Example 5: MT7621: mux MT7530's phy4 to SoC's gmac1 + - | + #include <dt-bindings/interrupt-controller/mips-gic.h> + #include <dt-bindings/reset/mt7621-reset.h> + + ethernet { + #address-cells = <1>; + #size-cells = <0>; + + pinctrl-names = "default"; + pinctrl-0 = <&rgmii2_pins>; + + mac@1 { compatible = "mediatek,eth-mac"; reg = <1>; - phy-mode = "rgmii-txid"; - phy-handle = <&phy4>; + + phy-mode = "rgmii"; + phy-handle = <&example5_ethphy4>; }; - mdio: mdio-bus { + mdio { #address-cells = <1>; #size-cells = <0>; - /* Internal phy */ - phy4: ethernet-phy@4 { + /* MT7530's phy4 */ + example5_ethphy4: ethernet-phy@4 { reg = <4>; }; - mt7530: switch@1f { + switch@1f { compatible = "mediatek,mt7621"; reg = <0x1f>; - mediatek,mcm; - resets = <&rstctrl 2>; + mediatek,mcm; + resets = <&sysc MT7621_RST_MCM>; reset-names = "mcm"; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&gic>; + interrupts = <GIC_SHARED 23 IRQ_TYPE_LEVEL_HIGH>; + ethernet-ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; - label = "lan0"; + label = "lan1"; }; port@1 { reg = <1>; - label = "lan1"; + label = "lan2"; }; port@2 { reg = <2>; - label = "lan2"; + label = "lan3"; }; port@3 { reg = <3>; - label = "lan3"; + label = "lan4"; }; - /* Commented out. Port 4 is handled by 2nd GMAC. + /* Commented out, phy4 is muxed to gmac1. port@4 { reg = <4>; - label = "lan4"; + label = "wan"; }; */ port@6 { reg = <6>; - label = "cpu"; ethernet = <&gmac0>; - phy-mode = "rgmii"; + phy-mode = "trgmii"; fixed-link { speed = <1000>; @@ -318,82 +628,169 @@ examples: }; }; + # Example 6: MT7621: mux external phy to SoC's gmac1 - | - //Example 3: MT7621: Port 5 is connected to external PHY: Port 5 -> external PHY. + #include <dt-bindings/interrupt-controller/mips-gic.h> + #include <dt-bindings/reset/mt7621-reset.h> ethernet { #address-cells = <1>; #size-cells = <0>; - gmac_0: mac@0 { + + pinctrl-names = "default"; + pinctrl-0 = <&rgmii2_pins>; + + mac@1 { compatible = "mediatek,eth-mac"; - reg = <0>; + reg = <1>; + phy-mode = "rgmii"; + phy-handle = <&example6_ethphy7>; + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; - fixed-link { - speed = <1000>; - full-duplex; - pause; + /* External PHY */ + example6_ethphy7: ethernet-phy@7 { + reg = <7>; + phy-mode = "rgmii"; + }; + + switch@1f { + compatible = "mediatek,mt7621"; + reg = <0x1f>; + + mediatek,mcm; + resets = <&sysc MT7621_RST_MCM>; + reset-names = "mcm"; + + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&gic>; + interrupts = <GIC_SHARED 23 IRQ_TYPE_LEVEL_HIGH>; + + ethernet-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "lan1"; + }; + + port@1 { + reg = <1>; + label = "lan2"; + }; + + port@2 { + reg = <2>; + label = "lan3"; + }; + + port@3 { + reg = <3>; + label = "lan4"; + }; + + port@4 { + reg = <4>; + label = "wan"; + }; + + port@6 { + reg = <6>; + ethernet = <&gmac0>; + phy-mode = "trgmii"; + + fixed-link { + speed = <1000>; + full-duplex; + pause; + }; + }; + }; }; }; + }; + + # Example 7: MT7621: mux external phy to MT7530's port 5 + - | + #include <dt-bindings/interrupt-controller/mips-gic.h> + #include <dt-bindings/reset/mt7621-reset.h> + + ethernet { + #address-cells = <1>; + #size-cells = <0>; - mdio0: mdio-bus { + pinctrl-names = "default"; + pinctrl-0 = <&rgmii2_pins>; + + mdio { #address-cells = <1>; #size-cells = <0>; - /* External phy */ - ephy5: ethernet-phy@7 { + /* External PHY */ + example7_ethphy7: ethernet-phy@7 { reg = <7>; + phy-mode = "rgmii"; }; switch@1f { compatible = "mediatek,mt7621"; reg = <0x1f>; - mediatek,mcm; - resets = <&rstctrl 2>; + mediatek,mcm; + resets = <&sysc MT7621_RST_MCM>; reset-names = "mcm"; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&gic>; + interrupts = <GIC_SHARED 23 IRQ_TYPE_LEVEL_HIGH>; + ethernet-ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; - label = "lan0"; + label = "lan1"; }; port@1 { reg = <1>; - label = "lan1"; + label = "lan2"; }; port@2 { reg = <2>; - label = "lan2"; + label = "lan3"; }; port@3 { reg = <3>; - label = "lan3"; + label = "lan4"; }; port@4 { reg = <4>; - label = "lan4"; + label = "wan"; }; port@5 { reg = <5>; - label = "lan5"; - phy-mode = "rgmii"; - phy-handle = <&ephy5>; + label = "extphy"; + phy-mode = "rgmii-txid"; + phy-handle = <&example7_ethphy7>; }; - cpu_port0: port@6 { + port@6 { reg = <6>; - label = "cpu"; - ethernet = <&gmac_0>; - phy-mode = "rgmii"; + ethernet = <&gmac0>; + phy-mode = "trgmii"; fixed-link { speed = <1000>; diff --git a/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml b/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml index 6bbd8145b6c1..4da75b1f9533 100644 --- a/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml +++ b/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml @@ -107,8 +107,9 @@ examples: }; port@5 { reg = <5>; - label = "cpu"; ethernet = <ð0>; + phy-mode = "rgmii"; + fixed-link { speed = <1000>; full-duplex; @@ -144,8 +145,9 @@ examples: }; port@6 { reg = <6>; - label = "cpu"; ethernet = <ð0>; + phy-mode = "rgmii"; + fixed-link { speed = <1000>; full-duplex; diff --git a/Documentation/devicetree/bindings/net/dsa/mscc,ocelot.yaml b/Documentation/devicetree/bindings/net/dsa/mscc,ocelot.yaml new file mode 100644 index 000000000000..8d93ed9c172c --- /dev/null +++ b/Documentation/devicetree/bindings/net/dsa/mscc,ocelot.yaml @@ -0,0 +1,260 @@ +# SPDX-License-Identifier: (GPL-2.0 OR MIT) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/dsa/mscc,ocelot.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip Ocelot Switch Family Device Tree Bindings + +maintainers: + - Vladimir Oltean <vladimir.oltean@nxp.com> + - Claudiu Manoil <claudiu.manoil@nxp.com> + - Alexandre Belloni <alexandre.belloni@bootlin.com> + - UNGLinuxDriver@microchip.com + +description: | + There are multiple switches which are either part of the Ocelot-1 family, or + derivatives of this architecture. These switches can be found embedded in + various SoCs and accessed using MMIO, or as discrete chips and accessed over + SPI or PCIe. The present DSA binding shall be used when the host controlling + them performs packet I/O primarily through an Ethernet port of the switch + (which is attached to an Ethernet port of the host), rather than through + Frame DMA or register-based I/O. + + VSC9953 (Seville): + + This is found in the NXP T1040, where it is a memory-mapped platform + device. + + The following PHY interface types are supported: + + - phy-mode = "internal": on ports 8 and 9 + - phy-mode = "sgmii": on ports 0, 1, 2, 3, 4, 5, 6, 7 + - phy-mode = "qsgmii": on ports 0, 1, 2, 3, 4, 5, 6, 7 + - phy-mode = "1000base-x": on ports 0, 1, 2, 3, 4, 5, 6, 7 + + VSC9959 (Felix): + + This is found in the NXP LS1028A. It is a PCI device, part of the larger + enetc root complex. As a result, the ethernet-switch node is a sub-node of + the PCIe root complex node and its "reg" property conforms to the parent + node bindings, describing it as PF 5 of device 0, bus 0. + + If any external switch port is enabled, the enetc PF2 (enetc_port2) should + be enabled as well. This is because the internal MDIO bus (exposed through + EA BAR 0) used to access the MAC PCS registers truly belongs to the enetc + port 2 and not to Felix. + + The following PHY interface types are supported: + + - phy-mode = "internal": on ports 4 and 5 + - phy-mode = "sgmii": on ports 0, 1, 2, 3 + - phy-mode = "qsgmii": on ports 0, 1, 2, 3 + - phy-mode = "usxgmii": on ports 0, 1, 2, 3 + - phy-mode = "1000base-x": on ports 0, 1, 2, 3 + - phy-mode = "2500base-x": on ports 0, 1, 2, 3 + +properties: + compatible: + enum: + - mscc,vsc9953-switch + - pci1957,eef0 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + description: + Used to signal availability of PTP TX timestamps, and state changes of + the MAC merge layer of ports that support Frame Preemption. + + little-endian: true + big-endian: true + +required: + - compatible + - reg + +allOf: + - $ref: dsa.yaml# + - if: + properties: + compatible: + const: pci1957,eef0 + then: + required: + - interrupts + +unevaluatedProperties: false + +examples: + # Felix VSC9959 (NXP LS1028A) + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + + pcie { /* Integrated Endpoint Root Complex */ + #address-cells = <3>; + #size-cells = <2>; + + ethernet-switch@0,5 { + compatible = "pci1957,eef0"; + reg = <0x000500 0 0 0 0>; + interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; + + ethernet-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + phy-mode = "qsgmii"; + phy-handle = <&phy0>; + managed = "in-band-status"; + }; + + port@1 { + reg = <1>; + phy-mode = "qsgmii"; + phy-handle = <&phy1>; + managed = "in-band-status"; + }; + + port@2 { + reg = <2>; + phy-mode = "qsgmii"; + phy-handle = <&phy2>; + managed = "in-band-status"; + }; + + port@3 { + reg = <3>; + phy-mode = "qsgmii"; + phy-handle = <&phy3>; + managed = "in-band-status"; + }; + + port@4 { + reg = <4>; + ethernet = <&enetc_port2>; + phy-mode = "internal"; + + fixed-link { + speed = <2500>; + full-duplex; + pause; + }; + }; + + port@5 { + reg = <5>; + ethernet = <&enetc_port3>; + phy-mode = "internal"; + + fixed-link { + speed = <1000>; + full-duplex; + pause; + }; + }; + }; + }; + }; + # Seville VSC9953 (NXP T1040) + - | + soc { + #address-cells = <1>; + #size-cells = <1>; + + ethernet-switch@800000 { + compatible = "mscc,vsc9953-switch"; + reg = <0x800000 0x290000>; + little-endian; + + ethernet-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + phy-mode = "qsgmii"; + phy-handle = <&phy0>; + managed = "in-band-status"; + }; + + port@1 { + reg = <1>; + phy-mode = "qsgmii"; + phy-handle = <&phy1>; + managed = "in-band-status"; + }; + + port@2 { + reg = <2>; + phy-mode = "qsgmii"; + phy-handle = <&phy2>; + managed = "in-band-status"; + }; + + port@3 { + reg = <3>; + phy-mode = "qsgmii"; + phy-handle = <&phy3>; + managed = "in-band-status"; + }; + + port@4 { + reg = <4>; + phy-mode = "qsgmii"; + phy-handle = <&phy4>; + managed = "in-band-status"; + }; + + port@5 { + reg = <5>; + phy-mode = "qsgmii"; + phy-handle = <&phy5>; + managed = "in-band-status"; + }; + + port@6 { + reg = <6>; + phy-mode = "qsgmii"; + phy-handle = <&phy6>; + managed = "in-band-status"; + }; + + port@7 { + reg = <7>; + phy-mode = "qsgmii"; + phy-handle = <&phy7>; + managed = "in-band-status"; + }; + + port@8 { + reg = <8>; + phy-mode = "internal"; + ethernet = <&enet0>; + + fixed-link { + speed = <2500>; + full-duplex; + pause; + }; + }; + + port@9 { + reg = <9>; + phy-mode = "internal"; + ethernet = <&enet1>; + + fixed-link { + speed = <2500>; + full-duplex; + pause; + }; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/net/dsa/ocelot.txt b/Documentation/devicetree/bindings/net/dsa/ocelot.txt deleted file mode 100644 index 7a271d070b72..000000000000 --- a/Documentation/devicetree/bindings/net/dsa/ocelot.txt +++ /dev/null @@ -1,213 +0,0 @@ -Microchip Ocelot switch driver family -===================================== - -Felix ------ - -Currently the switches supported by the felix driver are: - -- VSC9959 (Felix) -- VSC9953 (Seville) - -The VSC9959 switch is found in the NXP LS1028A. It is a PCI device, part of the -larger ENETC root complex. As a result, the ethernet-switch node is a sub-node -of the PCIe root complex node and its "reg" property conforms to the parent -node bindings: - -* reg: Specifies PCIe Device Number and Function Number of the endpoint device, - in this case for the Ethernet L2Switch it is PF5 (of device 0, bus 0). - -It does not require a "compatible" string. - -The interrupt line is used to signal availability of PTP TX timestamps and for -TSN frame preemption. - -For the external switch ports, depending on board configuration, "phy-mode" and -"phy-handle" are populated by board specific device tree instances. Ports 4 and -5 are fixed as internal ports in the NXP LS1028A instantiation. - -The CPU port property ("ethernet") configures the feature called "NPI port" in -the Ocelot hardware core. The CPU port in Ocelot is a set of queues, which are -connected, in the Node Processor Interface (NPI) mode, to an Ethernet port. -By default, in fsl-ls1028a.dtsi, the NPI port is assigned to the internal -2.5Gbps port@4, but can be moved to the 1Gbps port@5, depending on the specific -use case. Moving the NPI port to an external switch port is hardware possible, -but there is no platform support for the Linux system on the LS1028A chip to -operate as an entire slave DSA chip. NPI functionality (and therefore DSA -tagging) is supported on a single port at a time. - -Any port can be disabled (and in fsl-ls1028a.dtsi, they are indeed all disabled -by default, and should be enabled on a per-board basis). But if any external -switch port is enabled at all, the ENETC PF2 (enetc_port2) should be enabled as -well, regardless of whether it is configured as the DSA master or not. This is -because the Felix PHYLINK implementation accesses the MAC PCS registers, which -in hardware truly belong to the ENETC port #2 and not to Felix. - -Supported PHY interface types (appropriate SerDes protocol setting changes are -needed in the RCW binary): - -* phy_mode = "internal": on ports 4 and 5 -* phy_mode = "sgmii": on ports 0, 1, 2, 3 -* phy_mode = "qsgmii": on ports 0, 1, 2, 3 -* phy_mode = "usxgmii": on ports 0, 1, 2, 3 -* phy_mode = "2500base-x": on ports 0, 1, 2, 3 - -For the rest of the device tree binding definitions, which are standard DSA and -PCI, refer to the following documents: - -Documentation/devicetree/bindings/net/dsa/dsa.txt -Documentation/devicetree/bindings/pci/pci.txt - -Example: - -&soc { - pcie@1f0000000 { /* Integrated Endpoint Root Complex */ - ethernet-switch@0,5 { - reg = <0x000500 0 0 0 0>; - /* IEP INT_B */ - interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - /* External ports */ - port@0 { - reg = <0>; - label = "swp0"; - }; - - port@1 { - reg = <1>; - label = "swp1"; - }; - - port@2 { - reg = <2>; - label = "swp2"; - }; - - port@3 { - reg = <3>; - label = "swp3"; - }; - - /* Tagging CPU port */ - port@4 { - reg = <4>; - ethernet = <&enetc_port2>; - phy-mode = "internal"; - - fixed-link { - speed = <2500>; - full-duplex; - }; - }; - - /* Non-tagging CPU port */ - port@5 { - reg = <5>; - phy-mode = "internal"; - status = "disabled"; - - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - }; - }; - }; -}; - -The VSC9953 switch is found inside NXP T1040. It is a platform device with the -following required properties: - -- compatible: - Must be "mscc,vsc9953-switch". - -Supported PHY interface types (appropriate SerDes protocol setting changes are -needed in the RCW binary): - -* phy_mode = "internal": on ports 8 and 9 -* phy_mode = "sgmii": on ports 0, 1, 2, 3, 4, 5, 6, 7 -* phy_mode = "qsgmii": on ports 0, 1, 2, 3, 4, 5, 6, 7 - -Example: - -&soc { - ethernet-switch@800000 { - #address-cells = <0x1>; - #size-cells = <0x0>; - compatible = "mscc,vsc9953-switch"; - little-endian; - reg = <0x800000 0x290000>; - - ports { - #address-cells = <0x1>; - #size-cells = <0x0>; - - port@0 { - reg = <0x0>; - label = "swp0"; - }; - - port@1 { - reg = <0x1>; - label = "swp1"; - }; - - port@2 { - reg = <0x2>; - label = "swp2"; - }; - - port@3 { - reg = <0x3>; - label = "swp3"; - }; - - port@4 { - reg = <0x4>; - label = "swp4"; - }; - - port@5 { - reg = <0x5>; - label = "swp5"; - }; - - port@6 { - reg = <0x6>; - label = "swp6"; - }; - - port@7 { - reg = <0x7>; - label = "swp7"; - }; - - port@8 { - reg = <0x8>; - phy-mode = "internal"; - ethernet = <&enet0>; - - fixed-link { - speed = <2500>; - full-duplex; - }; - }; - - port@9 { - reg = <0x9>; - phy-mode = "internal"; - status = "disabled"; - - fixed-link { - speed = <2500>; - full-duplex; - }; - }; - }; - }; -}; diff --git a/Documentation/devicetree/bindings/net/dsa/qca8k.yaml b/Documentation/devicetree/bindings/net/dsa/qca8k.yaml index f3c88371d76c..978162df51f7 100644 --- a/Documentation/devicetree/bindings/net/dsa/qca8k.yaml +++ b/Documentation/devicetree/bindings/net/dsa/qca8k.yaml @@ -159,7 +159,6 @@ examples: port@0 { reg = <0>; - label = "cpu"; ethernet = <&gmac1>; phy-mode = "rgmii"; @@ -221,7 +220,6 @@ examples: port@0 { reg = <0>; - label = "cpu"; ethernet = <&gmac1>; phy-mode = "rgmii"; @@ -268,7 +266,6 @@ examples: port@6 { reg = <0>; - label = "cpu"; ethernet = <&gmac1>; phy-mode = "sgmii"; diff --git a/Documentation/devicetree/bindings/net/dsa/realtek.yaml b/Documentation/devicetree/bindings/net/dsa/realtek.yaml index 4f99aff029dc..1a7d45a8ad66 100644 --- a/Documentation/devicetree/bindings/net/dsa/realtek.yaml +++ b/Documentation/devicetree/bindings/net/dsa/realtek.yaml @@ -189,7 +189,6 @@ examples: }; port@5 { reg = <5>; - label = "cpu"; ethernet = <&gmac0>; phy-mode = "rgmii"; fixed-link { @@ -277,7 +276,6 @@ examples: }; port@6 { reg = <6>; - label = "cpu"; ethernet = <&fec1>; phy-mode = "rgmii"; tx-internal-delay-ps = <2000>; diff --git a/Documentation/devicetree/bindings/net/dsa/renesas,rzn1-a5psw.yaml b/Documentation/devicetree/bindings/net/dsa/renesas,rzn1-a5psw.yaml index 4d428f5ad044..7ca9c19a157c 100644 --- a/Documentation/devicetree/bindings/net/dsa/renesas,rzn1-a5psw.yaml +++ b/Documentation/devicetree/bindings/net/dsa/renesas,rzn1-a5psw.yaml @@ -130,7 +130,8 @@ examples: port@4 { reg = <4>; ethernet = <&gmac2>; - label = "cpu"; + phy-mode = "internal"; + fixed-link { speed = <1000>; full-duplex; diff --git a/Documentation/devicetree/bindings/net/dsa/vitesse,vsc73xx.txt b/Documentation/devicetree/bindings/net/dsa/vitesse,vsc73xx.txt index bbf4a13f6d75..258bef483673 100644 --- a/Documentation/devicetree/bindings/net/dsa/vitesse,vsc73xx.txt +++ b/Documentation/devicetree/bindings/net/dsa/vitesse,vsc73xx.txt @@ -75,7 +75,6 @@ switch@0 { }; vsc: port@6 { reg = <6>; - label = "cpu"; ethernet = <&gmac1>; phy-mode = "rgmii"; fixed-link { @@ -117,7 +116,6 @@ switch@2,0 { }; vsc: port@6 { reg = <6>; - label = "cpu"; ethernet = <&enet0>; phy-mode = "rgmii"; fixed-link { diff --git a/Documentation/devicetree/bindings/net/engleder,tsnep.yaml b/Documentation/devicetree/bindings/net/engleder,tsnep.yaml index d0e1476e15b5..5bd964a46a9d 100644 --- a/Documentation/devicetree/bindings/net/engleder,tsnep.yaml +++ b/Documentation/devicetree/bindings/net/engleder,tsnep.yaml @@ -20,7 +20,26 @@ properties: maxItems: 1 interrupts: - maxItems: 1 + minItems: 1 + maxItems: 8 + + interrupt-names: + minItems: 1 + items: + - const: mac + - const: txrx-1 + - const: txrx-2 + - const: txrx-3 + - const: txrx-4 + - const: txrx-5 + - const: txrx-6 + - const: txrx-7 + description: + The main interrupt for basic MAC features and the first TX/RX queue pair + is named "mac". "txrx-[1-7]" are the interrupts for additional TX/RX + queue pairs. + + dma-coherent: true local-mac-address: true @@ -58,7 +77,7 @@ examples: axi { #address-cells = <2>; #size-cells = <2>; - tnsep0: ethernet@a0000000 { + tsnep0: ethernet@a0000000 { compatible = "engleder,tsnep"; reg = <0x0 0xa0000000 0x0 0x10000>; interrupts = <0 89 1>; @@ -76,4 +95,24 @@ examples: }; }; }; + + tsnep1: ethernet@a0010000 { + compatible = "engleder,tsnep"; + reg = <0x0 0xa0010000 0x0 0x10000>; + interrupts = <0 93 1>, <0 94 1>, <0 95 1>, <0 96 1>; + interrupt-names = "mac", "txrx-1", "txrx-2", "txrx-3"; + interrupt-parent = <&gic>; + local-mac-address = [00 00 00 00 00 00]; + phy-mode = "rgmii"; + phy-handle = <&phy1>; + mdio { + #address-cells = <1>; + #size-cells = <0>; + suppress-preamble; + phy1: ethernet-phy@1 { + reg = <1>; + rxc-skew-ps = <1080>; + }; + }; + }; }; diff --git a/Documentation/devicetree/bindings/net/ethernet-controller.yaml b/Documentation/devicetree/bindings/net/ethernet-controller.yaml index c138a1022879..4b3c590fcebf 100644 --- a/Documentation/devicetree/bindings/net/ethernet-controller.yaml +++ b/Documentation/devicetree/bindings/net/ethernet-controller.yaml @@ -67,6 +67,7 @@ properties: - gmii - sgmii - qsgmii + - qusgmii - tbi - rev-mii - rmii diff --git a/Documentation/devicetree/bindings/net/ethernet-phy.yaml b/Documentation/devicetree/bindings/net/ethernet-phy.yaml index ed1415a4381f..ad808e9ce5b9 100644 --- a/Documentation/devicetree/bindings/net/ethernet-phy.yaml +++ b/Documentation/devicetree/bindings/net/ethernet-phy.yaml @@ -144,6 +144,12 @@ properties: Mark the corresponding energy efficient ethernet mode as broken and request the ethernet to stop advertising it. + pses: + $ref: /schemas/types.yaml#/definitions/phandle-array + maxItems: 1 + description: + Specifies a reference to a node representing a Power Sourcing Equipment. + phy-is-integrated: $ref: /schemas/types.yaml#/definitions/flag description: diff --git a/Documentation/devicetree/bindings/net/fsl,fec.yaml b/Documentation/devicetree/bindings/net/fsl,fec.yaml index 5cfb661be124..e0f376f7e274 100644 --- a/Documentation/devicetree/bindings/net/fsl,fec.yaml +++ b/Documentation/devicetree/bindings/net/fsl,fec.yaml @@ -21,6 +21,7 @@ properties: - fsl,imx28-fec - fsl,imx6q-fec - fsl,mvf600-fec + - fsl,s32v234-fec - items: - enum: - fsl,imx53-fec diff --git a/Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml b/Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml new file mode 100644 index 000000000000..3a35ac1c260d --- /dev/null +++ b/Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml @@ -0,0 +1,145 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/fsl,fman-dtsec.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP FMan MAC + +maintainers: + - Madalin Bucur <madalin.bucur@nxp.com> + +description: | + Each FMan has several MACs, each implementing an Ethernet interface. Earlier + versions of FMan used the Datapath Three Speed Ethernet Controller (dTSEC) for + 10/100/1000 MBit/s speeds, and the 10-Gigabit Ethernet Media Access Controller + (10GEC) for 10 Gbit/s speeds. Later versions of FMan use the Multirate + Ethernet Media Access Controller (mEMAC) to handle all speeds. + +properties: + compatible: + enum: + - fsl,fman-dtsec + - fsl,fman-xgec + - fsl,fman-memac + + cell-index: + maximum: 64 + description: | + FManV2: + register[bit] MAC cell-index + ============================================================ + FM_EPI[16] XGEC 8 + FM_EPI[16+n] dTSECn n-1 + FM_NPI[11+n] dTSECn n-1 + n = 1,..,5 + + FManV3: + register[bit] MAC cell-index + ============================================================ + FM_EPI[16+n] mEMACn n-1 + FM_EPI[25] mEMAC10 9 + + FM_NPI[11+n] mEMACn n-1 + FM_NPI[10] mEMAC10 9 + FM_NPI[11] mEMAC9 8 + n = 1,..8 + + FM_EPI and FM_NPI are located in the FMan memory map. + + 2. SoC registers: + + - P2041, P3041, P4080 P5020, P5040: + register[bit] FMan MAC cell + Unit index + ============================================================ + DCFG_DEVDISR2[7] 1 XGEC 8 + DCFG_DEVDISR2[7+n] 1 dTSECn n-1 + DCFG_DEVDISR2[15] 2 XGEC 8 + DCFG_DEVDISR2[15+n] 2 dTSECn n-1 + n = 1,..5 + + - T1040, T2080, T4240, B4860: + register[bit] FMan MAC cell + Unit index + ============================================================ + DCFG_CCSR_DEVDISR2[n-1] 1 mEMACn n-1 + DCFG_CCSR_DEVDISR2[11+n] 2 mEMACn n-1 + n = 1,..6,9,10 + + EVDISR, DCFG_DEVDISR2 and DCFG_CCSR_DEVDISR2 are located in + the specific SoC "Device Configuration/Pin Control" Memory + Map. + + reg: + maxItems: 1 + + fsl,fman-ports: + $ref: /schemas/types.yaml#/definitions/phandle-array + maxItems: 2 + description: | + An array of two references: the first is the FMan RX port and the second + is the TX port used by this MAC. + + ptp-timer: + $ref: /schemas/types.yaml#/definitions/phandle + description: A reference to the IEEE1588 timer + + pcsphy-handle: + $ref: /schemas/types.yaml#/definitions/phandle + description: A reference to the PCS (typically found on the SerDes) + + tbi-handle: + $ref: /schemas/types.yaml#/definitions/phandle + description: A reference to the (TBI-based) PCS + +required: + - compatible + - cell-index + - reg + - fsl,fman-ports + - ptp-timer + +allOf: + - $ref: ethernet-controller.yaml# + - if: + properties: + compatible: + contains: + const: fsl,fman-dtsec + then: + required: + - tbi-handle + - if: + properties: + compatible: + contains: + const: fsl,fman-memac + then: + required: + - pcsphy-handle + +unevaluatedProperties: false + +examples: + - | + ethernet@e0000 { + compatible = "fsl,fman-dtsec"; + cell-index = <0>; + reg = <0xe0000 0x1000>; + fsl,fman-ports = <&fman1_rx8 &fman1_tx28>; + ptp-timer = <&ptp_timer>; + tbi-handle = <&tbi0>; + }; + - | + ethernet@e8000 { + cell-index = <4>; + compatible = "fsl,fman-memac"; + reg = <0xe8000 0x1000>; + fsl,fman-ports = <&fman0_rx_0x0c &fman0_tx_0x2c>; + ptp-timer = <&ptp_timer0>; + pcsphy-handle = <&pcsphy4>; + phy-handle = <&sgmii_phy1>; + phy-connection-type = "sgmii"; + }; +... diff --git a/Documentation/devicetree/bindings/net/fsl-fman.txt b/Documentation/devicetree/bindings/net/fsl-fman.txt index 801efc7d6818..b9055335db3b 100644 --- a/Documentation/devicetree/bindings/net/fsl-fman.txt +++ b/Documentation/devicetree/bindings/net/fsl-fman.txt @@ -232,133 +232,7 @@ port@81000 { ============================================================================= FMan dTSEC/XGEC/mEMAC Node -DESCRIPTION - -mEMAC/dTSEC/XGEC are the Ethernet network interfaces - -PROPERTIES - -- compatible - Usage: required - Value type: <stringlist> - Definition: A standard property. - Must include one of the following: - - "fsl,fman-dtsec" for dTSEC MAC - - "fsl,fman-xgec" for XGEC MAC - - "fsl,fman-memac" for mEMAC MAC - -- cell-index - Usage: required - Value type: <u32> - Definition: Specifies the MAC id. - - The cell-index value may be used by the FMan or the SoC, to - identify the MAC unit in the FMan (or SoC) memory map. - In the tables below there's a description of the cell-index - use, there are two tables, one describes the use of cell-index - by the FMan, the second describes the use by the SoC: - - 1. FMan Registers - - FManV2: - register[bit] MAC cell-index - ============================================================ - FM_EPI[16] XGEC 8 - FM_EPI[16+n] dTSECn n-1 - FM_NPI[11+n] dTSECn n-1 - n = 1,..,5 - - FManV3: - register[bit] MAC cell-index - ============================================================ - FM_EPI[16+n] mEMACn n-1 - FM_EPI[25] mEMAC10 9 - - FM_NPI[11+n] mEMACn n-1 - FM_NPI[10] mEMAC10 9 - FM_NPI[11] mEMAC9 8 - n = 1,..8 - - FM_EPI and FM_NPI are located in the FMan memory map. - - 2. SoC registers: - - - P2041, P3041, P4080 P5020, P5040: - register[bit] FMan MAC cell - Unit index - ============================================================ - DCFG_DEVDISR2[7] 1 XGEC 8 - DCFG_DEVDISR2[7+n] 1 dTSECn n-1 - DCFG_DEVDISR2[15] 2 XGEC 8 - DCFG_DEVDISR2[15+n] 2 dTSECn n-1 - n = 1,..5 - - - T1040, T2080, T4240, B4860: - register[bit] FMan MAC cell - Unit index - ============================================================ - DCFG_CCSR_DEVDISR2[n-1] 1 mEMACn n-1 - DCFG_CCSR_DEVDISR2[11+n] 2 mEMACn n-1 - n = 1,..6,9,10 - - EVDISR, DCFG_DEVDISR2 and DCFG_CCSR_DEVDISR2 are located in - the specific SoC "Device Configuration/Pin Control" Memory - Map. - -- reg - Usage: required - Value type: <prop-encoded-array> - Definition: A standard property. - -- fsl,fman-ports - Usage: required - Value type: <prop-encoded-array> - Definition: An array of two phandles - the first references is - the FMan RX port and the second is the TX port used by this - MAC. - -- ptp-timer - Usage required - Value type: <phandle> - Definition: A phandle for 1EEE1588 timer. - -- pcsphy-handle - Usage required for "fsl,fman-memac" MACs - Value type: <phandle> - Definition: A phandle for pcsphy. - -- tbi-handle - Usage required for "fsl,fman-dtsec" MACs - Value type: <phandle> - Definition: A phandle for tbiphy. - -EXAMPLE - -fman1_tx28: port@a8000 { - cell-index = <0x28>; - compatible = "fsl,fman-v2-port-tx"; - reg = <0xa8000 0x1000>; -}; - -fman1_rx8: port@88000 { - cell-index = <0x8>; - compatible = "fsl,fman-v2-port-rx"; - reg = <0x88000 0x1000>; -}; - -ptp-timer: ptp_timer@fe000 { - compatible = "fsl,fman-ptp-timer"; - reg = <0xfe000 0x1000>; -}; - -ethernet@e0000 { - compatible = "fsl,fman-dtsec"; - cell-index = <0>; - reg = <0xe0000 0x1000>; - fsl,fman-ports = <&fman1_rx8 &fman1_tx28>; - ptp-timer = <&ptp-timer>; - tbi-handle = <&tbi0>; -}; +Refer to Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml ============================================================================ FMan IEEE 1588 Node diff --git a/Documentation/devicetree/bindings/net/intel,dwmac-plat.yaml b/Documentation/devicetree/bindings/net/intel,dwmac-plat.yaml index 52a7fa4f49a4..d23fa3771210 100644 --- a/Documentation/devicetree/bindings/net/intel,dwmac-plat.yaml +++ b/Documentation/devicetree/bindings/net/intel,dwmac-plat.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/net/intel,dwmac-plat.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Intel DWMAC glue layer Device Tree Bindings +title: Intel DWMAC glue layer maintainers: - Vineetha G. Jaya Kumaran <vineetha.g.jaya.kumaran@intel.com> diff --git a/Documentation/devicetree/bindings/net/mediatek,mt7620-gsw.txt b/Documentation/devicetree/bindings/net/mediatek,mt7620-gsw.txt deleted file mode 100644 index 358fed2fab43..000000000000 --- a/Documentation/devicetree/bindings/net/mediatek,mt7620-gsw.txt +++ /dev/null @@ -1,24 +0,0 @@ -Mediatek Gigabit Switch -======================= - -The mediatek gigabit switch can be found on Mediatek SoCs (mt7620, mt7621). - -Required properties: -- compatible: Should be "mediatek,mt7620-gsw" or "mediatek,mt7621-gsw" -- reg: Address and length of the register set for the device -- interrupts: Should contain the gigabit switches interrupt -- resets: Should contain the gigabit switches resets -- reset-names: Should contain the reset names "gsw" - -Example: - -gsw@10110000 { - compatible = "ralink,mt7620-gsw"; - reg = <0x10110000 8000>; - - resets = <&rstctrl 23>; - reset-names = "gsw"; - - interrupt-parent = <&intc>; - interrupts = <17>; -}; diff --git a/Documentation/devicetree/bindings/net/mediatek,net.yaml b/Documentation/devicetree/bindings/net/mediatek,net.yaml index f5564ecddb62..7ef696204c5a 100644 --- a/Documentation/devicetree/bindings/net/mediatek,net.yaml +++ b/Documentation/devicetree/bindings/net/mediatek,net.yaml @@ -69,6 +69,15 @@ properties: A list of phandle to the syscon node that handles the SGMII setup which is required for those SoCs equipped with SGMII. + mediatek,wed: + $ref: /schemas/types.yaml#/definitions/phandle-array + minItems: 2 + maxItems: 2 + items: + maxItems: 1 + description: + List of phandles to wireless ethernet dispatch nodes. + dma-coherent: true mdio-bus: @@ -112,6 +121,8 @@ allOf: Phandle to the syscon node that handles the ports slew rate and driver current. + mediatek,wed: false + - if: properties: compatible: @@ -144,15 +155,6 @@ allOf: minItems: 1 maxItems: 1 - mediatek,wed: - $ref: /schemas/types.yaml#/definitions/phandle-array - minItems: 2 - maxItems: 2 - items: - maxItems: 1 - description: - List of phandles to wireless ethernet dispatch nodes. - mediatek,pcie-mirror: $ref: /schemas/types.yaml#/definitions/phandle description: @@ -202,6 +204,8 @@ allOf: minItems: 2 maxItems: 2 + mediatek,wed: false + - if: properties: compatible: @@ -238,6 +242,11 @@ allOf: minItems: 2 maxItems: 2 + mediatek,wed-pcie: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to the mediatek wed-pcie controller. + patternProperties: "^mac@[0-1]$": type: object diff --git a/Documentation/devicetree/bindings/net/mediatek-dwmac.yaml b/Documentation/devicetree/bindings/net/mediatek-dwmac.yaml index 61b2fb9e141b..0fa2132fa4f4 100644 --- a/Documentation/devicetree/bindings/net/mediatek-dwmac.yaml +++ b/Documentation/devicetree/bindings/net/mediatek-dwmac.yaml @@ -19,6 +19,7 @@ select: contains: enum: - mediatek,mt2712-gmac + - mediatek,mt8188-gmac - mediatek,mt8195-gmac required: - compatible @@ -37,6 +38,11 @@ properties: - enum: - mediatek,mt8195-gmac - const: snps,dwmac-5.10a + - items: + - enum: + - mediatek,mt8188-gmac + - const: mediatek,mt8195-gmac + - const: snps,dwmac-5.10a clocks: minItems: 5 @@ -74,7 +80,7 @@ properties: or will round down. Range 0~31*170. For MT2712 RMII/MII interface, Allowed value need to be a multiple of 550, or will round down. Range 0~31*550. - For MT8195 RGMII/RMII/MII interface, Allowed value need to be a multiple of 290, + For MT8188/MT8195 RGMII/RMII/MII interface, Allowed value need to be a multiple of 290, or will round down. Range 0~31*290. mediatek,rx-delay-ps: @@ -84,7 +90,7 @@ properties: or will round down. Range 0~31*170. For MT2712 RMII/MII interface, Allowed value need to be a multiple of 550, or will round down. Range 0~31*550. - For MT8195 RGMII/RMII/MII interface, Allowed value need to be a multiple + For MT8188/MT8195 RGMII/RMII/MII interface, Allowed value need to be a multiple of 290, or will round down. Range 0~31*290. mediatek,rmii-rxc: diff --git a/Documentation/devicetree/bindings/net/microchip,sparx5-switch.yaml b/Documentation/devicetree/bindings/net/microchip,sparx5-switch.yaml index 6c86d3d85e99..57ffeb8fc876 100644 --- a/Documentation/devicetree/bindings/net/microchip,sparx5-switch.yaml +++ b/Documentation/devicetree/bindings/net/microchip,sparx5-switch.yaml @@ -74,16 +74,20 @@ properties: ethernet-ports: type: object + additionalProperties: false + + properties: + '#address-cells': + const: 1 + '#size-cells': + const: 0 + patternProperties: "^port@[0-9a-f]+$": - type: object + $ref: /schemas/net/ethernet-controller.yaml# + unevaluatedProperties: false properties: - '#address-cells': - const: 1 - '#size-cells': - const: 0 - reg: description: Switch port number @@ -93,29 +97,11 @@ properties: phandle of a Ethernet SerDes PHY. This defines which SerDes instance will handle the Ethernet traffic. - phy-mode: - description: - This specifies the interface used by the Ethernet SerDes towards - the PHY or SFP. - microchip,bandwidth: description: Specifies bandwidth in Mbit/s allocated to the port. $ref: "/schemas/types.yaml#/definitions/uint32" maximum: 25000 - phy-handle: - description: - phandle of a Ethernet PHY. This is optional and if provided it - points to the cuPHY used by the Ethernet SerDes. - - sfp: - description: - phandle of an SFP. This is optional and used when not specifying - a cuPHY. It points to the SFP node that describes the SFP used by - the Ethernet SerDes. - - managed: true - microchip,sd-sgpio: description: Index of the ports Signal Detect SGPIO in the set of 384 SGPIOs @@ -144,8 +130,6 @@ required: - reg-names - interrupts - interrupt-names - - resets - - reset-names - ethernet-ports additionalProperties: false diff --git a/Documentation/devicetree/bindings/net/nfc/marvell,nci.yaml b/Documentation/devicetree/bindings/net/nfc/marvell,nci.yaml index a191a04e681c..308485a8ee6c 100644 --- a/Documentation/devicetree/bindings/net/nfc/marvell,nci.yaml +++ b/Documentation/devicetree/bindings/net/nfc/marvell,nci.yaml @@ -128,7 +128,7 @@ examples: i2c-int-rising; - reset-n-io = <&gpio3 19 GPIO_ACTIVE_HIGH>; + reset-n-io = <&gpio3 19 GPIO_ACTIVE_LOW>; }; }; @@ -151,7 +151,7 @@ examples: interrupt-parent = <&gpio1>; interrupts = <17 IRQ_TYPE_EDGE_RISING>; - reset-n-io = <&gpio3 19 GPIO_ACTIVE_HIGH>; + reset-n-io = <&gpio3 19 GPIO_ACTIVE_LOW>; }; }; @@ -162,7 +162,7 @@ examples: nfc { compatible = "marvell,nfc-uart"; - reset-n-io = <&gpio3 16 GPIO_ACTIVE_HIGH>; + reset-n-io = <&gpio3 16 GPIO_ACTIVE_LOW>; hci-muxed; flow-control; diff --git a/Documentation/devicetree/bindings/net/nvidia,tegra234-mgbe.yaml b/Documentation/devicetree/bindings/net/nvidia,tegra234-mgbe.yaml new file mode 100644 index 000000000000..2bd3efff2485 --- /dev/null +++ b/Documentation/devicetree/bindings/net/nvidia,tegra234-mgbe.yaml @@ -0,0 +1,162 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/nvidia,tegra234-mgbe.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Tegra234 MGBE Multi-Gigabit Ethernet Controller + +maintainers: + - Thierry Reding <treding@nvidia.com> + - Jon Hunter <jonathanh@nvidia.com> + +properties: + compatible: + const: nvidia,tegra234-mgbe + + reg: + maxItems: 3 + + reg-names: + items: + - const: hypervisor + - const: mac + - const: xpcs + + interrupts: + minItems: 1 + maxItems: 3 + + interrupt-names: + minItems: 1 + items: + - const: common + - const: macsec-ns + - const: macsec + + clocks: + maxItems: 12 + + clock-names: + items: + - const: mgbe + - const: mac + - const: mac-divider + - const: ptp-ref + - const: rx-input-m + - const: rx-input + - const: tx + - const: eee-pcs + - const: rx-pcs-input + - const: rx-pcs-m + - const: rx-pcs + - const: tx-pcs + + resets: + maxItems: 2 + + reset-names: + items: + - const: mac + - const: pcs + + interconnects: + items: + - description: memory read client + - description: memory write client + + interconnect-names: + items: + - const: dma-mem + - const: write + + iommus: + maxItems: 1 + + power-domains: + maxItems: 1 + + phy-handle: true + + phy-mode: + contains: + enum: + - usxgmii + - 10gbase-kr + + mdio: + $ref: mdio.yaml# + unevaluatedProperties: false + description: + Optional node for embedded MDIO controller. + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + - clock-names + - resets + - reset-names + - power-domains + - phy-handle + - phy-mode + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/tegra234-clock.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/memory/tegra234-mc.h> + #include <dt-bindings/power/tegra234-powergate.h> + #include <dt-bindings/reset/tegra234-reset.h> + + ethernet@6800000 { + compatible = "nvidia,tegra234-mgbe"; + reg = <0x06800000 0x10000>, + <0x06810000 0x10000>, + <0x068a0000 0x10000>; + reg-names = "hypervisor", "mac", "xpcs"; + interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "common"; + clocks = <&bpmp TEGRA234_CLK_MGBE0_APP>, + <&bpmp TEGRA234_CLK_MGBE0_MAC>, + <&bpmp TEGRA234_CLK_MGBE0_MAC_DIVIDER>, + <&bpmp TEGRA234_CLK_MGBE0_PTP_REF>, + <&bpmp TEGRA234_CLK_MGBE0_RX_INPUT_M>, + <&bpmp TEGRA234_CLK_MGBE0_RX_INPUT>, + <&bpmp TEGRA234_CLK_MGBE0_TX>, + <&bpmp TEGRA234_CLK_MGBE0_EEE_PCS>, + <&bpmp TEGRA234_CLK_MGBE0_RX_PCS_INPUT>, + <&bpmp TEGRA234_CLK_MGBE0_RX_PCS_M>, + <&bpmp TEGRA234_CLK_MGBE0_RX_PCS>, + <&bpmp TEGRA234_CLK_MGBE0_TX_PCS>; + clock-names = "mgbe", "mac", "mac-divider", "ptp-ref", "rx-input-m", + "rx-input", "tx", "eee-pcs", "rx-pcs-input", "rx-pcs-m", + "rx-pcs", "tx-pcs"; + resets = <&bpmp TEGRA234_RESET_MGBE0_MAC>, + <&bpmp TEGRA234_RESET_MGBE0_PCS>; + reset-names = "mac", "pcs"; + interconnects = <&mc TEGRA234_MEMORY_CLIENT_MGBEARD &emc>, + <&mc TEGRA234_MEMORY_CLIENT_MGBEAWR &emc>; + interconnect-names = "dma-mem", "write"; + iommus = <&smmu_niso0 TEGRA234_SID_MGBE>; + power-domains = <&bpmp TEGRA234_POWER_DOMAIN_MGBEA>; + + phy-handle = <&mgbe0_phy>; + phy-mode = "usxgmii"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + mgbe0_phy: phy@0 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <0x0>; + + #phy-cells = <0>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml b/Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml index 011363166789..4c155441acbf 100644 --- a/Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml +++ b/Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/net/nxp,dwmac-imx.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: NXP i.MX8 DWMAC glue layer Device Tree Bindings +title: NXP i.MX8 DWMAC glue layer maintainers: - Joakim Zhang <qiangqing.zhang@nxp.com> diff --git a/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml b/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml index d51da24f3505..ab8867e6939b 100644 --- a/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml +++ b/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml @@ -31,6 +31,22 @@ patternProperties: description: The ID number for the child PHY. Should be +1 of parent PHY. + nxp,rmii-refclk-in: + type: boolean + description: | + The REF_CLK is provided for both transmitted and received data + in RMII mode. This clock signal is provided by the PHY and is + typically derived from an external 25MHz crystal. Alternatively, + a 50MHz clock signal generated by an external oscillator can be + connected to pin REF_CLK. A third option is to connect a 25MHz + clock to pin CLK_IN_OUT. So, the REF_CLK should be configured + as input or output according to the actual circuit connection. + If present, indicates that the REF_CLK will be configured as + interface reference clock input when RMII mode enabled. + If not present, the REF_CLK will be configured as interface + reference clock output when RMII mode enabled. + Only supported on TJA1100 and TJA1101. + required: - reg @@ -44,6 +60,7 @@ examples: tja1101_phy0: ethernet-phy@4 { reg = <0x4>; + nxp,rmii-refclk-in; }; }; - | diff --git a/Documentation/devicetree/bindings/net/pse-pd/podl-pse-regulator.yaml b/Documentation/devicetree/bindings/net/pse-pd/podl-pse-regulator.yaml new file mode 100644 index 000000000000..c6b1c188abf7 --- /dev/null +++ b/Documentation/devicetree/bindings/net/pse-pd/podl-pse-regulator.yaml @@ -0,0 +1,40 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/pse-pd/podl-pse-regulator.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Regulator based Power Sourcing Equipment + +maintainers: + - Oleksij Rempel <o.rempel@pengutronix.de> + +description: Regulator based PoDL PSE controller. The device must be referenced + by the PHY node to control power injection to the Ethernet cable. + +allOf: + - $ref: "pse-controller.yaml#" + +properties: + compatible: + const: podl-pse-regulator + + '#pse-cells': + const: 0 + + pse-supply: + description: Power supply for the PSE controller + +additionalProperties: false + +required: + - compatible + - pse-supply + +examples: + - | + ethernet-pse { + compatible = "podl-pse-regulator"; + pse-supply = <®_t1l1>; + #pse-cells = <0>; + }; diff --git a/Documentation/devicetree/bindings/net/pse-pd/pse-controller.yaml b/Documentation/devicetree/bindings/net/pse-pd/pse-controller.yaml new file mode 100644 index 000000000000..b110abb42597 --- /dev/null +++ b/Documentation/devicetree/bindings/net/pse-pd/pse-controller.yaml @@ -0,0 +1,33 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/pse-pd/pse-controller.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Power Sourcing Equipment (PSE). + +description: Binding for the Power Sourcing Equipment (PSE) as defined in the + IEEE 802.3 specification. It is designed for hardware which is delivering + power over twisted pair/ethernet cable. The ethernet-pse nodes should be + used to describe PSE controller and referenced by the ethernet-phy node. + +maintainers: + - Oleksij Rempel <o.rempel@pengutronix.de> + +properties: + $nodename: + pattern: "^ethernet-pse(@.*)?$" + + "#pse-cells": + description: + Used to uniquely identify a PSE instance within an IC. Will be + 0 on PSE nodes with only a single output and at least 1 on nodes + controlling several outputs. + enum: [0, 1] + +required: + - "#pse-cells" + +additionalProperties: true + +... diff --git a/Documentation/devicetree/bindings/net/qca,ar803x.yaml b/Documentation/devicetree/bindings/net/qca,ar803x.yaml index b3d4013b7ca6..161d28919316 100644 --- a/Documentation/devicetree/bindings/net/qca,ar803x.yaml +++ b/Documentation/devicetree/bindings/net/qca,ar803x.yaml @@ -40,6 +40,14 @@ properties: Only supported on the AR8031. type: boolean + qca,disable-hibernation-mode: + description: | + Disable Atheros AR803X PHYs hibernation mode. If present, indicates + that the hardware of PHY will not enter power saving mode when the + cable is disconnected. And the RX_CLK always keeps outputting a + valid clock. + type: boolean + qca,smarteee-tw-us-100m: description: EEE Tw parameter for 100M links. $ref: /schemas/types.yaml#/definitions/uint32 diff --git a/Documentation/devicetree/bindings/net/qcom,ipq4019-mdio.yaml b/Documentation/devicetree/bindings/net/qcom,ipq4019-mdio.yaml index 2af304341772..ad8b2b41c140 100644 --- a/Documentation/devicetree/bindings/net/qcom,ipq4019-mdio.yaml +++ b/Documentation/devicetree/bindings/net/qcom,ipq4019-mdio.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/net/qcom,ipq4019-mdio.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Qualcomm IPQ40xx MDIO Controller Device Tree Bindings +title: Qualcomm IPQ40xx MDIO Controller maintainers: - Robert Marko <robert.marko@sartura.hr> diff --git a/Documentation/devicetree/bindings/net/ralink,rt2880-net.txt b/Documentation/devicetree/bindings/net/ralink,rt2880-net.txt deleted file mode 100644 index 9fe1a0a22e44..000000000000 --- a/Documentation/devicetree/bindings/net/ralink,rt2880-net.txt +++ /dev/null @@ -1,59 +0,0 @@ -Ralink Frame Engine Ethernet controller -======================================= - -The Ralink frame engine ethernet controller can be found on Ralink and -Mediatek SoCs (RT288x, RT3x5x, RT366x, RT388x, rt5350, mt7620, mt7621, mt76x8). - -Depending on the SoC, there is a number of ports connected to the CPU port -directly and/or via a (gigabit-)switch. - -* Ethernet controller node - -Required properties: -- compatible: Should be one of "ralink,rt2880-eth", "ralink,rt3050-eth", - "ralink,rt3050-eth", "ralink,rt3883-eth", "ralink,rt5350-eth", - "mediatek,mt7620-eth", "mediatek,mt7621-eth" -- reg: Address and length of the register set for the device -- interrupts: Should contain the frame engines interrupt -- resets: Should contain the frame engines resets -- reset-names: Should contain the reset names "fe". If a switch is present - "esw" is also required. - - -* Ethernet port node - -Required properties: -- compatible: Should be "ralink,eth-port" -- reg: The number of the physical port -- phy-handle: reference to the node describing the phy - -Example: - -mdio-bus { - ... - phy0: ethernet-phy@0 { - phy-mode = "mii"; - reg = <0>; - }; -}; - -ethernet@400000 { - compatible = "ralink,rt2880-eth"; - reg = <0x00400000 10000>; - - #address-cells = <1>; - #size-cells = <0>; - - resets = <&rstctrl 18>; - reset-names = "fe"; - - interrupt-parent = <&cpuintc>; - interrupts = <5>; - - port@0 { - compatible = "ralink,eth-port"; - reg = <0>; - phy-handle = <&phy0>; - }; - -}; diff --git a/Documentation/devicetree/bindings/net/ralink,rt3050-esw.txt b/Documentation/devicetree/bindings/net/ralink,rt3050-esw.txt deleted file mode 100644 index 87e315856efa..000000000000 --- a/Documentation/devicetree/bindings/net/ralink,rt3050-esw.txt +++ /dev/null @@ -1,30 +0,0 @@ -Ralink Fast Ethernet Embedded Switch -==================================== - -The ralink fast ethernet embedded switch can be found on Ralink and Mediatek -SoCs (RT3x5x, RT5350, MT76x8). - -Required properties: -- compatible: Should be "ralink,rt3050-esw" -- reg: Address and length of the register set for the device -- interrupts: Should contain the embedded switches interrupt -- resets: Should contain the embedded switches resets -- reset-names: Should contain the reset names "esw" - -Optional properties: -- ralink,portmap: can be used to choose if the default switch setup is - llllw or wllll -- ralink,led_polarity: override the active high/low settings of the leds - -Example: - -esw@10110000 { - compatible = "ralink,rt3050-esw"; - reg = <0x10110000 8000>; - - resets = <&rstctrl 23>; - reset-names = "esw"; - - interrupt-parent = <&intc>; - interrupts = <17>; -}; diff --git a/Documentation/devicetree/bindings/net/realtek-bluetooth.yaml b/Documentation/devicetree/bindings/net/realtek-bluetooth.yaml index 157d606bf9cb..e329ef06e10f 100644 --- a/Documentation/devicetree/bindings/net/realtek-bluetooth.yaml +++ b/Documentation/devicetree/bindings/net/realtek-bluetooth.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/net/realtek-bluetooth.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: RTL8723BS/RTL8723CS/RTL8822CS Bluetooth Device Tree Bindings +title: RTL8723BS/RTL8723CS/RTL8822CS Bluetooth maintainers: - Vasily Khoruzhick <anarsoul@gmail.com> diff --git a/Documentation/devicetree/bindings/net/renesas,etheravb.yaml b/Documentation/devicetree/bindings/net/renesas,etheravb.yaml index acf347f3cdbe..3f41294f5997 100644 --- a/Documentation/devicetree/bindings/net/renesas,etheravb.yaml +++ b/Documentation/devicetree/bindings/net/renesas,etheravb.yaml @@ -40,11 +40,16 @@ properties: - renesas,etheravb-r8a77980 # R-Car V3H - renesas,etheravb-r8a77990 # R-Car E3 - renesas,etheravb-r8a77995 # R-Car D3 - - renesas,etheravb-r8a779a0 # R-Car V3U - const: renesas,etheravb-rcar-gen3 # R-Car Gen3 and RZ/G2 - items: - enum: + - renesas,etheravb-r8a779a0 # R-Car V3U + - renesas,etheravb-r8a779g0 # R-Car V4H + - const: renesas,etheravb-rcar-gen4 # R-Car Gen4 + + - items: + - enum: - renesas,etheravb-r9a09g011 # RZ/V2M - const: renesas,etheravb-rzv2m # RZ/V2M compatible @@ -207,7 +212,7 @@ allOf: - renesas,etheravb-r8a77965 - renesas,etheravb-r8a77970 - renesas,etheravb-r8a77980 - - renesas,etheravb-r8a779a0 + - renesas,etheravb-rcar-gen4 then: required: - tx-internal-delay-ps diff --git a/Documentation/devicetree/bindings/net/rockchip-dwmac.yaml b/Documentation/devicetree/bindings/net/rockchip-dwmac.yaml index 083623c8d718..42fb72b6909d 100644 --- a/Documentation/devicetree/bindings/net/rockchip-dwmac.yaml +++ b/Documentation/devicetree/bindings/net/rockchip-dwmac.yaml @@ -25,7 +25,9 @@ select: - rockchip,rk3368-gmac - rockchip,rk3399-gmac - rockchip,rk3568-gmac + - rockchip,rk3588-gmac - rockchip,rv1108-gmac + - rockchip,rv1126-gmac required: - compatible @@ -47,9 +49,11 @@ properties: - rockchip,rk3368-gmac - rockchip,rk3399-gmac - rockchip,rv1108-gmac + - rockchip,rv1126-gmac - items: - enum: - rockchip,rk3568-gmac + - rockchip,rk3588-gmac - const: snps,dwmac-4.20a clocks: @@ -81,6 +85,11 @@ properties: description: The phandle of the syscon node for the general register file. $ref: /schemas/types.yaml#/definitions/phandle + rockchip,php-grf: + description: + The phandle of the syscon node for the peripheral general register file. + $ref: /schemas/types.yaml#/definitions/phandle + tx_delay: description: Delay value for TXD timing. Range value is 0~0x7F, 0x30 as default. $ref: /schemas/types.yaml#/definitions/uint32 diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml index 491597c02edf..13b984076af5 100644 --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/net/snps,dwmac.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Synopsys DesignWare MAC Device Tree Bindings +title: Synopsys DesignWare MAC maintainers: - Alexandre Torgue <alexandre.torgue@foss.st.com> @@ -74,6 +74,7 @@ properties: - rockchip,rk3328-gmac - rockchip,rk3366-gmac - rockchip,rk3368-gmac + - rockchip,rk3588-gmac - rockchip,rk3399-gmac - rockchip,rv1108-gmac - snps,dwmac @@ -288,6 +289,11 @@ properties: is supported. For example, this is used in case of SGMII and MAC2MAC connection. + snps,clk-csr: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Frequency division factor for MDC clock. + mdio: $ref: mdio.yaml# unevaluatedProperties: false @@ -301,6 +307,60 @@ properties: required: - compatible + stmmac-axi-config: + type: object + unevaluatedProperties: false + description: + AXI BUS Mode parameters. + + properties: + snps,lpi_en: + $ref: /schemas/types.yaml#/definitions/flag + description: + enable Low Power Interface + + snps,xit_frm: + $ref: /schemas/types.yaml#/definitions/flag + description: + unlock on WoL + + snps,wr_osr_lmt: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + max write outstanding req. limit + + snps,rd_osr_lmt: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + max read outstanding req. limit + + snps,kbbe: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + do not cross 1KiB boundary. + + snps,blen: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: + this is a vector of supported burst length. + minItems: 7 + maxItems: 7 + + snps,fb: + $ref: /schemas/types.yaml#/definitions/flag + description: + fixed-burst + + snps,mb: + $ref: /schemas/types.yaml#/definitions/flag + description: + mixed-burst + + snps,rb: + $ref: /schemas/types.yaml#/definitions/flag + description: + rebuild INCRx Burst + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/net/sunplus,sp7021-emac.yaml b/Documentation/devicetree/bindings/net/sunplus,sp7021-emac.yaml index 62dffee27c3d..5b130097449b 100644 --- a/Documentation/devicetree/bindings/net/sunplus,sp7021-emac.yaml +++ b/Documentation/devicetree/bindings/net/sunplus,sp7021-emac.yaml @@ -5,7 +5,7 @@ $id: http://devicetree.org/schemas/net/sunplus,sp7021-emac.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Sunplus SP7021 Dual Ethernet MAC Device Tree Bindings +title: Sunplus SP7021 Dual Ethernet MAC maintainers: - Wells Lu <wellslutw@gmail.com> @@ -32,6 +32,7 @@ properties: ethernet-ports: type: object + additionalProperties: false description: Ethernet ports to PHY properties: @@ -44,6 +45,7 @@ properties: patternProperties: "^port@[0-1]$": type: object + additionalProperties: false description: Port to PHY properties: diff --git a/Documentation/devicetree/bindings/net/ti,cpsw-switch.yaml b/Documentation/devicetree/bindings/net/ti,cpsw-switch.yaml index 31bf825c6598..e36c7817be69 100644 --- a/Documentation/devicetree/bindings/net/ti,cpsw-switch.yaml +++ b/Documentation/devicetree/bindings/net/ti,cpsw-switch.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/net/ti,cpsw-switch.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: TI SoC Ethernet Switch Controller (CPSW) Device Tree Bindings +title: TI SoC Ethernet Switch Controller (CPSW) maintainers: - Grygorii Strashko <grygorii.strashko@ti.com> @@ -77,6 +77,8 @@ properties: ethernet-ports: type: object + additionalProperties: false + properties: '#address-cells': const: 1 @@ -89,6 +91,7 @@ properties: description: CPSW external ports $ref: ethernet-controller.yaml# + unevaluatedProperties: false properties: reg: @@ -117,6 +120,7 @@ properties: cpts: type: object + unevaluatedProperties: false description: The Common Platform Time Sync (CPTS) module diff --git a/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml b/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml index b8281d8be940..821974815dec 100644 --- a/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml +++ b/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/net/ti,k3-am654-cpsw-nuss.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: The TI AM654x/J721E/AM642x SoC Gigabit Ethernet MAC (Media Access Controller) Device Tree Bindings +title: The TI AM654x/J721E/AM642x SoC Gigabit Ethernet MAC (Media Access Controller) maintainers: - Grygorii Strashko <grygorii.strashko@ti.com> @@ -55,6 +55,7 @@ properties: compatible: enum: - ti,am654-cpsw-nuss + - ti,j7200-cpswxg-nuss - ti,j721e-cpsw-nuss - ti,am642-cpsw-nuss @@ -110,16 +111,17 @@ properties: const: 0 patternProperties: - port@[1-2]: + "^port@[1-4]$": type: object description: CPSWxG NUSS external ports $ref: ethernet-controller.yaml# + unevaluatedProperties: false properties: reg: minimum: 1 - maximum: 2 + maximum: 4 description: CPSW port number phys: @@ -178,6 +180,19 @@ required: - '#address-cells' - '#size-cells' +allOf: + - if: + not: + properties: + compatible: + contains: + const: ti,j7200-cpswxg-nuss + then: + properties: + ethernet-ports: + patternProperties: + "^port@[3-4]$": false + additionalProperties: false examples: diff --git a/Documentation/devicetree/bindings/net/ti,k3-am654-cpts.yaml b/Documentation/devicetree/bindings/net/ti,k3-am654-cpts.yaml index b783ad0d1f53..6230f576134b 100644 --- a/Documentation/devicetree/bindings/net/ti,k3-am654-cpts.yaml +++ b/Documentation/devicetree/bindings/net/ti,k3-am654-cpts.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/net/ti,k3-am654-cpts.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: The TI AM654x/J721E Common Platform Time Sync (CPTS) module Device Tree Bindings +title: The TI AM654x/J721E Common Platform Time Sync (CPTS) module maintainers: - Grygorii Strashko <grygorii.strashko@ti.com> @@ -95,6 +95,7 @@ properties: refclk-mux: type: object + additionalProperties: false description: CPTS reference clock multiplexer clock properties: '#clock-cells': diff --git a/Documentation/devicetree/bindings/net/vertexcom-mse102x.yaml b/Documentation/devicetree/bindings/net/vertexcom-mse102x.yaml index 8156a9aeb589..6a71f694cb55 100644 --- a/Documentation/devicetree/bindings/net/vertexcom-mse102x.yaml +++ b/Documentation/devicetree/bindings/net/vertexcom-mse102x.yaml @@ -4,10 +4,10 @@ $id: "http://devicetree.org/schemas/net/vertexcom-mse102x.yaml#" $schema: "http://devicetree.org/meta-schemas/core.yaml#" -title: The Vertexcom MSE102x (SPI) Device Tree Bindings +title: The Vertexcom MSE102x (SPI) maintainers: - - Stefan Wahren <stefan.wahren@in-tech.com> + - Stefan Wahren <stefan.wahren@chargebyte.com> description: Vertexcom's MSE102x are a family of HomePlug GreenPHY chips. diff --git a/Documentation/devicetree/bindings/net/wireless/brcm,bcm4329-fmac.yaml b/Documentation/devicetree/bindings/net/wireless/brcm,bcm4329-fmac.yaml index 53b4153d9bfc..fec1cc9b9a08 100644 --- a/Documentation/devicetree/bindings/net/wireless/brcm,bcm4329-fmac.yaml +++ b/Documentation/devicetree/bindings/net/wireless/brcm,bcm4329-fmac.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/net/wireless/brcm,bcm4329-fmac.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Broadcom BCM4329 family fullmac wireless SDIO devices +title: Broadcom BCM4329 family fullmac wireless SDIO/PCIE devices maintainers: - Arend van Spriel <arend@broadcom.com> @@ -41,11 +41,17 @@ properties: - cypress,cyw4373-fmac - cypress,cyw43012-fmac - const: brcm,bcm4329-fmac - - const: brcm,bcm4329-fmac + - enum: + - brcm,bcm4329-fmac + - pci14e4,43dc # BCM4355 + - pci14e4,4464 # BCM4364 + - pci14e4,4488 # BCM4377 + - pci14e4,4425 # BCM4378 + - pci14e4,4433 # BCM4387 reg: - description: SDIO function number for the device, for most cases - this will be 1. + description: SDIO function number for the device (for most cases + this will be 1) or PCI device identifier. interrupts: maxItems: 1 @@ -85,6 +91,31 @@ properties: takes precedence. type: boolean + brcm,cal-blob: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: A per-device calibration blob for the Wi-Fi radio. This + should be filled in by the bootloader from platform configuration + data, if necessary, and will be uploaded to the device if present. + + brcm,board-type: + $ref: /schemas/types.yaml#/definitions/string + description: Overrides the board type, which is normally the compatible of + the root node. This can be used to decouple the overall system board or + device name from the board type for WiFi purposes, which is used to + construct firmware and NVRAM configuration filenames, allowing for + multiple devices that share the same module or characteristics for the + WiFi subsystem to share the same firmware/NVRAM files. On Apple platforms, + this should be the Apple module-instance codename prefixed by "apple,", + e.g. "apple,honshu". + + apple,antenna-sku: + $ref: /schemas/types.yaml#/definitions/string + description: Antenna SKU used to identify a specific antenna configuration + on Apple platforms. This is use to build firmware filenames, to allow + platforms with different antenna configs to have different firmware and/or + NVRAM. This would normally be filled in by the bootloader from platform + configuration data. + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/net/wireless/microchip,wilc1000.yaml b/Documentation/devicetree/bindings/net/wireless/microchip,wilc1000.yaml index 60de78f1bc7b..b3405f284580 100644 --- a/Documentation/devicetree/bindings/net/wireless/microchip,wilc1000.yaml +++ b/Documentation/devicetree/bindings/net/wireless/microchip,wilc1000.yaml @@ -20,8 +20,6 @@ properties: reg: true - spi-max-frequency: true - interrupts: maxItems: 1 @@ -51,7 +49,10 @@ required: - compatible - interrupts -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml b/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml index a677b056f112..f7cf135aa37f 100644 --- a/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml +++ b/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml @@ -66,6 +66,18 @@ properties: required: - iommus + qcom,smem-states: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: State bits used by the AP to signal the WLAN Q6. + items: + - description: Signal bits used to enable/disable low power mode + on WCN6750 in the case of WoW (Wake on Wireless). + + qcom,smem-state-names: + description: The names of the state bits used for SMP2P output. + items: + - const: wlan-smp2p-out + required: - compatible - reg @@ -448,6 +460,8 @@ examples: <GIC_SPI 799 IRQ_TYPE_EDGE_RISING>; qcom,rproc = <&remoteproc_wpss>; memory-region = <&wlan_fw_mem>, <&wlan_ce_mem>; + qcom,smem-states = <&wlan_smp2p_out 0>; + qcom,smem-state-names = "wlan-smp2p-out"; wifi-firmware { iommus = <&apps_smmu 0x1c02 0x1>; }; diff --git a/Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml b/Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml index 76199a67d628..b35d2f3ad1ad 100644 --- a/Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml +++ b/Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml @@ -29,12 +29,6 @@ description: > Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.yaml for more information. - For SPI: - - In add of the properties below, please consult - Documentation/devicetree/bindings/spi/spi-controller.yaml for optional SPI - related properties. - properties: compatible: items: @@ -52,8 +46,6 @@ properties: bindings. maxItems: 1 - spi-max-frequency: true - interrupts: description: The interrupt line. Should be IRQ_TYPE_EDGE_RISING. When SPI is used, this property is required. When SDIO is used, the "in-band" @@ -84,12 +76,15 @@ properties: mac-address: true -additionalProperties: false - required: - compatible - reg +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + examples: - | #include <dt-bindings/gpio/gpio.h> diff --git a/Documentation/devicetree/bindings/net/wireless/ti,wlcore.yaml b/Documentation/devicetree/bindings/net/wireless/ti,wlcore.yaml index d68bb2ec1f7e..e31456730e9f 100644 --- a/Documentation/devicetree/bindings/net/wireless/ti,wlcore.yaml +++ b/Documentation/devicetree/bindings/net/wireless/ti,wlcore.yaml @@ -36,8 +36,6 @@ properties: This is required when connected via SPI, and optional when connected via SDIO. - spi-max-frequency: true - interrupts: minItems: 1 maxItems: 2 @@ -69,20 +67,22 @@ required: - compatible - interrupts -if: - properties: - compatible: - contains: - enum: - - ti,wl1271 - - ti,wl1273 - - ti,wl1281 - - ti,wl1283 -then: - required: - - ref-clock-frequency - -additionalProperties: false +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + - if: + properties: + compatible: + contains: + enum: + - ti,wl1271 + - ti,wl1273 + - ti,wl1281 + - ti,wl1283 + then: + required: + - ref-clock-frequency + +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/nvmem/allwinner,sun4i-a10-sid.yaml b/Documentation/devicetree/bindings/nvmem/allwinner,sun4i-a10-sid.yaml index e558587ff885..14c170c6a86e 100644 --- a/Documentation/devicetree/bindings/nvmem/allwinner,sun4i-a10-sid.yaml +++ b/Documentation/devicetree/bindings/nvmem/allwinner,sun4i-a10-sid.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/nvmem/allwinner,sun4i-a10-sid.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 Security ID Device Tree Bindings +title: Allwinner A10 Security ID maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/nvmem/imx-iim.yaml b/Documentation/devicetree/bindings/nvmem/imx-iim.yaml index 9cc43e7a4b38..7aac1995cfaf 100644 --- a/Documentation/devicetree/bindings/nvmem/imx-iim.yaml +++ b/Documentation/devicetree/bindings/nvmem/imx-iim.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/nvmem/imx-iim.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Freescale i.MX IC Identification Module (IIM) device tree bindings +title: Freescale i.MX IC Identification Module (IIM) maintainers: - Anson Huang <Anson.Huang@nxp.com> diff --git a/Documentation/devicetree/bindings/nvmem/imx-ocotp.yaml b/Documentation/devicetree/bindings/nvmem/imx-ocotp.yaml index 8a43dc1283fe..d0a239d7e199 100644 --- a/Documentation/devicetree/bindings/nvmem/imx-ocotp.yaml +++ b/Documentation/devicetree/bindings/nvmem/imx-ocotp.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/nvmem/imx-ocotp.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Freescale i.MX6 On-Chip OTP Controller (OCOTP) device tree bindings +title: Freescale i.MX6 On-Chip OTP Controller (OCOTP) maintainers: - Anson Huang <Anson.Huang@nxp.com> diff --git a/Documentation/devicetree/bindings/nvmem/mediatek,efuse.yaml b/Documentation/devicetree/bindings/nvmem/mediatek,efuse.yaml index b5a1109f2ee1..75e0a516e59a 100644 --- a/Documentation/devicetree/bindings/nvmem/mediatek,efuse.yaml +++ b/Documentation/devicetree/bindings/nvmem/mediatek,efuse.yaml @@ -30,6 +30,7 @@ properties: - mediatek,mt8173-efuse - mediatek,mt8183-efuse - mediatek,mt8186-efuse + - mediatek,mt8188-efuse - mediatek,mt8192-efuse - mediatek,mt8195-efuse - mediatek,mt8516-efuse diff --git a/Documentation/devicetree/bindings/nvmem/microchip,lan9662-otpc.yaml b/Documentation/devicetree/bindings/nvmem/microchip,lan9662-otpc.yaml new file mode 100644 index 000000000000..f97c6beb4766 --- /dev/null +++ b/Documentation/devicetree/bindings/nvmem/microchip,lan9662-otpc.yaml @@ -0,0 +1,45 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/nvmem/microchip,lan9662-otpc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip LAN9662 OTP Controller (OTPC) + +maintainers: + - Horatiu Vultur <horatiu.vultur@microchip.com> + +description: | + OTP controller drives a NVMEM memory where system specific data + (e.g. hardware configuration settings, chip identifiers) or + user specific data could be stored. + +allOf: + - $ref: nvmem.yaml# + +properties: + compatible: + oneOf: + - items: + - const: microchip,lan9668-otpc + - const: microchip,lan9662-otpc + - enum: + - microchip,lan9662-otpc + + reg: + maxItems: 1 + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + otpc: otp@e0021000 { + compatible = "microchip,lan9662-otpc"; + reg = <0xe0021000 0x300>; + }; + +... diff --git a/Documentation/devicetree/bindings/nvmem/nintendo-otp.yaml b/Documentation/devicetree/bindings/nvmem/nintendo-otp.yaml index dbe4ffdd644c..f93bc50c40d7 100644 --- a/Documentation/devicetree/bindings/nvmem/nintendo-otp.yaml +++ b/Documentation/devicetree/bindings/nvmem/nintendo-otp.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/nvmem/nintendo-otp.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Nintendo Wii and Wii U OTP Device Tree Bindings +title: Nintendo Wii and Wii U OTP description: | This binding represents the OTP memory as found on a Nintendo Wii or Wii U, diff --git a/Documentation/devicetree/bindings/nvmem/nvmem-consumer.yaml b/Documentation/devicetree/bindings/nvmem/nvmem-consumer.yaml index b1da238c8bcb..a26633bf52db 100644 --- a/Documentation/devicetree/bindings/nvmem/nvmem-consumer.yaml +++ b/Documentation/devicetree/bindings/nvmem/nvmem-consumer.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/nvmem/nvmem-consumer.yaml# $schema: http://devicetree.org/meta-schemas/base.yaml# -title: NVMEM (Non Volatile Memory) Consumer Device Tree Bindings +title: NVMEM (Non Volatile Memory) Consumer maintainers: - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> diff --git a/Documentation/devicetree/bindings/nvmem/nvmem.yaml b/Documentation/devicetree/bindings/nvmem/nvmem.yaml index 3bb349c634cb..1eb22dba364c 100644 --- a/Documentation/devicetree/bindings/nvmem/nvmem.yaml +++ b/Documentation/devicetree/bindings/nvmem/nvmem.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/nvmem/nvmem.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: NVMEM (Non Volatile Memory) Device Tree Bindings +title: NVMEM (Non Volatile Memory) maintainers: - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> diff --git a/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml b/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml index dede8892ee01..2eab2f46cb65 100644 --- a/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml +++ b/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml @@ -18,6 +18,7 @@ properties: - enum: - qcom,apq8064-qfprom - qcom,apq8084-qfprom + - qcom,ipq8064-qfprom - qcom,msm8974-qfprom - qcom,msm8916-qfprom - qcom,msm8996-qfprom @@ -25,7 +26,9 @@ properties: - qcom,qcs404-qfprom - qcom,sc7180-qfprom - qcom,sc7280-qfprom + - qcom,sdm630-qfprom - qcom,sdm845-qfprom + - qcom,sm6115-qfprom - const: qcom,qfprom reg: diff --git a/Documentation/devicetree/bindings/nvmem/rockchip-efuse.yaml b/Documentation/devicetree/bindings/nvmem/rockchip-efuse.yaml index 104dd508565e..febee8129aa9 100644 --- a/Documentation/devicetree/bindings/nvmem/rockchip-efuse.yaml +++ b/Documentation/devicetree/bindings/nvmem/rockchip-efuse.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/nvmem/rockchip-efuse.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Rockchip eFuse device tree bindings +title: Rockchip eFuse maintainers: - Heiko Stuebner <heiko@sntech.de> diff --git a/Documentation/devicetree/bindings/nvmem/u-boot,env.yaml b/Documentation/devicetree/bindings/nvmem/u-boot,env.yaml index e70b2a60cb9a..e96bca99f2d9 100644 --- a/Documentation/devicetree/bindings/nvmem/u-boot,env.yaml +++ b/Documentation/devicetree/bindings/nvmem/u-boot,env.yaml @@ -24,6 +24,8 @@ description: | Right now only flash partition case is covered but it may be extended to e.g. UBI volumes in the future. + Variables can be defined as NVMEM device subnodes. + maintainers: - RafaÅ‚ MiÅ‚ecki <rafal@milecki.pl> @@ -40,6 +42,14 @@ properties: reg: maxItems: 1 + bootcmd: + type: object + description: Command to use for automatic booting + + ethaddr: + type: object + description: Ethernet interface's MAC address + additionalProperties: false examples: @@ -58,5 +68,8 @@ examples: env: partition@40000 { compatible = "u-boot,env"; reg = <0x40000 0x10000>; + + mac: ethaddr { + }; }; }; diff --git a/Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml b/Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml index 729ae97b63d9..385b0692261c 100644 --- a/Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml +++ b/Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/opp/allwinner,sun50i-h6-operating-points.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner H6 CPU OPP Device Tree Bindings +title: Allwinner H6 CPU OPP maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml b/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml index 59663e897dae..a202b6c6561d 100644 --- a/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml +++ b/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml @@ -40,6 +40,7 @@ properties: patternProperties: '^opp-?[0-9]+$': type: object + additionalProperties: false properties: opp-hz: true diff --git a/Documentation/devicetree/bindings/opp/opp-v2-qcom-level.yaml b/Documentation/devicetree/bindings/opp/opp-v2-qcom-level.yaml index 14a7a689ad6d..df8442fb11f0 100644 --- a/Documentation/devicetree/bindings/opp/opp-v2-qcom-level.yaml +++ b/Documentation/devicetree/bindings/opp/opp-v2-qcom-level.yaml @@ -19,6 +19,7 @@ properties: patternProperties: '^opp-?[0-9]+$': type: object + additionalProperties: false properties: opp-level: true diff --git a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml index 0f064e4222f3..7e15aae7d69e 100644 --- a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/pci/brcm,stb-pcie.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Brcmstb PCIe Host Controller Device Tree Bindings +title: Brcmstb PCIe Host Controller maintainers: - Nicolas Saenz Julienne <nsaenzjulienne@suse.de> diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml index 0499b94627ae..c00be39af64e 100644 --- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml +++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml @@ -48,7 +48,13 @@ allOf: properties: compatible: - const: mediatek,mt8192-pcie + oneOf: + - items: + - enum: + - mediatek,mt8188-pcie + - mediatek,mt8195-pcie + - const: mediatek,mt8192-pcie + - const: mediatek,mt8192-pcie reg: maxItems: 1 @@ -84,7 +90,9 @@ properties: - const: tl_96m - const: tl_32k - const: peri_26m - - const: top_133m + - enum: + - top_133m # for MT8192 + - peri_mem # for MT8188/MT8195 assigned-clocks: maxItems: 1 @@ -126,6 +134,7 @@ required: - interrupts - ranges - clocks + - clock-names - '#interrupt-cells' - interrupt-controller diff --git a/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml b/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml index edb4f81253c8..f7a3c2636355 100644 --- a/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml +++ b/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/pci/microchip,pcie-host.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Microchip PCIe Root Port Bridge Controller Device Tree Bindings +title: Microchip PCIe Root Port Bridge Controller maintainers: - Daire McNamara <daire.mcnamara@microchip.com> @@ -25,6 +25,33 @@ properties: - const: cfg - const: apb + clocks: + description: + Fabric Interface Controllers, FICs, are the interface between the FPGA + fabric and the core complex on PolarFire SoC. The FICs require two clocks, + one from each side of the interface. The "FIC clocks" described by this + property are on the core complex side & communication through a FIC is not + possible unless it's corresponding clock is enabled. A clock must be + enabled for each of the interfaces the root port is connected through. + This could in theory be all 4 interfaces, one interface or any combination + in between. + minItems: 1 + items: + - description: FIC0's clock + - description: FIC1's clock + - description: FIC2's clock + - description: FIC3's clock + + clock-names: + description: + As any FIC connection combination is possible, the names should match the + order in the clocks property and take the form "ficN" where N is a number + 0-3 + minItems: 1 + maxItems: 4 + items: + pattern: '^fic[0-3]$' + interrupts: minItems: 1 items: @@ -40,6 +67,10 @@ properties: ranges: maxItems: 1 + dma-ranges: + minItems: 1 + maxItems: 6 + msi-controller: description: Identifies the node as an MSI controller. diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml index 3d23599e5e91..977c976ea799 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml @@ -9,12 +9,11 @@ title: Qualcomm PCIe Endpoint Controller binding maintainers: - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> -allOf: - - $ref: "pci-ep.yaml#" - properties: compatible: - const: qcom,sdx55-pcie-ep + enum: + - qcom,sdx55-pcie-ep + - qcom,sm8450-pcie-ep reg: items: @@ -35,24 +34,12 @@ properties: - const: mmio clocks: - items: - - description: PCIe Auxiliary clock - - description: PCIe CFG AHB clock - - description: PCIe Master AXI clock - - description: PCIe Slave AXI clock - - description: PCIe Slave Q2A AXI clock - - description: PCIe Sleep clock - - description: PCIe Reference clock + minItems: 7 + maxItems: 8 clock-names: - items: - - const: aux - - const: cfg - - const: bus_master - - const: bus_slave - - const: slave_q2a - - const: sleep - - const: ref + minItems: 7 + maxItems: 8 qcom,perst-regs: description: Reference to a syscon representing TCSR followed by the two @@ -105,7 +92,6 @@ required: - reg-names - clocks - clock-names - - qcom,perst-regs - interrupts - interrupt-names - reset-gpios @@ -113,6 +99,64 @@ required: - reset-names - power-domains +allOf: + - $ref: pci-ep.yaml# + - if: + properties: + compatible: + contains: + enum: + - qcom,sdx55-pcie-ep + then: + properties: + clocks: + items: + - description: PCIe Auxiliary clock + - description: PCIe CFG AHB clock + - description: PCIe Master AXI clock + - description: PCIe Slave AXI clock + - description: PCIe Slave Q2A AXI clock + - description: PCIe Sleep clock + - description: PCIe Reference clock + clock-names: + items: + - const: aux + - const: cfg + - const: bus_master + - const: bus_slave + - const: slave_q2a + - const: sleep + - const: ref + + - if: + properties: + compatible: + contains: + enum: + - qcom,sm8450-pcie-ep + then: + properties: + clocks: + items: + - description: PCIe Auxiliary clock + - description: PCIe CFG AHB clock + - description: PCIe Master AXI clock + - description: PCIe Slave AXI clock + - description: PCIe Slave Q2A AXI clock + - description: PCIe Reference clock + - description: PCIe DDRSS SF TBU clock + - description: PCIe AGGRE NOC AXI clock + clock-names: + items: + - const: aux + - const: cfg + - const: bus_master + - const: bus_slave + - const: slave_q2a + - const: ref + - const: ddrss_sf_tbu + - const: aggre_noc_axi + unevaluatedProperties: false examples: diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml index 7d29e2a45183..54f07852d279 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml @@ -25,8 +25,10 @@ properties: - qcom,pcie-ipq4019 - qcom,pcie-ipq8074 - qcom,pcie-qcs404 + - qcom,pcie-sa8540p - qcom,pcie-sc7280 - qcom,pcie-sc8180x + - qcom,pcie-sc8280xp - qcom,pcie-sdm845 - qcom,pcie-sm8150 - qcom,pcie-sm8250 @@ -54,11 +56,11 @@ properties: # Platform constraints are described later. clocks: minItems: 3 - maxItems: 12 + maxItems: 13 clock-names: minItems: 3 - maxItems: 12 + maxItems: 13 resets: minItems: 1 @@ -181,6 +183,7 @@ allOf: enum: - qcom,pcie-sc7280 - qcom,pcie-sc8180x + - qcom,pcie-sc8280xp - qcom,pcie-sm8250 - qcom,pcie-sm8450-pcie0 - qcom,pcie-sm8450-pcie1 @@ -424,8 +427,8 @@ allOf: then: properties: clocks: - minItems: 11 - maxItems: 11 + minItems: 13 + maxItems: 13 clock-names: items: - const: pipe # PIPE clock @@ -439,6 +442,8 @@ allOf: - const: slave_q2a # Slave Q2A clock - const: tbu # PCIe TBU clock - const: ddrss_sf_tbu # PCIe SF TBU clock + - const: aggre0 # Aggre NoC PCIe CENTER SF AXI clock + - const: aggre1 # Aggre NoC PCIe1 AXI clock resets: maxItems: 1 reset-names: @@ -597,6 +602,36 @@ allOf: - const: pci # PCIe core reset - if: + properties: + compatible: + contains: + enum: + - qcom,pcie-sa8540p + - qcom,pcie-sc8280xp + then: + properties: + clocks: + minItems: 8 + maxItems: 9 + clock-names: + minItems: 8 + items: + - const: aux # Auxiliary clock + - const: cfg # Configuration clock + - const: bus_master # Master AXI clock + - const: bus_slave # Slave AXI clock + - const: slave_q2a # Slave Q2A clock + - const: ddrss_sf_tbu # PCIe SF TBU clock + - const: noc_aggr_4 # NoC aggregate 4 clock + - const: noc_aggr_south_sf # NoC aggregate South SF clock + - const: cnoc_qx # Configuration NoC QX clock + resets: + maxItems: 1 + reset-names: + items: + - const: pci # PCIe core reset + + - if: not: properties: compatible: @@ -624,8 +659,6 @@ allOf: - resets - reset-names - # Newer chipsets support either 1 or 8 MSI vectors - # On older chipsets it's always 1 MSI vector - if: properties: compatible: @@ -660,7 +693,40 @@ allOf: - const: msi5 - const: msi6 - const: msi7 - else: + + - if: + properties: + compatible: + contains: + enum: + - qcom,pcie-sc8280xp + then: + properties: + interrupts: + minItems: 4 + maxItems: 4 + interrupt-names: + items: + - const: msi0 + - const: msi1 + - const: msi2 + - const: msi3 + + - if: + properties: + compatible: + contains: + enum: + - qcom,pcie-apq8064 + - qcom,pcie-apq8084 + - qcom,pcie-ipq4019 + - qcom,pcie-ipq6018 + - qcom,pcie-ipq8064 + - qcom,pcie-ipq8064-v2 + - qcom,pcie-ipq8074 + - qcom,pcie-qcs404 + - qcom,pcie-sa8540p + then: properties: interrupts: maxItems: 1 diff --git a/Documentation/devicetree/bindings/pci/samsung,exynos-pcie.yaml b/Documentation/devicetree/bindings/pci/samsung,exynos-pcie.yaml index 445eed94b53f..f20ed7e709f7 100644 --- a/Documentation/devicetree/bindings/pci/samsung,exynos-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/samsung,exynos-pcie.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/pci/samsung,exynos-pcie.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Samsung SoC series PCIe Host Controller Device Tree Bindings +title: Samsung SoC series PCIe Host Controller maintainers: - Marek Szyprowski <m.szyprowski@samsung.com> diff --git a/Documentation/devicetree/bindings/pci/sifive,fu740-pcie.yaml b/Documentation/devicetree/bindings/pci/sifive,fu740-pcie.yaml index 195e6afeb169..844fc7142302 100644 --- a/Documentation/devicetree/bindings/pci/sifive,fu740-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/sifive,fu740-pcie.yaml @@ -51,6 +51,12 @@ properties: description: A phandle to the PCIe power up reset line. maxItems: 1 + clocks: + maxItems: 1 + + clock-names: + const: pcie_aux + pwren-gpios: description: Should specify the GPIO for controlling the PCI bus device power on. maxItems: 1 @@ -66,6 +72,7 @@ required: - interrupt-map-mask - interrupt-map - clocks + - clock-names - resets - pwren-gpios - reset-gpios @@ -104,6 +111,7 @@ examples: <0x0 0x0 0x0 0x2 &plic0 58>, <0x0 0x0 0x0 0x3 &plic0 59>, <0x0 0x0 0x0 0x4 &plic0 60>; + clock-names = "pcie_aux"; clocks = <&prci FU740_PRCI_CLK_PCIE_AUX>; resets = <&prci 4>; pwren-gpios = <&gpio 5 0>; diff --git a/Documentation/devicetree/bindings/pci/toshiba,visconti-pcie.yaml b/Documentation/devicetree/bindings/pci/toshiba,visconti-pcie.yaml index 30b6396d83c8..48ed227fc5b9 100644 --- a/Documentation/devicetree/bindings/pci/toshiba,visconti-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/toshiba,visconti-pcie.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/pci/toshiba,visconti-pcie.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Toshiba Visconti5 SoC PCIe Host Controller Device Tree Bindings +title: Toshiba Visconti5 SoC PCIe Host Controller maintainers: - Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> diff --git a/Documentation/devicetree/bindings/peci/peci-aspeed.yaml b/Documentation/devicetree/bindings/peci/peci-aspeed.yaml index 1e68a801a92a..b01e0c8b963d 100644 --- a/Documentation/devicetree/bindings/peci/peci-aspeed.yaml +++ b/Documentation/devicetree/bindings/peci/peci-aspeed.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/peci/peci-aspeed.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Aspeed PECI Bus Device Tree Bindings +title: Aspeed PECI Bus maintainers: - Iwona Winiarska <iwona.winiarska@intel.com> diff --git a/Documentation/devicetree/bindings/peci/peci-controller.yaml b/Documentation/devicetree/bindings/peci/peci-controller.yaml index bbc3d3f3a929..d7853291b060 100644 --- a/Documentation/devicetree/bindings/peci/peci-controller.yaml +++ b/Documentation/devicetree/bindings/peci/peci-controller.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/peci/peci-controller.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Generic Device Tree Bindings for PECI +title: Generic for PECI maintainers: - Iwona Winiarska <iwona.winiarska@intel.com> diff --git a/Documentation/devicetree/bindings/phy/allwinner,sun4i-a10-usb-phy.yaml b/Documentation/devicetree/bindings/phy/allwinner,sun4i-a10-usb-phy.yaml index 77606c899fe2..4fff091bd534 100644 --- a/Documentation/devicetree/bindings/phy/allwinner,sun4i-a10-usb-phy.yaml +++ b/Documentation/devicetree/bindings/phy/allwinner,sun4i-a10-usb-phy.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/phy/allwinner,sun4i-a10-usb-phy.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 USB PHY Device Tree Bindings +title: Allwinner A10 USB PHY maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/phy/allwinner,sun50i-a64-usb-phy.yaml b/Documentation/devicetree/bindings/phy/allwinner,sun50i-a64-usb-phy.yaml index 0fa4b32b097e..f557feca9763 100644 --- a/Documentation/devicetree/bindings/phy/allwinner,sun50i-a64-usb-phy.yaml +++ b/Documentation/devicetree/bindings/phy/allwinner,sun50i-a64-usb-phy.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/phy/allwinner,sun50i-a64-usb-phy.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A64 USB PHY Device Tree Bindings +title: Allwinner A64 USB PHY maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/phy/allwinner,sun50i-h6-usb-phy.yaml b/Documentation/devicetree/bindings/phy/allwinner,sun50i-h6-usb-phy.yaml index e632140722a2..4480fdedd669 100644 --- a/Documentation/devicetree/bindings/phy/allwinner,sun50i-h6-usb-phy.yaml +++ b/Documentation/devicetree/bindings/phy/allwinner,sun50i-h6-usb-phy.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/phy/allwinner,sun50i-h6-usb-phy.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner H6 USB PHY Device Tree Bindings +title: Allwinner H6 USB PHY maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/phy/allwinner,sun5i-a13-usb-phy.yaml b/Documentation/devicetree/bindings/phy/allwinner,sun5i-a13-usb-phy.yaml index 5bad9b06e2e7..1563e3df3052 100644 --- a/Documentation/devicetree/bindings/phy/allwinner,sun5i-a13-usb-phy.yaml +++ b/Documentation/devicetree/bindings/phy/allwinner,sun5i-a13-usb-phy.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/phy/allwinner,sun5i-a13-usb-phy.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A13 USB PHY Device Tree Bindings +title: Allwinner A13 USB PHY maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml b/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml index 22636c9fdab8..dfb6a8993535 100644 --- a/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml +++ b/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/phy/allwinner,sun6i-a31-mipi-dphy.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A31 MIPI D-PHY Controller Device Tree Bindings +title: Allwinner A31 MIPI D-PHY Controller maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-usb-phy.yaml b/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-usb-phy.yaml index 922b4665e00d..4897a3d2fbc3 100644 --- a/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-usb-phy.yaml +++ b/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-usb-phy.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/phy/allwinner,sun6i-a31-usb-phy.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A31 USB PHY Device Tree Bindings +title: Allwinner A31 USB PHY maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/phy/allwinner,sun8i-a23-usb-phy.yaml b/Documentation/devicetree/bindings/phy/allwinner,sun8i-a23-usb-phy.yaml index a94019efc2f3..99de9c6889a0 100644 --- a/Documentation/devicetree/bindings/phy/allwinner,sun8i-a23-usb-phy.yaml +++ b/Documentation/devicetree/bindings/phy/allwinner,sun8i-a23-usb-phy.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/phy/allwinner,sun8i-a23-usb-phy.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A23 USB PHY Device Tree Bindings +title: Allwinner A23 USB PHY maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/phy/allwinner,sun8i-a83t-usb-phy.yaml b/Documentation/devicetree/bindings/phy/allwinner,sun8i-a83t-usb-phy.yaml index 33f3ddc0492d..73438d84de50 100644 --- a/Documentation/devicetree/bindings/phy/allwinner,sun8i-a83t-usb-phy.yaml +++ b/Documentation/devicetree/bindings/phy/allwinner,sun8i-a83t-usb-phy.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/phy/allwinner,sun8i-a83t-usb-phy.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A83t USB PHY Device Tree Bindings +title: Allwinner A83t USB PHY maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/phy/allwinner,sun8i-h3-usb-phy.yaml b/Documentation/devicetree/bindings/phy/allwinner,sun8i-h3-usb-phy.yaml index e288450e0844..77539b4601c2 100644 --- a/Documentation/devicetree/bindings/phy/allwinner,sun8i-h3-usb-phy.yaml +++ b/Documentation/devicetree/bindings/phy/allwinner,sun8i-h3-usb-phy.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/phy/allwinner,sun8i-h3-usb-phy.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner H3 USB PHY Device Tree Bindings +title: Allwinner H3 USB PHY maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/phy/allwinner,sun8i-r40-usb-phy.yaml b/Documentation/devicetree/bindings/phy/allwinner,sun8i-r40-usb-phy.yaml index d947e50a49d2..2dd31630c13e 100644 --- a/Documentation/devicetree/bindings/phy/allwinner,sun8i-r40-usb-phy.yaml +++ b/Documentation/devicetree/bindings/phy/allwinner,sun8i-r40-usb-phy.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/phy/allwinner,sun8i-r40-usb-phy.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner R40 USB PHY Device Tree Bindings +title: Allwinner R40 USB PHY maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/phy/allwinner,sun8i-v3s-usb-phy.yaml b/Documentation/devicetree/bindings/phy/allwinner,sun8i-v3s-usb-phy.yaml index a2836c296cc4..395d33855d48 100644 --- a/Documentation/devicetree/bindings/phy/allwinner,sun8i-v3s-usb-phy.yaml +++ b/Documentation/devicetree/bindings/phy/allwinner,sun8i-v3s-usb-phy.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/phy/allwinner,sun8i-v3s-usb-phy.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner V3s USB PHY Device Tree Bindings +title: Allwinner V3s USB PHY maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/phy/allwinner,sun9i-a80-usb-phy.yaml b/Documentation/devicetree/bindings/phy/allwinner,sun9i-a80-usb-phy.yaml index 2eb493fa64fd..bd9445f6f130 100644 --- a/Documentation/devicetree/bindings/phy/allwinner,sun9i-a80-usb-phy.yaml +++ b/Documentation/devicetree/bindings/phy/allwinner,sun9i-a80-usb-phy.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/phy/allwinner,sun9i-a80-usb-phy.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A80 USB PHY Device Tree Bindings +title: Allwinner A80 USB PHY maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/phy/amlogic,axg-mipi-dphy.yaml b/Documentation/devicetree/bindings/phy/amlogic,axg-mipi-dphy.yaml index be485f500887..5eddaed3d853 100644 --- a/Documentation/devicetree/bindings/phy/amlogic,axg-mipi-dphy.yaml +++ b/Documentation/devicetree/bindings/phy/amlogic,axg-mipi-dphy.yaml @@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#" title: Amlogic AXG MIPI D-PHY maintainers: - - Neil Armstrong <narmstrong@baylibre.com> + - Neil Armstrong <neil.armstrong@linaro.org> properties: compatible: diff --git a/Documentation/devicetree/bindings/phy/amlogic,meson-g12a-usb2-phy.yaml b/Documentation/devicetree/bindings/phy/amlogic,meson-g12a-usb2-phy.yaml index 399ebde45409..f3a5fbabbbb5 100644 --- a/Documentation/devicetree/bindings/phy/amlogic,meson-g12a-usb2-phy.yaml +++ b/Documentation/devicetree/bindings/phy/amlogic,meson-g12a-usb2-phy.yaml @@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#" title: Amlogic G12A USB2 PHY maintainers: - - Neil Armstrong <narmstrong@baylibre.com> + - Neil Armstrong <neil.armstrong@linaro.org> properties: compatible: diff --git a/Documentation/devicetree/bindings/phy/amlogic,meson-g12a-usb3-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/amlogic,meson-g12a-usb3-pcie-phy.yaml index 453c083cf44c..868b4e6fde71 100644 --- a/Documentation/devicetree/bindings/phy/amlogic,meson-g12a-usb3-pcie-phy.yaml +++ b/Documentation/devicetree/bindings/phy/amlogic,meson-g12a-usb3-pcie-phy.yaml @@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#" title: Amlogic G12A USB3 + PCIE Combo PHY maintainers: - - Neil Armstrong <narmstrong@baylibre.com> + - Neil Armstrong <neil.armstrong@linaro.org> properties: compatible: diff --git a/Documentation/devicetree/bindings/phy/brcm,cygnus-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/brcm,cygnus-pcie-phy.yaml index 045699c65779..808e90b2465d 100644 --- a/Documentation/devicetree/bindings/phy/brcm,cygnus-pcie-phy.yaml +++ b/Documentation/devicetree/bindings/phy/brcm,cygnus-pcie-phy.yaml @@ -32,6 +32,7 @@ properties: patternProperties: "^pcie-phy@[0-9]+$": type: object + additionalProperties: false description: > PCIe PHY child nodes diff --git a/Documentation/devicetree/bindings/phy/cdns,dphy-rx.yaml b/Documentation/devicetree/bindings/phy/cdns,dphy-rx.yaml index 07be031d82e6..6fdd46ad5a78 100644 --- a/Documentation/devicetree/bindings/phy/cdns,dphy-rx.yaml +++ b/Documentation/devicetree/bindings/phy/cdns,dphy-rx.yaml @@ -4,10 +4,10 @@ $id: http://devicetree.org/schemas/phy/cdns,dphy-rx.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Cadence DPHY Rx Device Tree Bindings +title: Cadence DPHY Rx maintainers: - - Pratyush Yadav <p.yadav@ti.com> + - Pratyush Yadav <pratyush@kernel.org> properties: compatible: diff --git a/Documentation/devicetree/bindings/phy/cdns,dphy.yaml b/Documentation/devicetree/bindings/phy/cdns,dphy.yaml index f0e9ca8427bb..6cd9b0f388a4 100644 --- a/Documentation/devicetree/bindings/phy/cdns,dphy.yaml +++ b/Documentation/devicetree/bindings/phy/cdns,dphy.yaml @@ -4,10 +4,10 @@ $id: http://devicetree.org/schemas/phy/cdns,dphy.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Cadence DPHY Device Tree Bindings +title: Cadence DPHY maintainers: - - Pratyush Yadav <p.yadav@ti.com> + - Pratyush Yadav <pratyush@kernel.org> properties: compatible: diff --git a/Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml index b6421eedece3..0af765ba2793 100644 --- a/Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml +++ b/Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/phy/fsl,imx8-pcie-phy.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Freescale i.MX8 SoC series PCIe PHY Device Tree Bindings +title: Freescale i.MX8 SoC series PCIe PHY maintainers: - Richard Zhu <hongxing.zhu@nxp.com> diff --git a/Documentation/devicetree/bindings/phy/hisilicon,hi3660-usb3.yaml b/Documentation/devicetree/bindings/phy/hisilicon,hi3660-usb3.yaml index c2e073e26190..20b79e2e8b82 100644 --- a/Documentation/devicetree/bindings/phy/hisilicon,hi3660-usb3.yaml +++ b/Documentation/devicetree/bindings/phy/hisilicon,hi3660-usb3.yaml @@ -41,20 +41,10 @@ additionalProperties: false examples: - | - bus { - #address-cells = <2>; - #size-cells = <2>; - - usb3_otg_bc: usb3_otg_bc@ff200000 { - compatible = "syscon", "simple-mfd"; - reg = <0x0 0xff200000 0x0 0x1000>; - - usb-phy { - compatible = "hisilicon,hi3660-usb-phy"; - #phy-cells = <0>; - hisilicon,pericrg-syscon = <&crg_ctrl>; - hisilicon,pctrl-syscon = <&pctrl>; - hisilicon,eye-diagram-param = <0x22466e4>; - }; - }; + usb-phy { + compatible = "hisilicon,hi3660-usb-phy"; + #phy-cells = <0>; + hisilicon,pericrg-syscon = <&crg_ctrl>; + hisilicon,pctrl-syscon = <&pctrl>; + hisilicon,eye-diagram-param = <0x22466e4>; }; diff --git a/Documentation/devicetree/bindings/phy/hisilicon,hi3670-usb3.yaml b/Documentation/devicetree/bindings/phy/hisilicon,hi3670-usb3.yaml index ebd78acfe2de..1cb00dbcd4c5 100644 --- a/Documentation/devicetree/bindings/phy/hisilicon,hi3670-usb3.yaml +++ b/Documentation/devicetree/bindings/phy/hisilicon,hi3670-usb3.yaml @@ -52,22 +52,12 @@ additionalProperties: false examples: - | - bus { - #address-cells = <2>; - #size-cells = <2>; - - usb3_otg_bc: usb3_otg_bc@ff200000 { - compatible = "syscon", "simple-mfd"; - reg = <0x0 0xff200000 0x0 0x1000>; - - usb_phy { - compatible = "hisilicon,hi3670-usb-phy"; - #phy-cells = <0>; - hisilicon,pericrg-syscon = <&crg_ctrl>; - hisilicon,pctrl-syscon = <&pctrl>; - hisilicon,sctrl-syscon = <&sctrl>; - hisilicon,eye-diagram-param = <0xfdfee4>; - hisilicon,tx-vboost-lvl = <0x5>; - }; - }; + usb-phy { + compatible = "hisilicon,hi3670-usb-phy"; + #phy-cells = <0>; + hisilicon,pericrg-syscon = <&crg_ctrl>; + hisilicon,pctrl-syscon = <&pctrl>; + hisilicon,sctrl-syscon = <&sctrl>; + hisilicon,eye-diagram-param = <0xfdfee4>; + hisilicon,tx-vboost-lvl = <0x5>; }; diff --git a/Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml b/Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml index 954e67571dfd..ca818f83579b 100644 --- a/Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml +++ b/Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/phy/intel,lgm-emmc-phy.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Intel Lightning Mountain(LGM) eMMC PHY Device Tree Bindings +title: Intel Lightning Mountain(LGM) eMMC PHY maintainers: - Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> diff --git a/Documentation/devicetree/bindings/phy/intel,lgm-usb-phy.yaml b/Documentation/devicetree/bindings/phy/intel,lgm-usb-phy.yaml index ce62c0b94daf..653a12286637 100644 --- a/Documentation/devicetree/bindings/phy/intel,lgm-usb-phy.yaml +++ b/Documentation/devicetree/bindings/phy/intel,lgm-usb-phy.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/phy/intel,lgm-usb-phy.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Intel LGM USB PHY Device Tree Bindings +title: Intel LGM USB PHY maintainers: - Vadivel Murugan Ramuthevar <vadivel.muruganx.ramuthevar@linux.intel.com> diff --git a/Documentation/devicetree/bindings/phy/lantiq,vrx200-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/lantiq,vrx200-pcie-phy.yaml index a97482179cf5..711de06bb0fc 100644 --- a/Documentation/devicetree/bindings/phy/lantiq,vrx200-pcie-phy.yaml +++ b/Documentation/devicetree/bindings/phy/lantiq,vrx200-pcie-phy.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/phy/lantiq,vrx200-pcie-phy.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Lantiq VRX200 and ARX300 PCIe PHY Device Tree Bindings +title: Lantiq VRX200 and ARX300 PCIe PHY maintainers: - Martin Blumenstingl <martin.blumenstingl@googlemail.com> diff --git a/Documentation/devicetree/bindings/phy/mediatek,mt7621-pci-phy.yaml b/Documentation/devicetree/bindings/phy/mediatek,mt7621-pci-phy.yaml index 29d4123323c2..c2f4cb0b254a 100644 --- a/Documentation/devicetree/bindings/phy/mediatek,mt7621-pci-phy.yaml +++ b/Documentation/devicetree/bindings/phy/mediatek,mt7621-pci-phy.yaml @@ -4,7 +4,7 @@ $id: "http://devicetree.org/schemas/phy/mediatek,mt7621-pci-phy.yaml#" $schema: "http://devicetree.org/meta-schemas/core.yaml#" -title: Mediatek Mt7621 PCIe PHY Device Tree Bindings +title: Mediatek Mt7621 PCIe PHY maintainers: - Sergio Paracuellos <sergio.paracuellos@gmail.com> diff --git a/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml b/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml index b3e409988c17..5613cc5106e3 100644 --- a/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml +++ b/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml @@ -5,7 +5,7 @@ $id: http://devicetree.org/schemas/phy/mediatek,tphy.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: MediaTek T-PHY Controller Device Tree Bindings +title: MediaTek T-PHY Controller maintainers: - Chunfeng Yun <chunfeng.yun@mediatek.com> @@ -163,6 +163,7 @@ patternProperties: - PHY_TYPE_USB3 - PHY_TYPE_PCIE - PHY_TYPE_SATA + - PHY_TYPE_SGMII nvmem-cells: items: @@ -218,6 +219,16 @@ patternProperties: minimum: 1 maximum: 15 + mediatek,pre-emphasis: + description: + The level of pre-emphasis which used to widen the eye opening and + boost eye swing, the unit step is about 4.16% increment; e.g. the + level 1 means amplitude increases about 4.16%, the level 2 is about + 8.3% etc. (U2 phy) + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 1 + maximum: 3 + mediatek,bc12: description: Specify the flag to enable BC1.2 if support it diff --git a/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml b/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml index 598fd2b95c29..a9e3139fd421 100644 --- a/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml +++ b/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml @@ -5,7 +5,7 @@ $id: http://devicetree.org/schemas/phy/mediatek,xsphy.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: MediaTek XS-PHY Controller Device Tree Bindings +title: MediaTek XS-PHY Controller maintainers: - Chunfeng Yun <chunfeng.yun@mediatek.com> diff --git a/Documentation/devicetree/bindings/phy/mscc,vsc7514-serdes.yaml b/Documentation/devicetree/bindings/phy/mscc,vsc7514-serdes.yaml new file mode 100644 index 000000000000..3169b873231e --- /dev/null +++ b/Documentation/devicetree/bindings/phy/mscc,vsc7514-serdes.yaml @@ -0,0 +1,56 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/mscc,vsc7514-serdes.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microsemi Ocelot SerDes muxing + +maintainers: + - Alexandre Belloni <alexandre.belloni@bootlin.com> + - UNGLinuxDriver@microchip.com + +description: | + On Microsemi Ocelot, there is a handful of registers in HSIO address + space for setting up the SerDes to switch port muxing. + + A SerDes X can be "muxed" to work with switch port Y or Z for example. + One specific SerDes can also be used as a PCIe interface. + + Hence, a SerDes represents an interface, be it an Ethernet or a PCIe one. + + There are two kinds of SerDes: SERDES1G supports 10/100Mbps in + half/full-duplex and 1000Mbps in full-duplex mode while SERDES6G supports + 10/100Mbps in half/full-duplex and 1000/2500Mbps in full-duplex mode. + + Also, SERDES6G number (aka "macro") 0 is the only interface supporting + QSGMII. + + This is a child of the HSIO syscon ("mscc,ocelot-hsio", see + Documentation/devicetree/bindings/mips/mscc.txt) on the Microsemi Ocelot. + +properties: + compatible: + enum: + - mscc,vsc7514-serdes + + "#phy-cells": + const: 2 + description: | + The first number defines the input port to use for a given SerDes macro. + The second defines the macro to use. They are defined in + dt-bindings/phy/phy-ocelot-serdes.h + +required: + - compatible + - "#phy-cells" + +additionalProperties: + false + +examples: + - | + serdes: serdes { + compatible = "mscc,vsc7514-serdes"; + #phy-cells = <2>; + }; diff --git a/Documentation/devicetree/bindings/phy/mxs-usb-phy.txt b/Documentation/devicetree/bindings/phy/mxs-usb-phy.txt index c9e392c64a7c..70c813b0755f 100644 --- a/Documentation/devicetree/bindings/phy/mxs-usb-phy.txt +++ b/Documentation/devicetree/bindings/phy/mxs-usb-phy.txt @@ -15,10 +15,10 @@ Required properties: - fsl,anatop: phandle for anatop register, it is only for imx6 SoC series Optional properties: -- fsl,tx-cal-45-dn-ohms: Integer [30-55]. Resistance (in ohms) of switchable +- fsl,tx-cal-45-dn-ohms: Integer [35-54]. Resistance (in ohms) of switchable high-speed trimming resistor connected in parallel with the 45 ohm resistor that terminates the DN output signal. Default: 45 -- fsl,tx-cal-45-dp-ohms: Integer [30-55]. Resistance (in ohms) of switchable +- fsl,tx-cal-45-dp-ohms: Integer [35-54]. Resistance (in ohms) of switchable high-speed trimming resistor connected in parallel with the 45 ohm resistor that terminates the DP output signal. Default: 45 - fsl,tx-d-cal: Integer [79-119]. Current trimming value (as a percentage) of diff --git a/Documentation/devicetree/bindings/phy/phy-ocelot-serdes.txt b/Documentation/devicetree/bindings/phy/phy-ocelot-serdes.txt deleted file mode 100644 index 332219860187..000000000000 --- a/Documentation/devicetree/bindings/phy/phy-ocelot-serdes.txt +++ /dev/null @@ -1,43 +0,0 @@ -Microsemi Ocelot SerDes muxing driver -------------------------------------- - -On Microsemi Ocelot, there is a handful of registers in HSIO address -space for setting up the SerDes to switch port muxing. - -A SerDes X can be "muxed" to work with switch port Y or Z for example. -One specific SerDes can also be used as a PCIe interface. - -Hence, a SerDes represents an interface, be it an Ethernet or a PCIe one. - -There are two kinds of SerDes: SERDES1G supports 10/100Mbps in -half/full-duplex and 1000Mbps in full-duplex mode while SERDES6G supports -10/100Mbps in half/full-duplex and 1000/2500Mbps in full-duplex mode. - -Also, SERDES6G number (aka "macro") 0 is the only interface supporting -QSGMII. - -This is a child of the HSIO syscon ("mscc,ocelot-hsio", see -Documentation/devicetree/bindings/mips/mscc.txt) on the Microsemi Ocelot. - -Required properties: - -- compatible: should be "mscc,vsc7514-serdes" -- #phy-cells : from the generic phy bindings, must be 2. - The first number defines the input port to use for a given - SerDes macro. The second defines the macro to use. They are - defined in dt-bindings/phy/phy-ocelot-serdes.h - -Example: - - serdes: serdes { - compatible = "mscc,vsc7514-serdes"; - #phy-cells = <2>; - }; - - ethernet { - port1 { - phy-handle = <&phy_foo>; - /* Link SERDES1G_5 to port1 */ - phys = <&serdes 1 SERDES1G_5>; - }; - }; diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml index 4b75289735eb..f71920082fa3 100644 --- a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml +++ b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml @@ -13,6 +13,7 @@ properties: compatible: enum: - rockchip,px30-usb2phy + - rockchip,rk3128-usb2phy - rockchip,rk3228-usb2phy - rockchip,rk3308-usb2phy - rockchip,rk3328-usb2phy diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.yaml b/Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.yaml index f14454401419..8d8698412de0 100644 --- a/Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.yaml +++ b/Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/phy/phy-rockchip-naneng-combphy.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Rockchip SoC Naneng Combo Phy Device Tree Bindings +title: Rockchip SoC Naneng Combo Phy maintainers: - Heiko Stuebner <heiko@sntech.de> diff --git a/Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml b/Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml index dc287d428e49..801993813b18 100644 --- a/Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml +++ b/Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml @@ -77,6 +77,8 @@ patternProperties: connector: type: object $ref: /schemas/connector/usb-connector.yaml + unevaluatedProperties: false + properties: vbus-supply: true diff --git a/Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml index cf9e9b8011cb..1e104ae76ee6 100644 --- a/Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml @@ -19,6 +19,8 @@ properties: enum: - qcom,sc7280-edp-phy - qcom,sc8180x-edp-phy + - qcom,sc8280xp-dp-phy + - qcom,sc8280xp-edp-phy reg: items: diff --git a/Documentation/devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml b/Documentation/devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml index eea2e02678ed..83fe4b39b56f 100644 --- a/Documentation/devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml @@ -28,12 +28,15 @@ properties: - const: hdmi_phy clocks: - maxItems: 2 + minItems: 2 + maxItems: 3 clock-names: + minItems: 2 items: - const: iface - const: ref + - const: xo power-domains: maxItems: 1 @@ -44,6 +47,9 @@ properties: vddio-supply: description: phandle to VDD I/O supply regulator + '#clock-cells': + const: 0 + '#phy-cells': const: 0 @@ -75,9 +81,12 @@ examples: "hdmi_phy"; clocks = <&mmcc 116>, - <&gcc 214>; + <&gcc 214>, + <&xo_board>; clock-names = "iface", - "ref"; + "ref", + "xo"; + #clock-cells = <0>; #phy-cells = <0>; vddio-supply = <&vreg_l12a_1p8>; diff --git a/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-pcie-phy.yaml new file mode 100644 index 000000000000..4e710ef75523 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-pcie-phy.yaml @@ -0,0 +1,189 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/qcom,msm8996-qmp-pcie-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm QMP PHY controller (MSM8996 PCIe) + +maintainers: + - Vinod Koul <vkoul@kernel.org> + +description: + QMP PHY controller supports physical layer functionality for a number of + controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB. + +properties: + compatible: + const: qcom,msm8996-qmp-pcie-phy + + reg: + items: + - description: serdes + + "#address-cells": + enum: [ 1, 2 ] + + "#size-cells": + enum: [ 1, 2 ] + + ranges: true + + clocks: + maxItems: 3 + + clock-names: + items: + - const: aux + - const: cfg_ahb + - const: ref + + resets: + maxItems: 3 + + reset-names: + items: + - const: phy + - const: common + - const: cfg + + vdda-phy-supply: true + + vdda-pll-supply: true + + vddp-ref-clk-supply: true + +patternProperties: + "^phy@[0-9a-f]+$": + type: object + description: one child node per PHY provided by this block + properties: + reg: + items: + - description: TX + - description: RX + - description: PCS + + clocks: + items: + - description: PIPE clock + + clock-names: + deprecated: true + items: + - enum: + - pipe0 + - pipe1 + - pipe2 + + resets: + items: + - description: PHY reset + + reset-names: + deprecated: true + items: + - enum: + - lane0 + - lane1 + - lane2 + + "#clock-cells": + const: 0 + + clock-output-names: + maxItems: 1 + + "#phy-cells": + const: 0 + + required: + - reg + - clocks + - resets + - "#clock-cells" + - clock-output-names + - "#phy-cells" + + additionalProperties: false + +required: + - compatible + - reg + - "#address-cells" + - "#size-cells" + - ranges + - clocks + - clock-names + - resets + - reset-names + - vdda-phy-supply + - vdda-pll-supply + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,gcc-msm8996.h> + pcie_phy: phy-wrapper@34000 { + compatible = "qcom,msm8996-qmp-pcie-phy"; + reg = <0x34000 0x488>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x34000 0x4000>; + + clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>, + <&gcc GCC_PCIE_PHY_CFG_AHB_CLK>, + <&gcc GCC_PCIE_CLKREF_CLK>; + clock-names = "aux", "cfg_ahb", "ref"; + + resets = <&gcc GCC_PCIE_PHY_BCR>, + <&gcc GCC_PCIE_PHY_COM_BCR>, + <&gcc GCC_PCIE_PHY_COM_NOCSR_BCR>; + reset-names = "phy", "common", "cfg"; + + vdda-phy-supply = <&vreg_l28a_0p925>; + vdda-pll-supply = <&vreg_l12a_1p8>; + + pciephy_0: phy@1000 { + reg = <0x1000 0x130>, + <0x1200 0x200>, + <0x1400 0x1dc>; + + clocks = <&gcc GCC_PCIE_0_PIPE_CLK>; + resets = <&gcc GCC_PCIE_0_PHY_BCR>; + + #clock-cells = <0>; + clock-output-names = "pcie_0_pipe_clk_src"; + + #phy-cells = <0>; + }; + + pciephy_1: phy@2000 { + reg = <0x2000 0x130>, + <0x2200 0x200>, + <0x2400 0x1dc>; + + clocks = <&gcc GCC_PCIE_1_PIPE_CLK>; + resets = <&gcc GCC_PCIE_1_PHY_BCR>; + + #clock-cells = <0>; + clock-output-names = "pcie_1_pipe_clk_src"; + + #phy-cells = <0>; + }; + + pciephy_2: phy@3000 { + reg = <0x3000 0x130>, + <0x3200 0x200>, + <0x3400 0x1dc>; + + clocks = <&gcc GCC_PCIE_2_PIPE_CLK>; + resets = <&gcc GCC_PCIE_2_PHY_BCR>; + + #clock-cells = <0>; + clock-output-names = "pcie_2_pipe_clk_src"; + + #phy-cells = <0>; + }; + }; diff --git a/Documentation/devicetree/bindings/phy/qcom,qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,qmp-pcie-phy.yaml new file mode 100644 index 000000000000..324ad7d03a38 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/qcom,qmp-pcie-phy.yaml @@ -0,0 +1,296 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/qcom,qmp-pcie-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm QMP PHY controller (PCIe) + +maintainers: + - Vinod Koul <vkoul@kernel.org> + +description: + QMP PHY controller supports physical layer functionality for a number of + controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB. + +properties: + compatible: + enum: + - qcom,ipq6018-qmp-pcie-phy + - qcom,ipq8074-qmp-gen3-pcie-phy + - qcom,ipq8074-qmp-pcie-phy + - qcom,msm8998-qmp-pcie-phy + - qcom,sc8180x-qmp-pcie-phy + - qcom,sdm845-qhp-pcie-phy + - qcom,sdm845-qmp-pcie-phy + - qcom,sdx55-qmp-pcie-phy + - qcom,sm8250-qmp-gen3x1-pcie-phy + - qcom,sm8250-qmp-gen3x2-pcie-phy + - qcom,sm8250-qmp-modem-pcie-phy + - qcom,sm8450-qmp-gen3x1-pcie-phy + - qcom,sm8450-qmp-gen4x2-pcie-phy + + reg: + items: + - description: serdes + + "#address-cells": + enum: [ 1, 2 ] + + "#size-cells": + enum: [ 1, 2 ] + + ranges: true + + clocks: + minItems: 2 + maxItems: 4 + + clock-names: + minItems: 2 + maxItems: 4 + + resets: + minItems: 1 + maxItems: 2 + + reset-names: + minItems: 1 + maxItems: 2 + + vdda-phy-supply: true + + vdda-pll-supply: true + + vddp-ref-clk-supply: true + +patternProperties: + "^phy@[0-9a-f]+$": + type: object + description: single PHY-provider child node + properties: + reg: + minItems: 3 + maxItems: 6 + + clocks: + items: + - description: PIPE clock + + clock-names: + deprecated: true + items: + - const: pipe0 + + "#clock-cells": + const: 0 + + clock-output-names: + maxItems: 1 + + "#phy-cells": + const: 0 + + required: + - reg + - clocks + - "#clock-cells" + - clock-output-names + - "#phy-cells" + + additionalProperties: false + +required: + - compatible + - reg + - "#address-cells" + - "#size-cells" + - ranges + - clocks + - clock-names + - resets + - reset-names + +additionalProperties: false + +allOf: + - if: + properties: + compatible: + contains: + enum: + - qcom,msm8998-qmp-pcie-phy + then: + properties: + clocks: + maxItems: 3 + clock-names: + items: + - const: aux + - const: cfg_ahb + - const: ref + resets: + maxItems: 2 + reset-names: + items: + - const: phy + - const: common + required: + - vdda-phy-supply + - vdda-pll-supply + + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq6018-qmp-pcie-phy + - qcom,ipq8074-qmp-gen3-pcie-phy + - qcom,ipq8074-qmp-pcie-phy + then: + properties: + clocks: + maxItems: 2 + clock-names: + items: + - const: aux + - const: cfg_ahb + resets: + maxItems: 2 + reset-names: + items: + - const: phy + - const: common + + - if: + properties: + compatible: + contains: + enum: + - qcom,sc8180x-qmp-pcie-phy + - qcom,sdm845-qhp-pcie-phy + - qcom,sdm845-qmp-pcie-phy + - qcom,sdx55-qmp-pcie-phy + - qcom,sm8250-qmp-gen3x1-pcie-phy + - qcom,sm8250-qmp-gen3x2-pcie-phy + - qcom,sm8250-qmp-modem-pcie-phy + - qcom,sm8450-qmp-gen3x1-pcie-phy + - qcom,sm8450-qmp-gen4x2-pcie-phy + then: + properties: + clocks: + maxItems: 4 + clock-names: + items: + - const: aux + - const: cfg_ahb + - const: ref + - const: refgen + resets: + maxItems: 1 + reset-names: + items: + - const: phy + required: + - vdda-phy-supply + - vdda-pll-supply + + - if: + properties: + compatible: + contains: + enum: + - qcom,sm8250-qmp-gen3x2-pcie-phy + - qcom,sm8250-qmp-modem-pcie-phy + - qcom,sm8450-qmp-gen4x2-pcie-phy + then: + patternProperties: + "^phy@[0-9a-f]+$": + properties: + reg: + items: + - description: TX lane 1 + - description: RX lane 1 + - description: PCS + - description: TX lane 2 + - description: RX lane 2 + - description: PCS_MISC + + - if: + properties: + compatible: + contains: + enum: + - qcom,sc8180x-qmp-pcie-phy + - qcom,sdm845-qmp-pcie-phy + - qcom,sdx55-qmp-pcie-phy + - qcom,sm8250-qmp-gen3x1-pcie-phy + - qcom,sm8450-qmp-gen3x1-pcie-phy + then: + patternProperties: + "^phy@[0-9a-f]+$": + properties: + reg: + items: + - description: TX + - description: RX + - description: PCS + - description: PCS_MISC + + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq6018-qmp-pcie-phy + - qcom,ipq8074-qmp-pcie-phy + - qcom,msm8998-qmp-pcie-phy + - qcom,sdm845-qhp-pcie-phy + then: + patternProperties: + "^phy@[0-9a-f]+$": + properties: + reg: + items: + - description: TX + - description: RX + - description: PCS + +examples: + - | + #include <dt-bindings/clock/qcom,gcc-sm8250.h> + phy-wrapper@1c0e000 { + compatible = "qcom,sm8250-qmp-gen3x2-pcie-phy"; + reg = <0x01c0e000 0x1c0>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x01c0e000 0x1000>; + + clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>, + <&gcc GCC_PCIE_1_CFG_AHB_CLK>, + <&gcc GCC_PCIE_WIGIG_CLKREF_EN>, + <&gcc GCC_PCIE1_PHY_REFGEN_CLK>; + clock-names = "aux", "cfg_ahb", "ref", "refgen"; + + resets = <&gcc GCC_PCIE_1_PHY_BCR>; + reset-names = "phy"; + + vdda-phy-supply = <&vreg_l10c_0p88>; + vdda-pll-supply = <&vreg_l6b_1p2>; + + phy@200 { + reg = <0x200 0x170>, + <0x400 0x200>, + <0xa00 0x1f0>, + <0x600 0x170>, + <0x800 0x200>, + <0xe00 0xf4>; + + clocks = <&gcc GCC_PCIE_1_PIPE_CLK>; + + #clock-cells = <0>; + clock-output-names = "pcie_1_pipe_clk"; + + #phy-cells = <0>; + }; + }; diff --git a/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml deleted file mode 100644 index 220788ce215f..000000000000 --- a/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml +++ /dev/null @@ -1,502 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) - -%YAML 1.2 ---- -$id: "http://devicetree.org/schemas/phy/qcom,qmp-phy.yaml#" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" - -title: Qualcomm QMP PHY controller - -maintainers: - - Vinod Koul <vkoul@kernel.org> - -description: - QMP phy controller supports physical layer functionality for a number of - controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB. - -properties: - compatible: - enum: - - qcom,ipq6018-qmp-pcie-phy - - qcom,ipq6018-qmp-usb3-phy - - qcom,ipq8074-qmp-gen3-pcie-phy - - qcom,ipq8074-qmp-pcie-phy - - qcom,ipq8074-qmp-usb3-phy - - qcom,msm8996-qmp-pcie-phy - - qcom,msm8996-qmp-ufs-phy - - qcom,msm8996-qmp-usb3-phy - - qcom,msm8998-qmp-pcie-phy - - qcom,msm8998-qmp-ufs-phy - - qcom,msm8998-qmp-usb3-phy - - qcom,qcm2290-qmp-usb3-phy - - qcom,sc7180-qmp-usb3-phy - - qcom,sc8180x-qmp-pcie-phy - - qcom,sc8180x-qmp-ufs-phy - - qcom,sc8180x-qmp-usb3-phy - - qcom,sc8280xp-qmp-ufs-phy - - qcom,sdm845-qhp-pcie-phy - - qcom,sdm845-qmp-pcie-phy - - qcom,sdm845-qmp-ufs-phy - - qcom,sdm845-qmp-usb3-phy - - qcom,sdm845-qmp-usb3-uni-phy - - qcom,sm6115-qmp-ufs-phy - - qcom,sm6350-qmp-ufs-phy - - qcom,sm8150-qmp-ufs-phy - - qcom,sm8150-qmp-usb3-phy - - qcom,sm8150-qmp-usb3-uni-phy - - qcom,sm8250-qmp-ufs-phy - - qcom,sm8250-qmp-gen3x1-pcie-phy - - qcom,sm8250-qmp-gen3x2-pcie-phy - - qcom,sm8250-qmp-modem-pcie-phy - - qcom,sm8250-qmp-usb3-phy - - qcom,sm8250-qmp-usb3-uni-phy - - qcom,sm8350-qmp-ufs-phy - - qcom,sm8350-qmp-usb3-phy - - qcom,sm8350-qmp-usb3-uni-phy - - qcom,sm8450-qmp-gen3x1-pcie-phy - - qcom,sm8450-qmp-gen4x2-pcie-phy - - qcom,sm8450-qmp-ufs-phy - - qcom,sm8450-qmp-usb3-phy - - qcom,sdx55-qmp-pcie-phy - - qcom,sdx55-qmp-usb3-uni-phy - - qcom,sdx65-qmp-usb3-uni-phy - - reg: - minItems: 1 - items: - - description: Address and length of PHY's common serdes block. - - description: Address and length of PHY's DP_COM control block. - - "#clock-cells": - enum: [ 1, 2 ] - - "#address-cells": - enum: [ 1, 2 ] - - "#size-cells": - enum: [ 1, 2 ] - - ranges: true - - clocks: - minItems: 1 - maxItems: 4 - - clock-names: - minItems: 1 - maxItems: 4 - - resets: - minItems: 1 - maxItems: 3 - - reset-names: - minItems: 1 - maxItems: 3 - - vdda-phy-supply: - description: - Phandle to a regulator supply to PHY core block. - - vdda-pll-supply: - description: - Phandle to 1.8V regulator supply to PHY refclk pll block. - - vddp-ref-clk-supply: - description: - Phandle to a regulator supply to any specific refclk pll block. - -#Required nodes: -patternProperties: - "^phy@[0-9a-f]+$": - type: object - description: - Each device node of QMP phy is required to have as many child nodes as - the number of lanes the PHY has. - -required: - - compatible - - reg - - "#clock-cells" - - "#address-cells" - - "#size-cells" - - ranges - - clocks - - clock-names - - resets - - reset-names - -additionalProperties: false - -allOf: - - if: - properties: - compatible: - contains: - enum: - - qcom,sdm845-qmp-usb3-uni-phy - then: - properties: - clocks: - items: - - description: Phy aux clock. - - description: Phy config clock. - - description: 19.2 MHz ref clk. - - description: Phy common block aux clock. - clock-names: - items: - - const: aux - - const: cfg_ahb - - const: ref - - const: com_aux - resets: - items: - - description: reset of phy block. - - description: phy common block reset. - reset-names: - items: - - const: phy - - const: common - required: - - vdda-phy-supply - - vdda-pll-supply - - if: - properties: - compatible: - contains: - enum: - - qcom,sdx55-qmp-usb3-uni-phy - - qcom,sdx65-qmp-usb3-uni-phy - then: - properties: - clocks: - items: - - description: Phy aux clock. - - description: Phy config clock. - - description: 19.2 MHz ref clk. - clock-names: - items: - - const: aux - - const: cfg_ahb - - const: ref - resets: - items: - - description: reset of phy block. - - description: phy common block reset. - reset-names: - items: - - const: phy - - const: common - required: - - vdda-phy-supply - - vdda-pll-supply - - if: - properties: - compatible: - contains: - enum: - - qcom,msm8996-qmp-pcie-phy - then: - properties: - clocks: - items: - - description: Phy aux clock. - - description: Phy config clock. - - description: 19.2 MHz ref clk. - clock-names: - items: - - const: aux - - const: cfg_ahb - - const: ref - resets: - items: - - description: reset of phy block. - - description: phy common block reset. - - description: phy's ahb cfg block reset. - reset-names: - items: - - const: phy - - const: common - - const: cfg - required: - - vdda-phy-supply - - vdda-pll-supply - - if: - properties: - compatible: - contains: - enum: - - qcom,ipq8074-qmp-usb3-phy - - qcom,msm8996-qmp-usb3-phy - - qcom,msm8998-qmp-pcie-phy - - qcom,msm8998-qmp-usb3-phy - then: - properties: - clocks: - items: - - description: Phy aux clock. - - description: Phy config clock. - - description: 19.2 MHz ref clk. - clock-names: - items: - - const: aux - - const: cfg_ahb - - const: ref - resets: - items: - - description: reset of phy block. - - description: phy common block reset. - reset-names: - items: - - const: phy - - const: common - required: - - vdda-phy-supply - - vdda-pll-supply - - if: - properties: - compatible: - contains: - enum: - - qcom,msm8996-qmp-ufs-phy - then: - properties: - clocks: - items: - - description: 19.2 MHz ref clk. - clock-names: - items: - - const: ref - resets: - items: - - description: PHY reset in the UFS controller. - reset-names: - items: - - const: ufsphy - required: - - vdda-phy-supply - - vdda-pll-supply - - if: - properties: - compatible: - contains: - enum: - - qcom,msm8998-qmp-ufs-phy - - qcom,sdm845-qmp-ufs-phy - - qcom,sm6350-qmp-ufs-phy - - qcom,sm8150-qmp-ufs-phy - - qcom,sm8250-qmp-ufs-phy - - qcom,sc8180x-qmp-ufs-phy - - qcom,sc8280xp-qmp-ufs-phy - then: - properties: - clocks: - items: - - description: 19.2 MHz ref clk. - - description: Phy reference aux clock. - clock-names: - items: - - const: ref - - const: ref_aux - resets: - items: - - description: PHY reset in the UFS controller. - reset-names: - items: - - const: ufsphy - required: - - vdda-phy-supply - - vdda-pll-supply - - if: - properties: - compatible: - contains: - enum: - - qcom,ipq6018-qmp-pcie-phy - - qcom,ipq8074-qmp-gen3-pcie-phy - - qcom,ipq8074-qmp-pcie-phy - then: - properties: - clocks: - items: - - description: Phy aux clock. - - description: Phy config clock. - clock-names: - items: - - const: aux - - const: cfg_ahb - resets: - items: - - description: reset of phy block. - - description: phy common block reset. - reset-names: - items: - - const: phy - - const: common - - if: - properties: - compatible: - contains: - enum: - - qcom,sc8180x-qmp-pcie-phy - - qcom,sdm845-qhp-pcie-phy - - qcom,sdm845-qmp-pcie-phy - - qcom,sdx55-qmp-pcie-phy - - qcom,sm8250-qmp-gen3x1-pcie-phy - - qcom,sm8250-qmp-gen3x2-pcie-phy - - qcom,sm8250-qmp-modem-pcie-phy - - qcom,sm8450-qmp-gen3x1-pcie-phy - - qcom,sm8450-qmp-gen4x2-pcie-phy - then: - properties: - clocks: - items: - - description: Phy aux clock. - - description: Phy config clock. - - description: 19.2 MHz ref clk. - - description: Phy refgen clk. - clock-names: - items: - - const: aux - - const: cfg_ahb - - const: ref - - const: refgen - resets: - items: - - description: reset of phy block. - reset-names: - items: - - const: phy - required: - - vdda-phy-supply - - vdda-pll-supply - - if: - properties: - compatible: - contains: - enum: - - qcom,sm8150-qmp-usb3-phy - - qcom,sm8150-qmp-usb3-uni-phy - - qcom,sm8250-qmp-usb3-uni-phy - - qcom,sm8350-qmp-usb3-uni-phy - then: - properties: - clocks: - items: - - description: Phy aux clock. - - description: 19.2 MHz ref clk source. - - description: 19.2 MHz ref clk. - - description: Phy common block aux clock. - clock-names: - items: - - const: aux - - const: ref_clk_src - - const: ref - - const: com_aux - resets: - items: - - description: reset of phy block. - - description: phy common block reset. - reset-names: - items: - - const: phy - - const: common - required: - - vdda-phy-supply - - vdda-pll-supply - - if: - properties: - compatible: - contains: - enum: - - qcom,sm8250-qmp-usb3-phy - - qcom,sm8350-qmp-usb3-phy - then: - properties: - clocks: - items: - - description: Phy aux clock. - - description: 19.2 MHz ref clk. - - description: Phy common block aux clock. - clock-names: - items: - - const: aux - - const: ref_clk_src - - const: com_aux - resets: - items: - - description: reset of phy block. - - description: phy common block reset. - reset-names: - items: - - const: phy - - const: common - required: - - vdda-phy-supply - - vdda-pll-supply - - if: - properties: - compatible: - contains: - enum: - - qcom,qcm2290-qmp-usb3-phy - then: - properties: - clocks: - items: - - description: Phy config clock. - - description: 19.2 MHz ref clk. - - description: Phy common block aux clock. - clock-names: - items: - - const: cfg_ahb - - const: ref - - const: com_aux - resets: - items: - - description: phy_phy reset. - - description: reset of phy block. - reset-names: - items: - - const: phy_phy - - const: phy - required: - - vdda-phy-supply - - vdda-pll-supply - -examples: - - | - #include <dt-bindings/clock/qcom,gcc-sdm845.h> - usb_2_qmpphy: phy-wrapper@88eb000 { - compatible = "qcom,sdm845-qmp-usb3-uni-phy"; - reg = <0x088eb000 0x18c>; - #clock-cells = <1>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x088eb000 0x2000>; - - clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK >, - <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>, - <&gcc GCC_USB3_SEC_CLKREF_CLK>, - <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>; - clock-names = "aux", "cfg_ahb", "ref", "com_aux"; - - resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>, - <&gcc GCC_USB3_PHY_SEC_BCR>; - reset-names = "phy", "common"; - - vdda-phy-supply = <&vdda_usb2_ss_1p2>; - vdda-pll-supply = <&vdda_usb2_ss_core>; - - usb_2_ssphy: phy@200 { - reg = <0x200 0x128>, - <0x400 0x1fc>, - <0x800 0x218>, - <0x600 0x70>; - #clock-cells = <0>; - #phy-cells = <0>; - clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>; - clock-names = "pipe0"; - clock-output-names = "usb3_uni_phy_pipe_clk_src"; - }; - }; diff --git a/Documentation/devicetree/bindings/phy/qcom,qmp-ufs-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,qmp-ufs-phy.yaml new file mode 100644 index 000000000000..815c375d0f7b --- /dev/null +++ b/Documentation/devicetree/bindings/phy/qcom,qmp-ufs-phy.yaml @@ -0,0 +1,240 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/qcom,qmp-ufs-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm QMP PHY controller (UFS) + +maintainers: + - Vinod Koul <vkoul@kernel.org> + +description: + QMP PHY controller supports physical layer functionality for a number of + controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB. + +properties: + compatible: + enum: + - qcom,msm8996-qmp-ufs-phy + - qcom,msm8998-qmp-ufs-phy + - qcom,sc8180x-qmp-ufs-phy + - qcom,sc8280xp-qmp-ufs-phy + - qcom,sdm845-qmp-ufs-phy + - qcom,sm6115-qmp-ufs-phy + - qcom,sm6350-qmp-ufs-phy + - qcom,sm8150-qmp-ufs-phy + - qcom,sm8250-qmp-ufs-phy + - qcom,sm8350-qmp-ufs-phy + - qcom,sm8450-qmp-ufs-phy + + reg: + items: + - description: serdes + + "#address-cells": + enum: [ 1, 2 ] + + "#size-cells": + enum: [ 1, 2 ] + + ranges: true + + clocks: + minItems: 1 + maxItems: 3 + + clock-names: + minItems: 1 + maxItems: 3 + + power-domains: + maxItems: 1 + + resets: + maxItems: 1 + + reset-names: + items: + - const: ufsphy + + vdda-phy-supply: true + + vdda-pll-supply: true + + vddp-ref-clk-supply: true + +patternProperties: + "^phy@[0-9a-f]+$": + type: object + description: single PHY-provider child node + properties: + reg: + minItems: 3 + maxItems: 6 + + "#phy-cells": + const: 0 + + required: + - reg + - "#phy-cells" + + additionalProperties: false + +required: + - compatible + - reg + - "#address-cells" + - "#size-cells" + - ranges + - clocks + - clock-names + - resets + - reset-names + - vdda-phy-supply + - vdda-pll-supply + +additionalProperties: false + +allOf: + - if: + properties: + compatible: + contains: + enum: + - qcom,msm8996-qmp-ufs-phy + then: + properties: + clocks: + maxItems: 1 + clock-names: + items: + - const: ref + + - if: + properties: + compatible: + contains: + enum: + - qcom,msm8998-qmp-ufs-phy + - qcom,sc8180x-qmp-ufs-phy + - qcom,sc8280xp-qmp-ufs-phy + - qcom,sdm845-qmp-ufs-phy + - qcom,sm6115-qmp-ufs-phy + - qcom,sm6350-qmp-ufs-phy + - qcom,sm8150-qmp-ufs-phy + - qcom,sm8250-qmp-ufs-phy + then: + properties: + clocks: + maxItems: 2 + clock-names: + items: + - const: ref + - const: ref_aux + + - if: + properties: + compatible: + contains: + enum: + - qcom,sm8450-qmp-ufs-phy + then: + properties: + clocks: + maxItems: 3 + clock-names: + items: + - const: ref + - const: ref_aux + - const: qref + + - if: + properties: + compatible: + contains: + enum: + - qcom,msm8998-qmp-ufs-phy + - qcom,sc8280xp-qmp-ufs-phy + - qcom,sdm845-qmp-ufs-phy + - qcom,sm6350-qmp-ufs-phy + - qcom,sm8150-qmp-ufs-phy + - qcom,sm8250-qmp-ufs-phy + - qcom,sm8350-qmp-ufs-phy + - qcom,sm8450-qmp-ufs-phy + then: + patternProperties: + "^phy@[0-9a-f]+$": + properties: + reg: + items: + - description: TX lane 1 + - description: RX lane 1 + - description: PCS + - description: TX lane 2 + - description: RX lane 2 + + - if: + properties: + compatible: + contains: + enum: + - qcom,sc8180x-qmp-ufs-phy + then: + patternProperties: + "^phy@[0-9a-f]+$": + properties: + reg: + items: + - description: TX + - description: RX + - description: PCS + - description: PCS_MISC + + - if: + properties: + compatible: + contains: + enum: + - qcom,msm8996-qmp-ufs-phy + - qcom,sm6115-qmp-ufs-phy + then: + patternProperties: + "^phy@[0-9a-f]+$": + properties: + reg: + items: + - description: TX + - description: RX + - description: PCS + +examples: + - | + #include <dt-bindings/clock/qcom,gcc-sc8280xp.h> + #include <dt-bindings/clock/qcom,rpmh.h> + phy-wrapper@1d87000 { + compatible = "qcom,sc8280xp-qmp-ufs-phy"; + reg = <0x01d87000 0xe10>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x01d87000 0x1000>; + + clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; + clock-names = "ref", "ref_aux"; + + resets = <&ufs_mem_hc 0>; + reset-names = "ufsphy"; + + vdda-phy-supply = <&vreg_l6b>; + vdda-pll-supply = <&vreg_l3b>; + + phy@400 { + reg = <0x400 0x108>, + <0x600 0x1e0>, + <0xc00 0x1dc>, + <0x800 0x108>, + <0xa00 0x1e0>; + #phy-cells = <0>; + }; + }; diff --git a/Documentation/devicetree/bindings/phy/qcom,qmp-usb-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,qmp-usb-phy.yaml new file mode 100644 index 000000000000..7acb4b7de7f9 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/qcom,qmp-usb-phy.yaml @@ -0,0 +1,401 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/qcom,qmp-usb-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm QMP PHY controller (USB) + +maintainers: + - Vinod Koul <vkoul@kernel.org> + +description: + QMP PHY controller supports physical layer functionality for a number of + controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB. + +properties: + compatible: + enum: + - qcom,ipq6018-qmp-usb3-phy + - qcom,ipq8074-qmp-usb3-phy + - qcom,msm8996-qmp-usb3-phy + - qcom,msm8998-qmp-usb3-phy + - qcom,qcm2290-qmp-usb3-phy + - qcom,sc7180-qmp-usb3-phy + - qcom,sc8180x-qmp-usb3-phy + - qcom,sc8280xp-qmp-usb3-uni-phy + - qcom,sdm845-qmp-usb3-phy + - qcom,sdm845-qmp-usb3-uni-phy + - qcom,sdx55-qmp-usb3-uni-phy + - qcom,sdx65-qmp-usb3-uni-phy + - qcom,sm8150-qmp-usb3-phy + - qcom,sm8150-qmp-usb3-uni-phy + - qcom,sm8250-qmp-usb3-phy + - qcom,sm8250-qmp-usb3-uni-phy + - qcom,sm8350-qmp-usb3-phy + - qcom,sm8350-qmp-usb3-uni-phy + - qcom,sm8450-qmp-usb3-phy + + reg: + minItems: 1 + items: + - description: serdes + - description: DP_COM + + "#address-cells": + enum: [ 1, 2 ] + + "#size-cells": + enum: [ 1, 2 ] + + ranges: true + + clocks: + minItems: 3 + maxItems: 4 + + clock-names: + minItems: 3 + maxItems: 4 + + power-domains: + maxItems: 1 + + resets: + maxItems: 2 + + reset-names: + maxItems: 2 + + vdda-phy-supply: true + + vdda-pll-supply: true + + vddp-ref-clk-supply: true + +patternProperties: + "^phy@[0-9a-f]+$": + type: object + description: single PHY-provider child node + properties: + reg: + minItems: 3 + maxItems: 6 + + clocks: + items: + - description: PIPE clock + + clock-names: + deprecated: true + items: + - const: pipe0 + + "#clock-cells": + const: 0 + + clock-output-names: + maxItems: 1 + + "#phy-cells": + const: 0 + + required: + - reg + - clocks + - "#clock-cells" + - clock-output-names + - "#phy-cells" + + additionalProperties: false + +required: + - compatible + - reg + - "#address-cells" + - "#size-cells" + - ranges + - clocks + - clock-names + - resets + - reset-names + - vdda-phy-supply + - vdda-pll-supply + +additionalProperties: false + +allOf: + - if: + properties: + compatible: + contains: + enum: + - qcom,sc7180-qmp-usb3-phy + then: + properties: + clocks: + maxItems: 4 + clock-names: + items: + - const: aux + - const: cfg_ahb + - const: ref + - const: com_aux + resets: + maxItems: 1 + reset-names: + items: + - const: phy + + - if: + properties: + compatible: + contains: + enum: + - qcom,sdm845-qmp-usb3-uni-phy + then: + properties: + clocks: + maxItems: 4 + clock-names: + items: + - const: aux + - const: cfg_ahb + - const: ref + - const: com_aux + resets: + maxItems: 2 + reset-names: + items: + - const: phy + - const: common + + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq8074-qmp-usb3-phy + - qcom,msm8996-qmp-usb3-phy + - qcom,msm8998-qmp-usb3-phy + - qcom,sdx55-qmp-usb3-uni-phy + - qcom,sdx65-qmp-usb3-uni-phy + then: + properties: + clocks: + maxItems: 3 + clock-names: + items: + - const: aux + - const: cfg_ahb + - const: ref + resets: + maxItems: 2 + reset-names: + items: + - const: phy + - const: common + + - if: + properties: + compatible: + contains: + enum: + - qcom,sc8280xp-qmp-usb3-uni-phy + - qcom,sm8150-qmp-usb3-phy + - qcom,sm8150-qmp-usb3-uni-phy + - qcom,sm8250-qmp-usb3-uni-phy + - qcom,sm8350-qmp-usb3-uni-phy + then: + properties: + clocks: + maxItems: 4 + clock-names: + items: + - const: aux + - const: ref_clk_src + - const: ref + - const: com_aux + resets: + maxItems: 2 + reset-names: + items: + - const: phy + - const: common + + - if: + properties: + compatible: + contains: + enum: + - qcom,sm8250-qmp-usb3-phy + - qcom,sm8350-qmp-usb3-phy + then: + properties: + clocks: + maxItems: 3 + clock-names: + items: + - const: aux + - const: ref_clk_src + - const: com_aux + resets: + maxItems: 2 + reset-names: + items: + - const: phy + - const: common + + - if: + properties: + compatible: + contains: + enum: + - qcom,qcm2290-qmp-usb3-phy + then: + properties: + clocks: + maxItems: 3 + clock-names: + items: + - const: cfg_ahb + - const: ref + - const: com_aux + resets: + maxItems: 2 + reset-names: + items: + - const: phy_phy + - const: phy + + - if: + properties: + compatible: + contains: + enum: + - qcom,sc8280xp-qmp-usb3-uni-phy + then: + required: + - power-domains + + - if: + properties: + compatible: + contains: + enum: + - qcom,sdm845-qmp-usb3-phy + - qcom,sm8150-qmp-usb3-phy + - qcom,sm8350-qmp-usb3-phy + - qcom,sm8450-qmp-usb3-phy + then: + patternProperties: + "^phy@[0-9a-f]+$": + properties: + reg: + items: + - description: TX lane 1 + - description: RX lane 1 + - description: PCS + - description: TX lane 2 + - description: RX lane 2 + - description: PCS_MISC + + - if: + properties: + compatible: + contains: + enum: + - qcom,msm8998-qmp-usb3-phy + then: + patternProperties: + "^phy@[0-9a-f]+$": + properties: + reg: + items: + - description: TX lane 1 + - description: RX lane 1 + - description: PCS + - description: TX lane 2 + - description: RX lane 2 + + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq6018-qmp-usb3-phy + - qcom,ipq8074-qmp-usb3-phy + - qcom,qcm2290-qmp-usb3-phy + - qcom,sc7180-qmp-usb3-phy + - qcom,sc8180x-qmp-usb3-phy + - qcom,sdx55-qmp-usb3-uni-phy + - qcom,sdx65-qmp-usb3-uni-phy + - qcom,sm8150-qmp-usb3-uni-phy + - qcom,sm8250-qmp-usb3-phy + then: + patternProperties: + "^phy@[0-9a-f]+$": + properties: + reg: + items: + - description: TX + - description: RX + - description: PCS + - description: PCS_MISC + + - if: + properties: + compatible: + contains: + enum: + - qcom,msm8996-qmp-usb3-phy + - qcom,sc8280xp-qmp-usb3-uni-phy + - qcom,sm8250-qmp-usb3-uni-phy + - qcom,sm8350-qmp-usb3-uni-phy + then: + patternProperties: + "^phy@[0-9a-f]+$": + properties: + reg: + items: + - description: TX + - description: RX + - description: PCS + +examples: + - | + #include <dt-bindings/clock/qcom,gcc-sdm845.h> + usb_2_qmpphy: phy-wrapper@88eb000 { + compatible = "qcom,sdm845-qmp-usb3-uni-phy"; + reg = <0x088eb000 0x18c>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x088eb000 0x2000>; + + clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK >, + <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>, + <&gcc GCC_USB3_SEC_CLKREF_CLK>, + <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>; + clock-names = "aux", "cfg_ahb", "ref", "com_aux"; + + resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>, + <&gcc GCC_USB3_PHY_SEC_BCR>; + reset-names = "phy", "common"; + + vdda-phy-supply = <&vdda_usb2_ss_1p2>; + vdda-pll-supply = <&vdda_usb2_ss_core>; + + usb_2_ssphy: phy@200 { + reg = <0x200 0x128>, + <0x400 0x1fc>, + <0x800 0x218>, + <0x600 0x70>; + + clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>; + + #clock-cells = <0>; + clock-output-names = "usb3_uni_phy_pipe_clk_src"; + + #phy-cells = <0>; + }; + }; diff --git a/Documentation/devicetree/bindings/phy/qcom,qmp-usb3-dp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,qmp-usb3-dp-phy.yaml index b078009ed509..97a7ecafbf85 100644 --- a/Documentation/devicetree/bindings/phy/qcom,qmp-usb3-dp-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,qmp-usb3-dp-phy.yaml @@ -16,6 +16,7 @@ properties: - qcom,sc7180-qmp-usb3-dp-phy - qcom,sc7280-qmp-usb3-dp-phy - qcom,sc8180x-qmp-usb3-dp-phy + - qcom,sc8280xp-qmp-usb43dp-phy - qcom,sdm845-qmp-usb3-dp-phy - qcom,sm8250-qmp-usb3-dp-phy reg: @@ -30,9 +31,6 @@ properties: - const: dp_com - const: dp - "#clock-cells": - enum: [ 1, 2 ] - "#address-cells": enum: [ 1, 2 ] @@ -55,6 +53,9 @@ properties: - const: ref - const: com_aux + power-domains: + maxItems: 1 + resets: items: - description: reset of phy block. @@ -81,6 +82,7 @@ properties: patternProperties: "^usb3-phy@[0-9a-f]+$": type: object + additionalProperties: false description: The USB3 PHY. @@ -99,6 +101,7 @@ patternProperties: - description: pipe clock clock-names: + deprecated: true items: - const: pipe0 @@ -115,12 +118,12 @@ patternProperties: required: - reg - clocks - - clock-names - '#clock-cells' - '#phy-cells' "^dp-phy@[0-9a-f]+$": type: object + additionalProperties: false description: The DP PHY. @@ -147,7 +150,6 @@ patternProperties: required: - compatible - reg - - "#clock-cells" - "#address-cells" - "#size-cells" - ranges @@ -160,6 +162,17 @@ required: additionalProperties: false +allOf: + - if: + properties: + compatible: + contains: + enum: + - qcom,sc8280xp-qmp-usb43dp-phy + then: + required: + - power-domains + examples: - | #include <dt-bindings/clock/qcom,gcc-sdm845.h> @@ -169,7 +182,6 @@ examples: <0x088e8000 0x10>, <0x088ea000 0x40>; reg-names = "usb", "dp_com", "dp"; - #clock-cells = <1>; #address-cells = <1>; #size-cells = <1>; ranges = <0x0 0x088e9000 0x2000>; @@ -197,7 +209,6 @@ examples: #clock-cells = <0>; #phy-cells = <0>; clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; - clock-names = "pipe0"; clock-output-names = "usb3_phy_pipe_clk_src"; }; diff --git a/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml index d68ab49345b8..636ea430fbff 100644 --- a/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml @@ -30,6 +30,7 @@ properties: - items: - enum: - qcom,sc7180-qusb2-phy + - qcom,sdm670-qusb2-phy - qcom,sdm845-qusb2-phy - qcom,sm6350-qusb2-phy - const: qcom,qusb2-v2-phy diff --git a/Documentation/devicetree/bindings/phy/qcom,usb-snps-femto-v2.yaml b/Documentation/devicetree/bindings/phy/qcom,usb-snps-femto-v2.yaml index 7a0e6a9854da..68e70961beb2 100644 --- a/Documentation/devicetree/bindings/phy/qcom,usb-snps-femto-v2.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,usb-snps-femto-v2.yaml @@ -20,6 +20,7 @@ properties: - qcom,sc7280-usb-hs-phy - qcom,sc8180x-usb-hs-phy - qcom,sc8280xp-usb-hs-phy + - qcom,sm6375-usb-hs-phy - qcom,sm8150-usb-hs-phy - qcom,sm8250-usb-hs-phy - qcom,sm8350-usb-hs-phy @@ -53,6 +54,94 @@ properties: vdda33-supply: description: phandle to the regulator 3.3V supply node. + qcom,hs-disconnect-bp: + description: + This adjusts the voltage level for the threshold used to + detect a disconnect event at the host. + The hardware accepts only discrete values. The value closest to the + provided input will be chosen as the override value for this param. + minimum: -272 + maximum: 2156 + + qcom,squelch-detector-bp: + description: + This adjusts the voltage level for the threshold used to + detect valid high-speed data. + The hardware accepts only discrete values. The value closest to the + provided input will be chosen as the override value for this param. + minimum: -2090 + maximum: 1590 + + qcom,hs-amplitude-bp: + description: + This adjusts the high-speed DC level voltage. + The hardware accepts only discrete values. The value closest to the + provided input will be chosen as the override value for this param. + minimum: -660 + maximum: 2670 + + qcom,pre-emphasis-duration-bp: + description: + This signal controls the duration for which the + HS pre-emphasis current is sourced onto DP<#> or DM<#>. + The HS Transmitter pre-emphasis duration is defined in terms of + unit amounts. One unit of pre-emphasis duration is approximately + 650 ps and is defined as 1X pre-emphasis duration. + The hardware accepts only discrete values. The value closest to the + provided input will be chosen as the override value for this param. + minimum: 10000 + maximum: 20000 + + qcom,pre-emphasis-amplitude-bp: + description: + This signal controls the amount of current sourced to + DP<#> and DM<#> after a J-to-K or K-to-J transition. + The HS Transmitter pre-emphasis current is defined in terms of unit + amounts. One unit amount is approximately 2 mA and is defined as + 1X pre-emphasis current. + The hardware accepts only discrete values. The value closest to the + provided input will be chosen as the override value for this param. + minimum: 10000 + maximum: 40000 + + qcom,hs-rise-fall-time-bp: + description: + This adjusts the rise/fall times of the high-speed waveform. + The hardware accepts only discrete values. The value closest to the + provided input will be chosen as the override value for this param. + minimum: -4100 + maximum: 5430 + + qcom,hs-crossover-voltage-microvolt: + description: + This adjusts the voltage at which the DP<#> and DM<#> + signals cross while transmitting in HS mode. + The hardware accepts only discrete values. The value closest to the + provided input will be chosen as the override value for this param. + minimum: -31000 + maximum: 28000 + + qcom,hs-output-impedance-micro-ohms: + description: + In some applications, there can be significant series resistance + on the D+ and D- paths between the transceiver and cable. This adjusts + the driver source impedance to compensate for added series + resistance on the USB. The hardware accepts only discrete values. The + value closest to the provided input will be chosen as the override value + for this param. + minimum: -2300000 + maximum: 6100000 + + qcom,ls-fs-output-impedance-bp: + description: + This adjusts the low- and full-speed single-ended source + impedance while driving high. The following adjustment values are based + on nominal process, voltage, and temperature. + The hardware accepts only discrete values. The value closest to the + provided input will be chosen as the override value for this param. + minimum: -1053 + maximum: 1310 + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt b/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt deleted file mode 100644 index a3bd1c4499b7..000000000000 --- a/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt +++ /dev/null @@ -1,112 +0,0 @@ -* Renesas R-Car generation 2 USB PHY - -This file provides information on what the device node for the R-Car generation -2 USB PHY contains. - -Required properties: -- compatible: "renesas,usb-phy-r8a7742" if the device is a part of R8A7742 SoC. - "renesas,usb-phy-r8a7743" if the device is a part of R8A7743 SoC. - "renesas,usb-phy-r8a7744" if the device is a part of R8A7744 SoC. - "renesas,usb-phy-r8a7745" if the device is a part of R8A7745 SoC. - "renesas,usb-phy-r8a77470" if the device is a part of R8A77470 SoC. - "renesas,usb-phy-r8a7790" if the device is a part of R8A7790 SoC. - "renesas,usb-phy-r8a7791" if the device is a part of R8A7791 SoC. - "renesas,usb-phy-r8a7794" if the device is a part of R8A7794 SoC. - "renesas,rcar-gen2-usb-phy" for a generic R-Car Gen2 or - RZ/G1 compatible device. - - When compatible with the generic version, nodes must list the - SoC-specific version corresponding to the platform first - followed by the generic version. - -- reg: offset and length of the register block. -- #address-cells: number of address cells for the USB channel subnodes, must - be <1>. -- #size-cells: number of size cells for the USB channel subnodes, must be <0>. -- clocks: clock phandle and specifier pair. -- clock-names: string, clock input name, must be "usbhs". - -The USB PHY device tree node should have the subnodes corresponding to the USB -channels. These subnodes must contain the following properties: -- reg: the USB controller selector; see the table below for the values. -- #phy-cells: see phy-bindings.txt in the same directory, must be <1>. - -The phandle's argument in the PHY specifier is the USB controller selector for -the USB channel other than r8a77470 SoC; see the selector meanings below: - -+-----------+---------------+---------------+ -|\ Selector | | | -+ --------- + 0 | 1 | -| Channel \| | | -+-----------+---------------+---------------+ -| 0 | PCI EHCI/OHCI | HS-USB | -| 2 | PCI EHCI/OHCI | xHCI | -+-----------+---------------+---------------+ - -For r8a77470 SoC;see the selector meaning below: - -+-----------+---------------+---------------+ -|\ Selector | | | -+ --------- + 0 | 1 | -| Channel \| | | -+-----------+---------------+---------------+ -| 0 | EHCI/OHCI | HS-USB | -+-----------+---------------+---------------+ - -Example (Lager board): - - usb-phy@e6590100 { - compatible = "renesas,usb-phy-r8a7790", "renesas,rcar-gen2-usb-phy"; - reg = <0 0xe6590100 0 0x100>; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&cpg CPG_MOD 704>; - clock-names = "usbhs"; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 704>; - - usb0: usb-channel@0 { - reg = <0>; - #phy-cells = <1>; - }; - usb2: usb-channel@2 { - reg = <2>; - #phy-cells = <1>; - }; - }; - -Example (iWave RZ/G1C sbc): - - usbphy0: usb-phy0@e6590100 { - compatible = "renesas,usb-phy-r8a77470", - "renesas,rcar-gen2-usb-phy"; - reg = <0 0xe6590100 0 0x100>; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&cpg CPG_MOD 704>; - clock-names = "usbhs"; - power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; - resets = <&cpg 704>; - - usb0: usb-channel@0 { - reg = <0>; - #phy-cells = <1>; - }; - }; - - usbphy1: usb-phy@e6598100 { - compatible = "renesas,usb-phy-r8a77470", - "renesas,rcar-gen2-usb-phy"; - reg = <0 0xe6598100 0 0x100>; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&cpg CPG_MOD 706>; - clock-names = "usbhs"; - power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; - resets = <&cpg 706>; - - usb1: usb-channel@0 { - reg = <0>; - #phy-cells = <1>; - }; - }; diff --git a/Documentation/devicetree/bindings/phy/renesas,rcar-gen2-usb-phy.yaml b/Documentation/devicetree/bindings/phy/renesas,rcar-gen2-usb-phy.yaml new file mode 100644 index 000000000000..afc09f39b02b --- /dev/null +++ b/Documentation/devicetree/bindings/phy/renesas,rcar-gen2-usb-phy.yaml @@ -0,0 +1,123 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/renesas,rcar-gen2-usb-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas R-Car Gen2 USB PHY + +maintainers: + - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> + +properties: + compatible: + items: + - enum: + - renesas,usb-phy-r8a7742 # RZ/G1H + - renesas,usb-phy-r8a7743 # RZ/G1M + - renesas,usb-phy-r8a7744 # RZ/G1N + - renesas,usb-phy-r8a7745 # RZ/G1E + - renesas,usb-phy-r8a77470 # RZ/G1C + - renesas,usb-phy-r8a7790 # R-Car H2 + - renesas,usb-phy-r8a7791 # R-Car M2-W + - renesas,usb-phy-r8a7794 # R-Car E2 + - const: renesas,rcar-gen2-usb-phy # R-Car Gen2 or RZ/G1 + + reg: + maxItems: 1 + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: usbhs + + power-domains: + maxItems: 1 + + resets: + maxItems: 1 + +patternProperties: + "^usb-phy@[02]$": + type: object + description: Subnode corresponding to a USB channel. + + properties: + reg: + description: FIXME RZ/G1C supports channel 0 only + enum: [0, 2] + + '#phy-cells': + description: | + The phandle's argument in the PHY specifier is the USB controller + selector for the USB channel. + For RZ/G1C: + - 0 for EHCI/OHCI + - 1 for HS-USB + For all other SoCS: + - 0 for PCI EHCI/OHCI + - 1 for HS-USB (channel 0) or xHCI (channel 2) + const: 1 + + required: + - reg + - '#phy-cells' + + additionalProperties: false + +required: + - compatible + - reg + - '#address-cells' + - '#size-cells' + - clocks + - clock-names + - resets + - power-domains + - usb-phy@0 + +if: + properties: + compatible: + contains: + const: renesas,usb-phy-r8a77470 +then: + properties: + usb-phy@2: false +else: + required: + - usb-phy@2 + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/r8a7790-cpg-mssr.h> + #include <dt-bindings/power/r8a7790-sysc.h> + usb-phy-controller@e6590100 { + compatible = "renesas,usb-phy-r8a7790", "renesas,rcar-gen2-usb-phy"; + reg = <0xe6590100 0x100>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&cpg CPG_MOD 704>; + clock-names = "usbhs"; + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; + resets = <&cpg 704>; + + usb0: usb-phy@0 { + reg = <0>; + #phy-cells = <1>; + }; + usb2: usb-phy@2 { + reg = <2>; + #phy-cells = <1>; + }; + }; diff --git a/Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml b/Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml new file mode 100644 index 000000000000..9f2d8d2cc7a5 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml @@ -0,0 +1,80 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/rockchip,pcie3-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip PCIe v3 phy + +maintainers: + - Heiko Stuebner <heiko@sntech.de> + +properties: + compatible: + enum: + - rockchip,rk3568-pcie3-phy + + reg: + maxItems: 1 + + clocks: + minItems: 3 + maxItems: 3 + + clock-names: + items: + - const: refclk_m + - const: refclk_n + - const: pclk + + data-lanes: + description: which lanes (by position) should be mapped to which + controller (value). 0 means lane disabled, higher value means used. + (controller-number +1 ) + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 2 + maxItems: 16 + items: + minimum: 0 + maximum: 16 + + "#phy-cells": + const: 0 + + resets: + maxItems: 1 + + reset-names: + const: phy + + rockchip,phy-grf: + $ref: /schemas/types.yaml#/definitions/phandle + description: phandle to the syscon managing the phy "general register files" + + rockchip,pipe-grf: + $ref: /schemas/types.yaml#/definitions/phandle + description: phandle to the syscon managing the pipe "general register files" + +required: + - compatible + - reg + - rockchip,phy-grf + - "#phy-cells" + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/rk3568-cru.h> + pcie30phy: phy@fe8c0000 { + compatible = "rockchip,rk3568-pcie3-phy"; + reg = <0xfe8c0000 0x20000>; + #phy-cells = <0>; + clocks = <&pmucru CLK_PCIE30PHY_REF_M>, + <&pmucru CLK_PCIE30PHY_REF_N>, + <&cru PCLK_PCIE30PHY>; + clock-names = "refclk_m", "refclk_n", "pclk"; + resets = <&cru SRST_PCIE30PHY>; + reset-names = "phy"; + rockchip,phy-grf = <&pcie30_phy_grf>; + }; diff --git a/Documentation/devicetree/bindings/phy/rockchip,px30-dsi-dphy.yaml b/Documentation/devicetree/bindings/phy/rockchip,px30-dsi-dphy.yaml index 8a3032a3bd73..5c35e5ceec0b 100644 --- a/Documentation/devicetree/bindings/phy/rockchip,px30-dsi-dphy.yaml +++ b/Documentation/devicetree/bindings/phy/rockchip,px30-dsi-dphy.yaml @@ -18,6 +18,7 @@ properties: - rockchip,px30-dsi-dphy - rockchip,rk3128-dsi-dphy - rockchip,rk3368-dsi-dphy + - rockchip,rk3568-dsi-dphy reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml b/Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml index bb4a2e4b8ab0..0e6505e9da50 100644 --- a/Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml +++ b/Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/phy/rockchip-inno-csi-dphy.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Rockchip SoC MIPI RX0 D-PHY Device Tree Bindings +title: Rockchip SoC MIPI RX0 D-PHY maintainers: - Heiko Stuebner <heiko@sntech.de> @@ -20,6 +20,7 @@ properties: - rockchip,rk1808-csi-dphy - rockchip,rk3326-csi-dphy - rockchip,rk3368-csi-dphy + - rockchip,rk3568-csi-dphy reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx0.yaml b/Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx0.yaml index 7d888d358823..5114e99b0035 100644 --- a/Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx0.yaml +++ b/Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx0.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/phy/rockchip-mipi-dphy-rx0.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Rockchip SoC MIPI RX0 D-PHY Device Tree Bindings +title: Rockchip SoC MIPI RX0 D-PHY maintainers: - Helen Koike <helen.koike@collabora.com> diff --git a/Documentation/devicetree/bindings/phy/samsung,exynos-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,exynos-pcie-phy.yaml index ac0af40be52d..28e299a9609d 100644 --- a/Documentation/devicetree/bindings/phy/samsung,exynos-pcie-phy.yaml +++ b/Documentation/devicetree/bindings/phy/samsung,exynos-pcie-phy.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/phy/samsung,exynos-pcie-phy.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Samsung SoC series PCIe PHY Device Tree Bindings +title: Samsung SoC series PCIe PHY maintainers: - Marek Szyprowski <m.szyprowski@samsung.com> diff --git a/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml index 8da99461e817..c5dbb91ac402 100644 --- a/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml +++ b/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/phy/samsung,ufs-phy.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Samsung SoC series UFS PHY Device Tree Bindings +title: Samsung SoC series UFS PHY maintainers: - Alim Akhtar <alim.akhtar@samsung.com> @@ -27,18 +27,12 @@ properties: - const: phy-pma clocks: - items: - - description: PLL reference clock - - description: symbol clock for input symbol ( rx0-ch0 symbol clock) - - description: symbol clock for input symbol ( rx1-ch1 symbol clock) - - description: symbol clock for output symbol ( tx0 symbol clock) + minItems: 1 + maxItems: 4 clock-names: - items: - - const: ref_clk - - const: rx1_symbol_clk - - const: rx0_symbol_clk - - const: tx0_symbol_clk + minItems: 1 + maxItems: 4 samsung,pmu-syscon: $ref: '/schemas/types.yaml#/definitions/phandle-array' @@ -62,6 +56,39 @@ required: - clock-names - samsung,pmu-syscon +allOf: + - if: + properties: + compatible: + contains: + const: samsung,exynos7-ufs-phy + + then: + properties: + clocks: + items: + - description: PLL reference clock + - description: symbol clock for input symbol (rx0-ch0 symbol clock) + - description: symbol clock for input symbol (rx1-ch1 symbol clock) + - description: symbol clock for output symbol (tx0 symbol clock) + + clock-names: + items: + - const: ref_clk + - const: rx1_symbol_clk + - const: rx0_symbol_clk + - const: tx0_symbol_clk + + else: + properties: + clocks: + items: + - description: PLL reference clock + + clock-names: + items: + - const: ref_clk + additionalProperties: false examples: diff --git a/Documentation/devicetree/bindings/phy/sunplus,sp7021-usb2-phy.yaml b/Documentation/devicetree/bindings/phy/sunplus,sp7021-usb2-phy.yaml new file mode 100644 index 000000000000..069d422775bb --- /dev/null +++ b/Documentation/devicetree/bindings/phy/sunplus,sp7021-usb2-phy.yaml @@ -0,0 +1,73 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (C) Sunplus Co., Ltd. 2021 +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/phy/sunplus,sp7021-usb2-phy.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Sunplus SP7021 USB 2.0 PHY Controller + +maintainers: + - Vincent Shih <vincent.sunplus@gmail.com> + +properties: + compatible: + const: sunplus,sp7021-usb2-phy + + reg: + items: + - description: UPHY register region + - description: MOON4 register region + + reg-names: + items: + - const: phy + - const: moon4 + + clocks: + maxItems: 1 + + resets: + maxItems: 1 + + "#phy-cells": + const: 0 + + nvmem-cell-names: + description: names corresponding to the nvmem cells of disconnect voltage + const: disc_vol + + nvmem-cells: + description: nvmem cell address of disconnect voltage + maxItems: 1 + + sunplus,disc-vol-addr-off: + $ref: /schemas/types.yaml#/definitions/uint32 + description: the otp address offset of disconnect voltage + +required: + - compatible + - reg + - reg-names + - clocks + - resets + - "#phy-cells" + - nvmem-cell-names + - nvmem-cells + - sunplus,disc-vol-addr-off + +additionalProperties: false + +examples: + - | + sp_uphy0: usb-phy@9c004a80 { + compatible = "sunplus,sp7021-usb2-phy"; + reg = <0x9c004a80 0x80>, <0x9c000248 0x10>; + reg-names = "phy", "moon4"; + clocks = <&clkc 0x3d>; + resets = <&rstc 0x2d>; + #phy-cells = <0>; + nvmem-cell-names = "disc_vol"; + nvmem-cells = <&disc_vol>; + sunplus,disc-vol-addr-off = <0>; + }; diff --git a/Documentation/devicetree/bindings/phy/ti,phy-gmii-sel.yaml b/Documentation/devicetree/bindings/phy/ti,phy-gmii-sel.yaml index ff8a6d9eb153..da7cac537e15 100644 --- a/Documentation/devicetree/bindings/phy/ti,phy-gmii-sel.yaml +++ b/Documentation/devicetree/bindings/phy/ti,phy-gmii-sel.yaml @@ -53,12 +53,25 @@ properties: - ti,am43xx-phy-gmii-sel - ti,dm814-phy-gmii-sel - ti,am654-phy-gmii-sel + - ti,j7200-cpsw5g-phy-gmii-sel reg: maxItems: 1 '#phy-cells': true + ti,qsgmii-main-ports: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: | + Required only for QSGMII mode. Array to select the port for + QSGMII main mode. Rest of the ports are selected as QSGMII_SUB + ports automatically. Any one of the 4 CPSW5G ports can act as the + main port with the rest of them being the QSGMII_SUB ports. + maxItems: 1 + items: + minimum: 1 + maximum: 4 + allOf: - if: properties: @@ -73,6 +86,18 @@ allOf: '#phy-cells': const: 1 description: CPSW port number (starting from 1) + + - if: + not: + properties: + compatible: + contains: + enum: + - ti,j7200-cpsw5g-phy-gmii-sel + then: + properties: + ti,qsgmii-main-ports: false + - if: properties: compatible: @@ -97,7 +122,7 @@ additionalProperties: false examples: - | - phy_gmii_sel: phy-gmii-sel@650 { + phy_gmii_sel: phy@650 { compatible = "ti,am3352-phy-gmii-sel"; reg = <0x650 0x4>; #phy-cells = <2>; diff --git a/Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml b/Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml index dcd63908aeae..2225925b6dad 100644 --- a/Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml +++ b/Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml @@ -16,19 +16,23 @@ properties: - ti,j721e-wiz-16g - ti,j721e-wiz-10g - ti,am64-wiz-10g + - ti,j7200-wiz-10g power-domains: maxItems: 1 clocks: - maxItems: 3 + minItems: 3 + maxItems: 4 description: clock-specifier to represent input to the WIZ clock-names: + minItems: 3 items: - const: fck - const: core_ref_clk - const: ext_ref_clk + - const: core_ref1_clk num-lanes: minimum: 1 @@ -79,10 +83,12 @@ properties: refclk-dig: type: object + additionalProperties: false description: | WIZ node should have subnode for refclk_dig to select the reference clock source for the reference clock used in the PHY and PMA digital logic. + deprecated: true properties: clocks: minItems: 2 @@ -105,12 +111,19 @@ properties: - assigned-clocks - assigned-clock-parents + ti,scm: + $ref: /schemas/types.yaml#/definitions/phandle + description: | + phandle to System Control Module for syscon regmap access. + patternProperties: "^pll[0|1]-refclk$": type: object + additionalProperties: false description: | WIZ node should have subnodes for each of the PLLs present in the SERDES. + deprecated: true properties: clocks: maxItems: 2 @@ -133,9 +146,11 @@ patternProperties: "^cmn-refclk1?-dig-div$": type: object + additionalProperties: false description: WIZ node should have subnodes for each of the PMA common refclock provided by the SERDES. + deprecated: true properties: clocks: maxItems: 1 @@ -170,6 +185,16 @@ required: - "#reset-cells" - ranges +allOf: + - if: + properties: + compatible: + contains: + const: ti,j7200-wiz-10g + then: + required: + - ti,scm + additionalProperties: false examples: diff --git a/Documentation/devicetree/bindings/phy/xlnx,zynqmp-psgtr.yaml b/Documentation/devicetree/bindings/phy/xlnx,zynqmp-psgtr.yaml index 79906519c652..cefbc8b53a83 100644 --- a/Documentation/devicetree/bindings/phy/xlnx,zynqmp-psgtr.yaml +++ b/Documentation/devicetree/bindings/phy/xlnx,zynqmp-psgtr.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/phy/xlnx,zynqmp-psgtr.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Xilinx ZynqMP Gigabit Transceiver PHY Device Tree Bindings +title: Xilinx ZynqMP Gigabit Transceiver PHY maintainers: - Laurent Pinchart <laurent.pinchart@ideasonboard.com> diff --git a/Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml index d19d65c870aa..1e3c8de6cae1 100644 --- a/Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/pinctrl/allwinner,sun4i-a10-pinctrl.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 Pin Controller Device Tree Bindings +title: Allwinner A10 Pin Controller maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml index d3a8911728d0..f4f1ee6b116e 100644 --- a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml @@ -63,6 +63,12 @@ examples: syscon: scu@1e6e2000 { compatible = "aspeed,ast2400-scu", "syscon", "simple-mfd"; reg = <0x1e6e2000 0x1a8>; + #clock-cells = <1>; + #reset-cells = <1>; + + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x1e6e2000 0x1000>; pinctrl: pinctrl { compatible = "aspeed,ast2400-pinctrl"; diff --git a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml index 5d2c1b1fb7fd..8168f0088471 100644 --- a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml @@ -82,6 +82,10 @@ examples: #clock-cells = <1>; #reset-cells = <1>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x1e6e2000 0x1000>; + pinctrl: pinctrl { compatible = "aspeed,ast2500-pinctrl"; aspeed,external-nodes = <&gfx>, <&lhc>; diff --git a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2600-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2600-pinctrl.yaml index e92686d2f062..62424c42c981 100644 --- a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2600-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2600-pinctrl.yaml @@ -96,6 +96,12 @@ examples: syscon: scu@1e6e2000 { compatible = "aspeed,ast2600-scu", "syscon", "simple-mfd"; reg = <0x1e6e2000 0xf6c>; + #clock-cells = <1>; + #reset-cells = <1>; + + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x1e6e2000 0x1000>; pinctrl: pinctrl { compatible = "aspeed,ast2600-pinctrl"; diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,bcm4908-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/brcm,bcm4908-pinctrl.yaml index 175a992f15e1..8a9fb9b433ca 100644 --- a/Documentation/devicetree/bindings/pinctrl/brcm,bcm4908-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm4908-pinctrl.yaml @@ -23,6 +23,7 @@ patternProperties: '-pins$': type: object $ref: pinmux-node.yaml# + additionalProperties: false properties: function: diff --git a/Documentation/devicetree/bindings/pinctrl/canaan,k210-fpioa.yaml b/Documentation/devicetree/bindings/pinctrl/canaan,k210-fpioa.yaml index 533b4cfe33d2..a78cb2796001 100644 --- a/Documentation/devicetree/bindings/pinctrl/canaan,k210-fpioa.yaml +++ b/Documentation/devicetree/bindings/pinctrl/canaan,k210-fpioa.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/pinctrl/canaan,k210-fpioa.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Canaan Kendryte K210 FPIOA Device Tree Bindings +title: Canaan Kendryte K210 FPIOA maintainers: - Damien Le Moal <damien.lemoal@wdc.com> diff --git a/Documentation/devicetree/bindings/pinctrl/cypress,cy8c95x0.yaml b/Documentation/devicetree/bindings/pinctrl/cypress,cy8c95x0.yaml new file mode 100644 index 000000000000..915cbbcc3555 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/cypress,cy8c95x0.yaml @@ -0,0 +1,134 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/cypress,cy8c95x0.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Cypress CY8C95X0 I2C GPIO expander + +maintainers: + - Patrick Rudolph <patrick.rudolph@9elements.com> + +description: | + This supports the 20/40/60 pin Cypress CYC95x0 GPIO I2C expanders. + Pin function configuration is performed on a per-pin basis. + +properties: + compatible: + enum: + - cypress,cy8c9520 + - cypress,cy8c9540 + - cypress,cy8c9560 + + reg: + maxItems: 1 + + gpio-controller: true + + '#gpio-cells': + description: + The first cell is the GPIO number and the second cell specifies GPIO + flags, as defined in <dt-bindings/gpio/gpio.h>. + const: 2 + + interrupts: + maxItems: 1 + + interrupt-controller: true + + '#interrupt-cells': + const: 2 + + gpio-line-names: true + + gpio-ranges: + maxItems: 1 + + gpio-reserved-ranges: + maxItems: 1 + + vdd-supply: + description: + Optional power supply. + +patternProperties: + '-pins$': + type: object + description: + Pinctrl node's client devices use subnodes for desired pin configuration. + Client device subnodes use below standard properties. + $ref: pincfg-node.yaml# + + properties: + pins: + description: + List of gpio pins affected by the properties specified in this + subnode. + items: + pattern: '^gp([0-7][0-7])$' + minItems: 1 + maxItems: 60 + + function: + description: + Specify the alternative function to be configured for the specified + pins. + enum: [ gpio, pwm ] + + bias-pull-down: true + + bias-pull-up: true + + bias-disable: true + + output-high: true + + output-low: true + + drive-push-pull: true + + drive-open-drain: true + + drive-open-source: true + + required: + - pins + - function + + additionalProperties: false + +required: + - compatible + - reg + - interrupts + - interrupt-controller + - '#interrupt-cells' + - gpio-controller + - '#gpio-cells' + +additionalProperties: false + +allOf: + - $ref: "pinctrl.yaml#" + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + pinctrl@20 { + compatible = "cypress,cy8c9520"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + #interrupt-cells = <2>; + interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + vdd-supply = <&p3v3>; + gpio-reserved-ranges = <5 1>; + }; + }; diff --git a/Documentation/devicetree/bindings/pinctrl/intel,pinctrl-keembay.yaml b/Documentation/devicetree/bindings/pinctrl/intel,pinctrl-keembay.yaml index 5e99d79499b4..005d95a9e4d6 100644 --- a/Documentation/devicetree/bindings/pinctrl/intel,pinctrl-keembay.yaml +++ b/Documentation/devicetree/bindings/pinctrl/intel,pinctrl-keembay.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/pinctrl/intel,pinctrl-keembay.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Intel Keem Bay pin controller Device Tree Bindings +title: Intel Keem Bay pin controller maintainers: - Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com> @@ -44,6 +44,7 @@ properties: patternProperties: '^gpio@[0-9a-f]*$': type: object + additionalProperties: false description: Child nodes can be specified to contain pin configuration information, diff --git a/Documentation/devicetree/bindings/pinctrl/intel,pinctrl-thunderbay.yaml b/Documentation/devicetree/bindings/pinctrl/intel,pinctrl-thunderbay.yaml index 0ec476248f21..f001add16814 100644 --- a/Documentation/devicetree/bindings/pinctrl/intel,pinctrl-thunderbay.yaml +++ b/Documentation/devicetree/bindings/pinctrl/intel,pinctrl-thunderbay.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/pinctrl/intel,pinctrl-thunderbay.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Intel Thunder Bay pin controller Device Tree Bindings +title: Intel Thunder Bay pin controller maintainers: - Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com> @@ -42,6 +42,7 @@ properties: patternProperties: '^gpio@[0-9a-f]*$': type: object + additionalProperties: false description: Child nodes can be specified to contain pin configuration information, diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,ac5-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/marvell,ac5-pinctrl.yaml index a651b2744caf..491f67e7cc4f 100644 --- a/Documentation/devicetree/bindings/pinctrl/marvell,ac5-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/marvell,ac5-pinctrl.yaml @@ -24,6 +24,7 @@ patternProperties: '-pins$': type: object $ref: pinmux-node.yaml# + additionalProperties: false properties: marvell,function: diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml index 161088a8be33..33b5f79e741a 100644 --- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/pinctrl/mediatek,mt65xx-pinctrl.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Mediatek MT65xx Pin Controller Device Tree Bindings +title: Mediatek MT65xx Pin Controller maintainers: - Sean Wang <sean.wang@kernel.org> diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml index e7601c0f5a69..8c79fcef7c52 100644 --- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/pinctrl/mediatek,mt6779-pinctrl.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Mediatek MT6779 Pin Controller Device Tree Bindings +title: Mediatek MT6779 Pin Controller maintainers: - Andy Teng <andy.teng@mediatek.com> @@ -76,6 +76,8 @@ required: patternProperties: '-[0-9]*$': type: object + additionalProperties: false + patternProperties: '-pins*$': type: object diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt6797-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt6797-pinctrl.yaml index d42215f59afd..637a8386e23e 100644 --- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt6797-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt6797-pinctrl.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/pinctrl/mediatek,mt6797-pinctrl.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Mediatek MT6797 Pin Controller Device Tree Bindings +title: Mediatek MT6797 Pin Controller maintainers: - Sean Wang <sean.wang@kernel.org> diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml index 78a0175cecc7..c9ea0cad489b 100644 --- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/pinctrl/mediatek,mt7622-pinctrl.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Mediatek MT7622 Pin Controller Device Tree Bindings +title: Mediatek MT7622 Pin Controller maintainers: - Sean Wang <sean.wang@kernel.org> diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml index 4eadea55df10..89b8f3dd67a1 100644 --- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/pinctrl/mediatek,mt7986-pinctrl.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Mediatek MT7986 Pin Controller Device Tree Bindings +title: Mediatek MT7986 Pin Controller maintainers: - Sean Wang <sean.wang@kernel.org> @@ -117,6 +117,10 @@ patternProperties: "i2s" "audio" 62, 63, 64, 65 "switch_int" "eth" 66 "mdc_mdio" "eth" 67 + "wf_2g" "wifi" 74, 75, 76, 77, 78, 79, 80, 81, 82, 83 + "wf_5g" "wifi" 91, 92, 93, 94, 95, 96, 97, 98, 99, 100 + "wf_dbdc" "wifi" 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, + 84, 85 $ref: "/schemas/pinctrl/pinmux-node.yaml" properties: @@ -234,7 +238,9 @@ patternProperties: then: properties: groups: - enum: [wf_2g, wf_5g, wf_dbdc] + items: + enum: [wf_2g, wf_5g, wf_dbdc] + maxItems: 3 '.*conf.*': type: object additionalProperties: false @@ -248,25 +254,27 @@ patternProperties: An array of strings. Each string contains the name of a pin. There is no PIN 41 to PIN 65 above on mt7686b, you can only use those pins on mt7986a. - enum: [SYS_WATCHDOG, WF2G_LED, WF5G_LED, I2C_SCL, I2C_SDA, GPIO_0, - GPIO_1, GPIO_2, GPIO_3, GPIO_4, GPIO_5, GPIO_6, GPIO_7, - GPIO_8, GPIO_9, GPIO_10, GPIO_11, GPIO_12, GPIO_13, GPIO_14, - GPIO_15, PWM0, PWM1, SPI0_CLK, SPI0_MOSI, SPI0_MISO, SPI0_CS, - SPI0_HOLD, SPI0_WP, SPI1_CLK, SPI1_MOSI, SPI1_MISO, SPI1_CS, - SPI2_CLK, SPI2_MOSI, SPI2_MISO, SPI2_CS, SPI2_HOLD, SPI2_WP, - UART0_RXD, UART0_TXD, PCIE_PERESET_N, UART1_RXD, UART1_TXD, - UART1_CTS, UART1_RTS, UART2_RXD, UART2_TXD, UART2_CTS, - UART2_RTS, EMMC_DATA_0, EMMC_DATA_1, EMMC_DATA_2, - EMMC_DATA_3, EMMC_DATA_4, EMMC_DATA_5, EMMC_DATA_6, - EMMC_DATA_7, EMMC_CMD, EMMC_CK, EMMC_DSL, EMMC_RSTB, PCM_DTX, - PCM_DRX, PCM_CLK, PCM_FS, MT7531_INT, SMI_MDC, SMI_MDIO, - WF0_DIG_RESETB, WF0_CBA_RESETB, WF0_XO_REQ, WF0_TOP_CLK, - WF0_TOP_DATA, WF0_HB1, WF0_HB2, WF0_HB3, WF0_HB4, WF0_HB0, - WF0_HB0_B, WF0_HB5, WF0_HB6, WF0_HB7, WF0_HB8, WF0_HB9, - WF0_HB10, WF1_DIG_RESETB, WF1_CBA_RESETB, WF1_XO_REQ, - WF1_TOP_CLK, WF1_TOP_DATA, WF1_HB1, WF1_HB2, WF1_HB3, - WF1_HB4, WF1_HB0, WF1_HB0_B, WF1_HB5, WF1_HB6, WF1_HB7, - WF1_HB8] + items: + enum: [SYS_WATCHDOG, WF2G_LED, WF5G_LED, I2C_SCL, I2C_SDA, GPIO_0, + GPIO_1, GPIO_2, GPIO_3, GPIO_4, GPIO_5, GPIO_6, GPIO_7, + GPIO_8, GPIO_9, GPIO_10, GPIO_11, GPIO_12, GPIO_13, GPIO_14, + GPIO_15, PWM0, PWM1, SPI0_CLK, SPI0_MOSI, SPI0_MISO, SPI0_CS, + SPI0_HOLD, SPI0_WP, SPI1_CLK, SPI1_MOSI, SPI1_MISO, SPI1_CS, + SPI2_CLK, SPI2_MOSI, SPI2_MISO, SPI2_CS, SPI2_HOLD, SPI2_WP, + UART0_RXD, UART0_TXD, PCIE_PERESET_N, UART1_RXD, UART1_TXD, + UART1_CTS, UART1_RTS, UART2_RXD, UART2_TXD, UART2_CTS, + UART2_RTS, EMMC_DATA_0, EMMC_DATA_1, EMMC_DATA_2, + EMMC_DATA_3, EMMC_DATA_4, EMMC_DATA_5, EMMC_DATA_6, + EMMC_DATA_7, EMMC_CMD, EMMC_CK, EMMC_DSL, EMMC_RSTB, PCM_DTX, + PCM_DRX, PCM_CLK, PCM_FS, MT7531_INT, SMI_MDC, SMI_MDIO, + WF0_DIG_RESETB, WF0_CBA_RESETB, WF0_XO_REQ, WF0_TOP_CLK, + WF0_TOP_DATA, WF0_HB1, WF0_HB2, WF0_HB3, WF0_HB4, WF0_HB0, + WF0_HB0_B, WF0_HB5, WF0_HB6, WF0_HB7, WF0_HB8, WF0_HB9, + WF0_HB10, WF1_DIG_RESETB, WF1_CBA_RESETB, WF1_XO_REQ, + WF1_TOP_CLK, WF1_TOP_DATA, WF1_HB1, WF1_HB2, WF1_HB3, + WF1_HB4, WF1_HB0, WF1_HB0_B, WF1_HB5, WF1_HB6, WF1_HB7, + WF1_HB8] + maxItems: 101 bias-disable: true diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml index 2d13a57b8961..0d2484056a0f 100644 --- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8183-pinctrl.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Mediatek MT8183 Pin Controller Device Tree Bindings +title: Mediatek MT8183 Pin Controller maintainers: - Sean Wang <sean.wang@kernel.org> diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8188-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8188-pinctrl.yaml new file mode 100644 index 000000000000..7e750f1e643d --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8188-pinctrl.yaml @@ -0,0 +1,226 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/mediatek,mt8188-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek MT8188 Pin Controller + +maintainers: + - Hui Liu <hui.liu@mediatek.com> + +description: | + The MediaTek's MT8188 Pin controller is used to control SoC pins. + +properties: + compatible: + const: mediatek,mt8188-pinctrl + + gpio-controller: true + + '#gpio-cells': + description: | + Number of cells in GPIO specifier, should be two. The first cell + is the pin number, the second cell is used to specify optional + parameters which are defined in <dt-bindings/gpio/gpio.h>. + const: 2 + + gpio-ranges: + maxItems: 1 + + gpio-line-names: true + + reg: + items: + - description: gpio registers base address + - description: rm group io configuration registers base address + - description: lt group io configuration registers base address + - description: lm group io configuration registers base address + - description: rt group io configuration registers base address + - description: eint registers base address + + reg-names: + items: + - const: iocfg0 + - const: iocfg_rm + - const: iocfg_lt + - const: iocfg_lm + - const: iocfg_rt + - const: eint + + interrupt-controller: true + + '#interrupt-cells': + const: 2 + + interrupts: + description: The interrupt outputs to sysirq. + maxItems: 1 + + mediatek,rsel-resistance-in-si-unit: + type: boolean + description: | + We provide two methods to select the resistance for I2C when pull up or pull down. + The first is by RSEL definition value, another one is by resistance value(ohm). + This flag is used to identify if the method is resistance(si unit) value. + +# PIN CONFIGURATION NODES +patternProperties: + '-pins$': + type: object + additionalProperties: false + + patternProperties: + '^pins': + type: object + $ref: "/schemas/pinctrl/pincfg-node.yaml" + additionalProperties: false + description: | + A pinctrl node should contain at least one subnode representing the + pinctrl groups available on the machine. Each subnode will list the + pins it needs, and how they should be configured, with regard to muxer + configuration, pullups, drive strength, input enable/disable and + input schmitt. + + properties: + pinmux: + description: | + Integer array, represents gpio pin number and mux setting. + Supported pin number and mux varies for different SoCs, and are + defined as macros in dt-bindings/pinctrl/mediatek,<soc>-pinfunc.h + directly. + + drive-strength: + enum: [2, 4, 6, 8, 10, 12, 14, 16] + + drive-strength-microamp: + enum: [125, 250, 500, 1000] + + bias-pull-down: + oneOf: + - type: boolean + - enum: [100, 101, 102, 103] + description: mt8188 pull down PUPD/R0/R1 type define value. + - enum: [200, 201, 202, 203, 204, 205, 206, 207] + description: mt8188 pull down RSEL type define value. + - enum: [75000, 5000] + description: mt8188 pull down RSEL type si unit value(ohm). + description: | + For pull down type is normal, it doesn't need add RSEL & R1R0 define + and resistance value. + For pull down type is PUPD/R0/R1 type, it can add R1R0 define to + set different resistance. It can support "MTK_PUPD_SET_R1R0_00" & + "MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" & "MTK_PUPD_SET_R1R0_11" + define in mt8188. + For pull down type is RSEL, it can add RSEL define & resistance value(ohm) + to set different resistance by identifying property "mediatek,rsel-resistance-in-si-unit". + It can support "MTK_PULL_SET_RSEL_000" & "MTK_PULL_SET_RSEL_001" + & "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011" & "MTK_PULL_SET_RSEL_100" + & "MTK_PULL_SET_RSEL_101" & "MTK_PULL_SET_RSEL_110" & "MTK_PULL_SET_RSEL_111" + define in mt8188. It can also support resistance value(ohm) "75000" & "5000" in mt8188. + + bias-pull-up: + oneOf: + - type: boolean + - enum: [100, 101, 102, 103] + description: mt8188 pull up PUPD/R0/R1 type define value. + - enum: [200, 201, 202, 203, 204, 205, 206, 207] + description: mt8188 pull up RSEL type define value. + - enum: [1000, 1500, 2000, 3000, 4000, 5000, 10000, 75000] + description: mt8188 pull up RSEL type si unit value(ohm). + description: | + For pull up type is normal, it don't need add RSEL & R1R0 define + and resistance value. + For pull up type is PUPD/R0/R1 type, it can add R1R0 define to + set different resistance. It can support "MTK_PUPD_SET_R1R0_00" & + "MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" & "MTK_PUPD_SET_R1R0_11" + define in mt8188. + For pull up type is RSEL, it can add RSEL define & resistance value(ohm) + to set different resistance by identifying property "mediatek,rsel-resistance-in-si-unit". + It can support "MTK_PULL_SET_RSEL_000" & "MTK_PULL_SET_RSEL_001" + & "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011" & "MTK_PULL_SET_RSEL_100" + & "MTK_PULL_SET_RSEL_101" & "MTK_PULL_SET_RSEL_110" & "MTK_PULL_SET_RSEL_111" + define in mt8188. It can also support resistance value(ohm) + "1000" & "1500" & "2000" & "3000" & "4000" & "5000" & "10000" & "75000" in mt8188. + + bias-disable: true + + output-high: true + + output-low: true + + input-enable: true + + input-disable: true + + input-schmitt-enable: true + + input-schmitt-disable: true + + required: + - pinmux + +required: + - compatible + - reg + - interrupts + - interrupt-controller + - '#interrupt-cells' + - gpio-controller + - '#gpio-cells' + - gpio-ranges + +additionalProperties: false + +examples: + - | + #include <dt-bindings/pinctrl/mediatek,mt8188-pinfunc.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + + pio: pinctrl@10005000 { + compatible = "mediatek,mt8188-pinctrl"; + reg = <0x10005000 0x1000>, + <0x11c00000 0x1000>, + <0x11e10000 0x1000>, + <0x11e20000 0x1000>, + <0x11ea0000 0x1000>, + <0x1000b000 0x1000>; + reg-names = "iocfg0", "iocfg_rm", + "iocfg_lt", "iocfg_lm", "iocfg_rt", + "eint"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pio 0 0 176>; + interrupt-controller; + interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH 0>; + #interrupt-cells = <2>; + + pio-pins { + pins { + pinmux = <PINMUX_GPIO0__FUNC_B_GPIO0>; + output-low; + }; + }; + + spi0-pins { + pins-spi { + pinmux = <PINMUX_GPIO75__FUNC_O_SPIM1_CSB>, + <PINMUX_GPIO76__FUNC_O_SPIM1_CLK>, + <PINMUX_GPIO77__FUNC_B0_SPIM1_MOSI>; + drive-strength = <6>; + }; + pins-spi-mi { + pinmux = <PINMUX_GPIO78__FUNC_B0_SPIM1_MISO>; + bias-pull-down = <MTK_PUPD_SET_R1R0_10>; + }; + }; + + i2c0-pins { + pins { + pinmux = <PINMUX_GPIO55__FUNC_B1_SCL0>, + <PINMUX_GPIO56__FUNC_B1_SDA0>; + bias-disable; + drive-strength-microamp = <1000>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/pinctrl/nuvoton,wpcm450-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/nuvoton,wpcm450-pinctrl.yaml index 7a11beb8f222..7b7f840ffc4c 100644 --- a/Documentation/devicetree/bindings/pinctrl/nuvoton,wpcm450-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/nuvoton,wpcm450-pinctrl.yaml @@ -30,6 +30,7 @@ patternProperties: "^gpio@[0-7]$": type: object + additionalProperties: false description: Eight GPIO banks (gpio@0 to gpio@7), that each contain between 14 and 18 diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8186.yaml b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8186.yaml index 1eeb885ce0c6..26573a793b57 100644 --- a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8186.yaml +++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8186.yaml @@ -41,12 +41,12 @@ properties: Gpio base register names. items: - const: iocfg0 - - const: iocfg_bm - - const: iocfg_bl - - const: iocfg_br + - const: iocfg_lt - const: iocfg_lm + - const: iocfg_lb + - const: iocfg_bl - const: iocfg_rb - - const: iocfg_tl + - const: iocfg_rt - const: eint interrupt-controller: true @@ -235,9 +235,9 @@ examples: <0x10002A00 0x0200>, <0x10002c00 0x0200>, <0x1000b000 0x1000>; - reg-names = "iocfg0", "iocfg_bm", "iocfg_bl", - "iocfg_br", "iocfg_lm", "iocfg_rb", - "iocfg_tl", "eint"; + reg-names = "iocfg0", "iocfg_lt", "iocfg_lm", + "iocfg_lb", "iocfg_bl", "iocfg_rb", + "iocfg_rt", "eint"; gpio-controller; #gpio-cells = <2>; gpio-ranges = <&pio 0 0 185>; diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml index 694898f382be..29dd503f9522 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml @@ -24,6 +24,7 @@ properties: - qcom,pm6150-gpio - qcom,pm6150l-gpio - qcom,pm6350-gpio + - qcom,pm7250b-gpio - qcom,pm7325-gpio - qcom,pm8005-gpio - qcom,pm8008-gpio @@ -231,6 +232,7 @@ allOf: enum: - qcom,pm660l-gpio - qcom,pm6150l-gpio + - qcom,pm7250b-gpio - qcom,pm8038-gpio - qcom,pm8150b-gpio - qcom,pm8150l-gpio @@ -392,6 +394,7 @@ $defs: - gpio1-gpio10 for pm6150 - gpio1-gpio12 for pm6150l - gpio1-gpio9 for pm6350 + - gpio1-gpio12 for pm7250b - gpio1-gpio10 for pm7325 - gpio1-gpio4 for pm8005 - gpio1-gpio2 for pm8008 @@ -407,6 +410,7 @@ $defs: - gpio1-gpio10 for pm8350 - gpio1-gpio8 for pm8350b - gpio1-gpio9 for pm8350c + - gpio1-gpio4 for pm8450 - gpio1-gpio38 for pm8917 - gpio1-gpio44 for pm8921 - gpio1-gpio36 for pm8941 diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml index 33d1d37fdf6d..624e14f00790 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml @@ -8,7 +8,6 @@ title: Qualcomm Technologies, Inc. Low Power Audio SubSystem (LPASS) Low Power Island (LPI) TLMM block maintainers: - - Srinivasa Rao Mandadapu <srivasam@codeaurora.org> - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> description: | diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml index 2d228164357c..ad3496784678 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm Technologies, Inc. SC7280 TLMM block maintainers: - - Rajendra Nayak <rnayak@codeaurora.org> + - Bjorn Andersson <andersson@kernel.org> description: | This binding describes the Top Level Mode Multiplexer block found in the @@ -42,6 +42,9 @@ properties: gpio-ranges: maxItems: 1 + gpio-line-names: + maxItems: 174 + wakeup-parent: true #PIN CONFIGURATION NODES @@ -51,7 +54,6 @@ patternProperties: description: Pinctrl node's client devices use subnodes for desired pin configuration. Client device subnodes use below standard properties. - $ref: "/schemas/pinctrl/pincfg-node.yaml" properties: pins: @@ -60,7 +62,7 @@ patternProperties: subnode. items: oneOf: - - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-7][0-4])$" + - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-7][0-9]|18[0-2])$" - enum: [ sdc1_rclk, sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd, sdc2_data, ufs_reset ] minItems: 1 @@ -118,12 +120,21 @@ patternProperties: required: - pins - - function + + allOf: + - $ref: /schemas/pinctrl/pincfg-node.yaml + - if: + properties: + pins: + pattern: "^gpio([0-9]|[1-9][0-9]|1[0-7][0-9]|18[0-2])$" + then: + required: + - function additionalProperties: false allOf: - - $ref: "pinctrl.yaml#" + - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml# required: - compatible @@ -139,22 +150,22 @@ additionalProperties: false examples: - | - #include <dt-bindings/interrupt-controller/arm-gic.h> - tlmm: pinctrl@f000000 { - compatible = "qcom,sc7280-pinctrl"; - reg = <0xf000000 0x1000000>; - interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - gpio-ranges = <&tlmm 0 0 175>; - wakeup-parent = <&pdc>; - - qup_uart5_default: qup-uart5-pins { - pins = "gpio46", "gpio47"; - function = "qup13"; - drive-strength = <2>; - bias-disable; - }; + #include <dt-bindings/interrupt-controller/arm-gic.h> + tlmm: pinctrl@f000000 { + compatible = "qcom,sc7280-pinctrl"; + reg = <0xf000000 0x1000000>; + interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-ranges = <&tlmm 0 0 175>; + wakeup-parent = <&pdc>; + + qup_uart5_default: qup-uart5-pins { + pins = "gpio46", "gpio47"; + function = "qup13"; + drive-strength = <2>; + bias-disable; }; + }; diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc8180x-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc8180x-pinctrl.yaml index 86509172603d..b98eeba2c530 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sc8180x-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc8180x-pinctrl.yaml @@ -51,8 +51,9 @@ patternProperties: oneOf: - $ref: "#/$defs/qcom-sc8180x-tlmm-state" - patternProperties: - ".*": + "-pins$": $ref: "#/$defs/qcom-sc8180x-tlmm-state" + additionalProperties: false '$defs': qcom-sc8180x-tlmm-state: @@ -60,7 +61,6 @@ patternProperties: description: Pinctrl node's client devices use subnodes for desired pin configuration. Client device subnodes use below standard properties. - $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state" properties: pins: @@ -111,43 +111,52 @@ patternProperties: required: - pins - - function + + allOf: + - $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state" + - if: + properties: + pins: + pattern: "^gpio([0-9]|[1-9][0-9]|1[0-8][0-9])$" + then: + required: + - function additionalProperties: false examples: - | - #include <dt-bindings/interrupt-controller/arm-gic.h> - pinctrl@3100000 { - compatible = "qcom,sc8180x-tlmm"; - reg = <0x03100000 0x300000>, - <0x03500000 0x700000>, - <0x03d00000 0x300000>; - reg-names = "west", "east", "south"; - interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - gpio-ranges = <&tlmm 0 0 190>; - - gpio-wo-subnode-state { - pins = "gpio1"; - function = "gpio"; - }; - - uart-w-subnodes-state { - rx { - pins = "gpio4"; - function = "qup6"; - bias-pull-up; - }; - - tx { - pins = "gpio5"; - function = "qup6"; - bias-disable; - }; - }; + #include <dt-bindings/interrupt-controller/arm-gic.h> + pinctrl@3100000 { + compatible = "qcom,sc8180x-tlmm"; + reg = <0x03100000 0x300000>, + <0x03500000 0x700000>, + <0x03d00000 0x300000>; + reg-names = "west", "east", "south"; + interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-ranges = <&tlmm 0 0 190>; + + gpio-wo-subnode-state { + pins = "gpio1"; + function = "gpio"; + }; + + uart-w-subnodes-state { + rx-pins { + pins = "gpio4"; + function = "qup6"; + bias-pull-up; + }; + + tx-pins { + pins = "gpio5"; + function = "qup6"; + bias-disable; + }; }; + }; ... diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-lpass-lpi-pinctrl.yaml new file mode 100644 index 000000000000..1f468303bb08 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-lpass-lpi-pinctrl.yaml @@ -0,0 +1,133 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/qcom,sc8280xp-lpass-lpi-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Technologies, Inc. Low Power Audio SubSystem (LPASS) + Low Power Island (LPI) TLMM block + +maintainers: + - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> + +description: | + This binding describes the Top Level Mode Multiplexer block found in the + LPASS LPI IP on most Qualcomm SoCs + +properties: + compatible: + const: qcom,sc8280xp-lpass-lpi-pinctrl + + reg: + items: + - description: LPASS LPI TLMM Control and Status registers + - description: LPASS LPI pins SLEW registers + + clocks: + items: + - description: LPASS Core voting clock + - description: LPASS Audio voting clock + + clock-names: + items: + - const: core + - const: audio + + gpio-controller: true + + '#gpio-cells': + description: Specifying the pin number and flags, as defined in + include/dt-bindings/gpio/gpio.h + const: 2 + + gpio-ranges: + maxItems: 1 + +#PIN CONFIGURATION NODES +patternProperties: + '-pins$': + type: object + description: + Pinctrl node's client devices use subnodes for desired pin configuration. + Client device subnodes use below standard properties. + $ref: /schemas/pinctrl/pincfg-node.yaml + + properties: + pins: + description: + List of gpio pins affected by the properties specified in this + subnode. + items: + pattern: "^gpio([0-1]|1[0-8]])$" + + function: + enum: [ swr_tx_clk, swr_tx_data, swr_rx_clk, swr_rx_data, + dmic1_clk, dmic1_data, dmic2_clk, dmic2_data, dmic4_clk, + dmic4_data, i2s2_clk, i2s2_ws, dmic3_clk, dmic3_data, + qua_mi2s_sclk, qua_mi2s_ws, qua_mi2s_data, i2s1_clk, i2s1_ws, + i2s1_data, wsa_swr_clk, wsa_swr_data, wsa2_swr_clk, + wsa2_swr_data, i2s2_data, i2s3_clk, i2s3_ws, i2s3_data, + ext_mclk1_c, ext_mclk1_b, ext_mclk1_a ] + description: + Specify the alternative function to be configured for the specified + pins. + + drive-strength: + enum: [2, 4, 6, 8, 10, 12, 14, 16] + default: 2 + description: + Selects the drive strength for the specified pins, in mA. + + slew-rate: + enum: [0, 1, 2, 3] + default: 0 + description: | + 0: No adjustments + 1: Higher Slew rate (faster edges) + 2: Lower Slew rate (slower edges) + 3: Reserved (No adjustments) + + bias-pull-down: true + + bias-pull-up: true + + bias-disable: true + + output-high: true + + output-low: true + + required: + - pins + - function + + additionalProperties: false + +allOf: + - $ref: pinctrl.yaml# + +required: + - compatible + - reg + - clocks + - clock-names + - gpio-controller + - '#gpio-cells' + - gpio-ranges + +additionalProperties: false + +examples: + - | + #include <dt-bindings/sound/qcom,q6afe.h> + pinctrl@33c0000 { + compatible = "qcom,sc8280xp-lpass-lpi-pinctrl"; + reg = <0x33c0000 0x20000>, + <0x3550000 0x10000>; + clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + clock-names = "core", "audio"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&lpi_tlmm 0 0 18>; + }; diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-pinctrl.yaml index 87a381c9a19d..b9ab130cd558 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-pinctrl.yaml @@ -43,8 +43,9 @@ patternProperties: oneOf: - $ref: "#/$defs/qcom-sc8280xp-tlmm-state" - patternProperties: - ".*": + "-pins$": $ref: "#/$defs/qcom-sc8280xp-tlmm-state" + additionalProperties: false '$defs': qcom-sc8280xp-tlmm-state: @@ -52,7 +53,6 @@ patternProperties: description: Pinctrl node's client devices use subnodes for desired pin configuration. Client device subnodes use below standard properties. - $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state" properties: pins: @@ -112,40 +112,49 @@ patternProperties: required: - pins - - function + + allOf: + - $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state" + - if: + properties: + pins: + pattern: "^gpio([0-9]|[1-9][0-9]|1[0-9][0-9]|2[0-1][0-9]|22[0-7])$" + then: + required: + - function additionalProperties: false examples: - | - #include <dt-bindings/interrupt-controller/arm-gic.h> - pinctrl@f100000 { - compatible = "qcom,sc8280xp-tlmm"; - reg = <0x0f100000 0x300000>; - interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - gpio-ranges = <&tlmm 0 0 230>; - - gpio-wo-subnode-state { - pins = "gpio1"; - function = "gpio"; - }; - - uart-w-subnodes-state { - rx { - pins = "gpio4"; - function = "qup14"; - bias-pull-up; - }; - - tx { - pins = "gpio5"; - function = "qup14"; - bias-disable; - }; - }; + #include <dt-bindings/interrupt-controller/arm-gic.h> + pinctrl@f100000 { + compatible = "qcom,sc8280xp-tlmm"; + reg = <0x0f100000 0x300000>; + interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-ranges = <&tlmm 0 0 230>; + + gpio-wo-subnode-state { + pins = "gpio1"; + function = "gpio"; + }; + + uart-w-subnodes-state { + rx-pins { + pins = "gpio4"; + function = "qup14"; + bias-pull-up; + }; + + tx-pins { + pins = "gpio5"; + function = "qup14"; + bias-disable; + }; }; + }; ... diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-pinctrl.yaml index a7a2bb8bff46..e39fbb36d8c1 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-pinctrl.yaml @@ -49,6 +49,8 @@ properties: gpio-ranges: maxItems: 1 + gpio-reserved-ranges: true + wakeup-parent: true #PIN CONFIGURATION NODES @@ -57,8 +59,9 @@ patternProperties: oneOf: - $ref: "#/$defs/qcom-sm6115-tlmm-state" - patternProperties: - ".*": + "-pins$": $ref: "#/$defs/qcom-sm6115-tlmm-state" + additionalProperties: false '$defs': qcom-sm6115-tlmm-state: @@ -66,7 +69,6 @@ patternProperties: description: Pinctrl node's client devices use subnodes for desired pin configuration. Client device subnodes use below standard properties. - $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state" properties: pins: @@ -118,6 +120,16 @@ patternProperties: required: - pins + allOf: + - $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state" + - if: + properties: + pins: + pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-2])$" + then: + required: + - function + additionalProperties: false allOf: @@ -138,44 +150,44 @@ additionalProperties: false examples: - | - #include <dt-bindings/interrupt-controller/arm-gic.h> - tlmm: pinctrl@500000 { - compatible = "qcom,sm6115-tlmm"; - reg = <0x500000 0x400000>, - <0x900000 0x400000>, - <0xd00000 0x400000>; - reg-names = "west", "south", "east"; - interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - gpio-ranges = <&tlmm 0 0 114>; - - sdc2_on_state: sdc2-on-state { - clk { - pins = "sdc2_clk"; - bias-disable; - drive-strength = <16>; - }; - - cmd { - pins = "sdc2_cmd"; - bias-pull-up; - drive-strength = <10>; - }; - - data { - pins = "sdc2_data"; - bias-pull-up; - drive-strength = <10>; - }; - - sd-cd { - pins = "gpio88"; - function = "gpio"; - bias-pull-up; - drive-strength = <2>; - }; - }; + #include <dt-bindings/interrupt-controller/arm-gic.h> + tlmm: pinctrl@500000 { + compatible = "qcom,sm6115-tlmm"; + reg = <0x500000 0x400000>, + <0x900000 0x400000>, + <0xd00000 0x400000>; + reg-names = "west", "south", "east"; + interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-ranges = <&tlmm 0 0 114>; + + sdc2_on_state: sdc2-on-state { + clk-pins { + pins = "sdc2_clk"; + bias-disable; + drive-strength = <16>; + }; + + cmd-pins { + pins = "sdc2_cmd"; + bias-pull-up; + drive-strength = <10>; + }; + + data-pins { + pins = "sdc2_data"; + bias-pull-up; + drive-strength = <10>; + }; + + sd-cd-pins { + pins = "gpio88"; + function = "gpio"; + bias-pull-up; + drive-strength = <2>; + }; }; + }; diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm6125-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm6125-pinctrl.yaml index c8eec845ade9..5cb8b272cb7d 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm6125-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm6125-pinctrl.yaml @@ -51,8 +51,9 @@ patternProperties: oneOf: - $ref: "#/$defs/qcom-sm6125-tlmm-state" - patternProperties: - ".*": + "-pins$": $ref: "#/$defs/qcom-sm6125-tlmm-state" + additionalProperties: false $defs: qcom-sm6125-tlmm-state: @@ -60,7 +61,6 @@ $defs: description: Pinctrl node's client devices use subnodes for desired pin configuration. Client device subnodes use below standard properties. - $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state" properties: pins: @@ -111,23 +111,52 @@ $defs: required: - pins - - function + + allOf: + - $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state" + - if: + properties: + pins: + pattern: "^gpio[0-9]|[1-9][0-9]|1[0-2][0-9]|13[0-2]$" + then: + required: + - function additionalProperties: false examples: - | - #include <dt-bindings/interrupt-controller/arm-gic.h> - pinctrl@500000 { - compatible = "qcom,sm6125-tlmm"; - reg = <0x00500000 0x400000>, - <0x00900000 0x400000>, - <0x00d00000 0x400000>; - reg-names = "west", "south", "east"; - interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>; - gpio-controller; - gpio-ranges = <&tlmm 0 0 134>; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; + #include <dt-bindings/interrupt-controller/arm-gic.h> + pinctrl@500000 { + compatible = "qcom,sm6125-tlmm"; + reg = <0x00500000 0x400000>, + <0x00900000 0x400000>, + <0x00d00000 0x400000>; + reg-names = "west", "south", "east"; + interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>; + gpio-controller; + gpio-ranges = <&tlmm 0 0 134>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + + sdc2-off-state { + clk-pins { + pins = "sdc2_clk"; + drive-strength = <2>; + bias-disable; + }; + + cmd-pins { + pins = "sdc2_cmd"; + drive-strength = <2>; + bias-pull-up; + }; + + data-pins { + pins = "sdc2_data"; + drive-strength = <2>; + bias-pull-up; + }; }; + }; diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm6350-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm6350-pinctrl.yaml index 898608671c4b..856b9c567ecb 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm6350-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm6350-pinctrl.yaml @@ -44,8 +44,9 @@ patternProperties: oneOf: - $ref: "#/$defs/qcom-sm6350-tlmm-state" - patternProperties: - ".*": + "-pins$": $ref: "#/$defs/qcom-sm6350-tlmm-state" + additionalProperties: false $defs: qcom-sm6350-tlmm-state: @@ -53,7 +54,6 @@ $defs: description: Pinctrl node's client devices use subnodes for desired pin configuration. Client device subnodes use below standard properties. - $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state" properties: pins: @@ -110,40 +110,49 @@ $defs: required: - pins - - function + + allOf: + - $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state" + - if: + properties: + pins: + pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9]|15[0-7])$" + then: + required: + - function additionalProperties: false examples: - | - #include <dt-bindings/interrupt-controller/arm-gic.h> - pinctrl@f100000 { - compatible = "qcom,sm6350-tlmm"; - reg = <0x0f100000 0x300000>; - interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - gpio-ranges = <&tlmm 0 0 157>; - - gpio-wo-subnode-state { - pins = "gpio1"; - function = "gpio"; - }; - - uart-w-subnodes-state { - rx { - pins = "gpio25"; - function = "qup13_f2"; - bias-disable; - }; - - tx { - pins = "gpio26"; - function = "qup13_f2"; - bias-disable; - }; - }; + #include <dt-bindings/interrupt-controller/arm-gic.h> + pinctrl@f100000 { + compatible = "qcom,sm6350-tlmm"; + reg = <0x0f100000 0x300000>; + interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-ranges = <&tlmm 0 0 157>; + + gpio-wo-subnode-state { + pins = "gpio1"; + function = "gpio"; + }; + + uart-w-subnodes-state { + rx-pins { + pins = "gpio25"; + function = "qup13_f2"; + bias-disable; + }; + + tx-pins { + pins = "gpio26"; + function = "qup13_f2"; + bias-disable; + }; }; + }; ... diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm6375-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm6375-tlmm.yaml index 3908807a8339..025faf87d147 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm6375-tlmm.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm6375-tlmm.yaml @@ -44,8 +44,9 @@ patternProperties: oneOf: - $ref: "#/$defs/qcom-sm6375-tlmm-state" - patternProperties: - ".*": + "-pins$": $ref: "#/$defs/qcom-sm6375-tlmm-state" + additionalProperties: false $defs: qcom-sm6375-tlmm-state: @@ -53,7 +54,6 @@ $defs: description: Pinctrl node's client devices use subnodes for desired pin configuration. Client device subnodes use below standard properties. - $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state" properties: pins: @@ -119,40 +119,49 @@ $defs: required: - pins - - function + + allOf: + - $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state" + - if: + properties: + pins: + pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9]|15[0-6])$" + then: + required: + - function additionalProperties: false examples: - | - #include <dt-bindings/interrupt-controller/arm-gic.h> - pinctrl@500000 { - compatible = "qcom,sm6375-tlmm"; - reg = <0x00500000 0x800000>; - interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - gpio-ranges = <&tlmm 0 0 157>; - - gpio-wo-subnode-state { - pins = "gpio1"; - function = "gpio"; - }; - - uart-w-subnodes-state { - rx { - pins = "gpio18"; - function = "qup13_f2"; - bias-pull-up; - }; - - tx { - pins = "gpio19"; - function = "qup13_f2"; - bias-disable; - }; - }; + #include <dt-bindings/interrupt-controller/arm-gic.h> + pinctrl@500000 { + compatible = "qcom,sm6375-tlmm"; + reg = <0x00500000 0x800000>; + interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-ranges = <&tlmm 0 0 157>; + + gpio-wo-subnode-state { + pins = "gpio1"; + function = "gpio"; + }; + + uart-w-subnodes-state { + rx-pins { + pins = "gpio18"; + function = "qup13_f2"; + bias-pull-up; + }; + + tx-pins { + pins = "gpio19"; + function = "qup13_f2"; + bias-disable; + }; }; + }; ... diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml index 15bb1018cf21..c44d02d28bc9 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml @@ -110,7 +110,16 @@ patternProperties: required: - pins - - function + + allOf: + - $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state" + - if: + properties: + pins: + pattern: "^gpio([0-9]|[1-9][0-9]|1[0-7][0-9])$" + then: + required: + - function additionalProperties: false @@ -132,18 +141,18 @@ additionalProperties: false examples: - | - #include <dt-bindings/interrupt-controller/arm-gic.h> - pinctrl@1f00000 { - compatible = "qcom,sm8250-pinctrl"; - reg = <0x0f100000 0x300000>, - <0x0f500000 0x300000>, - <0x0f900000 0x300000>; - reg-names = "west", "south", "north"; - interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - gpio-ranges = <&tlmm 0 0 180>; - wakeup-parent = <&pdc>; - }; + #include <dt-bindings/interrupt-controller/arm-gic.h> + pinctrl@1f00000 { + compatible = "qcom,sm8250-pinctrl"; + reg = <0x0f100000 0x300000>, + <0x0f500000 0x300000>, + <0x0f900000 0x300000>; + reg-names = "west", "south", "north"; + interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-ranges = <&tlmm 0 0 180>; + wakeup-parent = <&pdc>; + }; diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8350-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8350-pinctrl.yaml index 6b7789db2f75..6ae5571f60da 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8350-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8350-pinctrl.yaml @@ -44,8 +44,9 @@ patternProperties: oneOf: - $ref: "#/$defs/qcom-sm8350-tlmm-state" - patternProperties: - ".*": + "-pins$": $ref: "#/$defs/qcom-sm8350-tlmm-state" + additionalProperties: false $defs: qcom-sm8350-tlmm-state: @@ -53,7 +54,6 @@ $defs: description: Pinctrl node's client devices use subnodes for desired pin configuration. Client device subnodes use below standard properties. - $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state" properties: pins: @@ -107,40 +107,49 @@ $defs: required: - pins - - function + + allOf: + - $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state" + - if: + properties: + pins: + pattern: "^gpio([0-9]|[1-9][0-9]|1[0-9][0-9]|20[0-3])$" + then: + required: + - function additionalProperties: false examples: - | - #include <dt-bindings/interrupt-controller/arm-gic.h> - pinctrl@f100000 { - compatible = "qcom,sm8350-tlmm"; - reg = <0x0f100000 0x300000>; - interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - gpio-ranges = <&tlmm 0 0 203>; - - gpio-wo-subnode-state { - pins = "gpio1"; - function = "gpio"; - }; - - uart-w-subnodes-state { - rx { - pins = "gpio18"; - function = "qup3"; - bias-pull-up; - }; - - tx { - pins = "gpio19"; - function = "qup3"; - bias-disable; - }; - }; + #include <dt-bindings/interrupt-controller/arm-gic.h> + pinctrl@f100000 { + compatible = "qcom,sm8350-tlmm"; + reg = <0x0f100000 0x300000>; + interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-ranges = <&tlmm 0 0 203>; + + gpio-wo-subnode-state { + pins = "gpio1"; + function = "gpio"; + }; + + uart-w-subnodes-state { + rx-pins { + pins = "gpio18"; + function = "qup3"; + bias-pull-up; + }; + + tx-pins { + pins = "gpio19"; + function = "qup3"; + bias-disable; + }; }; + }; ... diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml new file mode 100644 index 000000000000..3694795ec793 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml @@ -0,0 +1,135 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Technologies, Inc. Low Power Audio SubSystem (LPASS) + Low Power Island (LPI) TLMM block + +maintainers: + - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> + +description: | + This binding describes the Top Level Mode Multiplexer block found in the + LPASS LPI IP on most Qualcomm SoCs + +properties: + compatible: + const: qcom,sm8450-lpass-lpi-pinctrl + + reg: + items: + - description: LPASS LPI TLMM Control and Status registers + - description: LPASS LPI pins SLEW registers + + clocks: + items: + - description: LPASS Core voting clock + - description: LPASS Audio voting clock + + clock-names: + items: + - const: core + - const: audio + + gpio-controller: true + + '#gpio-cells': + description: Specifying the pin number and flags, as defined in + include/dt-bindings/gpio/gpio.h + const: 2 + + gpio-ranges: + maxItems: 1 + +#PIN CONFIGURATION NODES +patternProperties: + '-pins$': + type: object + description: + Pinctrl node's client devices use subnodes for desired pin configuration. + Client device subnodes use below standard properties. + $ref: /schemas/pinctrl/pincfg-node.yaml + + properties: + pins: + description: + List of gpio pins affected by the properties specified in this + subnode. + items: + pattern: "^gpio([0-9]|[1-2][0-9]])$" + + function: + enum: [ swr_tx_clk, swr_tx_data, swr_rx_clk, swr_rx_data, + dmic1_clk, dmic1_data, dmic2_clk, dmic2_data, dmic4_clk, + dmic4_data, i2s2_clk, i2s2_ws, dmic3_clk, dmic3_data, + qua_mi2s_sclk, qua_mi2s_ws, qua_mi2s_data, i2s1_clk, i2s1_ws, + i2s1_data, wsa_swr_clk, wsa_swr_data, wsa2_swr_clk, + wsa2_swr_data, i2s2_data, i2s4_ws, i2s4_clk, i2s4_data, + slimbus_clk, i2s3_clk, i2s3_ws, i2s3_data, slimbus_data, + ext_mclk1_c, ext_mclk1_b, ext_mclk1_a, ext_mclk1_d, + ext_mclk1_e ] + description: + Specify the alternative function to be configured for the specified + pins. + + drive-strength: + enum: [2, 4, 6, 8, 10, 12, 14, 16] + default: 2 + description: + Selects the drive strength for the specified pins, in mA. + + slew-rate: + enum: [0, 1, 2, 3] + default: 0 + description: | + 0: No adjustments + 1: Higher Slew rate (faster edges) + 2: Lower Slew rate (slower edges) + 3: Reserved (No adjustments) + + bias-pull-down: true + + bias-pull-up: true + + bias-disable: true + + output-high: true + + output-low: true + + required: + - pins + - function + + additionalProperties: false + +allOf: + - $ref: pinctrl.yaml# + +required: + - compatible + - reg + - clocks + - clock-names + - gpio-controller + - '#gpio-cells' + - gpio-ranges + +additionalProperties: false + +examples: + - | + #include <dt-bindings/sound/qcom,q6afe.h> + pinctrl@3440000 { + compatible = "qcom,sm8450-lpass-lpi-pinctrl"; + reg = <0x3440000 0x20000>, + <0x34d0000 0x10000>; + clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + clock-names = "core", "audio"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&lpi_tlmm 0 0 23>; + }; diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-pinctrl.yaml index 9c891246245b..9cd97a467648 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-pinctrl.yaml @@ -27,7 +27,14 @@ properties: interrupt-controller: true '#interrupt-cells': true gpio-controller: true - gpio-reserved-ranges: true + + gpio-reserved-ranges: + minItems: 1 + maxItems: 105 + + gpio-line-names: + maxItems: 209 + '#gpio-cells': true gpio-ranges: true wakeup-parent: true @@ -43,8 +50,9 @@ patternProperties: oneOf: - $ref: "#/$defs/qcom-sm8450-tlmm-state" - patternProperties: - ".*": + "-pins$": $ref: "#/$defs/qcom-sm8450-tlmm-state" + additionalProperties: false $defs: qcom-sm8450-tlmm-state: @@ -52,7 +60,6 @@ $defs: description: Pinctrl node's client devices use subnodes for desired pin configuration. Client device subnodes use below standard properties. - $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state" properties: pins: @@ -104,40 +111,49 @@ $defs: required: - pins - - function + + allOf: + - $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state" + - if: + properties: + pins: + pattern: "^gpio([0-9]|[1-9][0-9]|1[0-9][0-9]|20[0-9])$" + then: + required: + - function additionalProperties: false examples: - | - #include <dt-bindings/interrupt-controller/arm-gic.h> - pinctrl@f100000 { - compatible = "qcom,sm8450-tlmm"; - reg = <0x0f100000 0x300000>; - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&tlmm 0 0 211>; - interrupt-controller; - #interrupt-cells = <2>; - interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; - - gpio-wo-subnode-state { - pins = "gpio1"; - function = "gpio"; - }; - - uart-w-subnodes-state { - rx { - pins = "gpio26"; - function = "qup7"; - bias-pull-up; - }; - - tx { - pins = "gpio27"; - function = "qup7"; - bias-disable; - }; - }; + #include <dt-bindings/interrupt-controller/arm-gic.h> + pinctrl@f100000 { + compatible = "qcom,sm8450-tlmm"; + reg = <0x0f100000 0x300000>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&tlmm 0 0 211>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; + + gpio-wo-state { + pins = "gpio1"; + function = "gpio"; + }; + + uart-w-state { + rx-pins { + pins = "gpio26"; + function = "qup7"; + bias-pull-up; + }; + + tx-pins { + pins = "gpio27"; + function = "qup7"; + bias-disable; + }; }; + }; ... diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rza1-ports.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,rza1-ports.yaml index 8ed4b98a1628..9083040c996a 100644 --- a/Documentation/devicetree/bindings/pinctrl/renesas,rza1-ports.yaml +++ b/Documentation/devicetree/bindings/pinctrl/renesas,rza1-ports.yaml @@ -41,6 +41,7 @@ required: patternProperties: "^gpio-[0-9]*$": type: object + additionalProperties: false description: Each port of the r7s72100 pin controller hardware is itself a GPIO diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml index 997b74639112..f081acb7ba04 100644 --- a/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml @@ -23,7 +23,7 @@ properties: oneOf: - items: - enum: - - renesas,r9a07g043-pinctrl # RZ/G2UL{Type-1,Type-2} + - renesas,r9a07g043-pinctrl # RZ/G2UL{Type-1,Type-2} and RZ/Five - renesas,r9a07g044-pinctrl # RZ/G2{L,LC} - items: diff --git a/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.yaml index 677a285ca416..b486f41df65f 100644 --- a/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.yaml @@ -47,6 +47,7 @@ properties: - rockchip,rk3568-pinctrl - rockchip,rk3588-pinctrl - rockchip,rv1108-pinctrl + - rockchip,rv1126-pinctrl rockchip,grf: $ref: "/schemas/types.yaml#/definitions/phandle" diff --git a/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-pins-cfg.yaml b/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-pins-cfg.yaml index 9869d4dceddb..f796f27bf0e6 100644 --- a/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-pins-cfg.yaml +++ b/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-pins-cfg.yaml @@ -20,7 +20,6 @@ description: | The values used for config properties should be derived from the hardware manual and these values are programmed as-is into the pin pull up/down and driver strength register of the pin-controller. - See also include/dt-bindings/pinctrl/samsung.h with useful constants. See also Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml for additional information and example. diff --git a/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml index 3a65c66ca71d..eb2b2692607d 100644 --- a/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml @@ -15,9 +15,6 @@ description: | This is a part of device tree bindings for Samsung S3C/S5P/Exynos SoC pin controller. - Pin group settings (like drive strength, pull up/down) are available as - macros in include/dt-bindings/pinctrl/samsung.h. - All the pin controller nodes should be represented in the aliases node using the following format 'pinctrl{n}' where n is a unique number for the alias. @@ -97,6 +94,9 @@ patternProperties: additionalProperties: false "^(initial|sleep)-state$": + type: object + additionalProperties: false + patternProperties: "^(pin-[a-z0-9-]+|[a-z0-9-]+-pin)$": $ref: samsung,pinctrl-pins-cfg.yaml @@ -138,8 +138,6 @@ additionalProperties: false examples: - | - #include <dt-bindings/pinctrl/samsung.h> - pinctrl@7f008000 { compatible = "samsung,s3c64xx-pinctrl"; reg = <0x7f008000 0x1000>; @@ -166,8 +164,8 @@ examples: uart0-data-pins { samsung,pins = "gpa-0", "gpa-1"; - samsung,pin-function = <EXYNOS_PIN_FUNC_2>; - samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; }; // ... @@ -175,7 +173,6 @@ examples: - | #include <dt-bindings/interrupt-controller/arm-gic.h> - #include <dt-bindings/pinctrl/samsung.h> pinctrl@11400000 { compatible = "samsung,exynos4210-pinctrl"; @@ -197,9 +194,9 @@ examples: uart0-data-pins { samsung,pins = "gpa0-0", "gpa0-1"; - samsung,pin-function = <EXYNOS_PIN_FUNC_2>; - samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; - samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; }; // ... @@ -207,14 +204,14 @@ examples: sleep0: sleep-state { gpa0-0-pin { samsung,pins = "gpa0-0"; - samsung,pin-con-pdn = <EXYNOS_PIN_PDN_INPUT>; - samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-con-pdn = <2>; + samsung,pin-pud-pdn = <0>; }; gpa0-1-pin { samsung,pins = "gpa0-1"; - samsung,pin-con-pdn = <EXYNOS_PIN_PDN_OUT0>; - samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-con-pdn = <0>; + samsung,pin-pud-pdn = <0>; }; // ... @@ -223,7 +220,6 @@ examples: - | #include <dt-bindings/interrupt-controller/arm-gic.h> - #include <dt-bindings/pinctrl/samsung.h> pinctrl@11000000 { compatible = "samsung,exynos4210-pinctrl"; @@ -272,26 +268,26 @@ examples: sd0-clk-pins { samsung,pins = "gpk0-0"; - samsung,pin-function = <EXYNOS_PIN_FUNC_2>; - samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; - samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <3>; }; sd4-bus-width8-pins { part-1-pins { samsung,pins = "gpk0-3", "gpk0-4", "gpk0-5", "gpk0-6"; - samsung,pin-function = <EXYNOS_PIN_FUNC_3>; - samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; - samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; + samsung,pin-function = <3>; + samsung,pin-pud = <3>; + samsung,pin-drv = <3>; }; part-2-pins { samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6"; - samsung,pin-function = <EXYNOS_PIN_FUNC_4>; - samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; - samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; + samsung,pin-function = <4>; + samsung,pin-pud = <3>; + samsung,pin-drv = <3>; }; }; @@ -299,16 +295,15 @@ examples: otg-gp-pins { samsung,pins = "gpx3-3"; - samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; - samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; - samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + samsung,pin-function = <1>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; samsung,pin-val = <0>; }; }; - | #include <dt-bindings/interrupt-controller/arm-gic.h> - #include <dt-bindings/pinctrl/samsung.h> pinctrl@10580000 { compatible = "samsung,exynos5433-pinctrl"; @@ -352,9 +347,9 @@ examples: initial_alive: initial-state { gpa0-0-pin { samsung,pins = "gpa0-0"; - samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; - samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; - samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>; + samsung,pin-function = <0>; + samsung,pin-pud = <1>; + samsung,pin-drv = <0>; }; // ... @@ -363,7 +358,6 @@ examples: - | #include <dt-bindings/interrupt-controller/arm-gic.h> - #include <dt-bindings/pinctrl/samsung.h> pinctrl@114b0000 { compatible = "samsung,exynos5433-pinctrl"; @@ -384,9 +378,9 @@ examples: i2s0-bus-pins { samsung,pins = "gpz0-0", "gpz0-1", "gpz0-2", "gpz0-3", "gpz0-4", "gpz0-5", "gpz0-6"; - samsung,pin-function = <EXYNOS_PIN_FUNC_2>; - samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; - samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; }; // ... diff --git a/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml index d35dcc4f0242..9d59208d83c1 100644 --- a/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml @@ -64,6 +64,9 @@ patternProperties: gpio-controller: true '#gpio-cells': const: 2 + interrupt-controller: true + '#interrupt-cells': + const: 2 reg: maxItems: 1 @@ -71,6 +74,7 @@ patternProperties: maxItems: 1 resets: maxItems: 1 + gpio-line-names: true gpio-ranges: minItems: 1 maxItems: 16 @@ -106,6 +110,12 @@ patternProperties: minimum: 0 maximum: 11 + patternProperties: + "^(.+-hog(-[0-9]+)?)$": + type: object + required: + - gpio-hog + required: - gpio-controller - '#gpio-cells' @@ -115,9 +125,12 @@ patternProperties: '-[0-9]*$': type: object + additionalProperties: false + patternProperties: '^pins': type: object + additionalProperties: false description: | A pinctrl node should contain at least one subnode representing the pinctrl group available on the machine. Each subnode will list the diff --git a/Documentation/devicetree/bindings/pinctrl/starfive,jh7100-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/starfive,jh7100-pinctrl.yaml index 92963604422f..69c0dd9998ea 100644 --- a/Documentation/devicetree/bindings/pinctrl/starfive,jh7100-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/starfive,jh7100-pinctrl.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/pinctrl/starfive,jh7100-pinctrl.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: StarFive JH7100 Pin Controller Device Tree Bindings +title: StarFive JH7100 Pin Controller description: | Bindings for the JH7100 RISC-V SoC from StarFive Ltd. @@ -165,7 +165,7 @@ examples: - | #include <dt-bindings/clock/starfive-jh7100.h> #include <dt-bindings/reset/starfive-jh7100.h> - #include <dt-bindings/pinctrl/pinctrl-starfive.h> + #include <dt-bindings/pinctrl/pinctrl-starfive-jh7100.h> soc { #address-cells = <2>; diff --git a/Documentation/devicetree/bindings/pinctrl/sunplus,sp7021-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/sunplus,sp7021-pinctrl.yaml index 15092fdd4b5b..347061eece9e 100644 --- a/Documentation/devicetree/bindings/pinctrl/sunplus,sp7021-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/sunplus,sp7021-pinctrl.yaml @@ -5,7 +5,7 @@ $id: http://devicetree.org/schemas/pinctrl/sunplus,sp7021-pinctrl.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Sunplus SP7021 Pin Controller Device Tree Bindings +title: Sunplus SP7021 Pin Controller maintainers: - Dvorkin Dmitry <dvorkin@tibbo.com> diff --git a/Documentation/devicetree/bindings/pinctrl/toshiba,visconti-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/toshiba,visconti-pinctrl.yaml index 306524885a2b..98b4663f9766 100644 --- a/Documentation/devicetree/bindings/pinctrl/toshiba,visconti-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/toshiba,visconti-pinctrl.yaml @@ -36,6 +36,7 @@ patternProperties: pins it needs, and how they should be configured, with regard to muxer configuration, pullups, drive strength. $ref: "pinmux-node.yaml" + additionalProperties: false properties: function: diff --git a/Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml b/Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml index 5390e988a934..43a932237a92 100644 --- a/Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml +++ b/Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml @@ -8,7 +8,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Amlogic Meson Everything-Else Power Domains maintainers: - - Neil Armstrong <narmstrong@baylibre.com> + - Neil Armstrong <neil.armstrong@linaro.org> description: |+ The Everything-Else Power Domains node should be the child of a syscon diff --git a/Documentation/devicetree/bindings/power/domain-idle-state.yaml b/Documentation/devicetree/bindings/power/domain-idle-state.yaml index 6a12efdf436a..4ee920a1de69 100644 --- a/Documentation/devicetree/bindings/power/domain-idle-state.yaml +++ b/Documentation/devicetree/bindings/power/domain-idle-state.yaml @@ -20,6 +20,7 @@ properties: patternProperties: "^(cpu|cluster|domain)-": type: object + additionalProperties: false description: Each state node represents a domain idle state description. @@ -44,6 +45,15 @@ patternProperties: state will yield power benefits, after overcoming the overhead while entering the idle state. + arm,psci-suspend-param: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + power_state parameter to pass to the ARM PSCI suspend call. + + Device tree nodes that require usage of PSCI CPU_SUSPEND function + (i.e. idle states node with entry-method property is set to "psci") + must specify this property. + required: - compatible - entry-latency-us diff --git a/Documentation/devicetree/bindings/power/fsl,imx-gpc.yaml b/Documentation/devicetree/bindings/power/fsl,imx-gpc.yaml index a055b3e819d8..777e1d852ddd 100644 --- a/Documentation/devicetree/bindings/power/fsl,imx-gpc.yaml +++ b/Documentation/devicetree/bindings/power/fsl,imx-gpc.yaml @@ -43,11 +43,21 @@ properties: pgc: type: object + additionalProperties: false description: list of power domains provided by this controller. + properties: + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + patternProperties: "power-domain@[0-9]$": type: object + additionalProperties: false + properties: '#power-domain-cells': @@ -78,6 +88,10 @@ properties: - '#power-domain-cells' - reg + required: + - '#address-cells' + - '#size-cells' + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml b/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml index 747622bdc57b..58022ae7d5dd 100644 --- a/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml +++ b/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml @@ -42,11 +42,21 @@ properties: pgc: type: object + additionalProperties: false description: list of power domains provided by this controller. + properties: + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + patternProperties: - "power-domain@[0-9]$": + "power-domain@[0-9a-f]+$": type: object + additionalProperties: false + properties: '#power-domain-cells': @@ -85,6 +95,10 @@ properties: - '#power-domain-cells' - reg + required: + - '#address-cells' + - '#size-cells' + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml index b448101fac43..605ec7ab5f63 100644 --- a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml +++ b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Mediatek Power Domains Controller maintainers: - - Weiyi Lu <weiyi.lu@mediatek.com> + - MandyJH Liu <mandyjh.liu@mediatek.com> - Matthias Brugger <mbrugger@suse.com> description: | @@ -19,7 +19,7 @@ description: | properties: $nodename: - const: power-controller + pattern: '^power-controller(@[0-9a-f]+)?$' compatible: enum: @@ -42,6 +42,23 @@ properties: patternProperties: "^power-domain@[0-9a-f]+$": + $ref: "#/$defs/power-domain-node" + patternProperties: + "^power-domain@[0-9a-f]+$": + $ref: "#/$defs/power-domain-node" + patternProperties: + "^power-domain@[0-9a-f]+$": + $ref: "#/$defs/power-domain-node" + patternProperties: + "^power-domain@[0-9a-f]+$": + $ref: "#/$defs/power-domain-node" + unevaluatedProperties: false + unevaluatedProperties: false + unevaluatedProperties: false + unevaluatedProperties: false + +$defs: + power-domain-node: type: object description: | Represents the power domains within the power controller node as documented @@ -100,123 +117,9 @@ patternProperties: $ref: /schemas/types.yaml#/definitions/phandle description: phandle to the device containing the SMI register range. - patternProperties: - "^power-domain@[0-9a-f]+$": - type: object - description: | - Represents a power domain child within a power domain parent node. - - properties: - - '#power-domain-cells': - description: - Must be 0 for nodes representing a single PM domain and 1 for nodes - providing multiple PM domains. - - '#address-cells': - const: 1 - - '#size-cells': - const: 0 - - reg: - maxItems: 1 - - clocks: - description: | - A number of phandles to clocks that need to be enabled during domain - power-up sequencing. - - clock-names: - description: | - List of names of clocks, in order to match the power-up sequencing - for each power domain we need to group the clocks by name. BASIC - clocks need to be enabled before enabling the corresponding power - domain, and should not have a '-' in their name (i.e mm, mfg, venc). - SUSBYS clocks need to be enabled before releasing the bus protection, - and should contain a '-' in their name (i.e mm-0, isp-0, cam-0). - - In order to follow properly the power-up sequencing, the clocks must - be specified by order, adding first the BASIC clocks followed by the - SUSBSYS clocks. - - domain-supply: - description: domain regulator supply. - - mediatek,infracfg: - $ref: /schemas/types.yaml#/definitions/phandle - description: phandle to the device containing the INFRACFG register range. - - mediatek,smi: - $ref: /schemas/types.yaml#/definitions/phandle - description: phandle to the device containing the SMI register range. - - patternProperties: - "^power-domain@[0-9a-f]+$": - type: object - description: | - Represents a power domain child within a power domain parent node. - - properties: - - '#power-domain-cells': - description: - Must be 0 for nodes representing a single PM domain and 1 for nodes - providing multiple PM domains. - - '#address-cells': - const: 1 - - '#size-cells': - const: 0 - - reg: - maxItems: 1 - - clocks: - description: | - A number of phandles to clocks that need to be enabled during domain - power-up sequencing. - - clock-names: - description: | - List of names of clocks, in order to match the power-up sequencing - for each power domain we need to group the clocks by name. BASIC - clocks need to be enabled before enabling the corresponding power - domain, and should not have a '-' in their name (i.e mm, mfg, venc). - SUSBYS clocks need to be enabled before releasing the bus protection, - and should contain a '-' in their name (i.e mm-0, isp-0, cam-0). - - In order to follow properly the power-up sequencing, the clocks must - be specified by order, adding first the BASIC clocks followed by the - SUSBSYS clocks. - - domain-supply: - description: domain regulator supply. - - mediatek,infracfg: - $ref: /schemas/types.yaml#/definitions/phandle - description: phandle to the device containing the INFRACFG register range. - - mediatek,smi: - $ref: /schemas/types.yaml#/definitions/phandle - description: phandle to the device containing the SMI register range. - - required: - - reg - - additionalProperties: false - - required: - - reg - - additionalProperties: false - required: - reg - additionalProperties: false - required: - compatible @@ -232,7 +135,7 @@ examples: #size-cells = <2>; scpsys: syscon@10006000 { - compatible = "syscon", "simple-mfd"; + compatible = "mediatek,mt8173-scpsys", "syscon", "simple-mfd"; reg = <0 0x10006000 0 0x1000>; spm: power-controller { diff --git a/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml b/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml index 0ccca493251a..5b4eda919911 100644 --- a/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml +++ b/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm RPM/RPMh Power domains maintainers: - - Rajendra Nayak <rnayak@codeaurora.org> + - Bjorn Andersson <andersson@kernel.org> description: For RPM/RPMh Power domains, we communicate a performance state to RPM/RPMh @@ -40,6 +40,7 @@ properties: - qcom,sm6115-rpmpd - qcom,sm6125-rpmpd - qcom,sm6350-rpmhpd + - qcom,sm6375-rpmpd - qcom,sm8150-rpmhpd - qcom,sm8250-rpmhpd - qcom,sm8350-rpmhpd diff --git a/Documentation/devicetree/bindings/power/reset/qcom,pon.yaml b/Documentation/devicetree/bindings/power/reset/qcom,pon.yaml index e7b436d2e757..d96170eecbd2 100644 --- a/Documentation/devicetree/bindings/power/reset/qcom,pon.yaml +++ b/Documentation/devicetree/bindings/power/reset/qcom,pon.yaml @@ -15,18 +15,27 @@ description: | This DT node has pwrkey and resin as sub nodes. -allOf: - - $ref: reboot-mode.yaml# - properties: compatible: enum: - qcom,pm8916-pon - qcom,pms405-pon - qcom,pm8998-pon + - qcom,pmk8350-pon reg: - maxItems: 1 + description: | + Specifies the SPMI base address for the PON (power-on) peripheral. For + PMICs that have the PON peripheral (GEN3) split into PON_HLOS and PON_PBS + (e.g. PMK8350), this can hold addresses of both PON_HLOS and PON_PBS + peripherals. In that case, the PON_PBS address needs to be specified to + facilitate software debouncing on some PMIC. + minItems: 1 + maxItems: 2 + + reg-names: + minItems: 1 + maxItems: 2 pwrkey: type: object @@ -46,6 +55,39 @@ required: unevaluatedProperties: false +allOf: + - $ref: reboot-mode.yaml# + - if: + properties: + compatible: + contains: + enum: + - qcom,pm8916-pon + - qcom,pms405-pon + - qcom,pm8998-pon + then: + properties: + reg: + maxItems: 1 + reg-names: + items: + - const: pon + - if: + properties: + compatible: + contains: + const: qcom,pmk8350-pon + then: + properties: + reg: + minItems: 1 + maxItems: 2 + reg-names: + minItems: 1 + items: + - const: hlos + - const: pbs + examples: - | #include <dt-bindings/interrupt-controller/irq.h> diff --git a/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml b/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml index 3deb0fc8dfd3..0d5e999a58f1 100644 --- a/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml +++ b/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml @@ -41,6 +41,8 @@ properties: - rockchip,rk3368-power-controller - rockchip,rk3399-power-controller - rockchip,rk3568-power-controller + - rockchip,rk3588-power-controller + - rockchip,rv1126-power-controller "#power-domain-cells": const: 1 @@ -119,6 +121,8 @@ $defs: "include/dt-bindings/power/rk3368-power.h" "include/dt-bindings/power/rk3399-power.h" "include/dt-bindings/power/rk3568-power.h" + "include/dt-bindings/power/rk3588-power.h" + "include/dt-bindings/power/rockchip,rv1126-power.h" clocks: minItems: 1 diff --git a/Documentation/devicetree/bindings/power/rockchip-io-domain.yaml b/Documentation/devicetree/bindings/power/rockchip-io-domain.yaml index 1727bf108979..d71fc72d4464 100644 --- a/Documentation/devicetree/bindings/power/rockchip-io-domain.yaml +++ b/Documentation/devicetree/bindings/power/rockchip-io-domain.yaml @@ -58,6 +58,7 @@ properties: - rockchip,rk3568-pmu-io-voltage-domain - rockchip,rv1108-io-voltage-domain - rockchip,rv1108-pmu-io-voltage-domain + - rockchip,rv1126-pmu-io-voltage-domain required: - compatible @@ -78,6 +79,7 @@ allOf: - $ref: "#/$defs/rk3568-pmu" - $ref: "#/$defs/rv1108" - $ref: "#/$defs/rv1108-pmu" + - $ref: "#/$defs/rv1126-pmu" $defs: px30: @@ -344,6 +346,34 @@ $defs: pmu-supply: description: The supply connected to PMUIO_VDD. + rv1126-pmu: + if: + properties: + compatible: + contains: + const: rockchip,rv1126-pmu-io-voltage-domain + + then: + properties: + vccio1-supply: + description: The supply connected to VCCIO1. + vccio2-supply: + description: The supply connected to VCCIO2. + vccio3-supply: + description: The supply connected to VCCIO3. + vccio4-supply: + description: The supply connected to VCCIO4. + vccio5-supply: + description: The supply connected to VCCIO5. + vccio6-supply: + description: The supply connected to VCCIO6. + vccio7-supply: + description: The supply connected to VCCIO7. + pmuio0-supply: + description: The supply connected to PMUIO0. + pmuio1-supply: + description: The supply connected to PMUIO1. + examples: - | io-domains { diff --git a/Documentation/devicetree/bindings/power/supply/mediatek,mt6370-charger.yaml b/Documentation/devicetree/bindings/power/supply/mediatek,mt6370-charger.yaml new file mode 100644 index 000000000000..fd491c598a00 --- /dev/null +++ b/Documentation/devicetree/bindings/power/supply/mediatek,mt6370-charger.yaml @@ -0,0 +1,96 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/power/supply/mediatek,mt6370-charger.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek MT6370 Battery Charger + +maintainers: + - ChiaEn Wu <chiaen_wu@richtek.com> + +description: | + This module is part of the MT6370 MFD device. + Provides Battery Charger, Boost for OTG devices and BC1.2 detection. + +properties: + compatible: + const: mediatek,mt6370-charger + + interrupts: + description: | + Specify what irqs are needed to be handled by MT6370 Charger driver. + We need to use the IRQ "MT6370_IRQ_OVPCTRL_UVP_D" to know when USB + is plugged in, and then the driver will enable BC1.2 detection. + After the hardware of MT6370 completes the BC1.2 detection, + IRQ "MT6370_IRQ_ATTACH" will be triggered, and the driver will know + the result of BC1.2 detection. + When the IRQ "MT6370_IRQ_CHG_MIVR" is triggered, it means that the + hardware enters the "Minimum Input Voltage Regulation loop" and + a workaround needs to be applied at this time. + In summary, "MT6370_IRQ_OVPCTRL_UVP_D", "MT6370_IRQ_ATTACH" and + "MT6370_IRQ_CHG_MIVR" are required in this charger driver. + items: + - description: irq of "USB is plugged in" + - description: irq of "BC1.2 is done" + - description: irq of "Minimum Input Voltage Regulation loop is active" + + interrupt-names: + items: + - const: uvp_d_evt + - const: attach_i + - const: mivr + + io-channels: + description: | + Use ADC channel to read VBUS, IBUS, IBAT, etc., info. + minItems: 1 + items: + - description: | + VBUS voltage with lower accuracy (+-75mV) but higher measure + range (1~22V) + - description: | + VBUS voltage with higher accuracy (+-30mV) but lower measure + range (1~9.76V) + - description: the main system input voltage + - description: battery voltage + - description: battery temperature-sense input voltage + - description: IBUS current (required) + - description: battery current + - description: | + regulated output voltage to supply for the PWM low-side gate driver + and the bootstrap capacitor + - description: IC junction temperature + + io-channel-names: + minItems: 1 + items: + - const: vbusdiv5 + - const: vbusdiv2 + - const: vsys + - const: vbat + - const: ts_bat + - const: ibus + - const: ibat + - const: chg_vddp + - const: temp_jc + + usb-otg-vbus-regulator: + type: object + description: OTG boost regulator. + unevaluatedProperties: false + $ref: /schemas/regulator/regulator.yaml# + + properties: + enable-gpios: + maxItems: 1 + +required: + - compatible + - interrupts + - interrupt-names + - io-channels + +additionalProperties: false + +... diff --git a/Documentation/devicetree/bindings/ptp/ptp-idt82p33.yaml b/Documentation/devicetree/bindings/ptp/ptp-idt82p33.yaml index 9bc664f414a1..51381e4cbb1f 100644 --- a/Documentation/devicetree/bindings/ptp/ptp-idt82p33.yaml +++ b/Documentation/devicetree/bindings/ptp/ptp-idt82p33.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/ptp/ptp-idt82p33.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: IDT 82P33 PTP Clock Device Tree Bindings +title: IDT 82P33 PTP Clock description: | IDT 82P33XXX Synchronization Management Unit (SMU) based PTP clock diff --git a/Documentation/devicetree/bindings/ptp/ptp-idtcm.yaml b/Documentation/devicetree/bindings/ptp/ptp-idtcm.yaml index 658cec67743e..7cf32663c806 100644 --- a/Documentation/devicetree/bindings/ptp/ptp-idtcm.yaml +++ b/Documentation/devicetree/bindings/ptp/ptp-idtcm.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/ptp/ptp-idtcm.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: IDT ClockMatrix (TM) PTP Clock Device Tree Bindings +title: IDT ClockMatrix (TM) PTP Clock maintainers: - Vincent Cheng <vincent.cheng.xh@renesas.com> diff --git a/Documentation/devicetree/bindings/pwm/allwinner,sun4i-a10-pwm.yaml b/Documentation/devicetree/bindings/pwm/allwinner,sun4i-a10-pwm.yaml index e93e935564fb..4cc3cc7c50be 100644 --- a/Documentation/devicetree/bindings/pwm/allwinner,sun4i-a10-pwm.yaml +++ b/Documentation/devicetree/bindings/pwm/allwinner,sun4i-a10-pwm.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/pwm/allwinner,sun4i-a10-pwm.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 PWM Device Tree Bindings +title: Allwinner A10 PWM maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/pwm/intel,keembay-pwm.yaml b/Documentation/devicetree/bindings/pwm/intel,keembay-pwm.yaml index ec9f6bab798c..5b18a5913ed1 100644 --- a/Documentation/devicetree/bindings/pwm/intel,keembay-pwm.yaml +++ b/Documentation/devicetree/bindings/pwm/intel,keembay-pwm.yaml @@ -5,7 +5,7 @@ $id: http://devicetree.org/schemas/pwm/intel,keembay-pwm.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Intel Keem Bay PWM Device Tree Bindings +title: Intel Keem Bay PWM maintainers: - Vijayakannan Ayyathurai <vijayakannan.ayyathurai@intel.com> diff --git a/Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml b/Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml index e4fe2d1bfef5..0088bc8e7c54 100644 --- a/Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml +++ b/Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/pwm/mediatek,pwm-disp.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: MediaTek DISP_PWM Controller Device Tree Bindings +title: MediaTek DISP_PWM Controller maintainers: - Jitao Shi <jitao.shi@mediatek.com> @@ -27,6 +27,7 @@ properties: - items: - enum: - mediatek,mt8186-disp-pwm + - mediatek,mt8188-disp-pwm - mediatek,mt8192-disp-pwm - mediatek,mt8195-disp-pwm - const: mediatek,mt8183-disp-pwm diff --git a/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml b/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml index a336ff9364a9..f2d1dc7e7b3f 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml +++ b/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml @@ -21,6 +21,7 @@ properties: - const: rockchip,rk2928-pwm - items: - enum: + - rockchip,rk3128-pwm - rockchip,rk3368-pwm - rockchip,rk3399-pwm - rockchip,rv1108-pwm @@ -30,6 +31,7 @@ properties: - rockchip,px30-pwm - rockchip,rk3308-pwm - rockchip,rk3568-pwm + - rockchip,rk3588-pwm - const: rockchip,rk3328-pwm reg: diff --git a/Documentation/devicetree/bindings/regulator/dlg,da9121.yaml b/Documentation/devicetree/bindings/regulator/dlg,da9121.yaml index 24ace6e1e5ec..63e1161a87de 100644 --- a/Documentation/devicetree/bindings/regulator/dlg,da9121.yaml +++ b/Documentation/devicetree/bindings/regulator/dlg,da9121.yaml @@ -83,6 +83,7 @@ properties: regulators: type: object + additionalProperties: false description: | List of regulators provided by the device diff --git a/Documentation/devicetree/bindings/regulator/gpio-regulator.yaml b/Documentation/devicetree/bindings/regulator/gpio-regulator.yaml index f7e3d8fd3bf3..6c3371d706bb 100644 --- a/Documentation/devicetree/bindings/regulator/gpio-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/gpio-regulator.yaml @@ -85,6 +85,9 @@ properties: - current default: voltage + vin-supply: + description: Input supply phandle. + required: - compatible - regulator-name diff --git a/Documentation/devicetree/bindings/regulator/maxim,max77802.yaml b/Documentation/devicetree/bindings/regulator/maxim,max77802.yaml index 236348c4710c..71138c611b6c 100644 --- a/Documentation/devicetree/bindings/regulator/maxim,max77802.yaml +++ b/Documentation/devicetree/bindings/regulator/maxim,max77802.yaml @@ -79,6 +79,7 @@ patternProperties: patternProperties: regulator-state-(standby|mem|disk): type: object + additionalProperties: true properties: regulator-mode: false diff --git a/Documentation/devicetree/bindings/regulator/maxim,max8997.yaml b/Documentation/devicetree/bindings/regulator/maxim,max8997.yaml index 4321f061a7f6..2b266ea43716 100644 --- a/Documentation/devicetree/bindings/regulator/maxim,max8997.yaml +++ b/Documentation/devicetree/bindings/regulator/maxim,max8997.yaml @@ -111,6 +111,7 @@ properties: regulators: type: object + additionalProperties: false description: List of child nodes that specify the regulators. diff --git a/Documentation/devicetree/bindings/regulator/mediatek,mt6331-regulator.yaml b/Documentation/devicetree/bindings/regulator/mediatek,mt6331-regulator.yaml new file mode 100644 index 000000000000..771cc134393c --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/mediatek,mt6331-regulator.yaml @@ -0,0 +1,273 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/mediatek,mt6331-regulator.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MT6331 Regulator from MediaTek Integrated + +maintainers: + - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> + +description: | + The MT6331 PMIC provides 6 BUCK and 21 LDO (Low Dropout) regulators + and nodes are named according to the regulator type: + buck-<name> and ldo-<name>. + MT6331 regulators node should be sub node of the MT6397 MFD node. + +patternProperties: + "^buck-v(core2|io18|dvfs11|dvfs12|dvfs13|dvfs14)$": + type: object + $ref: "regulator.yaml#" + + properties: + regulator-name: + pattern: "^v(core2|io18|dvfs11|dvfs12|dvfs13|dvfs14)$" + + unevaluatedProperties: false + + "^ldo-v(avdd32aud|auxa32)$": + type: object + $ref: "regulator.yaml#" + + properties: + regulator-name: + pattern: "^v(avdd32aud|auxa32)$" + + unevaluatedProperties: false + + "^ldo-v(dig18|emc33|ibr|mc|mch|mipi|rtc|sram|usb10)$": + type: object + $ref: "regulator.yaml#" + + properties: + regulator-name: + pattern: "^v(dig18|emc33|ibr|mc|mch|mipi|rtc|sram|usb10)$" + + unevaluatedProperties: false + + "^ldo-vcam(a|af|d|io)$": + type: object + $ref: "regulator.yaml#" + + properties: + regulator-name: + pattern: "^vcam(a|af|d|io)$" + + unevaluatedProperties: false + + "^ldo-vtcxo[12]$": + type: object + $ref: "regulator.yaml#" + + properties: + regulator-name: + pattern: "^vtcxo[12]$" + + required: + - regulator-name + + unevaluatedProperties: false + + "^ldo-vgp[1234]$": + type: object + $ref: "regulator.yaml#" + + properties: + regulator-name: + pattern: "^vgp[12]$" + + required: + - regulator-name + + unevaluatedProperties: false + +additionalProperties: false + +examples: + - | + pmic { + regulators { + mt6331_vdvfs11_reg: buck-vdvfs11 { + regulator-name = "vdvfs11"; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1493750>; + regulator-ramp-delay = <12500>; + regulator-enable-ramp-delay = <1>; + regulator-allowed-modes = <0 1>; + }; + mt6331_vdvfs12_reg: buck-vdvfs12 { + regulator-name = "vdvfs12"; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1493750>; + regulator-ramp-delay = <12500>; + regulator-enable-ramp-delay = <1>; + regulator-allowed-modes = <0 1>; + }; + mt6331_vdvfs13_reg: buck-vdvfs13 { + regulator-name = "vdvfs13"; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1493750>; + regulator-ramp-delay = <12500>; + regulator-enable-ramp-delay = <1>; + regulator-allowed-modes = <0 1>; + }; + mt6331_vdvfs14_reg: buck-vdvfs14 { + regulator-name = "vdvfs14"; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1493750>; + regulator-ramp-delay = <12500>; + regulator-enable-ramp-delay = <1>; + regulator-allowed-modes = <0 1>; + }; + mt6331_vcore2_reg: buck-vcore2 { + regulator-name = "vcore2"; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1493750>; + regulator-ramp-delay = <12500>; + regulator-enable-ramp-delay = <1>; + regulator-allowed-modes = <0 1>; + }; + mt6331_vio18_reg: buck-vio18 { + regulator-name = "vio18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-ramp-delay = <12500>; + regulator-enable-ramp-delay = <0>; + regulator-allowed-modes = <0 1>; + }; + mt6331_vtcxo1_reg: ldo-vtcxo1 { + regulator-name = "vtcxo1"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + regulator-boot-on; + }; + mt6331_vtcxo2_reg: ldo-vtcxo2 { + regulator-name = "vtcxo2"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + regulator-boot-on; + }; + mt6331_avdd32_aud_reg: ldo-avdd32aud { + regulator-name = "avdd32_aud"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <3200000>; + }; + mt6331_vauxa32_reg: ldo-vauxa32 { + regulator-name = "vauxa32"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <3200000>; + }; + mt6331_vcama_reg: ldo-vcama { + regulator-name = "vcama"; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + }; + mt6331_vio28_reg: ldo-vio28 { + regulator-name = "vio28"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + regulator-boot-on; + }; + mt6331_vcamaf_reg: ldo-vcamaf { + regulator-name = "vcam_af"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3300000>; + }; + mt6331_vmc_reg: ldo-vmc { + regulator-name = "vmc"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + }; + mt6331_vmch_reg: ldo-vmch { + regulator-name = "vmch"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3300000>; + }; + mt6331_vemc33_reg: ldo-vemc33 { + regulator-name = "vemc33"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + mt6331_vgp1_reg: ldo-vgp1 { + regulator-name = "vgp1"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3300000>; + }; + mt6331_vsim1_reg: ldo-vsim1 { + regulator-name = "vsim1"; + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <3100000>; + }; + mt6331_vsim2_reg: ldo-vsim2 { + regulator-name = "vsim2"; + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <3100000>; + }; + mt6331_vmipi_reg: ldo-vmipi { + regulator-name = "vmipi"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3300000>; + }; + mt6331_vibr_reg: ldo-vibr { + regulator-name = "vibr"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3300000>; + }; + mt6331_vgp4_reg: ldo-vgp4 { + regulator-name = "vgp4"; + regulator-min-microvolt = <1600000>; + regulator-max-microvolt = <2200000>; + }; + mt6331_vcamd_reg: ldo-vcamd { + regulator-name = "vcamd"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1500000>; + }; + mt6331_vusb10_reg: ldo-vusb10 { + regulator-name = "vusb"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1300000>; + regulator-boot-on; + }; + mt6331_vcamio_reg: ldo-vcamio { + regulator-name = "vcam_io"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1800000>; + }; + mt6331_vsram_reg: ldo-vsram { + regulator-name = "vsram"; + regulator-min-microvolt = <1012500>; + regulator-max-microvolt = <1012500>; + regulator-always-on; + regulator-boot-on; + }; + mt6331_vgp2_reg: ldo-vgp2 { + regulator-name = "vgp2"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1500000>; + regulator-boot-on; + }; + mt6331_vgp3_reg: ldo-vgp3 { + regulator-name = "vgp3"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1800000>; + }; + mt6331_vrtc_reg: ldo-vrtc { + regulator-name = "vrtc"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + }; + mt6331_vdig18_reg: ldo-vdig18 { + regulator-name = "dvdd18_dig"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + }; + }; +... diff --git a/Documentation/devicetree/bindings/regulator/mediatek,mt6332-regulator.yaml b/Documentation/devicetree/bindings/regulator/mediatek,mt6332-regulator.yaml new file mode 100644 index 000000000000..3218f43e6957 --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/mediatek,mt6332-regulator.yaml @@ -0,0 +1,112 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/mediatek,mt6332-regulator.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MT6332 Regulator from MediaTek Integrated + +maintainers: + - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> + +description: | + The MT6332 Companion PMIC provides 6 BUCK and 4 LDO (Low Dropout) + regulators and nodes are named according to the regulator type: + buck-<name> and ldo-<name>. + MT6332 regulators node should be sub node of the MT6397 MFD node. + +patternProperties: + "^buck-v(dram|dvfs2|pa|rf18a|rf18b|sbst)$": + type: object + $ref: "regulator.yaml#" + + properties: + regulator-name: + pattern: "^v(dram|dvfs2|pa|rf18a|rf18b|sbst)$" + + unevaluatedProperties: false + + "^ldo-v(bif28|dig18|sram|usb33)$": + type: object + $ref: "regulator.yaml#" + + properties: + regulator-name: + pattern: "^v(bif28|dig18|sram|usb33)$" + + unevaluatedProperties: false + +additionalProperties: false + +examples: + - | + pmic { + regulators { + mt6332_vdram_reg: buck-vdram { + regulator-name = "vdram"; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1493750>; + regulator-ramp-delay = <12500>; + regulator-allowed-modes = <0 1>; + regulator-always-on; + }; + mt6332_vdvfs2_reg: buck-vdvfs2 { + regulator-name = "vdvfs2"; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1312500>; + regulator-ramp-delay = <12500>; + regulator-enable-ramp-delay = <1>; + regulator-allowed-modes = <0 1>; + }; + mt6332_vpa_reg: buck-vpa { + regulator-name = "vpa"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3400000>; + }; + mt6332_vrf18a_reg: buck-vrf18a { + regulator-name = "vrf18a"; + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <2240625>; + regulator-allowed-modes = <0 1>; + }; + mt6332_vrf18b_reg: buck-vrf18b { + regulator-name = "vrf18b"; + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <2240625>; + regulator-allowed-modes = <0 1>; + }; + mt6332_vsbst_reg: buck-vsbst { + regulator-name = "vsbst"; + regulator-min-microvolt = <3500000>; + regulator-max-microvolt = <7468750>; + }; + mt6332_vauxb32_reg: ldo-vauxb32 { + regulator-name = "vauxb32"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <3200000>; + }; + mt6332_vbif28_reg: ldo-vbif28 { + regulator-name = "vbif28"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + }; + mt6332_vdig18_reg: ldo-vdig18 { + regulator-name = "vdig18"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + mt6332_vsram_reg: ldo-vsram { + regulator-name = "vauxa32"; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1493750>; + regulator-always-on; + }; + mt6332_vusb33_reg: ldo-vusb33 { + regulator-name = "vusb33"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + }; + }; +... diff --git a/Documentation/devicetree/bindings/regulator/mt6315-regulator.yaml b/Documentation/devicetree/bindings/regulator/mt6315-regulator.yaml index 37402c370fbb..364b58730be2 100644 --- a/Documentation/devicetree/bindings/regulator/mt6315-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/mt6315-regulator.yaml @@ -29,6 +29,7 @@ properties: "^vbuck[1-4]$": type: object $ref: "regulator.yaml#" + unevaluatedProperties: false properties: regulator-compatible: diff --git a/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml b/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml index 9a36bee750af..90c3bda31c23 100644 --- a/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml @@ -37,6 +37,8 @@ description: | For PM6150, smps1 - smps5, ldo1 - ldo19 For PM6150L, smps1 - smps8, ldo1 - ldo11, bob For PM6350, smps1 - smps5, ldo1 - ldo22 + For PM660, smps1 - smps6, ldo1 - ldo3, ldo5 - ldo19 + For PM660L, smps1 - smps3, smps5, ldo1 - ldo8, bob For PM7325, smps1 - smps8, ldo1 - ldo19 For PM8005, smps1 - smps4 For PM8009, smps1 - smps2, ldo1 - ldo7 @@ -57,6 +59,8 @@ properties: - qcom,pm6150-rpmh-regulators - qcom,pm6150l-rpmh-regulators - qcom,pm6350-rpmh-regulators + - qcom,pm660-rpmh-regulators + - qcom,pm660l-rpmh-regulators - qcom,pm7325-rpmh-regulators - qcom,pm8005-rpmh-regulators - qcom,pm8009-rpmh-regulators @@ -99,12 +103,16 @@ properties: type: object $ref: "regulator.yaml#" description: BOB regulator node. + dependencies: + regulator-allow-set-load: ["regulator-allowed-modes"] patternProperties: "^(smps|ldo|lvs)[0-9]+$": type: object $ref: "regulator.yaml#" description: smps/ldo regulator nodes(s). + dependencies: + regulator-allow-set-load: ["regulator-allowed-modes"] required: - compatible @@ -148,6 +156,38 @@ allOf: properties: compatible: enum: + - qcom,pm660-rpmh-regulators + then: + properties: + vdd-l1-l6-l7-supply: true + vdd-l2-l3-supply: true + vdd-l5-supply: true + vdd-l8-l9-l10-l11-l12-l13-l14-supply: true + vdd-l15-l16-l17-l18-l19-supply: true + patternProperties: + "^vdd-s[1-6]-supply$": true + + - if: + properties: + compatible: + enum: + - qcom,pm660l-rpmh-regulators + then: + properties: + vdd-bob-supply: + description: BOB regulator parent supply phandle. + vdd-l1-l9-l10-supply: true + vdd-l2-supply: true + vdd-l3-l5-l7-l8-supply: true + vdd-l4-l6-supply: true + vdd-s3-s4-supply: true + patternProperties: + "^vdd-s[125]-supply$": true + + - if: + properties: + compatible: + enum: - qcom,pm7325-rpmh-regulators then: properties: diff --git a/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml b/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml index c233461cc980..961eed51912c 100644 --- a/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml @@ -24,6 +24,17 @@ description: For mp5496, s2 + For pm2250, s1, s2, s3, s4, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11, + l12, l13, l14, l15, l16, l17, l18, l19, l20, l21, l22 + + For pm6125 s1, s2, s3, s4, s5, s6, s7, s8, l1, l2, l3, l5, l6, l7, l8, l9, + l10, l22, l12, l13, l14, l15, l16, l17, l18, l19, l20, l21, l22, l23, l24 + + For pm660, s1, s2, s3, s4, s5, s6, l1, l2, l3, l5, l6, l7, l8, l9, l10, l22, + l12, l13, l14, l15, l16, l17, l18, l19 + + For pm660l s1, s2, s3, s5, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, bob + For pm8226, s1, s2, s3, s4, s5, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11, l12, l13, l14, l15, l16, l17, l18, l19, l20, l21, l22, l23, l24, l25, l26, l27, l28, lvs1 @@ -52,11 +63,6 @@ description: l3, l4, l5, l6, l7, l8, l9, l10, l11, l12, l13, l14, l15, l16, l17, l18, l19, l20, l21, l22, l23, l24, l25, l26, l27, l28, lvs1, lvs2 - For pm660, s1, s2, s3, s4, s5, s6, l1, l2, l3, l5, l6, l7, l8, l9, l10, l22, - l12, l13, l14, l15, l16, l17, l18, l19 - - For pm660l s1, s2, s3, s5, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, bob - For pma8084, s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11, l12, l13, l14, l15, l16, l17, l18, l19, l20, l21, l22, l23, l24, l25, l26, l27, lvs1, lvs2, lvs3, lvs4, 5vs1 @@ -68,9 +74,6 @@ description: For pms405, s1, s2, s3, s4, s5, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11, l12, l13 - For pm2250, s1, s2, s3, s4, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11, - l12, l13, l14, l15, l16, l17, l18, l19, l20, l21, l22 - maintainers: - Andy Gross <agross@kernel.org> - Bjorn Andersson <bjorn.andersson@linaro.org> @@ -79,6 +82,10 @@ properties: compatible: enum: - qcom,rpm-mp5496-regulators + - qcom,rpm-pm2250-regulators + - qcom,rpm-pm6125-regulators + - qcom,rpm-pm660-regulators + - qcom,rpm-pm660l-regulators - qcom,rpm-pm8226-regulators - qcom,rpm-pm8841-regulators - qcom,rpm-pm8909-regulators @@ -88,13 +95,10 @@ properties: - qcom,rpm-pm8953-regulators - qcom,rpm-pm8994-regulators - qcom,rpm-pm8998-regulators - - qcom,rpm-pm660-regulators - - qcom,rpm-pm660l-regulators - qcom,rpm-pma8084-regulators - qcom,rpm-pmi8994-regulators - qcom,rpm-pmi8998-regulators - qcom,rpm-pms405-regulators - - qcom,rpm-pm2250-regulators patternProperties: ".*-supply$": diff --git a/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.yaml b/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.yaml index 8b7c4af4b551..bdf34c2de96b 100644 --- a/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.yaml @@ -12,6 +12,7 @@ maintainers: properties: compatible: enum: + - qcom,pm6125-regulators - qcom,pm660-regulators - qcom,pm660l-regulators - qcom,pm8004-regulators @@ -35,6 +36,7 @@ patternProperties: description: List of regulators and its properties type: object $ref: regulator.yaml# + unevaluatedProperties: false properties: qcom,ocp-max-retries: @@ -100,8 +102,6 @@ patternProperties: SAW controlled gang leader. Will be configured as SAW regulator. type: boolean - unevaluatedProperties: false - required: - compatible @@ -111,6 +111,25 @@ allOf: compatible: contains: enum: + - qcom,pm6125-regulators + then: + properties: + vdd_l1_l7_l17_l18-supply: true + vdd_l2_l3_l4-supply: true + vdd_l5_l15_l19_l20_l21_l22-supply: true + vdd_l6_l8-supply: true + vdd_l9_l11-supply: true + vdd_l10_l13_l14-supply: true + vdd_l12_l16-supply: true + vdd_l23_l24-supply: true + patternProperties: + "^vdd_s[1-8]-supply$": true + + - if: + properties: + compatible: + contains: + enum: - qcom,pm660-regulators then: properties: @@ -121,6 +140,7 @@ allOf: vdd_l8_l9_l10_l11_l12_l13_l14-supply: true patternProperties: "^vdd_s[1-6]-supply$": true + - if: properties: compatible: @@ -135,6 +155,7 @@ allOf: vdd_l4_l6-supply: true patternProperties: "^vdd_s[1-5]-supply$": true + - if: properties: compatible: @@ -144,6 +165,7 @@ allOf: then: patternProperties: "^vdd_s[25]-supply$": true + - if: properties: compatible: @@ -153,6 +175,7 @@ allOf: then: patternProperties: "^vdd_s[1-4]-supply$": true + - if: properties: compatible: @@ -172,6 +195,7 @@ allOf: vdd_lvs1-supply: true patternProperties: "^vdd_s[1-5]-supply$": true + - if: properties: compatible: @@ -181,6 +205,7 @@ allOf: then: patternProperties: "^vdd_s[1-8]-supply$": true + - if: properties: compatible: @@ -196,6 +221,7 @@ allOf: patternProperties: "^vdd_l[27]-supply$": true "^vdd_s[1-4]-supply$": true + - if: properties: compatible: @@ -224,6 +250,7 @@ allOf: vin_5vs-supply: true patternProperties: "^vdd_s[1-3]-supply$": true + - if: properties: compatible: @@ -242,6 +269,7 @@ allOf: vdd_l9_l10_l13_l14_l15_l18-supply: true patternProperties: "^vdd_s[1-6]-supply$": true + - if: properties: compatible: @@ -266,6 +294,7 @@ allOf: vdd_lvs_1_2-supply: true patternProperties: "^vdd_s[1-9][0-2]?-supply$": true + - if: properties: compatible: @@ -277,6 +306,7 @@ allOf: vdd_l1-supply: true patternProperties: "^vdd_s[1-3]-supply$": true + - if: properties: compatible: @@ -292,6 +322,7 @@ allOf: patternProperties: "^vdd_l[479]-supply$": true "^vdd_s[1-5]-supply$": true + - if: properties: compatible: diff --git a/Documentation/devicetree/bindings/regulator/qcom-labibb-regulator.yaml b/Documentation/devicetree/bindings/regulator/qcom-labibb-regulator.yaml index 1ddc1efd19e2..f97b8083678f 100644 --- a/Documentation/devicetree/bindings/regulator/qcom-labibb-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/qcom-labibb-regulator.yaml @@ -20,6 +20,7 @@ properties: lab: type: object + additionalProperties: false properties: qcom,soft-start-us: @@ -33,11 +34,19 @@ properties: description: Short-circuit and over-current interrupts for lab. + interrupt-names: + minItems: 1 + items: + - const: sc-err + - const: ocp + required: - interrupts + - interrupt-names ibb: type: object + additionalProperties: false properties: qcom,discharge-resistor-kohms: @@ -52,8 +61,15 @@ properties: description: Short-circuit and over-current interrupts for ibb. + interrupt-names: + minItems: 1 + items: + - const: sc-err + - const: ocp + required: - interrupts + - interrupt-names required: - compatible diff --git a/Documentation/devicetree/bindings/regulator/richtek,rt4801-regulator.yaml b/Documentation/devicetree/bindings/regulator/richtek,rt4801-regulator.yaml index 091150c4e579..4a8a221bc902 100644 --- a/Documentation/devicetree/bindings/regulator/richtek,rt4801-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/richtek,rt4801-regulator.yaml @@ -42,6 +42,7 @@ patternProperties: "^DSV(P|N)$": type: object $ref: regulator.yaml# + unevaluatedProperties: false description: Properties for single display bias regulator. diff --git a/Documentation/devicetree/bindings/regulator/rohm,bd71815-regulator.yaml b/Documentation/devicetree/bindings/regulator/rohm,bd71815-regulator.yaml index 7d0adb74a396..d61e8675f067 100644 --- a/Documentation/devicetree/bindings/regulator/rohm,bd71815-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/rohm,bd71815-regulator.yaml @@ -27,6 +27,7 @@ properties: description: properties for wled regulator $ref: regulator.yaml# + unevaluatedProperties: false properties: regulator-name: diff --git a/Documentation/devicetree/bindings/regulator/silergy,sy8106a.yaml b/Documentation/devicetree/bindings/regulator/silergy,sy8106a.yaml index a52a67c869b5..c3a902e11b5d 100644 --- a/Documentation/devicetree/bindings/regulator/silergy,sy8106a.yaml +++ b/Documentation/devicetree/bindings/regulator/silergy,sy8106a.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/regulator/silergy,sy8106a.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Silergy SY8106A Voltage Regulator Device Tree Bindings +title: Silergy SY8106A Voltage Regulator maintainers: - Ondrej Jirman <megous@megous.com> diff --git a/Documentation/devicetree/bindings/regulator/ti,tps65219.yaml b/Documentation/devicetree/bindings/regulator/ti,tps65219.yaml new file mode 100644 index 000000000000..78be79930fda --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/ti,tps65219.yaml @@ -0,0 +1,173 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/ti,tps65219.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI tps65219 Power Management Integrated Circuit regulators + +maintainers: + - Jerome Neanne <jerome.neanne@baylibre.com> + +description: | + Regulator nodes should be named to buck<number> and ldo<number>. + +properties: + compatible: + enum: + - ti,tps65219 + + reg: + maxItems: 1 + + system-power-controller: + type: boolean + description: Optional property that indicates that this device is + controlling system power. + + interrupts: + description: Short-circuit, over-current, under-voltage for regulators, PB interrupts. + maxItems: 1 + + interrupt-controller: true + + '#interrupt-cells': + description: Specifies the PIN numbers and Flags, as defined in + include/dt-bindings/interrupt-controller/irq.h + const: 1 + + ti,power-button: + type: boolean + description: | + Optional property that sets the EN/PB/VSENSE pin to be a + power-button. + TPS65219 has a multipurpose pin called EN/PB/VSENSE that can be either + 1. EN in which case it functions as an enable pin. + 2. VSENSE which compares the voltages and triggers an automatic + on/off request. + 3. PB in which case it can be configured to trigger an interrupt + to the SoC. + ti,power-button reflects the last one of those options + where the board has a button wired to the pin and triggers + an interrupt on pressing it. + +patternProperties: + "^buck[1-3]-supply$": + description: Input supply phandle of one regulator. + + "^ldo[1-4]-supply$": + description: Input supply phandle of one regulator. + + regulators: + type: object + description: | + list of regulators provided by this controller + + patternProperties: + "^ldo[1-4]$": + type: object + $ref: regulator.yaml# + description: + Properties for single LDO regulator. + + unevaluatedProperties: false + + "^buck[1-3]$": + type: object + $ref: regulator.yaml# + description: + Properties for single BUCK regulator. + + unevaluatedProperties: false + + additionalProperties: false + +required: + - compatible + - reg + - interrupts + - regulators + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + i2c { + #address-cells = <1>; + #size-cells = <0>; + + tps65219: pmic@30 { + compatible = "ti,tps65219"; + reg = <0x30>; + buck1-supply = <&vcc_3v3_sys>; + buck2-supply = <&vcc_3v3_sys>; + buck3-supply = <&vcc_3v3_sys>; + ldo1-supply = <&vcc_3v3_sys>; + ldo2-supply = <&buck2_reg>; + ldo3-supply = <&vcc_3v3_sys>; + ldo4-supply = <&vcc_3v3_sys>; + + pinctrl-0 = <&pmic_irq_pins_default>; + + interrupt-parent = <&gic500>; + interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; + ti,power-button; + + regulators { + buck1_reg: buck1 { + regulator-name = "VDD_CORE"; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <750000>; + regulator-boot-on; + regulator-always-on; + }; + + buck2_reg: buck2 { + regulator-name = "VCC1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + buck3_reg: buck3 { + regulator-name = "VDD_LPDDR4"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo1_reg: ldo1 { + regulator-name = "VDDSHV_SD_IO_PMIC"; + regulator-min-microvolt = <33000000>; + regulator-max-microvolt = <33000000>; + }; + + ldo2_reg: ldo2 { + regulator-name = "VDDAR_CORE"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo3_reg: ldo3 { + regulator-name = "VDDA_1V8"; + regulator-min-microvolt = <18000000>; + regulator-max-microvolt = <18000000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo4_reg: ldo4 { + regulator-name = "VDD_PHY_2V5"; + regulator-min-microvolt = <25000000>; + regulator-max-microvolt = <25000000>; + regulator-boot-on; + regulator-always-on; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml index 3072af5f9d79..db9e0f0c2bea 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml @@ -152,6 +152,7 @@ properties: description: Qualcomm Shared Memory subnode which represents communication edge, channels and devices related to the ADSP. + unevaluatedProperties: false glink-edge: $ref: /schemas/remoteproc/qcom,glink-edge.yaml# diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,glink-edge.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,glink-edge.yaml index fa69f7b21eed..25c27464ef25 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,glink-edge.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,glink-edge.yaml @@ -19,13 +19,17 @@ properties: apr: $ref: /schemas/soc/qcom/qcom,apr.yaml# + required: + - qcom,glink-channels description: Qualcomm APR/GPR (Asynchronous/Generic Packet Router) fastrpc: - type: object + $ref: /schemas/misc/qcom,fastrpc.yaml# + required: + - qcom,glink-channels description: - See Documentation/devicetree/bindings/misc/qcom,fastrpc.txt + Qualcomm FastRPC interrupts: maxItems: 1 diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,pil-info.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,pil-info.yaml index 9282837d64ba..a7711e3c998c 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,pil-info.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,pil-info.yaml @@ -30,7 +30,7 @@ additionalProperties: false examples: - | imem@146bf000 { - compatible = "syscon", "simple-mfd"; + compatible = "qcom,sdm630-imem", "syscon", "simple-mfd"; reg = <0x146bf000 0x1000>; #address-cells = <1>; diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-mss-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-mss-pil.yaml index e76c861165dd..e4a7da8020f4 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-mss-pil.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-mss-pil.yaml @@ -140,6 +140,7 @@ properties: glink-edge: $ref: qcom,glink-edge.yaml# + unevaluatedProperties: false description: Qualcomm G-Link subnode which represents communication edge, channels and devices related to the DSP. diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-mss-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-mss-pil.yaml index da1a5de3d38b..b4de0521a89d 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-mss-pil.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-mss-pil.yaml @@ -154,6 +154,7 @@ properties: glink-edge: $ref: qcom,glink-edge.yaml# + unevaluatedProperties: false description: Qualcomm G-Link subnode which represents communication edge, channels and devices related to the DSP. diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml index 3f06d66cbe47..b6bd33438584 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml @@ -107,6 +107,7 @@ properties: glink-edge: $ref: qcom,glink-edge.yaml# + unevaluatedProperties: false description: Qualcomm G-Link subnode which represents communication edge, channels and devices related to the ADSP. diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,smd-edge.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,smd-edge.yaml index 06eebf791e32..7ec8a6b6682c 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,smd-edge.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,smd-edge.yaml @@ -13,12 +13,30 @@ description: Qualcomm SMD subnode represents a remote subsystem or a remote processor of some sort - or in SMD language an "edge". The name of the edges are not important. + + In turn, subnodes of the "edges" represent devices tied to SMD channels on + that "edge". The names of the devices are not important. The properties of + these nodes are defined by the individual bindings for the SMD devices. See also Documentation/devicetree/bindings/soc/qcom/qcom,smd.yaml properties: $nodename: const: "smd-edge" + apr: + $ref: /schemas/soc/qcom/qcom,apr.yaml# + required: + - qcom,smd-channels + description: + Qualcomm APR/GPR (Asynchronous/Generic Packet Router) + + fastrpc: + $ref: /schemas/misc/qcom,fastrpc.yaml# + required: + - qcom,smd-channels + description: + Qualcomm FastRPC + interrupts: maxItems: 1 @@ -56,6 +74,20 @@ properties: The identifier for the remote processor as known by the rest of the system. + rpm-requests: + $ref: /schemas/soc/qcom/qcom,smd-rpm.yaml# + required: + - qcom,smd-channels + description: + Qualcomm Resource Power Manager (RPM) over SMD. + + wcnss: + $ref: /schemas/soc/qcom/qcom,wcnss.yaml + required: + - qcom,smd-channels + description: + Qualcomm WCNSS for Bluetooth, WiFi and FM radio. + required: - interrupts - qcom,smd-edge @@ -66,7 +98,7 @@ oneOf: - required: - qcom,ipc -additionalProperties: true +additionalProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/reserved-memory/google,open-dice.yaml b/Documentation/devicetree/bindings/reserved-memory/google,open-dice.yaml index 257a0b51994a..a924fcfca085 100644 --- a/Documentation/devicetree/bindings/reserved-memory/google,open-dice.yaml +++ b/Documentation/devicetree/bindings/reserved-memory/google,open-dice.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/reserved-memory/google,open-dice.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Open Profile for DICE Device Tree Bindings +title: Open Profile for DICE description: | This binding represents a reserved memory region containing data diff --git a/Documentation/devicetree/bindings/reserved-memory/memory-region.yaml b/Documentation/devicetree/bindings/reserved-memory/memory-region.yaml index 83dfe499a259..592f180e6b0d 100644 --- a/Documentation/devicetree/bindings/reserved-memory/memory-region.yaml +++ b/Documentation/devicetree/bindings/reserved-memory/memory-region.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/reserved-memory/memory-region.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Reserved Memory Region Device Tree Binding +title: Reserved Memory Region maintainers: - devicetree-spec@vger.kernel.org diff --git a/Documentation/devicetree/bindings/reserved-memory/nvidia,tegra210-emc-table.yaml b/Documentation/devicetree/bindings/reserved-memory/nvidia,tegra210-emc-table.yaml index 035a50fe3ee4..b1b0421a4255 100644 --- a/Documentation/devicetree/bindings/reserved-memory/nvidia,tegra210-emc-table.yaml +++ b/Documentation/devicetree/bindings/reserved-memory/nvidia,tegra210-emc-table.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/reserved-memory/nvidia,tegra210-emc-table.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: NVIDIA Tegra210 EMC Frequency Table Device Tree Bindings +title: NVIDIA Tegra210 EMC Frequency Table maintainers: - Thierry Reding <thierry.reding@gmail.com> diff --git a/Documentation/devicetree/bindings/reserved-memory/reserved-memory.yaml b/Documentation/devicetree/bindings/reserved-memory/reserved-memory.yaml index 7a0744052ff6..44f72bcf1782 100644 --- a/Documentation/devicetree/bindings/reserved-memory/reserved-memory.yaml +++ b/Documentation/devicetree/bindings/reserved-memory/reserved-memory.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/reserved-memory/reserved-memory.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: /reserved-memory Child Node Common Device Tree Bindings +title: /reserved-memory Child Node Common maintainers: - devicetree-spec@vger.kernel.org diff --git a/Documentation/devicetree/bindings/reset/allwinner,sun6i-a31-clock-reset.yaml b/Documentation/devicetree/bindings/reset/allwinner,sun6i-a31-clock-reset.yaml index 001c0d2a8c1f..2a248e511c18 100644 --- a/Documentation/devicetree/bindings/reset/allwinner,sun6i-a31-clock-reset.yaml +++ b/Documentation/devicetree/bindings/reset/allwinner,sun6i-a31-clock-reset.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/reset/allwinner,sun6i-a31-clock-reset.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A31 Peripheral Reset Controller Device Tree Bindings +title: Allwinner A31 Peripheral Reset Controller maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml b/Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml index 494a454928ce..98db2aa74dc8 100644 --- a/Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml +++ b/Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml @@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#" title: Amlogic Meson SoC Reset Controller maintainers: - - Neil Armstrong <narmstrong@baylibre.com> + - Neil Armstrong <neil.armstrong@linaro.org> properties: compatible: diff --git a/Documentation/devicetree/bindings/reset/canaan,k210-rst.yaml b/Documentation/devicetree/bindings/reset/canaan,k210-rst.yaml index 53e4ede9c0bd..ee8a2dcf5dfa 100644 --- a/Documentation/devicetree/bindings/reset/canaan,k210-rst.yaml +++ b/Documentation/devicetree/bindings/reset/canaan,k210-rst.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/reset/canaan,k210-rst.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Canaan Kendryte K210 Reset Controller Device Tree Bindings +title: Canaan Kendryte K210 Reset Controller maintainers: - Damien Le Moal <damien.lemoal@wdc.com> diff --git a/Documentation/devicetree/bindings/reset/starfive,jh7100-reset.yaml b/Documentation/devicetree/bindings/reset/starfive,jh7100-reset.yaml index 300359a5e14b..2f5bd616b7ae 100644 --- a/Documentation/devicetree/bindings/reset/starfive,jh7100-reset.yaml +++ b/Documentation/devicetree/bindings/reset/starfive,jh7100-reset.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/reset/starfive,jh7100-reset.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: StarFive JH7100 SoC Reset Controller Device Tree Bindings +title: StarFive JH7100 SoC Reset Controller maintainers: - Emil Renner Berthing <kernel@esmil.dk> diff --git a/Documentation/devicetree/bindings/riscv/microchip.yaml b/Documentation/devicetree/bindings/riscv/microchip.yaml index 1aa7336a9672..37f97ee4fe46 100644 --- a/Documentation/devicetree/bindings/riscv/microchip.yaml +++ b/Documentation/devicetree/bindings/riscv/microchip.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/riscv/microchip.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Microchip PolarFire SoC-based boards device tree bindings +title: Microchip PolarFire SoC-based boards maintainers: - Cyril Jean <Cyril.Jean@microchip.com> diff --git a/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml b/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml index 69cdab18d629..ca3b9be58058 100644 --- a/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml +++ b/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml @@ -17,9 +17,6 @@ description: acts as directory-based coherency manager. All the properties in ePAPR/DeviceTree specification applies for this platform. -allOf: - - $ref: /schemas/cache-controller.yaml# - select: properties: compatible: @@ -33,11 +30,16 @@ select: properties: compatible: - items: - - enum: - - sifive,fu540-c000-ccache - - sifive,fu740-c000-ccache - - const: cache + oneOf: + - items: + - enum: + - sifive,fu540-c000-ccache + - sifive,fu740-c000-ccache + - const: cache + - items: + - const: microchip,mpfs-ccache + - const: sifive,fu540-c000-ccache + - const: cache cache-block-size: const: 64 @@ -72,29 +74,46 @@ properties: The reference to the reserved-memory for the L2 Loosely Integrated Memory region. The reserved memory node should be defined as per the bindings in reserved-memory.txt. -if: - properties: - compatible: - contains: - const: sifive,fu540-c000-ccache +allOf: + - $ref: /schemas/cache-controller.yaml# -then: - properties: - interrupts: - description: | - Must contain entries for DirError, DataError and DataFail signals. - maxItems: 3 - cache-sets: - const: 1024 - -else: - properties: - interrupts: - description: | - Must contain entries for DirError, DataError, DataFail, DirFail signals. - minItems: 4 - cache-sets: - const: 2048 + - if: + properties: + compatible: + contains: + enum: + - sifive,fu740-c000-ccache + - microchip,mpfs-ccache + + then: + properties: + interrupts: + description: | + Must contain entries for DirError, DataError, DataFail, DirFail signals. + minItems: 4 + + else: + properties: + interrupts: + description: | + Must contain entries for DirError, DataError and DataFail signals. + maxItems: 3 + + - if: + properties: + compatible: + contains: + const: sifive,fu740-c000-ccache + + then: + properties: + cache-sets: + const: 2048 + + else: + properties: + cache-sets: + const: 1024 additionalProperties: false diff --git a/Documentation/devicetree/bindings/rng/amlogic,meson-rng.yaml b/Documentation/devicetree/bindings/rng/amlogic,meson-rng.yaml index 444be32a8a29..09c6c906b1f9 100644 --- a/Documentation/devicetree/bindings/rng/amlogic,meson-rng.yaml +++ b/Documentation/devicetree/bindings/rng/amlogic,meson-rng.yaml @@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#" title: Amlogic Meson Random number generator maintainers: - - Neil Armstrong <narmstrong@baylibre.com> + - Neil Armstrong <neil.armstrong@linaro.org> properties: compatible: diff --git a/Documentation/devicetree/bindings/rng/omap_rng.yaml b/Documentation/devicetree/bindings/rng/omap_rng.yaml index 010188cdbec8..ccf54fae8302 100644 --- a/Documentation/devicetree/bindings/rng/omap_rng.yaml +++ b/Documentation/devicetree/bindings/rng/omap_rng.yaml @@ -53,17 +53,6 @@ allOf: required: - interrupts - - if: - properties: - compatible: - contains: - enum: - - inside-secure,safexcel-eip76 - - then: - required: - - clocks - required: - compatible diff --git a/Documentation/devicetree/bindings/rtc/allwinner,sun4i-a10-rtc.yaml b/Documentation/devicetree/bindings/rtc/allwinner,sun4i-a10-rtc.yaml index 478b0234e8fa..dede49431733 100644 --- a/Documentation/devicetree/bindings/rtc/allwinner,sun4i-a10-rtc.yaml +++ b/Documentation/devicetree/bindings/rtc/allwinner,sun4i-a10-rtc.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/rtc/allwinner,sun4i-a10-rtc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 RTC Device Tree Bindings +title: Allwinner A10 RTC allOf: - $ref: "rtc.yaml#" diff --git a/Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml b/Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml index 6b38bd7eb3b4..04947e166cef 100644 --- a/Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml +++ b/Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/rtc/allwinner,sun6i-a31-rtc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A31 RTC Device Tree Bindings +title: Allwinner A31 RTC maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/rtc/atmel,at91rm9200-rtc.yaml b/Documentation/devicetree/bindings/rtc/atmel,at91rm9200-rtc.yaml index 994de43d17fa..0e5f0fcc26b0 100644 --- a/Documentation/devicetree/bindings/rtc/atmel,at91rm9200-rtc.yaml +++ b/Documentation/devicetree/bindings/rtc/atmel,at91rm9200-rtc.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/rtc/atmel,at91rm9200-rtc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Atmel AT91 RTC Device Tree Bindings +title: Atmel AT91 RTC allOf: - $ref: "rtc.yaml#" diff --git a/Documentation/devicetree/bindings/rtc/atmel,at91sam9260-rtt.yaml b/Documentation/devicetree/bindings/rtc/atmel,at91sam9260-rtt.yaml index 0ef1b7ff4a77..b5cd20e89daf 100644 --- a/Documentation/devicetree/bindings/rtc/atmel,at91sam9260-rtt.yaml +++ b/Documentation/devicetree/bindings/rtc/atmel,at91sam9260-rtt.yaml @@ -5,7 +5,7 @@ $id: http://devicetree.org/schemas/rtc/atmel,at91sam9260-rtt.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Atmel AT91 RTT Device Tree Bindings +title: Atmel AT91 RTT allOf: - $ref: "rtc.yaml#" diff --git a/Documentation/devicetree/bindings/rtc/microchip,mfps-rtc.yaml b/Documentation/devicetree/bindings/rtc/microchip,mfps-rtc.yaml index 500c62becd6b..7742465b9383 100644 --- a/Documentation/devicetree/bindings/rtc/microchip,mfps-rtc.yaml +++ b/Documentation/devicetree/bindings/rtc/microchip,mfps-rtc.yaml @@ -5,7 +5,7 @@ $id: http://devicetree.org/schemas/rtc/microchip,mfps-rtc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Microchip PolarFire Soc (MPFS) RTC Device Tree Bindings +title: Microchip PolarFire Soc (MPFS) RTC allOf: - $ref: rtc.yaml# diff --git a/Documentation/devicetree/bindings/rtc/microcrystal,rv3032.yaml b/Documentation/devicetree/bindings/rtc/microcrystal,rv3032.yaml index 60f9027e8299..dd6eebf06ea6 100644 --- a/Documentation/devicetree/bindings/rtc/microcrystal,rv3032.yaml +++ b/Documentation/devicetree/bindings/rtc/microcrystal,rv3032.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/rtc/microcrystal,rv3032.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Microchip RV-3032 RTC Device Tree Bindings +title: Microchip RV-3032 RTC allOf: - $ref: "rtc.yaml#" diff --git a/Documentation/devicetree/bindings/rtc/mstar,msc313-rtc.yaml b/Documentation/devicetree/bindings/rtc/mstar,msc313-rtc.yaml index 114199cf4d28..585c185d1eb3 100644 --- a/Documentation/devicetree/bindings/rtc/mstar,msc313-rtc.yaml +++ b/Documentation/devicetree/bindings/rtc/mstar,msc313-rtc.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/rtc/mstar,msc313-rtc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Mstar MSC313e RTC Device Tree Bindings +title: Mstar MSC313e RTC allOf: - $ref: "rtc.yaml#" diff --git a/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml b/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml index 72e8868db3e0..7822705ad16c 100644 --- a/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml +++ b/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml @@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#" title: Amlogic Meson SoC UART Serial Interface maintainers: - - Neil Armstrong <narmstrong@baylibre.com> + - Neil Armstrong <neil.armstrong@linaro.org> description: | The Amlogic Meson SoC UART Serial Interface is present on a large range diff --git a/Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml b/Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml new file mode 100644 index 000000000000..30b2131b5860 --- /dev/null +++ b/Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml @@ -0,0 +1,190 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/serial/atmel,at91-usart.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Atmel Universal Synchronous Asynchronous Receiver/Transmitter (USART) + +maintainers: + - Richard Genoud <richard.genoud@gmail.com> + +properties: + compatible: + oneOf: + - enum: + - atmel,at91rm9200-usart + - atmel,at91sam9260-usart + - microchip,sam9x60-usart + - items: + - const: atmel,at91rm9200-dbgu + - const: atmel,at91rm9200-usart + - items: + - const: atmel,at91sam9260-dbgu + - const: atmel,at91sam9260-usart + - items: + - const: microchip,sam9x60-dbgu + - const: microchip,sam9x60-usart + - const: atmel,at91sam9260-dbgu + - const: atmel,at91sam9260-usart + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clock-names: + minItems: 1 + items: + - const: usart + - const: gclk + + clocks: + minItems: 1 + items: + - description: USART Peripheral Clock + - description: USART Generic Clock + + dmas: + items: + - description: TX DMA Channel + - description: RX DMA Channel + + dma-names: + items: + - const: tx + - const: rx + + atmel,usart-mode: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Must be either <AT91_USART_MODE_SPI> for SPI or + <AT91_USART_MODE_SERIAL> for USART (found in dt-bindings/mfd/at91-usart.h). + enum: [ 0, 1 ] + + atmel,use-dma-rx: + type: boolean + description: use of PDC or DMA for receiving data + + atmel,use-dma-tx: + type: boolean + description: use of PDC or DMA for transmitting data + + atmel,fifo-size: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Maximum number of data the RX and TX FIFOs can store for FIFO + capable USARTS. + enum: [ 16, 32 ] + +required: + - compatible + - reg + - interrupts + - clock-names + - clocks + - atmel,usart-mode + +allOf: + - if: + properties: + atmel,usart-mode: + const: 1 + then: + allOf: + - $ref: /schemas/spi/spi-controller.yaml# + + properties: + atmel,use-dma-rx: false + + atmel,use-dma-tx: false + + atmel,fifo-size: false + + "#size-cells": + const: 0 + + "#address-cells": + const: 1 + + required: + - "#size-cells" + - "#address-cells" + + else: + allOf: + - $ref: /schemas/serial/serial.yaml# + - $ref: /schemas/serial/rs485.yaml# + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/mfd/at91-usart.h> + #include <dt-bindings/dma/at91.h> + + /* use PDC */ + usart0: serial@fff8c000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xfff8c000 0x4000>; + atmel,usart-mode = <AT91_USART_MODE_SERIAL>; + interrupts = <7>; + clocks = <&usart0_clk>; + clock-names = "usart"; + atmel,use-dma-rx; + atmel,use-dma-tx; + rts-gpios = <&pioD 15 GPIO_ACTIVE_LOW>; + cts-gpios = <&pioD 16 GPIO_ACTIVE_LOW>; + dtr-gpios = <&pioD 17 GPIO_ACTIVE_LOW>; + dsr-gpios = <&pioD 18 GPIO_ACTIVE_LOW>; + dcd-gpios = <&pioD 20 GPIO_ACTIVE_LOW>; + rng-gpios = <&pioD 19 GPIO_ACTIVE_LOW>; + }; + + - | + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/mfd/at91-usart.h> + #include <dt-bindings/dma/at91.h> + + /* use DMA */ + usart1: serial@f001c000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xf001c000 0x100>; + atmel,usart-mode = <AT91_USART_MODE_SERIAL>; + interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>; + clocks = <&usart0_clk>; + clock-names = "usart"; + atmel,use-dma-rx; + atmel,use-dma-tx; + dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>, + <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>; + dma-names = "tx", "rx"; + atmel,fifo-size = <32>; + }; + + - | + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/mfd/at91-usart.h> + #include <dt-bindings/dma/at91.h> + + /* SPI mode */ + spi0: spi@f001c000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xf001c000 0x100>; + #address-cells = <1>; + #size-cells = <0>; + atmel,usart-mode = <AT91_USART_MODE_SPI>; + interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>; + clocks = <&usart0_clk>; + clock-names = "usart"; + dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>, + <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>; + dma-names = "tx", "rx"; + cs-gpios = <&pioB 3 GPIO_ACTIVE_HIGH>; + }; diff --git a/Documentation/devicetree/bindings/serial/cdns,uart.yaml b/Documentation/devicetree/bindings/serial/cdns,uart.yaml index fcdbe6f87e98..876b8cf1cafb 100644 --- a/Documentation/devicetree/bindings/serial/cdns,uart.yaml +++ b/Documentation/devicetree/bindings/serial/cdns,uart.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/serial/cdns,uart.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Cadence UART Controller Device Tree Bindings +title: Cadence UART Controller maintainers: - Michal Simek <michal.simek@xilinx.com> diff --git a/Documentation/devicetree/bindings/serial/mediatek,uart.yaml b/Documentation/devicetree/bindings/serial/mediatek,uart.yaml index 4ff27d6d4d5b..fe098d98af6e 100644 --- a/Documentation/devicetree/bindings/serial/mediatek,uart.yaml +++ b/Documentation/devicetree/bindings/serial/mediatek,uart.yaml @@ -42,6 +42,7 @@ properties: - mediatek,mt8173-uart - mediatek,mt8183-uart - mediatek,mt8186-uart + - mediatek,mt8188-uart - mediatek,mt8192-uart - mediatek,mt8195-uart - mediatek,mt8516-uart diff --git a/Documentation/devicetree/bindings/serial/pl011.yaml b/Documentation/devicetree/bindings/serial/pl011.yaml index d8aed84abcd3..80af72859876 100644 --- a/Documentation/devicetree/bindings/serial/pl011.yaml +++ b/Documentation/devicetree/bindings/serial/pl011.yaml @@ -94,6 +94,12 @@ properties: resets: maxItems: 1 + reg-io-width: + description: + The size (in bytes) of the IO accesses that should be performed + on the device. + enum: [1, 4] + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/serial/renesas,scif.yaml b/Documentation/devicetree/bindings/serial/renesas,scif.yaml index 90fe45265fbc..f930e7f1349f 100644 --- a/Documentation/devicetree/bindings/serial/renesas,scif.yaml +++ b/Documentation/devicetree/bindings/serial/renesas,scif.yaml @@ -76,7 +76,7 @@ properties: - items: - enum: - - renesas,scif-r9a07g043 # RZ/G2UL + - renesas,scif-r9a07g043 # RZ/G2UL and RZ/Five - renesas,scif-r9a07g054 # RZ/V2L - const: renesas,scif-r9a07g044 # RZ/G2{L,LC} fallback diff --git a/Documentation/devicetree/bindings/serial/samsung_uart.yaml b/Documentation/devicetree/bindings/serial/samsung_uart.yaml index 901c1e2cea28..8bd88d5cbb11 100644 --- a/Documentation/devicetree/bindings/serial/samsung_uart.yaml +++ b/Documentation/devicetree/bindings/serial/samsung_uart.yaml @@ -17,7 +17,10 @@ description: |+ properties: compatible: - items: + oneOf: + - items: + - const: samsung,exynosautov9-uart + - const: samsung,exynos850-uart - enum: - apple,s5l-uart - axis,artpec8-uart @@ -37,7 +40,6 @@ properties: description: | The size (in bytes) of the IO accesses that should be performed on the device. - $ref: /schemas/types.yaml#/definitions/uint32 enum: [ 1, 4 ] clocks: @@ -69,6 +71,9 @@ properties: minItems: 1 maxItems: 2 + power-domains: + maxItems: 1 + samsung,uart-fifosize: description: The fifo size supported by the UART channel. $ref: /schemas/types.yaml#/definitions/uint32 diff --git a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml index dc74643ae72e..b9c2287c5d1e 100644 --- a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml +++ b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml @@ -26,6 +26,7 @@ properties: - rockchip,rk1808-uart - rockchip,rk3036-uart - rockchip,rk3066-uart + - rockchip,rk3128-uart - rockchip,rk3188-uart - rockchip,rk3288-uart - rockchip,rk3308-uart diff --git a/Documentation/devicetree/bindings/serial/sunplus,sp7021-uart.yaml b/Documentation/devicetree/bindings/serial/sunplus,sp7021-uart.yaml index 2e9b64abde70..ea1e637661c7 100644 --- a/Documentation/devicetree/bindings/serial/sunplus,sp7021-uart.yaml +++ b/Documentation/devicetree/bindings/serial/sunplus,sp7021-uart.yaml @@ -5,7 +5,7 @@ $id: "http://devicetree.org/schemas/serial/sunplus,sp7021-uart.yaml#" $schema: "http://devicetree.org/meta-schemas/core.yaml#" -title: Sunplus SoC SP7021 UART Controller Device Tree Bindings +title: Sunplus SoC SP7021 UART Controller maintainers: - Hammer Hsieh <hammerh0314@gmail.com> diff --git a/Documentation/devicetree/bindings/serio/allwinner,sun4i-a10-ps2.yaml b/Documentation/devicetree/bindings/serio/allwinner,sun4i-a10-ps2.yaml index 2ecab8ed702a..7fa70fd1f291 100644 --- a/Documentation/devicetree/bindings/serio/allwinner,sun4i-a10-ps2.yaml +++ b/Documentation/devicetree/bindings/serio/allwinner,sun4i-a10-ps2.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/serio/allwinner,sun4i-a10-ps2.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 PS2 Host Controller Device Tree Bindings +title: Allwinner A10 PS2 Host Controller maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/soc/amlogic/amlogic,canvas.yaml b/Documentation/devicetree/bindings/soc/amlogic/amlogic,canvas.yaml index 17db87cb9dab..c3c599096353 100644 --- a/Documentation/devicetree/bindings/soc/amlogic/amlogic,canvas.yaml +++ b/Documentation/devicetree/bindings/soc/amlogic/amlogic,canvas.yaml @@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#" title: Amlogic Canvas Video Lookup Table maintainers: - - Neil Armstrong <narmstrong@baylibre.com> + - Neil Armstrong <neil.armstrong@linaro.org> - Maxime Jourdan <mjourdan@baylibre.com> description: | diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml index 26487daa64d9..d71bb20d4907 100644 --- a/Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml +++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml @@ -27,25 +27,22 @@ properties: const: 1 power-domains: - minItems: 4 maxItems: 4 power-domain-names: - items: - - const: bus - - const: g1 - - const: g2 - - const: h1 + maxItems: 4 clocks: - minItems: 3 maxItems: 3 clock-names: - items: - - const: g1 - - const: g2 - - const: h1 + maxItems: 3 + + interconnects: + maxItems: 3 + + interconnect-names: + maxItems: 3 required: - compatible @@ -55,6 +52,97 @@ required: - clocks - clock-names +allOf: + - if: + properties: + compatible: + contains: + const: fsl,imx8mm-vpu-blk-ctrl + then: + properties: + power-domains: + items: + - description: bus power domain + - description: G1 decoder power domain + - description: G2 decoder power domain + - description: H1 encoder power domain + + power-domain-names: + items: + - const: bus + - const: g1 + - const: g2 + - const: h1 + + clocks: + items: + - description: G1 decoder clk + - description: G2 decoder clk + - description: H1 encoder clk + + clock-names: + items: + - const: g1 + - const: g2 + - const: h1 + + interconnects: + items: + - description: G1 decoder interconnect + - description: G2 decoder interconnect + - description: H1 encoder power domain + + interconnect-names: + items: + - const: g1 + - const: g2 + - const: h1 + + - if: + properties: + compatible: + contains: + const: fsl,imx8mp-vpu-blk-ctrl + then: + properties: + power-domains: + items: + - description: bus power domain + - description: G1 decoder power domain + - description: G2 decoder power domain + - description: VC8000E encoder power domain + + power-domain-names: + items: + - const: bus + - const: g1 + - const: g2 + - const: vc8000e + + clocks: + items: + - description: G1 decoder clk + - description: G2 decoder clk + - description: VC8000E encoder clk + + clock-names: + items: + - const: g1 + - const: g2 + - const: vc8000e + + interconnects: + items: + - description: G1 decoder interconnect + - description: G2 decoder interconnect + - description: VC8000E encoder interconnect + + interconnect-names: + items: + - const: g1 + - const: g2 + - const: vc8000e + additionalProperties: false examples: diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hdmi-blk-ctrl.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hdmi-blk-ctrl.yaml index 563e1d0e327f..1be4ce2a45e8 100644 --- a/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hdmi-blk-ctrl.yaml +++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hdmi-blk-ctrl.yaml @@ -52,6 +52,15 @@ properties: - const: ref_266m - const: ref_24m + interconnects: + maxItems: 3 + + interconnect-names: + items: + - const: hrv + - const: lcdif-hdmi + - const: hdcp + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hsio-blk-ctrl.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hsio-blk-ctrl.yaml index c1e29d94f40e..c29181a9745b 100644 --- a/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hsio-blk-ctrl.yaml +++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hsio-blk-ctrl.yaml @@ -48,6 +48,16 @@ properties: - const: usb - const: pcie + interconnects: + maxItems: 4 + + interconnect-names: + items: + - const: noc-pcie + - const: usb1 + - const: usb2 + - const: pcie + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-media-blk-ctrl.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-media-blk-ctrl.yaml index b246d8386ba4..dadb6108e321 100644 --- a/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-media-blk-ctrl.yaml +++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-media-blk-ctrl.yaml @@ -64,6 +64,20 @@ properties: - const: isp - const: phy + interconnects: + maxItems: 8 + + interconnect-names: + items: + - const: lcdif-rd + - const: lcdif-wr + - const: isi0 + - const: isi1 + - const: isi2 + - const: isp0 + - const: isp1 + - const: dwe + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx93-media-blk-ctrl.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx93-media-blk-ctrl.yaml new file mode 100644 index 000000000000..792ebecec22d --- /dev/null +++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx93-media-blk-ctrl.yaml @@ -0,0 +1,80 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/imx/fsl,imx93-media-blk-ctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP i.MX93 Media blk-ctrl + +maintainers: + - Peng Fan <peng.fan@nxp.com> + +description: + The i.MX93 MEDIAMIX domain contains control and status registers known + as MEDIAMIX Block Control (MEDIAMIX BLK_CTRL). These registers include + clocking, reset, and miscellaneous top-level controls for peripherals + within the MEDIAMIX domain + +properties: + compatible: + items: + - const: fsl,imx93-media-blk-ctrl + - const: syscon + + reg: + maxItems: 1 + + '#power-domain-cells': + const: 1 + + power-domains: + maxItems: 1 + + clocks: + maxItems: 10 + + clock-names: + items: + - const: apb + - const: axi + - const: nic + - const: disp + - const: cam + - const: pxp + - const: lcdif + - const: isi + - const: csi + - const: dsi + +required: + - compatible + - reg + - power-domains + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/imx93-clock.h> + #include <dt-bindings/power/fsl,imx93-power.h> + + media_blk_ctrl: system-controller@4ac10000 { + compatible = "fsl,imx93-media-blk-ctrl", "syscon"; + reg = <0x4ac10000 0x10000>; + power-domains = <&mediamix>; + clocks = <&clk IMX93_CLK_MEDIA_APB>, + <&clk IMX93_CLK_MEDIA_AXI>, + <&clk IMX93_CLK_NIC_MEDIA_GATE>, + <&clk IMX93_CLK_MEDIA_DISP_PIX>, + <&clk IMX93_CLK_CAM_PIX>, + <&clk IMX93_CLK_PXP_GATE>, + <&clk IMX93_CLK_LCDIF_GATE>, + <&clk IMX93_CLK_ISI_GATE>, + <&clk IMX93_CLK_MIPI_CSI_GATE>, + <&clk IMX93_CLK_MIPI_DSI_GATE>; + clock-names = "apb", "axi", "nic", "disp", "cam", + "pxp", "lcdif", "isi", "csi", "dsi"; + #power-domain-cells = <1>; + }; diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx93-src.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx93-src.yaml new file mode 100644 index 000000000000..c1cc69b51981 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx93-src.yaml @@ -0,0 +1,96 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/imx/fsl,imx93-src.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP i.MX93 System Reset Controller + +maintainers: + - Peng Fan <peng.fan@nxp.com> + +description: | + The System Reset Controller (SRC) is responsible for the generation of + all the system reset signals and boot argument latching. + + Its main functions are as follows, + - Deals with all global system reset sources from other modules, + and generates global system reset. + - Responsible for power gating of MIXs (Slices) and their memory + low power control. + +properties: + compatible: + items: + - const: fsl,imx93-src + - const: syscon + + reg: + maxItems: 1 + + ranges: true + + '#address-cells': + const: 1 + + '#size-cells': + const: 1 + +patternProperties: + "power-domain@[0-9a-f]+$": + + type: object + properties: + compatible: + items: + - const: fsl,imx93-src-slice + + '#power-domain-cells': + const: 0 + + reg: + items: + - description: mix slice register region + - description: mem slice register region + + clocks: + description: | + A number of phandles to clocks that need to be enabled + during domain power-up sequencing to ensure reset + propagation into devices located inside this power domain. + minItems: 1 + maxItems: 5 + + required: + - compatible + - '#power-domain-cells' + - reg + +required: + - compatible + - reg + - ranges + - '#address-cells' + - '#size-cells' + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/imx93-clock.h> + + system-controller@44460000 { + compatible = "fsl,imx93-src", "syscon"; + reg = <0x44460000 0x10000>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + mediamix: power-domain@0 { + compatible = "fsl,imx93-src-slice"; + reg = <0x44462400 0x400>, <0x44465800 0x400>; + #power-domain-cells = <0>; + clocks = <&clk IMX93_CLK_MEDIA_AXI>, + <&clk IMX93_CLK_MEDIA_APB>; + }; + }; diff --git a/Documentation/devicetree/bindings/soc/mediatek/mediatek,ccorr.yaml b/Documentation/devicetree/bindings/soc/mediatek/mediatek,ccorr.yaml new file mode 100644 index 000000000000..4380b98b0dfe --- /dev/null +++ b/Documentation/devicetree/bindings/soc/mediatek/mediatek,ccorr.yaml @@ -0,0 +1,68 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/mediatek/mediatek,ccorr.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek color correction + +maintainers: + - Matthias Brugger <matthias.bgg@gmail.com> + - Moudy Ho <moudy.ho@mediatek.com> + +description: | + MediaTek color correction with 3X3 matrix. + +properties: + compatible: + items: + - enum: + - mediatek,mt8183-mdp3-ccorr + + reg: + maxItems: 1 + + mediatek,gce-client-reg: + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + items: + - description: phandle of GCE + - description: GCE subsys id + - description: register offset + - description: register size + description: The register of client driver can be configured by gce with + 4 arguments defined in this property. Each GCE subsys id is mapping to + a client defined in the header include/dt-bindings/gce/<chip>-gce.h. + + mediatek,gce-events: + description: + The event id which is mapping to the specific hardware event signal + to gce. The event id is defined in the gce header + include/dt-bindings/gce/<chip>-gce.h of each chips. + $ref: /schemas/types.yaml#/definitions/uint32-array + + clocks: + minItems: 1 + +required: + - compatible + - reg + - mediatek,gce-client-reg + - mediatek,gce-events + - clocks + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/mt8183-clk.h> + #include <dt-bindings/gce/mt8183-gce.h> + + mdp3_ccorr: mdp3-ccorr@1401c000 { + compatible = "mediatek,mt8183-mdp3-ccorr"; + reg = <0x1401c000 0x1000>; + mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0xc000 0x1000>; + mediatek,gce-events = <CMDQ_EVENT_MDP_CCORR_SOF>, + <CMDQ_EVENT_MDP_CCORR_EOF>; + clocks = <&mmsys CLK_MM_MDP_CCORR>; + }; diff --git a/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml b/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml index 627dcc3e8b32..9241e5fc7cff 100644 --- a/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml +++ b/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml @@ -26,10 +26,12 @@ properties: enum: - mediatek,mt2701-disp-mutex - mediatek,mt2712-disp-mutex + - mediatek,mt6795-disp-mutex - mediatek,mt8167-disp-mutex - mediatek,mt8173-disp-mutex - mediatek,mt8183-disp-mutex - mediatek,mt8186-disp-mutex + - mediatek,mt8186-mdp3-mutex - mediatek,mt8192-disp-mutex - mediatek,mt8195-disp-mutex diff --git a/Documentation/devicetree/bindings/soc/mediatek/mediatek,wdma.yaml b/Documentation/devicetree/bindings/soc/mediatek/mediatek,wdma.yaml new file mode 100644 index 000000000000..69afb329e5f4 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/mediatek/mediatek,wdma.yaml @@ -0,0 +1,81 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/mediatek/mediatek,wdma.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek Write Direct Memory Access + +maintainers: + - Matthias Brugger <matthias.bgg@gmail.com> + - Moudy Ho <moudy.ho@mediatek.com> + +description: | + MediaTek Write Direct Memory Access(WDMA) component used to write + the data into DMA. + +properties: + compatible: + items: + - enum: + - mediatek,mt8183-mdp3-wdma + + reg: + maxItems: 1 + + mediatek,gce-client-reg: + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + items: + - description: phandle of GCE + - description: GCE subsys id + - description: register offset + - description: register size + description: The register of client driver can be configured by gce with + 4 arguments defined in this property. Each GCE subsys id is mapping to + a client defined in the header include/dt-bindings/gce/<chip>-gce.h. + + mediatek,gce-events: + description: + The event id which is mapping to the specific hardware event signal + to gce. The event id is defined in the gce header + include/dt-bindings/gce/<chip>-gce.h of each chips. + $ref: /schemas/types.yaml#/definitions/uint32-array + + power-domains: + maxItems: 1 + + clocks: + minItems: 1 + + iommus: + maxItems: 1 + +required: + - compatible + - reg + - mediatek,gce-client-reg + - mediatek,gce-events + - power-domains + - clocks + - iommus + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/mt8183-clk.h> + #include <dt-bindings/gce/mt8183-gce.h> + #include <dt-bindings/power/mt8183-power.h> + #include <dt-bindings/memory/mt8183-larb-port.h> + + mdp3_wdma: mdp3-wdma@14006000 { + compatible = "mediatek,mt8183-mdp3-wdma"; + reg = <0x14006000 0x1000>; + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x6000 0x1000>; + mediatek,gce-events = <CMDQ_EVENT_MDP_WDMA0_SOF>, + <CMDQ_EVENT_MDP_WDMA0_EOF>; + power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; + clocks = <&mmsys CLK_MM_MDP_WDMA0>; + iommus = <&iommu>; + }; diff --git a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt b/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt index 0581dbda4828..d24e2bc444be 100644 --- a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt +++ b/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt @@ -28,6 +28,7 @@ Required properties in pwrap device node. "mediatek,mt8173-pwrap" for MT8173 SoCs "mediatek,mt8183-pwrap" for MT8183 SoCs "mediatek,mt8186-pwrap" for MT8186 SoCs + "mediatek,mt8188-pwrap", "mediatek,mt8195-pwrap" for MT8188 SoCs "mediatek,mt8195-pwrap" for MT8195 SoCs "mediatek,mt8516-pwrap" for MT8516 SoCs - interrupts: IRQ for pwrap in SOC diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,apr.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,apr.yaml index 028c5d105adb..f47491aab3b1 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,apr.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,apr.yaml @@ -20,6 +20,9 @@ properties: - qcom,apr-v2 - qcom,gpr + power-domains: + maxItems: 1 + qcom,apr-domain: $ref: /schemas/types.yaml#/definitions/uint32 enum: [1, 2, 3, 4, 5, 6, 7] @@ -52,6 +55,26 @@ properties: 2 = Audio DSP Domain 3 = Application Processor Domain + qcom,glink-channels: + $ref: /schemas/types.yaml#/definitions/string-array + description: Channel name used for the communication + items: + - const: apr_audio_svc + + qcom,intents: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: + List of (size, amount) pairs describing what intents should be + preallocated for this virtual channel. This can be used to tweak the + default intents available for the channel to meet expectations of the + remote. + + qcom,smd-channels: + $ref: /schemas/types.yaml#/definitions/string-array + description: Channel name used for the communication + items: + - const: apr_audio_svc + '#address-cells': const: 1 @@ -97,6 +120,26 @@ patternProperties: 3 = AMDB Service. 4 = Voice processing manager. + clock-controller: + $ref: /schemas/sound/qcom,q6dsp-lpass-clocks.yaml# + description: Qualcomm DSP LPASS clock controller + unevaluatedProperties: false + + dais: + type: object + oneOf: + - $ref: /schemas/sound/qcom,q6apm-dai.yaml# + - $ref: /schemas/sound/qcom,q6dsp-lpass-ports.yaml# + - $ref: /schemas/sound/qcom,q6asm-dais.yaml# + unevaluatedProperties: false + description: Qualcomm DSP audio ports + + routing: + type: object + $ref: /schemas/sound/qcom,q6adm-routing.yaml# + unevaluatedProperties: false + description: Qualcomm DSP LPASS audio routing + qcom,protection-domain: $ref: /schemas/types.yaml#/definitions/string-array description: protection domain service name and path for apr service @@ -107,17 +150,44 @@ patternProperties: "tms/servreg", "msm/modem/wlan_pd". "tms/servreg", "msm/slpi/sensor_pd". - '#address-cells': - const: 1 + allOf: + - if: + properties: + compatible: + enum: + - qcom,q6afe + then: + properties: + dais: + properties: + compatible: + const: qcom,q6afe-dais - '#size-cells': - const: 0 + - if: + properties: + compatible: + enum: + - qcom,q6apm + then: + properties: + dais: + properties: + compatible: + enum: + - qcom,q6apm-dais + - qcom,q6apm-lpass-dais - patternProperties: - "^.*@[0-9a-f]+$": - type: object - description: - Service based devices like clock controllers or digital audio interfaces. + - if: + properties: + compatible: + enum: + - qcom,q6asm + then: + properties: + dais: + properties: + compatible: + const: qcom,q6asm-dais additionalProperties: false @@ -125,6 +195,30 @@ required: - compatible - qcom,domain +allOf: + - if: + properties: + compatible: + enum: + - qcom,gpr + then: + properties: + power-domains: false + + - if: + required: + - qcom,glink-channels + then: + properties: + qcom,smd-channels: false + + - if: + required: + - qcom,smd-channels + then: + properties: + qcom,glink-channels: false + additionalProperties: false examples: diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smd.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,smd.yaml index 9b3efe97f47c..063e595c12f7 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,smd.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,smd.yaml @@ -20,39 +20,14 @@ properties: const: qcom,smd patternProperties: - "^.*-edge|rpm$": + "^smd-edge|rpm$": $ref: /schemas/remoteproc/qcom,smd-edge.yaml# + unevaluatedProperties: false description: Each subnode of the SMD node represents a remote subsystem or a remote processor of some sort - or in SMD language an "edge". The name of the edges are not important. - properties: - rpm-requests: - type: object - description: - In turn, subnodes of the "edges" represent devices tied to SMD - channels on that "edge". The names of the devices are not - important. The properties of these nodes are defined by the - individual bindings for the SMD devices. - - properties: - qcom,smd-channels: - $ref: /schemas/types.yaml#/definitions/string-array - minItems: 1 - maxItems: 32 - description: - A list of channels tied to this device, used for matching the - device to channels. - - required: - - compatible - - qcom,smd-channels - - additionalProperties: true - - unevaluatedProperties: false - required: - compatible diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom-stats.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom-stats.yaml index 473adca4e973..48eda4d0d391 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom-stats.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom-stats.yaml @@ -20,6 +20,7 @@ properties: compatible: enum: - qcom,rpmh-stats + - qcom,sdm845-rpmh-stats - qcom,rpm-stats # For older RPM firmware versions with fixed offset for the sleep stats - qcom,apq8084-rpm-stats diff --git a/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml b/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml index ce2875c89329..398663d21ab1 100644 --- a/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml +++ b/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml @@ -20,7 +20,7 @@ description: properties: compatible: enum: - - renesas,r9a07g043-sysc # RZ/G2UL + - renesas,r9a07g043-sysc # RZ/G2UL and RZ/Five - renesas,r9a07g044-sysc # RZ/G2{L,LC} - renesas,r9a07g054-sysc # RZ/V2L @@ -44,8 +44,6 @@ properties: required: - compatible - reg - - interrupts - - interrupt-names additionalProperties: false diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml index 75a2b8bb25fb..2ed8cca79b59 100644 --- a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml +++ b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml @@ -16,9 +16,12 @@ properties: - enum: - rockchip,rk3288-sgrf - rockchip,rk3566-pipe-grf + - rockchip,rk3568-pcie3-phy-grf - rockchip,rk3568-pipe-grf - rockchip,rk3568-pipe-phy-grf - rockchip,rk3568-usb2phy-grf + - rockchip,rk3588-pcie3-phy-grf + - rockchip,rk3588-pcie3-pipe-grf - rockchip,rv1108-usbgrf - const: syscon - items: @@ -28,6 +31,7 @@ properties: - rockchip,px30-usb2phy-grf - rockchip,rk3036-grf - rockchip,rk3066-grf + - rockchip,rk3128-grf - rockchip,rk3188-grf - rockchip,rk3228-grf - rockchip,rk3288-grf @@ -45,6 +49,8 @@ properties: - rockchip,rk3568-pmugrf - rockchip,rv1108-grf - rockchip,rv1108-pmugrf + - rockchip,rv1126-grf + - rockchip,rv1126-pmugrf - const: syscon - const: simple-mfd @@ -178,6 +184,7 @@ allOf: contains: enum: - rockchip,px30-usb2phy-grf + - rockchip,rk3128-grf - rockchip,rk3228-grf - rockchip,rk3308-usb2phy-grf - rockchip,rk3328-usb2phy-grf diff --git a/Documentation/devicetree/bindings/sound/adi,max98396.yaml b/Documentation/devicetree/bindings/sound/adi,max98396.yaml index 8d2ef991db40..fd5aa61b467f 100644 --- a/Documentation/devicetree/bindings/sound/adi,max98396.yaml +++ b/Documentation/devicetree/bindings/sound/adi,max98396.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/sound/adi,max98396.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Analog Devices MAX98396 Speaker Amplifier Device Tree Bindings +title: Analog Devices MAX98396 Speaker Amplifier maintainers: - Ryan Lee <ryans.lee@analog.com> @@ -78,6 +78,40 @@ properties: interleaved on a single output channel. type: boolean + adi,dmon-stuck-enable: + description: + Enables the "data monitor stuck" feature. Once the data monitor is + enabled, it actively monitors the selected input data (from DIN) to the + speaker amplifier. Once a data error is detected, the data monitor + automatically places the device into software shutdown. + type: boolean + + adi,dmon-stuck-threshold-bits: + description: + Sets the threshold for the "data monitor stuck" feature, in bits. + enum: [9, 11, 13, 15] + default: 15 + + adi,dmon-magnitude-enable: + description: + Enables the "data monitor magnitude" feature. Once the data monitor is + enabled, it actively monitors the selected input data (from DIN) to the + speaker amplifier. Once a data error is detected, the data monitor + automatically places the device into software shutdown. + type: boolean + + adi,dmon-magnitude-threshold-bits: + description: + Sets the threshold for the "data monitor magnitude" feature, in bits. + enum: [2, 3, 4, 5] + default: 5 + + adi,dmon-duration-ms: + description: + Sets the duration for the "data monitor" feature, in milliseconds. + enum: [64, 256, 1024, 4096] + default: 64 + reset-gpios: maxItems: 1 diff --git a/Documentation/devicetree/bindings/sound/ak4375.yaml b/Documentation/devicetree/bindings/sound/ak4375.yaml index f1d5074a024d..5f0fc584bb38 100644 --- a/Documentation/devicetree/bindings/sound/ak4375.yaml +++ b/Documentation/devicetree/bindings/sound/ak4375.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/sound/ak4375.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: AK4375 DAC and headphones amplifier Device Tree Bindings +title: AK4375 DAC and headphones amplifier maintainers: - Vincent Knecht <vincent.knecht@mailoo.org> diff --git a/Documentation/devicetree/bindings/sound/ak4613.yaml b/Documentation/devicetree/bindings/sound/ak4613.yaml index ef4055ef0ccd..aa8a258a9f1c 100644 --- a/Documentation/devicetree/bindings/sound/ak4613.yaml +++ b/Documentation/devicetree/bindings/sound/ak4613.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/sound/ak4613.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: AK4613 I2C transmitter Device Tree Bindings +title: AK4613 I2C transmitter maintainers: - Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> diff --git a/Documentation/devicetree/bindings/sound/ak4642.yaml b/Documentation/devicetree/bindings/sound/ak4642.yaml index 1e2caa29790e..48a5b2c3934e 100644 --- a/Documentation/devicetree/bindings/sound/ak4642.yaml +++ b/Documentation/devicetree/bindings/sound/ak4642.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/sound/ak4642.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: AK4642 I2C transmitter Device Tree Bindings +title: AK4642 I2C transmitter maintainers: - Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> diff --git a/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-codec.yaml b/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-codec.yaml index 559aff13ae23..292fcb643999 100644 --- a/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-codec.yaml +++ b/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-codec.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/sound/allwinner,sun4i-a10-codec.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 Codec Device Tree Bindings +title: Allwinner A10 Codec maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-i2s.yaml b/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-i2s.yaml index 34f6ee9de392..dd30881ad2f5 100644 --- a/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-i2s.yaml +++ b/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-i2s.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/sound/allwinner,sun4i-a10-i2s.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 I2S Controller Device Tree Bindings +title: Allwinner A10 I2S Controller maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-spdif.yaml b/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-spdif.yaml index 444a432912bb..68c84e29ce57 100644 --- a/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-spdif.yaml +++ b/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-spdif.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/sound/allwinner,sun4i-a10-spdif.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 S/PDIF Controller Device Tree Bindings +title: Allwinner A10 S/PDIF Controller maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/sound/allwinner,sun50i-a64-codec-analog.yaml b/Documentation/devicetree/bindings/sound/allwinner,sun50i-a64-codec-analog.yaml index 66859eb8f79a..5800de63fc84 100644 --- a/Documentation/devicetree/bindings/sound/allwinner,sun50i-a64-codec-analog.yaml +++ b/Documentation/devicetree/bindings/sound/allwinner,sun50i-a64-codec-analog.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/sound/allwinner,sun50i-a64-codec-analog.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A64 Analog Codec Device Tree Bindings +title: Allwinner A64 Analog Codec maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/sound/allwinner,sun50i-h6-dmic.yaml b/Documentation/devicetree/bindings/sound/allwinner,sun50i-h6-dmic.yaml new file mode 100644 index 000000000000..2f12cabe4c71 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/allwinner,sun50i-h6-dmic.yaml @@ -0,0 +1,79 @@ +# SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/allwinner,sun50i-h6-dmic.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Allwinner H6 DMIC + +maintainers: + - Ban Tao <fengzheng923@gmail.com> + +properties: + compatible: + const: allwinner,sun50i-h6-dmic + + "#sound-dai-cells": + const: 0 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: Bus Clock + - description: Module Clock + + clock-names: + items: + - const: bus + - const: mod + + dmas: + items: + - description: RX DMA Channel + + dma-names: + items: + - const: rx + + resets: + maxItems: 1 + +required: + - "#sound-dai-cells" + - compatible + - reg + - interrupts + - clocks + - clock-names + - dmas + - dma-names + - resets + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + + #include <dt-bindings/clock/sun50i-h6-ccu.h> + #include <dt-bindings/reset/sun50i-h6-ccu.h> + + dmic: dmic@5095000 { + #sound-dai-cells = <0>; + compatible = "allwinner,sun50i-h6-dmic"; + reg = <0x05095000 0x400>; + interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_DMIC>, <&ccu CLK_DMIC>; + clock-names = "bus", "mod"; + dmas = <&dma 7>; + dma-names = "rx"; + resets = <&ccu RST_BUS_DMIC>; + }; + +... diff --git a/Documentation/devicetree/bindings/sound/allwinner,sun8i-a23-codec-analog.yaml b/Documentation/devicetree/bindings/sound/allwinner,sun8i-a23-codec-analog.yaml index 26eca21e1f0f..1c21a1b390c7 100644 --- a/Documentation/devicetree/bindings/sound/allwinner,sun8i-a23-codec-analog.yaml +++ b/Documentation/devicetree/bindings/sound/allwinner,sun8i-a23-codec-analog.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/sound/allwinner,sun8i-a23-codec-analog.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A23 Analog Codec Device Tree Bindings +title: Allwinner A23 Analog Codec maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/sound/allwinner,sun8i-a33-codec.yaml b/Documentation/devicetree/bindings/sound/allwinner,sun8i-a33-codec.yaml index 19f111f40225..4eb11a8e622b 100644 --- a/Documentation/devicetree/bindings/sound/allwinner,sun8i-a33-codec.yaml +++ b/Documentation/devicetree/bindings/sound/allwinner,sun8i-a33-codec.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/sound/allwinner,sun8i-a33-codec.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A33 Codec Device Tree Bindings +title: Allwinner A33 Codec maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/sound/amlogic,gx-sound-card.yaml b/Documentation/devicetree/bindings/sound/amlogic,gx-sound-card.yaml index b4b35edcb493..5b8d59245f82 100644 --- a/Documentation/devicetree/bindings/sound/amlogic,gx-sound-card.yaml +++ b/Documentation/devicetree/bindings/sound/amlogic,gx-sound-card.yaml @@ -40,6 +40,7 @@ properties: patternProperties: "^dai-link-[0-9]+$": type: object + additionalProperties: false description: |- dai-link child nodes: Container for dai-link level properties and the CODEC sub-nodes. @@ -63,6 +64,7 @@ patternProperties: patternProperties: "^codec-[0-9]+$": type: object + additionalProperties: false description: |- Codecs: dai-link representing backend links should have at least one subnode. diff --git a/Documentation/devicetree/bindings/sound/apple,mca.yaml b/Documentation/devicetree/bindings/sound/apple,mca.yaml new file mode 100644 index 000000000000..d5dc92b5b654 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/apple,mca.yaml @@ -0,0 +1,131 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/apple,mca.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Apple MCA I2S transceiver + +description: | + MCA is an I2S transceiver peripheral found on M1 and other Apple chips. It is + composed of a number of identical clusters which can operate independently + or in an interlinked fashion. Up to 6 clusters have been seen on an MCA. + +maintainers: + - Martin PoviÅ¡er <povik+lin@cutebit.org> + +properties: + compatible: + items: + - enum: + - apple,t6000-mca + - apple,t8103-mca + - const: apple,mca + + reg: + items: + - description: Register region of the MCA clusters proper + - description: Register region of the DMA glue and its FIFOs + + interrupts: + minItems: 4 + maxItems: 6 + description: + One interrupt per each cluster + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + dmas: + minItems: 16 + maxItems: 24 + description: + DMA channels corresponding to the SERDES units in the peripheral. They are + listed in groups of four per cluster, and within the group they are given + as associated to the TXA, RXA, TXB, RXB units. + + dma-names: + minItems: 16 + items: + - const: tx0a + - const: rx0a + - const: tx0b + - const: rx0b + - const: tx1a + - const: rx1a + - const: tx1b + - const: rx1b + - const: tx2a + - const: rx2a + - const: tx2b + - const: rx2b + - const: tx3a + - const: rx3a + - const: tx3b + - const: rx3b + - const: tx4a + - const: rx4a + - const: tx4b + - const: rx4b + - const: tx5a + - const: rx5a + - const: tx5b + - const: rx5b + description: | + Names for the DMA channels: 'tx'/'rx', then cluster number, then 'a'/'b' + based on the associated SERDES unit. + + clocks: + minItems: 4 + maxItems: 6 + description: + Clusters' input reference clock. + + resets: + maxItems: 1 + + power-domains: + minItems: 5 + maxItems: 7 + description: + First a general power domain for register access, then the power + domains of individual clusters for their operation. + + '#sound-dai-cells': + const: 1 + +required: + - compatible + - reg + - dmas + - dma-names + - clocks + - power-domains + - '#sound-dai-cells' + +additionalProperties: false + +examples: + - | + mca: i2s@9b600000 { + compatible = "apple,t6000-mca", "apple,mca"; + reg = <0x9b600000 0x10000>, + <0x9b200000 0x20000>; + + clocks = <&nco 0>, <&nco 1>, <&nco 2>, <&nco 3>; + power-domains = <&ps_audio_p>, <&ps_mca0>, <&ps_mca1>, + <&ps_mca2>, <&ps_mca3>; + dmas = <&admac 0>, <&admac 1>, <&admac 2>, <&admac 3>, + <&admac 4>, <&admac 5>, <&admac 6>, <&admac 7>, + <&admac 8>, <&admac 9>, <&admac 10>, <&admac 11>, + <&admac 12>, <&admac 13>, <&admac 14>, <&admac 15>; + dma-names = "tx0a", "rx0a", "tx0b", "rx0b", + "tx1a", "rx1a", "tx1b", "rx1b", + "tx2a", "rx2a", "tx2b", "rx2b", + "tx3a", "rx3a", "tx3b", "rx3b"; + + #sound-dai-cells = <1>; + }; diff --git a/Documentation/devicetree/bindings/sound/audio-graph-card.yaml b/Documentation/devicetree/bindings/sound/audio-graph-card.yaml index 109e55f9e597..274092ef36c5 100644 --- a/Documentation/devicetree/bindings/sound/audio-graph-card.yaml +++ b/Documentation/devicetree/bindings/sound/audio-graph-card.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/sound/audio-graph-card.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Audio Graph Card Device Tree Bindings +title: Audio Graph Card maintainers: - Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> diff --git a/Documentation/devicetree/bindings/sound/audio-graph-card2.yaml b/Documentation/devicetree/bindings/sound/audio-graph-card2.yaml index 7416067c945e..3de7b36829da 100644 --- a/Documentation/devicetree/bindings/sound/audio-graph-card2.yaml +++ b/Documentation/devicetree/bindings/sound/audio-graph-card2.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/sound/audio-graph-card2.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Audio Graph Card2 Device Tree Bindings +title: Audio Graph Card2 maintainers: - Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> diff --git a/Documentation/devicetree/bindings/sound/audio-graph-port.yaml b/Documentation/devicetree/bindings/sound/audio-graph-port.yaml index 5c368674d11a..64654ceef208 100644 --- a/Documentation/devicetree/bindings/sound/audio-graph-port.yaml +++ b/Documentation/devicetree/bindings/sound/audio-graph-port.yaml @@ -19,14 +19,17 @@ properties: description: "device name prefix" $ref: /schemas/types.yaml#/definitions/string convert-rate: - description: CPU to Codec rate convert. - $ref: /schemas/types.yaml#/definitions/uint32 + $ref: "/schemas/sound/dai-params.yaml#/$defs/dai-sample-rate" convert-channels: - description: CPU to Codec rate channels. - $ref: /schemas/types.yaml#/definitions/uint32 + $ref: "/schemas/sound/dai-params.yaml#/$defs/dai-channels" + convert-sample-format: + $ref: "/schemas/sound/dai-params.yaml#/$defs/dai-sample-format" + patternProperties: "^endpoint(@[0-9a-f]+)?": $ref: /schemas/graph.yaml#/$defs/endpoint-base + unevaluatedProperties: false + properties: mclk-fs: description: | @@ -65,12 +68,18 @@ patternProperties: - msb - lsb convert-rate: - description: CPU to Codec rate convert. - $ref: /schemas/types.yaml#/definitions/uint32 + $ref: "/schemas/sound/dai-params.yaml#/$defs/dai-sample-rate" convert-channels: - description: CPU to Codec rate channels. - $ref: /schemas/types.yaml#/definitions/uint32 + $ref: "/schemas/sound/dai-params.yaml#/$defs/dai-channels" + convert-sample-format: + $ref: "/schemas/sound/dai-params.yaml#/$defs/dai-sample-format" + dai-tdm-slot-num: + description: Number of slots in use. + $ref: /schemas/types.yaml#/definitions/uint32 + dai-tdm-slot-width: + description: Width in bits for each slot. + $ref: /schemas/types.yaml#/definitions/uint32 dai-tdm-slot-width-map: description: Mapping of sample widths to slot widths. For hardware that cannot support a fixed slot width or a slot width always diff --git a/Documentation/devicetree/bindings/sound/audio-graph.yaml b/Documentation/devicetree/bindings/sound/audio-graph.yaml index 4b46794e5153..d59baedee180 100644 --- a/Documentation/devicetree/bindings/sound/audio-graph.yaml +++ b/Documentation/devicetree/bindings/sound/audio-graph.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/sound/audio-graph.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Audio Graph Device Tree Bindings +title: Audio Graph maintainers: - Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> @@ -27,11 +27,12 @@ properties: description: User specified audio sound widgets. $ref: /schemas/types.yaml#/definitions/non-unique-string-array convert-rate: - description: CPU to Codec rate convert. - $ref: /schemas/types.yaml#/definitions/uint32 + $ref: "/schemas/sound/dai-params.yaml#/$defs/dai-sample-rate" convert-channels: - description: CPU to Codec rate channels. - $ref: /schemas/types.yaml#/definitions/uint32 + $ref: "/schemas/sound/dai-params.yaml#/$defs/dai-channels" + convert-sample-format: + $ref: "/schemas/sound/dai-params.yaml#/$defs/dai-sample-format" + pa-gpios: maxItems: 1 hp-det-gpio: diff --git a/Documentation/devicetree/bindings/sound/cirrus,cs42l42.yaml b/Documentation/devicetree/bindings/sound/cirrus,cs42l42.yaml index 31800f70e9d9..7356084a2ca2 100644 --- a/Documentation/devicetree/bindings/sound/cirrus,cs42l42.yaml +++ b/Documentation/devicetree/bindings/sound/cirrus,cs42l42.yaml @@ -19,6 +19,7 @@ properties: compatible: enum: - cirrus,cs42l42 + - cirrus,cs42l83 reg: description: diff --git a/Documentation/devicetree/bindings/sound/dai-params.yaml b/Documentation/devicetree/bindings/sound/dai-params.yaml new file mode 100644 index 000000000000..f5fb71f9b603 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/dai-params.yaml @@ -0,0 +1,40 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/dai-params.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Digital Audio Interface (DAI) Stream Parameters + +maintainers: + - Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> + +select: false + +$defs: + + dai-channels: + description: Number of audio channels used by DAI + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 1 + maximum: 32 + + dai-sample-format: + description: Audio sample format used by DAI + $ref: /schemas/types.yaml#/definitions/string + enum: + - s8 + - s16_le + - s24_le + - s24_3le + - s32_le + + dai-sample-rate: + description: Audio sample rate used by DAI + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 8000 + maximum: 192000 + +properties: {} + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/sound/everest,es8326.yaml b/Documentation/devicetree/bindings/sound/everest,es8326.yaml new file mode 100755 index 000000000000..07781408e788 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/everest,es8326.yaml @@ -0,0 +1,116 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/everest,es8326.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Everest ES8326 audio CODEC + +maintainers: + - David Yang <yangxiaohua@everest-semi.com> + +properties: + compatible: + const: everest,es8326 + + reg: + maxItems: 1 + + clocks: + items: + - description: clock for master clock (MCLK) + + clock-names: + items: + - const: mclk + + "#sound-dai-cells": + const: 0 + + everest,jack-pol: + $ref: /schemas/types.yaml#/definitions/uint8 + description: | + just the value of reg 57. Bit(3) decides whether the jack polarity is inverted. + Bit(2) decides whether the button on the headset is inverted. + Bit(1)/(0) decides the mic properity to be OMTP/CTIA or auto. + minimum: 0x00 + maximum: 0x0f + default: 0x0f + + everest,mic1-src: + $ref: /schemas/types.yaml#/definitions/uint8 + description: + the value of reg 2A when headset plugged. + minimum: 0x00 + maximum: 0x77 + default: 0x22 + + everest,mic2-src: + $ref: /schemas/types.yaml#/definitions/uint8 + description: + the value of reg 2A when headset unplugged. + minimum: 0x00 + maximum: 0x77 + default: 0x44 + + everest,jack-detect-inverted: + $ref: /schemas/types.yaml#/definitions/flag + description: + Defined to invert the jack detection. + + everest,interrupt-src: + $ref: /schemas/types.yaml#/definitions/uint8 + description: | + value of reg 0x58, Defines the interrupt source. + Bit(2) 1 means button press triggers irq, 0 means not. + Bit(3) 1 means PIN9 is the irq source for jack detection. When set to 0, + bias change on PIN9 do not triggers irq. + Bit(4) 1 means PIN27 is the irq source for jack detection. + Bit(5) 1 means PIN9 is the irq source after MIC detect. + Bit(6) 1 means PIN27 is the irq source after MIC detect. + minimum: 0 + maximum: 0x3c + default: 0x08 + + everest,interrupt-clk: + $ref: /schemas/types.yaml#/definitions/uint8 + description: | + value of reg 0x59, Defines the interrupt output behavior. + Bit(0-3) 0 means irq pulse equals 512*internal clock + 1 means irq pulse equals 1024*internal clock + 2 means ... + 7 means irq pulse equals 65536*internal clock + 8 means irq mutes PA + 9 means irq mutes PA and DAC output + Bit(4) 1 means we invert the interrupt output. + Bit(6) 1 means the chip do not detect jack type after button released. + 0 means the chip detect jack type again after button released. + minimum: 0 + maximum: 0x7f + default: 0x45 + +required: + - compatible + - reg + - "#sound-dai-cells" + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + es8326: codec@19 { + compatible = "everest,es8326"; + reg = <0x19>; + clocks = <&clks 10>; + clock-names = "mclk"; + #sound-dai-cells = <0>; + everest,mic1-src = [22]; + everest,mic2-src = [44]; + everest,jack-pol = [0e]; + everest,interrupt-src = [08]; + everest,interrupt-clk = [45]; + }; + }; diff --git a/Documentation/devicetree/bindings/sound/fsl,sai.yaml b/Documentation/devicetree/bindings/sound/fsl,sai.yaml new file mode 100644 index 000000000000..70c4111d59c7 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/fsl,sai.yaml @@ -0,0 +1,216 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/fsl,sai.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale Synchronous Audio Interface (SAI). + +maintainers: + - Shengjiu Wang <shengjiu.wang@nxp.com> + +description: | + The SAI is based on I2S module that used communicating with audio codecs, + which provides a synchronous audio interface that supports fullduplex + serial interfaces with frame synchronization such as I2S, AC97, TDM, and + codec/DSP interfaces. + +properties: + compatible: + oneOf: + - enum: + - fsl,vf610-sai + - fsl,imx6sx-sai + - fsl,imx6ul-sai + - fsl,imx7ulp-sai + - fsl,imx8mq-sai + - fsl,imx8qm-sai + - fsl,imx8ulp-sai + - items: + - enum: + - fsl,imx8mm-sai + - fsl,imx8mn-sai + - fsl,imx8mp-sai + - const: fsl,imx8mq-sai + + reg: + maxItems: 1 + + interrupts: + items: + - description: receive and transmit interrupt + + dmas: + maxItems: 2 + + dma-names: + maxItems: 2 + + clocks: + items: + - description: The ipg clock for register access + - description: master clock source 0 (obsoleted) + - description: master clock source 1 + - description: master clock source 2 + - description: master clock source 3 + - description: PLL clock source for 8kHz series + - description: PLL clock source for 11kHz series + minItems: 4 + + clock-names: + oneOf: + - items: + - const: bus + - const: mclk0 + - const: mclk1 + - const: mclk2 + - const: mclk3 + - const: pll8k + - const: pll11k + minItems: 4 + - items: + - const: bus + - const: mclk1 + - const: mclk2 + - const: mclk3 + - const: pll8k + - const: pll11k + minItems: 4 + + lsb-first: + description: | + Configures whether the LSB or the MSB is transmitted + first for the fifo data. If this property is absent, + the MSB is transmitted first as default, or the LSB + is transmitted first. + type: boolean + + big-endian: + description: | + required if all the SAI registers are big-endian rather than little-endian. + type: boolean + + fsl,sai-synchronous-rx: + description: | + SAI will work in the synchronous mode (sync Tx with Rx) which means + both the transmitter and the receiver will send and receive data by + following receiver's bit clocks and frame sync clocks. + type: boolean + + fsl,sai-asynchronous: + description: | + SAI will work in the asynchronous mode, which means both transmitter + and receiver will send and receive data by following their own bit clocks + and frame sync clocks separately. + If both fsl,sai-asynchronous and fsl,sai-synchronous-rx are absent, the + default synchronous mode (sync Rx with Tx) will be used, which means both + transmitter and receiver will send and receive data by following clocks + of transmitter. + type: boolean + + fsl,dataline: + $ref: /schemas/types.yaml#/definitions/uint32-matrix + description: | + Configure the dataline. It has 3 value for each configuration + maxItems: 16 + items: + items: + - description: format Default(0), I2S(1) or PDM(2) + enum: [0, 1, 2] + - description: dataline mask for 'rx' + - description: dataline mask for 'tx' + + fsl,sai-mclk-direction-output: + description: SAI will output the SAI MCLK clock. + type: boolean + + fsl,shared-interrupt: + description: Interrupt is shared with other modules. + type: boolean + + "#sound-dai-cells": + const: 0 + description: optional, some dts node didn't add it. + +allOf: + - if: + properties: + compatible: + contains: + const: fsl,vf610-sai + then: + properties: + dmas: + items: + - description: DMA controller phandle and request line for TX + - description: DMA controller phandle and request line for RX + dma-names: + items: + - const: tx + - const: rx + else: + properties: + dmas: + items: + - description: DMA controller phandle and request line for RX + - description: DMA controller phandle and request line for TX + dma-names: + items: + - const: rx + - const: tx + - if: + required: + - fsl,sai-asynchronous + then: + properties: + fsl,sai-synchronous-rx: false + +required: + - compatible + - reg + - interrupts + - dmas + - dma-names + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/vf610-clock.h> + sai2: sai@40031000 { + compatible = "fsl,vf610-sai"; + reg = <0x40031000 0x1000>; + interrupts = <86 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sai2_1>; + clocks = <&clks VF610_CLK_PLATFORM_BUS>, + <&clks VF610_CLK_SAI2>, + <&clks 0>, <&clks 0>; + clock-names = "bus", "mclk1", "mclk2", "mclk3"; + dma-names = "tx", "rx"; + dmas = <&edma0 0 21>, + <&edma0 0 20>; + big-endian; + lsb-first; + }; + + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/imx8mm-clock.h> + sai1: sai@30010000 { + compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai"; + reg = <0x30010000 0x10000>; + interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MM_CLK_SAI1_IPG>, + <&clk IMX8MM_CLK_DUMMY>, + <&clk IMX8MM_CLK_SAI1_ROOT>, + <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>; + clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3"; + dmas = <&sdma2 0 2 0>, <&sdma2 1 2 0>; + dma-names = "rx", "tx"; + fsl,dataline = <1 0xff 0xff 2 0xff 0x11>; + #sound-dai-cells = <0>; + }; diff --git a/Documentation/devicetree/bindings/sound/fsl-sai.txt b/Documentation/devicetree/bindings/sound/fsl-sai.txt deleted file mode 100644 index fbdefc3fade7..000000000000 --- a/Documentation/devicetree/bindings/sound/fsl-sai.txt +++ /dev/null @@ -1,95 +0,0 @@ -Freescale Synchronous Audio Interface (SAI). - -The SAI is based on I2S module that used communicating with audio codecs, -which provides a synchronous audio interface that supports fullduplex -serial interfaces with frame synchronization such as I2S, AC97, TDM, and -codec/DSP interfaces. - -Required properties: - - - compatible : Compatible list, contains "fsl,vf610-sai", - "fsl,imx6sx-sai", "fsl,imx6ul-sai", - "fsl,imx7ulp-sai", "fsl,imx8mq-sai", - "fsl,imx8qm-sai", "fsl,imx8mm-sai", - "fsl,imx8mn-sai", "fsl,imx8mp-sai", or - "fsl,imx8ulp-sai". - - - reg : Offset and length of the register set for the device. - - - clocks : Must contain an entry for each entry in clock-names. - - - clock-names : Must include the "bus" for register access and - "mclk1", "mclk2", "mclk3" for bit clock and frame - clock providing. - "pll8k", "pll11k" are optional, they are the clock - source for root clock, one is for 8kHz series rates - another one is for 11kHz series rates. - - dmas : Generic dma devicetree binding as described in - Documentation/devicetree/bindings/dma/dma.txt. - - - dma-names : Two dmas have to be defined, "tx" and "rx". - - - pinctrl-names : Must contain a "default" entry. - - - pinctrl-NNN : One property must exist for each entry in - pinctrl-names. See ../pinctrl/pinctrl-bindings.txt - for details of the property values. - - - lsb-first : Configures whether the LSB or the MSB is transmitted - first for the fifo data. If this property is absent, - the MSB is transmitted first as default, or the LSB - is transmitted first. - - - fsl,sai-synchronous-rx: This is a boolean property. If present, indicating - that SAI will work in the synchronous mode (sync Tx - with Rx) which means both the transmitter and the - receiver will send and receive data by following - receiver's bit clocks and frame sync clocks. - - - fsl,sai-asynchronous: This is a boolean property. If present, indicating - that SAI will work in the asynchronous mode, which - means both transmitter and receiver will send and - receive data by following their own bit clocks and - frame sync clocks separately. - - - fsl,dataline : configure the dataline. it has 3 value for each configuration - first one means the type: I2S(1) or PDM(2) - second one is dataline mask for 'rx' - third one is dataline mask for 'tx'. - for example: fsl,dataline = <1 0xff 0xff 2 0xff 0x11>; - it means I2S type rx mask is 0xff, tx mask is 0xff, PDM type - rx mask is 0xff, tx mask is 0x11 (dataline 1 and 4 enabled). - -Optional properties: - - - big-endian : Boolean property, required if all the SAI - registers are big-endian rather than little-endian. - -Optional properties (for mx6ul): - - - fsl,sai-mclk-direction-output: This is a boolean property. If present, - indicates that SAI will output the SAI MCLK clock. - -Note: -- If both fsl,sai-asynchronous and fsl,sai-synchronous-rx are absent, the - default synchronous mode (sync Rx with Tx) will be used, which means both - transmitter and receiver will send and receive data by following clocks - of transmitter. -- fsl,sai-asynchronous and fsl,sai-synchronous-rx are exclusive. - -Example: -sai2: sai@40031000 { - compatible = "fsl,vf610-sai"; - reg = <0x40031000 0x1000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_sai2_1>; - clocks = <&clks VF610_CLK_PLATFORM_BUS>, - <&clks VF610_CLK_SAI2>, - <&clks 0>, <&clks 0>; - clock-names = "bus", "mclk1", "mclk2", "mclk3"; - dma-names = "tx", "rx"; - dmas = <&edma0 0 VF610_EDMA_MUXID0_SAI2_TX>, - <&edma0 0 VF610_EDMA_MUXID0_SAI2_RX>; - big-endian; - lsb-first; -}; diff --git a/Documentation/devicetree/bindings/sound/google,sc7180-trogdor.yaml b/Documentation/devicetree/bindings/sound/google,sc7180-trogdor.yaml index 233caa0ade87..67ccddd44489 100644 --- a/Documentation/devicetree/bindings/sound/google,sc7180-trogdor.yaml +++ b/Documentation/devicetree/bindings/sound/google,sc7180-trogdor.yaml @@ -61,6 +61,8 @@ patternProperties: cpu: description: Holds subnode which indicates cpu dai. type: object + additionalProperties: false + properties: sound-dai: maxItems: 1 @@ -68,6 +70,8 @@ patternProperties: codec: description: Holds subnode which indicates codec dai. type: object + additionalProperties: false + properties: sound-dai: maxItems: 1 diff --git a/Documentation/devicetree/bindings/sound/imx-audio-card.yaml b/Documentation/devicetree/bindings/sound/imx-audio-card.yaml index bb3a435722c7..b6f5d486600e 100644 --- a/Documentation/devicetree/bindings/sound/imx-audio-card.yaml +++ b/Documentation/devicetree/bindings/sound/imx-audio-card.yaml @@ -58,6 +58,7 @@ patternProperties: cpu: description: Holds subnode which indicates cpu dai. type: object + additionalProperties: false properties: sound-dai: maxItems: 1 @@ -65,6 +66,7 @@ patternProperties: codec: description: Holds subnode which indicates codec dai. type: object + additionalProperties: false properties: sound-dai: minItems: 1 diff --git a/Documentation/devicetree/bindings/sound/intel,keembay-i2s.yaml b/Documentation/devicetree/bindings/sound/intel,keembay-i2s.yaml index 803627e984f6..b2603f611af9 100644 --- a/Documentation/devicetree/bindings/sound/intel,keembay-i2s.yaml +++ b/Documentation/devicetree/bindings/sound/intel,keembay-i2s.yaml @@ -5,7 +5,7 @@ $id: http://devicetree.org/schemas/sound/intel,keembay-i2s.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Intel KeemBay I2S Device Tree Bindings +title: Intel KeemBay I2S maintainers: - Sia, Jee Heng <jee.heng.sia@intel.com> diff --git a/Documentation/devicetree/bindings/sound/linux,bt-sco.yaml b/Documentation/devicetree/bindings/sound/linux,bt-sco.yaml index e3a1f485f664..b97e0fcbdba3 100644 --- a/Documentation/devicetree/bindings/sound/linux,bt-sco.yaml +++ b/Documentation/devicetree/bindings/sound/linux,bt-sco.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/sound/linux,bt-sco.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Bluetooth SCO Audio Codec Device Tree Bindings +title: Bluetooth SCO Audio Codec maintainers: - Mark Brown <broonie@kernel.org> diff --git a/Documentation/devicetree/bindings/sound/linux,spdif-dit.yaml b/Documentation/devicetree/bindings/sound/linux,spdif-dit.yaml index a4f9257e313d..808f6d2736c7 100644 --- a/Documentation/devicetree/bindings/sound/linux,spdif-dit.yaml +++ b/Documentation/devicetree/bindings/sound/linux,spdif-dit.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/sound/linux,spdif-dit.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Dummy SPDIF Transmitter Device Tree Bindings +title: Dummy SPDIF Transmitter maintainers: - Mark Brown <broonie@kernel.org> diff --git a/Documentation/devicetree/bindings/sound/mchp,spdifrx.yaml b/Documentation/devicetree/bindings/sound/mchp,spdifrx.yaml index 970311143253..70a47c6823b1 100644 --- a/Documentation/devicetree/bindings/sound/mchp,spdifrx.yaml +++ b/Documentation/devicetree/bindings/sound/mchp,spdifrx.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/sound/mchp,spdifrx.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Microchip S/PDIF Rx Controller Device Tree Bindings +title: Microchip S/PDIF Rx Controller maintainers: - Codrin Ciubotariu <codrin.ciubotariu@microchip.com> diff --git a/Documentation/devicetree/bindings/sound/mchp,spdiftx.yaml b/Documentation/devicetree/bindings/sound/mchp,spdiftx.yaml index d5c022e49526..d218e4ab9a7a 100644 --- a/Documentation/devicetree/bindings/sound/mchp,spdiftx.yaml +++ b/Documentation/devicetree/bindings/sound/mchp,spdiftx.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/sound/mchp,spdiftx.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Microchip S/PDIF Tx Controller Device Tree Bindings +title: Microchip S/PDIF Tx Controller maintainers: - Codrin Ciubotariu <codrin.ciubotariu@microchip.com> diff --git a/Documentation/devicetree/bindings/sound/mt6359.yaml b/Documentation/devicetree/bindings/sound/mt6359.yaml index a54f466f769d..23d411fc4200 100644 --- a/Documentation/devicetree/bindings/sound/mt6359.yaml +++ b/Documentation/devicetree/bindings/sound/mt6359.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/sound/mt6359.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Mediatek MT6359 Codec Device Tree Bindings +title: Mediatek MT6359 Codec maintainers: - Eason Yen <eason.yen@mediatek.com> diff --git a/Documentation/devicetree/bindings/sound/mt8186-mt6366-da7219-max98357.yaml b/Documentation/devicetree/bindings/sound/mt8186-mt6366-da7219-max98357.yaml index 513cd28b2027..d427f7f623db 100644 --- a/Documentation/devicetree/bindings/sound/mt8186-mt6366-da7219-max98357.yaml +++ b/Documentation/devicetree/bindings/sound/mt8186-mt6366-da7219-max98357.yaml @@ -43,6 +43,16 @@ properties: required: - sound-dai + mediatek,adsp: + $ref: /schemas/types.yaml#/definitions/phandle + description: The phandle of MT8186 ADSP platform. + + mediatek,dai-link: + $ref: /schemas/types.yaml#/definitions/string-array + description: + A list of the desired dai-links in the sound card. Each entry is a + name defined in the machine driver. + additionalProperties: false required: diff --git a/Documentation/devicetree/bindings/sound/mt8186-mt6366-rt1019-rt5682s.yaml b/Documentation/devicetree/bindings/sound/mt8186-mt6366-rt1019-rt5682s.yaml index 059a7629b2d3..4fc5b045d3cf 100644 --- a/Documentation/devicetree/bindings/sound/mt8186-mt6366-rt1019-rt5682s.yaml +++ b/Documentation/devicetree/bindings/sound/mt8186-mt6366-rt1019-rt5682s.yaml @@ -43,6 +43,16 @@ properties: required: - sound-dai + mediatek,adsp: + $ref: /schemas/types.yaml#/definitions/phandle + description: The phandle of MT8186 ADSP platform. + + mediatek,dai-link: + $ref: /schemas/types.yaml#/definitions/string-array + description: + A list of the desired dai-links in the sound card. Each entry is a + name defined in the machine driver. + additionalProperties: false required: diff --git a/Documentation/devicetree/bindings/sound/mt8192-mt6359-rt1015-rt5682.yaml b/Documentation/devicetree/bindings/sound/mt8192-mt6359-rt1015-rt5682.yaml index 4fa179909c62..478be7e3fa29 100644 --- a/Documentation/devicetree/bindings/sound/mt8192-mt6359-rt1015-rt5682.yaml +++ b/Documentation/devicetree/bindings/sound/mt8192-mt6359-rt1015-rt5682.yaml @@ -30,6 +30,8 @@ properties: headset-codec: type: object + additionalProperties: false + properties: sound-dai: $ref: /schemas/types.yaml#/definitions/phandle @@ -38,6 +40,8 @@ properties: speaker-codecs: type: object + additionalProperties: false + properties: sound-dai: minItems: 1 diff --git a/Documentation/devicetree/bindings/sound/nau8825.txt b/Documentation/devicetree/bindings/sound/nau8825.txt index 388a7bc60b1f..cb861aca8d40 100644 --- a/Documentation/devicetree/bindings/sound/nau8825.txt +++ b/Documentation/devicetree/bindings/sound/nau8825.txt @@ -71,6 +71,9 @@ Optional properties: - nuvoton,crosstalk-enable: make crosstalk function enable if set. + - nuvoton,adcout-drive-strong: make the drive strength of ADCOUT IO PIN strong if set. + Otherwise, the drive keeps normal strength. + - clocks: list of phandle and clock specifier pairs according to common clock bindings for the clocks described in clock-names - clock-names: should include "mclk" for the MCLK master clock diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra186-asrc.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra186-asrc.yaml index 520d0d063d1a..d82415c21271 100644 --- a/Documentation/devicetree/bindings/sound/nvidia,tegra186-asrc.yaml +++ b/Documentation/devicetree/bindings/sound/nvidia,tegra186-asrc.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/sound/nvidia,tegra186-asrc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Tegra186 ASRC Device Tree Bindings +title: Tegra186 ASRC description: | Asynchronous Sample Rate Converter (ASRC) converts the sampling frequency diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra186-dspk.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra186-dspk.yaml index 73b98b2f3543..3d538df878ea 100644 --- a/Documentation/devicetree/bindings/sound/nvidia,tegra186-dspk.yaml +++ b/Documentation/devicetree/bindings/sound/nvidia,tegra186-dspk.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/sound/nvidia,tegra186-dspk.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Tegra186 DSPK Controller Device Tree Bindings +title: Tegra186 DSPK Controller description: | The Digital Speaker Controller (DSPK) can be viewed as a Pulse diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra210-admaif.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra210-admaif.yaml index 372043edd98f..15ab40aeab1e 100644 --- a/Documentation/devicetree/bindings/sound/nvidia,tegra210-admaif.yaml +++ b/Documentation/devicetree/bindings/sound/nvidia,tegra210-admaif.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/sound/nvidia,tegra210-admaif.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Tegra210 ADMAIF Device Tree Bindings +title: Tegra210 ADMAIF description: | ADMAIF is the interface between ADMA and AHUB. Each ADMA channel diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra210-adx.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra210-adx.yaml index 8d8dc7fb3f0c..ea0dc0ece1bc 100644 --- a/Documentation/devicetree/bindings/sound/nvidia,tegra210-adx.yaml +++ b/Documentation/devicetree/bindings/sound/nvidia,tegra210-adx.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/sound/nvidia,tegra210-adx.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Tegra210 ADX Device Tree Bindings +title: Tegra210 ADX description: | The Audio Demultiplexer (ADX) block takes an input stream with up to diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra210-ahub.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra210-ahub.yaml index 47b6e712e4fb..89f7805de274 100644 --- a/Documentation/devicetree/bindings/sound/nvidia,tegra210-ahub.yaml +++ b/Documentation/devicetree/bindings/sound/nvidia,tegra210-ahub.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/sound/nvidia,tegra210-ahub.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Tegra210 AHUB Device Tree Bindings +title: Tegra210 AHUB description: | The Audio Hub (AHUB) comprises a collection of hardware accelerators diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra210-amx.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra210-amx.yaml index f9e4fc6e0c47..1aff61f072bb 100644 --- a/Documentation/devicetree/bindings/sound/nvidia,tegra210-amx.yaml +++ b/Documentation/devicetree/bindings/sound/nvidia,tegra210-amx.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/sound/nvidia,tegra210-amx.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Tegra210 AMX Device Tree Bindings +title: Tegra210 AMX description: | The Audio Multiplexer (AMX) block can multiplex up to four input streams diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra210-dmic.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra210-dmic.yaml index bcb496d3ace5..0f9d2b461e02 100644 --- a/Documentation/devicetree/bindings/sound/nvidia,tegra210-dmic.yaml +++ b/Documentation/devicetree/bindings/sound/nvidia,tegra210-dmic.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/sound/nvidia,tegra210-dmic.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Tegra210 DMIC Controller Device Tree Bindings +title: Tegra210 DMIC Controller description: | The Digital MIC (DMIC) Controller is used to interface with Pulse diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra210-i2s.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra210-i2s.yaml index 6188f561f878..12cd17eede99 100644 --- a/Documentation/devicetree/bindings/sound/nvidia,tegra210-i2s.yaml +++ b/Documentation/devicetree/bindings/sound/nvidia,tegra210-i2s.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/sound/nvidia,tegra210-i2s.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Tegra210 I2S Controller Device Tree Bindings +title: Tegra210 I2S Controller description: | The Inter-IC Sound (I2S) controller implements full-duplex, diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra210-mixer.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra210-mixer.yaml index ee1e1d2da79a..570b03282aeb 100644 --- a/Documentation/devicetree/bindings/sound/nvidia,tegra210-mixer.yaml +++ b/Documentation/devicetree/bindings/sound/nvidia,tegra210-mixer.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/sound/nvidia,tegra210-mixer.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Tegra210 Mixer Device Tree Bindings +title: Tegra210 Mixer description: | The Mixer supports mixing of up to ten 7.1 audio input streams and diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra210-mvc.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra210-mvc.yaml index c9888c553e78..4aecbc847b98 100644 --- a/Documentation/devicetree/bindings/sound/nvidia,tegra210-mvc.yaml +++ b/Documentation/devicetree/bindings/sound/nvidia,tegra210-mvc.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/sound/nvidia,tegra210-mvc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Tegra210 MVC Device Tree Bindings +title: Tegra210 MVC description: | The Master Volume Control (MVC) provides gain or attenuation to a digital diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra210-sfc.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra210-sfc.yaml index 8579306fc56f..694f890d6305 100644 --- a/Documentation/devicetree/bindings/sound/nvidia,tegra210-sfc.yaml +++ b/Documentation/devicetree/bindings/sound/nvidia,tegra210-sfc.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/sound/nvidia,tegra210-sfc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Tegra210 SFC Device Tree Bindings +title: Tegra210 SFC description: | The Sampling Frequency Converter (SFC) converts the sampling frequency diff --git a/Documentation/devicetree/bindings/sound/qcom,lpass-rx-macro.yaml b/Documentation/devicetree/bindings/sound/qcom,lpass-rx-macro.yaml index a6905bcf89d2..1de11e7f33bb 100644 --- a/Documentation/devicetree/bindings/sound/qcom,lpass-rx-macro.yaml +++ b/Documentation/devicetree/bindings/sound/qcom,lpass-rx-macro.yaml @@ -14,6 +14,8 @@ properties: enum: - qcom,sc7280-lpass-rx-macro - qcom,sm8250-lpass-rx-macro + - qcom,sm8450-lpass-rx-macro + - qcom,sc8280xp-lpass-rx-macro reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/sound/qcom,lpass-tx-macro.yaml b/Documentation/devicetree/bindings/sound/qcom,lpass-tx-macro.yaml index 324595a62ae8..de8297b358e8 100644 --- a/Documentation/devicetree/bindings/sound/qcom,lpass-tx-macro.yaml +++ b/Documentation/devicetree/bindings/sound/qcom,lpass-tx-macro.yaml @@ -14,6 +14,8 @@ properties: enum: - qcom,sc7280-lpass-tx-macro - qcom,sm8250-lpass-tx-macro + - qcom,sm8450-lpass-tx-macro + - qcom,sc8280xp-lpass-tx-macro reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/sound/qcom,lpass-va-macro.yaml b/Documentation/devicetree/bindings/sound/qcom,lpass-va-macro.yaml index 7b4cc84eda8c..9f473c08cb2e 100644 --- a/Documentation/devicetree/bindings/sound/qcom,lpass-va-macro.yaml +++ b/Documentation/devicetree/bindings/sound/qcom,lpass-va-macro.yaml @@ -14,6 +14,8 @@ properties: enum: - qcom,sc7280-lpass-va-macro - qcom,sm8250-lpass-va-macro + - qcom,sm8450-lpass-va-macro + - qcom,sc8280xp-lpass-va-macro reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/sound/qcom,lpass-wsa-macro.yaml b/Documentation/devicetree/bindings/sound/qcom,lpass-wsa-macro.yaml index 13cdb8a10687..4959ad658eac 100644 --- a/Documentation/devicetree/bindings/sound/qcom,lpass-wsa-macro.yaml +++ b/Documentation/devicetree/bindings/sound/qcom,lpass-wsa-macro.yaml @@ -14,6 +14,8 @@ properties: enum: - qcom,sc7280-lpass-wsa-macro - qcom,sm8250-lpass-wsa-macro + - qcom,sm8450-lpass-wsa-macro + - qcom,sc8280xp-lpass-wsa-macro reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/sound/qcom,q6adm-routing.yaml b/Documentation/devicetree/bindings/sound/qcom,q6adm-routing.yaml new file mode 100644 index 000000000000..d0f7a79e240a --- /dev/null +++ b/Documentation/devicetree/bindings/sound/qcom,q6adm-routing.yaml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/qcom,q6adm-routing.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Audio Device Manager (Q6ADM) routing + +maintainers: + - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> + +description: + Qualcomm Audio Device Manager (Q6ADM) routing node represents routing + specific configuration. + +properties: + compatible: + enum: + - qcom,q6adm-routing + + "#sound-dai-cells": + const: 0 + +required: + - compatible + - "#sound-dai-cells" + +additionalProperties: false + +examples: + - | + #include <dt-bindings/soc/qcom,apr.h> + #include <dt-bindings/sound/qcom,q6asm.h> + + apr { + compatible = "qcom,apr-v2"; + qcom,domain = <APR_DOMAIN_ADSP>; + #address-cells = <1>; + #size-cells = <0>; + + service@8 { + compatible = "qcom,q6adm"; + reg = <APR_SVC_ADM>; + qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; + + routing { + compatible = "qcom,q6adm-routing"; + #sound-dai-cells = <0>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/sound/qcom,q6adm.txt b/Documentation/devicetree/bindings/sound/qcom,q6adm.txt deleted file mode 100644 index 15c353a20de8..000000000000 --- a/Documentation/devicetree/bindings/sound/qcom,q6adm.txt +++ /dev/null @@ -1,39 +0,0 @@ -Qualcomm Audio Device Manager (Q6ADM) binding - -Q6ADM is one of the APR audio service on Q6DSP. -Please refer to qcom,apr.txt for details of the coommon apr service bindings -used by the apr service device. - -- but must contain the following property: - -- compatible: - Usage: required - Value type: <stringlist> - Definition: must be "qcom,q6adm-v<MAJOR-NUMBER>.<MINOR-NUMBER>". - Or "qcom,q6adm" where the version number can be queried - from DSP. - example "qcom,q6adm-v2.0" - - -= ADM routing -"routing" subnode of the ADM node represents adm routing specific configuration - -- compatible: - Usage: required - Value type: <stringlist> - Definition: must be "qcom,q6adm-routing". - -- #sound-dai-cells - Usage: required - Value type: <u32> - Definition: Must be 0 - -= EXAMPLE -apr-service@8 { - compatible = "qcom,q6adm"; - reg = <APR_SVC_ADM>; - q6routing: routing { - compatible = "qcom,q6adm-routing"; - #sound-dai-cells = <0>; - }; -}; diff --git a/Documentation/devicetree/bindings/sound/qcom,q6afe.txt b/Documentation/devicetree/bindings/sound/qcom,q6afe.txt deleted file mode 100644 index bc6b5f1fe4f1..000000000000 --- a/Documentation/devicetree/bindings/sound/qcom,q6afe.txt +++ /dev/null @@ -1,20 +0,0 @@ -Qualcomm Audio Front End (Q6AFE) binding - -AFE is one of the APR audio service on Q6DSP -Please refer to qcom,apr.txt for details of the common apr service bindings -used by all apr services. Must contain the following properties. - -- compatible: - Usage: required - Value type: <stringlist> - Definition: must be "qcom,q6afe-v<MAJOR-NUMBER>.<MINOR-NUMBER>" - Or "qcom,q6afe" where the version number can be queried - from DSP. - example "qcom,q6afe" - -= EXAMPLE - -apr-service@4 { - compatible = "qcom,q6afe"; - reg = <APR_SVC_AFE>; -}; diff --git a/Documentation/devicetree/bindings/sound/qcom,q6apm-dai.yaml b/Documentation/devicetree/bindings/sound/qcom,q6apm-dai.yaml index 5d972784321d..24f7bf2bfd95 100644 --- a/Documentation/devicetree/bindings/sound/qcom,q6apm-dai.yaml +++ b/Documentation/devicetree/bindings/sound/qcom,q6apm-dai.yaml @@ -16,16 +16,12 @@ properties: compatible: const: qcom,q6apm-dais - reg: - maxItems: 1 - iommus: maxItems: 1 required: - compatible - iommus - - reg additionalProperties: false @@ -37,17 +33,14 @@ examples: #address-cells = <1>; #size-cells = <0>; qcom,domain = <GPR_DOMAIN_ID_ADSP>; - service@1 { - compatible = "qcom,q6apm"; - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - apm-dai@1 { - compatible = "qcom,q6apm-dais"; - iommus = <&apps_smmu 0x1801 0x0>; + service@1 { + compatible = "qcom,q6apm"; reg = <1>; - }; + + dais { + compatible = "qcom,q6apm-dais"; + iommus = <&apps_smmu 0x1801 0x0>; + }; }; }; diff --git a/Documentation/devicetree/bindings/sound/qcom,q6asm-dais.yaml b/Documentation/devicetree/bindings/sound/qcom,q6asm-dais.yaml new file mode 100644 index 000000000000..8deb8ffb143b --- /dev/null +++ b/Documentation/devicetree/bindings/sound/qcom,q6asm-dais.yaml @@ -0,0 +1,112 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/qcom,q6asm-dais.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Audio Stream Manager (Q6ASM) + +maintainers: + - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> + +description: + Q6ASM is one of the APR audio services on Q6DSP. Each of its subnodes + represent a dai with board specific configuration. + +properties: + compatible: + enum: + - qcom,q6asm-dais + + iommus: + maxItems: 1 + + "#sound-dai-cells": + const: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + +patternProperties: + "^dai@[0-9]+$": + type: object + description: + Q6ASM Digital Audio Interface + + properties: + reg: + maxItems: 1 + + direction: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1, 2] + description: | + The direction of the dai stream:: + - Q6ASM_DAI_TX_RX (0) for both tx and rx + - Q6ASM_DAI_TX (1) for only tx (Capture/Encode) + - Q6ASM_DAI_RX (2) for only rx (Playback/Decode) + + is-compress-dai: + type: boolean + description: + Compress offload dai. + + dependencies: + is-compress-dai: ["direction"] + + required: + - reg + + additionalProperties: false + +required: + - compatible + - "#sound-dai-cells" + - "#address-cells" + - "#size-cells" + +additionalProperties: false + +examples: + - | + #include <dt-bindings/soc/qcom,apr.h> + #include <dt-bindings/sound/qcom,q6asm.h> + + apr { + compatible = "qcom,apr-v2"; + qcom,domain = <APR_DOMAIN_ADSP>; + #address-cells = <1>; + #size-cells = <0>; + + service@7 { + compatible = "qcom,q6asm"; + reg = <APR_SVC_ASM>; + qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; + + dais { + compatible = "qcom,q6asm-dais"; + iommus = <&apps_smmu 0x1821 0x0>; + #address-cells = <1>; + #size-cells = <0>; + #sound-dai-cells = <1>; + + dai@0 { + reg = <0>; + }; + + dai@1 { + reg = <1>; + }; + + dai@2 { + reg = <2>; + is-compress-dai; + direction = <1>; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/sound/qcom,q6asm.txt b/Documentation/devicetree/bindings/sound/qcom,q6asm.txt deleted file mode 100644 index 0d0075125243..000000000000 --- a/Documentation/devicetree/bindings/sound/qcom,q6asm.txt +++ /dev/null @@ -1,70 +0,0 @@ -Qualcomm Audio Stream Manager (Q6ASM) binding - -Q6ASM is one of the APR audio service on Q6DSP. -Please refer to qcom,apr.txt for details of the common apr service bindings -used by the apr service device. - -- but must contain the following property: - -- compatible: - Usage: required - Value type: <stringlist> - Definition: must be "qcom,q6asm-v<MAJOR-NUMBER>.<MINOR-NUMBER>". - Or "qcom,q6asm" where the version number can be queried - from DSP. - example "qcom,q6asm-v2.0" - -= ASM DAIs (Digital Audio Interface) -"dais" subnode of the ASM node represents dai specific configuration - -- compatible: - Usage: required - Value type: <stringlist> - Definition: must be "qcom,q6asm-dais". - -- #sound-dai-cells - Usage: required - Value type: <u32> - Definition: Must be 1 - -== ASM DAI is subnode of "dais" and represent a dai, it includes board specific -configuration of each dai. Must contain the following properties. - -- reg - Usage: required - Value type: <u32> - Definition: Must be dai id - -- direction: - Usage: Required for Compress offload dais - Value type: <u32> - Definition: Specifies the direction of the dai stream - Q6ASM_DAI_TX_RX (0) for both tx and rx - Q6ASM_DAI_TX (1) for only tx (Capture/Encode) - Q6ASM_DAI_RX (2) for only rx (Playback/Decode) - -- is-compress-dai: - Usage: Required for Compress offload dais - Value type: <boolean> - Definition: present for Compress offload dais - - -= EXAMPLE -#include <dt-bindings/sound/qcom,q6asm.h> - -apr-service@7 { - compatible = "qcom,q6asm"; - reg = <APR_SVC_ASM>; - q6asmdai: dais { - compatible = "qcom,q6asm-dais"; - #address-cells = <1>; - #size-cells = <0>; - #sound-dai-cells = <1>; - - dai@0 { - reg = <0>; - direction = <Q6ASM_DAI_RX>; - is-compress-dai; - }; - }; -}; diff --git a/Documentation/devicetree/bindings/sound/qcom,q6core.txt b/Documentation/devicetree/bindings/sound/qcom,q6core.txt deleted file mode 100644 index 5cd4cc9b1fde..000000000000 --- a/Documentation/devicetree/bindings/sound/qcom,q6core.txt +++ /dev/null @@ -1,21 +0,0 @@ -Qualcomm ADSP Core service binding - -Q6CORE is one of the APR audio service on Q6DSP. -Please refer to qcom,apr.txt for details of the common apr service bindings -used by the apr service device. - -- but must contain the following property: - -- compatible: - Usage: required - Value type: <stringlist> - Definition: must be "qcom,q6core-v<MAJOR-NUMBER>.<MINOR-NUMBER>". - Or "qcom,q6core" where the version number can be queried - from DSP. - example "qcom,q6core-v2.0" - -= EXAMPLE -apr-service@3 { - compatible = "qcom,q6core"; - reg = <APR_SVC_ADSP_CORE>; -}; diff --git a/Documentation/devicetree/bindings/sound/qcom,q6dsp-lpass-clocks.yaml b/Documentation/devicetree/bindings/sound/qcom,q6dsp-lpass-clocks.yaml index f83f00737a2f..fd567d20417d 100644 --- a/Documentation/devicetree/bindings/sound/qcom,q6dsp-lpass-clocks.yaml +++ b/Documentation/devicetree/bindings/sound/qcom,q6dsp-lpass-clocks.yaml @@ -18,9 +18,6 @@ properties: - qcom,q6afe-clocks - qcom,q6prm-lpass-clocks - reg: - maxItems: 1 - '#clock-cells': const: 2 description: @@ -32,7 +29,6 @@ properties: required: - compatible - - reg - "#clock-cells" additionalProperties: false @@ -42,19 +38,22 @@ examples: #include <dt-bindings/soc/qcom,apr.h> #include <dt-bindings/sound/qcom,q6afe.h> apr { + compatible = "qcom,apr-v2"; + qcom,domain = <APR_DOMAIN_ADSP>; #address-cells = <1>; #size-cells = <0>; - apr-service@4 { + + service@4 { + compatible = "qcom,q6afe"; reg = <APR_SVC_AFE>; - #address-cells = <1>; - #size-cells = <0>; - clock-controller@2 { - compatible = "qcom,q6afe-clocks"; - reg = <2>; - #clock-cells = <2>; + qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; + + clock-controller { + compatible = "qcom,q6afe-clocks"; + #clock-cells = <2>; }; }; - }; + }; - | #include <dt-bindings/soc/qcom,gpr.h> @@ -63,15 +62,14 @@ examples: qcom,domain = <GPR_DOMAIN_ID_ADSP>; #address-cells = <1>; #size-cells = <0>; + service@2 { reg = <GPR_PRM_MODULE_IID>; compatible = "qcom,q6prm"; - #address-cells = <1>; - #size-cells = <0>; - clock-controller@2 { - compatible = "qcom,q6prm-lpass-clocks"; - reg = <2>; - #clock-cells = <2>; + + clock-controller { + compatible = "qcom,q6prm-lpass-clocks"; + #clock-cells = <2>; }; }; - }; + }; diff --git a/Documentation/devicetree/bindings/sound/qcom,q6dsp-lpass-ports.yaml b/Documentation/devicetree/bindings/sound/qcom,q6dsp-lpass-ports.yaml index dc7fba7b92d5..e53fc0960a14 100644 --- a/Documentation/devicetree/bindings/sound/qcom,q6dsp-lpass-ports.yaml +++ b/Documentation/devicetree/bindings/sound/qcom,q6dsp-lpass-ports.yaml @@ -18,9 +18,6 @@ properties: - qcom,q6afe-dais - qcom,q6apm-lpass-dais - reg: - maxItems: 1 - '#sound-dai-cells': const: 1 @@ -145,7 +142,6 @@ patternProperties: required: - compatible - - reg - "#sound-dai-cells" - "#address-cells" - "#size-cells" @@ -157,26 +153,29 @@ examples: #include <dt-bindings/soc/qcom,apr.h> #include <dt-bindings/sound/qcom,q6afe.h> apr { + compatible = "qcom,apr-v2"; #address-cells = <1>; #size-cells = <0>; - apr-service@4 { + qcom,domain = <APR_DOMAIN_ADSP>; + + service@4 { + compatible = "qcom,q6afe"; reg = <APR_SVC_AFE>; - #address-cells = <1>; - #size-cells = <0>; - q6afedai@1 { - compatible = "qcom,q6afe-dais"; - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - #sound-dai-cells = <1>; - - dai@22 { - reg = <QUATERNARY_MI2S_RX>; - qcom,sd-lines = <0 1 2 3>; - }; + qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; + + dais { + compatible = "qcom,q6afe-dais"; + #address-cells = <1>; + #size-cells = <0>; + #sound-dai-cells = <1>; + + dai@22 { + reg = <QUATERNARY_MI2S_RX>; + qcom,sd-lines = <0 1 2 3>; + }; }; }; - }; + }; - | #include <dt-bindings/soc/qcom,gpr.h> gpr { @@ -184,22 +183,21 @@ examples: #address-cells = <1>; #size-cells = <0>; qcom,domain = <GPR_DOMAIN_ID_ADSP>; + service@1 { compatible = "qcom,q6apm"; reg = <GPR_APM_MODULE_IID>; - #address-cells = <1>; - #size-cells = <0>; - q6apmdai@1 { - compatible = "qcom,q6apm-lpass-dais"; - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - #sound-dai-cells = <1>; - - dai@22 { - reg = <QUATERNARY_MI2S_RX>; - qcom,sd-lines = <0 1 2 3>; - }; + + dais { + compatible = "qcom,q6apm-lpass-dais"; + #address-cells = <1>; + #size-cells = <0>; + #sound-dai-cells = <1>; + + dai@22 { + reg = <QUATERNARY_MI2S_RX>; + qcom,sd-lines = <0 1 2 3>; + }; }; }; - }; + }; diff --git a/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml b/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml index e6e27d09783e..70080d04ddc9 100644 --- a/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml +++ b/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml @@ -20,9 +20,11 @@ properties: - qcom,apq8016-sbc-sndcard - qcom,db845c-sndcard - qcom,msm8916-qdsp6-sndcard + - qcom,qrb5165-rb5-sndcard + - qcom,sc8280xp-sndcard - qcom,sdm845-sndcard - qcom,sm8250-sndcard - - qcom,qrb5165-rb5-sndcard + - qcom,sm8450-sndcard audio-routing: $ref: /schemas/types.yaml#/definitions/non-unique-string-array @@ -71,6 +73,8 @@ patternProperties: cpu: description: Holds subnode which indicates cpu dai. type: object + additionalProperties: false + properties: sound-dai: maxItems: 1 @@ -78,6 +82,8 @@ patternProperties: platform: description: Holds subnode which indicates platform dai. type: object + additionalProperties: false + properties: sound-dai: maxItems: 1 @@ -85,6 +91,8 @@ patternProperties: codec: description: Holds subnode which indicates codec dai. type: object + additionalProperties: false + properties: sound-dai: minItems: 1 diff --git a/Documentation/devicetree/bindings/sound/renesas,rsnd.yaml b/Documentation/devicetree/bindings/sound/renesas,rsnd.yaml index e17c0245f77a..679a246dd666 100644 --- a/Documentation/devicetree/bindings/sound/renesas,rsnd.yaml +++ b/Documentation/devicetree/bindings/sound/renesas,rsnd.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/sound/renesas,rsnd.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Renesas R-Car Sound Driver Device Tree Bindings +title: Renesas R-Car Sound Driver maintainers: - Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> @@ -129,6 +129,8 @@ properties: patternProperties: "^dvc-[0-1]$": type: object + additionalProperties: false + properties: dmas: maxItems: 1 @@ -145,7 +147,7 @@ properties: patternProperties: "^mix-[0-1]$": type: object - # no properties + additionalProperties: false additionalProperties: false rcar_sound,ctu: @@ -154,7 +156,7 @@ properties: patternProperties: "^ctu-[0-7]$": type: object - # no properties + additionalProperties: false additionalProperties: false rcar_sound,src: @@ -163,6 +165,8 @@ properties: patternProperties: "^src-[0-9]$": type: object + additionalProperties: false + properties: interrupts: maxItems: 1 @@ -186,6 +190,8 @@ properties: patternProperties: "^ssiu-[0-9]+$": type: object + additionalProperties: false + properties: dmas: maxItems: 2 @@ -206,6 +212,8 @@ properties: patternProperties: "^ssi-[0-9]$": type: object + additionalProperties: false + properties: interrupts: maxItems: 1 @@ -243,6 +251,8 @@ properties: patternProperties: "^dai([0-9]+)?$": type: object + additionalProperties: false + properties: playback: $ref: /schemas/types.yaml#/definitions/phandle-array diff --git a/Documentation/devicetree/bindings/sound/samsung,aries-wm8994.yaml b/Documentation/devicetree/bindings/sound/samsung,aries-wm8994.yaml index a01c4ad929b8..447e013f6e17 100644 --- a/Documentation/devicetree/bindings/sound/samsung,aries-wm8994.yaml +++ b/Documentation/devicetree/bindings/sound/samsung,aries-wm8994.yaml @@ -23,6 +23,7 @@ properties: cpu: type: object + additionalProperties: false properties: sound-dai: minItems: 2 @@ -34,6 +35,7 @@ properties: - sound-dai codec: + additionalProperties: false type: object properties: sound-dai: diff --git a/Documentation/devicetree/bindings/sound/samsung,midas-audio.yaml b/Documentation/devicetree/bindings/sound/samsung,midas-audio.yaml index ec50bcb4af5f..31095913e330 100644 --- a/Documentation/devicetree/bindings/sound/samsung,midas-audio.yaml +++ b/Documentation/devicetree/bindings/sound/samsung,midas-audio.yaml @@ -19,6 +19,7 @@ properties: cpu: type: object + additionalProperties: false properties: sound-dai: maxItems: 1 @@ -28,6 +29,7 @@ properties: codec: type: object + additionalProperties: false properties: sound-dai: maxItems: 1 diff --git a/Documentation/devicetree/bindings/sound/samsung,snow.yaml b/Documentation/devicetree/bindings/sound/samsung,snow.yaml index 51a83d3c7274..3d49aa4c9be2 100644 --- a/Documentation/devicetree/bindings/sound/samsung,snow.yaml +++ b/Documentation/devicetree/bindings/sound/samsung,snow.yaml @@ -19,6 +19,7 @@ properties: codec: type: object + additionalProperties: false properties: sound-dai: description: List of phandles to the CODEC and HDMI IP nodes. @@ -30,6 +31,7 @@ properties: cpu: type: object + additionalProperties: false properties: sound-dai: description: Phandle to the Samsung I2S controller. diff --git a/Documentation/devicetree/bindings/sound/simple-audio-amplifier.yaml b/Documentation/devicetree/bindings/sound/simple-audio-amplifier.yaml index 8327846356d3..5428ba9e23a6 100644 --- a/Documentation/devicetree/bindings/sound/simple-audio-amplifier.yaml +++ b/Documentation/devicetree/bindings/sound/simple-audio-amplifier.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/sound/simple-audio-amplifier.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Simple Audio Amplifier Device Tree Bindings +title: Simple Audio Amplifier maintainers: - Jerome Brunet <jbrunet@baylibre.com> diff --git a/Documentation/devicetree/bindings/sound/simple-card.yaml b/Documentation/devicetree/bindings/sound/simple-card.yaml index b261d49b9ddb..ed19899bc94b 100644 --- a/Documentation/devicetree/bindings/sound/simple-card.yaml +++ b/Documentation/devicetree/bindings/sound/simple-card.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/sound/simple-card.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Simple Audio Card Driver Device Tree Bindings +title: Simple Audio Card Driver maintainers: - Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> diff --git a/Documentation/devicetree/bindings/sound/sound-dai.yaml b/Documentation/devicetree/bindings/sound/sound-dai.yaml index 61c6f7abc4e7..ff9036e43c44 100644 --- a/Documentation/devicetree/bindings/sound/sound-dai.yaml +++ b/Documentation/devicetree/bindings/sound/sound-dai.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/sound/sound-dai.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Digital Audio Interface consumer Device Tree Bindings +title: Digital Audio Interface consumer maintainers: - Rob Herring <robh@kernel.org> diff --git a/Documentation/devicetree/bindings/sound/st,stm32-sai.yaml b/Documentation/devicetree/bindings/sound/st,stm32-sai.yaml index fe2e15504ebc..56d206f97a96 100644 --- a/Documentation/devicetree/bindings/sound/st,stm32-sai.yaml +++ b/Documentation/devicetree/bindings/sound/st,stm32-sai.yaml @@ -60,6 +60,7 @@ required: patternProperties: "^audio-controller@[0-9a-f]+$": type: object + additionalProperties: false description: Two subnodes corresponding to SAI sub-block instances A et B can be defined. Subnode can be omitted for unsused sub-block. @@ -121,6 +122,10 @@ patternProperties: description: Configure the SAI device as master clock provider. const: 0 + port: + $ref: audio-graph-port.yaml# + unevaluatedProperties: false + required: - compatible - "#sound-dai-cells" diff --git a/Documentation/devicetree/bindings/sound/test-component.yaml b/Documentation/devicetree/bindings/sound/test-component.yaml index 17fdb4317239..9c40a2122dfd 100644 --- a/Documentation/devicetree/bindings/sound/test-component.yaml +++ b/Documentation/devicetree/bindings/sound/test-component.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/sound/test-component.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Test Component Device Tree Bindings +title: Test Component maintainers: - Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> diff --git a/Documentation/devicetree/bindings/sound/ti,src4xxx.yaml b/Documentation/devicetree/bindings/sound/ti,src4xxx.yaml new file mode 100644 index 000000000000..9681b72b4918 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/ti,src4xxx.yaml @@ -0,0 +1,48 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/ti,src4xxx.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments SRC4392 Device Tree Bindings + +description: | + The SRC4392 is a digital audio codec that can be connected via + I2C or SPI. Currently, only I2C bus is supported. + +maintainers: + - Matt Flax <flatmax@flatmax.com> + +allOf: + - $ref: name-prefix.yaml# + +properties: + compatible: + const: ti,src4392 + + "#sound-dai-cells": + const: 0 + + reg: + maxItems: 1 + +required: + - "#sound-dai-cells" + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + audio-codec@70 { + #sound-dai-cells = <0>; + compatible = "ti,src4392"; + reg = <0x70>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/sound/ti,ts3a227e.yaml b/Documentation/devicetree/bindings/sound/ti,ts3a227e.yaml new file mode 100644 index 000000000000..785930658029 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/ti,ts3a227e.yaml @@ -0,0 +1,94 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/ti,ts3a227e.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments TS3A227E + Autonomous Audio Accessory Detection and Configuration Switch + +maintainers: + - Dylan Reid <dgreid@chromium.org> + +description: | + The TS3A227E detect headsets of 3-ring and 4-ring standards and + switches automatically to route the microphone correctly. It also + handles key press detection in accordance with the Android audio + headset specification v1.0. + +properties: + compatible: + enum: + - ti,ts3a227e + + reg: + const: 0x3b + + interrupts: + maxItems: 1 + + ti,micbias: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Intended MICBIAS voltage (datasheet section 9.6.7). + enum: + - 0 # 2.1 V + - 1 # 2.2 V + - 2 # 2.3 V + - 3 # 2.4 V + - 4 # 2.5 V + - 5 # 2.6 V + - 6 # 2.7 V + - 7 # 2.8 V + default: 1 + + ti,debounce-release-ms: + description: key release debounce time in ms (datasheet section 9.6.7). + enum: + - 0 + - 20 + default: 20 + + ti,debounce-press-ms: + description: key press debounce time in ms (datasheet section 9.6.7). + enum: + - 2 + - 40 + - 80 + - 120 + default: 80 + + ti,debounce-insertion-ms: + description: headset insertion debounce time in ms (datasheet section 9.6.5). + enum: + - 2 + - 30 + - 60 + - 90 + - 120 + - 150 + - 1000 + - 2000 + default: 90 + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + i2c { + #address-cells = <1>; + #size-cells = <0>; + codec: audio-controller@3b { + compatible = "ti,ts3a227e"; + reg = <0x3b>; + interrupt-parent = <&gpio1>; + interrupts = <3 IRQ_TYPE_LEVEL_LOW>; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/sound/ts3a227e.txt b/Documentation/devicetree/bindings/sound/ts3a227e.txt deleted file mode 100644 index 21ab45bc7e8f..000000000000 --- a/Documentation/devicetree/bindings/sound/ts3a227e.txt +++ /dev/null @@ -1,30 +0,0 @@ -Texas Instruments TS3A227E -Autonomous Audio Accessory Detection and Configuration Switch - -The TS3A227E detect headsets of 3-ring and 4-ring standards and -switches automatically to route the microphone correctly. It also -handles key press detection in accordance with the Android audio -headset specification v1.0. - -Required properties: - - - compatible: Should contain "ti,ts3a227e". - - reg: The i2c address. Should contain <0x3b>. - - interrupts: Interrupt number for /INT pin from the 227e - -Optional properies: - - ti,micbias: Intended MICBIAS voltage (datasheet section 9.6.7). - Select 0/1/2/3/4/5/6/7 to specify MICBIAS voltage - 2.1V/2.2V/2.3V/2.4V/2.5V/2.6V/2.7V/2.8V - Default value is "1" (2.2V). - -Examples: - - i2c { - ts3a227e@3b { - compatible = "ti,ts3a227e"; - reg = <0x3b>; - interrupt-parent = <&gpio>; - interrupts = <3 IRQ_TYPE_LEVEL_LOW>; - }; - }; diff --git a/Documentation/devicetree/bindings/sound/wlf,wm8940.yaml b/Documentation/devicetree/bindings/sound/wlf,wm8940.yaml index 8aadcbeed502..7386abb3a250 100644 --- a/Documentation/devicetree/bindings/sound/wlf,wm8940.yaml +++ b/Documentation/devicetree/bindings/sound/wlf,wm8940.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/sound/wlf,wm8940.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Wolfson WM8940 Codec Device Tree Bindings +title: Wolfson WM8940 Codec maintainers: - patches@opensource.cirrus.com diff --git a/Documentation/devicetree/bindings/sound/wlf,wm8978.yaml b/Documentation/devicetree/bindings/sound/wlf,wm8978.yaml index 96cf9fc9c8b0..1c8985d4dd5a 100644 --- a/Documentation/devicetree/bindings/sound/wlf,wm8978.yaml +++ b/Documentation/devicetree/bindings/sound/wlf,wm8978.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/sound/wlf,wm8978.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Wolfson WM8978 Codec Device Tree Bindings +title: Wolfson WM8978 Codec maintainers: - patches@opensource.cirrus.com diff --git a/Documentation/devicetree/bindings/spi/allwinner,sun4i-a10-spi.yaml b/Documentation/devicetree/bindings/spi/allwinner,sun4i-a10-spi.yaml index 8036499112f5..f1176a28fd87 100644 --- a/Documentation/devicetree/bindings/spi/allwinner,sun4i-a10-spi.yaml +++ b/Documentation/devicetree/bindings/spi/allwinner,sun4i-a10-spi.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/spi/allwinner,sun4i-a10-spi.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 SPI Controller Device Tree Bindings +title: Allwinner A10 SPI Controller allOf: - $ref: "spi-controller.yaml" diff --git a/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml b/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml index ca4c95345a49..58b7056f4a70 100644 --- a/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml +++ b/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/spi/allwinner,sun6i-a31-spi.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A31 SPI Controller Device Tree Bindings +title: Allwinner A31 SPI Controller allOf: - $ref: "spi-controller.yaml" diff --git a/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml b/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml index 50de0da42c13..0c10f7678178 100644 --- a/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml +++ b/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml @@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#" title: Amlogic Meson SPI Communication Controller maintainers: - - Neil Armstrong <narmstrong@baylibre.com> + - Neil Armstrong <neil.armstrong@linaro.org> allOf: - $ref: "spi-controller.yaml#" diff --git a/Documentation/devicetree/bindings/spi/amlogic,meson6-spifc.yaml b/Documentation/devicetree/bindings/spi/amlogic,meson6-spifc.yaml index 8a9d526d06eb..ac3b2ec300ac 100644 --- a/Documentation/devicetree/bindings/spi/amlogic,meson6-spifc.yaml +++ b/Documentation/devicetree/bindings/spi/amlogic,meson6-spifc.yaml @@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#" title: Amlogic Meson SPI Flash Controller maintainers: - - Neil Armstrong <narmstrong@baylibre.com> + - Neil Armstrong <neil.armstrong@linaro.org> allOf: - $ref: "spi-controller.yaml#" diff --git a/Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml b/Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml index d85d54024b2e..4dd973e341e6 100644 --- a/Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml +++ b/Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml @@ -34,6 +34,16 @@ properties: clocks: maxItems: 1 + dmas: + items: + - description: TX DMA Channel + - description: RX DMA Channel + + dma-names: + items: + - const: tx + - const: rx + atmel,fifo-size: $ref: /schemas/types.yaml#/definitions/uint32 description: | diff --git a/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml b/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml index 970b1119898b..a453996c13f2 100644 --- a/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml +++ b/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml @@ -85,8 +85,9 @@ examples: compatible = "mediatek,mt8173-nor"; reg = <0 0x1100d000 0 0xe0>; interrupts = <1>; - clocks = <&pericfg CLK_PERI_SPI>, <&topckgen CLK_TOP_SPINFI_IFR_SEL>; - clock-names = "spi", "sf"; + clocks = <&pericfg CLK_PERI_SPI>, <&topckgen CLK_TOP_SPINFI_IFR_SEL>, + <&pericfg CLK_PERI_NFI>; + clock-names = "spi", "sf", "axi"; #address-cells = <1>; #size-cells = <0>; diff --git a/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml b/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml index 7326c0a28d16..1051690e3753 100644 --- a/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml +++ b/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml @@ -4,7 +4,11 @@ $id: http://devicetree.org/schemas/spi/microchip,mpfs-spi.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Microchip MPFS {Q,}SPI Controller Device Tree Bindings +title: Microchip FPGA {Q,}SPI Controllers + +description: + SPI and QSPI controllers on Microchip PolarFire SoC and the "soft"/ + fabric IP cores they are based on maintainers: - Conor Dooley <conor.dooley@microchip.com> @@ -14,9 +18,12 @@ allOf: properties: compatible: - enum: - - microchip,mpfs-spi - - microchip,mpfs-qspi + oneOf: + - items: + - const: microchip,mpfs-qspi + - const: microchip,coreqspi-rtl-v2 + - const: microchip,coreqspi-rtl-v2 #FPGA QSPI + - const: microchip,mpfs-spi reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/spi/mxicy,mx25f0a-spi.yaml b/Documentation/devicetree/bindings/spi/mxicy,mx25f0a-spi.yaml index 9202c44b4478..a3aa5e07c0e4 100644 --- a/Documentation/devicetree/bindings/spi/mxicy,mx25f0a-spi.yaml +++ b/Documentation/devicetree/bindings/spi/mxicy,mx25f0a-spi.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/spi/mxicy,mx25f0a-spi.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Macronix SPI controller device tree bindings +title: Macronix SPI controller maintainers: - Miquel Raynal <miquel.raynal@bootlin.com> diff --git a/Documentation/devicetree/bindings/spi/nuvoton,npcm-pspi.txt b/Documentation/devicetree/bindings/spi/nuvoton,npcm-pspi.txt index b98203ca656d..a4e72e52af59 100644 --- a/Documentation/devicetree/bindings/spi/nuvoton,npcm-pspi.txt +++ b/Documentation/devicetree/bindings/spi/nuvoton,npcm-pspi.txt @@ -3,7 +3,8 @@ Nuvoton NPCM Peripheral Serial Peripheral Interface(PSPI) controller driver Nuvoton NPCM7xx SOC support two PSPI channels. Required properties: - - compatible : "nuvoton,npcm750-pspi" for NPCM7XX BMC + - compatible : "nuvoton,npcm750-pspi" for Poleg NPCM7XX. + "nuvoton,npcm845-pspi" for Arbel NPCM8XX. - #address-cells : should be 1. see spi-bus.txt - #size-cells : should be 0. see spi-bus.txt - specifies physical base address and size of the register. diff --git a/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad-peripheral-props.yaml b/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad-peripheral-props.yaml index 24e0c2181d25..2c3cada75339 100644 --- a/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad-peripheral-props.yaml +++ b/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad-peripheral-props.yaml @@ -29,5 +29,4 @@ properties: minimum: 0 maximum: 255 -unevaluatedProperties: true - +additionalProperties: true diff --git a/Documentation/devicetree/bindings/spi/ralink,mt7621-spi.yaml b/Documentation/devicetree/bindings/spi/ralink,mt7621-spi.yaml new file mode 100644 index 000000000000..22879f7dcb77 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/ralink,mt7621-spi.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/ralink,mt7621-spi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +maintainers: + - Sergio Paracuellos <sergio.paracuellos@gmail.com> + +title: Mediatek MT7621/MT7628 SPI controller + +allOf: + - $ref: /schemas/spi/spi-controller.yaml# + +properties: + compatible: + const: ralink,mt7621-spi + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + const: spi + + resets: + maxItems: 1 + + reset-names: + const: spi + +required: + - compatible + - reg + - resets + - "#address-cells" + - "#size-cells" + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/mt7621-clk.h> + #include <dt-bindings/reset/mt7621-reset.h> + + spi@b00 { + compatible = "ralink,mt7621-spi"; + reg = <0xb00 0x100>; + clocks = <&sysc MT7621_CLK_SPI>; + clock-names = "spi"; + resets = <&sysc MT7621_RST_SPI>; + reset-names = "spi"; + + #address-cells = <1>; + #size-cells = <0>; + + pinctrl-names = "default"; + pinctrl-0 = <&spi_pins>; + }; diff --git a/Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml b/Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml index 5de710adfa63..491a695a2deb 100644 --- a/Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml +++ b/Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml @@ -47,10 +47,16 @@ properties: - renesas,msiof-r8a77980 # R-Car V3H - renesas,msiof-r8a77990 # R-Car E3 - renesas,msiof-r8a77995 # R-Car D3 - - renesas,msiof-r8a779a0 # R-Car V3U - const: renesas,rcar-gen3-msiof # generic R-Car Gen3 and RZ/G2 # compatible device - items: + - enum: + - renesas,msiof-r8a779a0 # R-Car V3U + - renesas,msiof-r8a779f0 # R-Car S4-8 + - renesas,msiof-r8a779g0 # R-Car V4H + - const: renesas,rcar-gen4-msiof # generic R-Car Gen4 + # compatible device + - items: - const: renesas,sh-msiof # deprecated reg: @@ -69,6 +75,12 @@ properties: clocks: maxItems: 1 + power-domains: + maxItems: 1 + + resets: + maxItems: 1 + num-cs: description: | Total number of chip selects (default is 1). diff --git a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml index 37c3c272407d..d33b72fabc5d 100644 --- a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml +++ b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml @@ -104,7 +104,6 @@ properties: const: spi reg-io-width: - $ref: /schemas/types.yaml#/definitions/uint32 description: I/O register width (in bytes) implemented by this device default: 4 enum: [ 2, 4 ] diff --git a/Documentation/devicetree/bindings/spi/spi-cadence.yaml b/Documentation/devicetree/bindings/spi/spi-cadence.yaml index 82d0ca5c00f3..64bf4e621142 100644 --- a/Documentation/devicetree/bindings/spi/spi-cadence.yaml +++ b/Documentation/devicetree/bindings/spi/spi-cadence.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/spi/spi-cadence.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Cadence SPI controller Device Tree Bindings +title: Cadence SPI controller maintainers: - Michal Simek <michal.simek@xilinx.com> diff --git a/Documentation/devicetree/bindings/spi/spi-controller.yaml b/Documentation/devicetree/bindings/spi/spi-controller.yaml index 655713fba7e2..01042a7f382e 100644 --- a/Documentation/devicetree/bindings/spi/spi-controller.yaml +++ b/Documentation/devicetree/bindings/spi/spi-controller.yaml @@ -96,6 +96,11 @@ patternProperties: $ref: spi-peripheral-props.yaml properties: + spi-3wire: + $ref: /schemas/types.yaml#/definitions/flag + description: + The device requires 3-wire mode. + spi-cpha: $ref: /schemas/types.yaml#/definitions/flag description: diff --git a/Documentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml b/Documentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml index 1d46877fe46a..8b44284d30c6 100644 --- a/Documentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml +++ b/Documentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml @@ -19,7 +19,9 @@ properties: - fsl,imx7ulp-spi - fsl,imx8qxp-spi - items: - - const: fsl,imx8ulp-spi + - enum: + - fsl,imx8ulp-spi + - fsl,imx93-spi - const: fsl,imx7ulp-spi reg: maxItems: 1 @@ -37,6 +39,16 @@ properties: - const: per - const: ipg + dmas: + items: + - description: TX DMA Channel + - description: RX DMA Channel + + dma-names: + items: + - const: tx + - const: rx + fsl,spi-only-use-cs1-sel: description: spi common code does not support use of CS signals discontinuously. diff --git a/Documentation/devicetree/bindings/spi/spi-mt7621.txt b/Documentation/devicetree/bindings/spi/spi-mt7621.txt deleted file mode 100644 index d5baec0fa56e..000000000000 --- a/Documentation/devicetree/bindings/spi/spi-mt7621.txt +++ /dev/null @@ -1,26 +0,0 @@ -Binding for MTK SPI controller (MT7621 MIPS) - -Required properties: -- compatible: Should be one of the following: - - "ralink,mt7621-spi": for mt7621/mt7628/mt7688 platforms -- #address-cells: should be 1. -- #size-cells: should be 0. -- reg: Address and length of the register set for the device -- resets: phandle to the reset controller asserting this device in - reset - See ../reset/reset.txt for details. - -Optional properties: -- cs-gpios: see spi-bus.txt. - -Example: - -- SoC Specific Portion: -spi0: spi@b00 { - compatible = "ralink,mt7621-spi"; - reg = <0xb00 0x100>; - #address-cells = <1>; - #size-cells = <0>; - resets = <&rstctrl 18>; - reset-names = "spi"; -}; diff --git a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml index a4abe1588005..dca677f9e1b9 100644 --- a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml +++ b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml @@ -29,11 +29,6 @@ properties: description: Chip select used by the device. - spi-3wire: - $ref: /schemas/types.yaml#/definitions/flag - description: - The device requires 3-wire mode. - spi-cs-high: $ref: /schemas/types.yaml#/definitions/flag description: diff --git a/Documentation/devicetree/bindings/spi/spi-rockchip.yaml b/Documentation/devicetree/bindings/spi/spi-rockchip.yaml index 52a78a2e362e..66e49947b703 100644 --- a/Documentation/devicetree/bindings/spi/spi-rockchip.yaml +++ b/Documentation/devicetree/bindings/spi/spi-rockchip.yaml @@ -27,6 +27,7 @@ properties: - items: - enum: - rockchip,px30-spi + - rockchip,rk3128-spi - rockchip,rk3188-spi - rockchip,rk3288-spi - rockchip,rk3308-spi @@ -34,6 +35,7 @@ properties: - rockchip,rk3368-spi - rockchip,rk3399-spi - rockchip,rk3568-spi + - rockchip,rk3588-spi - rockchip,rv1126-spi - const: rockchip,rk3066-spi @@ -80,6 +82,9 @@ properties: where the "sleep" configuration may describe the state the pins should be in during system suspend. + power-domains: + maxItems: 1 + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/spi/spi-xilinx.yaml b/Documentation/devicetree/bindings/spi/spi-xilinx.yaml index 03e5dca7e933..bbb735603f29 100644 --- a/Documentation/devicetree/bindings/spi/spi-xilinx.yaml +++ b/Documentation/devicetree/bindings/spi/spi-xilinx.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/spi/spi-xilinx.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Xilinx SPI controller Device Tree Bindings +title: Xilinx SPI controller maintainers: - Michal Simek <michal.simek@xilinx.com> diff --git a/Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.yaml b/Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.yaml index fafde1c06be6..6bf0edc57f4a 100644 --- a/Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.yaml +++ b/Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/spi/spi-zynqmp-qspi.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Xilinx Zynq UltraScale+ MPSoC GQSPI controller Device Tree Bindings +title: Xilinx Zynq UltraScale+ MPSoC GQSPI controller maintainers: - Michal Simek <michal.simek@xilinx.com> diff --git a/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml b/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml index 2445c5e0b0ef..abcbbe13723f 100644 --- a/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml +++ b/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/spmi/mtk,spmi-mtk-pmif.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Mediatek SPMI Controller Device Tree Bindings +title: Mediatek SPMI Controller maintainers: - Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> diff --git a/Documentation/devicetree/bindings/sram/allwinner,sun4i-a10-system-control.yaml b/Documentation/devicetree/bindings/sram/allwinner,sun4i-a10-system-control.yaml index 1c426c211e36..98a7dc7f467d 100644 --- a/Documentation/devicetree/bindings/sram/allwinner,sun4i-a10-system-control.yaml +++ b/Documentation/devicetree/bindings/sram/allwinner,sun4i-a10-system-control.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/sram/allwinner,sun4i-a10-system-control.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 System Control Device Tree Bindings +title: Allwinner A10 System Control maintainers: - Chen-Yu Tsai <wens@csie.org> @@ -24,32 +24,31 @@ properties: compatible: oneOf: - - const: allwinner,sun4i-a10-sram-controller + - enum: + - allwinner,sun4i-a10-sram-controller + - allwinner,sun50i-a64-sram-controller deprecated: true - - const: allwinner,sun4i-a10-system-control - - const: allwinner,sun5i-a13-system-control + - enum: + - allwinner,sun4i-a10-system-control + - allwinner,sun5i-a13-system-control + - allwinner,sun8i-a23-system-control + - allwinner,sun8i-h3-system-control + - allwinner,sun20i-d1-system-control + - allwinner,sun50i-a64-system-control + - allwinner,sun50i-h5-system-control + - allwinner,sun50i-h616-system-control - items: - - const: allwinner,sun7i-a20-system-control + - enum: + - allwinner,suniv-f1c100s-system-control + - allwinner,sun7i-a20-system-control + - allwinner,sun8i-r40-system-control - const: allwinner,sun4i-a10-system-control - - const: allwinner,sun8i-a23-system-control - - const: allwinner,sun8i-h3-system-control - items: - const: allwinner,sun8i-v3s-system-control - const: allwinner,sun8i-h3-system-control - items: - - const: allwinner,sun8i-r40-system-control - - const: allwinner,sun4i-a10-system-control - - const: allwinner,sun50i-a64-sram-controller - deprecated: true - - const: allwinner,sun50i-a64-system-control - - const: allwinner,sun50i-h5-system-control - - items: - const: allwinner,sun50i-h6-system-control - const: allwinner,sun50i-a64-system-control - - items: - - const: allwinner,suniv-f1c100s-system-control - - const: allwinner,sun4i-a10-system-control - - const: allwinner,sun50i-h616-system-control reg: maxItems: 1 @@ -76,43 +75,26 @@ patternProperties: - const: allwinner,sun4i-a10-sram-d - const: allwinner,sun50i-a64-sram-c - items: - - const: allwinner,sun5i-a13-sram-a3-a4 - - const: allwinner,sun4i-a10-sram-a3-a4 - - items: - - const: allwinner,sun7i-a20-sram-a3-a4 + - enum: + - allwinner,sun5i-a13-sram-a3-a4 + - allwinner,sun7i-a20-sram-a3-a4 - const: allwinner,sun4i-a10-sram-a3-a4 - items: - - const: allwinner,sun5i-a13-sram-c1 - - const: allwinner,sun4i-a10-sram-c1 - - items: - - const: allwinner,sun7i-a20-sram-c1 - - const: allwinner,sun4i-a10-sram-c1 - - items: - - const: allwinner,sun8i-a23-sram-c1 - - const: allwinner,sun4i-a10-sram-c1 - - items: - - const: allwinner,sun8i-h3-sram-c1 + - enum: + - allwinner,sun5i-a13-sram-c1 + - allwinner,sun7i-a20-sram-c1 + - allwinner,sun8i-a23-sram-c1 + - allwinner,sun8i-h3-sram-c1 + - allwinner,sun8i-r40-sram-c1 + - allwinner,sun50i-a64-sram-c1 + - allwinner,sun50i-h5-sram-c1 + - allwinner,sun50i-h6-sram-c1 - const: allwinner,sun4i-a10-sram-c1 - items: - - const: allwinner,sun8i-r40-sram-c1 - - const: allwinner,sun4i-a10-sram-c1 - - items: - - const: allwinner,sun50i-a64-sram-c1 - - const: allwinner,sun4i-a10-sram-c1 - - items: - - const: allwinner,sun50i-h5-sram-c1 - - const: allwinner,sun4i-a10-sram-c1 - - items: - - const: allwinner,sun50i-h6-sram-c1 - - const: allwinner,sun4i-a10-sram-c1 - - items: - - const: allwinner,sun5i-a13-sram-d - - const: allwinner,sun4i-a10-sram-d - - items: - - const: allwinner,sun7i-a20-sram-d - - const: allwinner,sun4i-a10-sram-d - - items: - - const: allwinner,suniv-f1c100s-sram-d + - enum: + - allwinner,suniv-f1c100s-sram-d + - allwinner,sun5i-a13-sram-d + - allwinner,sun7i-a20-sram-d - const: allwinner,sun4i-a10-sram-d - items: - const: allwinner,sun50i-h6-sram-c diff --git a/Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml b/Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml index 6e0b110153b0..fbd4212285e2 100644 --- a/Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml +++ b/Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/thermal/allwinner,sun8i-a83t-ths.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner SUN8I Thermal Controller Device Tree Bindings +title: Allwinner SUN8I Thermal Controller maintainers: - Vasily Khoruzhick <anarsoul@gmail.com> diff --git a/Documentation/devicetree/bindings/timer/allwinner,sun4i-a10-timer.yaml b/Documentation/devicetree/bindings/timer/allwinner,sun4i-a10-timer.yaml index 3711872b6b99..b3538fac1ad2 100644 --- a/Documentation/devicetree/bindings/timer/allwinner,sun4i-a10-timer.yaml +++ b/Documentation/devicetree/bindings/timer/allwinner,sun4i-a10-timer.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/timer/allwinner,sun4i-a10-timer.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 Timer Device Tree Bindings +title: Allwinner A10 Timer maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.yaml b/Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.yaml index 2ecac754e1cd..f1853daec2f9 100644 --- a/Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.yaml +++ b/Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/timer/allwinner,sun5i-a13-hstimer.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A13 High-Speed Timer Device Tree Bindings +title: Allwinner A13 High-Speed Timer maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/timer/arm,arch_timer.yaml b/Documentation/devicetree/bindings/timer/arm,arch_timer.yaml index df8ce87fd54b..c5fc3b6c8bd0 100644 --- a/Documentation/devicetree/bindings/timer/arm,arch_timer.yaml +++ b/Documentation/devicetree/bindings/timer/arm,arch_timer.yaml @@ -22,16 +22,15 @@ properties: compatible: oneOf: - items: - - enum: - - arm,cortex-a15-timer - - enum: - - arm,armv7-timer + - const: arm,cortex-a15-timer + - const: arm,armv7-timer - items: - enum: - arm,armv7-timer - - items: - - enum: - arm,armv8-timer + - items: + - const: arm,armv8-timer + - const: arm,armv7-timer interrupts: minItems: 1 diff --git a/Documentation/devicetree/bindings/timer/arm,arch_timer_mmio.yaml b/Documentation/devicetree/bindings/timer/arm,arch_timer_mmio.yaml index cd2176cad53a..f6efa48c4256 100644 --- a/Documentation/devicetree/bindings/timer/arm,arch_timer_mmio.yaml +++ b/Documentation/devicetree/bindings/timer/arm,arch_timer_mmio.yaml @@ -62,6 +62,7 @@ properties: patternProperties: '^frame@[0-9a-z]*$': type: object + additionalProperties: false description: A timer node has up to 8 frame sub-nodes, each with the following properties. properties: frame-number: diff --git a/Documentation/devicetree/bindings/timer/ingenic,tcu.yaml b/Documentation/devicetree/bindings/timer/ingenic,tcu.yaml index 0a01e4f5eddb..a84fef0fe628 100644 --- a/Documentation/devicetree/bindings/timer/ingenic,tcu.yaml +++ b/Documentation/devicetree/bindings/timer/ingenic,tcu.yaml @@ -114,6 +114,8 @@ patternProperties: "^watchdog@[a-f0-9]+$": type: object $ref: /schemas/watchdog/watchdog.yaml# + unevaluatedProperties: false + properties: compatible: oneOf: @@ -146,6 +148,8 @@ patternProperties: "^pwm@[a-f0-9]+$": type: object $ref: /schemas/pwm/pwm.yaml# + unevaluatedProperties: false + properties: compatible: oneOf: diff --git a/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt b/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt index f1c848af91d3..8bbb6e94508b 100644 --- a/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt +++ b/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt @@ -25,6 +25,7 @@ Required properties: For those SoCs that use SYST * "mediatek,mt8183-timer" for MT8183 compatible timers (SYST) * "mediatek,mt8186-timer" for MT8186 compatible timers (SYST) + * "mediatek,mt8188-timer" for MT8188 compatible timers (SYST) * "mediatek,mt8192-timer" for MT8192 compatible timers (SYST) * "mediatek,mt8195-timer" for MT8195 compatible timers (SYST) * "mediatek,mt7629-timer" for MT7629 compatible timers (SYST) diff --git a/Documentation/devicetree/bindings/timer/mstar,msc313e-timer.yaml b/Documentation/devicetree/bindings/timer/mstar,msc313e-timer.yaml index 03d5dba5d5b3..f118ca423e38 100644 --- a/Documentation/devicetree/bindings/timer/mstar,msc313e-timer.yaml +++ b/Documentation/devicetree/bindings/timer/mstar,msc313e-timer.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/timer/mstar,msc313e-timer.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Mstar MSC313e Timer Device Tree Bindings +title: Mstar MSC313e Timer maintainers: - Daniel Palmer <daniel@0x0f.com> diff --git a/Documentation/devicetree/bindings/timer/nxp,sysctr-timer.yaml b/Documentation/devicetree/bindings/timer/nxp,sysctr-timer.yaml index 830211c55b4a..2b9653dafab8 100644 --- a/Documentation/devicetree/bindings/timer/nxp,sysctr-timer.yaml +++ b/Documentation/devicetree/bindings/timer/nxp,sysctr-timer.yaml @@ -32,6 +32,10 @@ properties: clock-names: const: per + nxp,no-divider: + description: if present, means there is no internal base clk divider. + type: boolean + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/timer/renesas,tmu.yaml b/Documentation/devicetree/bindings/timer/renesas,tmu.yaml index c57169118b68..60f4c059bcff 100644 --- a/Documentation/devicetree/bindings/timer/renesas,tmu.yaml +++ b/Documentation/devicetree/bindings/timer/renesas,tmu.yaml @@ -37,6 +37,7 @@ properties: - renesas,tmu-r8a77990 # R-Car E3 - renesas,tmu-r8a77995 # R-Car D3 - renesas,tmu-r8a779a0 # R-Car V3U + - renesas,tmu-r8a779f0 # R-Car S4-8 - const: renesas,tmu reg: diff --git a/Documentation/devicetree/bindings/timer/rockchip,rk-timer.yaml b/Documentation/devicetree/bindings/timer/rockchip,rk-timer.yaml index 5d157d87dad5..dc3bc1e62fe9 100644 --- a/Documentation/devicetree/bindings/timer/rockchip,rk-timer.yaml +++ b/Documentation/devicetree/bindings/timer/rockchip,rk-timer.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/timer/rockchip,rk-timer.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Rockchip Timer Device Tree Bindings +title: Rockchip Timer maintainers: - Daniel Lezcano <daniel.lezcano@linaro.org> diff --git a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml index 9c81d00b12e0..829bd2227f7c 100644 --- a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml +++ b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml @@ -25,6 +25,7 @@ properties: - samsung,exynos4412-mct - items: - enum: + - axis,artpec8-mct - samsung,exynos3250-mct - samsung,exynos5250-mct - samsung,exynos5260-mct @@ -45,6 +46,19 @@ properties: reg: maxItems: 1 + samsung,frc-shared: + type: boolean + description: | + Indicates that the hardware requires that this processor share the + free-running counter with a different (main) processor. + + samsung,local-timers: + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 1 + maxItems: 16 + description: | + List of indices of local timers usable from this processor. + interrupts: description: | Interrupts should be put in specific order. This is, the local timer @@ -75,6 +89,17 @@ required: allOf: - if: + not: + properties: + compatible: + contains: + enum: + - axis,artpec8-mct + then: + properties: + samsung,local-timers: false + samsung,frc-shared: false + - if: properties: compatible: contains: @@ -101,6 +126,7 @@ allOf: compatible: contains: enum: + - axis,artpec8-mct - samsung,exynos5260-mct - samsung,exynos5420-mct - samsung,exynos5433-mct diff --git a/Documentation/devicetree/bindings/timer/ti,timer-dm.yaml b/Documentation/devicetree/bindings/timer/ti,timer-dm.yaml index e32df21e63a0..acbb6f8997ee 100644 --- a/Documentation/devicetree/bindings/timer/ti,timer-dm.yaml +++ b/Documentation/devicetree/bindings/timer/ti,timer-dm.yaml @@ -51,6 +51,11 @@ properties: - const: timer_sys_ck minItems: 1 + power-domains: + description: + Power domain if available + maxItems: 1 + interrupts: description: Interrupt if available. The timer PWM features may be usable @@ -94,13 +99,15 @@ additionalProperties: false allOf: - if: - not: - properties: - compatible: - contains: - const: ti,am654-timer + properties: + compatible: + contains: + const: ti,am654-timer then: required: + - power-domains + else: + required: - interrupts - if: diff --git a/Documentation/devicetree/bindings/timer/xlnx,xps-timer.yaml b/Documentation/devicetree/bindings/timer/xlnx,xps-timer.yaml index dd168d41d2e0..b1597db04263 100644 --- a/Documentation/devicetree/bindings/timer/xlnx,xps-timer.yaml +++ b/Documentation/devicetree/bindings/timer/xlnx,xps-timer.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/timer/xlnx,xps-timer.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Xilinx LogiCORE IP AXI Timer Device Tree Binding +title: Xilinx LogiCORE IP AXI Timer maintainers: - Sean Anderson <sean.anderson@seco.com> diff --git a/Documentation/devicetree/bindings/timestamp/hte-consumer.yaml b/Documentation/devicetree/bindings/timestamp/hte-consumer.yaml index 6456515c3d26..5142d6d4fc0a 100644 --- a/Documentation/devicetree/bindings/timestamp/hte-consumer.yaml +++ b/Documentation/devicetree/bindings/timestamp/hte-consumer.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/timestamp/hte-consumer.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: HTE Consumer Device Tree Bindings +title: HTE Consumer maintainers: - Dipen Patel <dipenp@nvidia.com> diff --git a/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml b/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml index 2c715eec48b8..a9988798898d 100644 --- a/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml +++ b/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/ufs/samsung,exynos-ufs.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Samsung SoC series UFS host controller Device Tree Bindings +title: Samsung SoC series UFS host controller maintainers: - Alim Akhtar <alim.akhtar@samsung.com> diff --git a/Documentation/devicetree/bindings/usb/allwinner,sun4i-a10-musb.yaml b/Documentation/devicetree/bindings/usb/allwinner,sun4i-a10-musb.yaml index e5dbf4169bc9..8992eff6ce38 100644 --- a/Documentation/devicetree/bindings/usb/allwinner,sun4i-a10-musb.yaml +++ b/Documentation/devicetree/bindings/usb/allwinner,sun4i-a10-musb.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/usb/allwinner,sun4i-a10-musb.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 mUSB OTG Controller Device Tree Bindings +title: Allwinner A10 mUSB OTG Controller maintainers: - Chen-Yu Tsai <wens@csie.org> diff --git a/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml b/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml index e349fa5de606..daf2a859418d 100644 --- a/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml +++ b/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml @@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#" title: Amlogic Meson G12A DWC3 USB SoC Controller Glue maintainers: - - Neil Armstrong <narmstrong@baylibre.com> + - Neil Armstrong <neil.armstrong@linaro.org> description: | The Amlogic G12A embeds a DWC3 USB IP Core configured for USB2 and USB3 diff --git a/Documentation/devicetree/bindings/usb/analogix,anx7411.yaml b/Documentation/devicetree/bindings/usb/analogix,anx7411.yaml index ee436308e5dc..0e72c08e6566 100644 --- a/Documentation/devicetree/bindings/usb/analogix,anx7411.yaml +++ b/Documentation/devicetree/bindings/usb/analogix,anx7411.yaml @@ -23,6 +23,8 @@ properties: connector: type: object $ref: ../connector/usb-connector.yaml + unevaluatedProperties: false + description: Properties for usb c connector. diff --git a/Documentation/devicetree/bindings/usb/aspeed,usb-vhub.yaml b/Documentation/devicetree/bindings/usb/aspeed,usb-vhub.yaml index 8b019ac05bbe..a86bcd95100e 100644 --- a/Documentation/devicetree/bindings/usb/aspeed,usb-vhub.yaml +++ b/Documentation/devicetree/bindings/usb/aspeed,usb-vhub.yaml @@ -67,6 +67,7 @@ properties: vhub-strings: type: object + additionalProperties: false properties: '#address-cells': @@ -78,6 +79,7 @@ properties: patternProperties: '^string@[0-9a-f]+$': type: object + additionalProperties: false description: string descriptors of the specific language properties: diff --git a/Documentation/devicetree/bindings/usb/brcm,bcm7445-ehci.yaml b/Documentation/devicetree/bindings/usb/brcm,bcm7445-ehci.yaml index 2a9acf2b5a64..ad075407d85e 100644 --- a/Documentation/devicetree/bindings/usb/brcm,bcm7445-ehci.yaml +++ b/Documentation/devicetree/bindings/usb/brcm,bcm7445-ehci.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/usb/brcm,bcm7445-ehci.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Broadcom STB USB EHCI Controller Device Tree Bindings +title: Broadcom STB USB EHCI Controller allOf: - $ref: "usb-hcd.yaml" diff --git a/Documentation/devicetree/bindings/usb/brcm,usb-pinmap.yaml b/Documentation/devicetree/bindings/usb/brcm,usb-pinmap.yaml index d4618d15ecc1..5cc81ced589d 100644 --- a/Documentation/devicetree/bindings/usb/brcm,usb-pinmap.yaml +++ b/Documentation/devicetree/bindings/usb/brcm,usb-pinmap.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/usb/brcm,usb-pinmap.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Broadcom USB pin map Controller Device Tree Bindings +title: Broadcom USB pin map Controller maintainers: - Al Cooper <alcooperx@gmail.com> diff --git a/Documentation/devicetree/bindings/usb/dwc2.yaml b/Documentation/devicetree/bindings/usb/dwc2.yaml index 1bfbc6ef16eb..dc4988c0009c 100644 --- a/Documentation/devicetree/bindings/usb/dwc2.yaml +++ b/Documentation/devicetree/bindings/usb/dwc2.yaml @@ -32,6 +32,7 @@ properties: - enum: - rockchip,px30-usb - rockchip,rk3036-usb + - rockchip,rk3128-usb - rockchip,rk3188-usb - rockchip,rk3228-usb - rockchip,rk3288-usb diff --git a/Documentation/devicetree/bindings/usb/faraday,fotg210.txt b/Documentation/devicetree/bindings/usb/faraday,fotg210.txt deleted file mode 100644 index 06a2286e2054..000000000000 --- a/Documentation/devicetree/bindings/usb/faraday,fotg210.txt +++ /dev/null @@ -1,35 +0,0 @@ -Faraday FOTG Host controller - -This OTG-capable USB host controller is found in Cortina Systems -Gemini and other SoC products. - -Required properties: -- compatible: should be one of: - "faraday,fotg210" - "cortina,gemini-usb", "faraday,fotg210" -- reg: should contain one register range i.e. start and length -- interrupts: description of the interrupt line - -Optional properties: -- clocks: should contain the IP block clock -- clock-names: should be "PCLK" for the IP block clock - -Required properties for "cortina,gemini-usb" compatible: -- syscon: a phandle to the system controller to access PHY registers - -Optional properties for "cortina,gemini-usb" compatible: -- cortina,gemini-mini-b: boolean property that indicates that a Mini-B - OTG connector is in use -- wakeup-source: see power/wakeup-source.txt - -Example for Gemini: - -usb@68000000 { - compatible = "cortina,gemini-usb", "faraday,fotg210"; - reg = <0x68000000 0x1000>; - interrupts = <10 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cc 12>; - clock-names = "PCLK"; - syscon = <&syscon>; - wakeup-source; -}; diff --git a/Documentation/devicetree/bindings/usb/faraday,fotg210.yaml b/Documentation/devicetree/bindings/usb/faraday,fotg210.yaml new file mode 100644 index 000000000000..c69bbfbcf733 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/faraday,fotg210.yaml @@ -0,0 +1,77 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2022 Linaro Ltd. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/faraday,fotg210.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Faraday Technology FOTG210 HS OTG USB 2.0 controller Bindings + +maintainers: + - Linus Walleij <linus.walleij@linaro.org> + +allOf: + - $ref: usb-drd.yaml# + - $ref: usb-hcd.yaml# + +properties: + compatible: + oneOf: + - const: faraday,fotg210 + - items: + - const: cortina,gemini-usb + - const: faraday,fotg210 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: PCLK + + resets: + maxItems: 1 + + syscon: + $ref: /schemas/types.yaml#/definitions/phandle + description: a phandle to the global Gemini system controller on + Gemini systems + + dr_mode: true + + phys: + maxItems: 1 + + phy-names: + const: usb2-phy + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/clock/cortina,gemini-clock.h> + #include <dt-bindings/reset/cortina,gemini-reset.h> + usb0: usb@68000000 { + compatible = "cortina,gemini-usb", "faraday,fotg210"; + reg = <0x68000000 0x1000>; + interrupts = <10 IRQ_TYPE_LEVEL_HIGH>; + resets = <&syscon GEMINI_RESET_USB0>; + clocks = <&syscon GEMINI_CLK_GATE_USB0>; + clock-names = "PCLK"; + syscon = <&syscon>; + dr_mode = "host"; + }; diff --git a/Documentation/devicetree/bindings/usb/generic-ehci.yaml b/Documentation/devicetree/bindings/usb/generic-ehci.yaml index 079f7cff0c24..c5f629c5bc61 100644 --- a/Documentation/devicetree/bindings/usb/generic-ehci.yaml +++ b/Documentation/devicetree/bindings/usb/generic-ehci.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/usb/generic-ehci.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: USB EHCI Controller Device Tree Bindings +title: USB EHCI Controller maintainers: - Greg Kroah-Hartman <gregkh@linuxfoundation.org> diff --git a/Documentation/devicetree/bindings/usb/generic-ohci.yaml b/Documentation/devicetree/bindings/usb/generic-ohci.yaml index 180361b79f52..f838f78d6164 100644 --- a/Documentation/devicetree/bindings/usb/generic-ohci.yaml +++ b/Documentation/devicetree/bindings/usb/generic-ohci.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/usb/generic-ohci.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: USB OHCI Controller Device Tree Bindings +title: USB OHCI Controller allOf: - $ref: "usb-hcd.yaml" diff --git a/Documentation/devicetree/bindings/usb/generic-xhci.yaml b/Documentation/devicetree/bindings/usb/generic-xhci.yaml index 23d73df96ea3..db841589fc33 100644 --- a/Documentation/devicetree/bindings/usb/generic-xhci.yaml +++ b/Documentation/devicetree/bindings/usb/generic-xhci.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/usb/generic-xhci.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: USB xHCI Controller Device Tree Bindings +title: USB xHCI Controller maintainers: - Mathias Nyman <mathias.nyman@intel.com> diff --git a/Documentation/devicetree/bindings/usb/mediatek,mt6370-tcpc.yaml b/Documentation/devicetree/bindings/usb/mediatek,mt6370-tcpc.yaml new file mode 100644 index 000000000000..72f56cc88457 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/mediatek,mt6370-tcpc.yaml @@ -0,0 +1,36 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/usb/mediatek,mt6370-tcpc.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: MediatTek MT6370 Type-C Port Switch and Power Delivery controller + +maintainers: + - ChiYuan Huang <cy_huang@richtek.com> + +description: | + MediaTek MT6370 is a multi-functional device. + It integrates charger, ADC, flash, RGB indicators, + regulators (DSV/VIBLDO), and TypeC Port Switch with Power Delivery controller. + This document only describes MT6370 Type-C Port Switch and + Power Delivery controller. + +properties: + compatible: + enum: + - mediatek,mt6370-tcpc + + interrupts: + maxItems: 1 + + connector: + type: object + $ref: /schemas/connector/usb-connector.yaml# + unevaluatedProperties: false + +additionalProperties: false + +required: + - compatible + - interrupts diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml index b0e58b15b9ae..939623867a64 100644 --- a/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml +++ b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml @@ -5,7 +5,7 @@ $id: http://devicetree.org/schemas/usb/mediatek,mtk-xhci.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: MediaTek USB3 xHCI Device Tree Bindings +title: MediaTek USB3 xHCI maintainers: - Chunfeng Yun <chunfeng.yun@mediatek.com> diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtu3.yaml b/Documentation/devicetree/bindings/usb/mediatek,mtu3.yaml index b019d490170d..80750b0f458a 100644 --- a/Documentation/devicetree/bindings/usb/mediatek,mtu3.yaml +++ b/Documentation/devicetree/bindings/usb/mediatek,mtu3.yaml @@ -5,7 +5,7 @@ $id: http://devicetree.org/schemas/usb/mediatek,mtu3.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: MediaTek USB3 DRD Controller Device Tree Bindings +title: MediaTek USB3 DRD Controller maintainers: - Chunfeng Yun <chunfeng.yun@mediatek.com> diff --git a/Documentation/devicetree/bindings/usb/mediatek,musb.yaml b/Documentation/devicetree/bindings/usb/mediatek,musb.yaml index 11a33f9b1f17..f16ab30a95d2 100644 --- a/Documentation/devicetree/bindings/usb/mediatek,musb.yaml +++ b/Documentation/devicetree/bindings/usb/mediatek,musb.yaml @@ -5,7 +5,7 @@ $id: http://devicetree.org/schemas/usb/mediatek,musb.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: MediaTek MUSB DRD/OTG Controller Device Tree Bindings +title: MediaTek MUSB DRD/OTG Controller maintainers: - Min Guo <min.guo@mediatek.com> diff --git a/Documentation/devicetree/bindings/usb/microchip,mpfs-musb.yaml b/Documentation/devicetree/bindings/usb/microchip,mpfs-musb.yaml index 48c458c65848..c5e9ce2e7bc2 100644 --- a/Documentation/devicetree/bindings/usb/microchip,mpfs-musb.yaml +++ b/Documentation/devicetree/bindings/usb/microchip,mpfs-musb.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/usb/microchip,mpfs-musb.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Microchip MPFS USB Controller Device Tree Bindings +title: Microchip MPFS USB Controller allOf: - $ref: usb-drd.yaml# diff --git a/Documentation/devicetree/bindings/usb/npcm7xx-usb.txt b/Documentation/devicetree/bindings/usb/npcm7xx-usb.txt index 5a0f1f14fbfa..352a0a1e2f76 100644 --- a/Documentation/devicetree/bindings/usb/npcm7xx-usb.txt +++ b/Documentation/devicetree/bindings/usb/npcm7xx-usb.txt @@ -5,7 +5,9 @@ EHCI: ----- Required properties: -- compatible: "nuvoton,npcm750-ehci" +- compatible: should be one of + "nuvoton,npcm750-ehci" + "nuvoton,npcm845-ehci" - interrupts: Should contain the EHCI interrupt - reg: Physical address and length of the register set for the device diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml index cd2f7cb6745a..a6e6abb4dfa9 100644 --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml @@ -26,6 +26,7 @@ properties: - qcom,sc7280-dwc3 - qcom,sc8280xp-dwc3 - qcom,sdm660-dwc3 + - qcom,sdm670-dwc3 - qcom,sdm845-dwc3 - qcom,sdx55-dwc3 - qcom,sdx65-dwc3 @@ -175,6 +176,7 @@ allOf: - qcom,msm8998-dwc3 - qcom,sc7180-dwc3 - qcom,sc7280-dwc3 + - qcom,sdm670-dwc3 - qcom,sdm845-dwc3 - qcom,sdx55-dwc3 - qcom,sm6350-dwc3 @@ -294,6 +296,7 @@ allOf: compatible: contains: enum: + - qcom,sm6115-dwc3 - qcom,sm6125-dwc3 - qcom,sm8150-dwc3 - qcom,sm8250-dwc3 @@ -344,11 +347,11 @@ allOf: - qcom,msm8994-dwc3 - qcom,qcs404-dwc3 - qcom,sc7180-dwc3 + - qcom,sdm670-dwc3 - qcom,sdm845-dwc3 - qcom,sdx55-dwc3 - qcom,sdx65-dwc3 - qcom,sm4250-dwc3 - - qcom,sm6115-dwc3 - qcom,sm6125-dwc3 - qcom,sm6350-dwc3 - qcom,sm8150-dwc3 @@ -380,6 +383,7 @@ allOf: - qcom,msm8953-dwc3 - qcom,msm8996-dwc3 - qcom,msm8998-dwc3 + - qcom,sm6115-dwc3 then: properties: interrupts: diff --git a/Documentation/devicetree/bindings/usb/renesas,usb3-peri.yaml b/Documentation/devicetree/bindings/usb/renesas,usb3-peri.yaml index 9fcf54b10b07..55dfd121b555 100644 --- a/Documentation/devicetree/bindings/usb/renesas,usb3-peri.yaml +++ b/Documentation/devicetree/bindings/usb/renesas,usb3-peri.yaml @@ -11,27 +11,55 @@ maintainers: properties: compatible: - items: - - enum: - - renesas,r8a774a1-usb3-peri # RZ/G2M - - renesas,r8a774b1-usb3-peri # RZ/G2N - - renesas,r8a774c0-usb3-peri # RZ/G2E - - renesas,r8a774e1-usb3-peri # RZ/G2H - - renesas,r8a7795-usb3-peri # R-Car H3 - - renesas,r8a7796-usb3-peri # R-Car M3-W - - renesas,r8a77961-usb3-peri # R-Car M3-W+ - - renesas,r8a77965-usb3-peri # R-Car M3-N - - renesas,r8a77990-usb3-peri # R-Car E3 - - const: renesas,rcar-gen3-usb3-peri + oneOf: + - items: + - enum: + - renesas,r8a774a1-usb3-peri # RZ/G2M + - renesas,r8a774b1-usb3-peri # RZ/G2N + - renesas,r8a774c0-usb3-peri # RZ/G2E + - renesas,r8a774e1-usb3-peri # RZ/G2H + - renesas,r8a7795-usb3-peri # R-Car H3 + - renesas,r8a7796-usb3-peri # R-Car M3-W + - renesas,r8a77961-usb3-peri # R-Car M3-W+ + - renesas,r8a77965-usb3-peri # R-Car M3-N + - renesas,r8a77990-usb3-peri # R-Car E3 + - const: renesas,rcar-gen3-usb3-peri + + - items: + - enum: + - renesas,r9a09g011-usb3-peri # RZ/V2M + - const: renesas,rzv2m-usb3-peri reg: maxItems: 1 interrupts: - maxItems: 1 + minItems: 1 + items: + - description: Combined interrupt for DMA, SYS and ERR + - description: Dual Role Device (DRD) + - description: Battery Charging + - description: Global Purpose Input + + interrupt-names: + minItems: 1 + items: + - const: all_p + - const: drd + - const: bc + - const: gpi clocks: - maxItems: 1 + minItems: 1 + items: + - description: Main clock + - description: Register access clock + + clock-names: + minItems: 1 + items: + - const: aclk + - const: reg phys: maxItems: 1 @@ -43,7 +71,15 @@ properties: maxItems: 1 resets: - maxItems: 1 + minItems: 1 + items: + - description: Peripheral reset + - description: DRD reset + + reset-names: + items: + - const: aresetn_p + - const: drd_reset usb-role-switch: $ref: /schemas/types.yaml#/definitions/flag @@ -78,6 +114,39 @@ required: - interrupts - clocks +allOf: + - if: + properties: + compatible: + contains: + enum: + - renesas,rzv2m-usb3-peri + then: + properties: + clocks: + minItems: 2 + clock-names: + minItems: 2 + interrupts: + minItems: 4 + interrupt-names: + minItems: 4 + resets: + minItems: 2 + required: + - clock-names + - interrupt-names + - resets + - reset-names + else: + properties: + clocks: + maxItems: 1 + interrupts: + maxItems: 1 + resets: + maxItems: 1 + additionalProperties: false examples: diff --git a/Documentation/devicetree/bindings/usb/richtek,rt1711h.yaml b/Documentation/devicetree/bindings/usb/richtek,rt1711h.yaml new file mode 100644 index 000000000000..1999f614c89b --- /dev/null +++ b/Documentation/devicetree/bindings/usb/richtek,rt1711h.yaml @@ -0,0 +1,100 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/usb/richtek,rt1711h.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Richtek RT1711H Type-C Port Switch and Power Delivery controller + +maintainers: + - Gene Chen <gene_chen@richtek.com> + +description: | + The RT1711H is a USB Type-C controller that complies with the latest + USB Type-C and PD standards. It does the USB Type-C detection including attach + and orientation. It integrates the physical layer of the USB BMC power + delivery protocol to allow up to 100W of power. The BMC PD block enables full + support for alternative interfaces of the Type-C specification. + +properties: + compatible: + enum: + - richtek,rt1711h + - richtek,rt1715 + description: + RT1711H support PD20, RT1715 support PD30 except Fast Role Swap. + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + wakeup-source: + type: boolean + + connector: + type: object + $ref: /schemas/connector/usb-connector.yaml# + description: + Properties for usb c connector. + +additionalProperties: false + +required: + - compatible + - reg + - connector + - interrupts + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/usb/pd.h> + i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + rt1711h@4e { + compatible = "richtek,rt1711h"; + reg = <0x4e>; + interrupts-extended = <&gpio26 3 IRQ_TYPE_LEVEL_LOW>; + wakeup-source; + + connector { + compatible = "usb-c-connector"; + label = "USB-C"; + data-role = "dual"; + power-role = "dual"; + try-power-role = "sink"; + source-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP)>; + sink-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP)>; + op-sink-microwatt = <10000000>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + endpoint { + remote-endpoint = <&usb_hs>; + }; + }; + port@1 { + reg = <1>; + endpoint { + remote-endpoint = <&usb_ss>; + }; + }; + port@2 { + reg = <2>; + endpoint { + remote-endpoint = <&dp_aux>; + }; + }; + }; + }; + }; + }; +... diff --git a/Documentation/devicetree/bindings/usb/smsc,usb3503.yaml b/Documentation/devicetree/bindings/usb/smsc,usb3503.yaml index 321b6f166197..a09f4528aea3 100644 --- a/Documentation/devicetree/bindings/usb/smsc,usb3503.yaml +++ b/Documentation/devicetree/bindings/usb/smsc,usb3503.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/usb/smsc,usb3503.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: SMSC USB3503 High-Speed Hub Controller Device Tree Bindings +title: SMSC USB3503 High-Speed Hub Controller maintainers: - Dongjin Kim <tobetter@gmail.com> diff --git a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml index 1779d08ba1c0..6d78048c4613 100644 --- a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml @@ -234,6 +234,18 @@ properties: avoid -EPROTO errors with usbhid on some devices (Hikey 970). type: boolean + snps,gfladj-refclk-lpm-sel-quirk: + description: + When set, run the SOF/ITP counter based on ref_clk. + type: boolean + + snps,resume-hs-terminations: + description: + Fix the issue of HS terminations CRC error on resume by enabling this + quirk. When set, all the termsel, xcvrsel, opmode becomes 0 during end + of resume. This option is to support certain legacy ULPI PHYs. + type: boolean + snps,is-utmi-l1-suspend: description: True when DWC3 asserts output signal utmi_l1_suspend_n, false when diff --git a/Documentation/devicetree/bindings/usb/st,stusb160x.yaml b/Documentation/devicetree/bindings/usb/st,stusb160x.yaml index b5a8c9814dd3..b8974807b666 100644 --- a/Documentation/devicetree/bindings/usb/st,stusb160x.yaml +++ b/Documentation/devicetree/bindings/usb/st,stusb160x.yaml @@ -33,6 +33,7 @@ properties: connector: type: object $ref: /schemas/connector/usb-connector.yaml# + unevaluatedProperties: false properties: compatible: @@ -74,9 +75,14 @@ examples: data-role = "dual"; typec-power-opmode = "default"; - port { - typec_con_ep: endpoint { - remote-endpoint = <&usbotg_hs_ep>; + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + typec_con_ep: endpoint { + remote-endpoint = <&usbotg_hs_ep>; + }; }; }; }; diff --git a/Documentation/devicetree/bindings/usb/usb-drd.yaml b/Documentation/devicetree/bindings/usb/usb-drd.yaml index f229fc8068d9..1567549b05ce 100644 --- a/Documentation/devicetree/bindings/usb/usb-drd.yaml +++ b/Documentation/devicetree/bindings/usb/usb-drd.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/usb/usb-drd.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Generic USB OTG Controller Device Tree Bindings +title: Generic USB OTG Controller maintainers: - Greg Kroah-Hartman <gregkh@linuxfoundation.org> diff --git a/Documentation/devicetree/bindings/usb/usb-hcd.yaml b/Documentation/devicetree/bindings/usb/usb-hcd.yaml index 1dc3d5d7b44f..692dd60e3f73 100644 --- a/Documentation/devicetree/bindings/usb/usb-hcd.yaml +++ b/Documentation/devicetree/bindings/usb/usb-hcd.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/usb/usb-hcd.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Generic USB Host Controller Device Tree Bindings +title: Generic USB Host Controller maintainers: - Greg Kroah-Hartman <gregkh@linuxfoundation.org> diff --git a/Documentation/devicetree/bindings/usb/usb-xhci.yaml b/Documentation/devicetree/bindings/usb/usb-xhci.yaml index 965f87fef702..f2139a9f35fb 100644 --- a/Documentation/devicetree/bindings/usb/usb-xhci.yaml +++ b/Documentation/devicetree/bindings/usb/usb-xhci.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/usb/usb-xhci.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Generic USB xHCI Controller Device Tree Bindings +title: Generic USB xHCI Controller maintainers: - Mathias Nyman <mathias.nyman@intel.com> diff --git a/Documentation/devicetree/bindings/usb/usb.yaml b/Documentation/devicetree/bindings/usb/usb.yaml index 939f217b8c7b..326b14f05d1c 100644 --- a/Documentation/devicetree/bindings/usb/usb.yaml +++ b/Documentation/devicetree/bindings/usb/usb.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/usb/usb.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Generic USB Controller Device Tree Bindings +title: Generic USB Controller maintainers: - Greg Kroah-Hartman <gregkh@linuxfoundation.org> diff --git a/Documentation/devicetree/bindings/usb/willsemi,wusb3801.yaml b/Documentation/devicetree/bindings/usb/willsemi,wusb3801.yaml index c2b2243c7892..5aa4ffd67119 100644 --- a/Documentation/devicetree/bindings/usb/willsemi,wusb3801.yaml +++ b/Documentation/devicetree/bindings/usb/willsemi,wusb3801.yaml @@ -28,6 +28,7 @@ properties: connector: type: object $ref: ../connector/usb-connector.yaml# + unevaluatedProperties: false description: The managed USB Type-C connector. Since WUSB3801 does not support Power Delivery, the node should have the "pd-disable" property. diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 2f0151e9f6be..6e323a380294 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -105,6 +105,8 @@ patternProperties: description: AMS-Taos Inc. "^analogix,.*": description: Analogix Semiconductor, Inc. + "^anbernic,.*": + description: Anbernic "^andestech,.*": description: Andes Technology Corporation "^anvo,.*": @@ -328,6 +330,8 @@ patternProperties: description: Digi International Inc. "^digilent,.*": description: Diglent, Inc. + "^diodes,.*": + description: Diodes, Inc. "^dioo,.*": description: Dioo Microcircuit Co., Ltd "^dlc,.*": @@ -777,6 +781,8 @@ patternProperties: description: MELFAS Inc. "^mellanox,.*": description: Mellanox Technologies + "^memsensing,.*": + description: MEMSensing Microsystems Co., Ltd. "^memsic,.*": description: MEMSIC Inc. "^menlo,.*": @@ -787,6 +793,8 @@ patternProperties: description: Cisco Meraki, LLC "^merrii,.*": description: Merrii Technology Co., Ltd. + "^methode,.*": + description: Methode Electronics, Inc. "^micrel,.*": description: Micrel Inc. "^microchip,.*": @@ -819,6 +827,8 @@ patternProperties: description: MNT Research GmbH "^modtronix,.*": description: Modtronix Engineering + "^moortec,.*": + description: Moortec Semiconductor Ltd. "^mosaixtech,.*": description: Mosaix Technologies, Inc. "^motorola,.*": @@ -925,6 +935,8 @@ patternProperties: description: On Tat Industrial Company "^opalkelly,.*": description: Opal Kelly Incorporated + "^openailab,.*": + description: openailab.com "^opencores,.*": description: OpenCores.org "^openembed,.*": diff --git a/Documentation/devicetree/bindings/virtio/iommu.txt b/Documentation/devicetree/bindings/virtio/iommu.txt deleted file mode 100644 index 2407fea0651c..000000000000 --- a/Documentation/devicetree/bindings/virtio/iommu.txt +++ /dev/null @@ -1,66 +0,0 @@ -* virtio IOMMU PCI device - -When virtio-iommu uses the PCI transport, its programming interface is -discovered dynamically by the PCI probing infrastructure. However the -device tree statically describes the relation between IOMMU and DMA -masters. Therefore, the PCI root complex that hosts the virtio-iommu -contains a child node representing the IOMMU device explicitly. - -Required properties: - -- compatible: Should be "virtio,pci-iommu" -- reg: PCI address of the IOMMU. As defined in the PCI Bus - Binding reference [1], the reg property is a five-cell - address encoded as (phys.hi phys.mid phys.lo size.hi - size.lo). phys.hi should contain the device's BDF as - 0b00000000 bbbbbbbb dddddfff 00000000. The other cells - should be zero. -- #iommu-cells: Each platform DMA master managed by the IOMMU is assigned - an endpoint ID, described by the "iommus" property [2]. - For virtio-iommu, #iommu-cells must be 1. - -Notes: - -- DMA from the IOMMU device isn't managed by another IOMMU. Therefore the - virtio-iommu node doesn't have an "iommus" property, and is omitted from - the iommu-map property of the root complex. - -Example: - -pcie@10000000 { - compatible = "pci-host-ecam-generic"; - ... - - /* The IOMMU programming interface uses slot 00:01.0 */ - iommu0: iommu@0008 { - compatible = "virtio,pci-iommu"; - reg = <0x00000800 0 0 0 0>; - #iommu-cells = <1>; - }; - - /* - * The IOMMU manages all functions in this PCI domain except - * itself. Omit BDF 00:01.0. - */ - iommu-map = <0x0 &iommu0 0x0 0x8> - <0x9 &iommu0 0x9 0xfff7>; -}; - -pcie@20000000 { - compatible = "pci-host-ecam-generic"; - ... - /* - * The IOMMU also manages all functions from this domain, - * with endpoint IDs 0x10000 - 0x1ffff - */ - iommu-map = <0x0 &iommu0 0x10000 0x10000>; -}; - -ethernet@fe001000 { - ... - /* The IOMMU manages this platform device with endpoint ID 0x20000 */ - iommus = <&iommu0 0x20000>; -}; - -[1] Documentation/devicetree/bindings/pci/pci.txt -[2] Documentation/devicetree/bindings/iommu/iommu.txt diff --git a/Documentation/devicetree/bindings/virtio/pci-iommu.yaml b/Documentation/devicetree/bindings/virtio/pci-iommu.yaml new file mode 100644 index 000000000000..972a785a42de --- /dev/null +++ b/Documentation/devicetree/bindings/virtio/pci-iommu.yaml @@ -0,0 +1,101 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/virtio/pci-iommu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: virtio-iommu device using the virtio-pci transport + +maintainers: + - Jean-Philippe Brucker <jean-philippe@linaro.org> + +description: | + When virtio-iommu uses the PCI transport, its programming interface is + discovered dynamically by the PCI probing infrastructure. However the + device tree statically describes the relation between IOMMU and DMA + masters. Therefore, the PCI root complex that hosts the virtio-iommu + contains a child node representing the IOMMU device explicitly. + + DMA from the IOMMU device isn't managed by another IOMMU. Therefore the + virtio-iommu node doesn't have an "iommus" property, and is omitted from + the iommu-map property of the root complex. + +properties: + # If compatible is present, it should contain the vendor and device ID + # according to the PCI Bus Binding specification. Since PCI provides + # built-in identification methods, compatible is not actually required. + compatible: + oneOf: + - items: + - const: virtio,pci-iommu + - const: pci1af4,1057 + - items: + - const: pci1af4,1057 + + reg: + description: | + PCI address of the IOMMU. As defined in the PCI Bus Binding + reference, the reg property is a five-cell address encoded as (phys.hi + phys.mid phys.lo size.hi size.lo). phys.hi should contain the device's + BDF as 0b00000000 bbbbbbbb dddddfff 00000000. The other cells should be + zero. See Documentation/devicetree/bindings/pci/pci.txt + + '#iommu-cells': + const: 1 + +required: + - compatible + - reg + - '#iommu-cells' + +additionalProperties: false + +examples: + - | + bus { + #address-cells = <2>; + #size-cells = <2>; + + pcie@40000000 { + device_type = "pci"; + #address-cells = <3>; + #size-cells = <2>; + reg = <0x0 0x40000000 0x0 0x1000000>; + ranges = <0x02000000 0x0 0x41000000 0x0 0x41000000 0x0 0x0f000000>; + + /* + * The IOMMU manages all functions in this PCI domain except + * itself. Omit BDF 00:01.0. + */ + iommu-map = <0x0 &iommu0 0x0 0x8 + 0x9 &iommu0 0x9 0xfff7>; + + /* The IOMMU programming interface uses slot 00:01.0 */ + iommu0: iommu@1,0 { + compatible = "pci1af4,1057"; + reg = <0x800 0 0 0 0>; + #iommu-cells = <1>; + }; + }; + + pcie@50000000 { + device_type = "pci"; + #address-cells = <3>; + #size-cells = <2>; + reg = <0x0 0x50000000 0x0 0x1000000>; + ranges = <0x02000000 0x0 0x51000000 0x0 0x51000000 0x0 0x0f000000>; + + /* + * The IOMMU also manages all functions from this domain, + * with endpoint IDs 0x10000 - 0x1ffff + */ + iommu-map = <0x0 &iommu0 0x10000 0x10000>; + }; + + ethernet { + /* The IOMMU manages this platform device with endpoint ID 0x20000 */ + iommus = <&iommu0 0x20000>; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/w1/w1-gpio.yaml b/Documentation/devicetree/bindings/w1/w1-gpio.yaml index 8eef2380161b..b02b02237082 100644 --- a/Documentation/devicetree/bindings/w1/w1-gpio.yaml +++ b/Documentation/devicetree/bindings/w1/w1-gpio.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/w1/w1-gpio.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Bitbanged GPIO 1-Wire Bus Device Tree Bindings +title: Bitbanged GPIO 1-Wire Bus maintainers: - Daniel Mack <zonque@gmail.com> diff --git a/Documentation/devicetree/bindings/watchdog/allwinner,sun4i-a10-wdt.yaml b/Documentation/devicetree/bindings/watchdog/allwinner,sun4i-a10-wdt.yaml index ed6c1ca80dcc..026c2e5e77aa 100644 --- a/Documentation/devicetree/bindings/watchdog/allwinner,sun4i-a10-wdt.yaml +++ b/Documentation/devicetree/bindings/watchdog/allwinner,sun4i-a10-wdt.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/watchdog/allwinner,sun4i-a10-wdt.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Allwinner A10 Watchdog Device Tree Bindings +title: Allwinner A10 Watchdog allOf: - $ref: "watchdog.yaml#" diff --git a/Documentation/devicetree/bindings/watchdog/amlogic,meson-gxbb-wdt.yaml b/Documentation/devicetree/bindings/watchdog/amlogic,meson-gxbb-wdt.yaml index c7459cf70e30..497d60408ea0 100644 --- a/Documentation/devicetree/bindings/watchdog/amlogic,meson-gxbb-wdt.yaml +++ b/Documentation/devicetree/bindings/watchdog/amlogic,meson-gxbb-wdt.yaml @@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#" title: Meson GXBB SoCs Watchdog timer maintainers: - - Neil Armstrong <narmstrong@baylibre.com> + - Neil Armstrong <neil.armstrong@linaro.org> allOf: - $ref: watchdog.yaml# diff --git a/Documentation/devicetree/bindings/watchdog/mstar,msc313e-wdt.yaml b/Documentation/devicetree/bindings/watchdog/mstar,msc313e-wdt.yaml index e3e8b86dbf63..33794711c594 100644 --- a/Documentation/devicetree/bindings/watchdog/mstar,msc313e-wdt.yaml +++ b/Documentation/devicetree/bindings/watchdog/mstar,msc313e-wdt.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/watchdog/mstar,msc313e-wdt.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: MStar Watchdog Device Tree Bindings +title: MStar Watchdog maintainers: - Daniel Palmer <daniel@0x0f.com> diff --git a/Documentation/doc-guide/kernel-doc.rst b/Documentation/doc-guide/kernel-doc.rst index 9c779bd7a751..1dcbd7332476 100644 --- a/Documentation/doc-guide/kernel-doc.rst +++ b/Documentation/doc-guide/kernel-doc.rst @@ -14,6 +14,9 @@ when it is embedded in source files. reasons. The kernel source contains tens of thousands of kernel-doc comments. Please stick to the style described here. +.. note:: kernel-doc does not cover Rust code: please see + Documentation/rust/general-information.rst instead. + The kernel-doc structure is extracted from the comments, and proper `Sphinx C Domain`_ function and type descriptions with anchors are generated from them. The descriptions are filtered for special kernel-doc diff --git a/Documentation/doc-guide/sphinx.rst b/Documentation/doc-guide/sphinx.rst index 1228b85f6f77..c708cec889af 100644 --- a/Documentation/doc-guide/sphinx.rst +++ b/Documentation/doc-guide/sphinx.rst @@ -48,10 +48,6 @@ or ``virtualenv``, depending on how your distribution packaged Python 3. on the Sphinx version, it should be installed separately, with ``pip install sphinx_rtd_theme``. - #) Some ReST pages contain math expressions. Due to the way Sphinx works, - those expressions are written using LaTeX notation. It needs texlive - installed with amsfonts and amsmath in order to evaluate them. - In summary, if you want to install Sphinx version 2.4.4, you should do:: $ virtualenv sphinx_2.4.4 @@ -86,6 +82,27 @@ Depending on the distribution, you may also need to install a series of ``texlive`` packages that provide the minimal set of functionalities required for ``XeLaTeX`` to work. +Math Expressions in HTML +------------------------ + +Some ReST pages contain math expressions. Due to the way Sphinx works, +those expressions are written using LaTeX notation. +There are two options for Sphinx to render math expressions in html output. +One is an extension called `imgmath`_ which converts math expressions into +images and embeds them in html pages. +The other is an extension called `mathjax`_ which delegates math rendering +to JavaScript capable web browsers. +The former was the only option for pre-6.1 kernel documentation and it +requires quite a few texlive packages including amsfonts and amsmath among +others. + +Since kernel release 6.1, html pages with math expressions can be built +without installing any texlive packages. See `Choice of Math Renderer`_ for +further info. + +.. _imgmath: https://www.sphinx-doc.org/en/master/usage/extensions/math.html#module-sphinx.ext.imgmath +.. _mathjax: https://www.sphinx-doc.org/en/master/usage/extensions/math.html#module-sphinx.ext.mathjax + .. _sphinx-pre-install: Checking for Sphinx dependencies @@ -164,6 +181,38 @@ To remove the generated documentation, run ``make cleandocs``. as well would improve the quality of images embedded in PDF documents, especially for kernel releases 5.18 and later. +Choice of Math Renderer +----------------------- + +Since kernel release 6.1, mathjax works as a fallback math renderer for +html output.\ [#sph1_8]_ + +Math renderer is chosen depending on available commands as shown below: + +.. table:: Math Renderer Choices for HTML + + ============= ================= ============ + Math renderer Required commands Image format + ============= ================= ============ + imgmath latex, dvipng PNG (raster) + mathjax + ============= ================= ============ + +The choice can be overridden by setting an environment variable +``SPHINX_IMGMATH`` as shown below: + +.. table:: Effect of Setting ``SPHINX_IMGMATH`` + + ====================== ======== + Setting Renderer + ====================== ======== + ``SPHINX_IMGMATH=yes`` imgmath + ``SPHINX_IMGMATH=no`` mathjax + ====================== ======== + +.. [#sph1_8] Fallback of math renderer requires Sphinx >=1.8. + + Writing Documentation ===================== diff --git a/Documentation/driver-api/driver-model/devres.rst b/Documentation/driver-api/driver-model/devres.rst index 55272942e721..687adb58048e 100644 --- a/Documentation/driver-api/driver-model/devres.rst +++ b/Documentation/driver-api/driver-model/devres.rst @@ -301,6 +301,7 @@ IO region devm_release_region() devm_release_resource() devm_request_mem_region() + devm_request_free_mem_region() devm_request_region() devm_request_resource() @@ -310,7 +311,6 @@ IOMAP devm_ioremap() devm_ioremap_uc() devm_ioremap_wc() - devm_ioremap_np() devm_ioremap_resource() : checks resource, requests memory region, ioremaps devm_ioremap_resource_wc() devm_platform_ioremap_resource() : calls devm_ioremap_resource() for platform device @@ -334,7 +334,7 @@ IRQ devm_irq_alloc_descs_from() devm_irq_alloc_generic_chip() devm_irq_setup_generic_chip() - devm_irq_sim_init() + devm_irq_domain_create_sim() LED devm_led_classdev_register() @@ -392,7 +392,9 @@ PHY PINCTRL devm_pinctrl_get() devm_pinctrl_put() + devm_pinctrl_get_select() devm_pinctrl_register() + devm_pinctrl_register_and_init() devm_pinctrl_unregister() POWER @@ -401,14 +403,24 @@ POWER PWM devm_pwm_get() - devm_of_pwm_get() devm_fwnode_pwm_get() REGULATOR + devm_regulator_bulk_register_supply_alias() devm_regulator_bulk_get() + devm_regulator_bulk_get_enable() + devm_regulator_bulk_put() devm_regulator_get() + devm_regulator_get_enable() + devm_regulator_get_enable_optional() + devm_regulator_get_exclusive() + devm_regulator_get_optional() + devm_regulator_irq_helper() devm_regulator_put() devm_regulator_register() + devm_regulator_register_notifier() + devm_regulator_register_supply_alias() + devm_regulator_unregister_notifier() RESET devm_reset_control_get() @@ -427,6 +439,8 @@ SLAVE DMA ENGINE devm_acpi_dma_controller_register() SPI + devm_spi_alloc_master() + devm_spi_alloc_slave() devm_spi_register_master() WATCHDOG diff --git a/Documentation/driver-api/isa.rst b/Documentation/driver-api/isa.rst index def4a7b690b5..3df1b1696524 100644 --- a/Documentation/driver-api/isa.rst +++ b/Documentation/driver-api/isa.rst @@ -100,7 +100,7 @@ I believe platform_data is available for this, but if rather not, moving the isa_driver pointer to the private struct isa_dev is ofcourse fine as well. -Then, if the the driver did not provide a .match, it matches. If it did, +Then, if the driver did not provide a .match, it matches. If it did, the driver match() method is called to determine a match. If it did **not** match, dev->platform_data is reset to indicate this to diff --git a/Documentation/driver-api/media/drivers/pxa_camera.rst b/Documentation/driver-api/media/drivers/pxa_camera.rst index ee1bd96b66dd..46919919baac 100644 --- a/Documentation/driver-api/media/drivers/pxa_camera.rst +++ b/Documentation/driver-api/media/drivers/pxa_camera.rst @@ -19,7 +19,7 @@ Global video workflow a) QCI stopped Initially, the QCI interface is stopped. - When a buffer is queued (pxa_videobuf_ops->buf_queue), the QCI starts. + When a buffer is queued, start_streaming is called and the QCI starts. b) QCI started More buffers can be queued while the QCI is started without halting the diff --git a/Documentation/driver-api/pwm.rst b/Documentation/driver-api/pwm.rst index fd26c3d895b6..8c71a2055d27 100644 --- a/Documentation/driver-api/pwm.rst +++ b/Documentation/driver-api/pwm.rst @@ -40,8 +40,7 @@ after usage with pwm_free(). New users should use the pwm_get() function and pass to it the consumer device or a consumer name. pwm_put() is used to free the PWM device. Managed -variants of the getter, devm_pwm_get(), devm_of_pwm_get(), -devm_fwnode_pwm_get(), also exist. +variants of the getter, devm_pwm_get() and devm_fwnode_pwm_get(), also exist. After being requested, a PWM has to be configured using:: diff --git a/Documentation/fb/udlfb.rst b/Documentation/fb/udlfb.rst index 732b37db3504..99cfbb7a1922 100644 --- a/Documentation/fb/udlfb.rst +++ b/Documentation/fb/udlfb.rst @@ -86,17 +86,24 @@ Module Options Special configuration for udlfb is usually unnecessary. There are a few options, however. -From the command line, pass options to modprobe -modprobe udlfb fb_defio=0 console=1 shadow=1 +From the command line, pass options to modprobe:: -Or modify options on the fly at /sys/module/udlfb/parameters directory via -sudo nano fb_defio -change the parameter in place, and save the file. + modprobe udlfb fb_defio=0 console=1 shadow=1 -Unplug/replug USB device to apply with new settings +Or change options on the fly by editing +/sys/module/udlfb/parameters/PARAMETER_NAME :: -Or for permanent option, create file like /etc/modprobe.d/udlfb.conf with text -options udlfb fb_defio=0 console=1 shadow=1 + cd /sys/module/udlfb/parameters + ls # to see a list of parameter names + sudo nano PARAMETER_NAME + # change the parameter in place, and save the file. + +Unplug/replug USB device to apply with new settings. + +Or to apply options permanently, create a modprobe configuration file +like /etc/modprobe.d/udlfb.conf with text:: + + options udlfb fb_defio=0 console=1 shadow=1 Accepted boolean options: diff --git a/Documentation/filesystems/caching/backend-api.rst b/Documentation/filesystems/caching/backend-api.rst index d7507becf674..3a199fc50828 100644 --- a/Documentation/filesystems/caching/backend-api.rst +++ b/Documentation/filesystems/caching/backend-api.rst @@ -122,7 +122,7 @@ volumes, calling:: to tell fscache that a volume has been withdrawn. This waits for all outstanding accesses on the volume to complete before returning. -When the the cache is completely withdrawn, fscache should be notified by +When the cache is completely withdrawn, fscache should be notified by calling:: void fscache_relinquish_cache(struct fscache_cache *cache); diff --git a/Documentation/filesystems/cifs/ksmbd.rst b/Documentation/filesystems/cifs/ksmbd.rst index 1af600db2e70..7bed96d794fc 100644 --- a/Documentation/filesystems/cifs/ksmbd.rst +++ b/Documentation/filesystems/cifs/ksmbd.rst @@ -118,26 +118,44 @@ ksmbd/nfsd interoperability Planned for future. The features that ksmbd How to run ========== -1. Download ksmbd-tools and compile them. - - https://github.com/cifsd-team/ksmbd-tools +1. Download ksmbd-tools(https://github.com/cifsd-team/ksmbd-tools/releases) and + compile them. -2. Create user/password for SMB share. + - Refer README(https://github.com/cifsd-team/ksmbd-tools/blob/master/README.md) + to know how to use ksmbd.mountd/adduser/addshare/control utils - # mkdir /etc/ksmbd/ - # ksmbd.adduser -a <Enter USERNAME for SMB share access> + $ ./autogen.sh + $ ./configure --with-rundir=/run + $ make && sudo make install -3. Create /etc/ksmbd/smb.conf file, add SMB share in smb.conf file - - Refer smb.conf.example and - https://github.com/cifsd-team/ksmbd-tools/blob/master/Documentation/configuration.txt +2. Create /usr/local/etc/ksmbd/ksmbd.conf file, add SMB share in ksmbd.conf file. -4. Insert ksmbd.ko module + - Refer ksmbd.conf.example in ksmbd-utils, See ksmbd.conf manpage + for details to configure shares. - # insmod ksmbd.ko + $ man ksmbd.conf + +3. Create user/password for SMB share. + + - See ksmbd.adduser manpage. + + $ man ksmbd.adduser + $ sudo ksmbd.adduser -a <Enter USERNAME for SMB share access> + +4. Insert ksmbd.ko module after build your kernel. No need to load module + if ksmbd is built into the kernel. + + - Set ksmbd in menuconfig(e.g. $ make menuconfig) + [*] Network File Systems ---> + <M> SMB3 server support (EXPERIMENTAL) + + $ sudo modprobe ksmbd.ko 5. Start ksmbd user space daemon - # ksmbd.mountd -6. Access share from Windows or Linux using CIFS + $ sudo ksmbd.mountd + +6. Access share from Windows or Linux using SMB3 client (cifs.ko or smbclient of samba) Shutdown KSMBD ============== diff --git a/Documentation/filesystems/ext4/super.rst b/Documentation/filesystems/ext4/super.rst index 268888522e35..0152888cac29 100644 --- a/Documentation/filesystems/ext4/super.rst +++ b/Documentation/filesystems/ext4/super.rst @@ -456,15 +456,15 @@ The ext4 superblock is laid out as follows in * - 0x277 - __u8 - s_lastcheck_hi - - Upper 8 bits of the s_lastcheck_hi field. + - Upper 8 bits of the s_lastcheck field. * - 0x278 - __u8 - s_first_error_time_hi - - Upper 8 bits of the s_first_error_time_hi field. + - Upper 8 bits of the s_first_error_time field. * - 0x279 - __u8 - s_last_error_time_hi - - Upper 8 bits of the s_last_error_time_hi field. + - Upper 8 bits of the s_last_error_time field. * - 0x27A - __u8 - s_pad[2] diff --git a/Documentation/filesystems/f2fs.rst b/Documentation/filesystems/f2fs.rst index d0c09663dae8..17df9a02ccff 100644 --- a/Documentation/filesystems/f2fs.rst +++ b/Documentation/filesystems/f2fs.rst @@ -286,9 +286,8 @@ compress_algorithm=%s:%d Control compress algorithm and its compress level, now, algorithm level range lz4 3 - 16 zstd 1 - 22 -compress_log_size=%u Support configuring compress cluster size, the size will - be 4KB * (1 << %u), 16KB is minimum size, also it's - default size. +compress_log_size=%u Support configuring compress cluster size. The size will + be 4KB * (1 << %u). The default and minimum sizes are 16KB. compress_extension=%s Support adding specified extension, so that f2fs can enable compression on those corresponding files, e.g. if all files with '.ext' has high compression rate, we can set the '.ext' diff --git a/Documentation/filesystems/idmappings.rst b/Documentation/filesystems/idmappings.rst index c1db8748389c..b9b31066aef2 100644 --- a/Documentation/filesystems/idmappings.rst +++ b/Documentation/filesystems/idmappings.rst @@ -661,7 +661,7 @@ idmappings:: mount idmapping: u0:k10000:r10000 Assume a file owned by ``u1000`` is read from disk. The filesystem maps this id -to ``k21000`` according to it's idmapping. This is what is stored in the +to ``k21000`` according to its idmapping. This is what is stored in the inode's ``i_uid`` and ``i_gid`` fields. When the caller queries the ownership of this file via ``stat()`` the kernel diff --git a/Documentation/filesystems/locking.rst b/Documentation/filesystems/locking.rst index 4bb2627026ec..8f737e76935c 100644 --- a/Documentation/filesystems/locking.rst +++ b/Documentation/filesystems/locking.rst @@ -79,7 +79,8 @@ prototypes:: int (*atomic_open)(struct inode *, struct dentry *, struct file *, unsigned open_flag, umode_t create_mode); - int (*tmpfile) (struct inode *, struct dentry *, umode_t); + int (*tmpfile) (struct user_namespace *, struct inode *, + struct file *, umode_t); int (*fileattr_set)(struct user_namespace *mnt_userns, struct dentry *dentry, struct fileattr *fa); int (*fileattr_get)(struct dentry *dentry, struct fileattr *fa); diff --git a/Documentation/filesystems/porting.rst b/Documentation/filesystems/porting.rst index aee9aaf9f3df..df0dc37e6f58 100644 --- a/Documentation/filesystems/porting.rst +++ b/Documentation/filesystems/porting.rst @@ -922,3 +922,24 @@ is provided - file_open_root_mnt(). In-tree users adjusted. no_llseek is gone; don't set .llseek to that - just leave it NULL instead. Checks for "does that file have llseek(2), or should it fail with ESPIPE" should be done by looking at FMODE_LSEEK in file->f_mode. + +--- + +*mandatory* + +filldir_t (readdir callbacks) calling conventions have changed. Instead of +returning 0 or -E... it returns bool now. false means "no more" (as -E... used +to) and true - "keep going" (as 0 in old calling conventions). Rationale: +callers never looked at specific -E... values anyway. ->iterate() and +->iterate_shared() instance require no changes at all, all filldir_t ones in +the tree converted. + +--- + +**mandatory** + +Calling conventions for ->tmpfile() have changed. It now takes a struct +file pointer instead of struct dentry pointer. d_tmpfile() is similarly +changed to simplify callers. The passed file is in a non-open state and on +success must be opened before returning (e.g. by calling +finish_open_simple()). diff --git a/Documentation/filesystems/proc.rst b/Documentation/filesystems/proc.rst index e7aafc82be99..898c99eae8e4 100644 --- a/Documentation/filesystems/proc.rst +++ b/Documentation/filesystems/proc.rst @@ -982,6 +982,7 @@ Example output. You may not have all of these fields. SUnreclaim: 142336 kB KernelStack: 11168 kB PageTables: 20540 kB + SecPageTables: 0 kB NFS_Unstable: 0 kB Bounce: 0 kB WritebackTmp: 0 kB @@ -1090,6 +1091,9 @@ KernelStack Memory consumed by the kernel stacks of all tasks PageTables Memory consumed by userspace page tables +SecPageTables + Memory consumed by secondary page tables, this currently + currently includes KVM mmu allocations on x86 and arm64. NFS_Unstable Always zero. Previous counted pages which had been written to the server, but has not been committed to stable storage. diff --git a/Documentation/filesystems/qnx6.rst b/Documentation/filesystems/qnx6.rst index fd13433d362c..523b798f04e7 100644 --- a/Documentation/filesystems/qnx6.rst +++ b/Documentation/filesystems/qnx6.rst @@ -176,7 +176,7 @@ Then userspace. The requirement for a static, fixed preallocated system area comes from how qnx6fs deals with writes. -Each superblock got it's own half of the system area. So superblock #1 +Each superblock got its own half of the system area. So superblock #1 always uses blocks from the lower half while superblock #2 just writes to blocks represented by the upper half bitmap system area bits. diff --git a/Documentation/filesystems/spufs/spufs.rst b/Documentation/filesystems/spufs/spufs.rst index 8a42859bb100..ca0441cbe37e 100644 --- a/Documentation/filesystems/spufs/spufs.rst +++ b/Documentation/filesystems/spufs/spufs.rst @@ -227,7 +227,7 @@ Files from the data buffer, updating the value of the specified signal notification register. The signal notification register will either be replaced with the input data or will be updated to the - bitwise OR or the old value and the input data, depending on the + bitwise OR of the old value and the input data, depending on the contents of the signal1_type, or signal2_type respectively, file. diff --git a/Documentation/filesystems/sysfs.rst b/Documentation/filesystems/sysfs.rst index 004d490179f3..8bba676b1365 100644 --- a/Documentation/filesystems/sysfs.rst +++ b/Documentation/filesystems/sysfs.rst @@ -263,7 +263,7 @@ A very simple (and naive) implementation of a device attribute is:: static ssize_t show_name(struct device *dev, struct device_attribute *attr, char *buf) { - return scnprintf(buf, PAGE_SIZE, "%s\n", dev->name); + return sysfs_emit(buf, "%s\n", dev->name); } static ssize_t store_name(struct device *dev, struct device_attribute *attr, diff --git a/Documentation/filesystems/vfs.rst b/Documentation/filesystems/vfs.rst index 6cd6953e175b..2b55f71e2ae1 100644 --- a/Documentation/filesystems/vfs.rst +++ b/Documentation/filesystems/vfs.rst @@ -274,6 +274,9 @@ or bottom half). This is specifically for the inode itself being marked dirty, not its data. If the update needs to be persisted by fdatasync(), then I_DIRTY_DATASYNC will be set in the flags argument. + I_DIRTY_TIME will be set in the flags in case lazytime is enabled + and struct inode has times updated since the last ->dirty_inode + call. ``write_inode`` this method is called when the VFS needs to write an inode to @@ -439,7 +442,7 @@ As of kernel 2.6.22, the following members are defined: void (*update_time)(struct inode *, struct timespec *, int); int (*atomic_open)(struct inode *, struct dentry *, struct file *, unsigned open_flag, umode_t create_mode); - int (*tmpfile) (struct user_namespace *, struct inode *, struct dentry *, umode_t); + int (*tmpfile) (struct user_namespace *, struct inode *, struct file *, umode_t); int (*set_acl)(struct user_namespace *, struct inode *, struct posix_acl *, int); int (*fileattr_set)(struct user_namespace *mnt_userns, struct dentry *dentry, struct fileattr *fa); @@ -589,7 +592,9 @@ otherwise noted. ``tmpfile`` called in the end of O_TMPFILE open(). Optional, equivalent to atomically creating, opening and unlinking a file in given - directory. + directory. On success needs to return with the file already + open; this can be done by calling finish_open_simple() right at + the end. ``fileattr_get`` called on ioctl(FS_IOC_GETFLAGS) and ioctl(FS_IOC_FSGETXATTR) to diff --git a/Documentation/filesystems/xfs-delayed-logging-design.rst b/Documentation/filesystems/xfs-delayed-logging-design.rst index 4ef419f54663..6402ab8e370c 100644 --- a/Documentation/filesystems/xfs-delayed-logging-design.rst +++ b/Documentation/filesystems/xfs-delayed-logging-design.rst @@ -100,7 +100,7 @@ transactions together:: ntp = xfs_trans_dup(tp); xfs_trans_commit(tp); - xfs_log_reserve(ntp); + xfs_trans_reserve(ntp); This results in a series of "rolling transactions" where the inode is locked across the entire chain of transactions. Hence while this series of rolling @@ -191,7 +191,7 @@ transaction rolling mechanism to re-reserve space on every transaction roll. We know from the implementation of the permanent transactions how many transaction rolls are likely for the common modifications that need to be made. -For example, and inode allocation is typically two transactions - one to +For example, an inode allocation is typically two transactions - one to physically allocate a free inode chunk on disk, and another to allocate an inode from an inode chunk that has free inodes in it. Hence for an inode allocation transaction, we might set the reservation log count to a value of 2 to indicate @@ -200,7 +200,7 @@ chain. Each time a permanent transaction rolls, it consumes an entire unit reservation. Hence when the permanent transaction is first allocated, the log space -reservation is increases from a single unit reservation to multiple unit +reservation is increased from a single unit reservation to multiple unit reservations. That multiple is defined by the reservation log count, and this means we can roll the transaction multiple times before we have to re-reserve log space when we roll the transaction. This ensures that the common @@ -259,7 +259,7 @@ the next transaction in the sequeunce, but we have none remaining. We cannot sleep during the transaction commit process waiting for new log space to become available, as we may end up on the end of the FIFO queue and the items we have locked while we sleep could end up pinning the tail of the log before there is -enough free space in the log to fulfil all of the pending reservations and +enough free space in the log to fulfill all of the pending reservations and then wake up transaction commit in progress. To take a new reservation without sleeping requires us to be able to take a @@ -551,14 +551,14 @@ Essentially, this shows that an item that is in the AIL can still be modified and relogged, so any tracking must be separate to the AIL infrastructure. As such, we cannot reuse the AIL list pointers for tracking committed items, nor can we store state in any field that is protected by the AIL lock. Hence the -committed item tracking needs it's own locks, lists and state fields in the log +committed item tracking needs its own locks, lists and state fields in the log item. Similar to the AIL, tracking of committed items is done through a new list called the Committed Item List (CIL). The list tracks log items that have been committed and have formatted memory buffers attached to them. It tracks objects in transaction commit order, so when an object is relogged it is removed from -it's place in the list and re-inserted at the tail. This is entirely arbitrary +its place in the list and re-inserted at the tail. This is entirely arbitrary and done to make it easy for debugging - the last items in the list are the ones that are most recently modified. Ordering of the CIL is not necessary for transactional integrity (as discussed in the next section) so the ordering is @@ -615,7 +615,7 @@ those changes into the current checkpoint context. We then initialise a new context and attach that to the CIL for aggregation of new transactions. This allows us to unlock the CIL immediately after transfer of all the -committed items and effectively allow new transactions to be issued while we +committed items and effectively allows new transactions to be issued while we are formatting the checkpoint into the log. It also allows concurrent checkpoints to be written into the log buffers in the case of log force heavy workloads, just like the existing transaction commit code does. This, however, @@ -884,9 +884,9 @@ pin the object the first time it is inserted into the CIL - if it is already in the CIL during a transaction commit, then we do not pin it again. Because there can be multiple outstanding checkpoint contexts, we can still see elevated pin counts, but as each checkpoint completes the pin count will retain the correct -value according to it's context. +value according to its context. -Just to make matters more slightly more complex, this checkpoint level context +Just to make matters slightly more complex, this checkpoint level context for the pin count means that the pinning of an item must take place under the CIL commit/flush lock. If we pin the object outside this lock, we cannot guarantee which context the pin count is associated with. This is because of diff --git a/Documentation/firmware-guide/acpi/enumeration.rst b/Documentation/firmware-guide/acpi/enumeration.rst index dbb03022b127..b9dc0c603f36 100644 --- a/Documentation/firmware-guide/acpi/enumeration.rst +++ b/Documentation/firmware-guide/acpi/enumeration.rst @@ -21,7 +21,7 @@ possible we decided to do following: - Devices behind real busses where there is a connector resource are represented as struct spi_device or struct i2c_device. Note that standard UARTs are not busses so there is no struct uart_device, - although some of them may be represented by sturct serdev_device. + although some of them may be represented by struct serdev_device. As both ACPI and Device Tree represent a tree of devices (and their resources) this implementation follows the Device Tree way as much as @@ -205,7 +205,7 @@ Here is what the ACPI namespace for a SPI slave might look like:: } ... -The SPI device drivers only need to add ACPI IDs in a similar way than with +The SPI device drivers only need to add ACPI IDs in a similar way to the platform device drivers. Below is an example where we add ACPI support to at25 SPI eeprom driver (this is meant for the above ACPI snippet):: @@ -362,7 +362,7 @@ These GPIO numbers are controller relative and path "\\_SB.PCI0.GPI0" specifies the path to the controller. In order to use these GPIOs in Linux we need to translate them to the corresponding Linux GPIO descriptors. -There is a standard GPIO API for that and is documented in +There is a standard GPIO API for that and it is documented in Documentation/admin-guide/gpio/. In the above example we can get the corresponding two GPIO descriptors with @@ -538,8 +538,8 @@ information. PCI hierarchy representation ============================ -Sometimes could be useful to enumerate a PCI device, knowing its position on the -PCI bus. +Sometimes it could be useful to enumerate a PCI device, knowing its position on +the PCI bus. For example, some systems use PCI devices soldered directly on the mother board, in a fixed position (ethernet, Wi-Fi, serial ports, etc.). In this conditions it @@ -550,7 +550,7 @@ To identify a PCI device, a complete hierarchical description is required, from the chipset root port to the final device, through all the intermediate bridges/switches of the board. -For example, let us assume to have a system with a PCIe serial port, an +For example, let's assume we have a system with a PCIe serial port, an Exar XR17V3521, soldered on the main board. This UART chip also includes 16 GPIOs and we want to add the property ``gpio-line-names`` [1] to these pins. In this case, the ``lspci`` output for this component is:: @@ -593,8 +593,8 @@ of the chipset bridge (also called "root port") with address:: Bus: 0 - Device: 14 - Function: 1 -To find this information is necessary disassemble the BIOS ACPI tables, in -particular the DSDT (see also [2]):: +To find this information, it is necessary to disassemble the BIOS ACPI tables, +in particular the DSDT (see also [2]):: mkdir ~/tables/ cd ~/tables/ diff --git a/Documentation/firmware-guide/acpi/osi.rst b/Documentation/firmware-guide/acpi/osi.rst index 05869c0045d7..784850adfcb6 100644 --- a/Documentation/firmware-guide/acpi/osi.rst +++ b/Documentation/firmware-guide/acpi/osi.rst @@ -41,26 +41,23 @@ But it is likely that they will all eventually be added. What should an OEM do if they want to support Linux and Windows using the same BIOS image? Often they need to do something different for Linux to deal with how Linux is different from Windows. -Here the BIOS should ask exactly what it wants to know: +In this case, the OEM should create custom ASL to be executed by the +Linux kernel and changes to Linux kernel drivers to execute this custom +ASL. The easiest way to accomplish this is to introduce a device specific +method (_DSM) that is called from the Linux kernel. + +In the past the kernel used to support something like: _OSI("Linux-OEM-my_interface_name") where 'OEM' is needed if this is an OEM-specific hook, and 'my_interface_name' describes the hook, which could be a quirk, a bug, or a bug-fix. -In addition, the OEM should send a patch to upstream Linux -via the linux-acpi@vger.kernel.org mailing list. When that patch -is checked into Linux, the OS will answer "YES" when the BIOS -on the OEM's system uses _OSI to ask if the interface is supported -by the OS. Linux distributors can back-port that patch for Linux -pre-installs, and it will be included by all distributions that -re-base to upstream. If the distribution can not update the kernel binary, -they can also add an acpi_osi=Linux-OEM-my_interface_name -cmdline parameter to the boot loader, as needed. - -If the string refers to a feature where the upstream kernel -eventually grows support, a patch should be sent to remove -the string when that support is added to the kernel. +However this was discovered to be abused by other BIOS vendors to change +completely unrelated code on completely unrelated systems. This prompted +an evaluation of all of it's uses. This uncovered that they aren't needed +for any of the original reasons. As such, the kernel will not respond to +any custom Linux-* strings by default. That was easy. Read on, to find out how to do it wrong. diff --git a/Documentation/gpu/amdgpu/apu-asic-info-table.csv b/Documentation/gpu/amdgpu/apu-asic-info-table.csv new file mode 100644 index 000000000000..98c6988e424e --- /dev/null +++ b/Documentation/gpu/amdgpu/apu-asic-info-table.csv @@ -0,0 +1,8 @@ +Product Name, Code Reference, DCN/DCE version, GC version, VCE/UVD/VCN version, SDMA version +Radeon R* Graphics, CARRIZO/STONEY, DCE 11, 8, VCE 3 / UVD 6, 3 +Ryzen 3000 series / AMD Ryzen Embedded V1*/R1* with Radeon Vega Gfx, RAVEN/PICASSO, DCN 1.0, 9.1.0, VCN 1.0, 4.1.0 +Ryzen 4000 series, RENOIR, DCN 2.1, 9.3, VCN 2.2, 4.1.2 +Ryzen 3000 series / AMD Ryzen Embedded V1*/R1* with Radeon Vega Gfx, RAVEN2, DCN 1.0, 9.2.2, VCN 1.0.1, 4.1.1 +SteamDeck, VANGOGH, DCN 3.0.1, 10.3.1, VCN 3.1.0, 5.2.1 +Ryzen 5000 series, GREEN SARDINE, DCN 2.1, 9.3, VCN 2.2, 4.1.1 +Ryzen 6000 Zen, YELLOW CARP, 3.1.2, 10.3.3, VCN 3.1.1, 5.2.3 diff --git a/Documentation/gpu/amdgpu/dgpu-asic-info-table.csv b/Documentation/gpu/amdgpu/dgpu-asic-info-table.csv new file mode 100644 index 000000000000..84617aa35dab --- /dev/null +++ b/Documentation/gpu/amdgpu/dgpu-asic-info-table.csv @@ -0,0 +1,24 @@ +Product Name, Code Reference, DCN/DCE version, GC version, VCN version, SDMA version +AMD Radeon (TM) HD 8500M/ 8600M /M200 /M320 /M330 /M335 Series, HAINAN, --, 6, --, -- +AMD Radeon HD 7800 /7900 /FireGL Series, TAHITI, DCE 6, 6, VCE 1 / UVD 3, -- +AMD Radeon R7 (TM|HD) M265 /M370 /8500M /8600 /8700 /8700M, OLAND, DCE 6, 6, VCE 1 / UVD 3, -- +AMD Radeon (TM) (HD|R7) 7800 /7970 /8800 /8970 /370/ Series, PITCAIRN, DCE 6, 6, VCE 1 / UVD 3, -- +AMD Radeon (TM|R7|R9|HD) E8860 /M360 /7700 /7800 /8800 /9000(M) /W4100 Series, VERDE, DCE 6, 6, VCE 1 / UVD 3, -- +AMD Radeon HD M280X /M380 /7700 /8950 /W5100, BONAIRE, DCE 8, 7, VCE 2 / UVD 4.2, 1 +AMD Radeon (R9|TM) 200 /390 /W8100 /W9100 Series, HAWAII, DCE 8, 7, VCE 2 / UVD 4.2, 1 +AMD Radeon (TM) R(5|7) M315 /M340 /M360, TOPAZ, *, 8, --, 2 +AMD Radeon (TM) R9 200 /380 /W7100 /S7150 /M390 /M395 Series, TONGA, DCE 10, 8, VCE 3 / UVD 5, 3 +AMD Radeon (FirePro) (TM) R9 Fury Series, FIJI, DCE 10, 8, VCE 3 / UVD 6, 3 +Radeon RX 470 /480 /570 /580 /590 Series - AMD Radeon (TM) (Pro WX) 5100 /E9390 /E9560 /E9565 /V7350 /7100 /P30PH, POLARIS10, DCE 11.2, 8, VCE 3.4 / UVD 6.3, 3 +Radeon (TM) (RX|Pro WX) E9260 /460 /V5300X /550 /560(X) Series, POLARIS11, DCE 11.2, 8, VCE 3.4 / UVD 6.3, 3 +Radeon (RX/Pro) 500 /540(X) /550 /640 /WX2100 /WX3100 /WX200 Series, POLARIS12, DCE 11.2, 8, VCE 3.4 / UVD 6.3, 3 +Radeon (RX|TM) (PRO|WX) Vega /MI25 /V320 /V340L /8200 /9100 /SSG MxGPU, VEGA10, DCE 12, 9.0.1, VCE 4.0.0 / UVD 7.0.0, 4.0.0 +AMD Radeon (Pro) VII /MI50 /MI60, VEGA20, DCE 12, 9.4.0, VCE 4.1.0 / UVD 7.2.0, 4.2.0 +MI100, ARCTURUS, *, 9.4.1, VCN 2.5.0, 4.2.2 +MI200, ALDEBARAN, *, 9.4.2, VCN 2.6.0, 4.4.0 +AMD Radeon (RX|Pro) 5600(M|XT) /5700 (M|XT|XTB) /W5700, NAVI10, DCN 2.0.0, 10.1.10, VCN 2.0.0, 5.0.0 +AMD Radeon (Pro) 5300 /5500XTB/5500(XT|M) /W5500M /W5500, NAVI14, DCN 2.0.0, 10.1.1, VCN 2.0.2, 5.0.2 +AMD Radeon RX 6800(XT) /6900(XT) /W6800, SIENNA_CICHLID, DCN 3.0.0, 10.3.0, VCN 3.0.0, 5.2.0 +AMD Radeon RX 6700 XT / 6800M / 6700M, NAVY_FLOUNDER, DCN 3.0.0, 10.3.2, VCN 3.0.0, 5.2.2 +AMD Radeon RX 6600(XT) /6600M /W6600 /W6600M, DIMGREY_CAVEFISH, DCN 3.0.2, 10.3.4, VCN 3.0.16, 5.2.4 +AMD Radeon RX 6500M /6300M /W6500M /W6300M, BEIGE_GOBY, DCN 3.0.3, 10.3.5, VCN 3.0.33, 5.2.5 diff --git a/Documentation/gpu/amdgpu/display/dc-glossary.rst b/Documentation/gpu/amdgpu/display/dc-glossary.rst index 116f5f0942fd..0b0ffd428dd2 100644 --- a/Documentation/gpu/amdgpu/display/dc-glossary.rst +++ b/Documentation/gpu/amdgpu/display/dc-glossary.rst @@ -170,7 +170,7 @@ consider asking in the amdgfx and update this page. MC Memory Controller - MPC + MPC/MPCC Multiple pipes and plane combine MPO diff --git a/Documentation/gpu/amdgpu/display/dcn-overview.rst b/Documentation/gpu/amdgpu/display/dcn-overview.rst index f98624d7828e..9fea6500448b 100644 --- a/Documentation/gpu/amdgpu/display/dcn-overview.rst +++ b/Documentation/gpu/amdgpu/display/dcn-overview.rst @@ -124,6 +124,65 @@ depth format), bit-depth reduction/dithering would kick in. In OPP, we would also apply a regamma function to introduce the gamma removed earlier back. Eventually, we output data in integer format at DIO. +AMD Hardware Pipeline +--------------------- + +When discussing graphics on Linux, the **pipeline** term can sometimes be +overloaded with multiple meanings, so it is important to define what we mean +when we say **pipeline**. In the DCN driver, we use the term **hardware +pipeline** or **pipeline** or just **pipe** as an abstraction to indicate a +sequence of DCN blocks instantiated to address some specific configuration. DC +core treats DCN blocks as individual resources, meaning we can build a pipeline +by taking resources for all individual hardware blocks to compose one pipeline. +In actuality, we can't connect an arbitrary block from one pipe to a block from +another pipe; they are routed linearly, except for DSC, which can be +arbitrarily assigned as needed. We have this pipeline concept for trying to +optimize bandwidth utilization. + +.. kernel-figure:: pipeline_4k_no_split.svg + +Additionally, let's take a look at parts of the DTN log (see +'Documentation/gpu/amdgpu/display/dc-debug.rst' for more information) since +this log can help us to see part of this pipeline behavior in real-time:: + + HUBP: format addr_hi width height ... + [ 0]: 8h 81h 3840 2160 + [ 1]: 0h 0h 0 0 + [ 2]: 0h 0h 0 0 + [ 3]: 0h 0h 0 0 + [ 4]: 0h 0h 0 0 + ... + MPCC: OPP DPP ... + [ 0]: 0h 0h ... + +The first thing to notice from the diagram and DTN log it is the fact that we +have different clock domains for each part of the DCN blocks. In this example, +we have just a single **pipeline** where the data flows from DCHUB to DIO, as +we intuitively expect. Nonetheless, DCN is flexible, as mentioned before, and +we can split this single pipe differently, as described in the below diagram: + +.. kernel-figure:: pipeline_4k_split.svg + +Now, if we inspect the DTN log again we can see some interesting changes:: + + HUBP: format addr_hi width height ... + [ 0]: 8h 81h 1920 2160 ... + ... + [ 4]: 0h 0h 0 0 ... + [ 5]: 8h 81h 1920 2160 ... + ... + MPCC: OPP DPP ... + [ 0]: 0h 0h ... + [ 5]: 0h 5h ... + +From the above example, we now split the display pipeline into two vertical +parts of 1920x2160 (i.e., 3440x2160), and as a result, we could reduce the +clock frequency in the DPP part. This is not only useful for saving power but +also to better handle the required throughput. The idea to keep in mind here is +that the pipe configuration can vary a lot according to the display +configuration, and it is the DML's responsibility to set up all required +configuration parameters for multiple scenarios supported by our hardware. + Global Sync ----------- diff --git a/Documentation/gpu/amdgpu/display/dcn2_cm_drm_current.svg b/Documentation/gpu/amdgpu/display/dcn2_cm_drm_current.svg new file mode 100644 index 000000000000..315ffc5a1a4b --- /dev/null +++ b/Documentation/gpu/amdgpu/display/dcn2_cm_drm_current.svg @@ -0,0 +1,1370 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<!-- Created with Inkscape (http://www.inkscape.org/) --> + +<svg + version="1.1" + id="svg2019" + width="1702" + height="1845" + viewBox="0 0 1702 1845" + sodipodi:docname="dcn2_cm_drm_current.svg" + inkscape:version="1.1.2 (0a00cf5339, 2022-02-04)" + xmlns:inkscape="http://www.inkscape.org/namespaces/inkscape" + xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd" + 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style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none" + x="874.5556" + y="773.42615" + id="text117309-6"><tspan + sodipodi:role="line" + id="tspan117307-7" + x="874.5556" + y="773.42615" + style="font-size:18.6667px">gamut_remap_matrix</tspan></text> + <text + xml:space="preserve" + style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none" + x="913.72528" + y="846.55896" + id="text117309-5"><tspan + sodipodi:role="line" + id="tspan117307-3" + x="913.72528" + y="846.55896" + style="font-size:18.6667px">in_shaper_func</tspan></text> + <text + xml:space="preserve" + style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none" + x="937.72528" + y="918.25787" + id="text117309-56"><tspan + sodipodi:role="line" + id="tspan117307-2" + x="937.72528" + y="918.25787" + style="font-size:18.6667px">lut3d_func</tspan></text> + <text + xml:space="preserve" + style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none" + x="945.9895" + y="986.10767" + id="text117309-9"><tspan + sodipodi:role="line" + id="tspan117307-1" + x="945.9895" + y="986.10767" + style="font-size:18.6667px">blend_tf</tspan></text> + <text + xml:space="preserve" + style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none" + x="975.91803" + y="1224.5564" + id="text137434"><tspan + sodipodi:role="line" + id="tspan137432" + x="975.91803" + y="1224.5564" + style="font-size:18.6667px">Blender</tspan></text> + <text + xml:space="preserve" + style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none" + x="879.31372" + y="1283.4249" + id="text137434-2"><tspan + sodipodi:role="line" + id="tspan137432-7" + x="879.31372" + y="1283.4249" + style="font-size:18.6667px">gamut_remap_matrix</tspan></text> + <text + xml:space="preserve" + style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none" + x="925.31372" + y="1359.2747" + id="text137434-0"><tspan + sodipodi:role="line" + id="tspan137432-9" + x="925.31372" + y="1359.2747" + style="font-size:18.6667px">func_shaper</tspan></text> + <text + xml:space="preserve" + style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none" + x="930.33252" + y="1430.2566" + id="text137434-3"><tspan + sodipodi:role="line" + id="tspan137432-6" + x="930.33252" + y="1430.2566" + style="font-size:18.6667px">lut3d_func</tspan></text> + <text + xml:space="preserve" + style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none" + x="900.18158" + y="1504.6725" + id="text137434-06"><tspan + sodipodi:role="line" + id="tspan137432-2" + x="900.18158" + y="1504.6725" + style="font-size:18.6667px">out_transfer_func</tspan></text> + <text + xml:space="preserve" + style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none" + x="904.0307" + y="1575.8053" + id="text137434-6"><tspan + sodipodi:role="line" + id="tspan137432-1" + x="904.0307" + y="1575.8053" + style="font-size:18.6667px">csc_color_matrix</tspan></text> + <text + xml:space="preserve" + style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none" + x="903.16278" + y="1642.1078" + id="text137434-8"><tspan + sodipodi:role="line" + id="tspan137432-79" + x="903.16278" + y="1642.1078" + style="font-size:18.6667px">bit_depth_param</tspan></text> + <text + xml:space="preserve" + style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none" + x="939.31372" + y="1713.8068" + id="text137434-20"><tspan + sodipodi:role="line" + id="tspan137432-23" + x="939.31372" + y="1713.8068" + style="font-size:18.6667px">clamping</tspan></text> + <text + xml:space="preserve" + style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none" + x="894.0307" + y="1782.5244" + id="text137434-7"><tspan + sodipodi:role="line" + id="tspan137432-5" + x="894.0307" + y="1782.5244" + style="font-size:18.6667px">output_color_space</tspan></text> + <text + xml:space="preserve" + style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none" + x="869.63062" + y="117.7968" + id="text176429"><tspan + sodipodi:role="line" + id="tspan176427" + x="869.63062" + y="117.7968" + style="font-size:18.6667px">Plane</tspan></text> + <text + xml:space="preserve" + style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none" + x="27.605465" + y="162.20587" + id="text176429-2"><tspan + sodipodi:role="line" + id="tspan176427-0" + x="27.605465" + y="162.20587" + style="font-size:18.6667px">Legend</tspan></text> + <text + xml:space="preserve" + style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none" + x="298.63959" + y="59.293999" + id="text176429-9"><tspan + sodipodi:role="line" + id="tspan176427-2" + x="298.63959" + y="59.293999" + style="font-size:18.6667px">DCN 3.0</tspan></text> + <text + xml:space="preserve" + style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none" + x="826.65735" + y="59.458061" + id="text176429-66"><tspan + sodipodi:role="line" + id="tspan176427-4" + x="826.65735" + y="59.458061" + style="font-size:18.6667px">DC Interface</tspan></text> + <text + xml:space="preserve" + style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none" + x="1362.9948" + y="59.458061" + id="text176429-95"><tspan + sodipodi:role="line" + id="tspan176427-04" + x="1362.9948" + y="59.458061" + style="font-size:18.6667px">DRM Interface</tspan></text> + <text + xml:space="preserve" + style="font-style:normal;font-weight:normal;font-size:40px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none" + x="867.34656" + y="1194.5068" + id="text184728"><tspan + sodipodi:role="line" + id="tspan184726" + x="867.34656" + y="1194.5068" /></text> + <text + xml:space="preserve" + style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none" + x="389.01593" + y="159.8909" + id="text64469-9-3"><tspan + sodipodi:role="line" + id="tspan64467-2-6" + x="389.01593" + y="159.8909" + style="font-size:18.6667px">CNVC</tspan></text> + <text + xml:space="preserve" + style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none" + x="365.88379" + y="303.59048" + id="text64469-9-1"><tspan + sodipodi:role="line" + id="tspan64467-2-2" + x="365.88379" + y="303.59048" + style="font-size:18.6667px">Input CSC</tspan></text> + <text + xml:space="preserve" + style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none" + x="413.06488" + y="390.95001" + id="text64469-9-93"><tspan + sodipodi:role="line" + id="tspan64467-2-1" + x="413.06488" + y="390.95001" + style="font-size:18.6667px;text-align:center;text-anchor:middle">DeGamma</tspan><tspan + sodipodi:role="line" + x="413.06488" + y="414.28339" + style="font-size:18.6667px;text-align:center;text-anchor:middle" + id="tspan233797">ROM</tspan><tspan + sodipodi:role="line" + x="413.06488" + y="437.61676" + style="font-size:10.6667px;text-align:center;text-anchor:middle" + id="tspan233799">(sRGB, BT2020, Gamma 2.2,</tspan><tspan + sodipodi:role="line" + x="413.06488" + y="460.95013" + style="font-size:10.6667px;text-align:center;text-anchor:middle" + id="tspan242597">PQ, HLG)</tspan></text> + <text + xml:space="preserve" + style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none" + x="372.44986" + y="538.83807" + id="text64469-9-94"><tspan + sodipodi:role="line" + id="tspan64467-2-78" + x="372.44986" + y="538.83807" + style="font-size:18.6667px">Post CSC</tspan></text> + <text + xml:space="preserve" + style="font-style:normal;font-weight:normal;font-size:16px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none" + x="335.31775" + y="622.23511" + id="text64469-9-4"><tspan + sodipodi:role="line" + id="tspan64467-2-5" + x="335.31775" + y="622.23511" + style="font-size:16px">Gamma Correction</tspan></text> + <text + xml:space="preserve" + style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none" + x="351.16684" + y="700.34918" + id="text64469-9-0"><tspan + sodipodi:role="line" + id="tspan64467-2-3" + x="351.16684" + y="700.34918" + style="font-size:18.6667px">HDR Multiply</tspan></text> + <text + xml:space="preserve" + style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none" + x="345.16684" + y="771.33112" + id="text64469-9-6"><tspan + sodipodi:role="line" + id="tspan64467-2-10" + x="345.16684" + y="771.33112" + style="font-size:18.6667px">Gamut Remap</tspan></text> + <text + xml:space="preserve" + style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none" + x="412.5184" + y="836.04877" + id="text64469-9-63"><tspan + sodipodi:role="line" + id="tspan64467-2-20" + x="412.5184" + y="836.04877" + style="font-size:18.6667px;text-align:center;text-anchor:middle">Shaper LUT</tspan><tspan + sodipodi:role="line" + x="412.5184" + y="859.38214" + style="font-size:18.6667px;text-align:center;text-anchor:middle" + id="tspan222533">RAM</tspan></text> + <text + xml:space="preserve" + style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none" + x="413.54086" + y="908.61554" + id="text64469-9-61"><tspan + sodipodi:role="line" + id="tspan64467-2-55" + x="413.54086" + y="908.61554" + style="font-size:18.6667px;text-align:center;text-anchor:middle">3D LUT</tspan><tspan + sodipodi:role="line" + x="413.54086" + y="931.94891" + style="font-size:18.6667px;text-align:center;text-anchor:middle" + id="tspan221121">RAM</tspan></text> + <text + xml:space="preserve" + style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none" + x="344.0347" + y="985.33319" + id="text64469-9-47"><tspan + sodipodi:role="line" + id="tspan64467-2-65" + x="344.0347" + y="985.33319" + style="font-size:18.6667px">Blend Gamma</tspan></text> + <text + xml:space="preserve" + style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none" + x="433.84625" + y="1223.411" + id="text64469-9-69"><tspan + sodipodi:role="line" + id="tspan64467-2-37" + x="433.84625" + y="1223.411" + style="font-size:18.6667px">Blender</tspan></text> + <text + xml:space="preserve" + style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none" + x="343.73291" + y="1290.2421" + id="text64469-9-45"><tspan + sodipodi:role="line" + id="tspan64467-2-25" + x="343.73291" + y="1290.2421" + style="font-size:18.6667px">Gamut Remap</tspan></text> + <text + xml:space="preserve" + style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none" + x="408.74442" + y="1344.2428" + id="text64469-9-474"><tspan + sodipodi:role="line" + id="tspan64467-2-4" + x="408.74442" + y="1344.2428" + style="font-size:18.6667px;text-align:center;text-anchor:middle">Shaper LUT</tspan><tspan + sodipodi:role="line" + x="408.74442" + y="1367.5762" + style="font-size:18.6667px;text-align:center;text-anchor:middle" + id="tspan208303">RAM</tspan></text> + <text + xml:space="preserve" + style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none" + x="407.1257" + y="1420.2435" + id="text64469-9-30"><tspan + sodipodi:role="line" + id="tspan64467-2-786" + x="407.1257" + y="1420.2435" + style="font-size:18.6667px;text-align:center;text-anchor:middle">3D LUT</tspan><tspan + sodipodi:role="line" + x="407.1257" + y="1443.5769" + style="font-size:18.6667px;text-align:center;text-anchor:middle" + id="tspan204749">RAM</tspan></text> + <text + xml:space="preserve" + style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none" + x="408.64996" + y="1492.8102" + id="text64469-9-8"><tspan + sodipodi:role="line" + id="tspan64467-2-84" + x="408.64996" + y="1492.8102" + style="font-size:18.6667px;text-align:center;text-anchor:middle">Gamma</tspan><tspan + sodipodi:role="line" + x="408.64996" + y="1516.1436" + style="font-size:18.6667px;text-align:center;text-anchor:middle" + id="tspan197733">RAM</tspan></text> + <text + xml:space="preserve" + style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none" + x="385.46863" + y="1575.2261" + id="text64469-9-31"><tspan + sodipodi:role="line" + id="tspan64467-2-49" + x="385.46863" + y="1575.2261" + style="font-size:18.6667px">OCSC</tspan></text> + <text + xml:space="preserve" + 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a/Documentation/gpu/amdgpu/display/display-manager.rst +++ b/Documentation/gpu/amdgpu/display/display-manager.rst @@ -40,3 +40,144 @@ Atomic Implementation .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c :functions: amdgpu_dm_atomic_check amdgpu_dm_atomic_commit_tail + +Color Management Properties +=========================== + +.. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c + :doc: overview + +.. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c + :internal: + + +DC Color Capabilities between DCN generations +--------------------------------------------- + +DRM/KMS framework defines three CRTC color correction properties: degamma, +color transformation matrix (CTM) and gamma, and two properties for degamma and +gamma LUT sizes. AMD DC programs some of the color correction features +pre-blending but DRM/KMS has not per-plane color correction properties. + +In general, the DRM CRTC color properties are programmed to DC, as follows: +CRTC gamma after blending, and CRTC degamma pre-blending. Although CTM is +programmed after blending, it is mapped to DPP hw blocks (pre-blending). Other +color caps available in the hw is not currently exposed by DRM interface and +are bypassed. + +.. kernel-doc:: drivers/gpu/drm/amd/display/dc/dc.h + :doc: color-management-caps + +.. kernel-doc:: drivers/gpu/drm/amd/display/dc/dc.h + :internal: + +The color pipeline has undergone major changes between DCN hardware +generations. What's possible to do before and after blending depends on +hardware capabilities, as illustrated below by the DCN 2.0 and DCN 3.0 families +schemas. + +**DCN 2.0 family color caps and mapping** + +.. kernel-figure:: dcn2_cm_drm_current.svg + +**DCN 3.0 family color caps and mapping** + +.. kernel-figure:: dcn3_cm_drm_current.svg + +Blend Mode Properties +===================== + +Pixel blend mode is a DRM plane composition property of :c:type:`drm_plane` used to +describes how pixels from a foreground plane (fg) are composited with the +background plane (bg). Here, we present main concepts of DRM blend mode to help +to understand how this property is mapped to AMD DC interface. See more about +this DRM property and the alpha blending equations in :ref:`DRM Plane +Composition Properties <plane_composition_properties>`. + +Basically, a blend mode sets the alpha blending equation for plane +composition that fits the mode in which the alpha channel affects the state of +pixel color values and, therefore, the resulted pixel color. For +example, consider the following elements of the alpha blending equation: + +- *fg.rgb*: Each of the RGB component values from the foreground's pixel. +- *fg.alpha*: Alpha component value from the foreground's pixel. +- *bg.rgb*: Each of the RGB component values from the background. +- *plane_alpha*: Plane alpha value set by the **plane "alpha" property**, see + more in :ref:`DRM Plane Composition Properties <plane_composition_properties>`. + +in the basic alpha blending equation:: + + out.rgb = alpha * fg.rgb + (1 - alpha) * bg.rgb + +the alpha channel value of each pixel in a plane is ignored and only the plane +alpha affects the resulted pixel color values. + +DRM has three blend mode to define the blend formula in the plane composition: + +* **None**: Blend formula that ignores the pixel alpha. + +* **Pre-multiplied**: Blend formula that assumes the pixel color values in a + plane was already pre-multiplied by its own alpha channel before storage. + +* **Coverage**: Blend formula that assumes the pixel color values were not + pre-multiplied with the alpha channel values. + +and pre-multiplied is the default pixel blend mode, that means, when no blend +mode property is created or defined, DRM considers the plane's pixels has +pre-multiplied color values. On IGT GPU tools, the kms_plane_alpha_blend test +provides a set of subtests to verify plane alpha and blend mode properties. + +The DRM blend mode and its elements are then mapped by AMDGPU display manager +(DM) to program the blending configuration of the Multiple Pipe/Plane Combined +(MPC), as follows: + +.. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h + :doc: mpc-overview + +.. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h + :functions: mpcc_blnd_cfg + +Therefore, the blending configuration for a single MPCC instance on the MPC +tree is defined by :c:type:`mpcc_blnd_cfg`, where +:c:type:`pre_multiplied_alpha` is the alpha pre-multiplied mode flag used to +set :c:type:`MPCC_ALPHA_MULTIPLIED_MODE`. It controls whether alpha is +multiplied (true/false), being only true for DRM pre-multiplied blend mode. +:c:type:`mpcc_alpha_blend_mode` defines the alpha blend mode regarding pixel +alpha and plane alpha values. It sets one of the three modes for +:c:type:`MPCC_ALPHA_BLND_MODE`, as described below. + +.. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h + :functions: mpcc_alpha_blend_mode + +DM then maps the elements of `enum mpcc_alpha_blend_mode` to those in the DRM +blend formula, as follows: + +* *MPC pixel alpha* matches *DRM fg.alpha* as the alpha component value + from the plane's pixel +* *MPC global alpha* matches *DRM plane_alpha* when the pixel alpha should + be ignored and, therefore, pixel values are not pre-multiplied +* *MPC global gain* assumes *MPC global alpha* value when both *DRM + fg.alpha* and *DRM plane_alpha* participate in the blend equation + +In short, *fg.alpha* is ignored by selecting +:c:type:`MPCC_ALPHA_BLEND_MODE_GLOBAL_ALPHA`. On the other hand, (plane_alpha * +fg.alpha) component becomes available by selecting +:c:type:`MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA_COMBINED_GLOBAL_GAIN`. And the +:c:type:`MPCC_ALPHA_MULTIPLIED_MODE` defines if the pixel color values are +pre-multiplied by alpha or not. + +Blend configuration flow +------------------------ + +The alpha blending equation is configured from DRM to DC interface by the +following path: + +1. When updating a :c:type:`drm_plane_state <drm_plane_state>`, DM calls + :c:type:`fill_blending_from_plane_state()` that maps + :c:type:`drm_plane_state <drm_plane_state>` attributes to + :c:type:`dc_plane_info <dc_plane_info>` struct to be handled in the + OS-agnostic component (DC). + +2. On DC interface, :c:type:`struct mpcc_blnd_cfg <mpcc_blnd_cfg>` programs the + MPCC blend configuration considering the :c:type:`dc_plane_info + <dc_plane_info>` input from DPP. diff --git a/Documentation/gpu/amdgpu/display/index.rst b/Documentation/gpu/amdgpu/display/index.rst index c1fb2fb3c710..f8a4f53d70d8 100644 --- a/Documentation/gpu/amdgpu/display/index.rst +++ b/Documentation/gpu/amdgpu/display/index.rst @@ -28,4 +28,5 @@ table of content: display-manager.rst dc-debug.rst dcn-overview.rst + mpo-overview.rst dc-glossary.rst diff --git a/Documentation/gpu/amdgpu/display/mpo-cursor.svg b/Documentation/gpu/amdgpu/display/mpo-cursor.svg new file mode 100644 index 000000000000..9d9de76847c3 --- /dev/null +++ b/Documentation/gpu/amdgpu/display/mpo-cursor.svg @@ -0,0 +1,435 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<!-- Created with Inkscape (http://www.inkscape.org/) --> + +<svg + xmlns:dc="http://purl.org/dc/elements/1.1/" + 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hardware in the display controller rather than using graphics or +compute shaders for composition. This can yield some power savings if it means +the graphics/compute pipelines can be put into low-power states. In summary, +MPO can bring the following benefits: + +* Decreased GPU and CPU workload - no composition shaders needed, no extra + buffer copy needed, GPU can remain idle. +* Plane independent page flips - No need to be tied to global compositor + page-flip present rate, reduced latency, independent timing. + +.. note:: Keep in mind that MPO is all about power-saving; if you want to learn + more about power-save in the display context, check the link: + `Power <https://gitlab.freedesktop.org/pq/color-and-hdr/-/blob/main/doc/power.rst>`__. + +Multiplane Overlay is only available using the DRM atomic model. The atomic +model only uses a single userspace IOCTL for configuring the display hardware +(modesetting, page-flipping, etc) - drmModeAtomicCommit. To query hardware +resources and limitations userspace also calls into drmModeGetResources which +reports back the number of planes, CRTCs, and connectors. There are three types +of DRM planes that the driver can register and work with: + +* ``DRM_PLANE_TYPE_PRIMARY``: Primary planes represent a "main" plane for a + CRTC, primary planes are the planes operated upon by CRTC modesetting and + flipping operations. +* ``DRM_PLANE_TYPE_CURSOR``: Cursor planes represent a "cursor" plane for a + CRTC. Cursor planes are the planes operated upon by the cursor IOCTLs +* ``DRM_PLANE_TYPE_OVERLAY``: Overlay planes represent all non-primary, + non-cursor planes. Some drivers refer to these types of planes as "sprites" + internally. + +To illustrate how it works, let's take a look at a device that exposes the +following planes to userspace: + +* 4 Primary planes (1 per CRTC). +* 4 Cursor planes (1 per CRTC). +* 1 Overlay plane (shared among CRTCs). + +.. note:: Keep in mind that different ASICs might expose other numbers of + planes. + +For this hardware example, we have 4 pipes (if you don't know what AMD pipe +means, look at 'Documentation/gpu/amdgpu/display/dcn-overview.rst', section +"AMD Hardware Pipeline"). Typically most AMD devices operate in a pipe-split +configuration for optimal single display output (e.g., 2 pipes per plane). + +A typical MPO configuration from userspace - 1 primary + 1 overlay on a single +display - will see 4 pipes in use, 2 per plane. + +At least 1 pipe must be used per plane (primary and overlay), so for this +hypothetical hardware that we are using as an example, we have an absolute +limit of 4 planes across all CRTCs. Atomic commits will be rejected for display +configurations using more than 4 planes. Again, it is important to stress that +every DCN has different restrictions; here, we are just trying to provide the +concept idea. + +Plane Restrictions +================== + +AMDGPU imposes restrictions on the use of DRM planes in the driver. + +Atomic commits will be rejected for commits which do not follow these +restrictions: + +* Overlay planes must be in ARGB8888 or XRGB8888 format +* Planes cannot be placed outside of the CRTC destination rectangle +* Planes cannot be downscaled more than 1/4x of their original size +* Planes cannot be upscaled more than 16x of their original size + +Not every property is available on every plane: + +* Only primary planes have color-space and non-RGB format support +* Only overlay planes have alpha blending support + +Cursor Restrictions +=================== + +Before we start to describe some restrictions around cursor and MPO, see the +below image: + +.. kernel-figure:: mpo-cursor.svg + +The image on the left side represents how DRM expects the cursor and planes to +be blended. However, AMD hardware handles cursors differently, as you can see +on the right side; basically, our cursor cannot be drawn outside its associated +plane as it is being treated as part of the plane. Another consequence of that +is that cursors inherit the color and scale from the plane. + +As a result of the above behavior, do not use legacy API to set up the cursor +plane when working with MPO; otherwise, you might encounter unexpected +behavior. + +In short, AMD HW has no dedicated cursor planes. A cursor is attached to +another plane and therefore inherits any scaling or color processing from its +parent plane. + +Use Cases +========= + +Picture-in-Picture (PIP) playback - Underlay strategy +----------------------------------------------------- + +Video playback should be done using the "primary plane as underlay" MPO +strategy. This is a 2 planes configuration: + +* 1 YUV DRM Primary Plane (e.g. NV12 Video) +* 1 RGBA DRM Overlay Plane (e.g. ARGB8888 desktop). The compositor should + prepare the framebuffers for the planes as follows: + - The overlay plane contains general desktop UI, video player controls, and video subtitles + - Primary plane contains one or more videos + +.. note:: Keep in mind that we could extend this configuration to more planes, + but that is currently not supported by our driver yet (maybe if we have a + userspace request in the future, we can change that). + +See below a single-video example: + +.. kernel-figure:: single-display-mpo.svg + +.. note:: We could extend this behavior to more planes, but that is currently + not supported by our driver. + +The video buffer should be used directly for the primary plane. The video can +be scaled and positioned for the desktop using the properties: CRTC_X, CRTC_Y, +CRTC_W, and CRTC_H. The primary plane should also have the color encoding and +color range properties set based on the source content: + +* ``COLOR_RANGE``, ``COLOR_ENCODING`` + +The overlay plane should be the native size of the CRTC. The compositor must +draw a transparent cutout for where the video should be placed on the desktop +(i.e., set the alpha to zero). The primary plane video will be visible through +the underlay. The overlay plane's buffer may remain static while the primary +plane's framebuffer is used for standard double-buffered playback. + +The compositor should create a YUV buffer matching the native size of the CRTC. +Each video buffer should be composited onto this YUV buffer for direct YUV +scanout. The primary plane should have the color encoding and color range +properties set based on the source content: ``COLOR_RANGE``, +``COLOR_ENCODING``. However, be mindful that the source color space and +encoding match for each video since it affect the entire plane. + +The overlay plane should be the native size of the CRTC. The compositor must +draw a transparent cutout for where each video should be placed on the desktop +(i.e., set the alpha to zero). The primary plane videos will be visible through +the underlay. The overlay plane's buffer may remain static while compositing +operations for video playback will be done on the video buffer. + +This kernel interface is validated using IGT GPU Tools. The following tests can +be run to validate positioning, blending, scaling under a variety of sequences +and interactions with operations such as DPMS and S3: + +- ``kms_plane@plane-panning-bottom-right-pipe-*-planes`` +- ``kms_plane@plane-panning-bottom-right-suspend-pipe-*-`` +- ``kms_plane@plane-panning-top-left-pipe-*-`` +- ``kms_plane@plane-position-covered-pipe-*-`` +- ``kms_plane@plane-position-hole-dpms-pipe-*-`` +- ``kms_plane@plane-position-hole-pipe-*-`` +- ``kms_plane_multiple@atomic-pipe-*-tiling-`` +- ``kms_plane_scaling@pipe-*-plane-scaling`` +- ``kms_plane_alpha_blend@pipe-*-alpha-basic`` +- ``kms_plane_alpha_blend@pipe-*-alpha-transparant-fb`` +- ``kms_plane_alpha_blend@pipe-*-alpha-opaque-fb`` +- ``kms_plane_alpha_blend@pipe-*-constant-alpha-min`` +- ``kms_plane_alpha_blend@pipe-*-constant-alpha-mid`` +- ``kms_plane_alpha_blend@pipe-*-constant-alpha-max`` + +Multiple Display MPO +-------------------- + +AMDGPU supports display MPO when using multiple displays; however, this feature +behavior heavily relies on the compositor implementation. Keep in mind that +usespace can define different policies. For example, some OSes can use MPO to +protect the plane that handles the video playback; notice that we don't have +many limitations for a single display. Nonetheless, this manipulation can have +many more restrictions for a multi-display scenario. The below example shows a +video playback in the middle of two displays, and it is up to the compositor to +define a policy on how to handle it: + +.. kernel-figure:: multi-display-hdcp-mpo.svg + +Let's discuss some of the hardware limitations we have when dealing with +multi-display with MPO. + +Limitations +~~~~~~~~~~~ + +For simplicity's sake, for discussing the hardware limitation, this +documentation supposes an example where we have two displays and video playback +that will be moved around different displays. + +* **Hardware limitations** + +From the DCN overview page, each display requires at least one pipe and each +MPO plane needs another pipe. As a result, when the video is in the middle of +the two displays, we need to use 2 pipes. See the example below where we avoid +pipe split: + +- 1 display (1 pipe) + MPO (1 pipe), we will use two pipes +- 2 displays (2 pipes) + MPO (1-2 pipes); we will use 4 pipes. MPO in the + middle of both displays needs 2 pipes. +- 3 Displays (3 pipes) + MPO (1-2 pipes), we need 5 pipes. + +If we use MPO with multiple displays, the userspace has to decide to enable +multiple MPO by the price of limiting the number of external displays supported +or disable it in favor of multiple displays; it is a policy decision. For +example: + +* When ASIC has 3 pipes, AMD hardware can NOT support 2 displays with MPO +* When ASIC has 4 pipes, AMD hardware can NOT support 3 displays with MPO + +Let's briefly explore how userspace can handle these two display configurations +on an ASIC that only supports three pipes. We can have: + +.. kernel-figure:: multi-display-hdcp-mpo-less-pipe-ex.svg + +- Total pipes are 3 +- User lights up 2 displays (2 out of 3 pipes are used) +- User launches video (1 pipe used for MPO) +- Now, if the user moves the video in the middle of 2 displays, one part of the + video won't be MPO since we have used 3/3 pipes. + +* **Scaling limitation** + +MPO cannot handle scaling less than 0.25 and more than x16. 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e3d6b2fa2493..1800543d45f7 100644 --- a/Documentation/gpu/amdgpu/driver-misc.rst +++ b/Documentation/gpu/amdgpu/driver-misc.rst @@ -32,6 +32,23 @@ unique_id .. kernel-doc:: drivers/gpu/drm/amd/pm/amdgpu_pm.c :doc: unique_id +Accelerated Processing Units (APU) Info +--------------------------------------- + +.. csv-table:: + :header-rows: 1 + :widths: 3, 2, 2, 1, 1, 1 + :file: ./apu-asic-info-table.csv + +Discrete GPU Info +----------------- + +.. csv-table:: + :header-rows: 1 + :widths: 3, 2, 2, 1, 1, 1 + :file: ./dgpu-asic-info-table.csv + + GPU Memory Usage Information ============================ diff --git a/Documentation/gpu/amdgpu/thermal.rst b/Documentation/gpu/amdgpu/thermal.rst index 997231b6adcf..5e27e4eb3959 100644 --- a/Documentation/gpu/amdgpu/thermal.rst +++ b/Documentation/gpu/amdgpu/thermal.rst @@ -72,7 +72,8 @@ card's RLC (RunList Controller) firmware powers off the gfx engine dynamically when there is no workload on gfx or compute pipes. GFXOFF is on by default on supported GPUs. -Userspace can interact with GFXOFF through a debugfs interface: +Userspace can interact with GFXOFF through a debugfs interface (all values in +`uint32_t`, unless otherwise noted): ``amdgpu_gfxoff`` ----------------- @@ -104,3 +105,18 @@ Read it to check current GFXOFF's status of a GPU:: If GFXOFF is enabled, the value will be transitioning around [0, 3], always getting into 0 when possible. When it's disabled, it's always at 2. Returns ``-EINVAL`` if it's not supported. + +``amdgpu_gfxoff_count`` +----------------------- + +Read it to get the total GFXOFF entry count at the time of query since system +power-up. The value is an `uint64_t` type, however, due to firmware limitations, +it can currently overflow as an `uint32_t`. *Only supported in vangogh* + +``amdgpu_gfxoff_residency`` +--------------------------- + +Write 1 to amdgpu_gfxoff_residency to start logging, and 0 to stop. Read it to +get average GFXOFF residency % multiplied by 100 during the last logging +interval. E.g. a value of 7854 means 78.54% of the time in the last logging +interval the GPU was in GFXOFF mode. *Only supported in vangogh* diff --git a/Documentation/gpu/drm-kms-helpers.rst b/Documentation/gpu/drm-kms-helpers.rst index 2d473bc64c9f..dbc85fd7a971 100644 --- a/Documentation/gpu/drm-kms-helpers.rst +++ b/Documentation/gpu/drm-kms-helpers.rst @@ -122,13 +122,13 @@ format Helper Functions Reference .. kernel-doc:: drivers/gpu/drm/drm_format_helper.c :export: -Framebuffer CMA Helper Functions Reference +Framebuffer DMA Helper Functions Reference ========================================== -.. kernel-doc:: drivers/gpu/drm/drm_fb_cma_helper.c - :doc: framebuffer cma helper functions +.. kernel-doc:: drivers/gpu/drm/drm_fb_dma_helper.c + :doc: framebuffer dma helper functions -.. kernel-doc:: drivers/gpu/drm/drm_fb_cma_helper.c +.. kernel-doc:: drivers/gpu/drm/drm_fb_dma_helper.c :export: Framebuffer GEM Helper Reference diff --git a/Documentation/gpu/drm-kms.rst b/Documentation/gpu/drm-kms.rst index 6f9c064fd323..b4377a545425 100644 --- a/Documentation/gpu/drm-kms.rst +++ b/Documentation/gpu/drm-kms.rst @@ -532,6 +532,8 @@ Standard Plane Properties .. kernel-doc:: drivers/gpu/drm/drm_plane.c :doc: standard plane properties +.. _plane_composition_properties: + Plane Composition Properties ---------------------------- diff --git a/Documentation/gpu/drm-mm.rst b/Documentation/gpu/drm-mm.rst index f32ccce5722d..a79fd3549ff8 100644 --- a/Documentation/gpu/drm-mm.rst +++ b/Documentation/gpu/drm-mm.rst @@ -300,12 +300,12 @@ Drivers that want to map the GEM object upfront instead of handling page faults can implement their own mmap file operation handler. For platforms without MMU the GEM core provides a helper method -drm_gem_cma_get_unmapped_area(). The mmap() routines will call this to get a +drm_gem_dma_get_unmapped_area(). The mmap() routines will call this to get a proposed address for the mapping. -To use drm_gem_cma_get_unmapped_area(), drivers must fill the struct +To use drm_gem_dma_get_unmapped_area(), drivers must fill the struct :c:type:`struct file_operations <file_operations>` get_unmapped_area field with -a pointer on drm_gem_cma_get_unmapped_area(). +a pointer on drm_gem_dma_get_unmapped_area(). More detailed information about get_unmapped_area can be found in Documentation/admin-guide/mm/nommu-mmap.rst @@ -355,16 +355,16 @@ GEM Function Reference .. kernel-doc:: drivers/gpu/drm/drm_gem.c :export: -GEM CMA Helper Functions Reference +GEM DMA Helper Functions Reference ---------------------------------- -.. kernel-doc:: drivers/gpu/drm/drm_gem_cma_helper.c - :doc: cma helpers +.. kernel-doc:: drivers/gpu/drm/drm_gem_dma_helper.c + :doc: dma helpers -.. kernel-doc:: include/drm/drm_gem_cma_helper.h +.. kernel-doc:: include/drm/drm_gem_dma_helper.h :internal: -.. kernel-doc:: drivers/gpu/drm/drm_gem_cma_helper.c +.. kernel-doc:: drivers/gpu/drm/drm_gem_dma_helper.c :export: GEM SHMEM Helper Function Reference diff --git a/Documentation/gpu/todo.rst b/Documentation/gpu/todo.rst index 513b20ccef1e..393d218e4a0c 100644 --- a/Documentation/gpu/todo.rst +++ b/Documentation/gpu/todo.rst @@ -322,18 +322,6 @@ Contact: Daniel Vetter, Noralf Tronnes Level: Advanced -idr_init_base() ---------------- - -DRM core&drivers uses a lot of idr (integer lookup directories) for mapping -userspace IDs to internal objects, and in most places ID=0 means NULL and hence -is never used. Switching to idr_init_base() for these would make the idr more -efficient. - -Contact: Daniel Vetter - -Level: Starter - struct drm_gem_object_funcs --------------------------- @@ -343,19 +331,6 @@ converted, except for struct drm_driver.gem_prime_mmap. Level: Intermediate -Rename CMA helpers to DMA helpers ---------------------------------- - -CMA (standing for contiguous memory allocator) is really a bit an accident of -what these were used for first, a much better name would be DMA helpers. In the -text these should even be called coherent DMA memory helpers (so maybe CDM, but -no one knows what that means) since underneath they just use dma_alloc_coherent. - -Contact: Laurent Pinchart, Daniel Vetter - -Level: Intermediate (mostly because it is a huge tasks without good partial -milestones, not technically itself that challenging) - connector register/unregister fixes ----------------------------------- @@ -617,17 +592,6 @@ Contact: Javier Martinez Canillas <javierm@redhat.com> Level: Intermediate -Convert Kernel Selftests (kselftest) to KUnit tests when appropriate --------------------------------------------------------------------- - -Many of the `Kselftest <https://www.kernel.org/doc/html/latest/dev-tools/kselftest.html>`_ -tests in DRM could be converted to Kunit tests instead, since that framework -is more suitable for unit testing. - -Contact: Javier Martinez Canillas <javierm@redhat.com> - -Level: Starter - Enable trinity for DRM ---------------------- @@ -715,6 +679,74 @@ Contact: Sam Ravnborg Level: Advanced +Brightness handling on devices with multiple internal panels +============================================================ + +On x86/ACPI devices there can be multiple backlight firmware interfaces: +(ACPI) video, vendor specific and others. As well as direct/native (PWM) +register programming by the KMS driver. + +To deal with this backlight drivers used on x86/ACPI call +acpi_video_get_backlight_type() which has heuristics (+quirks) to select +which backlight interface to use; and backlight drivers which do not match +the returned type will not register themselves, so that only one backlight +device gets registered (in a single GPU setup, see below). + +At the moment this more or less assumes that there will only +be 1 (internal) panel on a system. + +On systems with 2 panels this may be a problem, depending on +what interface acpi_video_get_backlight_type() selects: + +1. native: in this case the KMS driver is expected to know which backlight + device belongs to which output so everything should just work. +2. video: this does support controlling multiple backlights, but some work + will need to be done to get the output <-> backlight device mapping + +The above assumes both panels will require the same backlight interface type. +Things will break on systems with multiple panels where the 2 panels need +a different type of control. E.g. one panel needs ACPI video backlight control, +where as the other is using native backlight control. Currently in this case +only one of the 2 required backlight devices will get registered, based on +the acpi_video_get_backlight_type() return value. + +If this (theoretical) case ever shows up, then supporting this will need some +work. A possible solution here would be to pass a device and connector-name +to acpi_video_get_backlight_type() so that it can deal with this. + +Note in a way we already have a case where userspace sees 2 panels, +in dual GPU laptop setups with a mux. On those systems we may see +either 2 native backlight devices; or 2 native backlight devices. + +Userspace already has code to deal with this by detecting if the related +panel is active (iow which way the mux between the GPU and the panels +points) and then uses that backlight device. Userspace here very much +assumes a single panel though. It picks only 1 of the 2 backlight devices +and then only uses that one. + +Note that all userspace code (that I know off) is currently hardcoded +to assume a single panel. + +Before the recent changes to not register multiple (e.g. video + native) +/sys/class/backlight devices for a single panel (on a single GPU laptop), +userspace would see multiple backlight devices all controlling the same +backlight. + +To deal with this userspace had to always picks one preferred device under +/sys/class/backlight and will ignore the others. So to support brightness +control on multiple panels userspace will need to be updated too. + +There are plans to allow brightness control through the KMS API by adding +a "display brightness" property to drm_connector objects for panels. This +solves a number of issues with the /sys/class/backlight API, including not +being able to map a sysfs backlight device to a specific connector. Any +userspace changes to add support for brightness control on devices with +multiple panels really should build on top of this new KMS property. + +Contact: Hans de Goede + +Level: Advanced + Outside DRM =========== diff --git a/Documentation/gpu/vkms.rst b/Documentation/gpu/vkms.rst index 973e2d43108b..49db221c0f52 100644 --- a/Documentation/gpu/vkms.rst +++ b/Documentation/gpu/vkms.rst @@ -118,15 +118,10 @@ Add Plane Features There's lots of plane features we could add support for: -- Clearing primary plane: clear primary plane before plane composition (at the - start) for correctness of pixel blend ops. It also guarantees alpha channel - is cleared in the target buffer for stable crc. [Good to get started] - - ARGB format on primary plane: blend the primary plane into background with translucent alpha. -- Support when the primary plane isn't exactly matching the output size: blend - the primary plane into the black background. +- Add background color KMS property[Good to get started]. - Full alpha blending on all planes. diff --git a/Documentation/hwmon/aquacomputer_d5next.rst b/Documentation/hwmon/aquacomputer_d5next.rst index 33649a1e3a05..e238533b5fe0 100644 --- a/Documentation/hwmon/aquacomputer_d5next.rst +++ b/Documentation/hwmon/aquacomputer_d5next.rst @@ -10,6 +10,7 @@ Supported devices: * Aquacomputer Farbwerk 360 RGB controller * Aquacomputer Octo fan controller * Aquacomputer Quadro fan controller +* Aquacomputer High Flow Next sensor Author: Aleksa Savic @@ -20,10 +21,11 @@ This driver exposes hardware sensors of listed Aquacomputer devices, which communicate through proprietary USB HID protocols. For the D5 Next pump, available sensors are pump and fan speed, power, voltage -and current, as well as coolant temperature. Also available through debugfs are -the serial number, firmware version and power-on count. Attaching a fan to it is -optional and allows it to be controlled using temperature curves directly from the -pump. If it's not connected, the fan-related sensors will report zeroes. +and current, as well as coolant temperature and eight virtual temp sensors. Also +available through debugfs are the serial number, firmware version and power-on +count. Attaching a fan to it is optional and allows it to be controlled using +temperature curves directly from the pump. If it's not connected, the fan-related +sensors will report zeroes. The pump can be configured either through software or via its physical interface. Configuring the pump through this driver is not implemented, as it @@ -31,14 +33,23 @@ seems to require sending it a complete configuration. That includes addressable RGB LEDs, for which there is no standard sysfs interface. Thus, that task is better suited for userspace tools. -The Octo exposes four temperature sensors and eight PWM controllable fans, along -with their speed (in RPM), power, voltage and current. +The Octo exposes four physical and sixteen virtual temperature sensors, as well as +eight PWM controllable fans, along with their speed (in RPM), power, voltage and +current. -The Quadro exposes four temperature sensors, a flow sensor and four PWM controllable -fans, along with their speed (in RPM), power, voltage and current. +The Quadro exposes four physical and sixteen virtual temperature sensors, a flow +sensor and four PWM controllable fans, along with their speed (in RPM), power, +voltage and current. -The Farbwerk and Farbwerk 360 expose four temperature sensors. Depending on the device, -not all sysfs and debugfs entries will be available. +The Farbwerk and Farbwerk 360 expose four temperature sensors. Additionally, +sixteen virtual temperature sensors of the Farbwerk 360 are exposed. + +The High Flow Next exposes +5V voltages, water quality, conductivity and flow readings. +A temperature sensor can be connected to it, in which case it provides its reading +and an estimation of the dissipated/absorbed power in the liquid cooling loop. + +Depending on the device, not all sysfs and debugfs entries will be available. +Writing to virtual temperature sensors is not currently supported. Usage notes ----------- @@ -49,14 +60,14 @@ the kernel and supports hotswapping. Sysfs entries ------------- -================ ============================================== -temp[1-4]_input Temperature sensors (in millidegrees Celsius) +================ ============================================================== +temp[1-20]_input Physical/virtual temperature sensors (in millidegrees Celsius) fan[1-8]_input Pump/fan speed (in RPM) / Flow speed (in dL/h) power[1-8]_input Pump/fan power (in micro Watts) in[0-7]_input Pump/fan voltage (in milli Volts) curr[1-8]_input Pump/fan current (in milli Amperes) pwm[1-8] Fan PWM (0 - 255) -================ ============================================== +================ ============================================================== Debugfs entries --------------- diff --git a/Documentation/hwmon/asus_wmi_ec_sensors.rst b/Documentation/hwmon/asus_wmi_ec_sensors.rst deleted file mode 100644 index 1b287f229e86..000000000000 --- a/Documentation/hwmon/asus_wmi_ec_sensors.rst +++ /dev/null @@ -1,38 +0,0 @@ -.. SPDX-License-Identifier: GPL-2.0-or-later - -Kernel driver asus_wmi_ec_sensors -================================= - -Supported boards: - * PRIME X570-PRO, - * Pro WS X570-ACE, - * ROG CROSSHAIR VIII DARK HERO, - * ROG CROSSHAIR VIII FORMULA, - * ROG CROSSHAIR VIII HERO, - * ROG STRIX B550-E GAMING, - * ROG STRIX B550-I GAMING, - * ROG STRIX X570-E GAMING. - -Authors: - - Eugene Shalygin <eugene.shalygin@gmail.com> - -Description: ------------- -ASUS mainboards publish hardware monitoring information via Super I/O -chip and the ACPI embedded controller (EC) registers. Some of the sensors -are only available via the EC. - -ASUS WMI interface provides a method (BREC) to read data from EC registers, -which is utilized by this driver to publish those sensor readings to the -HWMON system. The driver is aware of and reads the following sensors: - -1. Chipset (PCH) temperature -2. CPU package temperature -3. Motherboard temperature -4. Readings from the T_Sensor header -5. VRM temperature -6. CPU_Opt fan RPM -7. Chipset fan RPM -8. Readings from the "Water flow meter" header (RPM) -9. Readings from the "Water In" and "Water Out" temperature headers -10. CPU current diff --git a/Documentation/hwmon/corsair-psu.rst b/Documentation/hwmon/corsair-psu.rst index e8378e7a1d8c..3c1b164eb3c0 100644 --- a/Documentation/hwmon/corsair-psu.rst +++ b/Documentation/hwmon/corsair-psu.rst @@ -15,7 +15,7 @@ Supported devices: Corsair HX850i - Corsair HX1000i + Corsair HX1000i (revision 1 and 2) Corsair HX1200i @@ -86,8 +86,9 @@ Debugfs entries --------------- ======================= ======================================================== -uptime Current uptime of the psu +ocpmode Single or multi rail mode of the PCIe power connectors +product Product name of the psu +uptime Session uptime of the psu uptime_total Total uptime of the psu vendor Vendor name of the psu -product Product name of the psu ======================= ======================================================== diff --git a/Documentation/hwmon/emc2305.rst b/Documentation/hwmon/emc2305.rst new file mode 100644 index 000000000000..2403dbaf2728 --- /dev/null +++ b/Documentation/hwmon/emc2305.rst @@ -0,0 +1,37 @@ +.. SPDX-License-Identifier: GPL-2.0 + +Kernel driver emc2305 +===================== + +Supported chips: + Microchip EMC2305, EMC2303, EMC2302, EMC2301 + + Addresses scanned: I2C 0x27, 0x2c, 0x2d, 0x2e, 0x2f, 0x4c, 0x4d + Prefixes: 'emc2305' + + Datasheet: Publicly available at the Microchip website : + https://www.microchip.com/en-us/product/EMC2305 + +Description: +------------ +This driver implements support for Microchip EMC2301/2/3/5 RPM-based PWM Fan Controller. +The EMC2305 Fan Controller supports up to 5 independently controlled PWM fan drives. +Fan rotation speeds are reported in RPM. +The driver supports the RPM-based PWM control to keep a fan at the desired speed. +The driver provides the possibility to have one common PWM interface for all FANs +or up to the maximum available or configured independent PWMs. + +The driver provides the following sysfs interfaces in hwmon subsystem: + +================= == =================================================== +fan[1-5]_fault RO files for tachometers TACH1-TACH5 fault indication +fan[1-5]_input RO files for tachometers TACH1-TACH5 input (in RPM) +pwm[1-5] RW file for fan[1-5] target duty cycle (0..255) +================= == =================================================== + +sysfs interfaces in thermal subsystem: + +================= == ======================================================================== +cur_state RW file for the current cooling state of the cooling device (0..max_state) +max_state RO file for the maximum cooling state of the cooling device +================= == ======================================================================== diff --git a/Documentation/hwmon/index.rst b/Documentation/hwmon/index.rst index f7113b0f8b2a..c1d11cf13eef 100644 --- a/Documentation/hwmon/index.rst +++ b/Documentation/hwmon/index.rst @@ -44,7 +44,6 @@ Hardware Monitoring Kernel Drivers asc7621 aspeed-pwm-tacho asus_ec_sensors - asus_wmi_ec_sensors asus_wmi_sensors bcm54140 bel-pfe @@ -63,6 +62,7 @@ Hardware Monitoring Kernel Drivers ds620 emc1403 emc2103 + emc2305 emc6w201 f71805f f71882fg @@ -133,6 +133,7 @@ Hardware Monitoring Kernel Drivers max20751 max31722 max31730 + max31760 max31785 max31790 max34440 @@ -205,6 +206,7 @@ Hardware Monitoring Kernel Drivers tps23861 tps40422 tps53679 + tps546d24 twl4030-madc-hwmon ucd9000 ucd9200 diff --git a/Documentation/hwmon/max31760.rst b/Documentation/hwmon/max31760.rst new file mode 100644 index 000000000000..b1b55fb843c1 --- /dev/null +++ b/Documentation/hwmon/max31760.rst @@ -0,0 +1,77 @@ +.. SPDX-License-Identifier: GPL-2.0-or-later + +Kernel driver max31760 +====================== + +Supported chips: + * Analog Devices MAX31760 + + Prefix: 'max31760' + + Addresses scanned: none + + Datasheet: https://datasheets.maximintegrated.com/en/ds/MAX31760.pdf + + +Author: Ibrahim Tilki <Ibrahim.Tilki@analog.com> + +Description +----------- + +The MAX31760 integrates temperature sensing along with precision PWM fan +control. It accurately measures its local die temperature and the remote +temperature of a discrete diode-connected transistor, such as a 2N3906, +or a thermal diode commonly found on CPUs, graphics processor units (GPUs), +and other ASICs. Multiple temperature thresholds, such as local +high/overtemperature (OT) and remote high/overtemperature, can be set by an +I2C-compatible interface. Fan speed is controlled based on the temperature +reading as an index to a 48-byte lookup table (LUT) containing +user-programmed PWM values. The flexible LUT-based architecture enables +the user to program a smooth nonlinear fan speed vs. temperature transfer +function to minimize acoustic fan noise. Two tachometer inputs allow +measuring the speeds of two fans independently. When the local or remote +OT threshold is exceeded, the SHDN pin is asserted low and can be used to +shut down the system. A dedicated ALERT pin reports that either a local or +remote high-temperature threshold has been exceeded. + +Temperature measurement range: from -55°C to 125°C + +Temperature Resolution: 11 Bits, ±0.125°C + +Please refer how to instantiate this driver: Documentation/i2c/instantiating-devices.rst + +Lookup table for auto fan control +--------------------------------- + +========= ================================= +LUT Index Name +========= ================================= +1 PWM value for T < +18°C +2 PWM value for +18°C ≤ T < +20°C +3 PWM value for +20°C ≤ T < +22°C +... ... +47 PWM value for +108°C ≤ T < +110°C +48 PWM value for T ≥ +110°C +========= ================================= + +Sysfs entries +------------- + +=============================== ================================================================================= +fan[1-2]_input Fan speed (in RPM) +fan[1-2]_enable Enable fan readings and fan fault alarms +fan[1-2]_fault Fan fault status +temp[1-2]_label "Remote" and "Local" temperature channel labels +temp[1-2]_input Temperature sensor readings (in millidegrees Celsius) +temp1_fault Remote temperature sensor fault status +temp[1-2]_max Temperature max value. Asserts "ALERT" pin when exceeded +temp[1-2]_max_alarm Temperature max alarm status +temp[1-2]_crit Temperature critical value. Asserts "SHDN" pin when exceeded +temp[1-2]_crit_alarm Temperature critical alarm status +pwm1 PWM value for direct fan control +pwm1_enable 1: direct fan control, 2: temperature based auto fan control +pwm1_freq PWM frequency in hertz +pwm1_auto_channels_temp Temperature source for auto fan control. 1: temp1, 2: temp2, 3: max(temp1, temp2) +pwm1_auto_point[1-48]_pwm PWM value for LUT point +pwm1_auto_point_temp_hyst Temperature hysteresis for auto fan control. Can be either 2000mC or 4000mC +=============================== ================================================================================= diff --git a/Documentation/hwmon/max31790.rst b/Documentation/hwmon/max31790.rst index 7b097c3b9b90..33c5c7330efc 100644 --- a/Documentation/hwmon/max31790.rst +++ b/Documentation/hwmon/max31790.rst @@ -38,6 +38,7 @@ Sysfs entries fan[1-12]_input RO fan tachometer speed in RPM fan[1-12]_fault RO fan experienced fault fan[1-6]_target RW desired fan speed in RPM +fan[1-6]_enable RW enable or disable the tachometer input pwm[1-6]_enable RW regulator mode, 0=disabled (duty cycle=0%), 1=manual mode, 2=rpm mode pwm[1-6] RW read: current pwm duty cycle, write: target pwm duty cycle (0-255) diff --git a/Documentation/hwmon/pwm-fan.rst b/Documentation/hwmon/pwm-fan.rst index 82fe96742fee..f77998b204ef 100644 --- a/Documentation/hwmon/pwm-fan.rst +++ b/Documentation/hwmon/pwm-fan.rst @@ -18,3 +18,15 @@ the hwmon's sysfs interface. The fan rotation speed returned via the optional 'fan1_input' is extrapolated from the sampled interrupts from the tachometer signal within 1 second. + +The driver provides the following sensor accesses in sysfs: + +=============== ======= ======================================================= +fan1_input ro fan tachometer speed in RPM +pwm1_enable rw keep enable mode, defines behaviour when pwm1=0 + 0 -> disable pwm and regulator + 1 -> enable pwm; if pwm==0, disable pwm, keep regulator enabled + 2 -> enable pwm; if pwm==0, keep pwm and regulator enabled + 3 -> enable pwm; if pwm==0, disable pwm and regulator +pwm1 rw relative speed (0-255), 255=max. speed. +=============== ======= ======================================================= diff --git a/Documentation/hwmon/tps546d24.rst b/Documentation/hwmon/tps546d24.rst new file mode 100644 index 000000000000..97adb8a30fc0 --- /dev/null +++ b/Documentation/hwmon/tps546d24.rst @@ -0,0 +1,35 @@ +.. SPDX-License-Identifier: GPL-2.0-only + +Kernel driver tps546d24 +======================= + +Supported chips: + + * TI TPS546D24 + + Prefix: 'tps546d24' + + Addresses scanned: - + + Datasheet: https://www.ti.com/lit/gpn/tps546d24 + +Author: Duke Du <dukedu83@gmail.com> + + +Description +----------- + +The TPS546D24A is a highly integrated, non-isolated DC/DC converter capable +of high frequency operation and 40-A current output from a 7-mm x 5-mm +package. + +Two, three, and four TPS546D24A devices can be interconnected +to provide up to 160 A on a single output. The device has an option to +overdrive the internal 5-V LDO with an external 5-V supply via the VDD5 +pin to improve efficiency and reduce power dissipation of the converter. + + +Platform data support +--------------------- + +The driver supports standard PMBus driver platform data. diff --git a/Documentation/i2c/busses/i2c-piix4.rst b/Documentation/i2c/busses/i2c-piix4.rst index cc9000259223..07fe6f6f4b18 100644 --- a/Documentation/i2c/busses/i2c-piix4.rst +++ b/Documentation/i2c/busses/i2c-piix4.rst @@ -64,7 +64,7 @@ correct address for this module, you could get in big trouble (read: crashes, data corruption, etc.). Try this only as a last resort (try BIOS updates first, for example), and backup first! An even more dangerous option is 'force_addr=<IOPORT>'. This will not only enable the PIIX4 like -'force' foes, but it will also set a new base I/O port address. The SMBus +'force' does, but it will also set a new base I/O port address. The SMBus parts of the PIIX4 needs a range of 8 of these addresses to function correctly. If these addresses are already reserved by some other device, you will get into big trouble! DON'T USE THIS IF YOU ARE NOT VERY SURE @@ -86,15 +86,15 @@ If you own Force CPCI735 motherboard or other OSB4 based systems you may need to change the SMBus Interrupt Select register so the SMBus controller uses the SMI mode. -1) Use lspci command and locate the PCI device with the SMBus controller: +1) Use ``lspci`` command and locate the PCI device with the SMBus controller: 00:0f.0 ISA bridge: ServerWorks OSB4 South Bridge (rev 4f) The line may vary for different chipsets. Please consult the driver source - for all possible PCI ids (and lspci -n to match them). Lets assume the + for all possible PCI ids (and ``lspci -n`` to match them). Let's assume the device is located at 00:0f.0. 2) Now you just need to change the value in 0xD2 register. Get it first with - command: lspci -xxx -s 00:0f.0 + command: ``lspci -xxx -s 00:0f.0`` If the value is 0x3 then you need to change it to 0x1: - setpci -s 00:0f.0 d2.b=1 + ``setpci -s 00:0f.0 d2.b=1`` Please note that you don't need to do that in all cases, just when the SMBus is not working properly. @@ -109,6 +109,3 @@ which can easily get corrupted due to a state machine bug. These are mostly Thinkpad laptops, but desktop systems may also be affected. We have no list of all affected systems, so the only safe solution was to prevent access to the SMBus on all IBM systems (detected using DMI data.) - -For additional information, read: -http://www.lm-sensors.org/browser/lm-sensors/trunk/README diff --git a/Documentation/i2c/dev-interface.rst b/Documentation/i2c/dev-interface.rst index 73ad34849f99..c277a8e1202b 100644 --- a/Documentation/i2c/dev-interface.rst +++ b/Documentation/i2c/dev-interface.rst @@ -148,7 +148,7 @@ You can do plain I2C transactions by using read(2) and write(2) calls. You do not need to pass the address byte; instead, set it through ioctl I2C_SLAVE before you try to access the device. -You can do SMBus level transactions (see documentation file smbus-protocol +You can do SMBus level transactions (see documentation file smbus-protocol.rst for details) through the following functions:: __s32 i2c_smbus_write_quick(int file, __u8 value); diff --git a/Documentation/i2c/i2c-topology.rst b/Documentation/i2c/i2c-topology.rst index 7cb53819778e..48fce0f7491b 100644 --- a/Documentation/i2c/i2c-topology.rst +++ b/Documentation/i2c/i2c-topology.rst @@ -5,6 +5,8 @@ I2C muxes and complex topologies There are a couple of reasons for building more complex I2C topologies than a straight-forward I2C bus with one adapter and one or more devices. +Some example use cases are: + 1. A mux may be needed on the bus to prevent address collisions. 2. The bus may be accessible from some external bus master, and arbitration @@ -14,10 +16,10 @@ than a straight-forward I2C bus with one adapter and one or more devices. from the I2C bus, at least most of the time, and sits behind a gate that has to be operated before the device can be accessed. -Etc -=== +Several types of hardware components such as I2C muxes, I2C gates and I2C +arbitrators allow to handle such needs. -These constructs are represented as I2C adapter trees by Linux, where +These components are represented as I2C adapter trees by Linux, where each adapter has a parent adapter (except the root adapter) and zero or more child adapters. The root adapter is the actual adapter that issues I2C transfers, and all adapters with a parent are part of an "i2c-mux" @@ -35,46 +37,7 @@ Locking ======= There are two variants of locking available to I2C muxes, they can be -mux-locked or parent-locked muxes. As is evident from below, it can be -useful to know if a mux is mux-locked or if it is parent-locked. The -following list was correct at the time of writing: - -In drivers/i2c/muxes/: - -====================== ============================================= -i2c-arb-gpio-challenge Parent-locked -i2c-mux-gpio Normally parent-locked, mux-locked iff - all involved gpio pins are controlled by the - same I2C root adapter that they mux. -i2c-mux-gpmux Normally parent-locked, mux-locked iff - specified in device-tree. -i2c-mux-ltc4306 Mux-locked -i2c-mux-mlxcpld Parent-locked -i2c-mux-pca9541 Parent-locked -i2c-mux-pca954x Parent-locked -i2c-mux-pinctrl Normally parent-locked, mux-locked iff - all involved pinctrl devices are controlled - by the same I2C root adapter that they mux. -i2c-mux-reg Parent-locked -====================== ============================================= - -In drivers/iio/: - -====================== ============================================= -gyro/mpu3050 Mux-locked -imu/inv_mpu6050/ Mux-locked -====================== ============================================= - -In drivers/media/: - -======================= ============================================= -dvb-frontends/lgdt3306a Mux-locked -dvb-frontends/m88ds3103 Parent-locked -dvb-frontends/rtl2830 Parent-locked -dvb-frontends/rtl2832 Mux-locked -dvb-frontends/si2168 Mux-locked -usb/cx231xx/ Parent-locked -======================= ============================================= +mux-locked or parent-locked muxes. Mux-locked muxes @@ -89,40 +52,8 @@ full transaction, unrelated I2C transfers may interleave the different stages of the transaction. This has the benefit that the mux driver may be easier and cleaner to implement, but it has some caveats. -==== ===================================================================== -ML1. If you build a topology with a mux-locked mux being the parent - of a parent-locked mux, this might break the expectation from the - parent-locked mux that the root adapter is locked during the - transaction. - -ML2. It is not safe to build arbitrary topologies with two (or more) - mux-locked muxes that are not siblings, when there are address - collisions between the devices on the child adapters of these - non-sibling muxes. - - I.e. the select-transfer-deselect transaction targeting e.g. device - address 0x42 behind mux-one may be interleaved with a similar - operation targeting device address 0x42 behind mux-two. The - intension with such a topology would in this hypothetical example - be that mux-one and mux-two should not be selected simultaneously, - but mux-locked muxes do not guarantee that in all topologies. - -ML3. A mux-locked mux cannot be used by a driver for auto-closing - gates/muxes, i.e. something that closes automatically after a given - number (one, in most cases) of I2C transfers. Unrelated I2C transfers - may creep in and close prematurely. - -ML4. If any non-I2C operation in the mux driver changes the I2C mux state, - the driver has to lock the root adapter during that operation. - Otherwise garbage may appear on the bus as seen from devices - behind the mux, when an unrelated I2C transfer is in flight during - the non-I2C mux-changing operation. -==== ===================================================================== - - Mux-locked Example ------------------- - +~~~~~~~~~~~~~~~~~~ :: @@ -153,6 +84,43 @@ This means that accesses to D2 are lockout out for the full duration of the entire operation. But accesses to D3 are possibly interleaved at any point. +Mux-locked caveats +~~~~~~~~~~~~~~~~~~ + +When using a mux-locked mux, be aware of the following restrictions: + +[ML1] + If you build a topology with a mux-locked mux being the parent + of a parent-locked mux, this might break the expectation from the + parent-locked mux that the root adapter is locked during the + transaction. + +[ML2] + It is not safe to build arbitrary topologies with two (or more) + mux-locked muxes that are not siblings, when there are address + collisions between the devices on the child adapters of these + non-sibling muxes. + + I.e. the select-transfer-deselect transaction targeting e.g. device + address 0x42 behind mux-one may be interleaved with a similar + operation targeting device address 0x42 behind mux-two. The + intent with such a topology would in this hypothetical example + be that mux-one and mux-two should not be selected simultaneously, + but mux-locked muxes do not guarantee that in all topologies. + +[ML3] + A mux-locked mux cannot be used by a driver for auto-closing + gates/muxes, i.e. something that closes automatically after a given + number (one, in most cases) of I2C transfers. Unrelated I2C transfers + may creep in and close prematurely. + +[ML4] + If any non-I2C operation in the mux driver changes the I2C mux state, + the driver has to lock the root adapter during that operation. + Otherwise garbage may appear on the bus as seen from devices + behind the mux, when an unrelated I2C transfer is in flight during + the non-I2C mux-changing operation. + Parent-locked muxes ------------------- @@ -161,28 +129,10 @@ Parent-locked muxes lock the parent adapter during the full select- transfer-deselect transaction. The implication is that the mux driver has to ensure that any and all I2C transfers through that parent adapter during the transaction are unlocked I2C transfers (using e.g. -__i2c_transfer), or a deadlock will follow. There are a couple of -caveats. - -==== ==================================================================== -PL1. If you build a topology with a parent-locked mux being the child - of another mux, this might break a possible assumption from the - child mux that the root adapter is unused between its select op - and the actual transfer (e.g. if the child mux is auto-closing - and the parent mux issues I2C transfers as part of its select). - This is especially the case if the parent mux is mux-locked, but - it may also happen if the parent mux is parent-locked. - -PL2. If select/deselect calls out to other subsystems such as gpio, - pinctrl, regmap or iio, it is essential that any I2C transfers - caused by these subsystems are unlocked. This can be convoluted to - accomplish, maybe even impossible if an acceptably clean solution - is sought. -==== ==================================================================== - +__i2c_transfer), or a deadlock will follow. Parent-locked Example ---------------------- +~~~~~~~~~~~~~~~~~~~~~ :: @@ -212,10 +162,30 @@ When there is an access to D1, this happens: 9. M1 unlocks its parent adapter. 10. M1 unlocks muxes on its parent. - This means that accesses to both D2 and D3 are locked out for the full duration of the entire operation. +Parent-locked Caveats +~~~~~~~~~~~~~~~~~~~~~ + +When using a parent-locked mux, be aware of the following restrictions: + +[PL1] + If you build a topology with a parent-locked mux being the child + of another mux, this might break a possible assumption from the + child mux that the root adapter is unused between its select op + and the actual transfer (e.g. if the child mux is auto-closing + and the parent mux issues I2C transfers as part of its select). + This is especially the case if the parent mux is mux-locked, but + it may also happen if the parent mux is parent-locked. + +[PL2] + If select/deselect calls out to other subsystems such as gpio, + pinctrl, regmap or iio, it is essential that any I2C transfers + caused by these subsystems are unlocked. This can be convoluted to + accomplish, maybe even impossible if an acceptably clean solution + is sought. + Complex Examples ================ @@ -261,8 +231,10 @@ This is a good topology:: When device D1 is accessed, accesses to D2 are locked out for the full duration of the operation (muxes on the top child adapter of M1 are locked). But accesses to D3 and D4 are possibly interleaved at -any point. Accesses to D3 locks out D1 and D2, but accesses to D4 -are still possibly interleaved. +any point. + +Accesses to D3 locks out D1 and D2, but accesses to D4 are still possibly +interleaved. Mux-locked mux as parent of parent-locked mux @@ -394,3 +366,47 @@ This is a good topology:: When D1 or D2 are accessed, accesses to D3 and D4 are locked out while accesses to D5 may interleave. When D3 or D4 are accessed, accesses to all other devices are locked out. + + +Mux type of existing device drivers +=================================== + +Whether a device is mux-locked or parent-locked depends on its +implementation. The following list was correct at the time of writing: + +In drivers/i2c/muxes/: + +====================== ============================================= +i2c-arb-gpio-challenge Parent-locked +i2c-mux-gpio Normally parent-locked, mux-locked iff + all involved gpio pins are controlled by the + same I2C root adapter that they mux. +i2c-mux-gpmux Normally parent-locked, mux-locked iff + specified in device-tree. +i2c-mux-ltc4306 Mux-locked +i2c-mux-mlxcpld Parent-locked +i2c-mux-pca9541 Parent-locked +i2c-mux-pca954x Parent-locked +i2c-mux-pinctrl Normally parent-locked, mux-locked iff + all involved pinctrl devices are controlled + by the same I2C root adapter that they mux. +i2c-mux-reg Parent-locked +====================== ============================================= + +In drivers/iio/: + +====================== ============================================= +gyro/mpu3050 Mux-locked +imu/inv_mpu6050/ Mux-locked +====================== ============================================= + +In drivers/media/: + +======================= ============================================= +dvb-frontends/lgdt3306a Mux-locked +dvb-frontends/m88ds3103 Parent-locked +dvb-frontends/rtl2830 Parent-locked +dvb-frontends/rtl2832 Mux-locked +dvb-frontends/si2168 Mux-locked +usb/cx231xx/ Parent-locked +======================= ============================================= diff --git a/Documentation/i2c/slave-interface.rst b/Documentation/i2c/slave-interface.rst index 82ea3e1d6fe4..3f0d320bc80a 100644 --- a/Documentation/i2c/slave-interface.rst +++ b/Documentation/i2c/slave-interface.rst @@ -32,9 +32,9 @@ User manual =========== I2C slave backends behave like standard I2C clients. So, you can instantiate -them as described in the document 'instantiating-devices'. The only difference -is that i2c slave backends have their own address space. So, you have to add -0x1000 to the address you would originally request. An example for +them as described in the document instantiating-devices.rst. The only +difference is that i2c slave backends have their own address space. So, you +have to add 0x1000 to the address you would originally request. An example for instantiating the slave-eeprom driver from userspace at the 7 bit address 0x64 on bus 1:: @@ -72,12 +72,15 @@ Event types: 'val': unused - 'ret': always 0 + 'ret': 0 if the backend is ready, otherwise some errno Another I2C master wants to write data to us. This event should be sent once our own address and the write bit was detected. The data did not arrive yet, so -there is nothing to process or return. Wakeup or initialization probably needs -to be done, though. +there is nothing to process or return. After returning, the bus driver must +always ack the address phase. If 'ret' is zero, backend initialization or +wakeup is done and further data may be received. If 'ret' is an errno, the bus +driver should nack all incoming bytes until the next stop condition to enforce +a retry of the transmission. * I2C_SLAVE_READ_REQUESTED (mandatory) diff --git a/Documentation/i2c/writing-clients.rst b/Documentation/i2c/writing-clients.rst index e3b126cf4a3b..b7d3ae7458f8 100644 --- a/Documentation/i2c/writing-clients.rst +++ b/Documentation/i2c/writing-clients.rst @@ -156,7 +156,7 @@ those devices, and a remove() method to unbind. :: static int foo_probe(struct i2c_client *client); - static int foo_remove(struct i2c_client *client); + static void foo_remove(struct i2c_client *client); Remember that the i2c_driver does not create those client handles. The handle may be used during foo_probe(). If foo_probe() reports success @@ -364,7 +364,7 @@ stop condition is issued between transaction. The i2c_msg structure contains for each message the client address, the number of bytes of the message and the message data itself. -You can read the file ``i2c-protocol`` for more information about the +You can read the file i2c-protocol.rst for more information about the actual I2C protocol. @@ -414,7 +414,7 @@ transactions return 0 on success; the 'read' transactions return the read value, except for block transactions, which return the number of values read. The block buffers need not be longer than 32 bytes. -You can read the file ``smbus-protocol`` for more information about the +You can read the file smbus-protocol.rst for more information about the actual SMBus protocol. diff --git a/Documentation/iio/bno055.rst b/Documentation/iio/bno055.rst new file mode 100644 index 000000000000..9a489a79d8f5 --- /dev/null +++ b/Documentation/iio/bno055.rst @@ -0,0 +1,51 @@ +.. SPDX-License-Identifier: GPL-2.0 + +============================== +BNO055 driver +============================== + +1. Overview +=========== + +This driver supports Bosch BNO055 IMUs (on both serial and I2C busses). + +Accelerometer, magnetometer and gyroscope measures are always provided. +When "fusion_enable" sysfs attribute is set to 1, orientation (both Euler +angles and quaternion), linear velocity and gravity vector are also +provided, but some sensor settings (e.g. low pass filtering and range) +became locked (the IMU firmware controls them). + +This driver supports also IIO buffers. + +2. Calibration +============== + +The IMU continuously performs an autocalibration procedure if (and only if) +operating in fusion mode. The magnetometer autocalibration can however be +disabled writing 0 in the sysfs in_magn_calibration_fast_enable attribute. + +The driver provides access to autocalibration flags (i.e. you can known if +the IMU has successfully autocalibrated) and to the calibration data blob. + +The user can save this blob in a firmware file (i.e. in /lib/firmware) that +the driver looks for at probe time. If found, then the IMU is initialized +with this calibration data. This saves the user from performing the +calibration procedure every time (which consist of moving the IMU in +various way). + +The driver looks for calibration data file using two different names: first +a file whose name is suffixed with the IMU unique ID (exposed in sysfs as +serial_number) is searched for; this is useful when there is more than one +IMU instance. If this file is not found, then a "generic" calibration file +is searched for (which can be used when only one IMU is present, without +struggling with fancy names, that change on each device). + +Valid calibration file names would be e.g. + bno055-caldata-0e7c26a33541515120204a35342b04ff.dat + bno055-caldata.dat + +In non-fusion mode the IIO 'offset' attributes provide access to the +offsets from calibration data (if any), so that the user can apply them to +the accel, angvel and magn IIO attributes. In fusion mode they are not +needed (the IMU firmware internally applies those corrections) and they +read as zero. diff --git a/Documentation/iio/index.rst b/Documentation/iio/index.rst index 58b7a4ebac51..1b7292c58cd0 100644 --- a/Documentation/iio/index.rst +++ b/Documentation/iio/index.rst @@ -10,3 +10,5 @@ Industrial I/O iio_configfs ep93xx_adc + + bno055 diff --git a/Documentation/index.rst b/Documentation/index.rst index 4737c18c97ff..bf6aa681c960 100644 --- a/Documentation/index.rst +++ b/Documentation/index.rst @@ -1,11 +1,5 @@ .. SPDX-License-Identifier: GPL-2.0 - -.. The Linux Kernel documentation master file, created by - sphinx-quickstart on Fri Feb 12 13:51:46 2016. - You can adapt this file completely to your liking, but it should at least - contain the root `toctree` directive. - .. _linux_doc: The Linux Kernel documentation @@ -18,133 +12,85 @@ documents into a coherent whole. Please note that improvements to the documentation are welcome; join the linux-doc list at vger.kernel.org if you want to help out. -Licensing documentation ------------------------ +Working with the development community +-------------------------------------- -The following describes the license of the Linux kernel source code -(GPLv2), how to properly mark the license of individual files in the source -tree, as well as links to the full license text. - -* :ref:`kernel_licensing` - -User-oriented documentation ---------------------------- - -The following manuals are written for *users* of the kernel — those who are -trying to get it to work optimally on a given system. +The essential guides for interacting with the kernel's development +community and getting your work upstream. .. toctree:: - :maxdepth: 2 - - admin-guide/index - kbuild/index - -Firmware-related documentation ------------------------------- -The following holds information on the kernel's expectations regarding the -platform firmwares. + :maxdepth: 1 -.. toctree:: - :maxdepth: 2 + process/development-process + process/submitting-patches + Code of conduct <process/code-of-conduct> + maintainer/index + All development-process docs <process/index> - firmware-guide/index - devicetree/index -Application-developer documentation ------------------------------------ +Internal API manuals +-------------------- -The user-space API manual gathers together documents describing aspects of -the kernel interface as seen by application developers. +Manuals for use by developers working to interface with the rest of the +kernel. .. toctree:: - :maxdepth: 2 - - userspace-api/index + :maxdepth: 1 + core-api/index + driver-api/index + subsystem-apis + Locking in the kernel <locking/index> -Introduction to kernel development ----------------------------------- +Development tools and processes +------------------------------- -These manuals contain overall information about how to develop the kernel. -The kernel community is quite large, with thousands of developers -contributing over the course of a year. As with any large community, -knowing how things are done will make the process of getting your changes -merged much easier. +Various other manuals with useful information for all kernel developers. .. toctree:: - :maxdepth: 2 + :maxdepth: 1 - process/index - dev-tools/index + process/license-rules doc-guide/index + dev-tools/index + dev-tools/testing-overview kernel-hacking/index trace/index - maintainer/index fault-injection/index livepatch/index + rust/index -Kernel API documentation ------------------------- +User-oriented documentation +--------------------------- -These books get into the details of how specific kernel subsystems work -from the point of view of a kernel developer. Much of the information here -is taken directly from the kernel source, with supplemental material added -as needed (or at least as we managed to add it — probably *not* all that is -needed). +The following manuals are written for *users* of the kernel — those who are +trying to get it to work optimally on a given system and application +developers seeking information on the kernel's user-space APIs. .. toctree:: - :maxdepth: 2 + :maxdepth: 1 - driver-api/index - core-api/index - locking/index - accounting/index - block/index - cdrom/index - cpu-freq/index - fb/index - fpga/index - hid/index - i2c/index - iio/index - isdn/index - infiniband/index - leds/index - netlabel/index - networking/index - pcmcia/index - power/index - target/index - timers/index - spi/index - w1/index - watchdog/index - virt/index - input/index - hwmon/index - gpu/index - security/index - sound/index - crypto/index - filesystems/index - mm/index - bpf/index - usb/index - PCI/index - scsi/index - misc-devices/index - scheduler/index - mhi/index - peci/index - -Architecture-agnostic documentation ------------------------------------ + admin-guide/index + The kernel build system <kbuild/index> + admin-guide/reporting-issues.rst + User-space tools <tools/index> + userspace-api/index + +See also: the `Linux man pages <https://www.kernel.org/doc/man-pages/>`_, +which are kept separately from the kernel's own documentation. + +Firmware-related documentation +------------------------------ +The following holds information on the kernel's expectations regarding the +platform firmwares. .. toctree:: - :maxdepth: 2 + :maxdepth: 1 + + firmware-guide/index + devicetree/index - asm-annotations Architecture-specific documentation ----------------------------------- @@ -163,9 +109,8 @@ of the documentation body, or may require some adjustments and/or conversion to ReStructured Text format, or are simply too old. .. toctree:: - :maxdepth: 2 + :maxdepth: 1 - tools/index staging/index diff --git a/Documentation/input/event-codes.rst b/Documentation/input/event-codes.rst index 8741d390b184..b4557462edd7 100644 --- a/Documentation/input/event-codes.rst +++ b/Documentation/input/event-codes.rst @@ -235,6 +235,12 @@ A few EV_ABS codes have special meanings: BTN_TOOL_<name> signals the type of tool that is currently detected by the hardware and is otherwise independent of ABS_DISTANCE and/or BTN_TOUCH. +* ABS_PROFILE: + + - Used to describe the state of a multi-value profile switch. An event is + emitted only when the selected profile changes, indicating the newly + selected profile value. + * ABS_MT_<name>: - Used to describe multitouch input events. Please see diff --git a/Documentation/input/gamepad.rst b/Documentation/input/gamepad.rst index 4d5e7fb80a84..71019de46036 100644 --- a/Documentation/input/gamepad.rst +++ b/Documentation/input/gamepad.rst @@ -189,3 +189,9 @@ Gamepads report the following events: - Rumble: Rumble is advertised as FF_RUMBLE. + +- Profile: + + Some pads provide a multi-value profile selection switch. An example is the + XBox Adaptive and the XBox Elite 2 controllers. When the active profile is + switched, its newly selected value is emitted as an ABS_PROFILE event. diff --git a/Documentation/kbuild/gcc-plugins.rst b/Documentation/kbuild/gcc-plugins.rst index 0ba76719f1b9..c578c6ba3eb6 100644 --- a/Documentation/kbuild/gcc-plugins.rst +++ b/Documentation/kbuild/gcc-plugins.rst @@ -90,7 +90,11 @@ e.g., on Ubuntu for gcc-10:: Or on Fedora:: - dnf install gcc-plugin-devel + dnf install gcc-plugin-devel libmpc-devel + +Or on Fedora when using cross-compilers that include plugins:: + + dnf install libmpc-devel Enable the GCC plugin infrastructure and some plugin(s) you want to use in the kernel config:: @@ -99,6 +103,19 @@ in the kernel config:: CONFIG_GCC_PLUGIN_LATENT_ENTROPY=y ... +Run gcc (native or cross-compiler) to ensure plugin headers are detected:: + + gcc -print-file-name=plugin + CROSS_COMPILE=arm-linux-gnu- ${CROSS_COMPILE}gcc -print-file-name=plugin + +The word "plugin" means they are not detected:: + + plugin + +A full path means they are detected:: + + /usr/lib/gcc/x86_64-redhat-linux/12/plugin + To compile the minimum tool set including the plugin(s):: make scripts diff --git a/Documentation/kbuild/kbuild.rst b/Documentation/kbuild/kbuild.rst index ef19b9c13523..08f575e6236c 100644 --- a/Documentation/kbuild/kbuild.rst +++ b/Documentation/kbuild/kbuild.rst @@ -48,6 +48,10 @@ KCFLAGS ------- Additional options to the C compiler (for built-in and modules). +KRUSTFLAGS +---------- +Additional options to the Rust compiler (for built-in and modules). + CFLAGS_KERNEL ------------- Additional options for $(CC) when used to compile @@ -57,6 +61,15 @@ CFLAGS_MODULE ------------- Additional module specific options to use for $(CC). +RUSTFLAGS_KERNEL +---------------- +Additional options for $(RUSTC) when used to compile +code that is compiled as built-in. + +RUSTFLAGS_MODULE +---------------- +Additional module specific options to use for $(RUSTC). + LDFLAGS_MODULE -------------- Additional options used for $(LD) when linking modules. @@ -69,6 +82,10 @@ HOSTCXXFLAGS ------------ Additional flags to be passed to $(HOSTCXX) when building host programs. +HOSTRUSTFLAGS +------------- +Additional flags to be passed to $(HOSTRUSTC) when building host programs. + HOSTLDFLAGS ----------- Additional flags to be passed when linking host programs. diff --git a/Documentation/kbuild/makefiles.rst b/Documentation/kbuild/makefiles.rst index 11a296e52d68..6b7368d1f516 100644 --- a/Documentation/kbuild/makefiles.rst +++ b/Documentation/kbuild/makefiles.rst @@ -29,8 +29,9 @@ This document describes the Linux kernel Makefiles. --- 4.1 Simple Host Program --- 4.2 Composite Host Programs --- 4.3 Using C++ for host programs - --- 4.4 Controlling compiler options for host programs - --- 4.5 When host programs are actually built + --- 4.4 Using Rust for host programs + --- 4.5 Controlling compiler options for host programs + --- 4.6 When host programs are actually built === 5 Userspace Program support --- 5.1 Simple Userspace Program @@ -340,19 +341,7 @@ more details, with real examples. Examples are: - 1) head objects - - Some objects must be placed at the head of vmlinux. They are - directly linked to vmlinux without going through built-in.a - A typical use-case is an object that contains the entry point. - - arch/$(SRCARCH)/Makefile should specify such objects as head-y. - - Discussion: - Given that we can control the section order in the linker script, - why do we need head-y? - - 2) vmlinux linker script + 1) vmlinux linker script The linker script for vmlinux is located at arch/$(SRCARCH)/kernel/vmlinux.lds @@ -360,10 +349,6 @@ more details, with real examples. Example:: # arch/x86/kernel/Makefile - extra-y := head_$(BITS).o - extra-y += head$(BITS).o - extra-y += ebda.o - extra-y += platform-quirks.o extra-y += vmlinux.lds $(extra-y) should only contain targets needed for vmlinux. @@ -682,22 +667,27 @@ more details, with real examples. In the above example, -Wno-unused-but-set-variable will be added to KBUILD_CFLAGS only if gcc really accepts it. - cc-ifversion - cc-ifversion tests the version of $(CC) and equals the fourth parameter - if version expression is true, or the fifth (if given) if the version - expression is false. + gcc-min-version + gcc-min-version tests if the value of $(CONFIG_GCC_VERSION) is greater than + or equal to the provided value and evaluates to y if so. + + Example:: + + cflags-$(call gcc-min-version, 70100) := -foo + + In this example, cflags-y will be assigned the value -foo if $(CC) is gcc and + $(CONFIG_GCC_VERSION) is >= 7.1. + + clang-min-version + clang-min-version tests if the value of $(CONFIG_CLANG_VERSION) is greater + than or equal to the provided value and evaluates to y if so. Example:: - #fs/reiserfs/Makefile - ccflags-y := $(call cc-ifversion, -lt, 0402, -O1) + cflags-$(call clang-min-version, 110000) := -foo - In this example, ccflags-y will be assigned the value -O1 if the - $(CC) version is less than 4.2. - cc-ifversion takes all the shell operators: - -eq, -ne, -lt, -le, -gt, and -ge - The third parameter may be a text as in this example, but it may also - be an expanded variable or a macro. + In this example, cflags-y will be assigned the value -foo if $(CC) is clang + and $(CONFIG_CLANG_VERSION) is >= 11.0.0. cc-cross-prefix cc-cross-prefix is used to check if there exists a $(CC) in path with @@ -835,7 +825,24 @@ Both possibilities are described in the following. qconf-cxxobjs := qconf.o qconf-objs := check.o -4.4 Controlling compiler options for host programs +4.4 Using Rust for host programs +-------------------------------- + + Kbuild offers support for host programs written in Rust. However, + since a Rust toolchain is not mandatory for kernel compilation, + it may only be used in scenarios where Rust is required to be + available (e.g. when ``CONFIG_RUST`` is enabled). + + Example:: + + hostprogs := target + target-rust := y + + Kbuild will compile ``target`` using ``target.rs`` as the crate root, + located in the same directory as the ``Makefile``. The crate may + consist of several source files (see ``samples/rust/hostprogs``). + +4.5 Controlling compiler options for host programs -------------------------------------------------- When compiling host programs, it is possible to set specific flags. @@ -867,7 +874,7 @@ Both possibilities are described in the following. When linking qconf, it will be passed the extra option "-L$(QTDIR)/lib". -4.5 When host programs are actually built +4.6 When host programs are actually built ----------------------------------------- Kbuild will only build host-programs when they are referenced @@ -1081,8 +1088,7 @@ When kbuild executes, the following steps are followed (roughly): - The values of the above variables are expanded in arch/$(SRCARCH)/Makefile. 5) All object files are then linked and the resulting file vmlinux is located at the root of the obj tree. - The very first objects linked are listed in head-y, assigned by - arch/$(SRCARCH)/Makefile. + The very first objects linked are listed in scripts/head-object-list.txt. 6) Finally, the architecture-specific part does any required post processing and builds the final bootimage. - This includes building boot records @@ -1181,6 +1187,17 @@ When kbuild executes, the following steps are followed (roughly): The first example utilises the trick that a config option expands to 'y' when selected. + KBUILD_RUSTFLAGS + $(RUSTC) compiler flags + + Default value - see top level Makefile + Append or modify as required per architecture. + + Often, the KBUILD_RUSTFLAGS variable depends on the configuration. + + Note that target specification file generation (for ``--target``) + is handled in ``scripts/generate_rust_target.rs``. + KBUILD_AFLAGS_KERNEL Assembler options specific for built-in @@ -1208,6 +1225,19 @@ When kbuild executes, the following steps are followed (roughly): are used for $(CC). From commandline CFLAGS_MODULE shall be used (see kbuild.rst). + KBUILD_RUSTFLAGS_KERNEL + $(RUSTC) options specific for built-in + + $(KBUILD_RUSTFLAGS_KERNEL) contains extra Rust compiler flags used to + compile resident kernel code. + + KBUILD_RUSTFLAGS_MODULE + Options for $(RUSTC) when building modules + + $(KBUILD_RUSTFLAGS_MODULE) is used to add arch-specific options that + are used for $(RUSTC). + From commandline RUSTFLAGS_MODULE shall be used (see kbuild.rst). + KBUILD_LDFLAGS_MODULE Options for $(LD) when linking modules @@ -1230,6 +1260,9 @@ When kbuild executes, the following steps are followed (roughly): All object files for vmlinux. They are linked to vmlinux in the same order as listed in KBUILD_VMLINUX_OBJS. + The objects listed in scripts/head-object-list.txt are exceptions; + they are placed before the other objects. + KBUILD_VMLINUX_LIBS All .a "lib" files for vmlinux. KBUILD_VMLINUX_OBJS and @@ -1273,8 +1306,7 @@ When kbuild executes, the following steps are followed (roughly): machinery is all architecture-independent. - head-y, core-y, libs-y, drivers-y - $(head-y) lists objects to be linked first in vmlinux. + core-y, libs-y, drivers-y $(libs-y) lists directories where a lib.a archive can be located. diff --git a/Documentation/locking/seqlock.rst b/Documentation/locking/seqlock.rst index 64405e5da63e..bfda1a5fecad 100644 --- a/Documentation/locking/seqlock.rst +++ b/Documentation/locking/seqlock.rst @@ -39,7 +39,7 @@ as the writer can invalidate a pointer that the reader is following. Sequence counters (``seqcount_t``) ================================== -This is the the raw counting mechanism, which does not protect against +This is the raw counting mechanism, which does not protect against multiple writers. Write side critical sections must thus be serialized by an external lock. diff --git a/Documentation/memory-barriers.txt b/Documentation/memory-barriers.txt index 832b5d36e279..06f80e3785c5 100644 --- a/Documentation/memory-barriers.txt +++ b/Documentation/memory-barriers.txt @@ -52,7 +52,7 @@ CONTENTS - Varieties of memory barrier. - What may not be assumed about memory barriers? - - Data dependency barriers (historical). + - Address-dependency barriers (historical). - Control dependencies. - SMP barrier pairing. - Examples of memory barrier sequences. @@ -187,9 +187,9 @@ As a further example, consider this sequence of events: B = 4; Q = P; P = &B; D = *Q; -There is an obvious data dependency here, as the value loaded into D depends on -the address retrieved from P by CPU 2. At the end of the sequence, any of the -following results are possible: +There is an obvious address dependency here, as the value loaded into D depends +on the address retrieved from P by CPU 2. At the end of the sequence, any of +the following results are possible: (Q == &A) and (D == 1) (Q == &B) and (D == 2) @@ -391,58 +391,62 @@ Memory barriers come in four basic varieties: memory system as time progresses. All stores _before_ a write barrier will occur _before_ all the stores after the write barrier. - [!] Note that write barriers should normally be paired with read or data - dependency barriers; see the "SMP barrier pairing" subsection. + [!] Note that write barriers should normally be paired with read or + address-dependency barriers; see the "SMP barrier pairing" subsection. - (2) Data dependency barriers. + (2) Address-dependency barriers (historical). - A data dependency barrier is a weaker form of read barrier. In the case - where two loads are performed such that the second depends on the result - of the first (eg: the first load retrieves the address to which the second - load will be directed), a data dependency barrier would be required to - make sure that the target of the second load is updated after the address - obtained by the first load is accessed. + An address-dependency barrier is a weaker form of read barrier. In the + case where two loads are performed such that the second depends on the + result of the first (eg: the first load retrieves the address to which + the second load will be directed), an address-dependency barrier would + be required to make sure that the target of the second load is updated + after the address obtained by the first load is accessed. - A data dependency barrier is a partial ordering on interdependent loads - only; it is not required to have any effect on stores, independent loads - or overlapping loads. + An address-dependency barrier is a partial ordering on interdependent + loads only; it is not required to have any effect on stores, independent + loads or overlapping loads. As mentioned in (1), the other CPUs in the system can be viewed as committing sequences of stores to the memory system that the CPU being - considered can then perceive. A data dependency barrier issued by the CPU - under consideration guarantees that for any load preceding it, if that - load touches one of a sequence of stores from another CPU, then by the - time the barrier completes, the effects of all the stores prior to that - touched by the load will be perceptible to any loads issued after the data - dependency barrier. + considered can then perceive. An address-dependency barrier issued by + the CPU under consideration guarantees that for any load preceding it, + if that load touches one of a sequence of stores from another CPU, then + by the time the barrier completes, the effects of all the stores prior to + that touched by the load will be perceptible to any loads issued after + the address-dependency barrier. See the "Examples of memory barrier sequences" subsection for diagrams showing the ordering constraints. - [!] Note that the first load really has to have a _data_ dependency and + [!] Note that the first load really has to have an _address_ dependency and not a control dependency. If the address for the second load is dependent on the first load, but the dependency is through a conditional rather than actually loading the address itself, then it's a _control_ dependency and a full read barrier or better is required. See the "Control dependencies" subsection for more information. - [!] Note that data dependency barriers should normally be paired with + [!] Note that address-dependency barriers should normally be paired with write barriers; see the "SMP barrier pairing" subsection. + [!] Kernel release v5.9 removed kernel APIs for explicit address- + dependency barriers. Nowadays, APIs for marking loads from shared + variables such as READ_ONCE() and rcu_dereference() provide implicit + address-dependency barriers. (3) Read (or load) memory barriers. - A read barrier is a data dependency barrier plus a guarantee that all the - LOAD operations specified before the barrier will appear to happen before - all the LOAD operations specified after the barrier with respect to the - other components of the system. + A read barrier is an address-dependency barrier plus a guarantee that all + the LOAD operations specified before the barrier will appear to happen + before all the LOAD operations specified after the barrier with respect to + the other components of the system. A read barrier is a partial ordering on loads only; it is not required to have any effect on stores. - Read memory barriers imply data dependency barriers, and so can substitute - for them. + Read memory barriers imply address-dependency barriers, and so can + substitute for them. [!] Note that read barriers should normally be paired with write barriers; see the "SMP barrier pairing" subsection. @@ -550,17 +554,21 @@ There are certain things that the Linux kernel memory barriers do not guarantee: Documentation/core-api/dma-api.rst -DATA DEPENDENCY BARRIERS (HISTORICAL) -------------------------------------- +ADDRESS-DEPENDENCY BARRIERS (HISTORICAL) +---------------------------------------- As of v4.15 of the Linux kernel, an smp_mb() was added to READ_ONCE() for DEC Alpha, which means that about the only people who need to pay attention to this section are those working on DEC Alpha architecture-specific code and those working on READ_ONCE() itself. For those who need it, and for those who are interested in the history, here is the story of -data-dependency barriers. +address-dependency barriers. + +[!] While address dependencies are observed in both load-to-load and +load-to-store relations, address-dependency barriers are not necessary +for load-to-store situations. -The usage requirements of data dependency barriers are a little subtle, and +The requirement of address-dependency barriers is a little subtle, and it's not always obvious that they're needed. To illustrate, consider the following sequence of events: @@ -570,11 +578,14 @@ following sequence of events: B = 4; <write barrier> WRITE_ONCE(P, &B); - Q = READ_ONCE(P); + Q = READ_ONCE_OLD(P); D = *Q; -There's a clear data dependency here, and it would seem that by the end of the -sequence, Q must be either &A or &B, and that: +[!] READ_ONCE_OLD() corresponds to READ_ONCE() of pre-4.15 kernel, which +doesn't imply an address-dependency barrier. + +There's a clear address dependency here, and it would seem that by the end of +the sequence, Q must be either &A or &B, and that: (Q == &A) implies (D == 1) (Q == &B) implies (D == 4) @@ -588,8 +599,8 @@ While this may seem like a failure of coherency or causality maintenance, it isn't, and this behaviour can be observed on certain real CPUs (such as the DEC Alpha). -To deal with this, a data dependency barrier or better must be inserted -between the address load and the data load: +To deal with this, READ_ONCE() provides an implicit address-dependency barrier +since kernel release v4.15: CPU 1 CPU 2 =============== =============== @@ -598,7 +609,7 @@ between the address load and the data load: <write barrier> WRITE_ONCE(P, &B); Q = READ_ONCE(P); - <data dependency barrier> + <implicit address-dependency barrier> D = *Q; This enforces the occurrence of one of the two implications, and prevents the @@ -615,13 +626,13 @@ odd-numbered bank is idle, one can see the new value of the pointer P (&B), but the old value of the variable B (2). -A data-dependency barrier is not required to order dependent writes -because the CPUs that the Linux kernel supports don't do writes -until they are certain (1) that the write will actually happen, (2) -of the location of the write, and (3) of the value to be written. +An address-dependency barrier is not required to order dependent writes +because the CPUs that the Linux kernel supports don't do writes until they +are certain (1) that the write will actually happen, (2) of the location of +the write, and (3) of the value to be written. But please carefully read the "CONTROL DEPENDENCIES" section and the -Documentation/RCU/rcu_dereference.rst file: The compiler can and does -break dependencies in a great many highly creative ways. +Documentation/RCU/rcu_dereference.rst file: The compiler can and does break +dependencies in a great many highly creative ways. CPU 1 CPU 2 =============== =============== @@ -629,12 +640,12 @@ break dependencies in a great many highly creative ways. B = 4; <write barrier> WRITE_ONCE(P, &B); - Q = READ_ONCE(P); + Q = READ_ONCE_OLD(P); WRITE_ONCE(*Q, 5); -Therefore, no data-dependency barrier is required to order the read into +Therefore, no address-dependency barrier is required to order the read into Q with the store into *Q. In other words, this outcome is prohibited, -even without a data-dependency barrier: +even without an implicit address-dependency barrier of modern READ_ONCE(): (Q == &B) && (B == 4) @@ -645,12 +656,12 @@ can be used to record rare error conditions and the like, and the CPUs' naturally occurring ordering prevents such records from being lost. -Note well that the ordering provided by a data dependency is local to +Note well that the ordering provided by an address dependency is local to the CPU containing it. See the section on "Multicopy atomicity" for more information. -The data dependency barrier is very important to the RCU system, +The address-dependency barrier is very important to the RCU system, for example. See rcu_assign_pointer() and rcu_dereference() in include/linux/rcupdate.h. This permits the current target of an RCU'd pointer to be replaced with a new modified target, without the replacement @@ -667,20 +678,21 @@ not understand them. The purpose of this section is to help you prevent the compiler's ignorance from breaking your code. A load-load control dependency requires a full read memory barrier, not -simply a data dependency barrier to make it work correctly. Consider the -following bit of code: +simply an (implicit) address-dependency barrier to make it work correctly. +Consider the following bit of code: q = READ_ONCE(a); + <implicit address-dependency barrier> if (q) { - <data dependency barrier> /* BUG: No data dependency!!! */ + /* BUG: No address dependency!!! */ p = READ_ONCE(b); } -This will not have the desired effect because there is no actual data +This will not have the desired effect because there is no actual address dependency, but rather a control dependency that the CPU may short-circuit by attempting to predict the outcome in advance, so that other CPUs see -the load from b as having happened before the load from a. In such a -case what's actually required is: +the load from b as having happened before the load from a. In such a case +what's actually required is: q = READ_ONCE(a); if (q) { @@ -927,9 +939,9 @@ General barriers pair with each other, though they also pair with most other types of barriers, albeit without multicopy atomicity. An acquire barrier pairs with a release barrier, but both may also pair with other barriers, including of course general barriers. A write barrier pairs -with a data dependency barrier, a control dependency, an acquire barrier, +with an address-dependency barrier, a control dependency, an acquire barrier, a release barrier, a read barrier, or a general barrier. Similarly a -read barrier, control dependency, or a data dependency barrier pairs +read barrier, control dependency, or an address-dependency barrier pairs with a write barrier, an acquire barrier, a release barrier, or a general barrier: @@ -948,7 +960,7 @@ Or: a = 1; <write barrier> WRITE_ONCE(b, &a); x = READ_ONCE(b); - <data dependency barrier> + <implicit address-dependency barrier> y = *x; Or even: @@ -968,8 +980,8 @@ Basically, the read barrier always has to be there, even though it can be of the "weaker" type. [!] Note that the stores before the write barrier would normally be expected to -match the loads after the read barrier or the data dependency barrier, and vice -versa: +match the loads after the read barrier or the address-dependency barrier, and +vice versa: CPU 1 CPU 2 =================== =================== @@ -1021,8 +1033,8 @@ STORE B, STORE C } all occurring before the unordered set of { STORE D, STORE E V -Secondly, data dependency barriers act as partial orderings on data-dependent -loads. Consider the following sequence of events: +Secondly, address-dependency barriers act as partial orderings on address- +dependent loads. Consider the following sequence of events: CPU 1 CPU 2 ======================= ======================= @@ -1067,8 +1079,8 @@ effectively random order, despite the write barrier issued by CPU 1: In the above example, CPU 2 perceives that B is 7, despite the load of *C (which would be B) coming after the LOAD of C. -If, however, a data dependency barrier were to be placed between the load of C -and the load of *C (ie: B) on CPU 2: +If, however, an address-dependency barrier were to be placed between the load +of C and the load of *C (ie: B) on CPU 2: CPU 1 CPU 2 ======================= ======================= @@ -1078,7 +1090,7 @@ and the load of *C (ie: B) on CPU 2: <write barrier> STORE C = &B LOAD X STORE D = 4 LOAD C (gets &B) - <data dependency barrier> + <address-dependency barrier> LOAD *C (reads B) then the following will occur: @@ -1101,7 +1113,7 @@ then the following will occur: | +-------+ | | | | X->9 |------>| | | +-------+ | | - Makes sure all effects ---> \ ddddddddddddddddd | | + Makes sure all effects ---> \ aaaaaaaaaaaaaaaaa | | prior to the store of C \ +-------+ | | are perceptible to ----->| B->2 |------>| | subsequent loads +-------+ | | @@ -1292,7 +1304,7 @@ Which might appear as this: LOAD with immediate effect : : +-------+ -Placing a read barrier or a data dependency barrier just before the second +Placing a read barrier or an address-dependency barrier just before the second load: CPU 1 CPU 2 @@ -1816,20 +1828,20 @@ which may then reorder things however it wishes. CPU MEMORY BARRIERS ------------------- -The Linux kernel has eight basic CPU memory barriers: +The Linux kernel has seven basic CPU memory barriers: - TYPE MANDATORY SMP CONDITIONAL - =============== ======================= =========================== - GENERAL mb() smp_mb() - WRITE wmb() smp_wmb() - READ rmb() smp_rmb() - DATA DEPENDENCY READ_ONCE() + TYPE MANDATORY SMP CONDITIONAL + ======================= =============== =============== + GENERAL mb() smp_mb() + WRITE wmb() smp_wmb() + READ rmb() smp_rmb() + ADDRESS DEPENDENCY READ_ONCE() -All memory barriers except the data dependency barriers imply a compiler -barrier. Data dependencies do not impose any additional compiler ordering. +All memory barriers except the address-dependency barriers imply a compiler +barrier. Address dependencies do not impose any additional compiler ordering. -Aside: In the case of data dependencies, the compiler would be expected +Aside: In the case of address dependencies, the compiler would be expected to issue the loads in the correct order (eg. `a[b]` would have to load the value of b before loading a[b]), however there is no guarantee in the C specification that the compiler may not speculate the value of b @@ -2749,7 +2761,8 @@ is discarded from the CPU's cache and reloaded. To deal with this, the appropriate part of the kernel must invalidate the overlapping bits of the cache on each CPU. -See Documentation/core-api/cachetlb.rst for more information on cache management. +See Documentation/core-api/cachetlb.rst for more information on cache +management. CACHE COHERENCY VS MMIO @@ -2889,8 +2902,8 @@ AND THEN THERE'S THE ALPHA The DEC Alpha CPU is one of the most relaxed CPUs there is. Not only that, some versions of the Alpha CPU have a split data cache, permitting them to have two semantically-related cache lines updated at separate times. This is where -the data dependency barrier really becomes necessary as this synchronises both -caches with the memory coherence system, thus making it seem like pointer +the address-dependency barrier really becomes necessary as this synchronises +both caches with the memory coherence system, thus making it seem like pointer changes vs new data occur in the right order. The Alpha defines the Linux kernel's memory model, although as of v4.15 diff --git a/Documentation/mm/index.rst b/Documentation/mm/index.rst index 575ccd40e30c..4aa12b8be278 100644 --- a/Documentation/mm/index.rst +++ b/Documentation/mm/index.rst @@ -51,6 +51,7 @@ above structured documentation, or deleted if it has served its purpose. ksm memory-model mmu_notifier + multigen_lru numa overcommit-accounting page_migration diff --git a/Documentation/mm/ksm.rst b/Documentation/mm/ksm.rst index 9e37add068e6..f83cfbc12f4c 100644 --- a/Documentation/mm/ksm.rst +++ b/Documentation/mm/ksm.rst @@ -26,7 +26,7 @@ tree. If a KSM page is shared between less than ``max_page_sharing`` VMAs, the node of the stable tree that represents such KSM page points to a -list of struct rmap_item and the ``page->mapping`` of the +list of struct ksm_rmap_item and the ``page->mapping`` of the KSM page points to the stable tree node. When the sharing passes this threshold, KSM adds a second dimension to diff --git a/Documentation/mm/multigen_lru.rst b/Documentation/mm/multigen_lru.rst new file mode 100644 index 000000000000..d7062c6a8946 --- /dev/null +++ b/Documentation/mm/multigen_lru.rst @@ -0,0 +1,159 @@ +.. SPDX-License-Identifier: GPL-2.0 + +============= +Multi-Gen LRU +============= +The multi-gen LRU is an alternative LRU implementation that optimizes +page reclaim and improves performance under memory pressure. Page +reclaim decides the kernel's caching policy and ability to overcommit +memory. It directly impacts the kswapd CPU usage and RAM efficiency. + +Design overview +=============== +Objectives +---------- +The design objectives are: + +* Good representation of access recency +* Try to profit from spatial locality +* Fast paths to make obvious choices +* Simple self-correcting heuristics + +The representation of access recency is at the core of all LRU +implementations. In the multi-gen LRU, each generation represents a +group of pages with similar access recency. Generations establish a +(time-based) common frame of reference and therefore help make better +choices, e.g., between different memcgs on a computer or different +computers in a data center (for job scheduling). + +Exploiting spatial locality improves efficiency when gathering the +accessed bit. A rmap walk targets a single page and does not try to +profit from discovering a young PTE. A page table walk can sweep all +the young PTEs in an address space, but the address space can be too +sparse to make a profit. The key is to optimize both methods and use +them in combination. + +Fast paths reduce code complexity and runtime overhead. Unmapped pages +do not require TLB flushes; clean pages do not require writeback. +These facts are only helpful when other conditions, e.g., access +recency, are similar. With generations as a common frame of reference, +additional factors stand out. But obvious choices might not be good +choices; thus self-correction is necessary. + +The benefits of simple self-correcting heuristics are self-evident. +Again, with generations as a common frame of reference, this becomes +attainable. Specifically, pages in the same generation can be +categorized based on additional factors, and a feedback loop can +statistically compare the refault percentages across those categories +and infer which of them are better choices. + +Assumptions +----------- +The protection of hot pages and the selection of cold pages are based +on page access channels and patterns. There are two access channels: + +* Accesses through page tables +* Accesses through file descriptors + +The protection of the former channel is by design stronger because: + +1. The uncertainty in determining the access patterns of the former + channel is higher due to the approximation of the accessed bit. +2. The cost of evicting the former channel is higher due to the TLB + flushes required and the likelihood of encountering the dirty bit. +3. The penalty of underprotecting the former channel is higher because + applications usually do not prepare themselves for major page + faults like they do for blocked I/O. E.g., GUI applications + commonly use dedicated I/O threads to avoid blocking rendering + threads. + +There are also two access patterns: + +* Accesses exhibiting temporal locality +* Accesses not exhibiting temporal locality + +For the reasons listed above, the former channel is assumed to follow +the former pattern unless ``VM_SEQ_READ`` or ``VM_RAND_READ`` is +present, and the latter channel is assumed to follow the latter +pattern unless outlying refaults have been observed. + +Workflow overview +================= +Evictable pages are divided into multiple generations for each +``lruvec``. The youngest generation number is stored in +``lrugen->max_seq`` for both anon and file types as they are aged on +an equal footing. The oldest generation numbers are stored in +``lrugen->min_seq[]`` separately for anon and file types as clean file +pages can be evicted regardless of swap constraints. These three +variables are monotonically increasing. + +Generation numbers are truncated into ``order_base_2(MAX_NR_GENS+1)`` +bits in order to fit into the gen counter in ``folio->flags``. Each +truncated generation number is an index to ``lrugen->lists[]``. The +sliding window technique is used to track at least ``MIN_NR_GENS`` and +at most ``MAX_NR_GENS`` generations. The gen counter stores a value +within ``[1, MAX_NR_GENS]`` while a page is on one of +``lrugen->lists[]``; otherwise it stores zero. + +Each generation is divided into multiple tiers. A page accessed ``N`` +times through file descriptors is in tier ``order_base_2(N)``. Unlike +generations, tiers do not have dedicated ``lrugen->lists[]``. In +contrast to moving across generations, which requires the LRU lock, +moving across tiers only involves atomic operations on +``folio->flags`` and therefore has a negligible cost. A feedback loop +modeled after the PID controller monitors refaults over all the tiers +from anon and file types and decides which tiers from which types to +evict or protect. + +There are two conceptually independent procedures: the aging and the +eviction. They form a closed-loop system, i.e., the page reclaim. + +Aging +----- +The aging produces young generations. Given an ``lruvec``, it +increments ``max_seq`` when ``max_seq-min_seq+1`` approaches +``MIN_NR_GENS``. The aging promotes hot pages to the youngest +generation when it finds them accessed through page tables; the +demotion of cold pages happens consequently when it increments +``max_seq``. The aging uses page table walks and rmap walks to find +young PTEs. For the former, it iterates ``lruvec_memcg()->mm_list`` +and calls ``walk_page_range()`` with each ``mm_struct`` on this list +to scan PTEs, and after each iteration, it increments ``max_seq``. For +the latter, when the eviction walks the rmap and finds a young PTE, +the aging scans the adjacent PTEs. For both, on finding a young PTE, +the aging clears the accessed bit and updates the gen counter of the +page mapped by this PTE to ``(max_seq%MAX_NR_GENS)+1``. + +Eviction +-------- +The eviction consumes old generations. Given an ``lruvec``, it +increments ``min_seq`` when ``lrugen->lists[]`` indexed by +``min_seq%MAX_NR_GENS`` becomes empty. To select a type and a tier to +evict from, it first compares ``min_seq[]`` to select the older type. +If both types are equally old, it selects the one whose first tier has +a lower refault percentage. The first tier contains single-use +unmapped clean pages, which are the best bet. The eviction sorts a +page according to its gen counter if the aging has found this page +accessed through page tables and updated its gen counter. It also +moves a page to the next generation, i.e., ``min_seq+1``, if this page +was accessed multiple times through file descriptors and the feedback +loop has detected outlying refaults from the tier this page is in. To +this end, the feedback loop uses the first tier as the baseline, for +the reason stated earlier. + +Summary +------- +The multi-gen LRU can be disassembled into the following parts: + +* Generations +* Rmap walks +* Page table walks +* Bloom filters +* PID controller + +The aging and the eviction form a producer-consumer model; +specifically, the latter drives the former by the sliding window over +generations. Within the aging, rmap walks drive page table walks by +inserting hot densely populated page tables to the Bloom filters. +Within the eviction, the PID controller uses refaults as the feedback +to select types to evict and tiers to protect. diff --git a/Documentation/mm/page_owner.rst b/Documentation/mm/page_owner.rst index f5c954afe97c..f18fd8907049 100644 --- a/Documentation/mm/page_owner.rst +++ b/Documentation/mm/page_owner.rst @@ -94,6 +94,11 @@ Usage Page allocated via order XXX, ... PFN XXX ... // Detailed stack + By default, it will do full pfn dump, to start with a given pfn, + page_owner supports fseek. + + FILE *fp = fopen("/sys/kernel/debug/page_owner", "r"); + fseek(fp, pfn_start, SEEK_SET); The ``page_owner_sort`` tool ignores ``PFN`` rows, puts the remaining rows in buf, uses regexp to extract the page order value, counts the times diff --git a/Documentation/mm/slub.rst b/Documentation/mm/slub.rst index 43063ade737a..4e1578186b4f 100644 --- a/Documentation/mm/slub.rst +++ b/Documentation/mm/slub.rst @@ -400,21 +400,30 @@ information: allocated objects. The output is sorted by frequency of each trace. Information in the output: - Number of objects, allocating function, minimal/average/maximal jiffies since alloc, - pid range of the allocating processes, cpu mask of allocating cpus, and stack trace. + Number of objects, allocating function, possible memory wastage of + kmalloc objects(total/per-object), minimal/average/maximal jiffies + since alloc, pid range of the allocating processes, cpu mask of + allocating cpus, numa node mask of origins of memory, and stack trace. Example::: - 1085 populate_error_injection_list+0x97/0x110 age=166678/166680/166682 pid=1 cpus=1:: - __slab_alloc+0x6d/0x90 - kmem_cache_alloc_trace+0x2eb/0x300 - populate_error_injection_list+0x97/0x110 - init_error_injection+0x1b/0x71 - do_one_initcall+0x5f/0x2d0 - kernel_init_freeable+0x26f/0x2d7 - kernel_init+0xe/0x118 - ret_from_fork+0x22/0x30 - + 338 pci_alloc_dev+0x2c/0xa0 waste=521872/1544 age=290837/291891/293509 pid=1 cpus=106 nodes=0-1 + __kmem_cache_alloc_node+0x11f/0x4e0 + kmalloc_trace+0x26/0xa0 + pci_alloc_dev+0x2c/0xa0 + pci_scan_single_device+0xd2/0x150 + pci_scan_slot+0xf7/0x2d0 + pci_scan_child_bus_extend+0x4e/0x360 + acpi_pci_root_create+0x32e/0x3b0 + pci_acpi_scan_root+0x2b9/0x2d0 + acpi_pci_root_add.cold.11+0x110/0xb0a + acpi_bus_attach+0x262/0x3f0 + device_for_each_child+0xb7/0x110 + acpi_dev_for_each_child+0x77/0xa0 + acpi_bus_attach+0x108/0x3f0 + device_for_each_child+0xb7/0x110 + acpi_dev_for_each_child+0x77/0xa0 + acpi_bus_attach+0x108/0x3f0 2. free_traces:: diff --git a/Documentation/mm/unevictable-lru.rst b/Documentation/mm/unevictable-lru.rst index b280367d6a44..4a0e158aa9ce 100644 --- a/Documentation/mm/unevictable-lru.rst +++ b/Documentation/mm/unevictable-lru.rst @@ -197,7 +197,7 @@ unevictable list for the memory cgroup and node being scanned. There may be situations where a page is mapped into a VM_LOCKED VMA, but the page is not marked as PG_mlocked. Such pages will make it all the way to shrink_active_list() or shrink_page_list() where they will be detected when -vmscan walks the reverse map in page_referenced() or try_to_unmap(). The page +vmscan walks the reverse map in folio_referenced() or try_to_unmap(). The page is culled to the unevictable list when it is released by the shrinker. To "cull" an unevictable page, vmscan simply puts the page back on the LRU list @@ -267,7 +267,7 @@ the LRU. Such pages can be "noticed" by memory management in several places: (4) in the fault path and when a VM_LOCKED stack segment is expanded; or (5) as mentioned above, in vmscan:shrink_page_list() when attempting to - reclaim a page in a VM_LOCKED VMA by page_referenced() or try_to_unmap(). + reclaim a page in a VM_LOCKED VMA by folio_referenced() or try_to_unmap(). mlocked pages become unlocked and rescued from the unevictable list when: @@ -547,7 +547,7 @@ vmscan's shrink_inactive_list() and shrink_page_list() also divert obviously unevictable pages found on the inactive lists to the appropriate memory cgroup and node unevictable list. -rmap's page_referenced_one(), called via vmscan's shrink_active_list() or +rmap's folio_referenced_one(), called via vmscan's shrink_active_list() or shrink_page_list(), and rmap's try_to_unmap_one() called via shrink_page_list(), check for (3) pages still mapped into VM_LOCKED VMAs, and call mlock_vma_page() to correct them. Such pages are culled to the unevictable list when released diff --git a/Documentation/networking/bonding.rst b/Documentation/networking/bonding.rst index 7823a069a903..96cd7a26f3d9 100644 --- a/Documentation/networking/bonding.rst +++ b/Documentation/networking/bonding.rst @@ -846,7 +846,7 @@ primary_reselect tlb_dynamic_lb Specifies if dynamic shuffling of flows is enabled in tlb - mode. The value has no effect on any other modes. + or alb mode. The value has no effect on any other modes. The default behavior of tlb mode is to shuffle active flows across slaves based on the load in that interval. This gives nice lb diff --git a/Documentation/networking/decnet.rst b/Documentation/networking/decnet.rst deleted file mode 100644 index b8bc11ff8370..000000000000 --- a/Documentation/networking/decnet.rst +++ /dev/null @@ -1,243 +0,0 @@ -.. SPDX-License-Identifier: GPL-2.0 - -========================================= -Linux DECnet Networking Layer Information -========================================= - -1. Other documentation.... -========================== - - - Project Home Pages - - http://www.chygwyn.com/ - Kernel info - - http://linux-decnet.sourceforge.net/ - Userland tools - - http://www.sourceforge.net/projects/linux-decnet/ - Status page - -2. Configuring the kernel -========================= - -Be sure to turn on the following options: - - - CONFIG_DECNET (obviously) - - CONFIG_PROC_FS (to see what's going on) - - CONFIG_SYSCTL (for easy configuration) - -if you want to try out router support (not properly debugged yet) -you'll need the following options as well... - - - CONFIG_DECNET_ROUTER (to be able to add/delete routes) - - CONFIG_NETFILTER (will be required for the DECnet routing daemon) - -Don't turn on SIOCGIFCONF support for DECnet unless you are really sure -that you need it, in general you won't and it can cause ifconfig to -malfunction. - -Run time configuration has changed slightly from the 2.4 system. If you -want to configure an endnode, then the simplified procedure is as follows: - - - Set the MAC address on your ethernet card before starting _any_ other - network protocols. - -As soon as your network card is brought into the UP state, DECnet should -start working. If you need something more complicated or are unsure how -to set the MAC address, see the next section. Also all configurations which -worked with 2.4 will work under 2.5 with no change. - -3. Command line options -======================= - -You can set a DECnet address on the kernel command line for compatibility -with the 2.4 configuration procedure, but in general it's not needed any more. -If you do st a DECnet address on the command line, it has only one purpose -which is that its added to the addresses on the loopback device. - -With 2.4 kernels, DECnet would only recognise addresses as local if they -were added to the loopback device. In 2.5, any local interface address -can be used to loop back to the local machine. Of course this does not -prevent you adding further addresses to the loopback device if you -want to. - -N.B. Since the address list of an interface determines the addresses for -which "hello" messages are sent, if you don't set an address on the loopback -interface then you won't see any entries in /proc/net/neigh for the local -host until such time as you start a connection. This doesn't affect the -operation of the local communications in any other way though. - -The kernel command line takes options looking like the following:: - - decnet.addr=1,2 - -the two numbers are the node address 1,2 = 1.2 For 2.2.xx kernels -and early 2.3.xx kernels, you must use a comma when specifying the -DECnet address like this. For more recent 2.3.xx kernels, you may -use almost any character except space, although a `.` would be the most -obvious choice :-) - -There used to be a third number specifying the node type. This option -has gone away in favour of a per interface node type. This is now set -using /proc/sys/net/decnet/conf/<dev>/forwarding. This file can be -set with a single digit, 0=EndNode, 1=L1 Router and 2=L2 Router. - -There are also equivalent options for modules. The node address can -also be set through the /proc/sys/net/decnet/ files, as can other system -parameters. - -Currently the only supported devices are ethernet and ip_gre. The -ethernet address of your ethernet card has to be set according to the DECnet -address of the node in order for it to be autoconfigured (and then appear in -/proc/net/decnet_dev). There is a utility available at the above -FTP sites called dn2ethaddr which can compute the correct ethernet -address to use. The address can be set by ifconfig either before or -at the time the device is brought up. If you are using RedHat you can -add the line:: - - MACADDR=AA:00:04:00:03:04 - -or something similar, to /etc/sysconfig/network-scripts/ifcfg-eth0 or -wherever your network card's configuration lives. Setting the MAC address -of your ethernet card to an address starting with "hi-ord" will cause a -DECnet address which matches to be added to the interface (which you can -verify with iproute2). - -The default device for routing can be set through the /proc filesystem -by setting /proc/sys/net/decnet/default_device to the -device you want DECnet to route packets out of when no specific route -is available. Usually this will be eth0, for example:: - - echo -n "eth0" >/proc/sys/net/decnet/default_device - -If you don't set the default device, then it will default to the first -ethernet card which has been autoconfigured as described above. You can -confirm that by looking in the default_device file of course. - -There is a list of what the other files under /proc/sys/net/decnet/ do -on the kernel patch web site (shown above). - -4. Run time kernel configuration -================================ - - -This is either done through the sysctl/proc interface (see the kernel web -pages for details on what the various options do) or through the iproute2 -package in the same way as IPv4/6 configuration is performed. - -Documentation for iproute2 is included with the package, although there is -as yet no specific section on DECnet, most of the features apply to both -IP and DECnet, albeit with DECnet addresses instead of IP addresses and -a reduced functionality. - -If you want to configure a DECnet router you'll need the iproute2 package -since its the _only_ way to add and delete routes currently. Eventually -there will be a routing daemon to send and receive routing messages for -each interface and update the kernel routing tables accordingly. The -routing daemon will use netfilter to listen to routing packets, and -rtnetlink to update the kernels routing tables. - -The DECnet raw socket layer has been removed since it was there purely -for use by the routing daemon which will now use netfilter (a much cleaner -and more generic solution) instead. - -5. How can I tell if its working? -================================= - -Here is a quick guide of what to look for in order to know if your DECnet -kernel subsystem is working. - - - Is the node address set (see /proc/sys/net/decnet/node_address) - - Is the node of the correct type - (see /proc/sys/net/decnet/conf/<dev>/forwarding) - - Is the Ethernet MAC address of each Ethernet card set to match - the DECnet address. If in doubt use the dn2ethaddr utility available - at the ftp archive. - - If the previous two steps are satisfied, and the Ethernet card is up, - you should find that it is listed in /proc/net/decnet_dev and also - that it appears as a directory in /proc/sys/net/decnet/conf/. The - loopback device (lo) should also appear and is required to communicate - within a node. - - If you have any DECnet routers on your network, they should appear - in /proc/net/decnet_neigh, otherwise this file will only contain the - entry for the node itself (if it doesn't check to see if lo is up). - - If you want to send to any node which is not listed in the - /proc/net/decnet_neigh file, you'll need to set the default device - to point to an Ethernet card with connection to a router. This is - again done with the /proc/sys/net/decnet/default_device file. - - Try starting a simple server and client, like the dnping/dnmirror - over the loopback interface. With luck they should communicate. - For this step and those after, you'll need the DECnet library - which can be obtained from the above ftp sites as well as the - actual utilities themselves. - - If this seems to work, then try talking to a node on your local - network, and see if you can obtain the same results. - - At this point you are on your own... :-) - -6. How to send a bug report -=========================== - -If you've found a bug and want to report it, then there are several things -you can do to help me work out exactly what it is that is wrong. Useful -information (_most_ of which _is_ _essential_) includes: - - - What kernel version are you running ? - - What version of the patch are you running ? - - How far though the above set of tests can you get ? - - What is in the /proc/decnet* files and /proc/sys/net/decnet/* files ? - - Which services are you running ? - - Which client caused the problem ? - - How much data was being transferred ? - - Was the network congested ? - - How can the problem be reproduced ? - - Can you use tcpdump to get a trace ? (N.B. Most (all?) versions of - tcpdump don't understand how to dump DECnet properly, so including - the hex listing of the packet contents is _essential_, usually the -x flag. - You may also need to increase the length grabbed with the -s flag. The - -e flag also provides very useful information (ethernet MAC addresses)) - -7. MAC FAQ -========== - -A quick FAQ on ethernet MAC addresses to explain how Linux and DECnet -interact and how to get the best performance from your hardware. - -Ethernet cards are designed to normally only pass received network frames -to a host computer when they are addressed to it, or to the broadcast address. - -Linux has an interface which allows the setting of extra addresses for -an ethernet card to listen to. If the ethernet card supports it, the -filtering operation will be done in hardware, if not the extra unwanted packets -received will be discarded by the host computer. In the latter case, -significant processor time and bus bandwidth can be used up on a busy -network (see the NAPI documentation for a longer explanation of these -effects). - -DECnet makes use of this interface to allow running DECnet on an ethernet -card which has already been configured using TCP/IP (presumably using the -built in MAC address of the card, as usual) and/or to allow multiple DECnet -addresses on each physical interface. If you do this, be aware that if your -ethernet card doesn't support perfect hashing in its MAC address filter -then your computer will be doing more work than required. Some cards -will simply set themselves into promiscuous mode in order to receive -packets from the DECnet specified addresses. So if you have one of these -cards its better to set the MAC address of the card as described above -to gain the best efficiency. Better still is to use a card which supports -NAPI as well. - - -8. Mailing list -=============== - -If you are keen to get involved in development, or want to ask questions -about configuration, or even just report bugs, then there is a mailing -list that you can join, details are at: - -http://sourceforge.net/mail/?group_id=4993 - -9. Legal Info -============= - -The Linux DECnet project team have placed their code under the GPL. The -software is provided "as is" and without warranty express or implied. -DECnet is a trademark of Compaq. This software is not a product of -Compaq. We acknowledge the help of people at Compaq in providing extra -documentation above and beyond what was previously publicly available. - -Steve Whitehouse <SteveW@ACM.org> - diff --git a/Documentation/networking/device_drivers/can/freescale/flexcan.rst b/Documentation/networking/device_drivers/can/freescale/flexcan.rst index 4e3eec6cecd2..106cd2890135 100644 --- a/Documentation/networking/device_drivers/can/freescale/flexcan.rst +++ b/Documentation/networking/device_drivers/can/freescale/flexcan.rst @@ -5,7 +5,7 @@ Flexcan CAN Controller driver ============================= Authors: Marc Kleine-Budde <mkl@pengutronix.de>, -Dario Binacchi <dario.binacchi@amarula.solutions.com> +Dario Binacchi <dario.binacchi@amarulasolutions.com> On/off RTR frames reception =========================== diff --git a/Documentation/networking/device_drivers/ethernet/index.rst b/Documentation/networking/device_drivers/ethernet/index.rst index 7f1777173abb..5196905582c5 100644 --- a/Documentation/networking/device_drivers/ethernet/index.rst +++ b/Documentation/networking/device_drivers/ethernet/index.rst @@ -52,6 +52,7 @@ Contents: ti/tlan toshiba/spider_net wangxun/txgbe + wangxun/ngbe .. only:: subproject and html diff --git a/Documentation/networking/device_drivers/ethernet/wangxun/ngbe.rst b/Documentation/networking/device_drivers/ethernet/wangxun/ngbe.rst new file mode 100644 index 000000000000..43a02f9943e1 --- /dev/null +++ b/Documentation/networking/device_drivers/ethernet/wangxun/ngbe.rst @@ -0,0 +1,14 @@ +.. SPDX-License-Identifier: GPL-2.0 + +============================================================= +Linux Base Driver for WangXun(R) Gigabit PCI Express Adapters +============================================================= + +WangXun Gigabit Linux driver. +Copyright (c) 2019 - 2022 Beijing WangXun Technology Co., Ltd. + +Support +======= + If you have problems with the software or hardware, please contact our + customer support team via email at nic-support@net-swift.com or check our website + at https://www.net-swift.com diff --git a/Documentation/networking/devlink/ice.rst b/Documentation/networking/devlink/ice.rst index 8c082b139bbd..0c89ceb8986d 100644 --- a/Documentation/networking/devlink/ice.rst +++ b/Documentation/networking/devlink/ice.rst @@ -139,6 +139,42 @@ EMP firmware image. The driver does not currently support reloading the driver via ``DEVLINK_RELOAD_ACTION_DRIVER_REINIT``. +Port split +========== + +The ``ice`` driver supports port splitting only for port 0, as the FW has +a predefined set of available port split options for the whole device. + +A system reboot is required for port split to be applied. + +The following command will select the port split option with 4 ports: + +.. code:: shell + + $ devlink port split pci/0000:16:00.0/0 count 4 + +The list of all available port options will be printed to dynamic debug after +each ``split`` and ``unsplit`` command. The first option is the default. + +.. code:: shell + + ice 0000:16:00.0: Available port split options and max port speeds (Gbps): + ice 0000:16:00.0: Status Split Quad 0 Quad 1 + ice 0000:16:00.0: count L0 L1 L2 L3 L4 L5 L6 L7 + ice 0000:16:00.0: Active 2 100 - - - 100 - - - + ice 0000:16:00.0: 2 50 - 50 - - - - - + ice 0000:16:00.0: Pending 4 25 25 25 25 - - - - + ice 0000:16:00.0: 4 25 25 - - 25 25 - - + ice 0000:16:00.0: 8 10 10 10 10 10 10 10 10 + ice 0000:16:00.0: 1 100 - - - - - - - + +There could be multiple FW port options with the same port split count. When +the same port split count request is issued again, the next FW port option with +the same port split count will be selected. + +``devlink port unsplit`` will select the option with a split count of 1. If +there is no FW option available with split count 1, you will receive an error. + Regions ======= diff --git a/Documentation/networking/devlink/index.rst b/Documentation/networking/devlink/index.rst index e3a5f985673e..4b653d040627 100644 --- a/Documentation/networking/devlink/index.rst +++ b/Documentation/networking/devlink/index.rst @@ -13,10 +13,8 @@ new APIs prefixed by ``devl_*``. The older APIs handle all the locking in devlink core, but don't allow registration of most sub-objects once the main devlink object is itself registered. The newer ``devl_*`` APIs assume the devlink instance lock is already held. Drivers can take the instance -lock by calling ``devl_lock()``. It is also held in most of the callbacks. -Eventually all callbacks will be invoked under the devlink instance lock, -refer to the use of the ``DEVLINK_NL_FLAG_NO_LOCK`` flag in devlink core -to find out which callbacks are not converted, yet. +lock by calling ``devl_lock()``. It is also held all callbacks of devlink +netlink commands. Drivers are encouraged to use the devlink instance lock for their own needs. diff --git a/Documentation/networking/dsa/configuration.rst b/Documentation/networking/dsa/configuration.rst index 2b08f1a772d3..827701f8cbfe 100644 --- a/Documentation/networking/dsa/configuration.rst +++ b/Documentation/networking/dsa/configuration.rst @@ -49,6 +49,9 @@ In this documentation the following Ethernet interfaces are used: *eth0* the master interface +*eth1* + another master interface + *lan1* a slave interface @@ -360,3 +363,96 @@ the ``self`` flag) has been removed. This results in the following changes: Script writers are therefore encouraged to use the ``master static`` set of flags when working with bridge FDB entries on DSA switch interfaces. + +Affinity of user ports to CPU ports +----------------------------------- + +Typically, DSA switches are attached to the host via a single Ethernet +interface, but in cases where the switch chip is discrete, the hardware design +may permit the use of 2 or more ports connected to the host, for an increase in +termination throughput. + +DSA can make use of multiple CPU ports in two ways. First, it is possible to +statically assign the termination traffic associated with a certain user port +to be processed by a certain CPU port. This way, user space can implement +custom policies of static load balancing between user ports, by spreading the +affinities according to the available CPU ports. + +Secondly, it is possible to perform load balancing between CPU ports on a per +packet basis, rather than statically assigning user ports to CPU ports. +This can be achieved by placing the DSA masters under a LAG interface (bonding +or team). DSA monitors this operation and creates a mirror of this software LAG +on the CPU ports facing the physical DSA masters that constitute the LAG slave +devices. + +To make use of multiple CPU ports, the firmware (device tree) description of +the switch must mark all the links between CPU ports and their DSA masters +using the ``ethernet`` reference/phandle. At startup, only a single CPU port +and DSA master will be used - the numerically first port from the firmware +description which has an ``ethernet`` property. It is up to the user to +configure the system for the switch to use other masters. + +DSA uses the ``rtnl_link_ops`` mechanism (with a "dsa" ``kind``) to allow +changing the DSA master of a user port. The ``IFLA_DSA_MASTER`` u32 netlink +attribute contains the ifindex of the master device that handles each slave +device. The DSA master must be a valid candidate based on firmware node +information, or a LAG interface which contains only slaves which are valid +candidates. + +Using iproute2, the following manipulations are possible: + + .. code-block:: sh + + # See the DSA master in current use + ip -d link show dev swp0 + (...) + dsa master eth0 + + # Static CPU port distribution + ip link set swp0 type dsa master eth1 + ip link set swp1 type dsa master eth0 + ip link set swp2 type dsa master eth1 + ip link set swp3 type dsa master eth0 + + # CPU ports in LAG, using explicit assignment of the DSA master + ip link add bond0 type bond mode balance-xor && ip link set bond0 up + ip link set eth1 down && ip link set eth1 master bond0 + ip link set swp0 type dsa master bond0 + ip link set swp1 type dsa master bond0 + ip link set swp2 type dsa master bond0 + ip link set swp3 type dsa master bond0 + ip link set eth0 down && ip link set eth0 master bond0 + ip -d link show dev swp0 + (...) + dsa master bond0 + + # CPU ports in LAG, relying on implicit migration of the DSA master + ip link add bond0 type bond mode balance-xor && ip link set bond0 up + ip link set eth0 down && ip link set eth0 master bond0 + ip link set eth1 down && ip link set eth1 master bond0 + ip -d link show dev swp0 + (...) + dsa master bond0 + +Notice that in the case of CPU ports under a LAG, the use of the +``IFLA_DSA_MASTER`` netlink attribute is not strictly needed, but rather, DSA +reacts to the ``IFLA_MASTER`` attribute change of its present master (``eth0``) +and migrates all user ports to the new upper of ``eth0``, ``bond0``. Similarly, +when ``bond0`` is destroyed using ``RTM_DELLINK``, DSA migrates the user ports +that were assigned to this interface to the first physical DSA master which is +eligible, based on the firmware description (it effectively reverts to the +startup configuration). + +In a setup with more than 2 physical CPU ports, it is therefore possible to mix +static user to CPU port assignment with LAG between DSA masters. It is not +possible to statically assign a user port towards a DSA master that has any +upper interfaces (this includes LAG devices - the master must always be the LAG +in this case). + +Live changing of the DSA master (and thus CPU port) affinity of a user port is +permitted, in order to allow dynamic redistribution in response to traffic. + +Physical DSA masters are allowed to join and leave at any time a LAG interface +used as a DSA master; however, DSA will reject a LAG interface as a valid +candidate for being a DSA master unless it has at least one physical DSA master +as a slave device. diff --git a/Documentation/networking/dsa/dsa.rst b/Documentation/networking/dsa/dsa.rst index d742ba6bd211..a94ddf83348a 100644 --- a/Documentation/networking/dsa/dsa.rst +++ b/Documentation/networking/dsa/dsa.rst @@ -303,6 +303,20 @@ These frames are then queued for transmission using the master network device Ethernet switch will be able to process these incoming frames from the management interface and deliver them to the physical switch port. +When using multiple CPU ports, it is possible to stack a LAG (bonding/team) +device between the DSA slave devices and the physical DSA masters. The LAG +device is thus also a DSA master, but the LAG slave devices continue to be DSA +masters as well (just with no user port assigned to them; this is needed for +recovery in case the LAG DSA master disappears). Thus, the data path of the LAG +DSA master is used asymmetrically. On RX, the ``ETH_P_XDSA`` handler, which +calls ``dsa_switch_rcv()``, is invoked early (on the physical DSA master; +LAG slave). Therefore, the RX data path of the LAG DSA master is not used. +On the other hand, TX takes place linearly: ``dsa_slave_xmit`` calls +``dsa_enqueue_skb``, which calls ``dev_queue_xmit`` towards the LAG DSA master. +The latter calls ``dev_queue_xmit`` towards one physical DSA master or the +other, and in both cases, the packet exits the system through a hardware path +towards the switch. + Graphical representation ------------------------ @@ -629,6 +643,24 @@ Switch configuration PHY cannot be found. In this case, probing of the DSA switch continues without that particular port. +- ``port_change_master``: method through which the affinity (association used + for traffic termination purposes) between a user port and a CPU port can be + changed. By default all user ports from a tree are assigned to the first + available CPU port that makes sense for them (most of the times this means + the user ports of a tree are all assigned to the same CPU port, except for H + topologies as described in commit 2c0b03258b8b). The ``port`` argument + represents the index of the user port, and the ``master`` argument represents + the new DSA master ``net_device``. The CPU port associated with the new + master can be retrieved by looking at ``struct dsa_port *cpu_dp = + master->dsa_ptr``. Additionally, the master can also be a LAG device where + all the slave devices are physical DSA masters. LAG DSA masters also have a + valid ``master->dsa_ptr`` pointer, however this is not unique, but rather a + duplicate of the first physical DSA master's (LAG slave) ``dsa_ptr``. In case + of a LAG DSA master, a further call to ``port_lag_join`` will be emitted + separately for the physical CPU ports associated with the physical DSA + masters, requesting them to create a hardware LAG associated with the LAG + interface. + PHY devices and link management ------------------------------- @@ -1095,9 +1127,3 @@ capable hardware, but does not enforce a strict switch device driver model. On the other DSA enforces a fairly strict device driver model, and deals with most of the switch specific. At some point we should envision a merger between these two subsystems and get the best of both worlds. - -Other hanging fruits --------------------- - -- allowing more than one CPU/management interface: - http://comments.gmane.org/gmane.linux.network/365657 diff --git a/Documentation/networking/ethtool-netlink.rst b/Documentation/networking/ethtool-netlink.rst index dbca3e9ec782..d578b8bcd8a4 100644 --- a/Documentation/networking/ethtool-netlink.rst +++ b/Documentation/networking/ethtool-netlink.rst @@ -220,6 +220,8 @@ Userspace to kernel: ``ETHTOOL_MSG_PHC_VCLOCKS_GET`` get PHC virtual clocks info ``ETHTOOL_MSG_MODULE_SET`` set transceiver module parameters ``ETHTOOL_MSG_MODULE_GET`` get transceiver module parameters + ``ETHTOOL_MSG_PSE_SET`` set PSE parameters + ``ETHTOOL_MSG_PSE_GET`` get PSE parameters ===================================== ================================= Kernel to userspace: @@ -260,6 +262,7 @@ Kernel to userspace: ``ETHTOOL_MSG_STATS_GET_REPLY`` standard statistics ``ETHTOOL_MSG_PHC_VCLOCKS_GET_REPLY`` PHC virtual clocks info ``ETHTOOL_MSG_MODULE_GET_REPLY`` transceiver module parameters + ``ETHTOOL_MSG_PSE_GET_REPLY`` PSE parameters ======================================== ================================= ``GET`` requests are sent by userspace applications to retrieve device @@ -426,6 +429,7 @@ Kernel response contents: ``ETHTOOL_A_LINKMODES_DUPLEX`` u8 duplex mode ``ETHTOOL_A_LINKMODES_MASTER_SLAVE_CFG`` u8 Master/slave port mode ``ETHTOOL_A_LINKMODES_MASTER_SLAVE_STATE`` u8 Master/slave port state + ``ETHTOOL_A_LINKMODES_RATE_MATCHING`` u8 PHY rate matching ========================================== ====== ========================== For ``ETHTOOL_A_LINKMODES_OURS``, value represents advertised modes and mask @@ -449,6 +453,7 @@ Request contents: ``ETHTOOL_A_LINKMODES_SPEED`` u32 link speed (Mb/s) ``ETHTOOL_A_LINKMODES_DUPLEX`` u8 duplex mode ``ETHTOOL_A_LINKMODES_MASTER_SLAVE_CFG`` u8 Master/slave port mode + ``ETHTOOL_A_LINKMODES_RATE_MATCHING`` u8 PHY rate matching ``ETHTOOL_A_LINKMODES_LANES`` u32 lanes ========================================== ====== ========================== @@ -1625,6 +1630,62 @@ For SFF-8636 modules, low power mode is forced by the host according to table For CMIS modules, low power mode is forced by the host according to table 6-12 in revision 5.0 of the specification. +PSE_GET +======= + +Gets PSE attributes. + +Request contents: + + ===================================== ====== ========================== + ``ETHTOOL_A_PSE_HEADER`` nested request header + ===================================== ====== ========================== + +Kernel response contents: + + ====================================== ====== ============================= + ``ETHTOOL_A_PSE_HEADER`` nested reply header + ``ETHTOOL_A_PODL_PSE_ADMIN_STATE`` u32 Operational state of the PoDL + PSE functions + ``ETHTOOL_A_PODL_PSE_PW_D_STATUS`` u32 power detection status of the + PoDL PSE. + ====================================== ====== ============================= + +When set, the optional ``ETHTOOL_A_PODL_PSE_ADMIN_STATE`` attribute identifies +the operational state of the PoDL PSE functions. The operational state of the +PSE function can be changed using the ``ETHTOOL_A_PODL_PSE_ADMIN_CONTROL`` +action. This option is corresponding to ``IEEE 802.3-2018`` 30.15.1.1.2 +aPoDLPSEAdminState. Possible values are: + +.. kernel-doc:: include/uapi/linux/ethtool.h + :identifiers: ethtool_podl_pse_admin_state + +When set, the optional ``ETHTOOL_A_PODL_PSE_PW_D_STATUS`` attribute identifies +the power detection status of the PoDL PSE. The status depend on internal PSE +state machine and automatic PD classification support. This option is +corresponding to ``IEEE 802.3-2018`` 30.15.1.1.3 aPoDLPSEPowerDetectionStatus. +Possible values are: + +.. kernel-doc:: include/uapi/linux/ethtool.h + :identifiers: ethtool_podl_pse_pw_d_status + +PSE_SET +======= + +Sets PSE parameters. + +Request contents: + + ====================================== ====== ============================= + ``ETHTOOL_A_PSE_HEADER`` nested request header + ``ETHTOOL_A_PODL_PSE_ADMIN_CONTROL`` u32 Control PoDL PSE Admin state + ====================================== ====== ============================= + +When set, the optional ``ETHTOOL_A_PODL_PSE_ADMIN_CONTROL`` attribute is used +to control PoDL PSE Admin functions. This option is implementing +``IEEE 802.3-2018`` 30.15.1.2.1 acPoDLPSEAdminControl. See +``ETHTOOL_A_PODL_PSE_ADMIN_STATE`` for supported values. + Request translation =================== diff --git a/Documentation/networking/index.rst b/Documentation/networking/index.rst index 03b215bddde8..16a153bcc5fe 100644 --- a/Documentation/networking/index.rst +++ b/Documentation/networking/index.rst @@ -47,7 +47,6 @@ Contents: cdc_mbim dccp dctcp - decnet dns_resolver driver eql @@ -93,6 +92,7 @@ Contents: radiotap-headers rds regulatory + representors rxrpc sctp secid diff --git a/Documentation/networking/ip-sysctl.rst b/Documentation/networking/ip-sysctl.rst index a759872a2883..e7b3fa7bb3f7 100644 --- a/Documentation/networking/ip-sysctl.rst +++ b/Documentation/networking/ip-sysctl.rst @@ -1040,6 +1040,35 @@ tcp_challenge_ack_limit - INTEGER TCP stack implements per TCP socket limits anyway. Default: INT_MAX (unlimited) +tcp_ehash_entries - INTEGER + Show the number of hash buckets for TCP sockets in the current + networking namespace. + + A negative value means the networking namespace does not own its + hash buckets and shares the initial networking namespace's one. + +tcp_child_ehash_entries - INTEGER + Control the number of hash buckets for TCP sockets in the child + networking namespace, which must be set before clone() or unshare(). + + If the value is not 0, the kernel uses a value rounded up to 2^n + as the actual hash bucket size. 0 is a special value, meaning + the child networking namespace will share the initial networking + namespace's hash buckets. + + Note that the child will use the global one in case the kernel + fails to allocate enough memory. In addition, the global hash + buckets are spread over available NUMA nodes, but the allocation + of the child hash table depends on the current process's NUMA + policy, which could result in performance differences. + + Note also that the default value of tcp_max_tw_buckets and + tcp_max_syn_backlog depend on the hash bucket size. + + Possible values: 0, 2^n (n: 0 - 24 (16Mi)) + + Default: 0 + UDP variables ============= diff --git a/Documentation/networking/mptcp-sysctl.rst b/Documentation/networking/mptcp-sysctl.rst index e263dfcc4b40..213510698014 100644 --- a/Documentation/networking/mptcp-sysctl.rst +++ b/Documentation/networking/mptcp-sysctl.rst @@ -47,7 +47,6 @@ allow_join_initial_addr_port - BOOLEAN Default: 1 pm_type - INTEGER - Set the default path manager type to use for each new MPTCP socket. In-kernel path management will control subflow connections and address advertisements according to diff --git a/Documentation/networking/nf_conntrack-sysctl.rst b/Documentation/networking/nf_conntrack-sysctl.rst index 834945ebc4cd..1120d71f28d7 100644 --- a/Documentation/networking/nf_conntrack-sysctl.rst +++ b/Documentation/networking/nf_conntrack-sysctl.rst @@ -70,15 +70,6 @@ nf_conntrack_generic_timeout - INTEGER (seconds) Default for generic timeout. This refers to layer 4 unknown/unsupported protocols. -nf_conntrack_helper - BOOLEAN - - 0 - disabled (default) - - not 0 - enabled - - Enable automatic conntrack helper assignment. - If disabled it is required to set up iptables rules to assign - helpers to connections. See the CT target description in the - iptables-extensions(8) man page for further information. - nf_conntrack_icmp_timeout - INTEGER (seconds) default 30 diff --git a/Documentation/networking/phy.rst b/Documentation/networking/phy.rst index 704f31da5167..06f4fcdb58b6 100644 --- a/Documentation/networking/phy.rst +++ b/Documentation/networking/phy.rst @@ -308,6 +308,21 @@ Some of the interface modes are described below: rate of 125Mpbs using a 4B/5B encoding scheme, resulting in an underlying data rate of 100Mpbs. +``PHY_INTERFACE_MODE_QUSGMII`` + This defines the Cisco the Quad USGMII mode, which is the Quad variant of + the USGMII (Universal SGMII) link. It's very similar to QSGMII, but uses + a Packet Control Header (PCH) instead of the 7 bytes preamble to carry not + only the port id, but also so-called "extensions". The only documented + extension so-far in the specification is the inclusion of timestamps, for + PTP-enabled PHYs. This mode isn't compatible with QSGMII, but offers the + same capabilities in terms of link speed and negociation. + +``PHY_INTERFACE_MODE_1000BASEKX`` + This is 1000BASE-X as defined by IEEE 802.3 Clause 36 with Clause 73 + autonegotiation. Generally, it will be used with a Clause 70 PMD. To + contrast with the 1000BASE-X phy mode used for Clause 38 and 39 PMDs, this + interface mode has different autonegotiation and only supports full duplex. + Pause frames / flow control =========================== diff --git a/Documentation/networking/representors.rst b/Documentation/networking/representors.rst new file mode 100644 index 000000000000..ee1f5cd54496 --- /dev/null +++ b/Documentation/networking/representors.rst @@ -0,0 +1,259 @@ +.. SPDX-License-Identifier: GPL-2.0 + +============================= +Network Function Representors +============================= + +This document describes the semantics and usage of representor netdevices, as +used to control internal switching on SmartNICs. For the closely-related port +representors on physical (multi-port) switches, see +:ref:`Documentation/networking/switchdev.rst <switchdev>`. + +Motivation +---------- + +Since the mid-2010s, network cards have started offering more complex +virtualisation capabilities than the legacy SR-IOV approach (with its simple +MAC/VLAN-based switching model) can support. This led to a desire to offload +software-defined networks (such as OpenVSwitch) to these NICs to specify the +network connectivity of each function. The resulting designs are variously +called SmartNICs or DPUs. + +Network function representors bring the standard Linux networking stack to +virtual switches and IOV devices. Just as each physical port of a Linux- +controlled switch has a separate netdev, so does each virtual port of a virtual +switch. +When the system boots, and before any offload is configured, all packets from +the virtual functions appear in the networking stack of the PF via the +representors. The PF can thus always communicate freely with the virtual +functions. +The PF can configure standard Linux forwarding between representors, the uplink +or any other netdev (routing, bridging, TC classifiers). + +Thus, a representor is both a control plane object (representing the function in +administrative commands) and a data plane object (one end of a virtual pipe). +As a virtual link endpoint, the representor can be configured like any other +netdevice; in some cases (e.g. link state) the representee will follow the +representor's configuration, while in others there are separate APIs to +configure the representee. + +Definitions +----------- + +This document uses the term "switchdev function" to refer to the PCIe function +which has administrative control over the virtual switch on the device. +Typically, this will be a PF, but conceivably a NIC could be configured to grant +these administrative privileges instead to a VF or SF (subfunction). +Depending on NIC design, a multi-port NIC might have a single switchdev function +for the whole device or might have a separate virtual switch, and hence +switchdev function, for each physical network port. +If the NIC supports nested switching, there might be separate switchdev +functions for each nested switch, in which case each switchdev function should +only create representors for the ports on the (sub-)switch it directly +administers. + +A "representee" is the object that a representor represents. So for example in +the case of a VF representor, the representee is the corresponding VF. + +What does a representor do? +--------------------------- + +A representor has three main roles. + +1. It is used to configure the network connection the representee sees, e.g. + link up/down, MTU, etc. For instance, bringing the representor + administratively UP should cause the representee to see a link up / carrier + on event. +2. It provides the slow path for traffic which does not hit any offloaded + fast-path rules in the virtual switch. Packets transmitted on the + representor netdevice should be delivered to the representee; packets + transmitted by the representee which fail to match any switching rule should + be received on the representor netdevice. (That is, there is a virtual pipe + connecting the representor to the representee, similar in concept to a veth + pair.) + This allows software switch implementations (such as OpenVSwitch or a Linux + bridge) to forward packets between representees and the rest of the network. +3. It acts as a handle by which switching rules (such as TC filters) can refer + to the representee, allowing these rules to be offloaded. + +The combination of 2) and 3) means that the behaviour (apart from performance) +should be the same whether a TC filter is offloaded or not. E.g. a TC rule +on a VF representor applies in software to packets received on that representor +netdevice, while in hardware offload it would apply to packets transmitted by +the representee VF. Conversely, a mirred egress redirect to a VF representor +corresponds in hardware to delivery directly to the representee VF. + +What functions should have a representor? +----------------------------------------- + +Essentially, for each virtual port on the device's internal switch, there +should be a representor. +Some vendors have chosen to omit representors for the uplink and the physical +network port, which can simplify usage (the uplink netdev becomes in effect the +physical port's representor) but does not generalise to devices with multiple +ports or uplinks. + +Thus, the following should all have representors: + + - VFs belonging to the switchdev function. + - Other PFs on the local PCIe controller, and any VFs belonging to them. + - PFs and VFs on external PCIe controllers on the device (e.g. for any embedded + System-on-Chip within the SmartNIC). + - PFs and VFs with other personalities, including network block devices (such + as a vDPA virtio-blk PF backed by remote/distributed storage), if (and only + if) their network access is implemented through a virtual switch port. [#]_ + Note that such functions can require a representor despite the representee + not having a netdev. + - Subfunctions (SFs) belonging to any of the above PFs or VFs, if they have + their own port on the switch (as opposed to using their parent PF's port). + - Any accelerators or plugins on the device whose interface to the network is + through a virtual switch port, even if they do not have a corresponding PCIe + PF or VF. + +This allows the entire switching behaviour of the NIC to be controlled through +representor TC rules. + +It is a common misunderstanding to conflate virtual ports with PCIe virtual +functions or their netdevs. While in simple cases there will be a 1:1 +correspondence between VF netdevices and VF representors, more advanced device +configurations may not follow this. +A PCIe function which does not have network access through the internal switch +(not even indirectly through the hardware implementation of whatever services +the function provides) should *not* have a representor (even if it has a +netdev). +Such a function has no switch virtual port for the representor to configure or +to be the other end of the virtual pipe. +The representor represents the virtual port, not the PCIe function nor the 'end +user' netdevice. + +.. [#] The concept here is that a hardware IP stack in the device performs the + translation between block DMA requests and network packets, so that only + network packets pass through the virtual port onto the switch. The network + access that the IP stack "sees" would then be configurable through tc rules; + e.g. its traffic might all be wrapped in a specific VLAN or VxLAN. However, + any needed configuration of the block device *qua* block device, not being a + networking entity, would not be appropriate for the representor and would + thus use some other channel such as devlink. + Contrast this with the case of a virtio-blk implementation which forwards the + DMA requests unchanged to another PF whose driver then initiates and + terminates IP traffic in software; in that case the DMA traffic would *not* + run over the virtual switch and the virtio-blk PF should thus *not* have a + representor. + +How are representors created? +----------------------------- + +The driver instance attached to the switchdev function should, for each virtual +port on the switch, create a pure-software netdevice which has some form of +in-kernel reference to the switchdev function's own netdevice or driver private +data (``netdev_priv()``). +This may be by enumerating ports at probe time, reacting dynamically to the +creation and destruction of ports at run time, or a combination of the two. + +The operations of the representor netdevice will generally involve acting +through the switchdev function. For example, ``ndo_start_xmit()`` might send +the packet through a hardware TX queue attached to the switchdev function, with +either packet metadata or queue configuration marking it for delivery to the +representee. + +How are representors identified? +-------------------------------- + +The representor netdevice should *not* directly refer to a PCIe device (e.g. +through ``net_dev->dev.parent`` / ``SET_NETDEV_DEV()``), either of the +representee or of the switchdev function. +Instead, it should implement the ``ndo_get_devlink_port()`` netdevice op, which +the kernel uses to provide the ``phys_switch_id`` and ``phys_port_name`` sysfs +nodes. (Some legacy drivers implement ``ndo_get_port_parent_id()`` and +``ndo_get_phys_port_name()`` directly, but this is deprecated.) See +:ref:`Documentation/networking/devlink/devlink-port.rst <devlink_port>` for the +details of this API. + +It is expected that userland will use this information (e.g. through udev rules) +to construct an appropriately informative name or alias for the netdevice. For +instance if the switchdev function is ``eth4`` then a representor with a +``phys_port_name`` of ``p0pf1vf2`` might be renamed ``eth4pf1vf2rep``. + +There are as yet no established conventions for naming representors which do not +correspond to PCIe functions (e.g. accelerators and plugins). + +How do representors interact with TC rules? +------------------------------------------- + +Any TC rule on a representor applies (in software TC) to packets received by +that representor netdevice. Thus, if the delivery part of the rule corresponds +to another port on the virtual switch, the driver may choose to offload it to +hardware, applying it to packets transmitted by the representee. + +Similarly, since a TC mirred egress action targeting the representor would (in +software) send the packet through the representor (and thus indirectly deliver +it to the representee), hardware offload should interpret this as delivery to +the representee. + +As a simple example, if ``PORT_DEV`` is the physical port representor and +``REP_DEV`` is a VF representor, the following rules:: + + tc filter add dev $REP_DEV parent ffff: protocol ipv4 flower \ + action mirred egress redirect dev $PORT_DEV + tc filter add dev $PORT_DEV parent ffff: protocol ipv4 flower skip_sw \ + action mirred egress mirror dev $REP_DEV + +would mean that all IPv4 packets from the VF are sent out the physical port, and +all IPv4 packets received on the physical port are delivered to the VF in +addition to ``PORT_DEV``. (Note that without ``skip_sw`` on the second rule, +the VF would get two copies, as the packet reception on ``PORT_DEV`` would +trigger the TC rule again and mirror the packet to ``REP_DEV``.) + +On devices without separate port and uplink representors, ``PORT_DEV`` would +instead be the switchdev function's own uplink netdevice. + +Of course the rules can (if supported by the NIC) include packet-modifying +actions (e.g. VLAN push/pop), which should be performed by the virtual switch. + +Tunnel encapsulation and decapsulation are rather more complicated, as they +involve a third netdevice (a tunnel netdev operating in metadata mode, such as +a VxLAN device created with ``ip link add vxlan0 type vxlan external``) and +require an IP address to be bound to the underlay device (e.g. switchdev +function uplink netdev or port representor). TC rules such as:: + + tc filter add dev $REP_DEV parent ffff: flower \ + action tunnel_key set id $VNI src_ip $LOCAL_IP dst_ip $REMOTE_IP \ + dst_port 4789 \ + action mirred egress redirect dev vxlan0 + tc filter add dev vxlan0 parent ffff: flower enc_src_ip $REMOTE_IP \ + enc_dst_ip $LOCAL_IP enc_key_id $VNI enc_dst_port 4789 \ + action tunnel_key unset action mirred egress redirect dev $REP_DEV + +where ``LOCAL_IP`` is an IP address bound to ``PORT_DEV``, and ``REMOTE_IP`` is +another IP address on the same subnet, mean that packets sent by the VF should +be VxLAN encapsulated and sent out the physical port (the driver has to deduce +this by a route lookup of ``LOCAL_IP`` leading to ``PORT_DEV``, and also +perform an ARP/neighbour table lookup to find the MAC addresses to use in the +outer Ethernet frame), while UDP packets received on the physical port with UDP +port 4789 should be parsed as VxLAN and, if their VSID matches ``$VNI``, +decapsulated and forwarded to the VF. + +If this all seems complicated, just remember the 'golden rule' of TC offload: +the hardware should ensure the same final results as if the packets were +processed through the slow path, traversed software TC (except ignoring any +``skip_hw`` rules and applying any ``skip_sw`` rules) and were transmitted or +received through the representor netdevices. + +Configuring the representee's MAC +--------------------------------- + +The representee's link state is controlled through the representor. Setting the +representor administratively UP or DOWN should cause carrier ON or OFF at the +representee. + +Setting an MTU on the representor should cause that same MTU to be reported to +the representee. +(On hardware that allows configuring separate and distinct MTU and MRU values, +the representor MTU should correspond to the representee's MRU and vice-versa.) + +Currently there is no way to use the representor to set the station permanent +MAC address of the representee; other methods available to do this include: + + - legacy SR-IOV (``ip link set DEVICE vf NUM mac LLADDR``) + - devlink port function (see **devlink-port(8)** and + :ref:`Documentation/networking/devlink/devlink-port.rst <devlink_port>`) diff --git a/Documentation/networking/rxrpc.rst b/Documentation/networking/rxrpc.rst index 39c2249c7aa7..39494a6ea739 100644 --- a/Documentation/networking/rxrpc.rst +++ b/Documentation/networking/rxrpc.rst @@ -1055,17 +1055,6 @@ The kernel interface functions are as follows: first function to change. Note that this must be called in TASK_RUNNING state. - (#) Get reply timestamp:: - - bool rxrpc_kernel_get_reply_time(struct socket *sock, - struct rxrpc_call *call, - ktime_t *_ts) - - This allows the timestamp on the first DATA packet of the reply of a - client call to be queried, provided that it is still in the Rx ring. If - successful, the timestamp will be stored into ``*_ts`` and true will be - returned; false will be returned otherwise. - (#) Get remote client epoch:: u32 rxrpc_kernel_get_epoch(struct socket *sock, diff --git a/Documentation/networking/smc-sysctl.rst b/Documentation/networking/smc-sysctl.rst index 742e90e6d822..6d8acdbe9be1 100644 --- a/Documentation/networking/smc-sysctl.rst +++ b/Documentation/networking/smc-sysctl.rst @@ -34,3 +34,28 @@ smcr_buf_type - INTEGER - 1 - Use virtually contiguous buffers - 2 - Mixed use of the two types. Try physically contiguous buffers first. If not available, use virtually contiguous buffers then. + +smcr_testlink_time - INTEGER + How frequently SMC-R link sends out TEST_LINK LLC messages to confirm + viability, after the last activity of connections on it. Value 0 means + disabling TEST_LINK. + + Default: 30 seconds. + +wmem - INTEGER + Initial size of send buffer used by SMC sockets. + The default value inherits from net.ipv4.tcp_wmem[1]. + + The minimum value is 16KiB and there is no hard limit for max value, but + only allowed 512KiB for SMC-R and 1MiB for SMC-D. + + Default: 16K + +rmem - INTEGER + Initial size of receive buffer (RMB) used by SMC sockets. + The default value inherits from net.ipv4.tcp_rmem[1]. + + The minimum value is 16KiB and there is no hard limit for max value, but + only allowed 512KiB for SMC-R and 1MiB for SMC-D. + + Default: 128K diff --git a/Documentation/networking/switchdev.rst b/Documentation/networking/switchdev.rst index bbf272e9d607..758f1dae3fce 100644 --- a/Documentation/networking/switchdev.rst +++ b/Documentation/networking/switchdev.rst @@ -1,5 +1,6 @@ .. SPDX-License-Identifier: GPL-2.0 .. include:: <isonum.txt> +.. _switchdev: =============================================== Ethernet switch device driver model (switchdev) diff --git a/Documentation/powerpc/isa-versions.rst b/Documentation/powerpc/isa-versions.rst index dfcb1097dce4..a8d6b6028b3e 100644 --- a/Documentation/powerpc/isa-versions.rst +++ b/Documentation/powerpc/isa-versions.rst @@ -4,12 +4,16 @@ CPU to ISA Version Mapping Mapping of some CPU versions to relevant ISA versions. +Note Power4 and Power4+ are not supported. + ========= ==================================================================== CPU Architecture version ========= ==================================================================== Power10 Power ISA v3.1 Power9 Power ISA v3.0B Power8 Power ISA v2.07 +e6500 Power ISA v2.06 with some exceptions +e5500 Power ISA v2.06 with some exceptions, no Altivec Power7 Power ISA v2.06 Power6 Power ISA v2.05 PA6T Power ISA v2.04 @@ -24,6 +28,12 @@ PPC970 - PowerPC User Instruction Set Architecture Book I v2.01 - PowerPC Virtual Environment Architecture Book II v2.01 - PowerPC Operating Environment Architecture Book III v2.01 - Plus Altivec/VMX ~= 2.03 +Power4+ - PowerPC User Instruction Set Architecture Book I v2.01 + - PowerPC Virtual Environment Architecture Book II v2.01 + - PowerPC Operating Environment Architecture Book III v2.01 +Power4 - PowerPC User Instruction Set Architecture Book I v2.00 + - PowerPC Virtual Environment Architecture Book II v2.00 + - PowerPC Operating Environment Architecture Book III v2.00 ========= ==================================================================== @@ -36,6 +46,8 @@ CPU VMX (aka. Altivec) Power10 Yes Power9 Yes Power8 Yes +e6500 Yes +e5500 No Power7 Yes Power6 Yes PA6T Yes @@ -44,6 +56,8 @@ Power5++ No Power5+ No Power5 No PPC970 Yes +Power4+ No +Power4 No ========== ================== ========== ==== @@ -52,6 +66,8 @@ CPU VSX Power10 Yes Power9 Yes Power8 Yes +e6500 No +e5500 No Power7 Yes Power6 No PA6T No @@ -60,6 +76,8 @@ Power5++ No Power5+ No Power5 No PPC970 No +Power4+ No +Power4 No ========== ==== ========== ==================================== @@ -68,6 +86,8 @@ CPU Transactional Memory Power10 No (* see Power ISA v3.1, "Appendix A. Notes on the Removal of Transactional Memory from the Architecture") Power9 Yes (* see transactional_memory.txt) Power8 Yes +e6500 No +e5500 No Power7 No Power6 No PA6T No @@ -76,4 +96,6 @@ Power5++ No Power5+ No Power5 No PPC970 No +Power4+ No +Power4 No ========== ==================================== diff --git a/Documentation/process/5.Posting.rst b/Documentation/process/5.Posting.rst index 906235c11c24..d87f1fee4cbc 100644 --- a/Documentation/process/5.Posting.rst +++ b/Documentation/process/5.Posting.rst @@ -256,8 +256,10 @@ The tags in common use are: - Cc: the named person received a copy of the patch and had the opportunity to comment on it. -Be careful in the addition of tags to your patches: only Cc: is appropriate -for addition without the explicit permission of the person named. +Be careful in the addition of tags to your patches, as only Cc: is appropriate +for addition without the explicit permission of the person named; using +Reported-by: is fine most of the time as well, but ask for permission if +the bug was reported in private. Sending the patch diff --git a/Documentation/process/changes.rst b/Documentation/process/changes.rst index 19c286c23786..9844ca3a71a6 100644 --- a/Documentation/process/changes.rst +++ b/Documentation/process/changes.rst @@ -31,7 +31,9 @@ you probably needn't concern yourself with pcmciautils. ====================== =============== ======================================== GNU C 5.1 gcc --version Clang/LLVM (optional) 11.0.0 clang --version -GNU make 3.81 make --version +Rust (optional) 1.62.0 rustc --version +bindgen (optional) 0.56.0 bindgen --version +GNU make 3.82 make --version bash 4.2 bash --version binutils 2.23 ld -v flex 2.5.35 flex --version @@ -80,10 +82,33 @@ kernels. Older releases aren't guaranteed to work, and we may drop workarounds from the kernel that were used to support older versions. Please see additional docs on :ref:`Building Linux with Clang/LLVM <kbuild_llvm>`. +Rust (optional) +--------------- + +A particular version of the Rust toolchain is required. Newer versions may or +may not work because the kernel depends on some unstable Rust features, for +the moment. + +Each Rust toolchain comes with several "components", some of which are required +(like ``rustc``) and some that are optional. The ``rust-src`` component (which +is optional) needs to be installed to build the kernel. Other components are +useful for developing. + +Please see Documentation/rust/quick-start.rst for instructions on how to +satisfy the build requirements of Rust support. In particular, the ``Makefile`` +target ``rustavailable`` is useful to check why the Rust toolchain may not +be detected. + +bindgen (optional) +------------------ + +``bindgen`` is used to generate the Rust bindings to the C side of the kernel. +It depends on ``libclang``. + Make ---- -You will need GNU make 3.81 or later to build the kernel. +You will need GNU make 3.82 or later to build the kernel. Bash ---- @@ -348,6 +373,12 @@ Sphinx Please see :ref:`sphinx_install` in :ref:`Documentation/doc-guide/sphinx.rst <sphinxdoc>` for details about Sphinx requirements. +rustdoc +------- + +``rustdoc`` is used to generate the documentation for Rust code. Please see +Documentation/rust/general-information.rst for more information. + Getting updated software ======================== @@ -364,6 +395,16 @@ Clang/LLVM - :ref:`Getting LLVM <getting_llvm>`. +Rust +---- + +- Documentation/rust/quick-start.rst. + +bindgen +------- + +- Documentation/rust/quick-start.rst. + Make ---- diff --git a/Documentation/process/code-of-conduct-interpretation.rst b/Documentation/process/code-of-conduct-interpretation.rst index e899f14a4ba2..922e0b547bc3 100644 --- a/Documentation/process/code-of-conduct-interpretation.rst +++ b/Documentation/process/code-of-conduct-interpretation.rst @@ -51,7 +51,7 @@ the Technical Advisory Board (TAB) or other maintainers if you're uncertain how to handle situations that come up. It will not be considered a violation report unless you want it to be. If you are uncertain about approaching the TAB or any other maintainers, please -reach out to our conflict mediator, Mishi Choudhary <mishi@linux.com>. +reach out to our conflict mediator, Joanna Lee <joanna.lee@gesmer.com>. In the end, "be kind to each other" is really what the end goal is for everybody. We know everyone is human and we all fail at times, but the @@ -127,10 +127,12 @@ are listed at https://kernel.org/code-of-conduct.html. Members can not access reports made before they joined or after they have left the committee. -The initial Code of Conduct Committee consists of volunteer members of -the TAB, as well as a professional mediator acting as a neutral third -party. The first task of the committee is to establish documented -processes, which will be made public. +The Code of Conduct Committee consists of volunteer community members +appointed by the TAB, as well as a professional mediator acting as a +neutral third party. The processes the Code of Conduct committee will +use to address reports is varied and will depend on the individual +circumstance, however, this file serves as documentation for the +general process used. Any member of the committee, including the mediator, can be contacted directly if a reporter does not wish to include the full committee in a @@ -141,16 +143,16 @@ processes (see above) and consults with the TAB as needed and appropriate, for instance to request and receive information about the kernel community. -Any decisions by the committee will be brought to the TAB, for -implementation of enforcement with the relevant maintainers if needed. -A decision by the Code of Conduct Committee can be overturned by the TAB -by a two-thirds vote. +Any decisions regarding enforcement recommendations will be brought to +the TAB for implementation of enforcement with the relevant maintainers +if needed. A decision by the Code of Conduct Committee can be overturned +by the TAB by a two-thirds vote. At quarterly intervals, the Code of Conduct Committee and TAB will provide a report summarizing the anonymised reports that the Code of Conduct committee has received and their status, as well details of any overridden decisions including complete and identifiable voting details. -We expect to establish a different process for Code of Conduct Committee -staffing beyond the bootstrap period. This document will be updated -with that information when this occurs. +Because how we interpret and enforce the Code of Conduct will evolve over +time, this document will be updated when necessary to reflect any +changes. diff --git a/Documentation/process/coding-style.rst b/Documentation/process/coding-style.rst index 03eb53fd029a..007e49ef6cec 100644 --- a/Documentation/process/coding-style.rst +++ b/Documentation/process/coding-style.rst @@ -1186,6 +1186,68 @@ expression used. For instance: #endif /* CONFIG_SOMETHING */ +22) Do not crash the kernel +--------------------------- + +In general, the decision to crash the kernel belongs to the user, rather +than to the kernel developer. + +Avoid panic() +************* + +panic() should be used with care and primarily only during system boot. +panic() is, for example, acceptable when running out of memory during boot and +not being able to continue. + +Use WARN() rather than BUG() +**************************** + +Do not add new code that uses any of the BUG() variants, such as BUG(), +BUG_ON(), or VM_BUG_ON(). Instead, use a WARN*() variant, preferably +WARN_ON_ONCE(), and possibly with recovery code. Recovery code is not +required if there is no reasonable way to at least partially recover. + +"I'm too lazy to do error handling" is not an excuse for using BUG(). Major +internal corruptions with no way of continuing may still use BUG(), but need +good justification. + +Use WARN_ON_ONCE() rather than WARN() or WARN_ON() +************************************************** + +WARN_ON_ONCE() is generally preferred over WARN() or WARN_ON(), because it +is common for a given warning condition, if it occurs at all, to occur +multiple times. This can fill up and wrap the kernel log, and can even slow +the system enough that the excessive logging turns into its own, additional +problem. + +Do not WARN lightly +******************* + +WARN*() is intended for unexpected, this-should-never-happen situations. +WARN*() macros are not to be used for anything that is expected to happen +during normal operation. These are not pre- or post-condition asserts, for +example. Again: WARN*() must not be used for a condition that is expected +to trigger easily, for example, by user space actions. pr_warn_once() is a +possible alternative, if you need to notify the user of a problem. + +Do not worry about panic_on_warn users +************************************** + +A few more words about panic_on_warn: Remember that ``panic_on_warn`` is an +available kernel option, and that many users set this option. This is why +there is a "Do not WARN lightly" writeup, above. However, the existence of +panic_on_warn users is not a valid reason to avoid the judicious use +WARN*(). That is because, whoever enables panic_on_warn has explicitly +asked the kernel to crash if a WARN*() fires, and such users must be +prepared to deal with the consequences of a system that is somewhat more +likely to crash. + +Use BUILD_BUG_ON() for compile-time assertions +********************************************** + +The use of BUILD_BUG_ON() is acceptable and encouraged, because it is a +compile-time assertion that has no effect at runtime. + Appendix I) References ---------------------- diff --git a/Documentation/process/deprecated.rst b/Documentation/process/deprecated.rst index a6e36d9c3d14..c8fd53a11a20 100644 --- a/Documentation/process/deprecated.rst +++ b/Documentation/process/deprecated.rst @@ -138,17 +138,20 @@ be NUL terminated. This can lead to various linear read overflows and other misbehavior due to the missing termination. It also NUL-pads the destination buffer if the source contents are shorter than the destination buffer size, which may be a needless performance penalty -for callers using only NUL-terminated strings. The safe replacement is +for callers using only NUL-terminated strings. + +When the destination is required to be NUL-terminated, the replacement is strscpy(), though care must be given to any cases where the return value of strncpy() was used, since strscpy() does not return a pointer to the destination, but rather a count of non-NUL bytes copied (or negative errno when it truncates). Any cases still needing NUL-padding should instead use strscpy_pad(). -If a caller is using non-NUL-terminated strings, strncpy() can -still be used, but destinations should be marked with the `__nonstring +If a caller is using non-NUL-terminated strings, strtomem() should be +used, and the destinations should be marked with the `__nonstring <https://gcc.gnu.org/onlinedocs/gcc/Common-Variable-Attributes.html>`_ -attribute to avoid future compiler warnings. +attribute to avoid future compiler warnings. For cases still needing +NUL-padding, strtomem_pad() can be used. strlcpy() --------- diff --git a/Documentation/process/index.rst b/Documentation/process/index.rst index 2ba2a1582bbe..d4b6217472b0 100644 --- a/Documentation/process/index.rst +++ b/Documentation/process/index.rst @@ -5,6 +5,7 @@ .. _process_index: +============================================= Working with the kernel development community ============================================= diff --git a/Documentation/process/magic-number.rst b/Documentation/process/magic-number.rst index f5ba36e96461..64b5948fc1d4 100644 --- a/Documentation/process/magic-number.rst +++ b/Documentation/process/magic-number.rst @@ -69,86 +69,17 @@ Changelog:: Magic Name Number Structure File ===================== ================ ======================== ========================================== PG_MAGIC 'P' pg_{read,write}_hdr ``include/linux/pg.h`` -CMAGIC 0x0111 user ``include/linux/a.out.h`` -MKISS_DRIVER_MAGIC 0x04bf mkiss_channel ``drivers/net/mkiss.h`` -HDLC_MAGIC 0x239e n_hdlc ``drivers/char/n_hdlc.c`` APM_BIOS_MAGIC 0x4101 apm_user ``arch/x86/kernel/apm_32.c`` -DB_MAGIC 0x4442 fc_info ``drivers/net/iph5526_novram.c`` -DL_MAGIC 0x444d fc_info ``drivers/net/iph5526_novram.c`` FASYNC_MAGIC 0x4601 fasync_struct ``include/linux/fs.h`` -FF_MAGIC 0x4646 fc_info ``drivers/net/iph5526_novram.c`` -PTY_MAGIC 0x5001 ``drivers/char/pty.c`` -PPP_MAGIC 0x5002 ppp ``include/linux/if_pppvar.h`` -SSTATE_MAGIC 0x5302 serial_state ``include/linux/serial.h`` SLIP_MAGIC 0x5302 slip ``drivers/net/slip.h`` -STRIP_MAGIC 0x5303 strip ``drivers/net/strip.c`` -SIXPACK_MAGIC 0x5304 sixpack ``drivers/net/hamradio/6pack.h`` -AX25_MAGIC 0x5316 ax_disp ``drivers/net/mkiss.h`` -TTY_MAGIC 0x5401 tty_struct ``include/linux/tty.h`` -MGSL_MAGIC 0x5401 mgsl_info ``drivers/char/synclink.c`` -TTY_DRIVER_MAGIC 0x5402 tty_driver ``include/linux/tty_driver.h`` MGSLPC_MAGIC 0x5402 mgslpc_info ``drivers/char/pcmcia/synclink_cs.c`` -USB_SERIAL_MAGIC 0x6702 usb_serial ``drivers/usb/serial/usb-serial.h`` -FULL_DUPLEX_MAGIC 0x6969 ``drivers/net/ethernet/dec/tulip/de2104x.c`` -USB_BLUETOOTH_MAGIC 0x6d02 usb_bluetooth ``drivers/usb/class/bluetty.c`` -RFCOMM_TTY_MAGIC 0x6d02 ``net/bluetooth/rfcomm/tty.c`` -USB_SERIAL_PORT_MAGIC 0x7301 usb_serial_port ``drivers/usb/serial/usb-serial.h`` -CG_MAGIC 0x00090255 ufs_cylinder_group ``include/linux/ufs_fs.h`` -LSEMAGIC 0x05091998 lse ``drivers/fc4/fc.c`` -RIEBL_MAGIC 0x09051990 ``drivers/net/atarilance.c`` -NBD_REQUEST_MAGIC 0x12560953 nbd_request ``include/linux/nbd.h`` -RED_MAGIC2 0x170fc2a5 (any) ``mm/slab.c`` BAYCOM_MAGIC 0x19730510 baycom_state ``drivers/net/baycom_epp.c`` -ISDN_X25IFACE_MAGIC 0x1e75a2b9 isdn_x25iface_proto_data ``drivers/isdn/isdn_x25iface.h`` -ECP_MAGIC 0x21504345 cdkecpsig ``include/linux/cdk.h`` -LSOMAGIC 0x27091997 lso ``drivers/fc4/fc.c`` -LSMAGIC 0x2a3b4d2a ls ``drivers/fc4/fc.c`` -WANPIPE_MAGIC 0x414C4453 sdla_{dump,exec} ``include/linux/wanpipe.h`` -CS_CARD_MAGIC 0x43525553 cs_card ``sound/oss/cs46xx.c`` -LABELCL_MAGIC 0x4857434c labelcl_info_s ``include/asm/ia64/sn/labelcl.h`` -ISDN_ASYNC_MAGIC 0x49344C01 modem_info ``include/linux/isdn.h`` -CTC_ASYNC_MAGIC 0x49344C01 ctc_tty_info ``drivers/s390/net/ctctty.c`` -ISDN_NET_MAGIC 0x49344C02 isdn_net_local_s ``drivers/isdn/i4l/isdn_net_lib.h`` -SAVEKMSG_MAGIC2 0x4B4D5347 savekmsg ``arch/*/amiga/config.c`` -CS_STATE_MAGIC 0x4c4f4749 cs_state ``sound/oss/cs46xx.c`` -SLAB_C_MAGIC 0x4f17a36d kmem_cache ``mm/slab.c`` -COW_MAGIC 0x4f4f4f4d cow_header_v1 ``arch/um/drivers/ubd_user.c`` -I810_CARD_MAGIC 0x5072696E i810_card ``sound/oss/i810_audio.c`` -TRIDENT_CARD_MAGIC 0x5072696E trident_card ``sound/oss/trident.c`` -ROUTER_MAGIC 0x524d4157 wan_device [in ``wanrouter.h`` pre 3.9] -SAVEKMSG_MAGIC1 0x53415645 savekmsg ``arch/*/amiga/config.c`` -GDA_MAGIC 0x58464552 gda ``arch/mips/include/asm/sn/gda.h`` -RED_MAGIC1 0x5a2cf071 (any) ``mm/slab.c`` -EEPROM_MAGIC_VALUE 0x5ab478d2 lanai_dev ``drivers/atm/lanai.c`` HDLCDRV_MAGIC 0x5ac6e778 hdlcdrv_state ``include/linux/hdlcdrv.h`` -PCXX_MAGIC 0x5c6df104 channel ``drivers/char/pcxx.h`` KV_MAGIC 0x5f4b565f kernel_vars_s ``arch/mips/include/asm/sn/klkernvars.h`` -I810_STATE_MAGIC 0x63657373 i810_state ``sound/oss/i810_audio.c`` -TRIDENT_STATE_MAGIC 0x63657373 trient_state ``sound/oss/trident.c`` -M3_CARD_MAGIC 0x646e6f50 m3_card ``sound/oss/maestro3.c`` -FW_HEADER_MAGIC 0x65726F66 fw_header ``drivers/atm/fore200e.h`` -SLOT_MAGIC 0x67267321 slot ``drivers/hotplug/cpqphp.h`` -SLOT_MAGIC 0x67267322 slot ``drivers/hotplug/acpiphp.h`` -LO_MAGIC 0x68797548 nbd_device ``include/linux/nbd.h`` -M3_STATE_MAGIC 0x734d724d m3_state ``sound/oss/maestro3.c`` -VMALLOC_MAGIC 0x87654320 snd_alloc_track ``sound/core/memory.c`` -KMALLOC_MAGIC 0x87654321 snd_alloc_track ``sound/core/memory.c`` -PWC_MAGIC 0x89DC10AB pwc_device ``drivers/usb/media/pwc.h`` -NBD_REPLY_MAGIC 0x96744668 nbd_reply ``include/linux/nbd.h`` -ENI155_MAGIC 0xa54b872d midway_eprom ``drivers/atm/eni.h`` CODA_MAGIC 0xC0DAC0DA coda_file_info ``fs/coda/coda_fs_i.h`` YAM_MAGIC 0xF10A7654 yam_port ``drivers/net/hamradio/yam.c`` CCB_MAGIC 0xf2691ad2 ccb ``drivers/scsi/ncr53c8xx.c`` QUEUE_MAGIC_FREE 0xf7e1c9a3 queue_entry ``drivers/scsi/arm/queue.c`` QUEUE_MAGIC_USED 0xf7e1cc33 queue_entry ``drivers/scsi/arm/queue.c`` -HTB_CMAGIC 0xFEFAFEF1 htb_class ``net/sched/sch_htb.c`` NMI_MAGIC 0x48414d4d455201 nmi_s ``arch/mips/include/asm/sn/nmi.h`` ===================== ================ ======================== ========================================== - -Note that there are also defined special per-driver magic numbers in sound -memory management. See ``include/sound/sndmagic.h`` for complete list of them. Many -OSS sound drivers have their magic numbers constructed from the soundcard PCI -ID - these are not listed here as well. - -HFS is another larger user of magic numbers - you can find them in -``fs/hfs/hfs.h``. diff --git a/Documentation/process/maintainer-pgp-guide.rst b/Documentation/process/maintainer-pgp-guide.rst index 29e7d7b1cd44..40bfbd3b7648 100644 --- a/Documentation/process/maintainer-pgp-guide.rst +++ b/Documentation/process/maintainer-pgp-guide.rst @@ -121,57 +121,56 @@ edit your ``~/.gnupg/gpg-agent.conf`` file to set your own values:: to remove anything you had in place for older versions of GnuPG, as it may not be doing the right thing any more. -Set up a refresh cronjob -~~~~~~~~~~~~~~~~~~~~~~~~ - -You will need to regularly refresh your keyring in order to get the -latest changes on other people's public keys, which is best done with a -daily cronjob:: - - @daily /usr/bin/gpg2 --refresh >/dev/null 2>&1 - -Check the full path to your ``gpg`` or ``gpg2`` command and use the -``gpg2`` command if regular ``gpg`` for you is the legacy GnuPG v.1. - -.. _master_key: +.. _protect_your_key: -Protect your master PGP key -=========================== +Protect your PGP key +==================== This guide assumes that you already have a PGP key that you use for Linux kernel development purposes. If you do not yet have one, please see the "`Protecting Code Integrity`_" document mentioned earlier for guidance on how to create a new one. -You should also make a new key if your current one is weaker than 2048 bits -(RSA). - -Master key vs. Subkeys ----------------------- - -Subkeys are fully independent PGP keypairs that are tied to the "master" -key using certifying key signatures (certificates). It is important to -understand the following: - -1. There are no technical differences between the "master key" and "subkeys." -2. At creation time, we assign functional limitations to each key by - giving it specific capabilities. -3. A PGP key can have 4 capabilities: - - - **[S]** key can be used for signing - - **[E]** key can be used for encryption - - **[A]** key can be used for authentication - - **[C]** key can be used for certifying other keys - -4. A single key may have multiple capabilities. -5. A subkey is fully independent from the master key. A message - encrypted to a subkey cannot be decrypted with the master key. If you - lose your private subkey, it cannot be recreated from the master key - in any way. - -The key carrying the **[C]** (certify) capability is considered the -"master" key because it is the only key that can be used to indicate -relationship with other keys. Only the **[C]** key can be used to: +You should also make a new key if your current one is weaker than 2048 +bits (RSA). + +Understanding PGP Subkeys +------------------------- + +A PGP key rarely consists of a single keypair -- usually it is a +collection of independent subkeys that can be used for different +purposes based on their capabilities, assigned at their creation time. +PGP defines four capabilities that a key can have: + +- **[S]** keys can be used for signing +- **[E]** keys can be used for encryption +- **[A]** keys can be used for authentication +- **[C]** keys can be used for certifying other keys + +The key with the **[C]** capability is often called the "master" key, +but this terminology is misleading because it implies that the Certify +key can be used in place of any of other subkey on the same chain (like +a physical "master key" can be used to open the locks made for other +keys). Since this is not the case, this guide will refer to it as "the +Certify key" to avoid any ambiguity. + +It is critical to fully understand the following: + +1. All subkeys are fully independent from each other. If you lose a + private subkey, it cannot be restored or recreated from any other + private key on your chain. +2. With the exception of the Certify key, there can be multiple subkeys + with identical capabilities (e.g. you can have 2 valid encryption + subkeys, 3 valid signing subkeys, but only one valid certification + subkey). All subkeys are fully independent -- a message encrypted to + one **[E]** subkey cannot be decrypted with any other **[E]** subkey + you may also have. +3. A single subkey may have multiple capabilities (e.g. your **[C]** key + can also be your **[S]** key). + +The key carrying the **[C]** (certify) capability is the only key that +can be used to indicate relationship with other keys. Only the **[C]** +key can be used to: - add or revoke other keys (subkeys) with S/E/A capabilities - add, change or revoke identities (uids) associated with the key @@ -180,7 +179,7 @@ relationship with other keys. Only the **[C]** key can be used to: By default, GnuPG creates the following when generating new keys: -- A master key carrying both Certify and Sign capabilities (**[SC]**) +- One subkey carrying both Certify and Sign capabilities (**[SC]**) - A separate subkey with the Encryption capability (**[E]**) If you used the default parameters when generating your key, then that @@ -192,9 +191,6 @@ for example:: uid [ultimate] Alice Dev <adev@kernel.org> ssb rsa2048 2018-01-23 [E] [expires: 2020-01-23] -Any key carrying the **[C]** capability is your master key, regardless -of any other capabilities it may have assigned to it. - The long line under the ``sec`` entry is your key fingerprint -- whenever you see ``[fpr]`` in the examples below, that 40-character string is what it refers to. @@ -215,37 +211,30 @@ strong passphrase. To set it or change it, use:: Create a separate Signing subkey -------------------------------- -Our goal is to protect your master key by moving it to offline media, so -if you only have a combined **[SC]** key, then you should create a separate -signing subkey:: +Our goal is to protect your Certify key by moving it to offline media, +so if you only have a combined **[SC]** key, then you should create a +separate signing subkey:: $ gpg --quick-addkey [fpr] ed25519 sign -Remember to tell the keyservers about this change, so others can pull down -your new subkey:: - - $ gpg --send-key [fpr] - .. note:: ECC support in GnuPG GnuPG 2.1 and later has full support for Elliptic Curve Cryptography, with ability to combine ECC subkeys with traditional - RSA master keys. The main upside of ECC cryptography is that it is - much faster computationally and creates much smaller signatures when + RSA keys. The main upside of ECC cryptography is that it is much + faster computationally and creates much smaller signatures when compared byte for byte with 2048+ bit RSA keys. Unless you plan on using a smartcard device that does not support ECC operations, we recommend that you create an ECC signing subkey for your kernel work. - If for some reason you prefer to stay with RSA subkeys, just replace - "ed25519" with "rsa2048" in the above command. Additionally, if you - plan to use a hardware device that does not support ED25519 ECC - keys, like Nitrokey Pro or a Yubikey, then you should use - "nistp256" instead or "ed25519." + Note, that if you plan to use a hardware device that does not + support ED25519 ECC keys, you should choose "nistp256" instead or + "ed25519." -Back up your master key for disaster recovery ---------------------------------------------- +Back up your Certify key for disaster recovery +---------------------------------------------- The more signatures you have on your PGP key from other developers, the more reasons you have to create a backup version that lives on something @@ -277,9 +266,7 @@ home, such as your bank vault. Your printer is probably no longer a simple dumb device connected to your parallel port, but since the output is still encrypted with your passphrase, printing out even to "cloud-integrated" modern - printers should remain a relatively safe operation. One option is to - change the passphrase on your master key immediately after you are - done with paperkey. + printers should remain a relatively safe operation. Back up your whole GnuPG directory ---------------------------------- @@ -300,7 +287,7 @@ will use for backup purposes. You will need to encrypt them using LUKS -- refer to your distro's documentation on how to accomplish this. For the encryption passphrase, you can use the same one as on your -master key. +PGP key. Once the encryption process is over, re-insert the USB drive and make sure it gets properly mounted. Copy your entire ``.gnupg`` directory @@ -319,7 +306,7 @@ far away, because you'll need to use it every now and again for things like editing identities, adding or revoking subkeys, or signing other people's keys. -Remove the master key from your homedir +Remove the Certify key from your homedir ---------------------------------------- The files in our home directory are not as well protected as we like to @@ -334,7 +321,7 @@ think. They can be leaked or stolen via many different means: Protecting your key with a good passphrase greatly helps reduce the risk of any of the above, but passphrases can be discovered via keyloggers, shoulder-surfing, or any number of other means. For this reason, the -recommended setup is to remove your master key from your home directory +recommended setup is to remove your Certify key from your home directory and store it on offline storage. .. warning:: @@ -343,7 +330,7 @@ and store it on offline storage. your GnuPG directory in its entirety. What we are about to do will render your key useless if you do not have a usable backup! -First, identify the keygrip of your master key:: +First, identify the keygrip of your Certify key:: $ gpg --with-keygrip --list-key [fpr] @@ -359,7 +346,7 @@ The output will be something like this:: Keygrip = 3333000000000000000000000000000000000000 Find the keygrip entry that is beneath the ``pub`` line (right under the -master key fingerprint). This will correspond directly to a file in your +Certify key fingerprint). This will correspond directly to a file in your ``~/.gnupg`` directory:: $ cd ~/.gnupg/private-keys-v1.d @@ -369,13 +356,13 @@ master key fingerprint). This will correspond directly to a file in your 3333000000000000000000000000000000000000.key All you have to do is simply remove the .key file that corresponds to -the master keygrip:: +the Certify key keygrip:: $ cd ~/.gnupg/private-keys-v1.d $ rm 1111000000000000000000000000000000000000.key Now, if you issue the ``--list-secret-keys`` command, it will show that -the master key is missing (the ``#`` indicates it is not available):: +the Certify key is missing (the ``#`` indicates it is not available):: $ gpg --list-secret-keys sec# rsa2048 2018-01-24 [SC] [expires: 2020-01-24] @@ -404,7 +391,7 @@ file, which still contains your private keys. Move the subkeys to a dedicated crypto device ============================================= -Even though the master key is now safe from being leaked or stolen, the +Even though the Certify key is now safe from being leaked or stolen, the subkeys are still in your home directory. Anyone who manages to get their hands on those will be able to decrypt your communication or fake your signatures (if they know the passphrase). Furthermore, each time a @@ -447,7 +434,8 @@ functionality. There are several options available: - `Yubikey 5`_: proprietary hardware and software, but cheaper than Nitrokey Pro and comes available in the USB-C form that is more useful with newer laptops. Offers additional security features such as FIDO - U2F, among others, and now finally supports ECC keys (NISTP). + U2F, among others, and now finally supports NISTP and ED25519 ECC + keys. `LWN has a good review`_ of some of the above models, as well as several others. Your choice will depend on cost, shipping availability in your @@ -460,7 +448,7 @@ geographical region, and open/proprietary hardware considerations. Foundation. .. _`Nitrokey Start`: https://shop.nitrokey.com/shop/product/nitrokey-start-6 -.. _`Nitrokey Pro 2`: https://shop.nitrokey.com/shop/product/nitrokey-pro-2-3 +.. _`Nitrokey Pro 2`: https://shop.nitrokey.com/shop/product/nkpr2-nitrokey-pro-2-3 .. _`Yubikey 5`: https://www.yubico.com/products/yubikey-5-overview/ .. _Gnuk: https://www.fsij.org/doc-gnuk/ .. _`LWN has a good review`: https://lwn.net/Articles/736231/ @@ -627,10 +615,10 @@ Other common GnuPG operations Here is a quick reference for some common operations you'll need to do with your PGP key. -Mounting your master key offline storage -~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +Mounting your safe offline storage +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -You will need your master key for any of the operations below, so you +You will need your Certify key for any of the operations below, so you will first need to mount your backup offline storage and tell GnuPG to use it:: @@ -644,7 +632,7 @@ your regular home directory location). Extending key expiration date ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -The master key has the default expiration date of 2 years from the date +The Certify key has the default expiration date of 2 years from the date of creation. This is done both for security reasons and to make obsolete keys eventually disappear from keyservers. @@ -685,6 +673,7 @@ remote end. .. _`Agent Forwarding over SSH`: https://wiki.gnupg.org/AgentForwarding +.. _pgp_with_git: Using PGP with Git ================== @@ -828,6 +817,63 @@ You can tell git to always sign commits:: .. _verify_identities: + +How to work with signed patches +------------------------------- + +It is possible to use your PGP key to sign patches sent to kernel +developer mailing lists. Since existing email signature mechanisms +(PGP-Mime or PGP-inline) tend to cause problems with regular code +review tasks, you should use the tool kernel.org created for this +purpose that puts cryptographic attestation signatures into message +headers (a-la DKIM): + +- `Patatt Patch Attestation`_ + +.. _`Patatt Patch Attestation`: https://pypi.org/project/patatt/ + +Installing and configuring patatt +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +Patatt is packaged for many distributions already, so please check there +first. You can also install it from pypi using "``pip install patatt``". + +If you already have your PGP key configured with git (via the +``user.signingKey`` configuration parameter), then patatt requires no +further configuration. You can start signing your patches by installing +the git-send-email hook in the repository you want:: + + patatt install-hook + +Now any patches you send with ``git send-email`` will be automatically +signed with your cryptographic signature. + +Checking patatt signatures +~~~~~~~~~~~~~~~~~~~~~~~~~~ + +If you are using ``b4`` to retrieve and apply patches, then it will +automatically attempt to verify all DKIM and patatt signatures it +encounters, for example:: + + $ b4 am 20220720205013.890942-1-broonie@kernel.org + [...] + Checking attestation on all messages, may take a moment... + --- + ✓ [PATCH v1 1/3] kselftest/arm64: Correct buffer allocation for SVE Z registers + ✓ [PATCH v1 2/3] arm64/sve: Document our actual ABI for clearing registers on syscall + ✓ [PATCH v1 3/3] kselftest/arm64: Enforce actual ABI for SVE syscalls + --- + ✓ Signed: openpgp/broonie@kernel.org + ✓ Signed: DKIM/kernel.org + +.. note:: + + Patatt and b4 are still in active development and you should check + the latest documentation for these projects for any new or updated + features. + +.. _kernel_identities: + How to verify kernel developer identities ========================================= @@ -899,65 +945,17 @@ the new default in GnuPG v2). To set it, add (or modify) the trust-model tofu+pgp -How to use keyservers (more) safely ------------------------------------ - -If you get a "No public key" error when trying to validate someone's -tag, then you should attempt to lookup that key using a keyserver. It is -important to keep in mind that there is absolutely no guarantee that the -key you retrieve from PGP keyservers belongs to the actual person -- -that much is by design. You are supposed to use the Web of Trust to -establish key validity. - -How to properly maintain the Web of Trust is beyond the scope of this -document, simply because doing it properly requires both effort and -dedication that tends to be beyond the caring threshold of most human -beings. Here are some shortcuts that will help you reduce the risk of -importing a malicious key. - -First, let's say you've tried to run ``git verify-tag`` but it returned -an error saying the key is not found:: - - $ git verify-tag sunxi-fixes-for-4.15-2 - gpg: Signature made Sun 07 Jan 2018 10:51:55 PM EST - gpg: using RSA key DA73759BF8619E484E5A3B47389A54219C0F2430 - gpg: issuer "wens@...org" - gpg: Can't check signature: No public key - -Let's query the keyserver for more info about that key fingerprint (the -fingerprint probably belongs to a subkey, so we can't use it directly -without finding out the ID of the master key it is associated with):: - - $ gpg --search DA73759BF8619E484E5A3B47389A54219C0F2430 - gpg: data source: hkp://keys.gnupg.net - (1) Chen-Yu Tsai <wens@...org> - 4096 bit RSA key C94035C21B4F2AEB, created: 2017-03-14, expires: 2019-03-15 - Keys 1-1 of 1 for "DA73759BF8619E484E5A3B47389A54219C0F2430". Enter number(s), N)ext, or Q)uit > q - -Locate the ID of the master key in the output, in our example -``C94035C21B4F2AEB``. Now display the key of Linus Torvalds that you -have on your keyring:: - - $ gpg --list-key torvalds@kernel.org - pub rsa2048 2011-09-20 [SC] - ABAF11C65A2970B130ABE3C479BE3E4300411886 - uid [ unknown] Linus Torvalds <torvalds@kernel.org> - sub rsa2048 2011-09-20 [E] - -Next, find a trust path from Linus Torvalds to the key-id you found via ``gpg ---search`` of the unknown key. For this, you can use several tools including -https://github.com/mricon/wotmate, -https://git.kernel.org/pub/scm/docs/kernel/pgpkeys.git/tree/graphs, and -https://the.earth.li/~noodles/pathfind.html. - -If you get a few decent trust paths, then it's a pretty good indication -that it is a valid key. You can add it to your keyring from the -keyserver now:: - - $ gpg --recv-key C94035C21B4F2AEB - -This process is not perfect, and you are obviously trusting the -administrators of the PGP Pathfinder service to not be malicious (in -fact, this goes against :ref:`devs_not_infra`). However, if you -do not carefully maintain your own web of trust, then it is a marked -improvement over blindly trusting keyservers. +Using the kernel.org web of trust repository +-------------------------------------------- + +Kernel.org maintains a git repository with developers' public keys as a +replacement for replicating keyserver networks that have gone mostly +dark in the past few years. The full documentation for how to set up +that repository as your source of public keys can be found here: + +- `Kernel developer PGP Keyring`_ + +If you are a kernel developer, please consider submitting your key for +inclusion into that keyring. + +.. _`Kernel developer PGP Keyring`: https://korg.docs.kernel.org/pgpkeys.html diff --git a/Documentation/process/stable-kernel-rules.rst b/Documentation/process/stable-kernel-rules.rst index c61865e91f52..2fd8aa593a28 100644 --- a/Documentation/process/stable-kernel-rules.rst +++ b/Documentation/process/stable-kernel-rules.rst @@ -97,6 +97,12 @@ text, like this: commit <sha1> upstream. +or alternatively: + +.. code-block:: none + + [ Upstream commit <sha1> ] + Additionally, some patches submitted via :ref:`option_1` may have additional patch prerequisites which can be cherry-picked. This can be specified in the following format in the sign-off area: diff --git a/Documentation/process/submitting-patches.rst b/Documentation/process/submitting-patches.rst index be49d8f2601b..7dc94555417d 100644 --- a/Documentation/process/submitting-patches.rst +++ b/Documentation/process/submitting-patches.rst @@ -715,8 +715,8 @@ references. .. _backtraces: -Backtraces in commit mesages -^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +Backtraces in commit messages +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Backtraces help document the call chain leading to a problem. However, not all backtraces are helpful. For example, early boot call chains are diff --git a/Documentation/rust/arch-support.rst b/Documentation/rust/arch-support.rst new file mode 100644 index 000000000000..6982b63775da --- /dev/null +++ b/Documentation/rust/arch-support.rst @@ -0,0 +1,19 @@ +.. SPDX-License-Identifier: GPL-2.0 + +Arch Support +============ + +Currently, the Rust compiler (``rustc``) uses LLVM for code generation, +which limits the supported architectures that can be targeted. In addition, +support for building the kernel with LLVM/Clang varies (please see +Documentation/kbuild/llvm.rst). This support is needed for ``bindgen`` +which uses ``libclang``. + +Below is a general summary of architectures that currently work. Level of +support corresponds to ``S`` values in the ``MAINTAINERS`` file. + +============ ================ ============================================== +Architecture Level of support Constraints +============ ================ ============================================== +``x86`` Maintained ``x86_64`` only. +============ ================ ============================================== diff --git a/Documentation/rust/coding-guidelines.rst b/Documentation/rust/coding-guidelines.rst new file mode 100644 index 000000000000..aa8ed082613e --- /dev/null +++ b/Documentation/rust/coding-guidelines.rst @@ -0,0 +1,216 @@ +.. SPDX-License-Identifier: GPL-2.0 + +Coding Guidelines +================= + +This document describes how to write Rust code in the kernel. + + +Style & formatting +------------------ + +The code should be formatted using ``rustfmt``. In this way, a person +contributing from time to time to the kernel does not need to learn and +remember one more style guide. More importantly, reviewers and maintainers +do not need to spend time pointing out style issues anymore, and thus +less patch roundtrips may be needed to land a change. + +.. note:: Conventions on comments and documentation are not checked by + ``rustfmt``. Thus those are still needed to be taken care of. + +The default settings of ``rustfmt`` are used. This means the idiomatic Rust +style is followed. For instance, 4 spaces are used for indentation rather +than tabs. + +It is convenient to instruct editors/IDEs to format while typing, +when saving or at commit time. However, if for some reason reformatting +the entire kernel Rust sources is needed at some point, the following can be +run:: + + make LLVM=1 rustfmt + +It is also possible to check if everything is formatted (printing a diff +otherwise), for instance for a CI, with:: + + make LLVM=1 rustfmtcheck + +Like ``clang-format`` for the rest of the kernel, ``rustfmt`` works on +individual files, and does not require a kernel configuration. Sometimes it may +even work with broken code. + + +Comments +-------- + +"Normal" comments (i.e. ``//``, rather than code documentation which starts +with ``///`` or ``//!``) are written in Markdown the same way as documentation +comments are, even though they will not be rendered. This improves consistency, +simplifies the rules and allows to move content between the two kinds of +comments more easily. For instance: + +.. code-block:: rust + + // `object` is ready to be handled now. + f(object); + +Furthermore, just like documentation, comments are capitalized at the beginning +of a sentence and ended with a period (even if it is a single sentence). This +includes ``// SAFETY:``, ``// TODO:`` and other "tagged" comments, e.g.: + +.. code-block:: rust + + // FIXME: The error should be handled properly. + +Comments should not be used for documentation purposes: comments are intended +for implementation details, not users. This distinction is useful even if the +reader of the source file is both an implementor and a user of an API. In fact, +sometimes it is useful to use both comments and documentation at the same time. +For instance, for a ``TODO`` list or to comment on the documentation itself. +For the latter case, comments can be inserted in the middle; that is, closer to +the line of documentation to be commented. For any other case, comments are +written after the documentation, e.g.: + +.. code-block:: rust + + /// Returns a new [`Foo`]. + /// + /// # Examples + /// + // TODO: Find a better example. + /// ``` + /// let foo = f(42); + /// ``` + // FIXME: Use fallible approach. + pub fn f(x: i32) -> Foo { + // ... + } + +One special kind of comments are the ``// SAFETY:`` comments. These must appear +before every ``unsafe`` block, and they explain why the code inside the block is +correct/sound, i.e. why it cannot trigger undefined behavior in any case, e.g.: + +.. code-block:: rust + + // SAFETY: `p` is valid by the safety requirements. + unsafe { *p = 0; } + +``// SAFETY:`` comments are not to be confused with the ``# Safety`` sections +in code documentation. ``# Safety`` sections specify the contract that callers +(for functions) or implementors (for traits) need to abide by. ``// SAFETY:`` +comments show why a call (for functions) or implementation (for traits) actually +respects the preconditions stated in a ``# Safety`` section or the language +reference. + + +Code documentation +------------------ + +Rust kernel code is not documented like C kernel code (i.e. via kernel-doc). +Instead, the usual system for documenting Rust code is used: the ``rustdoc`` +tool, which uses Markdown (a lightweight markup language). + +To learn Markdown, there are many guides available out there. For instance, +the one at: + + https://commonmark.org/help/ + +This is how a well-documented Rust function may look like: + +.. code-block:: rust + + /// Returns the contained [`Some`] value, consuming the `self` value, + /// without checking that the value is not [`None`]. + /// + /// # Safety + /// + /// Calling this method on [`None`] is *[undefined behavior]*. + /// + /// [undefined behavior]: https://doc.rust-lang.org/reference/behavior-considered-undefined.html + /// + /// # Examples + /// + /// ``` + /// let x = Some("air"); + /// assert_eq!(unsafe { x.unwrap_unchecked() }, "air"); + /// ``` + pub unsafe fn unwrap_unchecked(self) -> T { + match self { + Some(val) => val, + + // SAFETY: The safety contract must be upheld by the caller. + None => unsafe { hint::unreachable_unchecked() }, + } + } + +This example showcases a few ``rustdoc`` features and some conventions followed +in the kernel: + + - The first paragraph must be a single sentence briefly describing what + the documented item does. Further explanations must go in extra paragraphs. + + - Unsafe functions must document their safety preconditions under + a ``# Safety`` section. + + - While not shown here, if a function may panic, the conditions under which + that happens must be described under a ``# Panics`` section. + + Please note that panicking should be very rare and used only with a good + reason. In almost all cases, a fallible approach should be used, typically + returning a ``Result``. + + - If providing examples of usage would help readers, they must be written in + a section called ``# Examples``. + + - Rust items (functions, types, constants...) must be linked appropriately + (``rustdoc`` will create a link automatically). + + - Any ``unsafe`` block must be preceded by a ``// SAFETY:`` comment + describing why the code inside is sound. + + While sometimes the reason might look trivial and therefore unneeded, + writing these comments is not just a good way of documenting what has been + taken into account, but most importantly, it provides a way to know that + there are no *extra* implicit constraints. + +To learn more about how to write documentation for Rust and extra features, +please take a look at the ``rustdoc`` book at: + + https://doc.rust-lang.org/rustdoc/how-to-write-documentation.html + + +Naming +------ + +Rust kernel code follows the usual Rust naming conventions: + + https://rust-lang.github.io/api-guidelines/naming.html + +When existing C concepts (e.g. macros, functions, objects...) are wrapped into +a Rust abstraction, a name as close as reasonably possible to the C side should +be used in order to avoid confusion and to improve readability when switching +back and forth between the C and Rust sides. For instance, macros such as +``pr_info`` from C are named the same in the Rust side. + +Having said that, casing should be adjusted to follow the Rust naming +conventions, and namespacing introduced by modules and types should not be +repeated in the item names. For instance, when wrapping constants like: + +.. code-block:: c + + #define GPIO_LINE_DIRECTION_IN 0 + #define GPIO_LINE_DIRECTION_OUT 1 + +The equivalent in Rust may look like (ignoring documentation): + +.. code-block:: rust + + pub mod gpio { + pub enum LineDirection { + In = bindings::GPIO_LINE_DIRECTION_IN as _, + Out = bindings::GPIO_LINE_DIRECTION_OUT as _, + } + } + +That is, the equivalent of ``GPIO_LINE_DIRECTION_IN`` would be referred to as +``gpio::LineDirection::In``. In particular, it should not be named +``gpio::gpio_line_direction::GPIO_LINE_DIRECTION_IN``. diff --git a/Documentation/rust/general-information.rst b/Documentation/rust/general-information.rst new file mode 100644 index 000000000000..49029ee82e55 --- /dev/null +++ b/Documentation/rust/general-information.rst @@ -0,0 +1,79 @@ +.. SPDX-License-Identifier: GPL-2.0 + +General Information +=================== + +This document contains useful information to know when working with +the Rust support in the kernel. + + +Code documentation +------------------ + +Rust kernel code is documented using ``rustdoc``, its built-in documentation +generator. + +The generated HTML docs include integrated search, linked items (e.g. types, +functions, constants), source code, etc. They may be read at (TODO: link when +in mainline and generated alongside the rest of the documentation): + + http://kernel.org/ + +The docs can also be easily generated and read locally. This is quite fast +(same order as compiling the code itself) and no special tools or environment +are needed. This has the added advantage that they will be tailored to +the particular kernel configuration used. To generate them, use the ``rustdoc`` +target with the same invocation used for compilation, e.g.:: + + make LLVM=1 rustdoc + +To read the docs locally in your web browser, run e.g.:: + + xdg-open rust/doc/kernel/index.html + +To learn about how to write the documentation, please see coding-guidelines.rst. + + +Extra lints +----------- + +While ``rustc`` is a very helpful compiler, some extra lints and analyses are +available via ``clippy``, a Rust linter. To enable it, pass ``CLIPPY=1`` to +the same invocation used for compilation, e.g.:: + + make LLVM=1 CLIPPY=1 + +Please note that Clippy may change code generation, thus it should not be +enabled while building a production kernel. + + +Abstractions vs. bindings +------------------------- + +Abstractions are Rust code wrapping kernel functionality from the C side. + +In order to use functions and types from the C side, bindings are created. +Bindings are the declarations for Rust of those functions and types from +the C side. + +For instance, one may write a ``Mutex`` abstraction in Rust which wraps +a ``struct mutex`` from the C side and calls its functions through the bindings. + +Abstractions are not available for all the kernel internal APIs and concepts, +but it is intended that coverage is expanded as time goes on. "Leaf" modules +(e.g. drivers) should not use the C bindings directly. Instead, subsystems +should provide as-safe-as-possible abstractions as needed. + + +Conditional compilation +----------------------- + +Rust code has access to conditional compilation based on the kernel +configuration: + +.. code-block:: rust + + #[cfg(CONFIG_X)] // Enabled (`y` or `m`) + #[cfg(CONFIG_X="y")] // Enabled as a built-in (`y`) + #[cfg(CONFIG_X="m")] // Enabled as a module (`m`) + #[cfg(not(CONFIG_X))] // Disabled diff --git a/Documentation/rust/index.rst b/Documentation/rust/index.rst new file mode 100644 index 000000000000..4ae8c66b94fa --- /dev/null +++ b/Documentation/rust/index.rst @@ -0,0 +1,22 @@ +.. SPDX-License-Identifier: GPL-2.0 + +Rust +==== + +Documentation related to Rust within the kernel. To start using Rust +in the kernel, please read the quick-start.rst guide. + +.. toctree:: + :maxdepth: 1 + + quick-start + general-information + coding-guidelines + arch-support + +.. only:: subproject and html + + Indices + ======= + + * :ref:`genindex` diff --git a/Documentation/rust/quick-start.rst b/Documentation/rust/quick-start.rst new file mode 100644 index 000000000000..13b7744b1e27 --- /dev/null +++ b/Documentation/rust/quick-start.rst @@ -0,0 +1,232 @@ +.. SPDX-License-Identifier: GPL-2.0 + +Quick Start +=========== + +This document describes how to get started with kernel development in Rust. + + +Requirements: Building +---------------------- + +This section explains how to fetch the tools needed for building. + +Some of these requirements might be available from Linux distributions +under names like ``rustc``, ``rust-src``, ``rust-bindgen``, etc. However, +at the time of writing, they are likely not to be recent enough unless +the distribution tracks the latest releases. + +To easily check whether the requirements are met, the following target +can be used:: + + make LLVM=1 rustavailable + +This triggers the same logic used by Kconfig to determine whether +``RUST_IS_AVAILABLE`` should be enabled; but it also explains why not +if that is the case. + + +rustc +***** + +A particular version of the Rust compiler is required. Newer versions may or +may not work because, for the moment, the kernel depends on some unstable +Rust features. + +If ``rustup`` is being used, enter the checked out source code directory +and run:: + + rustup override set $(scripts/min-tool-version.sh rustc) + +Otherwise, fetch a standalone installer or install ``rustup`` from: + + https://www.rust-lang.org + + +Rust standard library source +**************************** + +The Rust standard library source is required because the build system will +cross-compile ``core`` and ``alloc``. + +If ``rustup`` is being used, run:: + + rustup component add rust-src + +The components are installed per toolchain, thus upgrading the Rust compiler +version later on requires re-adding the component. + +Otherwise, if a standalone installer is used, the Rust repository may be cloned +into the installation folder of the toolchain:: + + git clone --recurse-submodules \ + --branch $(scripts/min-tool-version.sh rustc) \ + https://github.com/rust-lang/rust \ + $(rustc --print sysroot)/lib/rustlib/src/rust + +In this case, upgrading the Rust compiler version later on requires manually +updating this clone. + + +libclang +******** + +``libclang`` (part of LLVM) is used by ``bindgen`` to understand the C code +in the kernel, which means LLVM needs to be installed; like when the kernel +is compiled with ``CC=clang`` or ``LLVM=1``. + +Linux distributions are likely to have a suitable one available, so it is +best to check that first. + +There are also some binaries for several systems and architectures uploaded at: + + https://releases.llvm.org/download.html + +Otherwise, building LLVM takes quite a while, but it is not a complex process: + + https://llvm.org/docs/GettingStarted.html#getting-the-source-code-and-building-llvm + +Please see Documentation/kbuild/llvm.rst for more information and further ways +to fetch pre-built releases and distribution packages. + + +bindgen +******* + +The bindings to the C side of the kernel are generated at build time using +the ``bindgen`` tool. A particular version is required. + +Install it via (note that this will download and build the tool from source):: + + cargo install --locked --version $(scripts/min-tool-version.sh bindgen) bindgen + + +Requirements: Developing +------------------------ + +This section explains how to fetch the tools needed for developing. That is, +they are not needed when just building the kernel. + + +rustfmt +******* + +The ``rustfmt`` tool is used to automatically format all the Rust kernel code, +including the generated C bindings (for details, please see +coding-guidelines.rst). + +If ``rustup`` is being used, its ``default`` profile already installs the tool, +thus nothing needs to be done. If another profile is being used, the component +can be installed manually:: + + rustup component add rustfmt + +The standalone installers also come with ``rustfmt``. + + +clippy +****** + +``clippy`` is a Rust linter. Running it provides extra warnings for Rust code. +It can be run by passing ``CLIPPY=1`` to ``make`` (for details, please see +general-information.rst). + +If ``rustup`` is being used, its ``default`` profile already installs the tool, +thus nothing needs to be done. If another profile is being used, the component +can be installed manually:: + + rustup component add clippy + +The standalone installers also come with ``clippy``. + + +cargo +***** + +``cargo`` is the Rust native build system. It is currently required to run +the tests since it is used to build a custom standard library that contains +the facilities provided by the custom ``alloc`` in the kernel. The tests can +be run using the ``rusttest`` Make target. + +If ``rustup`` is being used, all the profiles already install the tool, +thus nothing needs to be done. + +The standalone installers also come with ``cargo``. + + +rustdoc +******* + +``rustdoc`` is the documentation tool for Rust. It generates pretty HTML +documentation for Rust code (for details, please see +general-information.rst). + +``rustdoc`` is also used to test the examples provided in documented Rust code +(called doctests or documentation tests). The ``rusttest`` Make target uses +this feature. + +If ``rustup`` is being used, all the profiles already install the tool, +thus nothing needs to be done. + +The standalone installers also come with ``rustdoc``. + + +rust-analyzer +************* + +The `rust-analyzer <https://rust-analyzer.github.io/>`_ language server can +be used with many editors to enable syntax highlighting, completion, go to +definition, and other features. + +``rust-analyzer`` needs a configuration file, ``rust-project.json``, which +can be generated by the ``rust-analyzer`` Make target. + + +Configuration +------------- + +``Rust support`` (``CONFIG_RUST``) needs to be enabled in the ``General setup`` +menu. The option is only shown if a suitable Rust toolchain is found (see +above), as long as the other requirements are met. In turn, this will make +visible the rest of options that depend on Rust. + +Afterwards, go to:: + + Kernel hacking + -> Sample kernel code + -> Rust samples + +And enable some sample modules either as built-in or as loadable. + + +Building +-------- + +Building a kernel with a complete LLVM toolchain is the best supported setup +at the moment. That is:: + + make LLVM=1 + +For architectures that do not support a full LLVM toolchain, use:: + + make CC=clang + +Using GCC also works for some configurations, but it is very experimental at +the moment. + + +Hacking +------- + +To dive deeper, take a look at the source code of the samples +at ``samples/rust/``, the Rust support code under ``rust/`` and +the ``Rust hacking`` menu under ``Kernel hacking``. + +If GDB/Binutils is used and Rust symbols are not getting demangled, the reason +is the toolchain does not support Rust's new v0 mangling scheme yet. +There are a few ways out: + + - Install a newer release (GDB >= 10.2, Binutils >= 2.36). + + - Some versions of GDB (e.g. vanilla GDB 10.1) are able to use + the pre-demangled names embedded in the debug info (``CONFIG_DEBUG_INFO``). diff --git a/Documentation/scheduler/sched-design-CFS.rst b/Documentation/scheduler/sched-design-CFS.rst index 59b2d1fb4dc4..03db55504515 100644 --- a/Documentation/scheduler/sched-design-CFS.rst +++ b/Documentation/scheduler/sched-design-CFS.rst @@ -94,7 +94,7 @@ other HZ detail. Thus the CFS scheduler has no notion of "timeslices" in the way the previous scheduler had, and has no heuristics whatsoever. There is only one central tunable (you have to switch on CONFIG_SCHED_DEBUG): - /proc/sys/kernel/sched_min_granularity_ns + /sys/kernel/debug/sched/min_granularity_ns which can be used to tune the scheduler from "desktop" (i.e., low latencies) to "server" (i.e., good batching) workloads. It defaults to a setting suitable diff --git a/Documentation/scsi/ChangeLog.lpfc b/Documentation/scsi/ChangeLog.lpfc index 2f6d595f95e1..caedc8571b45 100644 --- a/Documentation/scsi/ChangeLog.lpfc +++ b/Documentation/scsi/ChangeLog.lpfc @@ -401,7 +401,7 @@ Changes from 20041213 to 20041220 structure. * Integrated patch from Christoph Hellwig <hch@lst.de> Kill compile warnings on 64 bit platforms: %variables for %llx format - specifiers must be caste to long long because %(u)int64_t can + specifiers must be cast to long long because %(u)int64_t can just be long on 64bit platforms. * Integrated patch from Christoph Hellwig <hch@lst.de> Removes dead code. diff --git a/Documentation/security/landlock.rst b/Documentation/security/landlock.rst index 5c77730b4479..c0029d5d02eb 100644 --- a/Documentation/security/landlock.rst +++ b/Documentation/security/landlock.rst @@ -7,7 +7,7 @@ Landlock LSM: kernel documentation ================================== :Author: Mickaël Salaün -:Date: May 2022 +:Date: September 2022 Landlock's goal is to create scoped access-control (i.e. sandboxing). To harden a whole system, this feature should be available to any process, @@ -49,13 +49,13 @@ Filesystem access rights ------------------------ All access rights are tied to an inode and what can be accessed through it. -Reading the content of a directory doesn't imply to be allowed to read the +Reading the content of a directory does not imply to be allowed to read the content of a listed inode. Indeed, a file name is local to its parent directory, and an inode can be referenced by multiple file names thanks to (hard) links. Being able to unlink a file only has a direct impact on the directory, not the unlinked inode. This is the reason why -`LANDLOCK_ACCESS_FS_REMOVE_FILE` or `LANDLOCK_ACCESS_FS_REFER` are not allowed -to be tied to files but only to directories. +``LANDLOCK_ACCESS_FS_REMOVE_FILE`` or ``LANDLOCK_ACCESS_FS_REFER`` are not +allowed to be tied to files but only to directories. Tests ===== diff --git a/Documentation/sound/kernel-api/writing-an-alsa-driver.rst b/Documentation/sound/kernel-api/writing-an-alsa-driver.rst index 176b73583b7a..07a620c5ca74 100644 --- a/Documentation/sound/kernel-api/writing-an-alsa-driver.rst +++ b/Documentation/sound/kernel-api/writing-an-alsa-driver.rst @@ -3565,13 +3565,17 @@ given size. The second argument (type) and the third argument (device pointer) are dependent on the bus. For normal devices, pass the device pointer (typically identical as ``card->dev``) to the third argument with -``SNDRV_DMA_TYPE_DEV`` type. For the continuous buffer unrelated to the +``SNDRV_DMA_TYPE_DEV`` type. + +For the continuous buffer unrelated to the bus can be pre-allocated with ``SNDRV_DMA_TYPE_CONTINUOUS`` type. You can pass NULL to the device pointer in that case, which is the default mode implying to allocate with ``GFP_KERNEL`` flag. -If you need a different GFP flag, you can pass it by encoding the flag -into the device pointer via a special macro -:c:func:`snd_dma_continuous_data()`. +If you need a restricted (lower) address, set up the coherent DMA mask +bits for the device, and pass the device pointer, like the normal +device memory allocations. For this type, it's still allowed to pass +NULL to the device pointer, too, if no address restriction is needed. + For the scatter-gather buffers, use ``SNDRV_DMA_TYPE_DEV_SG`` with the device pointer (see the `Non-Contiguous Buffers`_ section). @@ -3811,15 +3815,6 @@ arguments here. Since each vmalloc call should succeed at any time, we don't need to pre-allocate the buffers like other continuous pages. -If you need the 32bit DMA allocation, pass the device pointer encoded -by :c:func:`snd_dma_continuous_data()` with ``GFP_KERNEL|__GFP_DMA32`` -argument. - -:: - - snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_VMALLOC, - snd_dma_continuous_data(GFP_KERNEL | __GFP_DMA32), 0, 0); - Proc Interface ============== diff --git a/Documentation/staging/index.rst b/Documentation/staging/index.rst index abd0d18254d2..ded8254bc0d7 100644 --- a/Documentation/staging/index.rst +++ b/Documentation/staging/index.rst @@ -14,45 +14,3 @@ Unsorted Documentation static-keys tee xz - -Atomic Types -============ - -.. raw:: latex - - \footnotesize - -.. include:: ../atomic_t.txt - :literal: - -.. raw:: latex - - \normalsize - -Atomic bitops -============= - -.. raw:: latex - - \footnotesize - -.. include:: ../atomic_bitops.txt - :literal: - -.. raw:: latex - - \normalsize - -Memory Barriers -=============== - -.. raw:: latex - - \footnotesize - -.. include:: ../memory-barriers.txt - :literal: - -.. raw:: latex - - \normalsize diff --git a/Documentation/subsystem-apis.rst b/Documentation/subsystem-apis.rst new file mode 100644 index 000000000000..af65004a80aa --- /dev/null +++ b/Documentation/subsystem-apis.rst @@ -0,0 +1,58 @@ +.. SPDX-License-Identifier: GPL-2.0 + +============================== +Kernel subsystem documentation +============================== + +These books get into the details of how specific kernel subsystems work +from the point of view of a kernel developer. Much of the information here +is taken directly from the kernel source, with supplemental material added +as needed (or at least as we managed to add it — probably *not* all that is +needed). + +**Fixme**: much more organizational work is needed here. + +.. toctree:: + :maxdepth: 1 + + driver-api/index + core-api/index + locking/index + accounting/index + block/index + cdrom/index + cpu-freq/index + fb/index + fpga/index + hid/index + i2c/index + iio/index + isdn/index + infiniband/index + leds/index + netlabel/index + networking/index + pcmcia/index + power/index + target/index + timers/index + spi/index + w1/index + watchdog/index + virt/index + input/index + hwmon/index + gpu/index + security/index + sound/index + crypto/index + filesystems/index + mm/index + bpf/index + usb/index + PCI/index + scsi/index + misc-devices/index + scheduler/index + mhi/index + peci/index diff --git a/Documentation/trace/coresight/coresight-cpu-debug.rst b/Documentation/trace/coresight/coresight-cpu-debug.rst index 993dd294b81b..836b35532667 100644 --- a/Documentation/trace/coresight/coresight-cpu-debug.rst +++ b/Documentation/trace/coresight/coresight-cpu-debug.rst @@ -117,7 +117,8 @@ divide into below cases: Device Tree Bindings -------------------- -See Documentation/devicetree/bindings/arm/coresight-cpu-debug.txt for details. +See Documentation/devicetree/bindings/arm/arm,coresight-cpu-debug.yaml for +details. How to use the module diff --git a/Documentation/trace/coresight/coresight-etm4x-reference.rst b/Documentation/trace/coresight/coresight-etm4x-reference.rst index fb7578fd9372..70e34b8c81c1 100644 --- a/Documentation/trace/coresight/coresight-etm4x-reference.rst +++ b/Documentation/trace/coresight/coresight-etm4x-reference.rst @@ -71,6 +71,20 @@ the ‘TRC’ prefix. ---- +:File: ``ts_source`` (ro) +:Trace Registers: None. +:Notes: + When FEAT_TRF is implemented, value of TRFCR_ELx.TS used for trace session. Otherwise -1 + indicates an unknown time source. Check trcidr0.tssize to see if a global timestamp is + available. + +:Example: + ``$> cat ts_source`` + + ``$> 1`` + +---- + :File: ``addr_idx`` (rw) :Trace Registers: None. :Notes: diff --git a/Documentation/trace/coresight/coresight-perf.rst b/Documentation/trace/coresight/coresight-perf.rst new file mode 100644 index 000000000000..d087aae7d492 --- /dev/null +++ b/Documentation/trace/coresight/coresight-perf.rst @@ -0,0 +1,158 @@ +.. SPDX-License-Identifier: GPL-2.0 + +================ +CoreSight - Perf +================ + + :Author: Carsten Haitzler <carsten.haitzler@arm.com> + :Date: June 29th, 2022 + +Perf is able to locally access CoreSight trace data and store it to the +output perf data files. This data can then be later decoded to give the +instructions that were traced for debugging or profiling purposes. You +can log such data with a perf record command like:: + + perf record -e cs_etm//u testbinary + +This would run some test binary (testbinary) until it exits and record +a perf.data trace file. That file would have AUX sections if CoreSight +is working correctly. You can dump the content of this file as +readable text with a command like:: + + perf report --stdio --dump -i perf.data + +You should find some sections of this file have AUX data blocks like:: + + 0x1e78 [0x30]: PERF_RECORD_AUXTRACE size: 0x11dd0 offset: 0 ref: 0x1b614fc1061b0ad1 idx: 0 tid: 531230 cpu: -1 + + . ... CoreSight ETM Trace data: size 73168 bytes + Idx:0; ID:10; I_ASYNC : Alignment Synchronisation. + Idx:12; ID:10; I_TRACE_INFO : Trace Info.; INFO=0x0 { CC.0 } + Idx:17; ID:10; I_ADDR_L_64IS0 : Address, Long, 64 bit, IS0.; Addr=0x0000000000000000; + Idx:26; ID:10; I_TRACE_ON : Trace On. + Idx:27; ID:10; I_ADDR_CTXT_L_64IS0 : Address & Context, Long, 64 bit, IS0.; Addr=0x0000FFFFB6069140; Ctxt: AArch64,EL0, NS; + Idx:38; ID:10; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEEEEEEEEEEEE + Idx:39; ID:10; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEEEEEEEEEEEE + Idx:40; ID:10; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEEEEEEEEEEEE + Idx:41; ID:10; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEN + ... + +If you see these above, then your system is tracing CoreSight data +correctly. + +To compile perf with CoreSight support in the tools/perf directory do:: + + make CORESIGHT=1 + +This requires OpenCSD to build. You may install distribution packages +for the support such as libopencsd and libopencsd-dev or download it +and build yourself. Upstream OpenCSD is located at: + + https://github.com/Linaro/OpenCSD + +For complete information on building perf with CoreSight support and +more extensive usage look at: + + https://github.com/Linaro/OpenCSD/blob/master/HOWTO.md + + +Kernel CoreSight Support +------------------------ + +You will also want CoreSight support enabled in your kernel config. +Ensure it is enabled with:: + + CONFIG_CORESIGHT=y + +There are various other CoreSight options you probably also want +enabled like:: + + CONFIG_CORESIGHT_LINKS_AND_SINKS=y + CONFIG_CORESIGHT_LINK_AND_SINK_TMC=y + CONFIG_CORESIGHT_CATU=y + CONFIG_CORESIGHT_SINK_TPIU=y + CONFIG_CORESIGHT_SINK_ETBV10=y + CONFIG_CORESIGHT_SOURCE_ETM4X=y + CONFIG_CORESIGHT_CTI=y + CONFIG_CORESIGHT_CTI_INTEGRATION_REGS=y + +Please refer to the kernel configuration help for more information. + +Perf test - Verify kernel and userspace perf CoreSight work +----------------------------------------------------------- + +When you run perf test, it will do a lot of self tests. Some of those +tests will cover CoreSight (only if enabled and on ARM64). You +generally would run perf test from the tools/perf directory in the +kernel tree. Some tests will check some internal perf support like: + + Check Arm CoreSight trace data recording and synthesized samples + Check Arm SPE trace data recording and synthesized samples + +Some others will actually use perf record and some test binaries that +are in tests/shell/coresight and will collect traces to ensure a +minimum level of functionality is met. The scripts that launch these +tests are in the same directory. These will all look like: + + CoreSight / ASM Pure Loop + CoreSight / Memcpy 16k 10 Threads + CoreSight / Thread Loop 10 Threads - Check TID + etc. + +These perf record tests will not run if the tool binaries do not exist +in tests/shell/coresight/\*/ and will be skipped. If you do not have +CoreSight support in hardware then either do not build perf with +CoreSight support or remove these binaries in order to not have these +tests fail and have them skip instead. + +These tests will log historical results in the current working +directory (e.g. tools/perf) and will be named stats-\*.csv like: + + stats-asm_pure_loop-out.csv + stats-memcpy_thread-16k_10.csv + ... + +These statistic files log some aspects of the AUX data sections in +the perf data output counting some numbers of certain encodings (a +good way to know that it's working in a very simple way). One problem +with CoreSight is that given a large enough amount of data needing to +be logged, some of it can be lost due to the processor not waking up +in time to read out all the data from buffers etc.. You will notice +that the amount of data collected can vary a lot per run of perf test. +If you wish to see how this changes over time, simply run perf test +multiple times and all these csv files will have more and more data +appended to it that you can later examine, graph and otherwise use to +figure out if things have become worse or better. + +This means sometimes these tests fail as they don't capture all the +data needed. This is about tracking quality and amount of data +produced over time and to see when changes to the Linux kernel improve +quality of traces. + +Be aware that some of these tests take quite a while to run, specifically +in processing the perf data file and dumping contents to then examine what +is inside. + +You can change where these csv logs are stored by setting the +PERF_TEST_CORESIGHT_STATDIR environment variable before running perf +test like:: + + export PERF_TEST_CORESIGHT_STATDIR=/var/tmp + perf test + +They will also store resulting perf output data in the current +directory for later inspection like:: + + perf-asm_pure_loop-out.data + perf-memcpy_thread-16k_10.data + ... + +You can alter where the perf data files are stored by setting the +PERF_TEST_CORESIGHT_DATADIR environment variable such as:: + + PERF_TEST_CORESIGHT_DATADIR=/var/tmp + perf test + +You may wish to set these above environment variables if you wish to +keep the output of tests outside of the current working directory for +longer term storage and examination. diff --git a/Documentation/trace/hisi-ptt.rst b/Documentation/trace/hisi-ptt.rst new file mode 100644 index 000000000000..4f87d8e21065 --- /dev/null +++ b/Documentation/trace/hisi-ptt.rst @@ -0,0 +1,298 @@ +.. SPDX-License-Identifier: GPL-2.0 + +====================================== +HiSilicon PCIe Tune and Trace device +====================================== + +Introduction +============ + +HiSilicon PCIe tune and trace device (PTT) is a PCIe Root Complex +integrated Endpoint (RCiEP) device, providing the capability +to dynamically monitor and tune the PCIe link's events (tune), +and trace the TLP headers (trace). The two functions are independent, +but is recommended to use them together to analyze and enhance the +PCIe link's performance. + +On Kunpeng 930 SoC, the PCIe Root Complex is composed of several +PCIe cores. Each PCIe core includes several Root Ports and a PTT +RCiEP, like below. The PTT device is capable of tuning and +tracing the links of the PCIe core. +:: + + +--------------Core 0-------+ + | | [ PTT ] | + | | [Root Port]---[Endpoint] + | | [Root Port]---[Endpoint] + | | [Root Port]---[Endpoint] + Root Complex |------Core 1-------+ + | | [ PTT ] | + | | [Root Port]---[ Switch ]---[Endpoint] + | | [Root Port]---[Endpoint] `-[Endpoint] + | | [Root Port]---[Endpoint] + +---------------------------+ + +The PTT device driver registers one PMU device for each PTT device. +The name of each PTT device is composed of 'hisi_ptt' prefix with +the id of the SICL and the Core where it locates. The Kunpeng 930 +SoC encapsulates multiple CPU dies (SCCL, Super CPU Cluster) and +IO dies (SICL, Super I/O Cluster), where there's one PCIe Root +Complex for each SICL. +:: + + /sys/devices/hisi_ptt<sicl_id>_<core_id> + +Tune +==== + +PTT tune is designed for monitoring and adjusting PCIe link parameters (events). +Currently we support events in 2 classes. The scope of the events +covers the PCIe core to which the PTT device belongs. + +Each event is presented as a file under $(PTT PMU dir)/tune, and +a simple open/read/write/close cycle will be used to tune the event. +:: + + $ cd /sys/devices/hisi_ptt<sicl_id>_<core_id>/tune + $ ls + qos_tx_cpl qos_tx_np qos_tx_p + tx_path_rx_req_alloc_buf_level + tx_path_tx_req_alloc_buf_level + $ cat qos_tx_dp + 1 + $ echo 2 > qos_tx_dp + $ cat qos_tx_dp + 2 + +Current value (numerical value) of the event can be simply read +from the file, and the desired value written to the file to tune. + +1. Tx Path QoS Control +------------------------ + +The following files are provided to tune the QoS of the tx path of +the PCIe core. + +- qos_tx_cpl: weight of Tx completion TLPs +- qos_tx_np: weight of Tx non-posted TLPs +- qos_tx_p: weight of Tx posted TLPs + +The weight influences the proportion of certain packets on the PCIe link. +For example, for the storage scenario, increase the proportion +of the completion packets on the link to enhance the performance as +more completions are consumed. + +The available tune data of these events is [0, 1, 2]. +Writing a negative value will return an error, and out of range +values will be converted to 2. Note that the event value just +indicates a probable level, but is not precise. + +2. Tx Path Buffer Control +------------------------- + +Following files are provided to tune the buffer of tx path of the PCIe core. + +- rx_alloc_buf_level: watermark of Rx requested +- tx_alloc_buf_level: watermark of Tx requested + +These events influence the watermark of the buffer allocated for each +type. Rx means the inbound while Tx means outbound. The packets will +be stored in the buffer first and then transmitted either when the +watermark reached or when timed out. For a busy direction, you should +increase the related buffer watermark to avoid frequently posting and +thus enhance the performance. In most cases just keep the default value. + +The available tune data of above events is [0, 1, 2]. +Writing a negative value will return an error, and out of range +values will be converted to 2. Note that the event value just +indicates a probable level, but is not precise. + +Trace +===== + +PTT trace is designed for dumping the TLP headers to the memory, which +can be used to analyze the transactions and usage condition of the PCIe +Link. You can choose to filter the traced headers by either Requester ID, +or those downstream of a set of Root Ports on the same core of the PTT +device. It's also supported to trace the headers of certain type and of +certain direction. + +You can use the perf command `perf record` to set the parameters, start +trace and get the data. It's also supported to decode the trace +data with `perf report`. The control parameters for trace is inputted +as event code for each events, which will be further illustrated later. +An example usage is like +:: + + $ perf record -e hisi_ptt0_2/filter=0x80001,type=1,direction=1, + format=1/ -- sleep 5 + +This will trace the TLP headers downstream root port 0000:00:10.1 (event +code for event 'filter' is 0x80001) with type of posted TLP requests, +direction of inbound and traced data format of 8DW. + +1. Filter +--------- + +The TLP headers to trace can be filtered by the Root Ports or the Requester ID +of the Endpoint, which are located on the same core of the PTT device. You can +set the filter by specifying the `filter` parameter which is required to start +the trace. The parameter value is 20 bit. Bit 19 indicates the filter type. +1 for Root Port filter and 0 for Requester filter. Bit[15:0] indicates the +filter value. The value for a Root Port is a mask of the core port id which is +calculated from its PCI Slot ID as (slotid & 7) * 2. The value for a Requester +is the Requester ID (Device ID of the PCIe function). Bit[18:16] is currently +reserved for extension. + +For example, if the desired filter is Endpoint function 0000:01:00.1 the filter +value will be 0x00101. If the desired filter is Root Port 0000:00:10.0 then +then filter value is calculated as 0x80001. + +Note that multiple Root Ports can be specified at one time, but only one +Endpoint function can be specified in one trace. Specifying both Root Port +and function at the same time is not supported. Driver maintains a list of +available filters and will check the invalid inputs. + +Currently the available filters are detected in driver's probe. If the supported +devices are removed/added after probe, you may need to reload the driver to update +the filters. + +2. Type +------- + +You can trace the TLP headers of certain types by specifying the `type` +parameter, which is required to start the trace. The parameter value is +8 bit. Current supported types and related values are shown below: + +- 8'b00000001: posted requests (P) +- 8'b00000010: non-posted requests (NP) +- 8'b00000100: completions (CPL) + +You can specify multiple types when tracing inbound TLP headers, but can only +specify one when tracing outbound TLP headers. + +3. Direction +------------ + +You can trace the TLP headers from certain direction, which is relative +to the Root Port or the PCIe core, by specifying the `direction` parameter. +This is optional and the default parameter is inbound. The parameter value +is 4 bit. When the desired format is 4DW, directions and related values +supported are shown below: + +- 4'b0000: inbound TLPs (P, NP, CPL) +- 4'b0001: outbound TLPs (P, NP, CPL) +- 4'b0010: outbound TLPs (P, NP, CPL) and inbound TLPs (P, NP, CPL B) +- 4'b0011: outbound TLPs (P, NP, CPL) and inbound TLPs (CPL A) + +When the desired format is 8DW, directions and related values supported are +shown below: + +- 4'b0000: reserved +- 4'b0001: outbound TLPs (P, NP, CPL) +- 4'b0010: inbound TLPs (P, NP, CPL B) +- 4'b0011: inbound TLPs (CPL A) + +Inbound completions are classified into two types: + +- completion A (CPL A): completion of CHI/DMA/Native non-posted requests, except for CPL B +- completion B (CPL B): completion of DMA remote2local and P2P non-posted requests + +4. Format +-------------- + +You can change the format of the traced TLP headers by specifying the +`format` parameter. The default format is 4DW. The parameter value is 4 bit. +Current supported formats and related values are shown below: + +- 4'b0000: 4DW length per TLP header +- 4'b0001: 8DW length per TLP header + +The traced TLP header format is different from the PCIe standard. + +When using the 8DW data format, the entire TLP header is logged +(Header DW0-3 shown below). For example, the TLP header for Memory +Reads with 64-bit addresses is shown in PCIe r5.0, Figure 2-17; +the header for Configuration Requests is shown in Figure 2.20, etc. + +In addition, 8DW trace buffer entries contain a timestamp and +possibly a prefix for a PASID TLP prefix (see Figure 6-20, PCIe r5.0). +Otherwise this field will be all 0. + +The bit[31:11] of DW0 is always 0x1fffff, which can be +used to distinguish the data format. 8DW format is like +:: + + bits [ 31:11 ][ 10:0 ] + |---------------------------------------|-------------------| + DW0 [ 0x1fffff ][ Reserved (0x7ff) ] + DW1 [ Prefix ] + DW2 [ Header DW0 ] + DW3 [ Header DW1 ] + DW4 [ Header DW2 ] + DW5 [ Header DW3 ] + DW6 [ Reserved (0x0) ] + DW7 [ Time ] + +When using the 4DW data format, DW0 of the trace buffer entry +contains selected fields of DW0 of the TLP, together with a +timestamp. DW1-DW3 of the trace buffer entry contain DW1-DW3 +directly from the TLP header. + +4DW format is like +:: + + bits [31:30] [ 29:25 ][24][23][22][21][ 20:11 ][ 10:0 ] + |-----|---------|---|---|---|---|-------------|-------------| + DW0 [ Fmt ][ Type ][T9][T8][TH][SO][ Length ][ Time ] + DW1 [ Header DW1 ] + DW2 [ Header DW2 ] + DW3 [ Header DW3 ] + +5. Memory Management +-------------------- + +The traced TLP headers will be written to the memory allocated +by the driver. The hardware accepts 4 DMA address with same size, +and writes the buffer sequentially like below. If DMA addr 3 is +finished and the trace is still on, it will return to addr 0. +:: + + +->[DMA addr 0]->[DMA addr 1]->[DMA addr 2]->[DMA addr 3]-+ + +---------------------------------------------------------+ + +Driver will allocate each DMA buffer of 4MiB. The finished buffer +will be copied to the perf AUX buffer allocated by the perf core. +Once the AUX buffer is full while the trace is still on, driver +will commit the AUX buffer first and then apply for a new one with +the same size. The size of AUX buffer is default to 16MiB. User can +adjust the size by specifying the `-m` parameter of the perf command. + +6. Decoding +----------- + +You can decode the traced data with `perf report -D` command (currently +only support to dump the raw trace data). The traced data will be decoded +according to the format described previously (take 8DW as an example): +:: + + [...perf headers and other information] + . ... HISI PTT data: size 4194304 bytes + . 00000000: 00 00 00 00 Prefix + . 00000004: 01 00 00 60 Header DW0 + . 00000008: 0f 1e 00 01 Header DW1 + . 0000000c: 04 00 00 00 Header DW2 + . 00000010: 40 00 81 02 Header DW3 + . 00000014: 33 c0 04 00 Time + . 00000020: 00 00 00 00 Prefix + . 00000024: 01 00 00 60 Header DW0 + . 00000028: 0f 1e 00 01 Header DW1 + . 0000002c: 04 00 00 00 Header DW2 + . 00000030: 40 00 81 02 Header DW3 + . 00000034: 02 00 00 00 Time + . 00000040: 00 00 00 00 Prefix + . 00000044: 01 00 00 60 Header DW0 + . 00000048: 0f 1e 00 01 Header DW1 + . 0000004c: 04 00 00 00 Header DW2 + . 00000050: 40 00 81 02 Header DW3 + [...] diff --git a/Documentation/trace/histogram.rst b/Documentation/trace/histogram.rst index 859fd1b76c63..c1b685a38f6b 100644 --- a/Documentation/trace/histogram.rst +++ b/Documentation/trace/histogram.rst @@ -412,7 +412,7 @@ Extended error information Because the default sort key above is 'hitcount', the above shows a the list of call_sites by increasing hitcount, so that at the bottom we see the functions that made the most kmalloc calls during the - run. If instead we we wanted to see the top kmalloc callers in + run. If instead we wanted to see the top kmalloc callers in terms of the number of bytes requested rather than the number of calls, and we wanted the top caller to appear at the top, we can use the 'sort' parameter, along with the 'descending' modifier:: diff --git a/Documentation/trace/index.rst b/Documentation/trace/index.rst index 2d73e8697523..ea25a9220f92 100644 --- a/Documentation/trace/index.rst +++ b/Documentation/trace/index.rst @@ -33,3 +33,4 @@ Linux Tracing Technologies coresight/index user_events rv/index + hisi-ptt diff --git a/Documentation/trace/kprobes.rst b/Documentation/trace/kprobes.rst index f318bceda1e6..48cf778a2468 100644 --- a/Documentation/trace/kprobes.rst +++ b/Documentation/trace/kprobes.rst @@ -328,8 +328,8 @@ Configuring Kprobes =================== When configuring the kernel using make menuconfig/xconfig/oldconfig, -ensure that CONFIG_KPROBES is set to "y". Under "General setup", look -for "Kprobes". +ensure that CONFIG_KPROBES is set to "y", look for "Kprobes" under +"General architecture-dependent options". So that you can load and unload Kprobes-based instrumentation modules, make sure "Loadable module support" (CONFIG_MODULES) and "Module diff --git a/Documentation/trace/timerlat-tracer.rst b/Documentation/trace/timerlat-tracer.rst index d643c95c01eb..db17df312bc8 100644 --- a/Documentation/trace/timerlat-tracer.rst +++ b/Documentation/trace/timerlat-tracer.rst @@ -20,7 +20,7 @@ For example:: [root@f32 ~]# cd /sys/kernel/tracing/ [root@f32 tracing]# echo timerlat > current_tracer -It is possible to follow the trace by reading the trace trace file:: +It is possible to follow the trace by reading the trace file:: [root@f32 tracing]# cat trace # tracer: timerlat diff --git a/Documentation/trace/user_events.rst b/Documentation/trace/user_events.rst index c180936f49fc..9f181f342a70 100644 --- a/Documentation/trace/user_events.rst +++ b/Documentation/trace/user_events.rst @@ -20,14 +20,14 @@ dynamic_events is the same as the ioctl with the u: prefix applied. Typically programs will register a set of events that they wish to expose to tools that can read trace_events (such as ftrace and perf). The registration -process gives back two ints to the program for each event. The first int is the -status index. This index describes which byte in the +process gives back two ints to the program for each event. The first int is +the status bit. This describes which bit in little-endian format in the /sys/kernel/debug/tracing/user_events_status file represents this event. The -second int is the write index. This index describes the data when a write() or +second int is the write index which describes the data when a write() or writev() is called on the /sys/kernel/debug/tracing/user_events_data file. -The structures referenced in this document are contained with the -/include/uap/linux/user_events.h file in the source tree. +The structures referenced in this document are contained within the +/include/uapi/linux/user_events.h file in the source tree. **NOTE:** *Both user_events_status and user_events_data are under the tracefs filesystem and may be mounted at different paths than above.* @@ -38,18 +38,18 @@ Registering within a user process is done via ioctl() out to the /sys/kernel/debug/tracing/user_events_data file. The command to issue is DIAG_IOCSREG. -This command takes a struct user_reg as an argument:: +This command takes a packed struct user_reg as an argument:: struct user_reg { u32 size; u64 name_args; - u32 status_index; + u32 status_bit; u32 write_index; }; The struct user_reg requires two inputs, the first is the size of the structure to ensure forward and backward compatibility. The second is the command string -to issue for registering. Upon success two outputs are set, the status index +to issue for registering. Upon success two outputs are set, the status bit and the write index. User based events show up under tracefs like any other event under the @@ -111,15 +111,56 @@ in realtime. This allows user programs to only incur the cost of the write() or writev() calls when something is actively attached to the event. User programs call mmap() on /sys/kernel/debug/tracing/user_events_status to -check the status for each event that is registered. The byte to check in the -file is given back after the register ioctl() via user_reg.status_index. +check the status for each event that is registered. The bit to check in the +file is given back after the register ioctl() via user_reg.status_bit. The bit +is always in little-endian format. Programs can check if the bit is set either +using a byte-wise index with a mask or a long-wise index with a little-endian +mask. + Currently the size of user_events_status is a single page, however, custom kernel configurations can change this size to allow more user based events. In all cases the size of the file is a multiple of a page size. -For example, if the register ioctl() gives back a status_index of 3 you would -check byte 3 of the returned mmap data to see if anything is attached to that -event. +For example, if the register ioctl() gives back a status_bit of 3 you would +check byte 0 (3 / 8) of the returned mmap data and then AND the result with 8 +(1 << (3 % 8)) to see if anything is attached to that event. + +A byte-wise index check is performed as follows:: + + int index, mask; + char *status_page; + + index = status_bit / 8; + mask = 1 << (status_bit % 8); + + ... + + if (status_page[index] & mask) { + /* Enabled */ + } + +A long-wise index check is performed as follows:: + + #include <asm/bitsperlong.h> + #include <endian.h> + + #if __BITS_PER_LONG == 64 + #define endian_swap(x) htole64(x) + #else + #define endian_swap(x) htole32(x) + #endif + + long index, mask, *status_page; + + index = status_bit / __BITS_PER_LONG; + mask = 1L << (status_bit % __BITS_PER_LONG); + mask = endian_swap(mask); + + ... + + if (status_page[index] & mask) { + /* Enabled */ + } Administrators can easily check the status of all registered events by reading the user_events_status file directly via a terminal. The output is as follows:: @@ -137,7 +178,7 @@ For example, on a system that has a single event the output looks like this:: Active: 1 Busy: 0 - Max: 4096 + Max: 32768 If a user enables the user event via ftrace, the output would change to this:: @@ -145,21 +186,10 @@ If a user enables the user event via ftrace, the output would change to this:: Active: 1 Busy: 1 - Max: 4096 - -**NOTE:** *A status index of 0 will never be returned. This allows user -programs to have an index that can be used on error cases.* - -Status Bits -^^^^^^^^^^^ -The byte being checked will be non-zero if anything is attached. Programs can -check specific bits in the byte to see what mechanism has been attached. - -The following values are defined to aid in checking what has been attached: - -**EVENT_STATUS_FTRACE** - Bit set if ftrace has been attached (Bit 0). + Max: 32768 -**EVENT_STATUS_PERF** - Bit set if perf has been attached (Bit 1). +**NOTE:** *A status bit of 0 will never be returned. This allows user programs +to have a bit that can be used on error cases.* Writing Data ------------ diff --git a/Documentation/translations/it_IT/process/magic-number.rst b/Documentation/translations/it_IT/process/magic-number.rst index f452fafb1e84..02eb7eb2448e 100644 --- a/Documentation/translations/it_IT/process/magic-number.rst +++ b/Documentation/translations/it_IT/process/magic-number.rst @@ -75,87 +75,17 @@ Registro dei cambiamenti:: Nome magico Numero Struttura File ===================== ================ ======================== ========================================== PG_MAGIC 'P' pg_{read,write}_hdr ``include/linux/pg.h`` -CMAGIC 0x0111 user ``include/linux/a.out.h`` -MKISS_DRIVER_MAGIC 0x04bf mkiss_channel ``drivers/net/mkiss.h`` -HDLC_MAGIC 0x239e n_hdlc ``drivers/char/n_hdlc.c`` APM_BIOS_MAGIC 0x4101 apm_user ``arch/x86/kernel/apm_32.c`` -DB_MAGIC 0x4442 fc_info ``drivers/net/iph5526_novram.c`` -DL_MAGIC 0x444d fc_info ``drivers/net/iph5526_novram.c`` FASYNC_MAGIC 0x4601 fasync_struct ``include/linux/fs.h`` -FF_MAGIC 0x4646 fc_info ``drivers/net/iph5526_novram.c`` -PTY_MAGIC 0x5001 ``drivers/char/pty.c`` -PPP_MAGIC 0x5002 ppp ``include/linux/if_pppvar.h`` -SSTATE_MAGIC 0x5302 serial_state ``include/linux/serial.h`` SLIP_MAGIC 0x5302 slip ``drivers/net/slip.h`` -STRIP_MAGIC 0x5303 strip ``drivers/net/strip.c`` -SIXPACK_MAGIC 0x5304 sixpack ``drivers/net/hamradio/6pack.h`` -AX25_MAGIC 0x5316 ax_disp ``drivers/net/mkiss.h`` -TTY_MAGIC 0x5401 tty_struct ``include/linux/tty.h`` -MGSL_MAGIC 0x5401 mgsl_info ``drivers/char/synclink.c`` -TTY_DRIVER_MAGIC 0x5402 tty_driver ``include/linux/tty_driver.h`` MGSLPC_MAGIC 0x5402 mgslpc_info ``drivers/char/pcmcia/synclink_cs.c`` -USB_SERIAL_MAGIC 0x6702 usb_serial ``drivers/usb/serial/usb-serial.h`` -FULL_DUPLEX_MAGIC 0x6969 ``drivers/net/ethernet/dec/tulip/de2104x.c`` -USB_BLUETOOTH_MAGIC 0x6d02 usb_bluetooth ``drivers/usb/class/bluetty.c`` -RFCOMM_TTY_MAGIC 0x6d02 ``net/bluetooth/rfcomm/tty.c`` -USB_SERIAL_PORT_MAGIC 0x7301 usb_serial_port ``drivers/usb/serial/usb-serial.h`` -CG_MAGIC 0x00090255 ufs_cylinder_group ``include/linux/ufs_fs.h`` -LSEMAGIC 0x05091998 lse ``drivers/fc4/fc.c`` -RIEBL_MAGIC 0x09051990 ``drivers/net/atarilance.c`` -NBD_REQUEST_MAGIC 0x12560953 nbd_request ``include/linux/nbd.h`` -RED_MAGIC2 0x170fc2a5 (any) ``mm/slab.c`` BAYCOM_MAGIC 0x19730510 baycom_state ``drivers/net/baycom_epp.c`` -ISDN_X25IFACE_MAGIC 0x1e75a2b9 isdn_x25iface_proto_data ``drivers/isdn/isdn_x25iface.h`` -ECP_MAGIC 0x21504345 cdkecpsig ``include/linux/cdk.h`` -LSOMAGIC 0x27091997 lso ``drivers/fc4/fc.c`` -LSMAGIC 0x2a3b4d2a ls ``drivers/fc4/fc.c`` -WANPIPE_MAGIC 0x414C4453 sdla_{dump,exec} ``include/linux/wanpipe.h`` -CS_CARD_MAGIC 0x43525553 cs_card ``sound/oss/cs46xx.c`` -LABELCL_MAGIC 0x4857434c labelcl_info_s ``include/asm/ia64/sn/labelcl.h`` -ISDN_ASYNC_MAGIC 0x49344C01 modem_info ``include/linux/isdn.h`` -CTC_ASYNC_MAGIC 0x49344C01 ctc_tty_info ``drivers/s390/net/ctctty.c`` -ISDN_NET_MAGIC 0x49344C02 isdn_net_local_s ``drivers/isdn/i4l/isdn_net_lib.h`` -SAVEKMSG_MAGIC2 0x4B4D5347 savekmsg ``arch/*/amiga/config.c`` -CS_STATE_MAGIC 0x4c4f4749 cs_state ``sound/oss/cs46xx.c`` -SLAB_C_MAGIC 0x4f17a36d kmem_cache ``mm/slab.c`` -COW_MAGIC 0x4f4f4f4d cow_header_v1 ``arch/um/drivers/ubd_user.c`` -I810_CARD_MAGIC 0x5072696E i810_card ``sound/oss/i810_audio.c`` -TRIDENT_CARD_MAGIC 0x5072696E trident_card ``sound/oss/trident.c`` -ROUTER_MAGIC 0x524d4157 wan_device [in ``wanrouter.h`` pre 3.9] -SAVEKMSG_MAGIC1 0x53415645 savekmsg ``arch/*/amiga/config.c`` -GDA_MAGIC 0x58464552 gda ``arch/mips/include/asm/sn/gda.h`` -RED_MAGIC1 0x5a2cf071 (any) ``mm/slab.c`` -EEPROM_MAGIC_VALUE 0x5ab478d2 lanai_dev ``drivers/atm/lanai.c`` HDLCDRV_MAGIC 0x5ac6e778 hdlcdrv_state ``include/linux/hdlcdrv.h`` -PCXX_MAGIC 0x5c6df104 channel ``drivers/char/pcxx.h`` KV_MAGIC 0x5f4b565f kernel_vars_s ``arch/mips/include/asm/sn/klkernvars.h`` -I810_STATE_MAGIC 0x63657373 i810_state ``sound/oss/i810_audio.c`` -TRIDENT_STATE_MAGIC 0x63657373 trient_state ``sound/oss/trident.c`` -M3_CARD_MAGIC 0x646e6f50 m3_card ``sound/oss/maestro3.c`` -FW_HEADER_MAGIC 0x65726F66 fw_header ``drivers/atm/fore200e.h`` -SLOT_MAGIC 0x67267321 slot ``drivers/hotplug/cpqphp.h`` -SLOT_MAGIC 0x67267322 slot ``drivers/hotplug/acpiphp.h`` -LO_MAGIC 0x68797548 nbd_device ``include/linux/nbd.h`` -M3_STATE_MAGIC 0x734d724d m3_state ``sound/oss/maestro3.c`` -VMALLOC_MAGIC 0x87654320 snd_alloc_track ``sound/core/memory.c`` -KMALLOC_MAGIC 0x87654321 snd_alloc_track ``sound/core/memory.c`` -PWC_MAGIC 0x89DC10AB pwc_device ``drivers/usb/media/pwc.h`` -NBD_REPLY_MAGIC 0x96744668 nbd_reply ``include/linux/nbd.h`` -ENI155_MAGIC 0xa54b872d midway_eprom ``drivers/atm/eni.h`` CODA_MAGIC 0xC0DAC0DA coda_file_info ``fs/coda/coda_fs_i.h`` YAM_MAGIC 0xF10A7654 yam_port ``drivers/net/hamradio/yam.c`` CCB_MAGIC 0xf2691ad2 ccb ``drivers/scsi/ncr53c8xx.c`` QUEUE_MAGIC_FREE 0xf7e1c9a3 queue_entry ``drivers/scsi/arm/queue.c`` QUEUE_MAGIC_USED 0xf7e1cc33 queue_entry ``drivers/scsi/arm/queue.c`` -HTB_CMAGIC 0xFEFAFEF1 htb_class ``net/sched/sch_htb.c`` NMI_MAGIC 0x48414d4d455201 nmi_s ``arch/mips/include/asm/sn/nmi.h`` ===================== ================ ======================== ========================================== - -Da notare che ci sono anche dei numeri magici specifici per driver nel -*sound memory management*. Consultate ``include/sound/sndmagic.h`` per una -lista completa. Molti driver audio OSS hanno i loro numeri magici costruiti a -partire dall'identificativo PCI della scheda audio - nemmeno questi sono -elencati in questo file. - -Il file-system HFS è un altro grande utilizzatore di numeri magici - potete -trovarli qui ``fs/hfs/hfs.h``. diff --git a/Documentation/translations/zh_CN/IRQ.txt b/Documentation/translations/zh_CN/IRQ.txt deleted file mode 100644 index 9aec8dca4fcf..000000000000 --- a/Documentation/translations/zh_CN/IRQ.txt +++ /dev/null @@ -1,39 +0,0 @@ -Chinese translated version of Documentation/core-api/irq/index.rst - -If you have any comment or update to the content, please contact the -original document maintainer directly. However, if you have a problem -communicating in English you can also ask the Chinese maintainer for -help. Contact the Chinese maintainer if this translation is outdated -or if there is a problem with the translation. - -Maintainer: Eric W. Biederman <ebiederman@xmission.com> -Chinese maintainer: Fu Wei <tekkamanninja@gmail.com> ---------------------------------------------------------------------- -Documentation/core-api/irq/index.rst çš„ä¸æ–‡ç¿»è¯‘ - -如果想评论或更新本文的内容，请直接è”ç³»åŽŸæ–‡æ¡£çš„ç»´æŠ¤è€…ã€‚å¦‚æžœä½ ä½¿ç”¨è‹±æ–‡ -交æµæœ‰å›°éš¾çš„è¯ï¼Œä¹Ÿå¯ä»¥å‘ä¸æ–‡ç‰ˆç»´æŠ¤è€…求助。如果本翻译更新ä¸åŠæ—¶æˆ–者翻 -译å˜åœ¨é—®é¢˜ï¼Œè¯·è”ç³»ä¸æ–‡ç‰ˆç»´æŠ¤è€…。 -英文版维护者： Eric W. Biederman <ebiederman@xmission.com> -ä¸æ–‡ç‰ˆç»´æŠ¤è€…： å‚…ç‚œ Fu Wei <tekkamanninja@gmail.com> -ä¸æ–‡ç‰ˆç¿»è¯‘者： å‚…ç‚œ Fu Wei <tekkamanninja@gmail.com> -ä¸æ–‡ç‰ˆæ ¡è¯‘者： å‚…ç‚œ Fu Wei <tekkamanninja@gmail.com> - - -以下为æ£æ–‡ ---------------------------------------------------------------------- -何为 IRQ? - -一个 IRQ 是æ¥è‡ªæŸä¸ªè®¾å¤‡çš„一个ä¸æ–请求。目å‰ï¼Œå®ƒä»¬å¯ä»¥æ¥è‡ªä¸€ä¸ªç¡¬ä»¶å¼•è„šï¼Œ -或æ¥è‡ªä¸€ä¸ªæ•°æ®åŒ…。多个设备å¯èƒ½è¿žæŽ¥åˆ°åŒä¸ªç¡¬ä»¶å¼•è„šï¼Œä»Žè€Œå…±äº«ä¸€ä¸ª IRQ。 - -一个 IRQ ç¼–å·æ˜¯ç”¨äºŽå‘ŠçŸ¥ç¡¬ä»¶ä¸æ–æºçš„å†…æ ¸æ ‡è¯†ã€‚é€šå¸¸æƒ…å†µä¸‹ï¼Œè¿™æ˜¯ä¸€ä¸ª -全局 irq_desc 数组的索引，但是除了在 linux/interrupt.h ä¸çš„实现， -具体的细节是体系结构特定的。 - -一个 IRQ ç¼–å·æ˜¯è®¾å¤‡ä¸ŠæŸä¸ªå¯èƒ½çš„ä¸æ–æºçš„枚举。通常情况下，枚举的编å·æ˜¯ -该引脚在系统内ä¸æ–控制器的所有输入引脚ä¸çš„ç¼–å·ã€‚对于 ISA 总线ä¸çš„情况， -枚举的是在两个 i8259 ä¸æ–æŽ§åˆ¶å™¨ä¸ 16 个输入引脚。 - -架构å¯ä»¥å¯¹ IRQ ç¼–å·æŒ‡å®šé¢å¤–çš„å«ä¹‰ï¼Œåœ¨ç¡¬ä»¶æ¶‰åŠä»»ä½•æ‰‹å·¥é…置的情况下， -是被æ倡的。ISA çš„ IRQ 是一个分é…这类é¢å¤–å«ä¹‰çš„典型例å。 diff --git a/Documentation/translations/zh_CN/PCI/acpi-info.rst b/Documentation/translations/zh_CN/PCI/acpi-info.rst new file mode 100644 index 000000000000..a35f39dcd858 --- /dev/null +++ b/Documentation/translations/zh_CN/PCI/acpi-info.rst @@ -0,0 +1,139 @@ +.. SPDX-License-Identifier: GPL-2.0 +.. include:: ../disclaimer-zh_CN.rst + +:Original: Documentation/PCI/acpi-info.rst + +:翻译: + + å¸å»¶è…¾ Yanteng Si <siyanteng@loongson.cn> + +:æ ¡è¯‘: + + +===================== +PCI主桥的ACPI注æ„事项 +===================== + +一般的规则是，ACPI命å空间应该æè¿°æ“作系统å¯èƒ½ä½¿ç”¨çš„所有东西，除éžæœ‰å…¶ä»–方法让æ“作系 +统找到它[1, 2]。 + +ä¾‹å¦‚ï¼Œæ²¡æœ‰æ ‡å‡†çš„ç¡¬ä»¶æœºåˆ¶æ¥æžšä¸¾PCI主桥，所以ACPI命å空间必须æè¿°æ¯ä¸ªä¸»æ¡¥ã€è®¿é—®å®ƒ +下é¢çš„PCIé…置空间的方法ã€ä¸»æ¡¥è½¬å‘到PCI的地å€ç©ºé—´çª—å£ï¼ˆä½¿ç”¨_CRS）以åŠä¼ 统的INTx +ä¸æ–的路由（使用_PRT）。 + +在主桥下é¢çš„PCI设备，通常ä¸éœ€è¦é€šè¿‡ACPIæ述。æ“作系统å¯ä»¥é€šè¿‡æ ‡å‡†çš„PCIæžšä¸¾æœºåˆ¶æ¥ +å‘现它们，使用é…置访问æ¥å‘现和识别设备，并读å–和测é‡å®ƒä»¬çš„BAR。然而，如果ACPI为它们 +æ供电æºç®¡ç†æˆ–çƒæ’拔功能，或者如果设备有由平å°ä¸æ–控制器连接的INTxä¸æ–，需è¦ä¸€ä¸ª_PRT +æ¥æ述这些连接，这ç§æƒ…况下ACPIå¯ä»¥æè¿°PCI设备。 + +ACPI资æºæ述是通过ACPI命å空间ä¸è®¾å¤‡çš„_CRS对象完æˆçš„[2]。_CRSå°±åƒä¸€ä¸ªé€šç”¨çš„PCI BAR： +æ“作系统å¯ä»¥è¯»å–_CRS并找出æ£åœ¨æ¶ˆè€—的资æºï¼Œå³ä½¿å®ƒæ²¡æœ‰è¯¥è®¾å¤‡çš„驱动程åº[3]。这一点很é‡è¦ï¼Œ +å› ä¸ºå®ƒæ„味ç€ä¸€ä¸ªæ—§çš„æ“作系统å¯ä»¥æ£ç¡®åœ°å·¥ä½œï¼Œå³ä½¿æ˜¯åœ¨æ“作系统ä¸çŸ¥é“的新设备的系统上。新设 +备å¯èƒ½ä»€ä¹ˆéƒ½ä¸åšï¼Œä½†æ“作系统至少å¯ä»¥ç¡®ä¿æ²¡æœ‰èµ„æºä¸Žå®ƒä»¬å†²çªã€‚ + +åƒMCFGã€HPETã€ECDTç‰é™æ€è¡¨ï¼Œä¸æ˜¯ä¿ç•™åœ°å€ç©ºé—´çš„机制。é™æ€è¡¨æ˜¯åœ¨æ“作系统在å¯åŠ¨åˆæœŸä¸”在它 +能够解æžACPI命å空间之å‰éœ€è¦çŸ¥é“的东西。如果定义了一个新的表，å³ä½¿æ—§çš„æ“作系统忽略了这 +个表，它也需è¦æ£å¸¸è¿è¡Œã€‚_CRSå…è®¸è¿™æ ·åšï¼Œå› 为它是通用的，å¯ä»¥è¢«æ—§çš„æ“作系统解æžï¼›è€Œé™æ€è¡¨ +则ä¸å…许。 + +如果æ“作系统è¦ç®¡ç†ä¸€ä¸ªé€šè¿‡ACPIæè¿°çš„ä¸å¯å‘现的设备，该设备将有一个特定的_HID/_CID，以 +告诉æ“作系统与之绑定的驱动程åºï¼Œå¹¶ä¸”_CRS告诉æ“作系统和驱动程åºè¯¥è®¾å¤‡çš„寄å˜å™¨åœ¨å“ªé‡Œã€‚ + +PCI主桥是PNP0A03或PNP0A08设备。它们的_CRS应该æ述它们所消耗的所有地å€ç©ºé—´ã€‚这包括它 +们转å‘到PCI总线上的所有窗å£ï¼Œä»¥åŠä¸è½¬å‘到PCI的主桥本身的寄å˜å™¨ã€‚主桥的寄å˜å™¨åŒ…括次è¦/下 +级总线寄å˜å™¨ï¼Œå†³å®šäº†æ¡¥ä¸‹é¢çš„总线范围，窗å£å¯„å˜å™¨æ述了桥洞，ç‰ç‰ã€‚è¿™äº›éƒ½æ˜¯è®¾å¤‡ç›¸å…³çš„ï¼Œéž +架构相关的东西，所以PNP0A03/PNP0A08驱动å¯ä»¥ç®¡ç†å®ƒä»¬çš„唯一方法是通过_PRS/_CRS/_SRS， +它包å«äº†ç‰¹å®šäºŽè®¾å¤‡çš„细节。主桥寄å˜å™¨ä¹ŸåŒ…括ECAMç©ºé—´ï¼Œå› ä¸ºå®ƒæ˜¯ç”±ä¸»æ¡¥æ¶ˆè€—çš„ã€‚ + +ACPI定义了一个Consumer/Producerä½æ¥åŒºåˆ†æ¡¥å¯„å˜å™¨ï¼ˆâ€œConsumerâ€ä¸‹æ–‡è¯‘作消费者）和 +桥洞（“Producerâ€ä¸‹æ–‡è¯‘作生产者）[4, 5]，但是早期的BIOS没有æ£ç¡®ä½¿ç”¨è¿™ä¸ªä½ã€‚其结果 +是，目å‰çš„ACPI规范åªä¸ºæ‰©å±•åœ°å€ç©ºé—´æ述符定义了消费者/生产者；在旧的QWord/Word/Word地 +å€ç©ºé—´æ述符ä¸ï¼Œè¯¥ä½åº”è¯¥è¢«å¿½ç•¥ã€‚å› æ¤ï¼Œæ“作系统必须å‡å®šæ‰€æœ‰çš„QWord/Word/Wordæ述符都是 +窗å£ã€‚ + +åœ¨å¢žåŠ æ‰©å±•åœ°å€ç©ºé—´æ述符之å‰ï¼Œæ¶ˆè´¹è€…/生产者的失败æ„味ç€æ²¡æœ‰åŠžæ³•æè¿°PNP0A03/PNP0A08设 +备本身的桥寄å˜å™¨ã€‚解决办法是在PNP0C02æ•æ‰å™¨ä¸æ述桥寄å˜å™¨ï¼ˆåŒ…括ECAM空间）[6]。 +除了ECAM之外，桥寄å˜å™¨ç©ºé—´åæ£æ˜¯ç‰¹å®šäºŽè®¾å¤‡çš„，所以通用的PNP0A03/PNP0A08驱动程 +åº(pci_root.c)没有必è¦äº†è§£å®ƒã€‚ + +新的架构应该能够在PNP0A03设备ä¸ä½¿ç”¨â€œæ¶ˆè´¹è€…â€æ‰©å±•åœ°å€ç©ºé—´æ述符，用于桥寄å˜å™¨ï¼ŒåŒ…括 +ECAM，尽管对[6]çš„ä¸¥æ ¼è§£é‡Šå¯èƒ½ç¦æ¢è¿™æ ·åšã€‚旧的x86å’Œia64å†…æ ¸å‡å®šæ‰€æœ‰çš„地å€ç©ºé—´æè¿° +符，包括“消费者â€æ‰©å±•åœ°å€ç©ºé—´çš„æ述符，都是窗å£ï¼Œæ‰€ä»¥åœ¨è¿™äº›æž¶æž„上以这ç§æ–¹å¼æ述桥寄 +å˜å™¨æ˜¯ä¸å®‰å…¨çš„。 + +PNP0C02“主æ¿â€è®¾å¤‡åŸºæœ¬ä¸Šæ˜¯ä¸‡èƒ½çš„。除了“ä¸è¦å°†è¿™äº›èµ„æºç”¨äºŽå…¶ä»–用途â€ä¹‹å¤–，没有其他的编 +ç¨‹æ¨¡åž‹ã€‚å› æ¤ï¼ŒPNP0C02 _CRS应该声明ACPI命å空间ä¸(1)没有被_CRS声明的任何其他设备对 +象的地å€ç©ºé—´ï¼Œ(2)ä¸åº”该被OS分é…给其他东西。 + +除éžæœ‰ä¸€ä¸ªæ ‡å‡†çš„固件接å£ç”¨äºŽé…置访问，例如ia64 SAL接å£[7]，å¦åˆ™PCIe规范è¦æ±‚使用增强 +åž‹é…置访问方法（ECAM）。主桥消耗ECAM内å˜åœ°å€ç©ºé—´å¹¶å°†å†…å˜è®¿é—®è½¬æ¢ä¸ºPCIé…置访问。该规范 +定义了ECAM地å€ç©ºé—´çš„布局和功能；åªæœ‰åœ°å€ç©ºé—´çš„基础是特定于设备的。ACPIæ“作系统从é™æ€ +MCFG表或PNP0A03设备ä¸çš„_CBA方法ä¸äº†è§£åŸºç¡€åœ°å€ã€‚ + +MCFG表必须æè¿°éžçƒæ’拔主桥的ECAM空间[8]。由于MCFG是一个é™æ€è¡¨ï¼Œä¸èƒ½é€šè¿‡çƒæ’拔更新， +PNP0A03设备ä¸çš„_CBA方法æ述了å¯çƒæ’拔主桥的ECAM空间[9]。请注æ„，对于MCFGå’Œ_CBA， +基å€æ€»æ˜¯å¯¹åº”于总线0，å³ä½¿æ¡¥å™¨ä¸‹é¢çš„总线范围（通过_CRS报告）ä¸ä»Ž0开始。 + + +[1] ACPI 6.2, sec 6.1: + 对于任何在éžæžšä¸¾ç±»åž‹çš„总线上的设备（例如，ISA总线），OSPMä¼šæžšä¸¾è®¾å¤‡çš„æ ‡è¯†ç¬¦ï¼ŒACPI + 系统固件必须为æ¯ä¸ªè®¾å¤‡æ供一个_HID对象...以使OSPM能够åšåˆ°è¿™ä¸€ç‚¹ã€‚ + +[2] ACPI 6.2, sec 3.7: + æ“作系统枚举主æ¿è®¾å¤‡æ—¶ï¼Œåªéœ€é€šè¿‡è¯»å–ACPI命å空间æ¥å¯»æ‰¾å…·æœ‰ç¡¬ä»¶ID的设备。 + + ACPI枚举的æ¯ä¸ªè®¾å¤‡éƒ½åŒ…括ACPI命å空间ä¸ACPI定义的对象，该对象报告设备å¯èƒ½å 用的硬 + 件资æº[_PRS]，报告设备当å‰ä½¿ç”¨çš„资æº[_CRS]的对象，以åŠé…置这些资æºçš„对象[_SRS]。 + 这些信æ¯è¢«å³æ’å³ç”¨æ“作系统（OSPM）用æ¥é…置设备。 + +[3] ACPI 6.2, sec 6.2: + OSPM使用设备é…置对象æ¥é…置通过ACPI列举的设备的硬件资æºã€‚设备é…置对象æä¾›äº†å…³äºŽå½“å‰ + å’Œå¯èƒ½çš„资æºéœ€æ±‚çš„ä¿¡æ¯ï¼Œå…±äº«èµ„æºä¹‹é—´çš„关系，以åŠé…置硬件资æºçš„方法。 + + 当OSPM枚举一个设备时，它调用_PRSæ¥ç¡®å®šè¯¥è®¾å¤‡çš„资æºéœ€æ±‚。它也å¯ä»¥è°ƒç”¨_CRSæ¥æ‰¾åˆ°è¯¥è®¾ + 备的当å‰èµ„æºè®¾ç½®ã€‚利用这些信æ¯ï¼Œå³æ’å³ç”¨ç³»ç»Ÿå†³å®šè®¾å¤‡åº”该消耗什么资æºï¼Œå¹¶é€šè¿‡è°ƒç”¨è®¾å¤‡ + çš„_SRS控制方法æ¥è®¾ç½®è¿™äº›èµ„æºã€‚ + + 在ACPIä¸ï¼Œè®¾å¤‡å¯ä»¥æ¶ˆè€—资æºï¼ˆä¾‹å¦‚ï¼Œä¼ ç»Ÿçš„é”®ç›˜ï¼‰ï¼Œæ供资æºï¼ˆä¾‹å¦‚，一个专有的PCI桥）， + 或者两者都åšã€‚除éžå¦æœ‰è§„定，设备的资æºè¢«å‡å®šä¸ºæ¥è‡ªè®¾å¤‡å±‚次结构ä¸è®¾å¤‡ä¸Šæ–¹æœ€è¿‘的匹é…资 + æºã€‚ + +[4] ACPI 6.2, sec 6.4.3.5.1, 2, 3, 4: + QWord/DWord/Word 地å€ç©ºé—´æ述符 (.1, .2, .3) + å¸¸è§„æ ‡å¿—: Bit [0] 被忽略。 + + 扩展地å€ç©ºé—´æ述符 (.4) + å¸¸è§„æ ‡å¿—: Bit [0] 消费者/生产者: + + * 1 – è¿™ä¸ªè®¾å¤‡æ¶ˆè´¹è¿™ä¸ªèµ„æº + * 0 – è¯¥è®¾å¤‡ç”Ÿäº§å’Œæ¶ˆè´¹è¯¥èµ„æº + +[5] ACPI 6.2, sec 19.6.43: + ResourceUsage指定内å˜èŒƒå›´æ˜¯ç”±è¿™ä¸ªè®¾å¤‡ï¼ˆResourceConsumerï¼‰æ¶ˆè´¹è¿˜æ˜¯ä¼ é€’ç»™å设备 + （ResourceProducer）。如果没有指定，那么就å‡å®šæ˜¯ResourceConsumer。 + +[6] PCI Firmware 3.2, sec 4.1.2: + 如果æ“作系统ä¸èƒ½åŽŸç”Ÿçš„懂得ä¿ç•™MMCFG区域，MMCFG区域必须由固件ä¿ç•™ã€‚在MCFG表ä¸æˆ–通 + 过_CBA方法（è§ç¬¬4.1.3节）报告的地å€èŒƒå›´å¿…须通过声明主æ¿èµ„æºæ¥ä¿ç•™ã€‚对于大多数系统， + 主æ¿èµ„æºå°†å‡ºçŽ°åœ¨ACPI命åç©ºé—´çš„æ ¹éƒ¨ï¼ˆåœ¨_SB下），在一个节点的_HID为EISAID（PNP0C0 + 2），在这ç§æƒ…况下的资æºä¸åº”该è¦æ±‚åœ¨æ ¹PCI总线的_CRS。这些资æºå¯ä»¥é€‰æ‹©åœ¨Int15 E820 + 或EFIGetMemoryMapä¸ä½œä¸ºä¿ç•™å†…å˜è¿”回，但必须始终通过ACPI作为主æ¿èµ„æºæŠ¥å‘Šã€‚ + +[7] PCI Express 4.0, sec 7.2.2: + 对于PC兼容的系统，或者没有实现å…许访问é…置空间的处ç†å™¨æž¶æž„特定固件接å£æ ‡å‡†çš„系统，需 + è¦ä½¿ç”¨æœ¬èŠ‚ä¸å®šä¹‰çš„ECAM。 + +[8] PCI Firmware 3.2, sec 4.1.2: + MCFG表是一个ACPI表，用于沟通的基础地å€å¯¹åº”çš„éžçƒçš„å¯ç§»åŠ¨çš„PCI段组范围内的PCI段组在 + å¯åŠ¨æ—¶æ供给æ“作系统。这对PC兼容系统æ¥è¯´æ˜¯å¿…需的。 + + MCFG表仅用于沟通在å¯åŠ¨æ—¶ç³»ç»Ÿå¯ç”¨çš„PCI段组对应的基å€ã€‚ + +[9] PCI Firmware 3.2, sec 4.1.3: + _CBA (Memory mapped Configuration Base Address) 控制方法是一个å¯é€‰çš„ACPI对 + 象，用于返回çƒæ’拔主桥的64ä½å†…å˜æ˜ å°„çš„é…置基å€ã€‚_CBA 返回的基å€æ˜¯ä¸Žå¤„ç†å™¨ç›¸å…³çš„地å€ã€‚ + _CBA 控制方法被评估为一个整数。 + + 这个控制方法出现在主桥对象下。当_CBA方法出现在一个活动的主桥对象下时，æ“作系统会评 + 估这个结构，以确定内å˜æ˜ å°„çš„é…置基å€ï¼Œå¯¹åº”于_CRS方法ä¸æŒ‡å®šçš„总线编å·èŒƒå›´çš„PCI段组。 + 一个包å«_CBA方法的ACPI命å空间对象也必须包å«ä¸€ä¸ªç›¸åº”çš„_SEG方法。 diff --git a/Documentation/translations/zh_CN/PCI/index.rst b/Documentation/translations/zh_CN/PCI/index.rst index 16acb2bd9b58..cbeb33c34a98 100644 --- a/Documentation/translations/zh_CN/PCI/index.rst +++ b/Documentation/translations/zh_CN/PCI/index.rst @@ -10,9 +10,6 @@ :æ ¡è¯‘: - -.. _cn_PCI_index.rst: - =================== Linux PCI总线å系统 =================== @@ -26,12 +23,12 @@ Linux PCI总线å系统 pci-iov-howto msi-howto sysfs-pci + acpi-info Todolist: - acpi-info - pci-error-recovery - pcieaer-howto - endpoint/index - boot-interrupts +* pci-error-recovery +* pcieaer-howto +* endpoint/index +* boot-interrupts diff --git a/Documentation/translations/zh_CN/admin-guide/README.rst b/Documentation/translations/zh_CN/admin-guide/README.rst index d20949e8bf6f..e679cbc3c89d 100644 --- a/Documentation/translations/zh_CN/admin-guide/README.rst +++ b/Documentation/translations/zh_CN/admin-guide/README.rst @@ -6,10 +6,10 @@ å´æƒ³æˆ Wu XiangCheng <bobwxc@email.cn> -Linuxå†…æ ¸5.x版本 <http://kernel.org/> +Linuxå†…æ ¸6.x版本 <http://kernel.org/> ========================================= -以下是Linux版本5çš„å‘行注记。仔细阅读它们， +以下是Linux版本6çš„å‘行注记。仔细阅读它们， å®ƒä»¬ä¼šå‘Šè¯‰ä½ è¿™äº›éƒ½æ˜¯ä»€ä¹ˆï¼Œè§£é‡Šå¦‚ä½•å®‰è£…å†…æ ¸ï¼Œä»¥åŠé‡åˆ°é—®é¢˜æ—¶è¯¥å¦‚何åšã€‚ 什么是Linux？ @@ -61,27 +61,27 @@ Linuxå†…æ ¸5.x版本 <http://kernel.org/> - 如果您è¦å®‰è£…完整的æºä»£ç ï¼Œè¯·æŠŠå†…æ ¸tar档案包放在您有æƒé™çš„目录ä¸ï¼ˆä¾‹å¦‚您 的主目录）并将其解包:: - xz -cd linux-5.x.tar.xz | tar xvf - + xz -cd linux-6.x.tar.xz | tar xvf - 将“Xâ€æ›¿æ¢æˆæœ€æ–°å†…æ ¸çš„ç‰ˆæœ¬å·ã€‚ ã€ä¸è¦ã€‘使用 /usr/src/linux 目录ï¼è¿™é‡Œæœ‰ä¸€ç»„åº“å¤´æ–‡ä»¶ä½¿ç”¨çš„å†…æ ¸å¤´æ–‡ä»¶ （通常是ä¸å®Œæ•´çš„）。它们应该与库匹é…，而ä¸æ˜¯è¢«å†…æ ¸çš„å˜åŒ–æžå¾—一团糟。 - - 您还å¯ä»¥é€šè¿‡æ‰“è¡¥ä¸åœ¨5.x版本之间å‡çº§ã€‚è¡¥ä¸ä»¥xzæ ¼å¼åˆ†å‘。è¦é€šè¿‡æ‰“è¡¥ä¸è¿›è¡Œ - 安装，请获å–所有较新的补ä¸æ–‡ä»¶ï¼Œè¿›å…¥å†…æ ¸æºä»£ç （linux-5.x）的目录并 + - 您还å¯ä»¥é€šè¿‡æ‰“è¡¥ä¸åœ¨6.x版本之间å‡çº§ã€‚è¡¥ä¸ä»¥xzæ ¼å¼åˆ†å‘。è¦é€šè¿‡æ‰“è¡¥ä¸è¿›è¡Œ + 安装，请获å–所有较新的补ä¸æ–‡ä»¶ï¼Œè¿›å…¥å†…æ ¸æºä»£ç （linux-6.x）的目录并 执行:: - xz -cd ../patch-5.x.xz | patch -p1 + xz -cd ../patch-6.x.xz | patch -p1 请ã€æŒ‰é¡ºåºã€‘替æ¢æ‰€æœ‰å¤§äºŽå½“å‰æºä»£ç æ ‘ç‰ˆæœ¬çš„â€œxâ€ï¼Œè¿™æ ·å°±å¯ä»¥äº†ã€‚您å¯èƒ½æƒ³è¦ åˆ é™¤å¤‡ä»½æ–‡ä»¶ï¼ˆæ–‡ä»¶å类似xxx~ 或 xxx.orig)，并确ä¿æ²¡æœ‰å¤±è´¥çš„è¡¥ä¸ï¼ˆæ–‡ä»¶å 类似xxx# 或 xxx.rej）。如果有，ä¸æ˜¯ä½ 就是我犯了错误。 - 与5.xå†…æ ¸çš„è¡¥ä¸ä¸åŒï¼Œ5.x.yå†…æ ¸ï¼ˆä¹Ÿç§°ä¸ºç¨³å®šç‰ˆå†…æ ¸ï¼‰çš„è¡¥ä¸ä¸æ˜¯å¢žé‡çš„，而是 - 直接应用于基本的5.xå†…æ ¸ã€‚ä¾‹å¦‚ï¼Œå¦‚æžœæ‚¨çš„åŸºæœ¬å†…æ ¸æ˜¯5.0，并且希望应用5.0.3 - è¡¥ä¸ï¼Œåˆ™ä¸åº”先应用5.0.1å’Œ5.0.2çš„è¡¥ä¸ã€‚类似地，如果您è¿è¡Œçš„是5.0.2å†…æ ¸ï¼Œ - 并且希望跳转到5.0.3，那么在应用5.0.3è¡¥ä¸ä¹‹å‰ï¼Œå¿…须首先撤销5.0.2è¡¥ä¸ + 与6.xå†…æ ¸çš„è¡¥ä¸ä¸åŒï¼Œ6.x.yå†…æ ¸ï¼ˆä¹Ÿç§°ä¸ºç¨³å®šç‰ˆå†…æ ¸ï¼‰çš„è¡¥ä¸ä¸æ˜¯å¢žé‡çš„，而是 + 直接应用于基本的6.xå†…æ ¸ã€‚ä¾‹å¦‚ï¼Œå¦‚æžœæ‚¨çš„åŸºæœ¬å†…æ ¸æ˜¯6.0，并且希望应用6.0.3 + è¡¥ä¸ï¼Œåˆ™ä¸åº”先应用6.0.1å’Œ6.0.2çš„è¡¥ä¸ã€‚类似地，如果您è¿è¡Œçš„是6.0.2å†…æ ¸ï¼Œ + 并且希望跳转到6.0.3，那么在应用6.0.3è¡¥ä¸ä¹‹å‰ï¼Œå¿…须首先撤销6.0.2è¡¥ä¸ ï¼ˆå³patch -R）。更多关于这方é¢çš„内容，请阅读 :ref:`Documentation/process/applying-patches.rst <applying_patches>` 。 @@ -103,7 +103,7 @@ Linuxå†…æ ¸5.x版本 <http://kernel.org/> 软件è¦æ±‚ --------- - 编译和è¿è¡Œ5.xå†…æ ¸éœ€è¦å„ç§è½¯ä»¶åŒ…的最新版本。请å‚考 + 编译和è¿è¡Œ6.xå†…æ ¸éœ€è¦å„ç§è½¯ä»¶åŒ…的最新版本。请å‚考 :ref:`Documentation/process/changes.rst <changes>` æ¥äº†è§£æœ€ä½Žç‰ˆæœ¬è¦æ±‚以åŠå¦‚何å‡çº§è½¯ä»¶åŒ…。请注æ„，使用过旧版本的这些包å¯èƒ½ä¼š å¯¼è‡´å¾ˆéš¾è¿½è¸ªçš„é—´æŽ¥é”™è¯¯ï¼Œå› æ¤ä¸è¦ä»¥ä¸ºåœ¨ç”Ÿæˆæˆ–æ“作过程ä¸å‡ºçŽ°æ˜Žæ˜¾é—®é¢˜æ—¶å¯ä»¥ @@ -116,12 +116,12 @@ Linuxå†…æ ¸5.x版本 <http://kernel.org/> ``make O=output/dir`` 选项å¯ä»¥ä¸ºè¾“出文件（包括 .config）指定备用ä½ç½®ã€‚ 例如:: - kernel source code: /usr/src/linux-5.x + kernel source code: /usr/src/linux-6.x build directory: /home/name/build/kernel è¦é…ç½®å’Œæž„å»ºå†…æ ¸ï¼Œè¯·ä½¿ç”¨:: - cd /usr/src/linux-5.x + cd /usr/src/linux-6.x make O=/home/name/build/kernel menuconfig make O=/home/name/build/kernel sudo make O=/home/name/build/kernel modules_install install @@ -227,8 +227,6 @@ Linuxå†…æ ¸5.x版本 <http://kernel.org/> - ç¡®ä¿æ‚¨è‡³å°‘有gcc 5.1å¯ç”¨ã€‚ 有关更多信æ¯ï¼Œè¯·å‚阅 :ref:`Documentation/process/changes.rst <changes>` 。 - 请注æ„，您ä»ç„¶å¯ä»¥ä½¿ç”¨æ¤å†…æ ¸è¿è¡Œa.out用户程åºã€‚ - - 执行 ``make`` æ¥åˆ›å»ºåŽ‹ç¼©å†…æ ¸æ˜ åƒã€‚如果您安装了lilo以适é…å†…æ ¸makefile， 那么也å¯ä»¥è¿›è¡Œ ``make install`` ，但是您å¯èƒ½éœ€è¦å…ˆæ£€æŸ¥ç‰¹å®šçš„lilo设置。 @@ -282,67 +280,12 @@ Linuxå†…æ ¸5.x版本 <http://kernel.org/> è‹¥é‡åˆ°é—®é¢˜ ----------- - - 如果您å‘现了一些å¯èƒ½ç”±äºŽå†…æ ¸ç¼ºé™·æ‰€å¯¼è‡´çš„é—®é¢˜ï¼Œè¯·æ£€æŸ¥MAINTAINERS（维护者） - 文件看看是å¦æœ‰äººä¸Žä»¤æ‚¨é‡åˆ°éº»çƒ¦çš„å†…æ ¸éƒ¨åˆ†ç›¸å…³ã€‚å¦‚æžœæ— äººåœ¨æ¤åˆ—出，那么第二 - 个最好的方案就是把它们å‘给我（torvalds@linux-foundation.org），也å¯èƒ½å‘é€ - 到任何其他相关的邮件列表或新闻组。 - - - 在所有的缺陷报告ä¸ï¼Œã€è¯·ã€‘å‘Šè¯‰æˆ‘ä»¬æ‚¨åœ¨è¯´ä»€ä¹ˆå†…æ ¸ï¼Œå¦‚ä½•å¤çŽ°é—®é¢˜ï¼Œä»¥åŠæ‚¨çš„ - 设置是什么的（使用您的常识）。如果问题是新的，请告诉我；如果问题是旧的， - 请å°è¯•å‘Šè¯‰æˆ‘您什么时候首次注æ„到它。 - - - 如果缺陷导致如下消æ¯:: - - unable to handle kernel paging request at address C0000010 - Oops: 0002 - EIP: 0010:XXXXXXXX - eax: xxxxxxxx ebx: xxxxxxxx ecx: xxxxxxxx edx: xxxxxxxx - esi: xxxxxxxx edi: xxxxxxxx ebp: xxxxxxxx - ds: xxxx es: xxxx fs: xxxx gs: xxxx - Pid: xx, process nr: xx - xx xx xx xx xx xx xx xx xx xx - - æˆ–è€…ç±»ä¼¼çš„å†…æ ¸è°ƒè¯•ä¿¡æ¯æ˜¾ç¤ºåœ¨å±å¹•ä¸Šæˆ–在系统日志里，请ã€å¦‚实】å¤åˆ¶å®ƒã€‚ - å¯èƒ½å¯¹ä½ æ¥è¯´è½¬å‚¨ï¼ˆdump）看起æ¥ä¸å¯ç†è§£ï¼Œä½†å®ƒç¡®å®žåŒ…å«å¯èƒ½æœ‰åŠ©äºŽè°ƒè¯•é—®é¢˜çš„ - ä¿¡æ¯ã€‚转储上方的文本也很é‡è¦ï¼šå®ƒè¯´æ˜Žäº†å†…æ ¸è½¬å‚¨ä»£ç çš„åŽŸå› ï¼ˆåœ¨ä¸Šé¢çš„示例ä¸ï¼Œ - æ˜¯ç”±äºŽå†…æ ¸æŒ‡é’ˆé”™è¯¯ï¼‰ã€‚æ›´å¤šå…³äºŽå¦‚ä½•ç†è§£è½¬å‚¨çš„ä¿¡æ¯ï¼Œè¯·å‚è§ - Documentation/admin-guide/bug-hunting.rst。 - - - 如果使用 CONFIG_KALLSYMS ç¼–è¯‘å†…æ ¸ï¼Œåˆ™å¯ä»¥æŒ‰åŽŸæ ·å‘é€è½¬å‚¨ï¼Œå¦åˆ™å¿…须使用 - ``ksymoops`` 程åºæ¥ç†è§£è½¬å‚¨ï¼ˆä½†é€šå¸¸é¦–选使用CONFIG_KALLSYMS编译）。 - æ¤å®žç”¨ç¨‹åºå¯ä»Ž - https://www.kernel.org/pub/linux/utils/kernel/ksymoops/ 下载。 - 或者，您å¯ä»¥æ‰‹åŠ¨æ‰§è¡Œè½¬å‚¨æŸ¥æ‰¾ï¼š - - - 在调试åƒä¸Šé¢è¿™æ ·çš„转储时，如果您å¯ä»¥æŸ¥æ‰¾EIP值的å«ä¹‰ï¼Œè¿™å°†éžå¸¸æœ‰å¸®åŠ©ã€‚ - åå…进制值本身对我或其他任何人都没有太大帮助：它会å–å†³äºŽç‰¹å®šçš„å†…æ ¸è®¾ç½®ã€‚ - 您应该åšçš„是从EIP行获å–åå…进制值（忽略 ``0010:`` ），然åŽåœ¨å†…æ ¸åå—列表 - ä¸æŸ¥æ‰¾å®ƒï¼Œä»¥æŸ¥çœ‹å“ªä¸ªå†…æ ¸å‡½æ•°åŒ…å«æœ‰é—®é¢˜çš„地å€ã€‚ - - è¦æ‰¾åˆ°å†…æ ¸å‡½æ•°å，您需è¦æ‰¾åˆ°ä¸Žæ˜¾ç¤ºç—‡çŠ¶çš„å†…æ ¸ç›¸å…³è”的系统二进制文件。就是 - 文件“linux/vmlinuxâ€ã€‚è¦æå–åå—åˆ—è¡¨å¹¶å°†å…¶ä¸Žå†…æ ¸å´©æºƒä¸çš„EIP进行匹é…， - 请执行:: - - nm vmlinux | sort | less - - 这将为您æ供一个按å‡åºæŽ’åºçš„å†…æ ¸åœ°å€åˆ—表，从ä¸å¾ˆå®¹æ˜“找到包å«æœ‰é—®é¢˜çš„åœ°å€ - 的函数。请注æ„ï¼Œå†…æ ¸è°ƒè¯•æ¶ˆæ¯æ供的地å€ä¸ä¸€å®šä¸Žå‡½æ•°åœ°å€å®Œå…¨åŒ¹é…（事实上， - 这是ä¸å¯èƒ½çš„ï¼‰ï¼Œå› æ¤æ‚¨ä¸èƒ½åªâ€œgrepâ€åˆ—表：ä¸è¿‡åˆ—表将为您æä¾›æ¯ä¸ªå†…æ ¸å‡½æ•° - çš„èµ·ç‚¹ï¼Œå› æ¤é€šè¿‡æŸ¥æ‰¾èµ·å§‹åœ°å€ä½ŽäºŽä½ æ£åœ¨æœç´¢çš„地å€ï¼Œä½†åŽä¸€ä¸ªå‡½æ•°çš„高于的 - å‡½æ•°ï¼Œä½ ä¼šæ‰¾åˆ°æ‚¨æƒ³è¦çš„。实际上，在您的问题报告ä¸åŠ 入一些“上下文â€å¯èƒ½æ˜¯ - 一个好主æ„ï¼Œç»™å‡ºç›¸å…³çš„ä¸Šä¸‹å‡ è¡Œã€‚ - - 如果您由于æŸäº›åŽŸå› æ— æ³•å®Œæˆä¸Šè¿°æ“ä½œï¼ˆå¦‚æ‚¨ä½¿ç”¨é¢„ç¼–è¯‘çš„å†…æ ¸æ˜ åƒæˆ–ç±»ä¼¼çš„æ˜ åƒï¼‰ï¼Œ - 请尽å¯èƒ½å¤šåœ°å‘Šè¯‰æˆ‘您的相关设置信æ¯ï¼Œè¿™ä¼šæœ‰æ‰€å¸®åŠ©ã€‚有关详细信æ¯è¯·é˜…读 - ‘Documentation/admin-guide/reporting-issues.rst’。 - - - 或者，您å¯ä»¥åœ¨æ£åœ¨è¿è¡Œçš„å†…æ ¸ä¸Šä½¿ç”¨gdb（åªè¯»çš„ï¼›å³ä¸èƒ½æ›´æ”¹å€¼æˆ–设置æ–点）。 - 为æ¤ï¼Œè¯·é¦–先使用-gç¼–è¯‘å†…æ ¸ï¼›é€‚å½“åœ°ç¼–è¾‘arch/x86/Makefile，然åŽæ‰§è¡Œ ``make - clean`` 。您还需è¦å¯ç”¨CONFIG_PROC_FS（通过 ``make config`` ）。 - - ä½¿ç”¨æ–°å†…æ ¸é‡æ–°å¯åŠ¨åŽï¼Œæ‰§è¡Œ ``gdb vmlinux /proc/kcore`` 。现在å¯ä»¥ä½¿ç”¨æ‰€æœ‰ - 普通的gdb命令。查找系统崩溃点的命令是 ``l *0xXXXXXXXX`` （将xxx替æ¢ä¸ºEIP - 值）。 - - 用gdbæ— æ³•è°ƒè¯•ä¸€ä¸ªå½“å‰æœªè¿è¡Œçš„å†…æ ¸æ˜¯ç”±äºŽgdbï¼ˆé”™è¯¯åœ°ï¼‰å¿½ç•¥äº†ç¼–è¯‘å†…æ ¸çš„èµ·å§‹ - å移é‡ã€‚ +如果您å‘现了一些å¯èƒ½ç”±äºŽå†…æ ¸ç¼ºé™·æ‰€å¯¼è‡´çš„é—®é¢˜ï¼Œè¯·å‚阅： +Documentation/translations/zh_CN/admin-guide/reporting-issues.rst 。 + +想è¦ç†è§£å†…æ ¸é”™è¯¯æŠ¥å‘Šï¼Œè¯·å‚阅： +Documentation/translations/zh_CN/admin-guide/bug-hunting.rst 。 + +更多用GDBè°ƒè¯•å†…æ ¸çš„ä¿¡æ¯ï¼Œè¯·å‚阅： +Documentation/translations/zh_CN/dev-tools/gdb-kernel-debugging.rst +å’Œ Documentation/dev-tools/kgdb.rst 。 diff --git a/Documentation/translations/zh_CN/admin-guide/bootconfig.rst b/Documentation/translations/zh_CN/admin-guide/bootconfig.rst new file mode 100644 index 000000000000..072d17f5f199 --- /dev/null +++ b/Documentation/translations/zh_CN/admin-guide/bootconfig.rst @@ -0,0 +1,293 @@ +.. SPDX-License-Identifier: GPL-2.0 + +.. include:: ../disclaimer-zh_CN.rst + +:Original: Documentation/admin-guide/bootconfig.rst + +:译者: å´æƒ³æˆ Wu XiangCheng <bobwxc@email.cn> + +======== +引导é…ç½® +======== + +:作者: Masami Hiramatsu <mhiramat@kernel.org> + +概述 +==== + +引导é…ç½®æ‰©å±•äº†çŽ°æœ‰çš„å†…æ ¸å‘½ä»¤è¡Œï¼Œä»¥ä¸€ç§æ›´æœ‰æ•ˆçŽ‡çš„æ–¹å¼åœ¨å¼•å¯¼å†…æ ¸æ—¶è¿›ä¸€æ¥æ”¯æŒ +键值数æ®ã€‚è¿™å…许管ç†å‘˜ä¼ 递一份结构化关键å—çš„é…置文件。 + +é…置文件è¯æ³• +============ + +引导é…置文件的è¯æ³•é‡‡ç”¨éžå¸¸ç®€å•çš„键值结构。æ¯ä¸ªå…³é”®å—由点连接的å•è¯ç»„æˆï¼Œé”® +和值由 ``=`` 连接。值以分å·ï¼ˆ ``;`` ）或æ¢è¡Œç¬¦ï¼ˆ ``\n`` ）结尾。数组值ä¸æ¯ +ä¸ªå…ƒç´ ç”±é€—å·ï¼ˆ ``,`` ）分隔。:: + + KEY[.WORD[...]] = VALUE[, VALUE2[...]][;] + +ä¸Žå†…æ ¸å‘½ä»¤è¡Œè¯æ³•ä¸åŒï¼Œé€—å·å’Œ ``=`` 周围å…è®¸æœ‰ç©ºæ ¼ã€‚ + +关键å—åªå…许包å«å—æ¯ã€æ•°å—ã€è¿žå—符（ ``-`` ）和下划线（ ``_`` ）。值å¯åŒ…å« +å¯æ‰“å°å—ç¬¦å’Œç©ºæ ¼ï¼Œä½†åˆ†å·ï¼ˆ ``;`` ）ã€æ¢è¡Œç¬¦ï¼ˆ ``\n`` ）ã€é€—å·ï¼ˆ ``,`` ）〠+井å·ï¼ˆ ``#`` ）和å³å¤§æ‹¬å·ï¼ˆ ``}`` ）ç‰åˆ†éš”符除外。 + +å¦‚æžœä½ éœ€è¦åœ¨å€¼ä¸ä½¿ç”¨è¿™äº›åˆ†éš”符，å¯ä»¥ç”¨åŒå¼•å·ï¼ˆ ``"VALUE"`` ）或å•å¼•å· +（ ``'VALUE'`` ）括起æ¥ã€‚注æ„，引å·æ— 法转义。 + +键的值å¯ä»¥ä¸ºç©ºæˆ–ä¸å˜åœ¨ã€‚这些键用于检查该键是å¦å˜åœ¨ï¼ˆç±»ä¼¼å¸ƒå°”值）。 + +键值è¯æ³• +-------- + +引导é…置文件è¯æ³•å…许用户通过大括å·åˆå¹¶é”®å部分相åŒçš„关键å—。例如:: + + foo.bar.baz = value1 + foo.bar.qux.quux = value2 + +也å¯ä»¥å†™æˆ:: + + foo.bar { + baz = value1 + qux.quux = value2 + } + +或者更紧凑一些，写æˆ:: + + foo.bar { baz = value1; qux.quux = value2 } + +在这两ç§æ ·å¼ä¸ï¼Œå¼•å¯¼è§£æžæ—¶ç›¸åŒçš„关键å—都会自动åˆå¹¶ã€‚å› æ¤å¯ä»¥è¿½åŠ ç±»ä¼¼çš„æ ‘æˆ– +键值。 + +相åŒå…³é”®å—的值 +-------------- + +ç¦æ¢ä¸¤ä¸ªæˆ–多个值或数组共享åŒä¸€ä¸ªå…³é”®å—。例如:: + + foo = bar, baz + foo = qux # !错误! 我们ä¸å¯ä»¥é‡å®šä¹‰ç›¸åŒçš„å…³é”®å— + +å¦‚æžœä½ æƒ³è¦æ›´æ–°å€¼ï¼Œå¿…须显å¼ä½¿ç”¨è¦†ç›–æ“作符 ``:=`` 。例如:: + + foo = bar, baz + foo := qux + +è¿™æ · ``foo`` 关键å—的值就å˜æˆäº† ``qux`` ã€‚è¿™å¯¹äºŽé€šè¿‡æ·»åŠ ï¼ˆéƒ¨åˆ†ï¼‰è‡ªå®šä¹‰å¼•å¯¼ +é…ç½®æ¥è¦†ç›–默认值éžå¸¸æœ‰ç”¨ï¼Œå…于解æžé»˜è®¤å¼•å¯¼é…置。 + +å¦‚æžœä½ æƒ³å¯¹çŽ°æœ‰å…³é”®å—è¿½åŠ å€¼ä½œä¸ºæ•°ç»„æˆå‘˜ï¼Œå¯ä»¥ä½¿ç”¨ ``+=`` æ“作符。例如:: + + foo = bar, baz + foo += qux + +è¿™æ ·ï¼Œ ``foo`` 关键å—å°±åŒæ—¶æ‹¥æœ‰äº† ``bar`` ， ``baz`` å’Œ ``qux`` 。 + +æ¤å¤–，父关键å—下å¯åŒæ—¶å˜åœ¨å€¼å’Œå关键å—。 +例如，下列é…置是å¯è¡Œçš„。:: + + foo = value1 + foo.bar = value2 + foo := value3 # 这会更新foo的值。 + +注æ„，裸值ä¸èƒ½ç›´æŽ¥æ”¾è¿›ç»“构化关键å—ä¸ï¼Œå¿…须在大括å·å¤–定义它。例如:: + + foo { + bar = value1 + bar { + baz = value2 + qux = value3 + } + } + +åŒæ—¶ï¼Œå…³é”®å—下值节点的顺åºæ˜¯å›ºå®šçš„。如果值和å关键å—åŒæ—¶å˜åœ¨ï¼Œå€¼æ°¸è¿œæ˜¯è¯¥å…³ +é”®å—的第一个åèŠ‚ç‚¹ã€‚å› æ¤å¦‚果用户先指定å关键å—，如:: + + foo.bar = value1 + foo = value2 + +则在程åºï¼ˆå’Œ/proc/bootconfig）ä¸ï¼Œå®ƒä¼šæŒ‰å¦‚下显示:: + + foo = value2 + foo.bar = value1 + +注释 +---- + +é…ç½®è¯æ³•æŽ¥å—shellè„šæœ¬é£Žæ ¼çš„æ³¨é‡Šã€‚æ³¨é‡Šä»¥äº•å·ï¼ˆ ``#`` ）开始，到æ¢è¡Œç¬¦ +（ ``\n`` ）结æŸã€‚ + +:: + + # comment line + foo = value # value is set to foo. + bar = 1, # 1st element + 2, # 2nd element + 3 # 3rd element + +会被解æžä¸º:: + + foo = value + bar = 1, 2, 3 + +注æ„ä½ ä¸èƒ½æŠŠæ³¨é‡Šæ”¾åœ¨å€¼å’Œåˆ†éš”符（ ``,`` 或 ``;`` ）之间。如下é…ç½®è¯æ³•æ˜¯é”™è¯¯çš„:: + + key = 1 # comment + ,2 + + +/proc/bootconfig +================ + +/proc/bootconfig是引导é…置的用户空间接å£ã€‚与/proc/cmdlineä¸åŒï¼Œæ¤æ–‡ä»¶å†…容以 +é”®å€¼åˆ—è¡¨æ ·å¼æ˜¾ç¤ºã€‚ +æ¯ä¸ªé”®å€¼å¯¹ä¸€è¡Œï¼Œæ ·å¼å¦‚下:: + + KEY[.WORDS...] = "[VALUE]"[,"VALUE2"...] + + +用引导é…ç½®å¼•å¯¼å†…æ ¸ +================== + +用引导é…ç½®å¼•å¯¼å†…æ ¸æœ‰ä¸¤ç§æ–¹æ³•ï¼šå°†å¼•å¯¼é…ç½®é™„åŠ åˆ°initrdé•œåƒæˆ–ç›´æŽ¥åµŒå…¥å†…æ ¸ä¸ã€‚ + +*initrd: initial RAM disk，åˆå§‹å†…å˜ç£ç›˜* + +将引导é…ç½®é™„åŠ åˆ°initrd +---------------------- + +由于默认情况下引导é…置文件是用initrdåŠ è½½çš„ï¼Œå› æ¤å®ƒå°†è¢«æ·»åŠ 到initrd（initramfs） +é•œåƒæ–‡ä»¶çš„末尾，其ä¸åŒ…å«å¡«å……ã€å¤§å°ã€æ ¡éªŒå€¼å’Œ12å—节幻数，如下所示:: + + [initrd][bootconfig][padding][size(le32)][checksum(le32)][#BOOTCONFIG\n] + +大å°å’Œæ ¡éªŒå€¼ä¸ºå°ç«¯åºå˜æ”¾çš„32ä½æ— 符å·å€¼ã€‚ + +当引导é…ç½®è¢«åŠ åˆ°initrdé•œåƒæ—¶ï¼Œæ•´ä¸ªæ–‡ä»¶å¤§å°ä¼šå¯¹é½åˆ°4å—节。空å—符（ ``\0`` ） +会填补对é½ç©ºéš™ã€‚å› æ¤ ``size`` 就是引导é…置文件的长度+å¡«å……çš„å—节。 + +Linuxå†…æ ¸åœ¨å†…å˜ä¸è§£ç initrdé•œåƒçš„最åŽéƒ¨åˆ†ä»¥èŽ·å–引导é…置数æ®ã€‚由于这ç§â€œèƒŒè´Ÿå¼â€ +的方法，åªè¦å¼•å¯¼åŠ è½½å™¨ä¼ é€’äº†æ£ç¡®çš„initrd文件大å°ï¼Œå°±æ— éœ€æ›´æ”¹æˆ–æ›´æ–°å¼•å¯¼åŠ è½½å™¨ +å’Œå†…æ ¸é•œåƒæœ¬èº«ã€‚å¦‚æžœå¼•å¯¼åŠ è½½å™¨æ„å¤–ä¼ é€’äº†æ›´é•¿çš„å¤§å°ï¼Œå†…æ ¸å°†æ— æ³•æ‰¾åˆ°å¼•å¯¼é…置数 +æ®ã€‚ + +Linuxå†…æ ¸åœ¨tools/bootconfig下æ供了 ``bootconfig`` 命令æ¥å®Œæˆæ¤æ“作，管ç†å‘˜ +å¯ä»¥ç”¨å®ƒä»Žinitrdé•œåƒä¸åˆ é™¤æˆ–è¿½åŠ é…ç½®æ–‡ä»¶ã€‚ä½ å¯ä»¥ç”¨ä»¥ä¸‹å‘½ä»¤æ¥æž„建它:: + + # make -C tools/bootconfig + +è¦å‘initrdé•œåƒæ·»åŠ ä½ çš„å¼•å¯¼é…置文件，请按如下命令æ“作（旧数æ®ä¼šè‡ªåŠ¨ç§»é™¤ï¼‰:: + + # tools/bootconfig/bootconfig -a your-config /boot/initrd.img-X.Y.Z + +è¦ä»Žé•œåƒä¸ç§»é™¤é…置，å¯ä»¥ä½¿ç”¨-d选项:: + + # tools/bootconfig/bootconfig -d /boot/initrd.img-X.Y.Z + +然åŽåœ¨å†…æ ¸å‘½ä»¤è¡Œä¸Šæ·»åŠ ``bootconfig`` å‘Šè¯‰å†…æ ¸åŽ»initrdæ–‡ä»¶æœ«å°¾å¯»æ‰¾å†…æ ¸é…置。 + +将引导é…ç½®åµŒå…¥å†…æ ¸ +------------------ + +å¦‚æžœä½ ä¸èƒ½ä½¿ç”¨initrd，也å¯ä»¥é€šè¿‡Kconfig选项将引导é…ç½®æ–‡ä»¶åµŒå…¥å†…æ ¸ä¸ã€‚在æ¤æƒ… +å†µä¸‹ï¼Œä½ éœ€è¦ç”¨ä»¥ä¸‹é€‰é¡¹é‡æ–°ç¼–è¯‘å†…æ ¸:: + + CONFIG_BOOT_CONFIG_EMBED=y + CONFIG_BOOT_CONFIG_EMBED_FILE="/引导é…ç½®/文件/çš„/路径" + +``CONFIG_BOOT_CONFIG_EMBED_FILE`` 需è¦ä»Žæºç æ ‘æˆ–å¯¹è±¡æ ‘å¼€å§‹çš„å¼•å¯¼é…置文件的 +ç»å¯¹/ç›¸å¯¹è·¯å¾„ã€‚å†…æ ¸ä¼šå°†å…¶åµŒå…¥ä½œä¸ºé»˜è®¤å¼•å¯¼é…置。 + +与将引导é…ç½®é™„åŠ åˆ°initrdä¸€æ ·ï¼Œä½ ä¹Ÿéœ€è¦åœ¨å†…æ ¸å‘½ä»¤è¡Œä¸Šæ·»åŠ ``bootconfig`` 告诉 +å†…æ ¸åŽ»å¯ç”¨å†…嵌的引导é…置。 + +注æ„，å³ä½¿ä½ å·²ç»è®¾ç½®äº†æ¤é€‰é¡¹ï¼Œä»å¯ç”¨é™„åŠ åˆ°initrd的其他引导é…置覆盖内嵌的引导 +é…置。 + +通过引导é…ç½®ä¼ é€’å†…æ ¸å‚æ•° +======================== + +é™¤äº†å†…æ ¸å‘½ä»¤è¡Œï¼Œå¼•å¯¼é…置也å¯ä»¥ç”¨äºŽä¼ é€’å†…æ ¸å‚数。所有 ``kernel`` 关键å—下的键 +å€¼å¯¹éƒ½å°†ç›´æŽ¥ä¼ é€’ç»™å†…æ ¸å‘½ä»¤è¡Œã€‚æ¤å¤–， ``init`` ä¸‹çš„é”®å€¼å¯¹å°†é€šè¿‡å‘½ä»¤è¡Œä¼ é€’ç»™ +init进程。å‚数按以下顺åºä¸Žç”¨æˆ·ç»™å®šçš„å†…æ ¸å‘½ä»¤è¡Œå—ç¬¦ä¸²ç›¸è¿žï¼Œå› æ¤å‘½ä»¤è¡Œå‚æ•°å¯ä»¥ +覆盖引导é…ç½®å‚数（这å–决于å系统如何处ç†å‚数，但通常å‰é¢çš„å‚数将被åŽé¢çš„å‚æ•° +覆盖）:: + + [bootconfig params][cmdline params] -- [bootconfig init params][cmdline init params] + +如果引导é…置文件给出的kernel/initå‚数是:: + + kernel { + root = 01234567-89ab-cdef-0123-456789abcd + } + init { + splash + } + +这将被å¤åˆ¶åˆ°å†…æ ¸å‘½ä»¤è¡Œå—符串ä¸ï¼Œå¦‚下所示:: + + root="01234567-89ab-cdef-0123-456789abcd" -- splash + +如果用户给出的其他命令行是:: + + ro bootconfig -- quiet + +则最åŽçš„å†…æ ¸å‘½ä»¤è¡Œå¦‚ä¸‹:: + + root="01234567-89ab-cdef-0123-456789abcd" ro bootconfig -- splash quiet + + +é…置文件的é™åˆ¶ +============== + +当å‰æœ€å¤§çš„é…置大å°æ˜¯32KB，关键å—总数（ä¸æ˜¯é”®å€¼æ¡ç›®ï¼‰å¿…须少于1024个节点。 +注æ„：这ä¸æ˜¯æ¡ç›®æ•°è€Œæ˜¯èŠ‚点数，æ¡ç›®å¿…须消耗超过2个节点（一个关键å—和一个值）。 +所以从ç†è®ºä¸Šè®²æœ€å¤š512个键值对。如果关键å—å¹³å‡åŒ…å«3个å•è¯ï¼Œåˆ™å¯æœ‰256个键值对。 +在大多数情况下，é…置项的数é‡å°†å°‘于100个æ¡ç›®ï¼Œå°äºŽ8KBï¼Œå› æ¤è¿™åº”该足够了。如果 +节点数超过1024，解æžå™¨å°†è¿”回错误，å³ä½¿æ–‡ä»¶å¤§å°å°äºŽ32KB。（请注æ„，æ¤æœ€å¤§å°ºå¯¸ +ä¸åŒ…括填充的空å—符。） +æ— è®ºå¦‚ä½•ï¼Œå› ä¸º ``bootconfig`` å‘½ä»¤åœ¨é™„åŠ å¯åŠ¨é…置到initrdæ˜ åƒæ—¶ä¼šéªŒè¯å®ƒï¼Œç”¨æˆ· +å¯ä»¥åœ¨å¼•å¯¼ä¹‹å‰æ³¨æ„到它。 + + +引导é…ç½®API +=========== + +用户å¯ä»¥æŸ¥è¯¢æˆ–é历键值对，也å¯ä»¥æŸ¥æ‰¾ï¼ˆå‰ç¼€ï¼‰æ ¹å…³é”®å—节点，并在查找该节点下的 +键值。 + +如果您有一个关键å—å—符串，则å¯ä»¥ç›´æŽ¥ä½¿ç”¨ xbc_find_value() 查询该键的值。如果 +ä½ æƒ³çŸ¥é“引导é…置里有哪些关键å—，å¯ä»¥ä½¿ç”¨ xbc_for_each_key_value() è¿ä»£é”®å€¼å¯¹ã€‚ +请注æ„，您需è¦ä½¿ç”¨ xbc_array_for_each_value() 访问数组的值，例如:: + + vnode = NULL; + xbc_find_value("key.word", &vnode); + if (vnode && xbc_node_is_array(vnode)) + xbc_array_for_each_value(vnode, value) { + printk("%s ", value); + } + +如果您想查找具有å‰ç¼€å—符串的键，å¯ä»¥ä½¿ç”¨ xbc_find_node() 通过å‰ç¼€å—符串查找 +节点，然åŽç”¨ xbc_node_for_each_key_value() è¿ä»£å‰ç¼€èŠ‚点下的键。 + +但最典型的用法是获å–å‰ç¼€ä¸‹çš„命å值或å‰ç¼€ä¸‹çš„命å数组，例如:: + + root = xbc_find_node("key.prefix"); + value = xbc_node_find_value(root, "option", &vnode); + ... + xbc_node_for_each_array_value(root, "array-option", value, anode) { + ... + } + +这将访问值“key.prefix.optionâ€çš„值和“key.prefix.array-optionâ€çš„数组。 + +é”是ä¸éœ€è¦çš„ï¼Œå› ä¸ºåœ¨åˆå§‹åŒ–之åŽé…ç½®åªè¯»ã€‚如果需è¦ä¿®æ”¹ï¼Œå¿…é¡»å¤åˆ¶æ‰€æœ‰æ•°æ®å’Œå…³é”®å—。 + + +函数与结构体 +============ + +相关定义的kernel-docå‚è§ï¼š + + - include/linux/bootconfig.h + - lib/bootconfig.c diff --git a/Documentation/translations/zh_CN/admin-guide/index.rst b/Documentation/translations/zh_CN/admin-guide/index.rst index 2f6970d0a032..ac2960da33e6 100644 --- a/Documentation/translations/zh_CN/admin-guide/index.rst +++ b/Documentation/translations/zh_CN/admin-guide/index.rst @@ -63,6 +63,7 @@ Todolist: .. toctree:: :maxdepth: 1 + bootconfig clearing-warn-once cpu-load cputopology @@ -80,7 +81,6 @@ Todolist: * binderfs * binfmt-misc * blockdev/index -* bootconfig * braille-console * btmrvl * cgroup-v1/index diff --git a/Documentation/translations/zh_CN/core-api/circular-buffers.rst b/Documentation/translations/zh_CN/core-api/circular-buffers.rst new file mode 100644 index 000000000000..694ad8e61070 --- /dev/null +++ b/Documentation/translations/zh_CN/core-api/circular-buffers.rst @@ -0,0 +1,210 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +.. include:: ../disclaimer-zh_CN.rst + +:Original: Documentation/core-api/circular-buffers.rst + +:翻译: + + 周彬彬 Binbin Zhou <zhoubinbin@loongson.cn> + +:æ ¡è¯‘: + + å¸å»¶è…¾ Yanteng Si <siyanteng@loongson.cn> + å´æƒ³æˆ Wu Xiangcheng <bobwxc@email.cn> + 时奎亮 Alex Shi <alexs@kernel.org> + +========== +环形缓冲区 +========== + +:作者: David Howells <dhowells@redhat.com> +:作者: Paul E. McKenney <paulmck@linux.ibm.com> + + +Linux æ供了许多å¯ç”¨äºŽå®žçŽ°å¾ªçŽ¯ç¼“å†²çš„ç‰¹æ€§ã€‚æœ‰ä¸¤ç»„è¿™æ ·çš„ç‰¹æ€§ï¼š + + (1) 用于确定2次方大å°çš„缓冲区信æ¯çš„便利函数。 + + (2) å¯ä»¥ä»£æ›¿ç¼“冲区ä¸å¯¹è±¡çš„生产者和消费者共享é”的内å˜å±éšœã€‚ + +如下所述，è¦ä½¿ç”¨è¿™äº›è®¾æ–½ï¼Œåªéœ€è¦ä¸€ä¸ªç”Ÿäº§è€…和一个消费者。å¯ä»¥é€šè¿‡åºåˆ—化æ¥å¤„ç†å¤šä¸ª +生产者，并通过åºåˆ—化æ¥å¤„ç†å¤šä¸ªæ¶ˆè´¹è€…。 + +.. Contents: + + (*) 什么是环形缓冲区？ + + (*) 测é‡2次幂缓冲区 + + (*) 内å˜å±éšœä¸ŽçŽ¯å½¢ç¼“冲区的结åˆä½¿ç”¨ + - 生产者 + - 消费者 + + (*) 延伸阅读 + + + +什么是环形缓冲区？ +================== + +首先，什么是环形缓冲区？环形缓冲区是具有固定的有é™å¤§å°çš„缓冲区，它有两个索引： + + (1) 'head'索引 - ç”Ÿäº§è€…å°†å…ƒç´ æ’入缓冲区的ä½ç½®ã€‚ + + (2) 'tail'索引 - 消费者在缓冲区ä¸æ‰¾åˆ°ä¸‹ä¸€ä¸ªå…ƒç´ çš„ä½ç½®ã€‚ + +通常，当tail指针ç‰äºŽhead指针时，表明缓冲区是空的；而当head指针比tail指针少一个时， +表明缓冲区是满的。 + +æ·»åŠ å…ƒç´ æ—¶ï¼Œé€’å¢žheadç´¢å¼•ï¼›åˆ é™¤å…ƒç´ æ—¶ï¼Œé€’å¢žtail索引。tail索引ä¸åº”该跳过head索引， +两个索引在到达缓冲区末端时都应该被赋值为0，从而å…许海é‡çš„æ•°æ®æµè¿‡ç¼“冲区。 + +é€šå¸¸æƒ…å†µä¸‹ï¼Œå…ƒç´ éƒ½æœ‰ç›¸åŒçš„å•å…ƒå¤§å°ï¼Œä½†è¿™å¹¶ä¸æ˜¯ä½¿ç”¨ä»¥ä¸‹æŠ€æœ¯çš„ä¸¥æ ¼è¦æ±‚。如果è¦åœ¨ç¼“ +冲区ä¸åŒ…å«å¤šä¸ªå…ƒç´ 或å¯å˜å¤§å°çš„å…ƒç´ ï¼Œåˆ™ç´¢å¼•å¯ä»¥å¢žåŠ 超过1，å‰æ是两个索引都没有超过 +å¦ä¸€ä¸ªã€‚然而，实现者必须å°å¿ƒï¼Œå› 为超过一个å•ä½å¤§å°çš„区域å¯èƒ½ä¼šè¦†ç›–缓冲区的末端并 +且缓冲区会被分æˆä¸¤æ®µã€‚ + +测é‡2次幂缓冲区 +=============== + +计算任æ„大å°çš„环形缓冲区的å 用或剩余容é‡é€šå¸¸æ˜¯ä¸€ä¸ªè´¹æ—¶çš„æ“作，需è¦ä½¿ç”¨æ¨¡ï¼ˆé™¤æ³•ï¼‰ +指令。但是如果缓冲区的大å°ä¸º2次幂，则å¯ä»¥ä½¿ç”¨æ›´å¿«çš„按ä½ä¸ŽæŒ‡ä»¤ä»£æ›¿ã€‚ + +Linuxæ供了一组用于处ç†2次幂环形缓冲区的å®ã€‚å¯ä»¥é€šè¿‡ä»¥ä¸‹æ–¹å¼ä½¿ç”¨:: + + #include <linux/circ_buf.h> + +这些å®åŒ…括： + + (#) 测é‡ç¼“冲区的剩余容é‡:: + + CIRC_SPACE(head_index, tail_index, buffer_size); + + 返回缓冲区[1]ä¸å¯æ’å…¥å…ƒç´ çš„å‰©ä½™ç©ºé—´å¤§å°ã€‚ + + + (#) 测é‡ç¼“冲区ä¸çš„最大连ç»ç«‹å³å¯ç”¨ç©ºé—´:: + + CIRC_SPACE_TO_END(head_index, tail_index, buffer_size); + + 返回缓冲区[1]ä¸å‰©ä½™çš„è¿žç»ç©ºé—´çš„大å°ï¼Œå…ƒç´ å¯ä»¥ç«‹å³æ’入其ä¸ï¼Œè€Œä¸å¿…绕回到缓冲 + 区的开头。 + + + (#) 测é‡ç¼“冲区的使用数:: + + CIRC_CNT(head_index, tail_index, buffer_size); + + 返回当å‰å 用缓冲区[2]çš„å…ƒç´ æ•°é‡ã€‚ + + + (#) 测é‡ç¼“冲区的连ç»ä½¿ç”¨æ•°:: + + CIRC_CNT_TO_END(head_index, tail_index, buffer_size); + + 返回å¯ä»¥ä»Žç¼“冲区ä¸æå–çš„è¿žç»å…ƒç´ [2]çš„æ•°é‡ï¼Œè€Œä¸å¿…绕回到缓冲区的开头。 + +这里的æ¯ä¸€ä¸ªå®å义上都会返回一个介于0å’Œbuffer_size-1之间的值，但是： + + (1) CIRC_SPACE*()是为了在生产者ä¸ä½¿ç”¨ã€‚对生产者æ¥è¯´ï¼Œå®ƒä»¬å°†è¿”回一个下é™ï¼Œå› 为生 + 产者控制ç€head索引，但消费者å¯èƒ½ä»ç„¶åœ¨å¦ä¸€ä¸ªCPU上耗尽缓冲区并移动tail索引。 + + 对消费者æ¥è¯´ï¼Œå®ƒå°†æ˜¾ç¤ºä¸€ä¸ªä¸Šé™ï¼Œå› 为生产者å¯èƒ½æ£å¿™äºŽè€—尽空间。 + + (2) CIRC_CNT*()是为了在消费者ä¸ä½¿ç”¨ã€‚对消费者æ¥è¯´ï¼Œå®ƒä»¬å°†è¿”回一个下é™ï¼Œå› 为消费 + 者控制ç€tail索引，但生产者å¯èƒ½ä»ç„¶åœ¨å¦ä¸€ä¸ªCPU上填充缓冲区并移动head索引。 + + 对于生产者，它将显示一个上é™ï¼Œå› 为消费者å¯èƒ½æ£å¿™äºŽæ¸…空缓冲区。 + + (3) 对于第三方æ¥è¯´ï¼Œç”Ÿäº§è€…和消费者对索引的写入顺åºæ˜¯æ— 法ä¿è¯çš„ï¼Œå› ä¸ºå®ƒä»¬æ˜¯ç‹¬ç«‹çš„ï¼Œ + 而且å¯èƒ½æ˜¯åœ¨ä¸åŒçš„CPU上进行的，所以在这ç§æƒ…况下的结果åªæ˜¯ä¸€ç§çŒœæµ‹ï¼Œç”šè‡³å¯èƒ½ + 是错误的。 + +内å˜å±éšœä¸ŽçŽ¯å½¢ç¼“冲区的结åˆä½¿ç”¨ +============================== + +通过将内å˜å±éšœä¸ŽçŽ¯å½¢ç¼“冲区结åˆä½¿ç”¨ï¼Œå¯ä»¥é¿å…以下需求： + + (1) 使用å•ä¸ªé”æ¥æŽ§åˆ¶å¯¹ç¼“冲区两端的访问，从而å…许åŒæ—¶å¡«å……å’Œæ¸…ç©ºç¼“å†²åŒºï¼›ä»¥åŠ + + (2) 使用原å计数器æ“作。 + +这有两个方é¢ï¼šå¡«å……缓冲区的生产者和清空缓冲区的消费者。在任何时候，åªåº”有一个生产 +者在填充缓冲区，åŒæ ·çš„也åªåº”有一个消费者在清空缓冲区，但åŒæ–¹å¯ä»¥åŒæ—¶æ“作。 + + +生产者 +------ + +生产者看起æ¥åƒè¿™æ ·:: + + spin_lock(&producer_lock); + + unsigned long head = buffer->head; + /* spin_unlock()和下一个spin_lock()æ供必è¦çš„排åºã€‚ */ + unsigned long tail = READ_ONCE(buffer->tail); + + if (CIRC_SPACE(head, tail, buffer->size) >= 1) { + /* æ·»åŠ ä¸€ä¸ªå…ƒç´ åˆ°ç¼“å†²åŒº */ + struct item *item = buffer[head]; + + produce_item(item); + + smp_store_release(buffer->head, + (head + 1) & (buffer->size - 1)); + + /* wake_up()将确ä¿åœ¨å”¤é†’任何人之å‰æ交head */ + wake_up(consumer); + } + + spin_unlock(&producer_lock); + +这将表明CPU必须在head索引使其对消费者å¯ç”¨ä¹‹å‰å†™å…¥æ–°é¡¹ç›®çš„内容，åŒæ—¶CPU必须在唤醒 +消费者之å‰å†™å…¥ä¿®æ”¹åŽçš„head索引。 + +请注æ„，wake_up()并ä¸ä¿è¯ä»»ä½•å½¢å¼çš„å±éšœï¼Œé™¤éžç¡®å®žå”¤é†’了æŸäº›ä¸œè¥¿ã€‚å› æ¤æˆ‘们ä¸èƒ½ä¾é +它æ¥è¿›è¡ŒæŽ’åºã€‚但是数组ä¸å§‹ç»ˆæœ‰ä¸€ä¸ªå…ƒç´ ç•™ç©ºï¼Œå› æ¤ç”Ÿäº§è€…å¿…é¡»äº§ç”Ÿä¸¤ä¸ªå…ƒç´ ï¼Œç„¶åŽæ‰å¯ +èƒ½ç ´å消费者当å‰æ£åœ¨è¯»å–çš„å…ƒç´ ã€‚åŒæ—¶ï¼Œæ¶ˆè´¹è€…è¿žç»è°ƒç”¨ä¹‹é—´æˆå¯¹çš„解é”-åŠ é”æ供了索引 +读å–ï¼ˆæŒ‡ç¤ºæ¶ˆè´¹è€…å·²æ¸…ç©ºç»™å®šå…ƒç´ ï¼‰å’Œç”Ÿäº§è€…å¯¹è¯¥ç›¸åŒå…ƒç´ 的写入之间的必è¦é¡ºåºã€‚ + + +消费者 +------ + +消费者看起æ¥åƒè¿™æ ·:: + + spin_lock(&consumer_lock); + + /* 读å–该索引处的内容之å‰ï¼Œå…ˆè¯»å–索引 */ + unsigned long head = smp_load_acquire(buffer->head); + unsigned long tail = buffer->tail; + + if (CIRC_CNT(head, tail, buffer->size) >= 1) { + + /* 从缓冲区ä¸æå–ä¸€ä¸ªå…ƒç´ */ + struct item *item = buffer[tail]; + + consume_item(item); + + /* 在递增tail之å‰å®Œæˆå¯¹æ述符的读å–。 */ + smp_store_release(buffer->tail, + (tail + 1) & (buffer->size - 1)); + } + + spin_unlock(&consumer_lock); + +这表明CPU在读å–æ–°å…ƒç´ ä¹‹å‰ç¡®ä¿ç´¢å¼•æ˜¯æœ€æ–°çš„，然åŽåœ¨å†™å…¥æ–°çš„尾指针之å‰åº”ç¡®ä¿CPU已完 +æˆè¯»å–è¯¥å…ƒç´ ï¼Œè¿™å°†æ“¦é™¤è¯¥å…ƒç´ ã€‚ + +请注æ„，使用READ_ONCE()å’Œsmp_load_acquire()æ¥è¯»å–åå‘（head）索引。这å¯ä»¥é˜²æ¢ç¼–译 +器丢弃并é‡æ–°åŠ 载其缓å˜å€¼ã€‚如果您能确定åå‘（head）索引将仅使用一次，则这ä¸æ˜¯å¿…é¡» +的。smp_load_acquire()还å¯ä»¥å¼ºåˆ¶CPU对åŽç»çš„内å˜å¼•ç”¨è¿›è¡ŒæŽ’åºã€‚类似地，两ç§ç®—法都使 +用smp_store_release()æ¥å†™å…¥çº¿ç¨‹çš„索引。这记录了我们æ£åœ¨å†™å…¥å¯ä»¥å¹¶å‘读å–的内容的事 +实，以防æ¢ç¼–è¯‘å™¨ç ´åå˜å‚¨ï¼Œå¹¶å¼ºåˆ¶å¯¹ä»¥å‰çš„访问进行排åºã€‚ + + +延伸阅读 +======== + +关于Linux的内å˜å±éšœè®¾æ–½çš„æ述，请查看Documentation/memory-barriers.txt。 diff --git a/Documentation/translations/zh_CN/core-api/generic-radix-tree.rst b/Documentation/translations/zh_CN/core-api/generic-radix-tree.rst new file mode 100644 index 000000000000..eacd1d2ebddc --- /dev/null +++ b/Documentation/translations/zh_CN/core-api/generic-radix-tree.rst @@ -0,0 +1,23 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +.. include:: ../disclaimer-zh_CN.rst + +:Original: Documentation/core-api/generic-radix-tree.rst + +:翻译: + + 周彬彬 Binbin Zhou <zhoubinbin@loongson.cn> + +=================== +é€šç”¨åŸºæ•°æ ‘/稀ç–数组 +=================== + +é€šç”¨åŸºæ•°æ ‘/稀ç–数组的相关内容请è§include/linux/generic-radix-tree.h文件ä¸çš„ +“DOC: Generic radix trees/sparse arraysâ€ã€‚ + +é€šç”¨åŸºæ•°æ ‘å‡½æ•° +-------------- + +该APIåœ¨ä»¥ä¸‹å†…æ ¸ä»£ç ä¸: + +include/linux/generic-radix-tree.h diff --git a/Documentation/translations/zh_CN/core-api/idr.rst b/Documentation/translations/zh_CN/core-api/idr.rst new file mode 100644 index 000000000000..97a16e76b81b --- /dev/null +++ b/Documentation/translations/zh_CN/core-api/idr.rst @@ -0,0 +1,80 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +.. include:: ../disclaimer-zh_CN.rst + +:Original: Documentation/core-api/idr.rst + +:翻译: + + 周彬彬 Binbin Zhou <zhoubinbin@loongson.cn> + +:æ ¡è¯‘: + + å¸å»¶è…¾ Yanteng Si <siyanteng@loongson.cn> + å´æƒ³æˆ Wu Xiangcheng <bobwxc@email.cn> + 时奎亮 Alex Shi <alexs@kernel.org> + +====== +IDåˆ†é… +====== + +:作者: Matthew Wilcox + +概述 +==== + +è¦è§£å†³çš„一个常è§é—®é¢˜æ˜¯åˆ†é…æ ‡è¯†ç¬¦ï¼ˆIDsï¼‰ï¼›å®ƒé€šå¸¸æ˜¯æ ‡è¯†äº‹ç‰©çš„æ•°å—。比如包括文件æè¿° +符ã€è¿›ç¨‹IDã€ç½‘络åè®®ä¸çš„æ•°æ®åŒ…æ ‡è¯†ç¬¦ã€SCSIæ ‡è®°å’Œè®¾å¤‡å®žä¾‹ç¼–å·ã€‚IDRå’ŒIDA为这个问题 +æ供了一个åˆç†çš„解决方案，以é¿å…æ¯ä¸ªäººéƒ½è‡ªåˆ›ã€‚IDRæ供将IDæ˜ å°„åˆ°æŒ‡é’ˆçš„èƒ½åŠ›ï¼Œè€ŒIDA +ä»…æä¾›ID分é…ï¼Œå› æ¤å†…å˜æ•ˆçŽ‡æ›´é«˜ã€‚ + +IDR接å£å·²ç»è¢«åºŸå¼ƒï¼Œè¯·ä½¿ç”¨ ``XArray`` 。 + +IDR的用法 +========= + +首先åˆå§‹åŒ–一个IDR，对于é™æ€åˆ†é…çš„IDR使用DEFINE_IDR()，或者对于动æ€åˆ†é…çš„IDR使用 +idr_init()。 + +您å¯ä»¥è°ƒç”¨idr_alloc()æ¥åˆ†é…一个未使用的ID。通过调用idr_find()查询与该ID相关的指针， +并通过调用idr_remove()释放该ID。 + +如果需è¦æ›´æ”¹ä¸Žä¸€ä¸ªID相关è”的指针，å¯ä»¥è°ƒç”¨idr_replace()ã€‚è¿™æ ·åšçš„一个常è§åŽŸå› 是通 +过将 ``NULL`` æŒ‡é’ˆä¼ é€’ç»™åˆ†é…函数æ¥ä¿ç•™ID；用ä¿ç•™çš„IDåˆå§‹åŒ–对象，最åŽå°†åˆå§‹åŒ–的对 +象æ’å…¥IDR。 + +一些用户需è¦åˆ†é…大于 ``INT_MAX`` çš„ID。到目å‰ä¸ºæ¢ï¼Œæ‰€æœ‰è¿™äº›ç”¨æˆ·éƒ½æ»¡è¶³ ``UINT_MAX`` +çš„é™åˆ¶ï¼Œä»–们使用idr_alloc_u32()。如果您需è¦è¶…出u32çš„ID，我们将与您åˆä½œä»¥æ»¡è¶³æ‚¨çš„ +需求。 + +如果需è¦æŒ‰é¡ºåºåˆ†é…ID，å¯ä»¥ä½¿ç”¨idr_alloc_cyclic()。处ç†è¾ƒå¤§æ•°é‡çš„ID时，IDR的效率会 +é™ä½Žï¼Œæ‰€ä»¥ä½¿ç”¨è¿™ä¸ªå‡½æ•°ä¼šæœ‰ä¸€ç‚¹ä»£ä»·ã€‚ + +è¦å¯¹IDR使用的所有指针进行æ“作，您å¯ä»¥ä½¿ç”¨åŸºäºŽå›žè°ƒçš„idr_for_each()或è¿ä»£å™¨æ ·å¼çš„ +idr_for_each_entry()。您å¯èƒ½éœ€è¦ä½¿ç”¨idr_for_each_entry_continue()æ¥ç»§ç»è¿ä»£ã€‚如果 +è¿ä»£å™¨ä¸ç¬¦åˆæ‚¨çš„需求，您也å¯ä»¥ä½¿ç”¨idr_get_next()。 + +当使用完IDRåŽï¼Œæ‚¨å¯ä»¥è°ƒç”¨idr_destroy()æ¥é‡Šæ”¾IDRå 用的内å˜ã€‚这并ä¸ä¼šé‡Šæ”¾IDR指å‘çš„ +å¯¹è±¡ï¼›å¦‚æžœæ‚¨æƒ³è¿™æ ·åšï¼Œè¯·ä½¿ç”¨å…¶ä¸ä¸€ä¸ªè¿ä»£å™¨æ¥æ‰§è¡Œæ¤æ“作。 + +您å¯ä»¥ä½¿ç”¨idr_is_empty()æ¥æŸ¥çœ‹å½“å‰æ˜¯å¦åˆ†é…了任何ID。 + +如果在从IDR分é…一个新ID时需è¦å¸¦é”，您å¯èƒ½éœ€è¦ä¼ 递一组é™åˆ¶æ€§çš„GFPæ ‡å¿—ï¼Œä½†è¿™å¯èƒ½å¯¼ +致IDRæ— æ³•åˆ†é…内å˜ã€‚为了解决该问题，您å¯ä»¥åœ¨èŽ·å–é”之å‰è°ƒç”¨idr_preload()，然åŽåœ¨åˆ† +é…之åŽè°ƒç”¨idr_preload_end()。 + +IDRåŒæ¥çš„相关内容请è§include/linux/idr.h文件ä¸çš„“DOC: idr syncâ€ã€‚ + +IDA的用法 +========= + +IDA的用法的相关内容请è§lib/idr.c文件ä¸çš„“DOC: IDA descriptionâ€ã€‚ + +函数和数æ®ç»“æž„ +============== + +该APIåœ¨ä»¥ä¸‹å†…æ ¸ä»£ç ä¸: + +include/linux/idr.h + +lib/idr.c diff --git a/Documentation/translations/zh_CN/core-api/index.rst b/Documentation/translations/zh_CN/core-api/index.rst index 8a94ad87465d..37756d240b5e 100644 --- a/Documentation/translations/zh_CN/core-api/index.rst +++ b/Documentation/translations/zh_CN/core-api/index.rst @@ -44,15 +44,15 @@ assoc_array xarray rbtree + idr + circular-buffers + generic-radix-tree + packing Todolist: - idr - circular-buffers - generic-radix-tree - packing this_cpu_ops timekeeping errseq diff --git a/Documentation/translations/zh_CN/core-api/packing.rst b/Documentation/translations/zh_CN/core-api/packing.rst new file mode 100644 index 000000000000..c0aab3a349d0 --- /dev/null +++ b/Documentation/translations/zh_CN/core-api/packing.rst @@ -0,0 +1,160 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +.. include:: ../disclaimer-zh_CN.rst + +:Original: Documentation/core-api/packing.rst + +:翻译: + + 周彬彬 Binbin Zhou <zhoubinbin@loongson.cn> + +:æ ¡è¯‘: + + å¸å»¶è…¾ Yanteng Si <siyanteng@loongson.cn> + å´æƒ³æˆ Wu Xiangcheng <bobwxc@email.cn> + 时奎亮 Alex Shi <alexs@kernel.org> + +======================== +通用的ä½åŸŸæ‰“包和解包函数 +======================== + +问题陈述 +-------- + +ä½¿ç”¨ç¡¬ä»¶æ—¶ï¼Œå¿…é¡»åœ¨å‡ ç§ä¸Žå…¶äº¤äº’的方法之间进行选择。 + +å¯ä»¥å°†æŒ‡é’ˆæ˜ 射到在硬件设备的内å˜åŒºä¸Šç²¾å¿ƒè®¾è®¡çš„结构体，并将其å—段作为结构æˆå‘˜ï¼ˆå¯ +能声明为ä½åŸŸï¼‰è®¿é—®ã€‚但是由于CPU和硬件设备之间潜在的å—节顺åºä¸åŒ¹é…，以这ç§æ–¹å¼ç¼–写 +代ç 会é™ä½Žå…¶å¯ç§»æ¤æ€§ã€‚ + +æ¤å¤–，必须密切注æ„将硬件文档ä¸çš„寄å˜å™¨å®šä¹‰è½¬æ¢ä¸ºç»“æž„çš„ä½åŸŸç´¢å¼•ã€‚æ¤å¤–，一些硬件 +（通常是网络设备）倾å‘于以è¿å任何åˆç†å—边界（有时甚至是64ä½ï¼‰çš„æ–¹å¼å¯¹å…¶å¯„å˜å™¨å— +æ®µè¿›è¡Œåˆ†ç»„ã€‚è¿™å°±é€ æˆäº†ä¸å¾—ä¸åœ¨ç»“æž„ä¸å®šä¹‰å¯„å˜å™¨å—段的“高â€å’Œâ€œä½Žâ€éƒ¨åˆ†çš„ä¸ä¾¿ã€‚ + +结构域定义的更å¯é 的替代方法是通过移动适当数é‡çš„ä½æ¥æå–所需的å—段。但这ä»ç„¶ä¸èƒ½ +防æ¢å—节顺åºä¸åŒ¹é…，除éžæ‰€æœ‰å†…å˜è®¿é—®éƒ½æ˜¯é€å—节执行的。æ¤å¤–，代ç 很容易å˜å¾—æ‚ä¹±æ— +ç« ï¼ŒåŒæ—¶å¯èƒ½ä¼šåœ¨æ‰€éœ€çš„许多ä½ç§»æ“作ä¸ä¸¢å¤±ä¸€äº›é«˜å±‚次的想法。 + +许多驱动程åºé‡‡ç”¨äº†ä½ç§»çš„方法，然åŽè¯•å›¾ç”¨å®šåˆ¶çš„å®æ¥å‡å°‘æ‚ä¹±æ— ç« çš„ä¸œè¥¿ï¼Œä½†æ›´å¤šçš„æ—¶ +候，这些å®æ‰€é‡‡ç”¨çš„æ·å¾„ä¾æ—§å¦¨ç¢äº†ä»£ç 真æ£çš„å¯ç§»æ¤æ€§ã€‚ + +解决方案 +-------- + +该API涉åŠ2个基本æ“作： + + - 将一个CPUå¯ä½¿ç”¨çš„æ•°å—打包到内å˜ç¼“冲区ä¸ï¼ˆå…·æœ‰ç¡¬ä»¶çº¦æŸ/特殊性）。 + - 将内å˜ç¼“冲区（具有硬件约æŸ/特殊性）解压缩为一个CPUå¯ä½¿ç”¨çš„æ•°å—。 + +该APIæ供了对所述硬件约æŸå’Œç‰¹æ®Šæ€§ä»¥åŠCPUå—节åºçš„æŠ½è±¡ï¼Œå› æ¤è¿™ä¸¤è€…之间å¯èƒ½ä¸åŒ¹é…。 + +这些API函数的基本å•å…ƒæ˜¯u64。从CPU的角度æ¥çœ‹ï¼Œä½63总是æ„味ç€å—节7çš„ä½å移é‡7，尽管 +åªæ˜¯é€»è¾‘上的。问题是：我们将这个比特放在内å˜çš„什么ä½ç½®ï¼Ÿ + +以下示例介ç»äº†æ‰“包u64å—段的内å˜å¸ƒå±€ã€‚打包缓冲区ä¸çš„å—节å移é‡å§‹ç»ˆé»˜è®¤ä¸º0，1...7。 +示例显示的是逻辑å—节和ä½æ‰€åœ¨çš„ä½ç½®ã€‚ + +1. é€šå¸¸æƒ…å†µä¸‹ï¼ˆæ— ç‰¹æ®Šæ€§ï¼‰ï¼Œæˆ‘ä»¬ä¼šè¿™æ ·åšï¼š + +:: + + 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 + 7 6 5 4 + 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 + 3 2 1 0 + +也就是说，CPUå¯ä½¿ç”¨çš„u64çš„MSByte(7)ä½äºŽå†…å˜å移é‡0处，而u64çš„LSByte(0)ä½äºŽå†…å˜å移é‡7处。 + +这对应于大多数人认为的“大端â€ï¼Œå…¶ä¸ä½i对应于数å—2^i。这在代ç 注释ä¸ä¹Ÿç§°ä¸ºâ€œé€»è¾‘â€ç¬¦å·ã€‚ + + +2. 如果设置了QUIRK_MSB_ON_THE_RIGHT，我们按如下方å¼æ“作： + +:: + + 56 57 58 59 60 61 62 63 48 49 50 51 52 53 54 55 40 41 42 43 44 45 46 47 32 33 34 35 36 37 38 39 + 7 6 5 4 + 24 25 26 27 28 29 30 31 16 17 18 19 20 21 22 23 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 + 3 2 1 0 + +也就是说，QUIRK_MSB_ON_THE_RIGHTä¸ä¼šå½±å“å—节定ä½ï¼Œä½†ä¼šå转å—节内的ä½å移é‡ã€‚ + + +3. 如果设置了QUIRK_LITTLE_ENDIAN，我们按如下方å¼æ“作： + +:: + + 39 38 37 36 35 34 33 32 47 46 45 44 43 42 41 40 55 54 53 52 51 50 49 48 63 62 61 60 59 58 57 56 + 4 5 6 7 + 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 23 22 21 20 19 18 17 16 31 30 29 28 27 26 25 24 + 0 1 2 3 + +å› æ¤ï¼ŒQUIRK_LITTLE_ENDIANæ„味ç€åœ¨å†…å˜åŒºåŸŸå†…，æ¯ä¸ª4å—节的å—çš„æ¯ä¸ªå—节都被放置在与 +该å—的边界相比的镜åƒä½ç½®ã€‚ + + +4. 如果设置了QUIRK_MSB_ON_THE_RIGHTå’ŒQUIRK_LITTLE_ENDIANï¼Œæˆ‘ä»¬è¿™æ ·åšï¼š + +:: + + 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 + 4 5 6 7 + 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 + 0 1 2 3 + + +5. 如果åªè®¾ç½®äº†QUIRK_LSW32_IS_FIRSTï¼Œæˆ‘ä»¬è¿™æ ·åšï¼š + +:: + + 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 + 3 2 1 0 + 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 + 7 6 5 4 + +在这ç§æƒ…况下，8å—节内å˜åŒºåŸŸè§£é‡Šå¦‚下：å‰4å—节对应最ä¸é‡è¦çš„4å—节的å—，åŽ4å—节对应 +æ›´é‡è¦çš„4å—节的å—。 + +6. 如果设置了QUIRK_LSW32_IS_FIRSTå’ŒQUIRK_MSB_ON_THE_RIGHTï¼Œæˆ‘ä»¬è¿™æ ·åšï¼š + +:: + + 24 25 26 27 28 29 30 31 16 17 18 19 20 21 22 23 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 + 3 2 1 0 + 56 57 58 59 60 61 62 63 48 49 50 51 52 53 54 55 40 41 42 43 44 45 46 47 32 33 34 35 36 37 38 39 + 7 6 5 4 + + +7. 如果设置了QUIRK_LSW32_IS_FIRSTå’ŒQUIRK_LITTLE_ENDIAN，则如下所示： + +:: + + 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 23 22 21 20 19 18 17 16 31 30 29 28 27 26 25 24 + 0 1 2 3 + 39 38 37 36 35 34 33 32 47 46 45 44 43 42 41 40 55 54 53 52 51 50 49 48 63 62 61 60 59 58 57 56 + 4 5 6 7 + + +8. 如果设置了QUIRK_LSW32_IS_FIRST，QUIRK_LITTLE_ENDIANå’ŒQUIRK_MSB_ON_THE_RIGHT， + 则如下所示： + +:: + + 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 + 0 1 2 3 + 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 + 4 5 6 7 + + +我们总是认为我们的å移é‡å¥½åƒæ²¡æœ‰ç‰¹æ®Šæ€§ï¼Œç„¶åŽåœ¨è®¿é—®å†…å˜åŒºåŸŸä¹‹å‰ç¿»è¯‘它们。 + +预期用途 +-------- + +选择使用该API的驱动程åºé¦–先需è¦ç¡®å®šä¸Šè¿°3ç§quirk组åˆï¼ˆå…±8ç§ï¼‰ä¸çš„哪一ç§ä¸Žç¡¬ä»¶æ–‡æ¡£ +ä¸æ述的相匹é…。然åŽï¼Œä»–们应该å°è£…packing()函数，创建一个新的xxx_packing()，使用 +适当的QUIRK_* one-hot ä½é›†åˆæ¥è°ƒç”¨å®ƒã€‚ + +packing()函数返回一个int类型的错误ç ，以防æ¢ç¨‹åºå‘˜ä½¿ç”¨ä¸æ£ç¡®çš„APIã€‚è¿™äº›é”™è¯¯é¢„è®¡ä¸ +会在è¿è¡Œæ—¶å‘ç”Ÿï¼Œå› æ¤xxx_packing()返回void并简å•åœ°æŽ¥å—这些错误是åˆç†çš„。它å¯ä»¥é€‰æ‹© +è½¬å‚¨æ ˆæˆ–æ‰“å°é”™è¯¯æ述。 diff --git a/Documentation/translations/zh_CN/devicetree/changesets.rst b/Documentation/translations/zh_CN/devicetree/changesets.rst new file mode 100644 index 000000000000..2ace05f3c377 --- /dev/null +++ b/Documentation/translations/zh_CN/devicetree/changesets.rst @@ -0,0 +1,37 @@ +.. SPDX-License-Identifier: GPL-2.0 +.. include:: ../disclaimer-zh_CN.rst + +:Original: Documentation/Devicetree/changesets.rst + +:翻译: + + å¸å»¶è…¾ Yanteng Si <siyanteng@loongson.cn> + +:æ ¡è¯‘: + + +============ +è®¾å¤‡æ ‘å˜æ›´é›† +============ + +è®¾å¤‡æ ‘å˜æ›´é›†æ˜¯ä¸€ç§æ–¹æ³•ï¼Œå®ƒå…è®¸äººä»¬ä»¥è¿™æ ·ä¸€ç§æ–¹å¼åœ¨å®žæ—¶æ ‘ä¸ä½¿ç”¨å˜åŒ–，å³è¦ä¹ˆä½¿ç”¨å…¨éƒ¨çš„ +å˜åŒ–，è¦ä¹ˆä¸ä½¿ç”¨ã€‚如果在使用å˜æ›´é›†çš„过程ä¸å‘ç”Ÿé”™è¯¯ï¼Œé‚£ä¹ˆæ ‘å°†è¢«å›žæ»šåˆ°ä¹‹å‰çš„状æ€ã€‚一个 +å˜æ›´é›†ä¹Ÿå¯ä»¥åœ¨ä½¿ç”¨åŽè¢«åˆ 除。 + +当一个å˜æ›´é›†è¢«ä½¿ç”¨æ—¶ï¼Œæ‰€æœ‰çš„改å˜åœ¨å‘出OF_RECONFIG通知器之å‰è¢«ä¸€æ¬¡æ€§ä½¿ç”¨åˆ°æ ‘上。这是 +为了让接收者在收到通知时看到一个完整的ã€ä¸€è‡´çš„æ ‘çš„çŠ¶æ€ã€‚ + +一个å˜åŒ–集的顺åºå¦‚下。 + +1. of_changeset_init() - åˆå§‹åŒ–一个å˜æ›´é›†ã€‚ + +2. 一些DTæ ‘å˜åŒ–的调用，of_changeset_attach_node(), of_changeset_detach_node(), + of_changeset_add_property(), of_changeset_remove_property, + of_changeset_update_property()æ¥å‡†å¤‡ä¸€ç»„å˜æ›´ã€‚æ¤æ—¶ä¸ä¼šå¯¹æ´»åŠ¨æ ‘åšä»»ä½•å˜æ›´ã€‚所有 + çš„å˜æ›´æ“作都记录在of_changesetçš„ `entries` 列表ä¸ã€‚ + +3. of_changeset_apply() - å°†å˜æ›´ä½¿ç”¨åˆ°æ ‘上。è¦ä¹ˆæ•´ä¸ªå˜æ›´é›†è¢«ä½¿ç”¨ï¼Œè¦ä¹ˆå¦‚果有错误， + æ ‘ä¼šè¢«æ¢å¤åˆ°ä¹‹å‰çš„状æ€ã€‚æ ¸å¿ƒé€šè¿‡é”ç¡®ä¿æ£ç¡®çš„顺åºã€‚如果需è¦çš„è¯ï¼Œå¯ä»¥ä½¿ç”¨ä¸€ä¸ªè§£é”çš„ + __of_changeset_apply版本。 + +如果一个æˆåŠŸä½¿ç”¨çš„å˜æ›´é›†éœ€è¦è¢«åˆ 除，å¯ä»¥ç”¨of_changeset_revert()æ¥å®Œæˆã€‚ diff --git a/Documentation/translations/zh_CN/devicetree/dynamic-resolution-notes.rst b/Documentation/translations/zh_CN/devicetree/dynamic-resolution-notes.rst new file mode 100644 index 000000000000..115190341305 --- /dev/null +++ b/Documentation/translations/zh_CN/devicetree/dynamic-resolution-notes.rst @@ -0,0 +1,31 @@ +.. SPDX-License-Identifier: GPL-2.0 +.. include:: ../disclaimer-zh_CN.rst + +:Original: Documentation/Devicetree/dynamic-resolution-notes.rst + +:翻译: + + å¸å»¶è…¾ Yanteng Si <siyanteng@loongson.cn> + +:æ ¡è¯‘: + +======================== +Devicetree动æ€è§£æžå™¨è¯´æ˜Ž +======================== + +本文æè¿°äº†å†…æ ¸å†…DeviceTree解æžå™¨çš„实现，它ä½äºŽdrivers/of/resolver.cä¸ã€‚ + +解æžå™¨å¦‚何工作？ +---------------- + +解æžå™¨è¢«èµ‹äºˆä¸€ä¸ªä»»æ„çš„æ ‘ä½œä¸ºè¾“å…¥ï¼Œè¯¥æ ‘ç”¨é€‚å½“çš„dtc选项编译，并有一个/plugin/æ ‡ç¾ã€‚这就产 +生了适当的__fixups__å’Œ__local_fixups__节点。 + +解æžå™¨ä¾æ¬¡é€šè¿‡ä»¥ä¸‹æ¥éª¤å·¥ä½œ: + +1. ä»Žå®žæ—¶æ ‘ä¸èŽ·å–æœ€å¤§çš„è®¾å¤‡æ ‘phandle值 + 1. +2. è°ƒæ•´æ ‘çš„æ‰€æœ‰æœ¬åœ° phandles，以解决这个é‡ã€‚ +3. 使用 __local__fixups__ 节点信æ¯ä»¥ç›¸åŒçš„é‡è°ƒæ•´æ‰€æœ‰æœ¬åœ°å¼•ç”¨ã€‚ +4. 对于__fixups__节点ä¸çš„æ¯ä¸ªå±žæ€§ï¼Œæ‰¾åˆ°å®ƒåœ¨å®žæ—¶æ ‘ä¸å¼•ç”¨çš„节点。这是用æ¥æ ‡è®°è¯¥èŠ‚ç‚¹çš„æ ‡ç¾ã€‚ +5. 检索fixupçš„ç›®æ ‡çš„phandle。 +6. 对于属性ä¸çš„æ¯ä¸ªfixup，找到节点:属性:å移的ä½ç½®ï¼Œå¹¶ç”¨phandle值替æ¢å®ƒã€‚ diff --git a/Documentation/translations/zh_CN/devicetree/index.rst b/Documentation/translations/zh_CN/devicetree/index.rst index 3fc355fe0037..7451dbfdd3e5 100644 --- a/Documentation/translations/zh_CN/devicetree/index.rst +++ b/Documentation/translations/zh_CN/devicetree/index.rst @@ -24,21 +24,16 @@ Open Firmware å’Œ Devicetree usage-model of_unittest - -Todolist: - -* kernel-api + kernel-api Devicetree Overlays =================== .. toctree:: :maxdepth: 1 -Todolist: - -* changesets -* dynamic-resolution-notes -* overlay-notes + changesets + dynamic-resolution-notes + overlay-notes Devicetree Bindings =================== diff --git a/Documentation/translations/zh_CN/devicetree/kernel-api.rst b/Documentation/translations/zh_CN/devicetree/kernel-api.rst new file mode 100644 index 000000000000..6aa3b685494e --- /dev/null +++ b/Documentation/translations/zh_CN/devicetree/kernel-api.rst @@ -0,0 +1,58 @@ +.. SPDX-License-Identifier: GPL-2.0 +.. include:: ../disclaimer-zh_CN.rst + +:Original: Documentation/Devicetree/kernel-api.rst + +:翻译: + + å¸å»¶è…¾ Yanteng Si <siyanteng@loongson.cn> + +:æ ¡è¯‘: + + +================= +å†…æ ¸ä¸çš„è®¾å¤‡æ ‘API +================= + +æ ¸å¿ƒå‡½æ•° +-------- + +该APIåœ¨ä»¥ä¸‹å†…æ ¸ä»£ç ä¸: + +drivers/of/base.c + +include/linux/of.h + +drivers/of/property.c + +include/linux/of_graph.h + +drivers/of/address.c + +drivers/of/irq.c + +drivers/of/fdt.c + +驱动模型函数 +------------ + +该APIåœ¨ä»¥ä¸‹å†…æ ¸ä»£ç ä¸: + +include/linux/of_device.h + +drivers/of/device.c + +include/linux/of_platform.h + +drivers/of/platform.c + +覆盖和动æ€DT函数 +---------------- + +该APIåœ¨ä»¥ä¸‹å†…æ ¸ä»£ç ä¸: + +drivers/of/resolver.c + +drivers/of/dynamic.c + +drivers/of/overlay.c diff --git a/Documentation/translations/zh_CN/devicetree/overlay-notes.rst b/Documentation/translations/zh_CN/devicetree/overlay-notes.rst new file mode 100644 index 000000000000..1bd482cb0a1b --- /dev/null +++ b/Documentation/translations/zh_CN/devicetree/overlay-notes.rst @@ -0,0 +1,140 @@ +.. SPDX-License-Identifier: GPL-2.0 +.. include:: ../disclaimer-zh_CN.rst + +:Original: Documentation/Devicetree/overlay-notes.rst + +:翻译: + + å¸å»¶è…¾ Yanteng Si <siyanteng@loongson.cn> + +:æ ¡è¯‘: + +============== +è®¾å¤‡æ ‘è¦†ç›–è¯´æ˜Ž +============== + +本文档æ述了drivers/of/overlay.cä¸çš„å†…æ ¸å†…è®¾å¤‡æ ‘è¦†ç›–åŠŸèƒ½çš„å®žçŽ°ï¼Œæ˜¯ +Documentation/devicetree/dynamic-resolution-notes.rst[1]çš„é…套文档。 + +覆盖如何工作 +------------ + +è®¾å¤‡æ ‘è¦†ç›–çš„ç›®çš„æ˜¯ä¿®æ”¹å†…æ ¸çš„å®žæ—¶æ ‘ï¼Œå¹¶ä½¿ä¿®æ”¹ä»¥åæ˜ å˜åŒ–çš„æ–¹å¼å½±å“å†…æ ¸çš„çŠ¶æ€ã€‚ +ç”±äºŽå†…æ ¸ä¸»è¦å¤„ç†çš„是设备，任何新的设备节点如果导致一个活动的设备，就应该创建它， +而如果设备节点被ç¦ç”¨æˆ–è¢«å…¨éƒ¨åˆ é™¤ï¼Œå—å½±å“的设备应该被å–消注册。 + +让我们举个例å，我们有一个fooæ¿ï¼Œå®ƒçš„åŸºæœ¬æ ‘å½¢å›¾å¦‚ä¸‹:: + + ---- foo.dts --------------------------------------------------------------- + /* FOOå¹³å° */ + /dts-v1/; + / { + compatible = "corp,foo"; + + /* å…±äº«çš„èµ„æº */ + res: res { + }; + + /* 芯片上的外围设备 */ + ocp: ocp { + /* 总是被实例化的外围设备 */ + peripheral1 { ... }; + }; + }; + ---- foo.dts --------------------------------------------------------------- + +覆盖bar.dts, +:: + + ---- bar.dts - æŒ‰æ ‡ç¾è¦†ç›–ç›®æ ‡ä½ç½® ---------------------------- + /dts-v1/; + /æ’件/; + &ocp { + /* bar外围 */ + bar { + compatible = "corp,bar"; + ... /* å„ç§å±žæ€§å’Œå节点 */ + }; + }; + ---- bar.dts --------------------------------------------------------------- + +å½“åŠ è½½ï¼ˆå¹¶æŒ‰ç…§[1]ä¸æè¿°çš„æ–¹å¼è§£å†³ï¼‰æ—¶ï¼Œåº”该产生foo+bar.dts:: + + ---- foo+bar.dts ----------------------------------------------------------- + /* FOOå¹³å° + bar外围 */ + / { + compatible = "corp,foo"; + + /* å…±äº«èµ„æº */ + res: res { + }; + + /* 芯片上的外围设备 */ + ocp: ocp { + /* 总是被实例化的外围设备 */ + peripheral1 { ... }; + + /* bar外围 */ + bar { + compatible = "corp,bar"; + ... /* å„ç§å±žæ€§å’Œå节点 */ + }; + }; + }; + ---- foo+bar.dts ----------------------------------------------------------- + +作为覆盖的结果，已ç»åˆ›å»ºäº†ä¸€ä¸ªæ–°çš„设备节点（barï¼‰ï¼Œå› æ¤å°†æ³¨å†Œä¸€ä¸ªbarå¹³å°è®¾å¤‡ï¼Œ +å¦‚æžœåŠ è½½äº†åŒ¹é…的设备驱动程åºï¼Œå°†æŒ‰é¢„期创建设备。 + +如果基础DTä¸æ˜¯ç”¨-@选项编译的，那么“&ocpâ€æ ‡ç¾å°†ä¸èƒ½ç”¨äºŽå°†è¦†ç›–节点解æžåˆ°åŸºç¡€ +DTä¸çš„适当ä½ç½®ã€‚在这ç§æƒ…况下，å¯ä»¥æä¾›ç›®æ ‡è·¯å¾„ã€‚é€šè¿‡æ ‡ç¾çš„ç›®æ ‡ä½ç½®çš„è¯æ³•æ˜¯æ¯” +è¾ƒå¥½çš„ï¼Œå› ä¸ºä¸ç®¡æ ‡ç¾åœ¨DTä¸å‡ºçŽ°åœ¨å“ªé‡Œï¼Œè¦†ç›–都å¯ä»¥è¢«åº”用到任何包å«æ ‡ç¾çš„基础DT上。 + +上é¢çš„bar.dts例åè¢«ä¿®æ”¹ä¸ºä½¿ç”¨ç›®æ ‡è·¯å¾„è¯æ³•ï¼Œå³ä¸º:: + + ---- bar.dts - é€šè¿‡æ˜Žç¡®çš„è·¯å¾„è¦†ç›–ç›®æ ‡ä½ç½® -------------------- + /dts-v1/; + /æ’件/; + &{/ocp} { + /* bar外围 */ + bar { + compatible = "corp,bar"; + ... /* å„ç§å¤–围设备和å节点 */ + } + }; + ---- bar.dts --------------------------------------------------------------- + + +å†…æ ¸ä¸å…³äºŽè¦†ç›–çš„API +------------------- + +该API相当容易使用。 + +1) 调用of_overlay_fdt_apply()æ¥åˆ›å»ºå’Œåº”用一个覆盖的å˜æ›´é›†ã€‚返回值是一个 + 错误或一个识别这个覆盖的cookie。 + +2) 调用of_overlay_remove()æ¥åˆ 除和清ç†å…ˆå‰é€šè¿‡è°ƒç”¨of_overlay_fdt_apply() + 而创建的覆盖å˜æ›´é›†ã€‚ä¸å…è®¸åˆ é™¤ä¸€ä¸ªè¢«å¦ä¸€ä¸ªè¦†ç›–的覆盖å˜åŒ–集。 + +最åŽï¼Œå¦‚æžœä½ éœ€è¦ä¸€æ¬¡æ€§åˆ 除所有的覆盖，åªéœ€è°ƒç”¨of_overlay_remove_all()， +它将以æ£ç¡®çš„顺åºåˆ 除æ¯ä¸€ä¸ªè¦†ç›–。 + +ä½ å¯ä»¥é€‰æ‹©æ³¨å†Œåœ¨è¦†ç›–æ“作ä¸è¢«è°ƒç”¨çš„é€šçŸ¥å™¨ã€‚è¯¦è§ +of_overlay_notifier_register/unregisterå’Œenum of_overlay_notify_action。 + +OF_OVERLAY_PRE_APPLYã€OF_OVERLAY_POST_APPLY或OF_OVERLAY_PRE_REMOVE +的通知器回调å¯ä»¥å˜å‚¨æŒ‡å‘覆盖层ä¸çš„è®¾å¤‡æ ‘èŠ‚ç‚¹æˆ–å…¶å†…å®¹çš„æŒ‡é’ˆï¼Œä½†è¿™äº›æŒ‡é’ˆä¸èƒ½æŒ +ç»åˆ°OF_OVERLAY_POST_REMOVE的通知器回调。在OF_OVERLAY_POST_REMOVE通 +知器被调用åŽï¼ŒåŒ…å«è¦†ç›–层的内å˜å°†è¢«kfree()ed。请注æ„，å³ä½¿OF_OVERLAY_POST_REMOVE +的通知器返回错误，内å˜ä¹Ÿä¼šè¢«kfree()ed。 + +drivers/of/dynamic.cä¸çš„å˜æ›´é›†é€šçŸ¥å™¨æ˜¯ç¬¬äºŒç§ç±»åž‹çš„通知器，å¯ä»¥é€šè¿‡åº”用或移除 +覆盖层æ¥è§¦å‘。这些通知器ä¸å…许在覆盖层或其内容ä¸å˜å‚¨æŒ‡å‘è®¾å¤‡æ ‘èŠ‚ç‚¹çš„æŒ‡é’ˆã€‚å½“åŒ…å« +覆盖层的内å˜å› 移除覆盖层而被释放时，覆盖层代ç 并ä¸èƒ½é˜²æ¢è¿™ç±»æŒ‡é’ˆä»ç„¶æœ‰æ•ˆã€‚ + +任何其他ä¿ç•™æŒ‡å‘覆盖层节点或数æ®çš„指针的代ç éƒ½è¢«è®¤ä¸ºæ˜¯ä¸€ä¸ªé”™è¯¯ï¼Œå› ä¸ºåœ¨ç§»é™¤è¦†ç›–å±‚ +åŽï¼Œè¯¥æŒ‡é’ˆå°†æŒ‡å‘已释放的内å˜ã€‚ + +覆盖层的用户必须特别注æ„系统上å‘生的整体æ“作，以确ä¿å…¶ä»–å†…æ ¸ä»£ç ä¸ä¿ç•™ä»»ä½•æŒ‡å‘覆 +盖层节点或数æ®çš„æŒ‡é’ˆã€‚ä»»ä½•æ— æ„ä¸ä½¿ç”¨è¿™ç§æŒ‡é’ˆçš„例å是，如果一个驱动或å系统模å—在 +应用了覆盖åŽè¢«åŠ 载，并且该驱动或å系统扫æäº†æ•´ä¸ªè®¾å¤‡æ ‘æˆ–å…¶å¤§éƒ¨åˆ†ï¼ŒåŒ…æ‹¬è¦†ç›–èŠ‚ç‚¹ã€‚ diff --git a/Documentation/translations/zh_CN/driver-api/gpio/index.rst b/Documentation/translations/zh_CN/driver-api/gpio/index.rst new file mode 100644 index 000000000000..9ab64e94aced --- /dev/null +++ b/Documentation/translations/zh_CN/driver-api/gpio/index.rst @@ -0,0 +1,69 @@ +.. SPDX-License-Identifier: GPL-2.0 + +.. include:: ../../disclaimer-zh_CN.rst + +:Original: Documentation/driver-api/gpio/index.rst + +:翻译: + + å¸å»¶è…¾ Yanteng Si <siyanteng@loongson.cn> + +:æ ¡è¯‘: + +======================= +通用型输入/输出（GPIO） +======================= + +目录: + +.. toctree:: + :maxdepth: 2 + + legacy + +Todolist: + +* intro +* using-gpio +* driver +* consumer +* board +* drivers-on-gpio +* bt8xxgpio + +æ ¸å¿ƒ +==== + +该APIåœ¨ä»¥ä¸‹å†…æ ¸ä»£ç ä¸: + +include/linux/gpio/driver.h + +drivers/gpio/gpiolib.c + +ACPIæ”¯æŒ +======== + +该APIåœ¨ä»¥ä¸‹å†…æ ¸ä»£ç ä¸: + +drivers/gpio/gpiolib-acpi.c + +è®¾å¤‡æ ‘æ”¯æŒ +========== + +该APIåœ¨ä»¥ä¸‹å†…æ ¸ä»£ç ä¸: + +drivers/gpio/gpiolib-of.c + +设备管ç†æ”¯æŒ +============ + +该APIåœ¨ä»¥ä¸‹å†…æ ¸ä»£ç ä¸: + +drivers/gpio/gpiolib-devres.c + +sysfs帮助（函数） +================= + +该APIåœ¨ä»¥ä¸‹å†…æ ¸ä»£ç ä¸: + +drivers/gpio/gpiolib-sysfs.c diff --git a/Documentation/translations/zh_CN/gpio.txt b/Documentation/translations/zh_CN/driver-api/gpio/legacy.rst index a23ee14fc927..6399521d0548 100644 --- a/Documentation/translations/zh_CN/gpio.txt +++ b/Documentation/translations/zh_CN/driver-api/gpio/legacy.rst @@ -1,39 +1,28 @@ -Chinese translated version of Documentation/admin-guide/gpio +.. SPDX-License-Identifier: GPL-2.0 -If you have any comment or update to the content, please contact the -original document maintainer directly. However, if you have a problem -communicating in English you can also ask the Chinese maintainer for -help. Contact the Chinese maintainer if this translation is outdated -or if there is a problem with the translation. +.. include:: ../../disclaimer-zh_CN.rst -Maintainer: Grant Likely <grant.likely@secretlab.ca> - Linus Walleij <linus.walleij@linaro.org> -Chinese maintainer: Fu Wei <tekkamanninja@gmail.com> ---------------------------------------------------------------------- -Documentation/admin-guide/gpio çš„ä¸æ–‡ç¿»è¯‘ +:Original: Documentation/driver-api/gpio/legacy.rst -如果想评论或更新本文的内容，请直接è”ç³»åŽŸæ–‡æ¡£çš„ç»´æŠ¤è€…ã€‚å¦‚æžœä½ ä½¿ç”¨è‹±æ–‡ -交æµæœ‰å›°éš¾çš„è¯ï¼Œä¹Ÿå¯ä»¥å‘ä¸æ–‡ç‰ˆç»´æŠ¤è€…求助。如果本翻译更新ä¸åŠæ—¶æˆ–者翻 -译å˜åœ¨é—®é¢˜ï¼Œè¯·è”ç³»ä¸æ–‡ç‰ˆç»´æŠ¤è€…。 -英文版维护者： Grant Likely <grant.likely@secretlab.ca> - Linus Walleij <linus.walleij@linaro.org> -ä¸æ–‡ç‰ˆç»´æŠ¤è€…： å‚…ç‚œ Fu Wei <tekkamanninja@gmail.com> -ä¸æ–‡ç‰ˆç¿»è¯‘者： å‚…ç‚œ Fu Wei <tekkamanninja@gmail.com> -ä¸æ–‡ç‰ˆæ ¡è¯‘者： å‚…ç‚œ Fu Wei <tekkamanninja@gmail.com> +:翻译: + å‚…ç‚œ Fu Wei <tekkamanninja@gmail.com> + å¸å»¶è…¾ Yanteng Si <siyanteng@loongson.cn> -以下为æ£æ–‡ ---------------------------------------------------------------------- -GPIO æŽ¥å£ +:æ ¡è¯‘: -本文档æ供了一个在Linux下访问GPIO的公约概述。 + +ä¼ ç»ŸGPIOæŽ¥å£ +============ + +本文档概述了Linux下的GPIO访问公约。 这些函数以 gpio_* 作为å‰ç¼€ã€‚其他的函数ä¸å…è®¸ä½¿ç”¨è¿™æ ·çš„å‰ç¼€æˆ–相关的 __gpio_* å‰ç¼€ã€‚ -什么是GPIO? -========== +什么是GPIO？ +============ "通用输入/输出å£"(GPIO)是一个çµæ´»çš„由软件控制的数å—ä¿¡å·ã€‚ä»–ä»¬å¯ ç”±å¤šç§èŠ¯ç‰‡æä¾›,且对于从事嵌入å¼å’Œå®šåˆ¶ç¡¬ä»¶çš„ Linux å¼€å‘者æ¥è¯´æ˜¯ 比较熟悉。æ¯ä¸ªGPIO 都代表一个连接到特定引脚或çƒæ …阵列(BGA)å°è£…ä¸ @@ -99,6 +88,7 @@ GPIO 公约 æ ‡è¯† GPIO --------- + GPIO æ˜¯é€šè¿‡æ— ç¬¦å·æ•´åž‹æ¥æ ‡è¯†çš„,范围是 0 到 MAX_INT。ä¿ç•™â€œè´Ÿâ€æ•° 用于其他目的,ä¾‹å¦‚æ ‡è¯†ä¿¡å·â€œåœ¨è¿™ä¸ªæ¿å上ä¸å¯ç”¨â€æˆ–指示错误。未接触底层 硬件的代ç 会忽略这些整数。 @@ -115,7 +105,7 @@ FPGA 的特定æ¿å上使用 80-95。编å·ä¸ä¸€å®šè¦è¿žç»,那些平å°ä¸ï¼ å¦‚æžœä½ è¦åˆå§‹åŒ–ä¸€ä¸ªå¸¦æœ‰æ— æ•ˆ GPIO ç¼–å·çš„结构体,å¯ä»¥ä½¿ç”¨ä¸€äº›è´Ÿç¼–ç (如"-EINVAL")，那将使其永远ä¸ä¼šæ˜¯æœ‰æ•ˆã€‚æ¥æµ‹è¯•è¿™æ ·ä¸€ä¸ªç»“构体ä¸çš„ç¼–å· -是å¦å…³è”一个 GPIOï¼Œä½ å¯ä½¿ç”¨ä»¥ä¸‹æ–言: +是å¦å…³è”一个 GPIOï¼Œä½ å¯ä½¿ç”¨ä»¥ä¸‹æ–言:: int gpio_is_valid(int number); @@ -128,11 +118,12 @@ FPGA 的特定æ¿å上使用 80-95。编å·ä¸ä¸€å®šè¦è¿žç»,那些平å°ä¸ï¼ 使用 GPIO --------- + 对于一个 GPIO，系统应该åšçš„第一件事情就是通过 gpio_request() 函数分é…它，è§ä¸‹æ–‡ã€‚ 接下æ¥æ˜¯è®¾ç½®I/Oæ–¹å‘，这通常是在æ¿çº§å¯åŠ¨ä»£ç ä¸ä¸ºæ‰€ä½¿ç”¨çš„ GPIO 设置 -platform_device 时完æˆã€‚ +platform_device 时完æˆ:: /* 设置为输入或输出, 返回 0 或负的错误代ç */ int gpio_direction_input(unsigned gpio); @@ -157,12 +148,13 @@ get/set(获å–/设置)函数调用没法返回错误,且有å¯èƒ½æ˜¯é…置错误 访问自旋é”安全的 GPIO -------------------- +--------------------- + 大多数 GPIO 控制器å¯ä»¥é€šè¿‡å†…å˜è¯»/写指令æ¥è®¿é—®ã€‚这些指令ä¸ä¼šä¼‘çœ ,å¯ä»¥ 安全地在硬(éžçº¿ç¨‹)ä¸æ–例程和类似的上下文ä¸å®Œæˆã€‚ 对于那些用 gpio_cansleep()测试总是返回失败的 GPIO(è§ä¸‹æ–‡)，使用 -以下的函数访问: +以下的函数访问:: /* GPIO 输入:返回零或éžé›¶ */ int gpio_get_value(unsigned gpio); @@ -188,17 +180,18 @@ GPIO值是布尔值，零表示低电平，éžé›¶è¡¨ç¤ºé«˜ç”µå¹³ã€‚当读å–一ä 访问å¯èƒ½ä¼‘çœ çš„ GPIO ------------------ +------------------- + æŸäº› GPIO 控制器必须通过基于总线(如 I2C 或 SPI)的消æ¯è®¿é—®ã€‚读或写这些 GPIO 值的命令需è¦ç‰å¾…其信æ¯æŽ’到队首æ‰å‘é€å‘½ä»¤ï¼Œå†èŽ·å¾—å…¶åé¦ˆã€‚æœŸé—´éœ€è¦ ä¼‘çœ ï¼Œè¿™ä¸èƒ½åœ¨ IRQ 例程(ä¸æ–上下文)ä¸æ‰§è¡Œã€‚ 支æŒæ¤ç±» GPIO çš„å¹³å°é€šè¿‡ä»¥ä¸‹å‡½æ•°è¿”回éžé›¶å€¼æ¥åŒºåˆ†å‡ºè¿™ç§ GPIO。(æ¤å‡½æ•°éœ€è¦ -一个之å‰é€šè¿‡ gpio_request 分é…到的有效 GPIO ç¼–å·): +一个之å‰é€šè¿‡ gpio_request 分é…到的有效 GPIO ç¼–å·):: int gpio_cansleep(unsigned gpio); -ä¸ºäº†è®¿é—®è¿™ç§ GPIO,å†…æ ¸å®šä¹‰äº†ä¸€å¥—ä¸åŒçš„函数: +ä¸ºäº†è®¿é—®è¿™ç§ GPIO,å†…æ ¸å®šä¹‰äº†ä¸€å¥—ä¸åŒçš„函数:: /* GPIO 输入:返回零或éžé›¶ ,å¯èƒ½ä¼šä¼‘çœ */ int gpio_get_value_cansleep(unsigned gpio); @@ -214,25 +207,26 @@ GPIO 值的命令需è¦ç‰å¾…其信æ¯æŽ’到队首æ‰å‘é€å‘½ä»¤ï¼Œå†èŽ·å¾—å…¶ 事实，这些处ç†ä¾‹ç¨‹å®žé™…上和自旋é”å®‰å…¨çš„å‡½æ•°æ˜¯ä¸€æ ·çš„ã€‚ ** 除æ¤ä¹‹å¤– ** 调用设置和é…ç½®æ¤ç±» GPIO 的函数也必须在å…è®¸ä¼‘çœ çš„ä¸Šä¸‹æ–‡ä¸ï¼Œ -å› ä¸ºå®ƒä»¬å¯èƒ½ä¹Ÿéœ€è¦è®¿é—® GPIO 控制器芯片: (这些设置函数通常在æ¿çº§å¯åŠ¨ä»£ç 或者 -驱动探测/æ–开代ç ä¸ï¼Œæ‰€ä»¥è¿™æ˜¯ä¸€ä¸ªå®¹æ˜“满足的约æŸæ¡ä»¶ã€‚) +å› ä¸ºå®ƒä»¬å¯èƒ½ä¹Ÿéœ€è¦è®¿é—® GPIO 控制器芯片 (这些设置函数通常在æ¿çº§å¯åŠ¨ä»£ç 或者 +驱动探测/æ–开代ç ä¸ï¼Œæ‰€ä»¥è¿™æ˜¯ä¸€ä¸ªå®¹æ˜“满足的约æŸæ¡ä»¶ã€‚) :: - gpio_direction_input() - gpio_direction_output() - gpio_request() + gpio_direction_input() + gpio_direction_output() + gpio_request() -## gpio_request_one() -## gpio_request_array() -## gpio_free_array() + ## gpio_request_one() + ## gpio_request_array() + ## gpio_free_array() - gpio_free() - gpio_set_debounce() + gpio_free() + gpio_set_debounce() 声明和释放 GPIO ----------------------------- -为了有助于æ•èŽ·ç³»ç»Ÿé…置错误,定义了两个函数。 +---------------- + +为了有助于æ•èŽ·ç³»ç»Ÿé…置错误,定义了两个函数:: /* 申请 GPIO, 返回 0 或负的错误代ç . * éžç©ºæ ‡ç¾å¯èƒ½æœ‰åŠ©äºŽè¯Šæ–. @@ -256,9 +250,9 @@ GPIO 值的命令需è¦ç‰å¾…其信æ¯æŽ’到队首æ‰å‘é€å‘½ä»¤ï¼Œå†èŽ·å¾—å…¶ æŸäº›å¹³å°å¯èƒ½ä¹Ÿä½¿ç”¨ GPIO 作为电æºç®¡ç†æ¿€æ´»ä¿¡å·(例如通过关é—未使用芯片区和 简å•åœ°å…³é—未使用时钟)。 -对于 GPIO 使用 pinctrl å系统已知的引脚，å系统应该被告知其使用情况； +对于 GPIO 使用引脚控制å系统已知的引脚，å系统应该被告知其使用情况； 一个 gpiolib 驱动的 .request()æ“作应调用 pinctrl_gpio_request()， -而 gpiolib 驱动的 .free()æ“作应调用 pinctrl_gpio_free()。pinctrl +而 gpiolib 驱动的 .free()æ“作应调用 pinctrl_gpio_free()。引脚控制 å系统å…许 pinctrl_gpio_request()在æŸä¸ªå¼•è„šæˆ–引脚组以å¤ç”¨å½¢å¼â€œå±žäºŽâ€ 一个设备时都æˆåŠŸè¿”回。 @@ -270,7 +264,7 @@ GPIO 值的命令需è¦ç‰å¾…其信æ¯æŽ’到队首æ‰å‘é€å‘½ä»¤ï¼Œå†èŽ·å¾—å…¶ æŸäº›å¹³å°å…许部分或所有 GPIO ä¿¡å·ä½¿ç”¨ä¸åŒçš„引脚。类似的，GPIO 或引脚的 其他方é¢ä¹Ÿéœ€è¦é…置，如上拉/下拉。平å°è½¯ä»¶åº”该在对这些 GPIO 调用 -gpio_request()å‰å°†è¿™ç±»ç»†èŠ‚é…置好，例如使用 pinctrl åç³»ç»Ÿçš„æ˜ å°„è¡¨ï¼Œ +gpio_request()å‰å°†è¿™ç±»ç»†èŠ‚é…置好，例如使用引脚控制åç³»ç»Ÿçš„æ˜ å°„è¡¨ï¼Œ 使得 GPIO çš„ç”¨æˆ·æ— é¡»å…³æ³¨è¿™äº›ç»†èŠ‚ã€‚ 还有一个值得注æ„的是在释放 GPIO å‰ï¼Œä½ å¿…é¡»åœæ¢ä½¿ç”¨å®ƒã€‚ @@ -278,7 +272,7 @@ gpio_request()å‰å°†è¿™ç±»ç»†èŠ‚é…置好，例如使用 pinctrl åç³»ç»Ÿçš„æ˜ æ³¨æ„:申请一个 GPIO 并没有以任何方å¼é…置它，åªä¸è¿‡æ ‡è¯†é‚£ä¸ª GPIO 处于使用 状æ€ã€‚必须有å¦å¤–的代ç æ¥å¤„ç†å¼•è„šé…ç½®(如控制 GPIO 使用的引脚ã€ä¸Šæ‹‰/下拉)。 -考虑到大多数情况下声明 GPIO 之åŽå°±ä¼šç«‹å³é…置它们,所以定义了以下三个辅助函数: +考虑到大多数情况下声明 GPIO 之åŽå°±ä¼šç«‹å³é…置它们,所以定义了以下三个辅助函数:: /* 申请一个 GPIO ä¿¡å·, åŒæ—¶é€šè¿‡ç‰¹å®šçš„'flags'åˆå§‹åŒ–é…ç½®, * 其他和 gpio_request()çš„å‚æ•°å’Œè¿”å›žå€¼ç›¸åŒ @@ -326,7 +320,7 @@ gpio_request()å‰å°†è¿™ç±»ç»†èŠ‚é…置好，例如使用 pinctrl åç³»ç»Ÿçš„æ˜ å°†æ¥è¿™äº›æ ‡å¿—å¯èƒ½æ‰©å±•åˆ°æ”¯æŒæ›´å¤šçš„属性。 更进一æ¥,为了更简å•åœ°å£°æ˜Ž/释放多个 GPIO,'struct gpio'被引进æ¥å°è£…所有 -这三个领域: +这三个领域:: struct gpio { unsigned gpio; @@ -334,7 +328,7 @@ gpio_request()å‰å°†è¿™ç±»ç»†èŠ‚é…置好，例如使用 pinctrl åç³»ç»Ÿçš„æ˜ const char *label; }; -一个典型的用例: +一个典型的用例:: static struct gpio leds_gpios[] = { { 32, GPIOF_OUT_INIT_HIGH, "Power LED" }, /* é»˜è®¤å¼€å¯ */ @@ -356,9 +350,10 @@ gpio_request()å‰å°†è¿™ç±»ç»†èŠ‚é…置好，例如使用 pinctrl åç³»ç»Ÿçš„æ˜ GPIO æ˜ å°„åˆ° IRQ --------------------- +---------------- + GPIO ç¼–å·æ˜¯æ— 符å·æ•´æ•°;IRQ ç¼–å·ä¹Ÿæ˜¯ã€‚这些构æˆäº†ä¸¤ä¸ªé€»è¾‘上ä¸åŒçš„命å空间 -(GPIO 0 ä¸ä¸€å®šä½¿ç”¨ IRQ 0)ã€‚ä½ å¯ä»¥é€šè¿‡ä»¥ä¸‹å‡½æ•°åœ¨å®ƒä»¬ä¹‹é—´å®žçŽ°æ˜ å°„: +(GPIO 0 ä¸ä¸€å®šä½¿ç”¨ IRQ 0)ã€‚ä½ å¯ä»¥é€šè¿‡ä»¥ä¸‹å‡½æ•°åœ¨å®ƒä»¬ä¹‹é—´å®žçŽ°æ˜ å°„:: /* æ˜ å°„ GPIO ç¼–å·åˆ° IRQ ç¼–å· */ int gpio_to_irq(unsigned gpio); @@ -384,7 +379,8 @@ irq_to_gpio()返回的éžé”™è¯¯å€¼å¤§å¤šæ•°é€šå¸¸å¯ä»¥è¢« gpio_get_value()æ‰€ä½ æ¨¡æ‹Ÿå¼€æ¼ä¿¡å· ----------------------------- +------------ + 有时在åªæœ‰ä½Žç”µå¹³ä¿¡å·ä½œä¸ºå®žé™…驱动结果(译者注:多个输出连接于一点，逻辑电平 结果为所有输出的逻辑与)的时候,共享的信å·çº¿éœ€è¦ä½¿ç”¨â€œå¼€æ¼â€ä¿¡å·ã€‚(è¯¥æœ¯è¯ é€‚ç”¨äºŽ CMOS 管；而 TTL 用“集电æžå¼€è·¯â€ã€‚)一个上拉电阻使信å·ä¸ºé«˜ç”µå¹³ã€‚è¿™ @@ -408,9 +404,44 @@ irq_to_gpio()返回的éžé”™è¯¯å€¼å¤§å¤šæ•°é€šå¸¸å¯ä»¥è¢« gpio_get_value()æ‰€ä½ è¿™ä¸ä¸€å®šæ˜¯é”™è¯¯çš„。一个常è§çš„例å就是 I2C 时钟的延长：一个需è¦è¾ƒæ…¢æ—¶é’Ÿçš„ 从设备延迟 SCK 的上å‡æ²¿ï¼Œè€Œ I2C 主设备相应地调整其信å·ä¼ 输速率。 +GPIO控制器和引脚控制å系统 +-------------------------- + +SOC上的GPIO控制器å¯èƒ½ä¸Žå¼•è„šæŽ§åˆ¶å系统紧密结åˆï¼Œå³å¼•è„šå¯ä»¥ä¸Žå¯é€‰çš„gpio功 +能一起被其他功能使用。我们已ç»æ¶µç›–äº†è¿™æ ·çš„æƒ…å†µï¼Œä¾‹å¦‚ä¸€ä¸ªGPIO控制器需è¦ä¿ +留一个引脚或通过调用以下任何一个引脚æ¥è®¾ç½®å…¶æ–¹å‘:: + + pinctrl_gpio_request() + pinctrl_gpio_free() + pinctrl_gpio_direction_input() + pinctrl_gpio_direction_output() + +但是，引脚控制å系统是如何将GPIOå·ç （这是一个全局事项）与æŸä¸ªå¼•è„šæŽ§åˆ¶å™¨ +上的æŸä¸ªå¼•è„šäº¤å‰å…³è”的？ + +这是通过注册引脚的“范围â€æ¥å®žçŽ°çš„，这基本上是交å‰å‚考表。这些æ述是在 +Documentation/driver-api/pin-control.rst + +虽然引脚分é…完全由引脚控制å系统管ç†ï¼Œä½†gpio（在gpiolib下）ä»ç”±gpio驱动 +维护。å¯èƒ½å‘生的情况是，SoCä¸çš„ä¸åŒå¼•è„šèŒƒå›´ç”±ä¸åŒçš„gpio驱动器管ç†ã€‚ + +这使得在调用 "pinctrl_gpio_request" 之å‰ï¼Œè®©gpio驱动å‘pin ctrlåç³» +统宣布它们的引脚范围是åˆç†çš„，以便在使用任何gpio之å‰è¦æ±‚引脚控制å系统准 +备相应的引脚。 + +为æ¤ï¼Œgpio控制器å¯ä»¥ç”¨å¼•è„šæŽ§åˆ¶å系统注册其引脚范围。目å‰æœ‰ä¸¤ç§æ–¹æ³•ï¼šæœ‰æˆ– +æ— DT。 + +关于对DT的支æŒï¼Œè¯·å‚考 Documentation/devicetree/bindings/gpio/gpio.txt. + +对于éžDT支æŒï¼Œç”¨æˆ·å¯ä»¥ç”¨é€‚当的å‚数调用gpiochip_add_pin_range()，将一 +系列的gpio引脚注册到引脚控制驱动上。为æ¤ï¼Œå¿…须将引脚控制设备的å称å—符串 +作为å‚æ•°ä¹‹ä¸€ä¼ ç»™è¿™ä¸ªç¨‹åºã€‚ + + +这些公约忽略了什么？ +==================== -这些公约忽略了什么? -================ 这些公约忽略的最大一件事就是引脚å¤ç”¨ï¼Œå› 为这属于高度芯片特定的属性且 没有å¯ç§»æ¤æ€§ã€‚æŸä¸ªå¹³å°å¯èƒ½ä¸éœ€è¦æ˜Žç¡®çš„å¤ç”¨ä¿¡æ¯ï¼›æœ‰çš„对于任æ„给定的引脚 å¯èƒ½åªæœ‰ä¸¤ä¸ªåŠŸèƒ½é€‰é¡¹ï¼›æœ‰çš„å¯èƒ½æ¯ä¸ªå¼•è„šæœ‰å…«ä¸ªåŠŸèƒ½é€‰é¡¹ï¼›æœ‰çš„å¯èƒ½å¯ä»¥å°† @@ -433,8 +464,9 @@ Linux 的系统。) 当å‰ï¼ŒåŠ¨æ€å®šä¹‰ GPIO 并ä¸æ˜¯æ ‡å‡†çš„，例如作为é…置一个带有æŸäº› GPIO 扩展器的 é™„åŠ ç”µè·¯æ¿çš„副作用。 -GPIO 实现者的框架 (å¯é€‰) -===================== +GPIO 实现者的框架（å¯é€‰ï¼‰ +========================= + å‰é¢æ到了，有一个å¯é€‰çš„实现框架，让平å°ä½¿ç”¨ç›¸åŒçš„编程接å£ï¼Œæ›´åŠ 简å•åœ°æ”¯æŒ ä¸åŒç§ç±»çš„ GPIO 控制器。这个框架称为"gpiolib"。 @@ -444,15 +476,16 @@ GPIO 实现者的框架 (å¯é€‰) 控制器驱动: gpio_chip -------------------- +--------------------- + 在框架ä¸æ¯ä¸ª GPIO 控制器都包装为一个 "struct gpio_chip"，他包å«äº† 该类型的æ¯ä¸ªæŽ§åˆ¶å™¨çš„常用信æ¯: - - 设置 GPIO æ–¹å‘的方法 - - 用于访问 GPIO 值的方法 - - 告知调用其方法是å¦å¯èƒ½ä¼‘çœ çš„æ ‡å¿— - - å¯é€‰çš„ debugfs ä¿¡æ¯å¯¼å‡ºæ–¹æ³• (显示类似上拉é…ç½®ä¸€æ ·çš„é¢å¤–状æ€) - - 诊æ–æ ‡ç¾ + - 设置 GPIO æ–¹å‘的方法 + - 用于访问 GPIO 值的方法 + - 告知调用其方法是å¦å¯èƒ½ä¼‘çœ çš„æ ‡å¿— + - å¯é€‰çš„ debugfs ä¿¡æ¯å¯¼å‡ºæ–¹æ³• (显示类似上拉é…ç½®ä¸€æ ·çš„é¢å¤–状æ€) + - 诊æ–æ ‡ç¾ ä¹ŸåŒ…å«äº†æ¥è‡ª device.platform_data çš„æ¯ä¸ªå®žä¾‹çš„æ•°æ®ï¼šå®ƒç¬¬ä¸€ä¸ª GPIO çš„ ç¼–å·å’Œå®ƒå¯ç”¨çš„ GPIO çš„æ•°é‡ã€‚ @@ -471,7 +504,8 @@ GPIO 实现者的框架 (å¯é€‰) å¹³å°æ”¯æŒ -------- +-------- + 为了支æŒè¿™ä¸ªæ¡†æž¶ï¼Œä¸€ä¸ªå¹³å°çš„ Kconfig 文件将会 "select"(选择) ARCH_REQUIRE_GPIOLIB 或 ARCH_WANT_OPTIONAL_GPIOLIB，并让它的 <asm/gpio.h> åŒ…å« <asm-generic/gpio.h>，åŒæ—¶å®šä¹‰ä¸‰ä¸ªæ–¹æ³•: @@ -489,7 +523,7 @@ ARCH_WANT_OPTIONAL_GPIOLIB æ„å‘³ç€ gpiolib æ ¸å¿ƒé»˜è®¤å…³é—,且用户å¯ä»¥ 如果这些选项都没被选择,该平å°å°±ä¸é€šè¿‡ GPIO-lib æ”¯æŒ GPIO,且代ç ä¸å¯ä»¥ 被用户使能。 -以下这些方法的实现å¯ä»¥ç›´æŽ¥ä½¿ç”¨æ¡†æž¶ä»£ç ,并总是通过 gpio_chip 调度: +以下这些方法的实现å¯ä»¥ç›´æŽ¥ä½¿ç”¨æ¡†æž¶ä»£ç ,并总是通过 gpio_chip 调度:: #define gpio_get_value __gpio_get_value #define gpio_set_value __gpio_set_value @@ -508,7 +542,8 @@ arch_initcall()或者更早的地方集æˆè¿›å¹³å°åˆå§‹åŒ–代ç ，使这些 G 且他们通常å¯ä»¥ä½œä¸º IRQ 使用。 æ¿çº§æ”¯æŒ -------- +-------- + 对于外部 GPIO 控制器(例如 I2C 或 SPI 扩展器ã€ä¸“用芯片ã€å¤šåŠŸèƒ½å™¨ä»¶ã€FPGA 或 CPLD)，大多数常用æ¿çº§ç‰¹å®šä»£ç 都å¯ä»¥æ³¨å†ŒæŽ§åˆ¶å™¨è®¾å¤‡ï¼Œå¹¶ä¿è¯ä»–ä»¬çš„é©±åŠ¨çŸ¥é“ gpiochip_add()所使用的 GPIO ç¼–å·ã€‚他们的起始编å·é€šå¸¸è·Ÿåœ¨å¹³å°ç‰¹å®šçš„ GPIO @@ -526,8 +561,9 @@ GPIO å¯ä»¥å·¥ä½œä¹‹åŽæ‰å¯è¢«æ³¨å†Œã€‚解决这类ä¾èµ–的的一ç§æ–¹æ³•æ˜¯ 设备å˜æˆæ— 效时移除它们。 -用户空间的 Sysfs 接å£(å¯é€‰) -======================== +用户空间的 Sysfs 接å£ï¼ˆå¯é€‰ï¼‰ +============================= + 使用“gpiolibâ€å®žçŽ°æ¡†æž¶çš„å¹³å°å¯ä»¥é€‰æ‹©é…置一个 GPIO çš„ sysfs 用户接å£ã€‚ è¿™ä¸åŒäºŽ debugfs 接å£ï¼Œå› 为它æ供的是对 GPIOæ–¹å‘和值的控制，而ä¸åªæ˜¾ç¤º 一个GPIO 的状æ€æ‘˜è¦ã€‚æ¤å¤–,它å¯ä»¥å‡ºçŽ°åœ¨æ²¡æœ‰è°ƒè¯•æ”¯æŒçš„产å“级系统ä¸ã€‚ @@ -548,6 +584,7 @@ GPIO å¯ä»¥å·¥ä½œä¹‹åŽæ‰å¯è¢«æ³¨å†Œã€‚解决这类ä¾èµ–的的一ç§æ–¹æ³•æ˜¯ Sysfs ä¸çš„路径 -------------- + 在/sys/class/gpio ä¸æœ‰ 3 类入å£: - 用于在用户空间控制 GPIO 的控制接å£; @@ -625,8 +662,9 @@ GPIO 控制器的路径类似 /sys/class/gpio/gpiochip42/ (对于从#42 GPIO ä»Žå†…æ ¸ä»£ç ä¸å¯¼å‡º -------------- -å†…æ ¸ä»£ç å¯ä»¥æ˜Žç¡®åœ°ç®¡ç†é‚£äº›å·²é€šè¿‡ gpio_request()申请的 GPIO 的导出: +---------------- + +å†…æ ¸ä»£ç å¯ä»¥æ˜Žç¡®åœ°ç®¡ç†é‚£äº›å·²é€šè¿‡ gpio_request()申请的 GPIO 的导出:: /* 导出 GPIO 到用户空间 */ int gpio_export(unsigned gpio, bool direction_may_change); @@ -648,3 +686,9 @@ GPIO 控制器的路径类似 /sys/class/gpio/gpiochip42/ (对于从#42 GPIO 在 GPIO 被导出之åŽï¼Œgpio_export_link()å…许在 sysfs 文件系统的任何地方 创建一个到这个 GPIO sysfs 节点的符å·é“¾æŽ¥ã€‚è¿™æ ·é©±åŠ¨å°±å¯ä»¥é€šè¿‡ä¸€ä¸ªæ述性的 åå—，在 sysfs ä¸ä»–们所拥有的设备下æ供一个(到这个 GPIO sysfs 节点的)接å£ã€‚ + + +APIå‚考 +======= + +本节ä¸åˆ—出的函数已被废弃。在新的代ç ä¸åº”该使用基于GPIOæ述符的API。 diff --git a/Documentation/translations/zh_CN/driver-api/index.rst b/Documentation/translations/zh_CN/driver-api/index.rst new file mode 100644 index 000000000000..ba354e1f4e6d --- /dev/null +++ b/Documentation/translations/zh_CN/driver-api/index.rst @@ -0,0 +1,132 @@ +.. SPDX-License-Identifier: GPL-2.0 + +.. include:: ../disclaimer-zh_CN.rst + +:Original: Documentation/driver-api/index.rst + +:翻译: + + å¸å»¶è…¾ Yanteng Si <siyanteng@loongson.cn> + +:æ ¡è¯‘: + +======================== +Linux驱动实现者的APIæŒ‡å— +======================== + +å†…æ ¸æ供了å„ç§å„æ ·çš„æŽ¥å£æ¥æ”¯æŒè®¾å¤‡é©±åŠ¨çš„å¼€å‘。这份文档åªæ˜¯å¯¹å…¶ä¸ä¸€äº›æŽ¥å£è¿›è¡Œäº† +一定程度的整ç†â€”—希望éšç€æ—¶é—´çš„推移，它能å˜å¾—更好ï¼å¯ç”¨çš„å°èŠ‚å¯ä»¥åœ¨ä¸‹é¢çœ‹åˆ°ã€‚ + +.. class:: toc-title + + 目录列表： + +.. toctree:: + :maxdepth: 2 + + gpio/index + io_ordering + +Todolist: + +* driver-model/index +* basics +* infrastructure +* ioctl +* early-userspace/index +* pm/index +* clk +* device-io +* dma-buf +* device_link +* component +* message-based +* infiniband +* aperture +* frame-buffer +* regulator +* reset +* iio/index +* input +* usb/index +* firewire +* pci/index +* cxl/index +* spi +* i2c +* ipmb +* ipmi +* i3c/index +* interconnect +* devfreq +* hsi +* edac +* scsi +* libata +* target +* mailbox +* mtdnand +* miscellaneous +* mei/index +* mtd/index +* mmc/index +* nvdimm/index +* w1 +* rapidio/index +* s390-drivers +* vme +* 80211/index +* uio-howto +* firmware/index +* pin-control +* md/index +* media/index +* misc_devices +* nfc/index +* dmaengine/index +* slimbus +* soundwire/index +* thermal/index +* fpga/index +* acpi/index +* auxiliary_bus +* backlight/lp855x-driver.rst +* connector +* console +* dcdbas +* eisa +* isa +* isapnp +* io-mapping +* generic-counter +* memory-devices/index +* men-chameleon-bus +* ntb +* nvmem +* parport-lowlevel +* pps +* ptp +* phy/index +* pwm +* pldmfw/index +* rfkill +* serial/index +* sm501 +* surface_aggregator/index +* switchtec +* sync_file +* tty/index +* vfio-mediated-device +* vfio +* vfio-pci-device-specific-driver-acceptance +* xilinx/index +* xillybus +* zorro +* hte/index + +.. only:: subproject and html + + Indices + ======= + + * :ref:`genindex` diff --git a/Documentation/translations/zh_CN/driver-api/io_ordering.rst b/Documentation/translations/zh_CN/driver-api/io_ordering.rst new file mode 100644 index 000000000000..4dbfa4ce92a0 --- /dev/null +++ b/Documentation/translations/zh_CN/driver-api/io_ordering.rst @@ -0,0 +1,60 @@ +.. SPDX-License-Identifier: GPL-2.0 + +.. include:: ../disclaimer-zh_CN.rst + +:Original: Documentation/driver-api/io_ordering.rst + +:翻译: + + æž—æ°¸å¬ Lin Yongting <linyongting@gmail.com> + å¸å»¶è…¾ Yanteng Si <siyanteng@loongson.cn> + +:æ ¡è¯‘: + +=========================== +对内å˜æ˜ 射地å€çš„I/Oå†™å…¥æŽ’åº +=========================== + +在æŸäº›å¹³å°ä¸Šï¼Œæ‰€è°“的内å˜æ˜ å°„I/O是弱顺åºã€‚在这些平å°ä¸Šï¼Œé©±åŠ¨å¼€å‘者有责任 +ä¿è¯I/O内å˜æ˜ 射地å€çš„写æ“作按程åºå›¾æ„的顺åºè¾¾åˆ°è®¾å¤‡ã€‚通常读å–一个“安全†+设备寄å˜å™¨æˆ–桥寄å˜å™¨ï¼Œè§¦å‘IO芯片清刷未处ç†çš„写æ“作到达设备åŽæ‰å¤„ç†è¯»æ“作， +而达到ä¿è¯ç›®çš„。驱动程åºé€šå¸¸åœ¨spinlockä¿æŠ¤çš„临界区退出之å‰ä½¿ç”¨è¿™ç§æŠ€æœ¯ã€‚ +这也å¯ä»¥ä¿è¯åŽé¢çš„写æ“作åªåœ¨å‰é¢çš„写æ“作之åŽåˆ°è¾¾è®¾å¤‡ï¼ˆè¿™éžå¸¸ç±»ä¼¼äºŽå†…å˜ +å±éšœæ“作，mb()，ä¸è¿‡ä»…适用于I/O）。 + +å‡è®¾ä¸€ä¸ªè®¾å¤‡é©±åŠ¨ç¨‹çš„具体例å:: + + ... + CPU A: spin_lock_irqsave(&dev_lock, flags) + CPU A: val = readl(my_status); + CPU A: ... + CPU A: writel(newval, ring_ptr); + CPU A: spin_unlock_irqrestore(&dev_lock, flags) + ... + CPU B: spin_lock_irqsave(&dev_lock, flags) + CPU B: val = readl(my_status); + CPU B: ... + CPU B: writel(newval2, ring_ptr); + CPU B: spin_unlock_irqrestore(&dev_lock, flags) + ... + +上述例åä¸ï¼Œè®¾å¤‡å¯èƒ½ä¼šå…ˆæŽ¥æ”¶åˆ°newval2的值，然åŽæŽ¥æ”¶åˆ°newval的值，问题就 +å‘生了。ä¸è¿‡å¾ˆå®¹æ˜“通过下é¢æ–¹æ³•æ¥ä¿®å¤:: + + ... + CPU A: spin_lock_irqsave(&dev_lock, flags) + CPU A: val = readl(my_status); + CPU A: ... + CPU A: writel(newval, ring_ptr); + CPU A: (void)readl(safe_register); /* é…置寄å˜å™¨ï¼Ÿ*/ + CPU A: spin_unlock_irqrestore(&dev_lock, flags) + ... + CPU B: spin_lock_irqsave(&dev_lock, flags) + CPU B: val = readl(my_status); + CPU B: ... + CPU B: writel(newval2, ring_ptr); + CPU B: (void)readl(safe_register); /* é…置寄å˜å™¨ï¼Ÿ*/ + CPU B: spin_unlock_irqrestore(&dev_lock, flags) + +在解决方案ä¸ï¼Œè¯»å–safe_register寄å˜å™¨ï¼Œè§¦å‘IO芯片清刷未处ç†çš„写æ“作， +å†å¤„ç†åŽé¢çš„读æ“作，防æ¢å¼•å‘æ•°æ®ä¸ä¸€è‡´é—®é¢˜ã€‚ diff --git a/Documentation/translations/zh_CN/index.rst b/Documentation/translations/zh_CN/index.rst index bf85baca8b3e..2fc60e60feb4 100644 --- a/Documentation/translations/zh_CN/index.rst +++ b/Documentation/translations/zh_CN/index.rst @@ -108,6 +108,7 @@ TODOList: :maxdepth: 2 core-api/index + driver-api/index locking/index accounting/index cpu-freq/index @@ -120,10 +121,10 @@ TODOList: scheduler/index mm/index peci/index + PCI/index TODOList: -* driver-api/index * block/index * cdrom/index * ide/index @@ -148,7 +149,6 @@ TODOList: * crypto/index * bpf/index * usb/index -* PCI/index * scsi/index * misc-devices/index * mhi/index diff --git a/Documentation/translations/zh_CN/io_ordering.txt b/Documentation/translations/zh_CN/io_ordering.txt deleted file mode 100644 index 7bb3086227ae..000000000000 --- a/Documentation/translations/zh_CN/io_ordering.txt +++ /dev/null @@ -1,67 +0,0 @@ -Chinese translated version of Documentation/driver-api/io_ordering.rst - -If you have any comment or update to the content, please contact the -original document maintainer directly. However, if you have a problem -communicating in English you can also ask the Chinese maintainer for -help. Contact the Chinese maintainer if this translation is outdated -or if there is a problem with the translation. - -Chinese maintainer: Lin Yongting <linyongting@gmail.com> ---------------------------------------------------------------------- -Documentation/driver-api/io_ordering.rst çš„ä¸æ–‡ç¿»è¯‘ - -如果想评论或更新本文的内容，请直接è”ç³»åŽŸæ–‡æ¡£çš„ç»´æŠ¤è€…ã€‚å¦‚æžœä½ ä½¿ç”¨è‹±æ–‡ -交æµæœ‰å›°éš¾çš„è¯ï¼Œä¹Ÿå¯ä»¥å‘ä¸æ–‡ç‰ˆç»´æŠ¤è€…求助。如果本翻译更新ä¸åŠæ—¶æˆ–者翻 -译å˜åœ¨é—®é¢˜ï¼Œè¯·è”ç³»ä¸æ–‡ç‰ˆç»´æŠ¤è€…。 - -ä¸æ–‡ç‰ˆç»´æŠ¤è€…： æž—æ°¸å¬ Lin Yongting <linyongting@gmail.com> -ä¸æ–‡ç‰ˆç¿»è¯‘者： æž—æ°¸å¬ Lin Yongting <linyongting@gmail.com> -ä¸æ–‡ç‰ˆæ ¡è¯‘者： æž—æ°¸å¬ Lin Yongting <linyongting@gmail.com> - - -以下为æ£æ–‡ ---------------------------------------------------------------------- - -在æŸäº›å¹³å°ä¸Šï¼Œæ‰€è°“的内å˜æ˜ å°„I/O是弱顺åºã€‚在这些平å°ä¸Šï¼Œé©±åŠ¨å¼€å‘者有责任 -ä¿è¯I/O内å˜æ˜ 射地å€çš„写æ“作按程åºå›¾æ„的顺åºè¾¾åˆ°è®¾å¤‡ã€‚通常读å–一个“安全†-设备寄å˜å™¨æˆ–桥寄å˜å™¨ï¼Œè§¦å‘IO芯片清刷未处ç†çš„写æ“作到达设备åŽæ‰å¤„ç†è¯»æ“作， -而达到ä¿è¯ç›®çš„。驱动程åºé€šå¸¸åœ¨spinlockä¿æŠ¤çš„临界区退出之å‰ä½¿ç”¨è¿™ç§æŠ€æœ¯ã€‚ -这也å¯ä»¥ä¿è¯åŽé¢çš„写æ“作åªåœ¨å‰é¢çš„写æ“作之åŽåˆ°è¾¾è®¾å¤‡ï¼ˆè¿™éžå¸¸ç±»ä¼¼äºŽå†…å˜ -å±éšœæ“作，mb()，ä¸è¿‡ä»…适用于I/O）。 - -å‡è®¾ä¸€ä¸ªè®¾å¤‡é©±åŠ¨ç¨‹çš„具体例å： - - ... -CPU A: spin_lock_irqsave(&dev_lock, flags) -CPU A: val = readl(my_status); -CPU A: ... -CPU A: writel(newval, ring_ptr); -CPU A: spin_unlock_irqrestore(&dev_lock, flags) - ... -CPU B: spin_lock_irqsave(&dev_lock, flags) -CPU B: val = readl(my_status); -CPU B: ... -CPU B: writel(newval2, ring_ptr); -CPU B: spin_unlock_irqrestore(&dev_lock, flags) - ... - -上述例åä¸ï¼Œè®¾å¤‡å¯èƒ½ä¼šå…ˆæŽ¥æ”¶åˆ°newval2的值，然åŽæŽ¥æ”¶åˆ°newval的值，问题就 -å‘生了。ä¸è¿‡å¾ˆå®¹æ˜“通过下é¢æ–¹æ³•æ¥ä¿®å¤ï¼š - - ... -CPU A: spin_lock_irqsave(&dev_lock, flags) -CPU A: val = readl(my_status); -CPU A: ... -CPU A: writel(newval, ring_ptr); -CPU A: (void)readl(safe_register); /* é…置寄å˜å™¨ï¼Ÿ*/ -CPU A: spin_unlock_irqrestore(&dev_lock, flags) - ... -CPU B: spin_lock_irqsave(&dev_lock, flags) -CPU B: val = readl(my_status); -CPU B: ... -CPU B: writel(newval2, ring_ptr); -CPU B: (void)readl(safe_register); /* é…置寄å˜å™¨ï¼Ÿ*/ -CPU B: spin_unlock_irqrestore(&dev_lock, flags) - -在解决方案ä¸ï¼Œè¯»å–safe_register寄å˜å™¨ï¼Œè§¦å‘IO芯片清刷未处ç†çš„写æ“作， -å†å¤„ç†åŽé¢çš„读æ“作，防æ¢å¼•å‘æ•°æ®ä¸ä¸€è‡´é—®é¢˜ã€‚ diff --git a/Documentation/translations/zh_CN/oops-tracing.txt b/Documentation/translations/zh_CN/oops-tracing.txt deleted file mode 100644 index c5f3bda7abcb..000000000000 --- a/Documentation/translations/zh_CN/oops-tracing.txt +++ /dev/null @@ -1,212 +0,0 @@ -Chinese translated version of Documentation/admin-guide/bug-hunting.rst - -If you have any comment or update to the content, please contact the -original document maintainer directly. However, if you have a problem -communicating in English you can also ask the Chinese maintainer for -help. Contact the Chinese maintainer if this translation is outdated -or if there is a problem with the translation. - -Chinese maintainer: Dave Young <hidave.darkstar@gmail.com> ---------------------------------------------------------------------- -Documentation/admin-guide/bug-hunting.rst çš„ä¸æ–‡ç¿»è¯‘ - -如果想评论或更新本文的内容，请直接è”ç³»åŽŸæ–‡æ¡£çš„ç»´æŠ¤è€…ã€‚å¦‚æžœä½ ä½¿ç”¨è‹±æ–‡ -交æµæœ‰å›°éš¾çš„è¯ï¼Œä¹Ÿå¯ä»¥å‘ä¸æ–‡ç‰ˆç»´æŠ¤è€…求助。如果本翻译更新ä¸åŠæ—¶æˆ–者翻 -译å˜åœ¨é—®é¢˜ï¼Œè¯·è”ç³»ä¸æ–‡ç‰ˆç»´æŠ¤è€…。 - -ä¸æ–‡ç‰ˆç»´æŠ¤è€…： æ¨ç‘ž Dave Young <hidave.darkstar@gmail.com> -ä¸æ–‡ç‰ˆç¿»è¯‘者： æ¨ç‘ž Dave Young <hidave.darkstar@gmail.com> -ä¸æ–‡ç‰ˆæ ¡è¯‘者： æŽé˜³ Li Yang <leoyang.li@nxp.com> - çŽ‹èª Wang Cong <xiyou.wangcong@gmail.com> - -以下为æ£æ–‡ ---------------------------------------------------------------------- - -注æ„： ksymoops 在2.6ä¸æ˜¯æ²¡æœ‰ç”¨çš„。 è¯·ä»¥åŽŸæœ‰æ ¼å¼ä½¿ç”¨Oops(æ¥è‡ªdmesg，ç‰ç‰)。 -å¿½ç•¥ä»»ä½•è¿™æ ·é‚£æ ·å…³äºŽâ€œè§£ç Oopsâ€æˆ–者“通过ksymoopsè¿è¡Œâ€çš„文档。 å¦‚æžœä½ è´´å‡ºè¿è¡Œè¿‡ -ksymoopsçš„æ¥è‡ª2.6çš„Oops，人们åªä¼šè®©ä½ é‡è´´ä¸€æ¬¡ã€‚ - -快速总结 -------------- - -å‘现Oops并å‘é€ç»™çœ‹ä¼¼ç›¸å…³çš„å†…æ ¸é¢†åŸŸçš„ç»´æŠ¤è€…ã€‚åˆ«å¤ªæ‹…å¿ƒå¯¹ä¸ä¸Šå·ã€‚å¦‚æžœä½ ä¸ç¡®å®šå°±å‘ç»™ -å’Œä½ æ‰€åšçš„事情相关的代ç 的负责人。 如果å¯é‡çŽ°è¯•ç€æè¿°æ€Žæ ·é‡æž„。 那甚至比oops更有 -价值。 - -å¦‚æžœä½ å¯¹äºŽå‘é€ç»™è°ä¸€æ— 所知， å‘ç»™linux-kernel@vger.kernel.orgã€‚æ„Ÿè°¢ä½ å¸®åŠ©Linux -å°½å¯èƒ½åœ°ç¨³å®šã€‚ - -Oops在哪里? ----------------------- - -通常Oops文本由klogdä»Žå†…æ ¸ç¼“å†²åŒºé‡Œè¯»å–å¹¶ä¼ ç»™syslogd，由syslogd写到syslog文件ä¸ï¼Œ -典型地是/var/log/messages(ä¾èµ–于/etc/syslog.conf)。有时klogd崩溃了,è¿™ç§æƒ…å†µä¸‹ä½ -能够è¿è¡Œdmesg > fileæ¥ä»Žå†…æ ¸ç¼“å†²åŒºä¸è¯»å–æ•°æ®å¹¶ä¿å˜ä¸‹æ¥ã€‚ å¦åˆ™ä½ å¯ä»¥ -cat /proc/kmsg > file， ç„¶è€Œä½ å¿…é¡»ä»‹å…¥ä¸æ¢ä¼ 输， kmsg是一个“永ä¸ç»“æŸçš„文件â€ã€‚如 -果机器崩溃ååˆ°ä½ ä¸èƒ½è¾“入命令或者ç£ç›˜ä¸å¯ç”¨é‚£ä¹ˆä½ 有三ç§é€‰æ‹©:- - -（1） 手抄å±å¹•ä¸Šçš„文本待机器é‡å¯åŽå†è¾“入计算机。 麻烦但如果没有针对崩溃的准备， -这是仅有的选择。 å¦å¤–ï¼Œä½ å¯ä»¥ç”¨æ•°ç 相机把å±å¹•æ‹ä¸‹æ¥-ä¸å¤ªå¥½ï¼Œä½†æ¯”没有强。 如果信 -æ¯æ»šåŠ¨åˆ°äº†ç»ˆç«¯çš„上é¢ï¼Œä½ 会å‘现以高分辩率å¯åŠ¨ï¼ˆæ¯”如，vga=791ï¼‰ä¼šè®©ä½ è¯»åˆ°æ›´å¤šçš„æ–‡ -本。（注æ„：这需è¦vesafb，所以对‘早期’的oops没有帮助） - -（2）用串å£ç»ˆç«¯å¯åŠ¨ï¼ˆè¯·å‚看Documentation/admin-guide/serial-console.rst），è¿è¡Œä¸€ä¸ªnull -modem到å¦ä¸€å°æœºå™¨å¹¶ç”¨ä½ 喜欢的通讯工具获å–输出。Minicom工作地很好。 - -（3）使用Kdump（请å‚看Documentation/admin-guide/kdump/kdump.rst）， -使用在Documentation/admin-guide/kdump/gdbmacros.txtä¸å®šä¹‰çš„dmesg gdbå®ï¼Œä»Žæ—§çš„内å˜ä¸æå–å†…æ ¸ -环形缓冲区。 - -å®Œæ•´ä¿¡æ¯ ----------------- - -注æ„：以下æ¥è‡ªäºŽLinus的邮件适用于2.4å†…æ ¸ã€‚ æˆ‘å› ä¸ºåŽ†å²åŽŸå› ä¿ç•™äº†å®ƒï¼Œå¹¶ä¸”å› ä¸ºå…¶ä¸ -一些信æ¯ä»ç„¶é€‚用。 特别注æ„的是，请忽略任何ksymoops的引用。 - -From: Linus Torvalds <torvalds@osdl.org> - -æ€Žæ ·è·Ÿè¸ªOops.. [原å‘到linux-kernel的一å°é‚®ä»¶] - -主è¦çš„çªé—¨æ˜¯æœ‰äº”年和这些烦人的oops消æ¯æ‰“交é“çš„ç»éªŒ;-) - -å®žé™…ä¸Šï¼Œä½ æœ‰åŠžæ³•ä½¿å®ƒæ›´ç®€å•ã€‚我有两个ä¸åŒçš„方法： - - gdb /usr/src/linux/vmlinux - gdb> disassemble <offending_function> - -那是å‘现问题的简å•åŠžæ³•ï¼Œè‡³å°‘如果bug报告åšçš„å¥½çš„æƒ…å†µä¸‹ï¼ˆè±¡è¿™ä¸ªä¸€æ ·-è¿è¡Œksymoops -得到oopså‘生的函数åŠå‡½æ•°å†…çš„å移）。 - -哦，如果报告å‘ç”Ÿçš„å†…æ ¸ä»¥ç›¸åŒçš„编译器和相似的é…置编译它会有帮助的。 - -å¦ä¸€ä»¶è¦åšçš„事是å汇编bug报告的“Codeâ€éƒ¨åˆ†ï¼šksymoops也会用æ£ç¡®çš„工具æ¥åšè¿™ä»¶äº‹ï¼Œ -ä½†å¦‚æžœæ²¡æœ‰é‚£äº›å·¥å…·ä½ å¯ä»¥å†™ä¸€ä¸ªå‚»ç¨‹åºï¼š - - char str[] = "\xXX\xXX\xXX..."; - main(){} - -并用gcc -g编译它然åŽæ‰§è¡Œâ€œdisassemble strâ€ï¼ˆXX部分是由Oops报告的值-ä½ å¯ä»¥ä»…剪切 -粘贴并用“\xâ€æ›¿æ¢ç©ºæ ¼-我就是这么åšçš„ï¼Œå› ä¸ºæˆ‘æ‡’å¾—å†™ç¨‹åºè‡ªåŠ¨åšè¿™ä¸€åˆ‡ï¼‰ã€‚ - -å¦å¤–ï¼Œä½ å¯ä»¥ç”¨scripts/decodecode这个shell脚本。它的使用方法是： -decodecode < oops.txt - -“Codeâ€ä¹‹åŽçš„åå…进制å—节å¯èƒ½ï¼ˆåœ¨æŸäº›æž¶æž„上）有一些当å‰æŒ‡ä»¤ä¹‹å‰çš„指令å—èŠ‚ä»¥åŠ -当å‰å’Œä¹‹åŽçš„指令å—节 - -Code: f9 0f 8d f9 00 00 00 8d 42 0c e8 dd 26 11 c7 a1 60 ea 2b f9 8b 50 08 a1 -64 ea 2b f9 8d 34 82 8b 1e 85 db 74 6d 8b 15 60 ea 2b f9 <8b> 43 04 39 42 54 -7e 04 40 89 42 54 8b 43 04 3b 05 00 f6 52 c0 - -最åŽï¼Œå¦‚æžœä½ æƒ³çŸ¥é“代ç æ¥è‡ªå“ªé‡Œï¼Œä½ å¯ä»¥ï¼š - - cd /usr/src/linux - make fs/buffer.s # 或任何产生BUG的文件 - -然åŽä½ 会比gdbå汇编更清楚的知é“å‘生了什么。 - -çŽ°åœ¨ï¼Œé—®é¢˜æ˜¯æŠŠä½ æ‰€æ‹¥æœ‰çš„æ‰€æœ‰æ•°æ®ç»“åˆèµ·æ¥ï¼šCæºç ï¼ˆå…³äºŽå®ƒåº”è¯¥æ€Žæ ·çš„ä¸€èˆ¬çŸ¥è¯†ï¼‰ï¼Œ -汇编代ç åŠå…¶å汇编得到的代ç （å¦å¤–还有从“oopsâ€æ¶ˆæ¯å¾—到的寄å˜å™¨çŠ¶æ€-对了解æ¯åçš„ -æŒ‡é’ˆæœ‰ç”¨ï¼Œè€Œä¸”å½“ä½ æœ‰äº†æ±‡ç¼–ä»£ç ä½ ä¹Ÿèƒ½æ‹¿å…¶å®ƒçš„å¯„å˜å™¨å’Œä»»ä½•å®ƒä»¬å¯¹åº”çš„C表达å¼åšåŒ¹é… -）。 - -å®žé™…ä¸Šï¼Œä½ ä»…éœ€çœ‹çœ‹å“ªé‡Œä¸åŒ¹é…（这个例å是“Codeâ€å汇编和编译器生æˆçš„代ç ä¸åŒ¹é…）。 -然åŽä½ é¡»è¦æ‰¾å‡ºä¸ºä»€ä¹ˆä¸åŒ¹é…。通常很简å•-ä½ çœ‹åˆ°ä»£ç 使用了空指针然åŽä½ 看代ç æƒ³çŸ¥é“ -空指针是怎么出现的，还有检查它是å¦åˆæ³•.. - -现在，如果明白这是一项耗时的工作而且需è¦ä¸€ä¸ç‚¹å„¿çš„专心，没错。这就是我为什么大多 -åªæ˜¯å¿½ç•¥é‚£äº›æ²¡æœ‰ç¬¦å·è¡¨ä¿¡æ¯çš„å´©æºƒæŠ¥å‘Šçš„åŽŸå› ï¼šç®€å•çš„说太难查找了（我有一些 -程åºç”¨äºŽåœ¨å†…æ ¸ä»£ç 段ä¸æœç´¢ç‰¹å®šçš„模å¼ï¼Œè€Œä¸”有时我也已ç»èƒ½æ‰¾å‡ºé‚£äº›å´©æºƒçš„地方，但是 -仅仅是找出æ£ç¡®çš„åºåˆ—也确实需è¦ç›¸å½“æ‰Žå®žçš„å†…æ ¸çŸ¥è¯†ï¼‰ - -_有时_会å‘生这ç§æƒ…况，我仅看到崩溃ä¸çš„å汇编代ç åºåˆ—， 然åŽæˆ‘马上就明白问题出在 -哪里。这时我æ‰æ„识到自己干这个工作已ç»å¤ªé•¿æ—¶é—´äº†;-) - - Linus - - ---------------------------------------------------------------------------- -关于Oops跟踪的注解： - -为了帮助Linuså’Œå…¶å®ƒå†…æ ¸å¼€å‘者，klogd纳入了大é‡çš„支æŒæ¥å¤„ç†ä¿æŠ¤é”™è¯¯ã€‚为了拥有对 -地å€è§£æžçš„完整支æŒè‡³å°‘应该使用1.3-pl3çš„sysklogd包。 - -当ä¿æŠ¤é”™è¯¯å‘生时，klogdå®ˆæŠ¤è¿›ç¨‹è‡ªåŠ¨æŠŠå†…æ ¸æ—¥å¿—ä¿¡æ¯ä¸çš„é‡è¦åœ°å€ç¿»è¯‘æˆå®ƒä»¬ç›¸åº”的符 -å·ã€‚ - -klogd执行两ç§ç±»åž‹çš„地å€è§£æžã€‚首先是é™æ€ç¿»è¯‘其次是动æ€ç¿»è¯‘。é™æ€ç¿»è¯‘å’Œksymoops -ä¸€æ ·ä½¿ç”¨System.map文件。为了åšé™æ€ç¿»è¯‘klogd守护进程必须在åˆå§‹åŒ–时能找到system -map文件。关于klogdæ€Žæ ·æœç´¢map文件请å‚看klogd手册页。 - -动æ€åœ°å€ç¿»è¯‘åœ¨ä½¿ç”¨å†…æ ¸å¯è£…载模å—时很é‡è¦ã€‚ å› ä¸ºå†…æ ¸æ¨¡å—的内å˜æ˜¯ä»Žå†…æ ¸åŠ¨æ€å†…å˜æ± -里分é…的，所以ä¸ç®¡æ˜¯æ¨¡å—开始ä½ç½®è¿˜æ˜¯æ¨¡å—ä¸å‡½æ•°å’Œç¬¦å·çš„ä½ç½®éƒ½ä¸æ˜¯å›ºå®šçš„。 - -å†…æ ¸æ”¯æŒå…许程åºå†³å®šè£…载哪些模å—和它们在内å˜ä¸ä½ç½®çš„系统调用。使用这些系统调用 -klogd守护进程生æˆä¸€å¼ 符å·è¡¨ç”¨äºŽè°ƒè¯•å‘生在å¯è£…载模å—ä¸çš„ä¿æŠ¤é”™è¯¯ã€‚ - -至少klogd会æ供产生ä¿æŠ¤é”™è¯¯çš„模å—å。还å¯æœ‰é¢å¤–的符å·ä¿¡æ¯ä¾›å¯è£…载模å—å¼€å‘者选择 -以从模å—ä¸è¾“出符å·ä¿¡æ¯ã€‚ - -å› ä¸ºå†…æ ¸æ¨¡å—环境å¯èƒ½æ˜¯åŠ¨æ€çš„，所以必须有一ç§æœºåˆ¶å½“模å—环境å‘生改å˜æ—¶æ¥é€šçŸ¥klogd -守护进程。 有一些å¯ç”¨çš„命令行选项å…许klogdå‘当å‰æ‰§è¡Œä¸çš„守护进程å‘é€ä¿¡å·ï¼Œå‘ŠçŸ¥ç¬¦ -å·ä¿¡æ¯åº”该被刷新了。 更多信æ¯è¯·å‚看klogd手册页。 - -sysklogdå‘布时包å«ä¸€ä¸ªè¡¥ä¸ä¿®æ”¹äº†modules-2.0.0åŒ…ï¼Œæ— è®ºä½•æ—¶ä¸€ä¸ªæ¨¡å—装载或者å¸è½½éƒ½ -会自动å‘klogdå‘é€ä¿¡å·ã€‚打上这个补ä¸æ供了必è¦çš„对调试å‘ç”ŸäºŽå†…æ ¸å¯è£…载模å—çš„ä¿æŠ¤ -é”™è¯¯çš„æ— ç¼æ”¯æŒã€‚ - -以下是被klogd处ç†è¿‡çš„å‘生在å¯è£…载模å—ä¸çš„一个ä¿æŠ¤é”™è¯¯ä¾‹å： ---------------------------------------------------------------------------- -Aug 29 09:51:01 blizard kernel: Unable to handle kernel paging request at virtual address f15e97cc -Aug 29 09:51:01 blizard kernel: current->tss.cr3 = 0062d000, %cr3 = 0062d000 -Aug 29 09:51:01 blizard kernel: *pde = 00000000 -Aug 29 09:51:01 blizard kernel: Oops: 0002 -Aug 29 09:51:01 blizard kernel: CPU: 0 -Aug 29 09:51:01 blizard kernel: EIP: 0010:[oops:_oops+16/3868] -Aug 29 09:51:01 blizard kernel: EFLAGS: 00010212 -Aug 29 09:51:01 blizard kernel: eax: 315e97cc ebx: 003a6f80 ecx: 001be77b edx: 00237c0c -Aug 29 09:51:01 blizard kernel: esi: 00000000 edi: bffffdb3 ebp: 00589f90 esp: 00589f8c -Aug 29 09:51:01 blizard kernel: ds: 0018 es: 0018 fs: 002b gs: 002b ss: 0018 -Aug 29 09:51:01 blizard kernel: Process oops_test (pid: 3374, process nr: 21, stackpage=00589000) -Aug 29 09:51:01 blizard kernel: Stack: 315e97cc 00589f98 0100b0b4 bffffed4 0012e38e 00240c64 003a6f80 00000001 -Aug 29 09:51:01 blizard kernel: 00000000 00237810 bfffff00 0010a7fa 00000003 00000001 00000000 bfffff00 -Aug 29 09:51:01 blizard kernel: bffffdb3 bffffed4 ffffffda 0000002b 0007002b 0000002b 0000002b 00000036 -Aug 29 09:51:01 blizard kernel: Call Trace: [oops:_oops_ioctl+48/80] [_sys_ioctl+254/272] [_system_call+82/128] -Aug 29 09:51:01 blizard kernel: Code: c7 00 05 00 00 00 eb 08 90 90 90 90 90 90 90 90 89 ec 5d c3 ---------------------------------------------------------------------------- - -Dr. G.W. Wettstein Oncology Research Div. Computing Facility -Roger Maris Cancer Center INTERNET: greg@wind.rmcc.com -820 4th St. N. -Fargo, ND 58122 -Phone: 701-234-7556 - - ---------------------------------------------------------------------------- -å—æ±¡æŸ“çš„å†…æ ¸ - -一些oops报告在程åºè®°æ•°å™¨ä¹‹åŽåŒ…å«å—符串'Tainted: 'ã€‚è¿™è¡¨æ˜Žå†…æ ¸å·²ç»è¢«ä¸€äº›ä¸œè¥¿ç»™æ±¡ -染了。 该å—符串之åŽç´§è·Ÿç€ä¸€ç³»åˆ—çš„ä½ç½®æ•æ„Ÿçš„å—符，æ¯ä¸ªä»£è¡¨ä¸€ä¸ªç‰¹å®šçš„污染值。 - - 1：'G'如果所有装载的模å—都有GPL或相容的许å¯è¯ï¼Œ'P'如果装载了任何的专有模å—。 -没有模å—MODULE_LICENSE或者带有insmod认为是与GPLä¸ç›¸å®¹çš„çš„MODULE_LICENSE的模å—被 -认定是专有的。 - - 2：'F'如果有任何通过“insmod -fâ€è¢«å¼ºåˆ¶è£…载的模å—，' '如果所有模å—都被æ£å¸¸è£…载。 - - 3：'S'如果oopså‘生在SMPå†…æ ¸ä¸ï¼Œè¿è¡ŒäºŽæ²¡æœ‰è¯æ˜Žå®‰å…¨è¿è¡Œå¤šå¤„ç†å™¨çš„硬件。 当å‰è¿™ç§ -情况仅é™äºŽå‡ ç§ä¸æ”¯æŒSMP的速龙处ç†å™¨ã€‚ - - 4：'R'如果模å—通过“insmod -fâ€è¢«å¼ºåˆ¶è£…载，' '如果所有模å—都被æ£å¸¸è£…载。 - - 5：'M'如果任何处ç†å™¨æŠ¥å‘Šäº†æœºå™¨æ£€æŸ¥å¼‚常，' '如果没有å‘生机器检查异常。 - - 6：'B'如果页释放函数å‘现了一个错误的页引用或者一些éžé¢„æœŸçš„é¡µæ ‡å¿—ã€‚ - - 7：'U'如果用户或者用户应用程åºç‰¹åˆ«è¯·æ±‚è®¾ç½®æ±¡æŸ“æ ‡å¿—ï¼Œå¦åˆ™' '。 - - 8：'D'å¦‚æžœå†…æ ¸åˆšåˆšæ»æŽ‰ï¼Œæ¯”如有OOPS或者BUG。 - -使用'Tainted: 'å—符串的主è¦åŽŸå› 是è¦å‘Šè¯‰å†…æ ¸è°ƒè¯•è€…ï¼Œè¿™æ˜¯å¦æ˜¯ä¸€ä¸ªå¹²å‡€çš„å†…æ ¸äº¦æˆ–å‘ -生了任何的ä¸æ£å¸¸çš„事。污染是永久的：å³ä½¿å‡ºé”™çš„模å—å·²ç»è¢«å¸è½½äº†ï¼Œæ±¡æŸ“值ä»ç„¶å˜åœ¨ï¼Œ -ä»¥è¡¨æ˜Žå†…æ ¸ä¸å†å€¼å¾—信任。 diff --git a/Documentation/translations/zh_CN/process/coding-style.rst b/Documentation/translations/zh_CN/process/coding-style.rst index 638d714bec83..fa28ef0a7fee 100644 --- a/Documentation/translations/zh_CN/process/coding-style.rst +++ b/Documentation/translations/zh_CN/process/coding-style.rst @@ -1,21 +1,23 @@ .. include:: ../disclaimer-zh_CN.rst -:Original: :ref:`Documentation/process/coding-style.rst <codingstyle>` +:Original: Documentation/process/coding-style.rst .. _cn_codingstyle: -译者:: +:译者: + - å¼ ä¹ Zhang Le <r0bertz@gentoo.org> + - Andy Deng <theandy.deng@gmail.com> + - å´æƒ³æˆ <bobwxc@email.cn> - ä¸æ–‡ç‰ˆç»´æŠ¤è€…： å¼ ä¹ Zhang Le <r0bertz@gentoo.org> - ä¸æ–‡ç‰ˆç¿»è¯‘者： å¼ ä¹ Zhang Le <r0bertz@gentoo.org> - ä¸æ–‡ç‰ˆæ ¡è¯‘者： çŽ‹èª Wang Cong <xiyou.wangcong@gmail.com> - wheelz <kernel.zeng@gmail.com> - 管æ—东 Xudong Guan <xudong.guan@gmail.com> - Li Zefan <lizf@cn.fujitsu.com> - Wang Chen <wangchen@cn.fujitsu.com> +:æ ¡è¯‘: + - çŽ‹èª Wang Cong <xiyou.wangcong@gmail.com> + - wheelz <kernel.zeng@gmail.com> + - 管æ—东 Xudong Guan <xudong.guan@gmail.com> + - Li Zefan <lizf@cn.fujitsu.com> + - Wang Chen <wangchen@cn.fujitsu.com> Linux å†…æ ¸ä»£ç é£Žæ ¼ -========================= +================== 这是一个简çŸçš„文档，æ述了 linux å†…æ ¸çš„é¦–é€‰ä»£ç é£Žæ ¼ã€‚ä»£ç é£Žæ ¼æ˜¯å› äººè€Œå¼‚çš„ï¼Œ 而且我ä¸æ„¿æ„æŠŠè‡ªå·±çš„è§‚ç‚¹å¼ºåŠ ç»™ä»»ä½•äººï¼Œä½†è¿™å°±åƒæˆ‘去åšä»»ä½•äº‹æƒ…都必须éµå¾ªçš„原则 @@ -29,7 +31,7 @@ Linux å†…æ ¸ä»£ç é£Žæ ¼ 1) 缩进 --------------- +------- 制表符是 8 个å—符，所以缩进也是 8 个å—符。有些异端è¿åŠ¨è¯•å›¾å°†ç¼©è¿›å˜ä¸º 4 (甚至 2ï¼) å—ç¬¦æ·±ï¼Œè¿™å‡ ä¹Žç›¸å½“äºŽå°è¯•å°†åœ†å‘¨çŽ‡çš„值定义为 3。 @@ -73,6 +75,22 @@ Linux å†…æ ¸ä»£ç é£Žæ ¼ if (condition) do_this; do_something_everytime; +ä¸è¦ä½¿ç”¨é€—å·æ¥é¿å…使用大括å·ï¼š + +.. code-block:: c + + if (condition) + do_this(), do_that(); + +使用大括å·åŒ…裹多è¯å¥ï¼š + +.. code-block:: c + + if (condition) { + do_this(); + do_that(); + } + 也ä¸è¦åœ¨ä¸€è¡Œé‡Œæ”¾å¤šä¸ªèµ‹å€¼è¯å¥ã€‚å†…æ ¸ä»£ç é£Žæ ¼è¶…çº§ç®€å•ã€‚就是é¿å…å¯èƒ½å¯¼è‡´åˆ«äººè¯¯è¯» 的表达å¼ã€‚ @@ -83,20 +101,25 @@ Linux å†…æ ¸ä»£ç é£Žæ ¼ 2) 把长的行和å—符串打散 ------------------------------- +----------------------- 代ç é£Žæ ¼çš„æ„义就在于使用平常使用的工具æ¥ç»´æŒä»£ç çš„å¯è¯»æ€§å’Œå¯ç»´æŠ¤æ€§ã€‚ æ¯ä¸€è¡Œçš„长度的é™åˆ¶æ˜¯ 80 列，我们强烈建议您éµå®ˆè¿™ä¸ªæƒ¯ä¾‹ã€‚ 长于 80 列的è¯å¥è¦æ‰“æ•£æˆæœ‰æ„义的片段。除éžè¶…过 80 åˆ—èƒ½æ˜¾è‘—å¢žåŠ å¯è¯»æ€§ï¼Œå¹¶ä¸”ä¸ -会éšè—ä¿¡æ¯ã€‚å片段è¦æ˜Žæ˜¾çŸäºŽæ¯ç‰‡æ®µï¼Œå¹¶æ˜Žæ˜¾é å³ã€‚è¿™åŒæ ·é€‚用于有ç€å¾ˆé•¿å‚数列表 -的函数头。然而，ç»å¯¹ä¸è¦æ‰“散对用户å¯è§çš„å—符串，例如 printk ä¿¡æ¯ï¼Œå› ä¸ºè¿™æ ·å°± +会éšè—ä¿¡æ¯ã€‚ + +å片段è¦æ˜Žæ˜¾çŸäºŽæ¯ç‰‡æ®µï¼Œå¹¶æ˜Žæ˜¾é å³ã€‚一ç§éžå¸¸å¸¸ç”¨çš„æ ·å¼æ˜¯å°†å体与函数左括å·å¯¹é½ã€‚ + +è¿™åŒæ ·é€‚用于有ç€å¾ˆé•¿å‚数列表的函数头。 + +然而，ç»å¯¹ä¸è¦æ‰“散对用户å¯è§çš„å—符串，例如 printk ä¿¡æ¯ï¼Œå› ä¸ºè¿™æ ·å°± 很难对它们 grep。 3) 大括å·å’Œç©ºæ ¼çš„放置 ------------------------------- +--------------------- C è¯è¨€é£Žæ ¼ä¸å¦å¤–一个常è§é—®é¢˜æ˜¯å¤§æ‹¬å·çš„放置。和缩进大å°ä¸åŒï¼Œé€‰æ‹©æˆ–弃用æŸç§æ”¾ ç½®ç–ç•¥å¹¶æ²¡æœ‰å¤šå°‘æŠ€æœ¯ä¸Šçš„åŽŸå› ï¼Œä¸è¿‡é¦–选的方å¼ï¼Œå°±åƒ Kernighan å’Œ Ritchie 展示 @@ -132,12 +155,12 @@ C è¯è¨€é£Žæ ¼ä¸å¦å¤–一个常è§é—®é¢˜æ˜¯å¤§æ‹¬å·çš„æ”¾ç½®ã€‚å’Œç¼©è¿›å¤§å° body of function } -全世界的异端å¯èƒ½ä¼šæŠ±æ€¨è¿™ä¸ªä¸ä¸€è‡´æ€§æ˜¯... 呃... ä¸ä¸€è‡´çš„，ä¸è¿‡æ‰€æœ‰æ€ç»´å¥å…¨çš„人 +全世界的异端å¯èƒ½ä¼šæŠ±æ€¨è¿™ä¸ªä¸ä¸€è‡´æ€§æ˜¯â€¦â€¦å‘ƒâ€¦â€¦ä¸ä¸€è‡´ï¼Œä¸è¿‡æ‰€æœ‰æ€ç»´å¥å…¨çš„人 éƒ½çŸ¥é“ (a) K&R 是 **æ£ç¡®çš„** 并且 (b) K&R 是æ£ç¡®çš„。æ¤å¤–，ä¸ç®¡æ€Žæ ·å‡½æ•°éƒ½æ˜¯ç‰¹ 殊的 (C 函数是ä¸èƒ½åµŒå¥—çš„)。 注æ„结æŸå¤§æ‹¬å·ç‹¬è‡ªå æ®ä¸€è¡Œï¼Œé™¤éžå®ƒåŽé¢è·Ÿç€åŒä¸€ä¸ªè¯å¥çš„剩余部分，也就是 do è¯ -å¥ä¸çš„ "while" 或者 if è¯å¥ä¸çš„ "else"，åƒè¿™æ ·ï¼š +å¥ä¸çš„ ``while`` 或者 if è¯å¥ä¸çš„ ``else`` ，åƒè¿™æ ·ï¼š .. code-block:: c @@ -191,7 +214,7 @@ C è¯è¨€é£Žæ ¼ä¸å¦å¤–一个常è§é—®é¢˜æ˜¯å¤§æ‹¬å·çš„æ”¾ç½®ã€‚å’Œç¼©è¿›å¤§å° } 3.1) ç©ºæ ¼ -******************** +********* Linux å†…æ ¸çš„ç©ºæ ¼ä½¿ç”¨æ–¹å¼ (主è¦) å–决于它是用于函数还是关键å—。(大多数) å…³é”®å— åŽè¦åŠ ä¸€ä¸ªç©ºæ ¼ã€‚å€¼å¾—æ³¨æ„的例外是 sizeof, typeof, alignof å’Œ __attribute__，这 @@ -254,7 +277,7 @@ Linux å†…æ ¸çš„ç©ºæ ¼ä½¿ç”¨æ–¹å¼ (主è¦) å–决于它是用于函数还是关é 4) 命å ------------------------------- +------- C 是一个简朴的è¯è¨€ï¼Œä½ 的命åä¹Ÿåº”è¯¥è¿™æ ·ã€‚å’Œ Modula-2 å’Œ Pascal 程åºå‘˜ä¸åŒï¼Œ C 程åºå‘˜ä¸ä½¿ç”¨ç±»ä¼¼ ThisVariableIsATemporaryCounter è¿™æ ·åŽä¸½çš„åå—。C 程åºå‘˜ä¼š @@ -275,11 +298,31 @@ C 程åºå‘˜ä¸ä½¿ç”¨ç±»ä¼¼ ThisVariableIsATemporaryCounter è¿™æ ·åŽä¸½çš„åå— å¯èƒ½çš„è¯ã€‚类似的， ``tmp`` å¯ä»¥ç”¨æ¥ç§°å‘¼ä»»æ„类型的临时å˜é‡ã€‚ å¦‚æžœä½ æ€•æ··æ·†äº†ä½ çš„æœ¬åœ°å˜é‡åï¼Œä½ å°±é‡åˆ°å¦ä¸€ä¸ªé—®é¢˜äº†ï¼Œå«åšå‡½æ•°å¢žé•¿è·å°”蒙失衡综 -åˆç—‡ã€‚请看第å…ç« (函数)。 +åˆå¾ã€‚请看第å…ç« (函数)。 +对于符å·å称和文档，é¿å…引入新的“master/slaveâ€ï¼ˆæˆ–独立于“masterâ€çš„“slaveâ€ï¼‰ +和“blacklist/whitelistâ€ã€‚ + +“master/slaveâ€æŽ¨è替æ¢ä¸ºï¼š + '{primary,main} / {secondary,replica,subordinate}' + '{initiator,requester} / {target,responder}' + '{controller,host} / {device,worker,proxy}' + 'leader/follower' + 'director/performer' + +“blacklist/whitelistâ€æŽ¨è替æ¢ä¸ºï¼š + 'denylist/allowlist' + 'blocklist/passlist' + +引入新用法的例外情况是：维护用户空间ABI/API，或更新现有（截至2020年）硬件或 +å议规范的代ç æ—¶è¦æ±‚这些术è¯ã€‚对于新规范，尽å¯èƒ½å°†æœ¯è¯çš„规范用法转æ¢ä¸ºå†…æ ¸ +ç¼–ç æ ‡å‡†ã€‚ + +.. warning:: + 以上主从ã€é»‘白åå•è§„则ä¸é€‚用于ä¸æ–‡æ–‡æ¡£ï¼Œè¯·å‹¿æ›´æ”¹ä¸æ–‡æœ¯è¯ï¼ 5) Typedef ------------ +---------- ä¸è¦ä½¿ç”¨ç±»ä¼¼ ``vps_t`` 之类的东西。 @@ -308,7 +351,7 @@ C 程åºå‘˜ä¸ä½¿ç”¨ç±»ä¼¼ ThisVariableIsATemporaryCounter è¿™æ ·åŽä¸½çš„åå— .. note:: - ä¸é€æ˜Žæ€§å’Œ "访问函数" 本身是ä¸å¥½çš„。我们使用 pte_t ç‰ç±»åž‹çš„åŽŸå› åœ¨äºŽçœŸ + ä¸é€æ˜Žæ€§å’Œâ€œè®¿é—®å‡½æ•°â€æœ¬èº«æ˜¯ä¸å¥½çš„。我们使用 pte_t ç‰ç±»åž‹çš„åŽŸå› åœ¨äºŽçœŸ 的是完全没有任何共用的å¯è®¿é—®ä¿¡æ¯ã€‚ (b) 清楚的整数类型，如æ¤ï¼Œè¿™å±‚抽象就å¯ä»¥ **帮助** 消除到底是 ``int`` 还是 @@ -353,7 +396,7 @@ C 程åºå‘˜ä¸ä½¿ç”¨ç±»ä¼¼ ThisVariableIsATemporaryCounter è¿™æ ·åŽä¸½çš„åå— 6) 函数 ------------------------------- +------- 函数应该简çŸè€Œæ¼‚亮，并且åªå®Œæˆä¸€ä»¶äº‹æƒ…。函数应该å¯ä»¥ä¸€å±æˆ–者两å±æ˜¾ç¤ºå®Œ (我们 éƒ½çŸ¥é“ ISO/ANSI å±å¹•å¤§å°æ˜¯ 80x24)，åªåšä¸€ä»¶äº‹æƒ…，而且把它åšå¥½ã€‚ @@ -383,12 +426,46 @@ C 程åºå‘˜ä¸ä½¿ç”¨ç±»ä¼¼ ThisVariableIsATemporaryCounter è¿™æ ·åŽä¸½çš„åå— } EXPORT_SYMBOL(system_is_up); -在函数原型ä¸ï¼ŒåŒ…å«å‡½æ•°å和它们的数æ®ç±»åž‹ã€‚虽然 C è¯è¨€é‡Œæ²¡æœ‰è¿™æ ·çš„è¦æ±‚，在 +6.1) 函数原型 +************* + +在函数原型ä¸åŒ…å«å‚æ•°å和它们的数æ®ç±»åž‹ã€‚虽然 C è¯è¨€é‡Œæ²¡æœ‰è¿™æ ·çš„è¦æ±‚，但在 Linux 里这是æ倡的åšæ³•ï¼Œå› ä¸ºè¿™æ ·å¯ä»¥å¾ˆç®€å•çš„给读者æ供更多的有价值的信æ¯ã€‚ +ä¸è¦åœ¨å‡½æ•°å£°æ˜Žé‡Œä½¿ç”¨ ``extern`` 关键å—ï¼Œå› ä¸ºè¿™ä¼šå¯¼è‡´ä»£ç è¡Œå˜é•¿ï¼Œå¹¶ä¸”ä¸æ˜¯ä¸¥æ ¼ +必需的。 + +写函数原型时，请ä¿æŒ `å…ƒç´ é¡ºåºè§„则 <https://lore.kernel.org/mm-commits/CAHk-=wiOCLRny5aifWNhr621kYrJwhfURsa0vFPeUEm8mF0ufg@mail.gmail.com/>`_ 。 +例如下列函数声明:: + + __init void * __must_check action(enum magic value, size_t size, u8 count, + char *fmt, ...) __printf(4, 5) __malloc; + +推èçš„å‡½æ•°åŽŸåž‹å…ƒç´ é¡ºåºæ˜¯ï¼š + +- 储å˜ç±»åž‹ï¼ˆä¸‹æ–¹çš„ ``static __always_inline`` ï¼Œæ³¨æ„ ``__always_inline`` + 技术上æ¥è®²æ˜¯ä¸ªå±žæ€§ä½†è¢«å½“åš ``inline`` ） +- 储å˜ç±»åž‹å±žæ€§ï¼ˆä¸Šæ–¹çš„ ``__init`` ——å³èŠ‚å£°æ˜Žï¼Œä½†ä¹Ÿåƒ ``__cold`` ） +- 返回类型（上方的 ``void *`` ） +- 返回类型属性（上方的 ``__must_check`` ） +- 函数å（上方的 ``action`` ） +- 函数å‚数（上方的 ``(enum magic value, size_t size, u8 count, char *fmt, ...)`` ， + 注æ„必须写上å‚æ•°å） +- 函数å‚数属性（上方的 ``__printf(4, 5)`` ） +- 函数行为属性（上方的 ``__malloc`` ） + +请注æ„，对于函数 **定义** （å³å®žé™…函数体），编译器ä¸å…许在函数å‚数之åŽæ·»åŠ 函 +æ•°å‚数属性。在这ç§æƒ…况下，它们应该跟éšå˜å‚¨ç±»åž‹å±žæ€§ï¼ˆä¾‹å¦‚，与上é¢çš„ **声明** +示例相比，请注æ„下é¢çš„ ``__printf(4, 5)`` çš„ä½ç½®å‘生了å˜åŒ–）:: + + static __always_inline __init __printf(4, 5) void * __must_check action(enum magic value, + size_t size, u8 count, char *fmt, ...) __malloc + { + ... + } 7) 集ä¸çš„函数退出途径 ------------------------------- +--------------------- 虽然被æŸäº›äººå£°ç§°å·²ç»è¿‡æ—¶ï¼Œä½†æ˜¯ goto è¯å¥çš„ç‰ä»·ç‰©è¿˜æ˜¯ç»å¸¸è¢«ç¼–译器所使用，具体 å½¢å¼æ˜¯æ— æ¡ä»¶è·³è½¬æŒ‡ä»¤ã€‚ @@ -432,7 +509,7 @@ Linux 里这是æ倡的åšæ³•ï¼Œå› ä¸ºè¿™æ ·å¯ä»¥å¾ˆç®€å•çš„给读者æä¾›æ› return result; } -一个需è¦æ³¨æ„的常è§é”™è¯¯æ˜¯ ``一个 err 错误`` ，就åƒè¿™æ ·ï¼š +一个需è¦æ³¨æ„的常è§é”™è¯¯æ˜¯ ``å• err 错误`` ，就åƒè¿™æ ·ï¼š .. code-block:: c @@ -456,19 +533,19 @@ Linux 里这是æ倡的åšæ³•ï¼Œå› ä¸ºè¿™æ ·å¯ä»¥å¾ˆç®€å•çš„给读者æä¾›æ› 8) 注释 ------------------------------- +------- 注释是好的，ä¸è¿‡æœ‰è¿‡åº¦æ³¨é‡Šçš„å±é™©ã€‚永远ä¸è¦åœ¨æ³¨é‡Šé‡Œè§£é‡Šä½ 的代ç 是如何è¿ä½œçš„： 更好的åšæ³•æ˜¯è®©åˆ«äººä¸€çœ‹ä½ 的代ç å°±å¯ä»¥æ˜Žç™½ï¼Œè§£é‡Šå†™çš„很差的代ç 是浪费时间。 -ä¸€èˆ¬çš„ï¼Œä½ æƒ³è¦ä½ çš„æ³¨é‡Šå‘Šè¯‰åˆ«äººä½ çš„ä»£ç åšäº†ä»€ä¹ˆï¼Œè€Œä¸æ˜¯æ€Žä¹ˆåšçš„ã€‚ä¹Ÿè¯·ä½ ä¸è¦æŠŠ +一般æ¥è¯´ä½ ç”¨æ³¨é‡Šå‘Šè¯‰åˆ«äººä½ çš„ä»£ç åšäº†ä»€ä¹ˆï¼Œè€Œä¸æ˜¯æ€Žä¹ˆåšçš„ã€‚ä¹Ÿè¯·ä½ ä¸è¦æŠŠ 注释放在一个函数体内部：如果函数å¤æ‚åˆ°ä½ éœ€è¦ç‹¬ç«‹çš„注释其ä¸çš„ä¸€éƒ¨åˆ†ï¼Œä½ å¾ˆå¯èƒ½ 需è¦å›žåˆ°ç¬¬å…ç« çœ‹ä¸€çœ‹ã€‚ä½ å¯ä»¥åšä¸€äº›å°æ³¨é‡Šæ¥æ³¨æ˜Žæˆ–è¦å‘ŠæŸäº›å¾ˆèªæ˜Ž (或者槽糕) çš„ åšæ³•ï¼Œä½†ä¸è¦åŠ å¤ªå¤šã€‚ä½ åº”è¯¥åšçš„，是把注释放在函数的头部，告诉人们它åšäº†ä»€ä¹ˆï¼Œ 也å¯ä»¥åŠ 上它åšè¿™äº›äº‹æƒ…çš„åŽŸå› ã€‚ -å½“æ³¨é‡Šå†…æ ¸ API 函数时，请使用 kernel-doc æ ¼å¼ã€‚请看 -Documentation/doc-guide/ å’Œ scripts/kernel-doc 以获得详细信æ¯ã€‚ +å½“æ³¨é‡Šå†…æ ¸ API 函数时，请使用 kernel-doc æ ¼å¼ã€‚è¯¦è§ +Documentation/translations/zh_CN/doc-guide/index.rst å’Œ scripts/kernel-doc 。 é•¿ (多行) æ³¨é‡Šçš„é¦–é€‰é£Žæ ¼æ˜¯ï¼š @@ -500,17 +577,18 @@ Documentation/doc-guide/ å’Œ scripts/kernel-doc 以获得详细信æ¯ã€‚ 9) ä½ å·²ç»æŠŠäº‹æƒ…弄糟了 ------------------------------- +--------------------- -è¿™æ²¡ä»€ä¹ˆï¼Œæˆ‘ä»¬éƒ½æ˜¯è¿™æ ·ã€‚å¯èƒ½ä½ 的使用了很长时间 Unix 的朋å‹å·²ç»å‘Šè¯‰ä½ +è¿™æ²¡ä»€ä¹ˆï¼Œæˆ‘ä»¬éƒ½æ˜¯è¿™æ ·ã€‚å¯èƒ½ä½ 长期使用 Unix 的朋å‹å·²ç»å‘Šè¯‰ä½ ``GNU emacs`` èƒ½è‡ªåŠ¨å¸®ä½ æ ¼å¼åŒ– C æºä»£ç ï¼Œè€Œä¸”ä½ ä¹Ÿæ³¨æ„åˆ°äº†ï¼Œç¡®å®žæ˜¯è¿™æ ·ï¼Œä¸è¿‡å®ƒ 所使用的默认值和我们想è¦çš„相去甚远 (实际上，甚至比éšæœºæ‰“的还è¦å·®â€”â€”æ— æ•°ä¸ªçŒ´å -在 GNU emacs 里打å—永远ä¸ä¼šåˆ›é€ 出一个好程åº) (译注：Infinite Monkey Theorem) +在 GNU emacs 里打å—永远ä¸ä¼šåˆ›é€ 出一个好程åº) +*(译注：Infinite Monkey Theorem)* æ‰€ä»¥ä½ è¦ä¹ˆæ”¾å¼ƒ GNU emacs，è¦ä¹ˆæ”¹å˜å®ƒè®©å®ƒä½¿ç”¨æ›´åˆç†çš„设定。è¦é‡‡ç”¨åŽä¸€ä¸ªæ–¹æ¡ˆï¼Œ ä½ å¯ä»¥æŠŠä¸‹é¢è¿™æ®µç²˜è´´åˆ°ä½ çš„ .emacs 文件里。 -.. code-block:: none +.. code-block:: elisp (defun c-lineup-arglist-tabs-only (ignored) "Line up argument lists by tabs, not spaces" @@ -529,7 +607,7 @@ Documentation/doc-guide/ å’Œ scripts/kernel-doc 以获得详细信æ¯ã€‚ (c-offsets-alist . ( (arglist-close . c-lineup-arglist-tabs-only) (arglist-cont-nonempty . - (c-lineup-gcc-asm-reg c-lineup-arglist-tabs-only)) + (c-lineup-gcc-asm-reg c-lineup-arglist-tabs-only)) (arglist-intro . +) (brace-list-intro . +) (c . c-lineup-C-comments) @@ -573,9 +651,14 @@ Documentation/doc-guide/ å’Œ scripts/kernel-doc 以获得详细信æ¯ã€‚ ``indent`` 有很多选项，特别是é‡æ–°æ ¼å¼åŒ–æ³¨é‡Šçš„æ—¶å€™ï¼Œä½ å¯èƒ½éœ€è¦çœ‹ä¸€ä¸‹å®ƒçš„手册。 ä¸è¿‡è®°ä½ï¼š ``indent`` ä¸èƒ½ä¿®æ£åçš„ç¼–ç¨‹ä¹ æƒ¯ã€‚ +请注æ„，您还å¯ä»¥ä½¿ç”¨ ``clang-format`` 工具帮助您处ç†è¿™äº›è§„则，快速自动é‡æ–°æ ¼ +å¼åŒ–部分代ç ，并审阅整个文件以å‘现代ç é£Žæ ¼é”™è¯¯ã€æ‰“å—错误和å¯èƒ½çš„æ”¹è¿›ã€‚å®ƒè¿˜å¯ +ä»¥æ–¹ä¾¿åœ°æŽ’åº ``#include`` ，对é½å˜é‡/å®ï¼Œé‡æŽ’文本和其他类似任务。 +è¯¦è§ Documentation/process/clang-format.rst 。 + 10) Kconfig é…置文件 ------------------------------- +-------------------- 对于é布æºç æ ‘çš„æ‰€æœ‰ Kconfig* é…置文件æ¥è¯´ï¼Œå®ƒä»¬ç¼©è¿›æ–¹å¼æœ‰æ‰€ä¸åŒã€‚ç´§æŒ¨ç€ ``config`` 定义的行，用一个制表符缩进，然而 help ä¿¡æ¯çš„缩进则é¢å¤–å¢žåŠ 2 个空 @@ -598,11 +681,11 @@ Documentation/doc-guide/ å’Œ scripts/kernel-doc 以获得详细信æ¯ã€‚ depends on ADFS_FS ... -è¦æŸ¥çœ‹é…置文件的完整文档，请看 Documentation/kbuild/kconfig-language.rst。 +è¦æŸ¥çœ‹é…置文件的完整文档，请看 Documentation/kbuild/kconfig-language.rst 。 11) æ•°æ®ç»“æž„ ------------------------------- +------------ 如果一个数æ®ç»“构，在创建和销æ¯å®ƒçš„å•çº¿æ‰§è¡ŒçŽ¯å¢ƒä¹‹å¤–å¯è§ï¼Œé‚£ä¹ˆå®ƒå¿…é¡»è¦æœ‰ä¸€ä¸ªå¼• ç”¨è®¡æ•°å™¨ã€‚å†…æ ¸é‡Œæ²¡æœ‰åžƒåœ¾æ”¶é›† (å¹¶ä¸”å†…æ ¸ä¹‹å¤–çš„åžƒåœ¾æ”¶é›†æ…¢ä¸”æ•ˆçŽ‡ä½Žä¸‹)，这æ„味ç€ä½ @@ -626,7 +709,7 @@ mm_count)，和文件系统 (``struct super_block``: s_count å’Œ s_active) ä¸æ‰ 12) å®ï¼Œæžšä¸¾å’ŒRTL ------------------------------- +----------------- 用于定义常é‡çš„å®çš„åå—åŠæžšä¸¾é‡Œçš„æ ‡ç¾éœ€è¦å¤§å†™ã€‚ @@ -638,7 +721,7 @@ mm_count)，和文件系统 (``struct super_block``: s_count å’Œ s_active) ä¸æ‰ å®çš„åå—请用大写å—æ¯ï¼Œä¸è¿‡å½¢å¦‚函数的å®çš„åå—å¯ä»¥ç”¨å°å†™å—æ¯ã€‚ -一般的，如果能写æˆå†…è”函数就ä¸è¦å†™æˆåƒå‡½æ•°çš„å®ã€‚ +通常如果能写æˆå†…è”函数就ä¸è¦å†™æˆåƒå‡½æ•°çš„å®ã€‚ å«æœ‰å¤šä¸ªè¯å¥çš„å®åº”该被包å«åœ¨ä¸€ä¸ª do-while 代ç å—里： @@ -696,18 +779,18 @@ mm_count)，和文件系统 (``struct super_block``: s_count å’Œ s_active) ä¸æ‰ (ret); \ }) -ret 是本地å˜é‡çš„通用åå— - __foo_ret æ›´ä¸å®¹æ˜“与一个已å˜åœ¨çš„å˜é‡å†²çªã€‚ +ret 是本地å˜é‡çš„通用åå——— __foo_ret æ›´ä¸å®¹æ˜“与一个已å˜åœ¨çš„å˜é‡å†²çªã€‚ cpp 手册对å®çš„讲解很详细。gcc internals 手册也详细讲解了 RTLï¼Œå†…æ ¸é‡Œçš„æ±‡ç¼–è¯ è¨€ç»å¸¸ç”¨åˆ°å®ƒã€‚ 13) 打å°å†…æ ¸æ¶ˆæ¯ ------------------------------- +---------------- -å†…æ ¸å¼€å‘者应该是å—过良好教育的。请一定注æ„å†…æ ¸ä¿¡æ¯çš„拼写，以给人以好的å°è±¡ã€‚ +å†…æ ¸å¼€å‘者应该看起æ¥æœ‰æ–‡åŒ–。请一定注æ„å†…æ ¸ä¿¡æ¯çš„拼写，以给人良好的å°è±¡ã€‚ ä¸è¦ç”¨ä¸è§„范的å•è¯æ¯”如 ``dont``，而è¦ç”¨ ``do not`` 或者 ``don't`` 。ä¿è¯è¿™äº›ä¿¡ -æ¯ç®€å•æ˜Žäº†,æ— æ§ä¹‰ã€‚ +æ¯ç®€å•æ˜Žäº†ã€æ— æ§ä¹‰ã€‚ å†…æ ¸ä¿¡æ¯ä¸å¿…以英文å¥å·ç»“æŸã€‚ @@ -724,17 +807,18 @@ dev_info() ç‰ç‰ã€‚对于那些ä¸å’ŒæŸä¸ªç‰¹å®šè®¾å¤‡ç›¸å…³è¿žçš„ä¿¡æ¯ï¼Œ<li 或设定了 CONFIG_DYNAMIC_DEBUG。实际这åŒæ ·æ˜¯ä¸ºäº† dev_dbg()，一个相关约定是在一 个已ç»å¼€å¯äº† DEBUG 时，使用 VERBOSE_DEBUG æ¥æ·»åŠ dev_vdbg()。 -许多å系统拥有 Kconfig 调试选项æ¥å¼€å¯ -DDEBUG 在对应的 Makefile 里é¢ï¼›åœ¨å…¶ä»– +许多å系统拥有 Kconfig 调试选项æ¥å¼€å¯å¯¹åº” Makefile 里é¢çš„ -DDEBUG；在其他 情况下，特殊文件使用 #define DEBUG。当一æ¡è°ƒè¯•ä¿¡æ¯éœ€è¦è¢«æ— æ¡ä»¶æ‰“å°æ—¶ï¼Œä¾‹å¦‚， 如果已ç»åŒ…å«ä¸€ä¸ªè°ƒè¯•ç›¸å…³çš„ #ifdef æ¡ä»¶ï¼Œprintk(KERN_DEBUG ...) å°±å¯è¢«ä½¿ç”¨ã€‚ 14) 分é…å†…å˜ ------------------------------- +------------ å†…æ ¸æ供了下é¢çš„一般用途的内å˜åˆ†é…函数： kmalloc(), kzalloc(), kmalloc_array(), kcalloc(), vmalloc() å’Œ vzalloc()。 -请å‚考 API 文档以获å–有关它们的详细信æ¯ã€‚ +请å‚考 API 文档以获å–有关它们的详细信æ¯ï¼š +Documentation/translations/zh_CN/core-api/memory-allocation.rst 。 ä¼ é€’ç»“æž„ä½“å¤§å°çš„首选形å¼æ˜¯è¿™æ ·çš„： @@ -761,11 +845,13 @@ kmalloc(), kzalloc(), kmalloc_array(), kcalloc(), vmalloc() å’Œ vzalloc()。 p = kcalloc(n, sizeof(...), ...); -两ç§å½¢å¼æ£€æŸ¥åˆ†é…å¤§å° n * sizeof(...) 的溢出，如果溢出返回 NULL。 +两ç§å½¢å¼éƒ½ä¼šæ£€æŸ¥åˆ†é… n * sizeof(...) 大å°æ—¶å†…å˜çš„溢出，如果溢出返回 NULL。 +在没有 __GFP_NOWARN 的情况下使用时，这些通用分é…函数都会在失败时å‘èµ·å †æ ˆè½¬å‚¨ï¼Œ +å› æ¤å½“返回NULL时，没有必è¦å‘出é¢å¤–的失败消æ¯ã€‚ 15) 内è”弊病 ------------------------------- +------------ 有一个常è§çš„误解是 ``内è”`` 是 gcc æ供的å¯ä»¥è®©ä»£ç è¿è¡Œæ›´å¿«çš„一个选项。虽然使 用内è”函数有时候是æ°å½“çš„ (比如作为一ç§æ›¿ä»£å®çš„æ–¹å¼ï¼Œè¯·çœ‹ç¬¬åäºŒç« )，ä¸è¿‡å¾ˆå¤šæƒ… @@ -786,7 +872,7 @@ inline gcc 也å¯ä»¥è‡ªåŠ¨ä½¿å…¶å†…è”。而且其他用户å¯èƒ½ä¼šè¦æ±‚移除 16) 函数返回值åŠå‘½å ------------------------------- +-------------------- 函数å¯ä»¥è¿”回多ç§ä¸åŒç±»åž‹çš„值，最常è§çš„一ç§æ˜¯è¡¨æ˜Žå‡½æ•°æ‰§è¡ŒæˆåŠŸæˆ–è€…å¤±è´¥çš„å€¼ã€‚è¿™æ · 的一个值å¯ä»¥è¡¨ç¤ºä¸ºä¸€ä¸ªé”™è¯¯ä»£ç æ•´æ•° (-Exxxï¼å¤±è´¥ï¼Œ0ï¼æˆåŠŸ) 或者一个 ``æˆåŠŸ`` @@ -797,7 +883,7 @@ inline gcc 也å¯ä»¥è‡ªåŠ¨ä½¿å…¶å†…è”。而且其他用户å¯èƒ½ä¼šè¦æ±‚移除 äº§ç”Ÿè¿™ç§ bug，请éµå¾ªä¸‹é¢çš„惯例:: 如果函数的åå—是一个动作或者强制性的命令，那么这个函数应该返回错误代 - ç 整数。如果是一个判æ–，那么函数应该返回一个 "æˆåŠŸ" 布尔值。 + ç 整数。如果是一个判æ–，那么函数应该返回一个“æˆåŠŸâ€å¸ƒå°”值。 比如， ``add work`` 是一个命令，所以 add_work() 在æˆåŠŸæ—¶è¿”回 0，在失败时返回 -EBUSYã€‚ç±»ä¼¼çš„ï¼Œå› ä¸º ``PCI device present`` 是一个判æ–，所以 pci_dev_present() @@ -806,13 +892,35 @@ inline gcc 也å¯ä»¥è‡ªåŠ¨ä½¿å…¶å†…è”。而且其他用户å¯èƒ½ä¼šè¦æ±‚移除 所有 EXPORTed 函数都必须éµå®ˆè¿™ä¸ªæƒ¯ä¾‹ï¼Œæ‰€æœ‰çš„公共函数也都应该如æ¤ã€‚ç§æœ‰ (static) 函数ä¸éœ€è¦å¦‚æ¤ï¼Œä½†æ˜¯æˆ‘们也推èè¿™æ ·åšã€‚ -返回值是实际计算结果而ä¸æ˜¯è®¡ç®—是å¦æˆåŠŸçš„æ ‡å¿—çš„å‡½æ•°ä¸å—æ¤æƒ¯ä¾‹çš„é™åˆ¶ã€‚一般的， +返回值是实际计算结果而ä¸æ˜¯è®¡ç®—是å¦æˆåŠŸçš„æ ‡å¿—çš„å‡½æ•°ä¸å—æ¤æƒ¯ä¾‹çš„é™åˆ¶ã€‚通常 他们通过返回一些æ£å¸¸å€¼èŒƒå›´ä¹‹å¤–的结果æ¥è¡¨ç¤ºå‡ºé”™ã€‚典型的例å是返回指针的函数， 他们使用 NULL 或者 ERR_PTR 机制æ¥æŠ¥å‘Šé”™è¯¯ã€‚ +17) 使用布尔类型 +---------------- + +Linuxå†…æ ¸å¸ƒå°”ï¼ˆbool）类型是C99 _Bool类型的别å。布尔值åªèƒ½ä¸º0或1，而对布尔的 +éšå¼æˆ–显å¼è½¬æ¢å°†è‡ªåŠ¨å°†å€¼è½¬æ¢ä¸ºtrue或false。在使用布尔类型时 **ä¸éœ€è¦** æž„é€ ï¼Œ +它会消除一类错误。 + +使用布尔值时，应使用trueå’Œfalse定义，而ä¸æ˜¯1å’Œ0。 -17) ä¸è¦é‡æ–°å‘æ˜Žå†…æ ¸å® ------------------------------- +å¸ƒå°”å‡½æ•°è¿”å›žç±»åž‹å’Œå †æ ˆå˜é‡æ€»æ˜¯å¯ä»¥åœ¨é€‚当的时候使用。鼓励使用布尔æ¥æ高å¯è¯»æ€§ï¼Œ +并且布尔值在å˜å‚¨æ—¶é€šå¸¸æ¯”“intâ€æ›´å¥½ã€‚ + +如果缓å˜è¡Œå¸ƒå±€æˆ–值的大å°å¾ˆé‡è¦ï¼Œè¯·ä¸è¦ä½¿ç”¨å¸ƒå°”ï¼Œå› ä¸ºå…¶å¤§å°å’Œå¯¹é½æ–¹å¼æ ¹æ®ç¼–译 +的体系结构而ä¸åŒã€‚针对对é½å’Œå¤§å°è¿›è¡Œä¼˜åŒ–的结构体ä¸åº”使用布尔。 + +如果一个结构体有多个true/false值，请考虑将它们åˆå¹¶ä¸ºå…·æœ‰1比特æˆå‘˜çš„ä½åŸŸï¼Œæˆ–使 +用适当的固定宽度类型，如u8。 + +类似地，对于函数å‚数，多个true/false值å¯ä»¥åˆå¹¶ä¸ºå•ä¸ªæŒ‰ä½çš„â€œæ ‡å¿—â€å‚数，如果调 +用点具有裸true/false常é‡ï¼Œâ€œæ ‡å¿—â€å‚数通常是更具å¯è¯»æ€§çš„替代方法。 + +总之，在结构体和å‚æ•°ä¸æœ‰é™åœ°ä½¿ç”¨å¸ƒå°”å¯ä»¥æ高å¯è¯»æ€§ã€‚ + +18) ä¸è¦é‡æ–°å‘æ˜Žå†…æ ¸å® +---------------------- 头文件 include/linux/kernel.h 包å«äº†ä¸€äº›å®ï¼Œä½ 应该使用它们，而ä¸è¦è‡ªå·±å†™ä¸€äº› 它们的å˜ç§ã€‚æ¯”å¦‚ï¼Œå¦‚æžœä½ éœ€è¦è®¡ç®—ä¸€ä¸ªæ•°ç»„çš„é•¿åº¦ï¼Œä½¿ç”¨è¿™ä¸ªå® @@ -832,11 +940,11 @@ inline gcc 也å¯ä»¥è‡ªåŠ¨ä½¿å…¶å†…è”。而且其他用户å¯èƒ½ä¼šè¦æ±‚移除 åœ¨ä½ çš„ä»£ç 里自己é‡æ–°å®šä¹‰ã€‚ -18) 编辑器模å¼è¡Œå’Œå…¶ä»–需è¦ç½—嗦的事情 --------------------------------------------------- +19) 编辑器模å¼è¡Œå’Œå…¶ä»–需è¦ç½—嗦的事情 +------------------------------------ 有一些编辑器å¯ä»¥è§£é‡ŠåµŒå…¥åœ¨æºæ–‡ä»¶é‡Œçš„ç”±ä¸€äº›ç‰¹æ®Šæ ‡è®°æ ‡æ˜Žçš„é…置信æ¯ã€‚比如，emacs -èƒ½å¤Ÿè§£é‡Šè¢«æ ‡è®°æˆè¿™æ ·çš„行： +能够解æžè¢«æ ‡è®°æˆè¿™æ ·çš„行： .. code-block:: c @@ -852,7 +960,7 @@ inline gcc 也å¯ä»¥è‡ªåŠ¨ä½¿å…¶å†…è”。而且其他用户å¯èƒ½ä¼šè¦æ±‚移除 End: */ -Vim èƒ½å¤Ÿè§£é‡Šè¿™æ ·çš„æ ‡è®°ï¼š +Vim 能够解æžè¿™æ ·çš„æ ‡è®°ï¼š .. code-block:: c @@ -863,8 +971,8 @@ Vim èƒ½å¤Ÿè§£é‡Šè¿™æ ·çš„æ ‡è®°ï¼š 的模å¼ï¼Œæˆ–者使用其他å¯ä»¥äº§ç”Ÿæ£ç¡®çš„缩进的巧妙方法。 -19) 内è”汇编 ------------------------------- +20) 内è”汇编 +------------ 在特定架构的代ç ä¸ï¼Œä½ å¯èƒ½éœ€è¦å†…è”汇编与 CPU 和平å°ç›¸å…³åŠŸèƒ½è¿žæŽ¥ã€‚需è¦è¿™ä¹ˆåšæ—¶ å°±ä¸è¦çŠ¹è±«ã€‚然而，当 C å¯ä»¥å®Œæˆå·¥ä½œæ—¶ï¼Œä¸è¦å¹³ç™½æ— 故地使用内è”汇编。在å¯èƒ½çš„情 @@ -880,8 +988,8 @@ Vim èƒ½å¤Ÿè§£é‡Šè¿™æ ·çš„æ ‡è®°ï¼š ç§»é™¤äº†ã€‚ä½ ä¸å¿…æ€»æ˜¯è¿™æ ·åšï¼Œå°½ç®¡ï¼Œè¿™ä¸å¿…è¦çš„举动会é™åˆ¶ä¼˜åŒ–。 在写一个包å«å¤šæ¡æŒ‡ä»¤çš„å•ä¸ªå†…è”汇编è¯å¥æ—¶ï¼ŒæŠŠæ¯æ¡æŒ‡ä»¤ç”¨å¼•å·åˆ†å‰²è€Œä¸”å„å 一行， -除了最åŽä¸€æ¡æŒ‡ä»¤å¤–，在æ¯ä¸ªæŒ‡ä»¤ç»“å°¾åŠ ä¸Š \n\t，让汇编输出时å¯ä»¥æ£ç¡®åœ°ç¼©è¿›ä¸‹ä¸€æ¡ -指令： +除了最åŽä¸€æ¡æŒ‡ä»¤å¤–，在æ¯ä¸ªæŒ‡ä»¤ç»“å°¾åŠ ä¸Š ``\n\t`` ，让汇编输出时å¯ä»¥æ£ç¡®åœ°ç¼©è¿› +下一æ¡æŒ‡ä»¤ï¼š .. code-block:: c @@ -890,10 +998,10 @@ Vim èƒ½å¤Ÿè§£é‡Šè¿™æ ·çš„æ ‡è®°ï¼š : /* outputs */ : /* inputs */ : /* clobbers */); -20) æ¡ä»¶ç¼–译 ------------------------------- +21) æ¡ä»¶ç¼–译 +------------ -åªè¦å¯èƒ½ï¼Œå°±ä¸è¦åœ¨ .c 文件里é¢ä½¿ç”¨é¢„处ç†æ¡ä»¶ (#if, #ifdef)ï¼›è¿™æ ·åšè®©ä»£ç æ›´éš¾ +åªè¦å¯èƒ½ï¼Œå°±ä¸è¦åœ¨ .c 文件里é¢ä½¿ç”¨é¢„处ç†æ¡ä»¶ (#if, #ifdef)ï¼›è¿™æ ·åšä¼šè®©ä»£ç æ›´éš¾ 阅读并且更难去跟踪逻辑。替代方案是，在头文件ä¸ç”¨é¢„处ç†æ¡ä»¶æ供给那些 .c 文件 使用，å†ç»™ #else æ供一个空桩 (no-op stub) 版本，然åŽåœ¨ .c æ–‡ä»¶å†…æ— æ¡ä»¶åœ°è°ƒç”¨ 那些 (定义在头文件内的) å‡½æ•°ã€‚è¿™æ ·åšï¼Œç¼–译器会é¿å…为桩函数 (stub) çš„è°ƒç”¨ç”Ÿæˆ @@ -904,8 +1012,8 @@ Vim èƒ½å¤Ÿè§£é‡Šè¿™æ ·çš„æ ‡è®°ï¼š æ¡ä»¶åˆ°è¿™ä¸ªè¾…助函数内。 å¦‚æžœä½ æœ‰ä¸€ä¸ªåœ¨ç‰¹å®šé…ç½®ä¸ï¼Œå¯èƒ½å˜æˆæœªä½¿ç”¨çš„函数或å˜é‡ï¼Œç¼–译器会è¦å‘Šå®ƒå®šä¹‰äº†ä½† -æœªä½¿ç”¨ï¼ŒæŠŠå®ƒæ ‡è®°ä¸º __maybe_unused 而ä¸æ˜¯å°†å®ƒåŒ…å«åœ¨ä¸€ä¸ªé¢„处ç†æ¡ä»¶ä¸ã€‚(然而，如 -果一个函数或å˜é‡æ€»æ˜¯æœªä½¿ç”¨ï¼Œå°±ç›´æŽ¥åˆ 除它。) +æœªä½¿ç”¨ï¼Œè¯·æŠŠå®ƒæ ‡è®°ä¸º __maybe_unused 而ä¸æ˜¯å°†å®ƒåŒ…å«åœ¨ä¸€ä¸ªé¢„处ç†æ¡ä»¶ä¸ã€‚(然而， +如果一个函数或å˜é‡æ€»æ˜¯æœªä½¿ç”¨ï¼Œå°±ç›´æŽ¥åˆ 除它。) 在代ç ä¸ï¼Œå°½å¯èƒ½åœ°ä½¿ç”¨ IS_ENABLED å®æ¥è½¬åŒ–æŸä¸ª Kconfig æ ‡è®°ä¸º C 的布尔 表达å¼ï¼Œå¹¶åœ¨ä¸€èˆ¬çš„ C æ¡ä»¶ä¸ä½¿ç”¨å®ƒï¼š @@ -931,23 +1039,45 @@ Vim èƒ½å¤Ÿè§£é‡Šè¿™æ ·çš„æ ‡è®°ï¼š #endif /* CONFIG_SOMETHING */ -附录 I) å‚考 -------------------- +附录 I) å‚考资料 +---------------- -The C Programming Language, 第二版 +The C Programming Language, 2nd Edition 作者：Brian W. Kernighan å’Œ Denni M. Ritchie. Prentice Hall, Inc., 1988. -ISBN 0-13-110362-8 (软皮), 0-13-110370-9 (硬皮). +ISBN 0-13-110362-8 (平装), 0-13-110370-9 (精装). + +.. note:: + + 《C程åºè®¾è®¡è¯è¨€ï¼ˆç¬¬2版）》 + 作者：[美] Brian W. Kernighan / [美] Dennis M. Ritchie + 译者：å¾å®æ–‡ / æŽå¿— / å°¤æ™‹å…ƒï¼ˆå®¡æ ¡ï¼‰ + 出版社：机械工业出版社，2019 + ISBN：9787111617945 The Practice of Programming 作者：Brian W. Kernighan å’Œ Rob Pike. Addison-Wesley, Inc., 1999. ISBN 0-201-61586-X. +.. note:: + + 《程åºè®¾è®¡å®žè·µã€‹ + 作者：[美] Brian W. Kernighan / [美] Rob Pike + 出版社：机械工业出版社，2005 + ISBN：9787111091578 + + 《程åºè®¾è®¡å®žè·µã€‹ + 作者：[美] Brian W. Kernighan / Rob Pike + 译者：裘宗燕 + 出版社：机械工业出版社，2000 + ISBN：9787111075738 + GNU 手册 - éµå¾ª K&R æ ‡å‡†å’Œæ¤æ–‡æœ¬ - cpp, gcc, gcc internals and indent, 都å¯ä»¥ä»Ž https://www.gnu.org/manual/ 找到 WG14 是 C è¯è¨€çš„å›½é™…æ ‡å‡†åŒ–å·¥ä½œç»„ï¼ŒURL: http://www.open-std.org/JTC1/SC22/WG14/ -Kernel process/coding-style.rst，作者 greg@kroah.com å‘表于 OLS 2002： +å†…æ ¸æ–‡æ¡£ Documentation/process/coding-style.rst， +作者 greg@kroah.com å‘表于 OLS 2002： http://www.kroah.com/linux/talks/ols_2002_kernel_codingstyle_talk/html/ diff --git a/Documentation/translations/zh_CN/process/email-clients.rst b/Documentation/translations/zh_CN/process/email-clients.rst index 102023651118..34d51cdadc7b 100644 --- a/Documentation/translations/zh_CN/process/email-clients.rst +++ b/Documentation/translations/zh_CN/process/email-clients.rst @@ -1,17 +1,20 @@ -.. _cn_email_clients: +.. SPDX-License-Identifier: GPL-2.0-or-later .. include:: ../disclaimer-zh_CN.rst -:Original: :ref:`Documentation/process/email-clients.rst <email_clients>` +.. _cn_email_clients: -译者:: +:Original: Documentation/process/email-clients.rst - ä¸æ–‡ç‰ˆç»´æŠ¤è€…： è´¾å¨å¨ Harry Wei <harryxiyou@gmail.com> - ä¸æ–‡ç‰ˆç¿»è¯‘者： è´¾å¨å¨ Harry Wei <harryxiyou@gmail.com> - 时奎亮 Alex Shi <alex.shi@linux.alibaba.com> - ä¸æ–‡ç‰ˆæ ¡è¯‘者： Yinglin Luan <synmyth@gmail.com> - Xiaochen Wang <wangxiaochen0@gmail.com> - yaxinsn <yaxinsn@163.com> +:译者: + - è´¾å¨å¨ Harry Wei <harryxiyou@gmail.com> + - 时奎亮 Alex Shi <alexs@kernel.org> + - å´æƒ³æˆ Wu XiangCheng <bobwxc@email.cn> + +:æ ¡è¯‘: + - Yinglin Luan <synmyth@gmail.com> + - Xiaochen Wang <wangxiaochen0@gmail.com> + - yaxinsn <yaxinsn@163.com> Linux邮件客户端é…ç½®ä¿¡æ¯ ======================= @@ -27,12 +30,17 @@ Git 改日志。如果工作æ£å¸¸ï¼Œå†å°†è¡¥ä¸å‘é€åˆ°ç›¸åº”的邮件列表。 -普通é…ç½® +通用é…ç½® -------- + Linuxå†…æ ¸è¡¥ä¸æ˜¯é€šè¿‡é‚®ä»¶è¢«æ交的，最好把补ä¸ä½œä¸ºé‚®ä»¶ä½“的内嵌文本。有些维护者 æŽ¥æ”¶é™„ä»¶ï¼Œä½†æ˜¯é™„ä»¶çš„å†…å®¹æ ¼å¼åº”该是"text/plain"。然而，附件一般是ä¸èµžæˆçš„， å› ä¸ºè¿™ä¼šä½¿è¡¥ä¸çš„引用部分在评论过程ä¸å˜çš„很困难。 +åŒæ—¶ä¹Ÿå¼ºçƒˆå»ºè®®åœ¨è¡¥ä¸æˆ–其他邮件的æ£æ–‡ä¸ä½¿ç”¨çº¯æ–‡æœ¬æ ¼å¼ã€‚https://useplaintext.email +有助于了解如何é…ç½®ä½ å–œæ¬¢çš„é‚®ä»¶å®¢æˆ·ç«¯ï¼Œå¹¶åœ¨æ‚¨è¿˜æ²¡æœ‰é¦–é€‰çš„æƒ…å†µä¸‹åˆ—å‡ºä¸€äº›æŽ¨èçš„ +客户端。 + 用æ¥å‘é€Linuxå†…æ ¸è¡¥ä¸çš„邮件客户端在å‘é€è¡¥ä¸æ—¶åº”该处于文本的原始状æ€ã€‚例如， 他们ä¸èƒ½æ”¹å˜æˆ–è€…åˆ é™¤åˆ¶è¡¨ç¬¦æˆ–è€…ç©ºæ ¼ï¼Œç”šè‡³æ˜¯åœ¨æ¯ä¸€è¡Œçš„开头或者结尾。 @@ -40,17 +48,17 @@ Linuxå†…æ ¸è¡¥ä¸æ˜¯é€šè¿‡é‚®ä»¶è¢«æ交的，最好把补ä¸ä½œä¸ºé‚®ä»¶ä½“çš„ ä¸è¦è®©ä½ 的邮件客户端进行自动æ¢è¡Œã€‚è¿™æ ·ä¹Ÿä¼šç ´åä½ çš„è¡¥ä¸ã€‚ -邮件客户端ä¸èƒ½æ”¹å˜æ–‡æœ¬çš„å—符集编ç æ–¹å¼ã€‚è¦å‘é€çš„è¡¥ä¸åªèƒ½æ˜¯ASCII或者UTF-8ç¼–ç æ–¹å¼ï¼Œ -å¦‚æžœä½ ä½¿ç”¨UTF-8ç¼–ç æ–¹å¼å‘é€é‚®ä»¶ï¼Œé‚£ä¹ˆä½ 将会é¿å…一些å¯èƒ½å‘生的å—符集问题。 +邮件客户端ä¸èƒ½æ”¹å˜æ–‡æœ¬çš„å—符集编ç æ–¹å¼ã€‚è¦å‘é€çš„è¡¥ä¸åªèƒ½æ˜¯ASCII或者UTF-8ç¼–ç +æ–¹å¼ï¼Œå¦‚æžœä½ ä½¿ç”¨UTF-8ç¼–ç æ–¹å¼å‘é€é‚®ä»¶ï¼Œé‚£ä¹ˆä½ 将会é¿å…一些å¯èƒ½å‘生的å—符集问题。 -邮件客户端应该形æˆå¹¶ä¸”ä¿æŒ References: 或者 In-Reply-To: æ ‡é¢˜ï¼Œé‚£ä¹ˆ -邮件è¯é¢˜å°±ä¸ä¼šä¸æ–。 +邮件客户端应该生æˆå¹¶ä¸”ä¿æŒâ€œReferences:â€æˆ–者“In-Reply-To:â€é‚®ä»¶å¤´ï¼Œè¿™æ ·é‚®ä»¶ä¼šè¯ +å°±ä¸ä¼šä¸æ–。 -å¤åˆ¶ç²˜å¸–(或者剪贴粘帖)通常ä¸èƒ½ç”¨äºŽè¡¥ä¸ï¼Œå› 为制表符会转æ¢ä¸ºç©ºæ ¼ã€‚使用xclipboard, xclip -或者xcutsel也许å¯ä»¥ï¼Œä½†æ˜¯æœ€å¥½æµ‹è¯•ä¸€ä¸‹æˆ–者é¿å…使用å¤åˆ¶ç²˜å¸–。 +å¤åˆ¶ç²˜å¸–(或者剪贴粘帖)通常ä¸èƒ½ç”¨äºŽè¡¥ä¸ï¼Œå› 为制表符会转æ¢ä¸ºç©ºæ ¼ã€‚使用xclipboard, +xclip或者xcutsel也许å¯ä»¥ï¼Œä½†æ˜¯æœ€å¥½æµ‹è¯•ä¸€ä¸‹æˆ–者é¿å…使用å¤åˆ¶ç²˜å¸–。 -ä¸è¦åœ¨ä½¿ç”¨PGP/GPGç½²å的邮件ä¸åŒ…å«è¡¥ä¸ã€‚è¿™æ ·ä¼šä½¿å¾—å¾ˆå¤šè„šæœ¬ä¸èƒ½è¯»å–å’Œé€‚ç”¨äºŽä½ çš„è¡¥ä¸ã€‚ -（这个问题应该是å¯ä»¥ä¿®å¤çš„） +ä¸è¦åœ¨ä½¿ç”¨PGP/GPGç¾å的邮件ä¸åŒ…å«è¡¥ä¸ã€‚è¿™æ ·ä¼šä½¿å¾—å¾ˆå¤šè„šæœ¬ä¸èƒ½è¯»å–å’Œé€‚ç”¨äºŽä½ çš„ +è¡¥ä¸ã€‚（这个问题应该是å¯ä»¥ä¿®å¤çš„） åœ¨ç»™å†…æ ¸é‚®ä»¶åˆ—è¡¨å‘é€è¡¥ä¸ä¹‹å‰ï¼Œç»™è‡ªå·±å‘é€ä¸€ä¸ªè¡¥ä¸æ˜¯ä¸ªä¸é”™çš„主æ„，ä¿å˜æŽ¥æ”¶åˆ°çš„ 邮件，将补ä¸ç”¨'patch'命令打上，如果æˆåŠŸäº†ï¼Œå†ç»™å†…æ ¸é‚®ä»¶åˆ—è¡¨å‘é€ã€‚ @@ -58,98 +66,133 @@ Linuxå†…æ ¸è¡¥ä¸æ˜¯é€šè¿‡é‚®ä»¶è¢«æ交的，最好把补ä¸ä½œä¸ºé‚®ä»¶ä½“çš„ 一些邮件客户端æ示 ------------------ + 这里给出一些详细的MUAé…ç½®æ示，å¯ä»¥ç”¨äºŽç»™Linuxå†…æ ¸å‘é€è¡¥ä¸ã€‚这些并ä¸æ„味是 所有的软件包é…置总结。 说明： -TUI = ä»¥æ–‡æœ¬ä¸ºåŸºç¡€çš„ç”¨æˆ·æŽ¥å£ -GUI = 图形界é¢ç”¨æˆ·æŽ¥å£ + +- TUI = ä»¥æ–‡æœ¬ä¸ºåŸºç¡€çš„ç”¨æˆ·æŽ¥å£ +- GUI = 图形界é¢ç”¨æˆ·æŽ¥å£ Alpine (TUI) -~~~~~~~~~~~~ +************ é…置选项： -在"Sending Preferences"部分： -- "Do Not Send Flowed Text"å¿…é¡»å¼€å¯ -- "Strip Whitespace Before Sending"å¿…é¡»å…³é— +在 :menuselection:`Sending Preferences` èœå•ï¼š + +- :menuselection:`Do Not Send Flowed Text` å¿…é¡»å¼€å¯ +- :menuselection:`Strip Whitespace Before Sending` å¿…é¡»å…³é— + +å½“å†™é‚®ä»¶æ—¶ï¼Œå…‰æ ‡åº”è¯¥æ”¾åœ¨è¡¥ä¸ä¼šå‡ºçŽ°çš„地方，然åŽæŒ‰ä¸‹ :kbd:`CTRL-R` 组åˆé”®ï¼Œä½¿æŒ‡ +定的补ä¸æ–‡ä»¶åµŒå…¥åˆ°é‚®ä»¶ä¸ã€‚ + +Claws Mail (GUI) +**************** + +å¯ä»¥ç”¨ï¼Œæœ‰äººç”¨å®ƒæˆåŠŸåœ°å‘过补ä¸ã€‚ -å½“å†™é‚®ä»¶æ—¶ï¼Œå…‰æ ‡åº”è¯¥æ”¾åœ¨è¡¥ä¸ä¼šå‡ºçŽ°çš„地方，然åŽæŒ‰ä¸‹CTRL-R组åˆé”®ï¼Œä½¿æŒ‡å®šçš„ -è¡¥ä¸æ–‡ä»¶åµŒå…¥åˆ°é‚®ä»¶ä¸ã€‚ +用 :menuselection:`Message-->Insert File` (:kbd:`CTRL-I`) 或外置编辑器æ’入补ä¸ã€‚ + +è‹¥è¦åœ¨Claws编辑窗å£é‡ä¿®æ”¹æ’入的补ä¸ï¼Œéœ€å…³é— +:menuselection:`Configuration-->Preferences-->Compose-->Wrapping` +çš„ `Auto wrapping` 。 Evolution (GUI) -~~~~~~~~~~~~~~~ +*************** -一些开å‘者æˆåŠŸçš„使用它å‘é€è¡¥ä¸ +一些开å‘者æˆåŠŸçš„使用它å‘é€è¡¥ä¸ã€‚ -当选择邮件选项：Preformat - 从Format->Heading->Preformatted (Ctrl-7)或者工具æ +撰写邮件时： +从 :menuselection:`æ ¼å¼-->段è½æ ·å¼-->é¢„æ ¼å¼åŒ–` (:kbd:`CTRL-7`) +或工具æ 选择 :menuselection:`é¢„æ ¼å¼åŒ–` ï¼› 然åŽä½¿ç”¨ï¼š - Insert->Text File... (Alt-n x)æ’入补ä¸æ–‡ä»¶ã€‚ +:menuselection:`æ’å…¥-->文本文件...` (:kbd:`ALT-N x`) æ’入补ä¸æ–‡ä»¶ã€‚ -ä½ è¿˜å¯ä»¥"diff -Nru old.c new.c | xclip"，选择Preformat，然åŽä½¿ç”¨ä¸é—´é”®è¿›è¡Œç²˜å¸–。 +ä½ è¿˜å¯ä»¥ ``diff -Nru old.c new.c | xclip`` ，选择 :menuselection:`é¢„æ ¼å¼åŒ–` ， +然åŽä½¿ç”¨é¼ æ ‡ä¸é”®è¿›è¡Œç²˜å¸–。 Kmail (GUI) -~~~~~~~~~~~ +*********** 一些开å‘者æˆåŠŸçš„使用它å‘é€è¡¥ä¸ã€‚ -默认设置ä¸ä¸ºHTMLæ ¼å¼æ˜¯åˆé€‚çš„ï¼›ä¸è¦å¯ç”¨å®ƒã€‚ +默认撰写设置ç¦ç”¨HTMLæ ¼å¼æ˜¯åˆé€‚çš„ï¼›ä¸è¦å¯ç”¨å®ƒã€‚ -当书写一å°é‚®ä»¶çš„时候，在选项下é¢ä¸è¦é€‰æ‹©è‡ªåŠ¨æ¢è¡Œã€‚å”¯ä¸€çš„ç¼ºç‚¹å°±æ˜¯ä½ åœ¨é‚®ä»¶ä¸è¾“入的任何文本 -都ä¸ä¼šè¢«è‡ªåŠ¨æ¢è¡Œï¼Œå› æ¤ä½ 必须在å‘é€è¡¥ä¸ä¹‹å‰æ‰‹åŠ¨æ¢è¡Œã€‚最简å•çš„方法就是å¯ç”¨è‡ªåŠ¨æ¢è¡Œæ¥ä¹¦å†™é‚®ä»¶ï¼Œ -然åŽæŠŠå®ƒä¿å˜ä¸ºè‰ç¨¿ã€‚ä¸€æ—¦ä½ åœ¨è‰ç¨¿ä¸å†æ¬¡æ‰“开它，它已ç»å…¨éƒ¨è‡ªåŠ¨æ¢è¡Œäº†ï¼Œé‚£ä¹ˆä½ 的邮件虽然没有 -选择自动æ¢è¡Œï¼Œä½†æ˜¯è¿˜ä¸ä¼šå¤±åŽ»å·²æœ‰çš„自动æ¢è¡Œã€‚ +当书写一å°é‚®ä»¶çš„时候，在选项下é¢ä¸è¦é€‰æ‹©è‡ªåŠ¨æ¢è¡Œã€‚å”¯ä¸€çš„ç¼ºç‚¹å°±æ˜¯ä½ åœ¨é‚®ä»¶ä¸è¾“ +入的任何文本都ä¸ä¼šè¢«è‡ªåŠ¨æ¢è¡Œï¼Œå› æ¤ä½ 必须在å‘é€è¡¥ä¸ä¹‹å‰æ‰‹åŠ¨æ¢è¡Œã€‚最简å•çš„方法 +就是å¯ç”¨è‡ªåŠ¨æ¢è¡Œæ¥ä¹¦å†™é‚®ä»¶ï¼Œç„¶åŽæŠŠå®ƒä¿å˜ä¸ºè‰ç¨¿ã€‚ä¸€æ—¦ä½ åœ¨è‰ç¨¿ä¸å†æ¬¡æ‰“开它，它 +å·²ç»å…¨éƒ¨è‡ªåŠ¨æ¢è¡Œäº†ï¼Œé‚£ä¹ˆä½ 的邮件虽然没有选择自动æ¢è¡Œï¼Œä½†æ˜¯è¿˜ä¸ä¼šå¤±åŽ»å·²æœ‰çš„自 +动æ¢è¡Œã€‚ -在邮件的底部，æ’入补ä¸ä¹‹å‰ï¼Œæ”¾ä¸Šå¸¸ç”¨çš„è¡¥ä¸å®šç•Œç¬¦ï¼šä¸‰ä¸ªè¿žå—å·(---)。 +在邮件的底部，æ’入补ä¸ä¹‹å‰ï¼Œæ”¾ä¸Šå¸¸ç”¨çš„è¡¥ä¸å®šç•Œç¬¦ï¼šä¸‰ä¸ªè¿žå—符(``---``)。 -然åŽåœ¨"Message"èœå•æ¡ç›®ï¼Œé€‰æ‹©æ’入文件，接ç€é€‰å–ä½ çš„è¡¥ä¸æ–‡ä»¶ã€‚还有一个é¢å¤–çš„é€‰é¡¹ï¼Œä½ å¯ä»¥ -通过它é…ç½®ä½ çš„é‚®ä»¶å»ºç«‹å·¥å…·æ èœå•ï¼Œè¿˜å¯ä»¥å¸¦ä¸Š"insert file"å›¾æ ‡ã€‚ +然åŽåœ¨ :menuselection:`信件` èœå•ï¼Œé€‰æ‹© :menuselection:`æ’入文本文件` ，接 +ç€é€‰å–ä½ çš„è¡¥ä¸æ–‡ä»¶ã€‚还有一个é¢å¤–çš„é€‰é¡¹ï¼Œä½ å¯ä»¥é€šè¿‡å®ƒé…ç½®ä½ çš„åˆ›å»ºæ–°é‚®ä»¶å·¥å…·æ ， +åŠ ä¸Š :menuselection:`æ’入文本文件` å›¾æ ‡ã€‚ -ä½ å¯ä»¥å®‰å…¨åœ°é€šè¿‡GPGæ ‡è®°é™„ä»¶ï¼Œä½†æ˜¯å†…åµŒè¡¥ä¸æœ€å¥½ä¸è¦ä½¿ç”¨GPGæ ‡è®°å®ƒä»¬ã€‚ä½œä¸ºå†…åµŒæ–‡æœ¬çš„ç¾å‘è¡¥ä¸ï¼Œ -当从GPGä¸æå–7ä½ç¼–ç 时会使他们å˜çš„æ›´åŠ å¤æ‚。 +将编辑器窗å£æ‹‰åˆ°è¶³å¤Ÿå®½é¿å…折行。对于KMail 1.13.5 (KDE 4.5.4)，它会在å‘é€é‚®ä»¶ +时对编辑器窗å£ä¸æ˜¾ç¤ºæŠ˜è¡Œçš„地方自动æ¢è¡Œã€‚在选项èœå•ä¸å–消自动æ¢è¡Œä»ä¸èƒ½è§£å†³ã€‚ +å› æ¤ï¼Œå¦‚æžœä½ çš„è¡¥ä¸ä¸æœ‰éžå¸¸é•¿çš„行，必须在å‘é€ä¹‹å‰æŠŠç¼–辑器窗å£æ‹‰å¾—éžå¸¸å®½ã€‚ +å‚è§ï¼šhttps://bugs.kde.org/show_bug.cgi?id=174034 -å¦‚æžœä½ éžè¦ä»¥é™„件的形å¼å‘é€è¡¥ä¸ï¼Œé‚£ä¹ˆå°±å³é”®ç‚¹å‡»é™„件，然åŽé€‰ä¸å±žæ€§ï¼Œçªå‡º"Suggest automatic -display"ï¼Œè¿™æ ·å†…åµŒé™„ä»¶æ›´å®¹æ˜“è®©è¯»è€…çœ‹åˆ°ã€‚ +ä½ å¯ä»¥å®‰å…¨åœ°ç”¨GPGç¾å附件，但是内嵌补ä¸æœ€å¥½ä¸è¦ä½¿ç”¨GPGç¾å它们。作为内嵌文本 +æ’入的ç¾åè¡¥ä¸å°†ä½¿å…¶éš¾ä»¥ä»Ž7-bitç¼–ç ä¸æå–。 -å½“ä½ è¦ä¿å˜å°†è¦å‘é€çš„内嵌文本补ä¸ï¼Œä½ å¯ä»¥ä»Žæ¶ˆæ¯åˆ—è¡¨çª—æ ¼é€‰æ‹©åŒ…å«è¡¥ä¸çš„邮件，然åŽå³å‡»é€‰æ‹© -"save as"ã€‚ä½ å¯ä»¥ä½¿ç”¨ä¸€ä¸ªæ²¡æœ‰æ›´æ”¹çš„包å«è¡¥ä¸çš„邮件，如果它是以æ£ç¡®çš„å½¢å¼ç»„æˆã€‚å½“ä½ æ£çœŸåœ¨å®ƒ -自己的窗å£ä¹‹ä¸‹å¯Ÿçœ‹ï¼Œé‚£æ—¶æ²¡æœ‰é€‰é¡¹å¯ä»¥ä¿å˜é‚®ä»¶--å·²ç»æœ‰ä¸€ä¸ªè¿™æ ·çš„bug被汇报到了kmailçš„bugzilla -并且希望这将会被处ç†ã€‚邮件是以åªé’ˆå¯¹æŸä¸ªç”¨æˆ·å¯è¯»å†™çš„æƒé™è¢«ä¿å˜çš„ï¼Œæ‰€ä»¥å¦‚æžœä½ æƒ³æŠŠé‚®ä»¶å¤åˆ¶åˆ°å…¶ä»–地方， -ä½ ä¸å¾—ä¸æŠŠä»–们的æƒé™æ”¹ä¸ºç»„或者整体å¯è¯»ã€‚ +å¦‚æžœä½ éžè¦ä»¥é™„件的形å¼å‘é€è¡¥ä¸ï¼Œé‚£ä¹ˆå°±å³é”®ç‚¹å‡»é™„件，然åŽé€‰æ‹© +:menuselection:`属性` ，打开 :menuselection:`建议自动显示` ，使附件内è”更容 +易让读者看到。 + +å½“ä½ è¦ä¿å˜å°†è¦å‘é€çš„内嵌文本补ä¸ï¼Œä½ å¯ä»¥ä»Žæ¶ˆæ¯åˆ—è¡¨çª—æ ¼é€‰æ‹©åŒ…å«è¡¥ä¸çš„邮件，然 +åŽå³é”®é€‰æ‹© :menuselection:`å¦å˜ä¸º` 。如果整个电å邮件的组æˆæ£ç¡®ï¼Œæ‚¨å¯ç›´æŽ¥å°† +其作为补ä¸ä½¿ç”¨ã€‚电å邮件以当å‰ç”¨æˆ·å¯è¯»å†™æƒé™ä¿å˜ï¼Œå› æ¤æ‚¨å¿…é¡» ``chmod`` ，以 +使其在å¤åˆ¶åˆ°åˆ«å¤„时用户组和其他人å¯è¯»ã€‚ Lotus Notes (GUI) -~~~~~~~~~~~~~~~~~ +***************** ä¸è¦ä½¿ç”¨å®ƒã€‚ +IBM Verse (Web GUI) +******************* + +åŒä¸Šæ¡ã€‚ + Mutt (TUI) -~~~~~~~~~~ +********** + +很多Linuxå¼€å‘人员使用mutt客户端，这è¯æ˜Žå®ƒè‚¯å®šå·¥ä½œå¾—éžå¸¸æ¼‚亮。 -很多Linuxå¼€å‘人员使用mutt客户端，所以è¯æ˜Žå®ƒè‚¯å®šå·¥ä½œçš„éžå¸¸æ¼‚亮。 +Muttä¸è‡ªå¸¦ç¼–辑器，所以ä¸ç®¡ä½ 使用什么编辑器，ä¸è‡ªåŠ¨æ–行就行。大多数编辑器都有 +:menuselection:`æ’入文件` 选项，它å¯ä»¥åœ¨ä¸æ”¹å˜æ–‡ä»¶å†…容的情况下æ’入文件。 -Muttä¸è‡ªå¸¦ç¼–辑器，所以ä¸ç®¡ä½ 使用什么编辑器都ä¸åº”该带有自动æ–行。大多数编辑器都带有 -一个"insert file"选项，它å¯ä»¥é€šè¿‡ä¸æ”¹å˜æ–‡ä»¶å†…容的方å¼æ’入文件。 +用 ``vim`` 作为mutt的编辑器:: -'vim'作为mutt的编辑器： set editor="vi" - 如果使用xclip，敲入以下命令 +如果使用xclip，敲入以下命令:: + :set paste - 按ä¸é”®ä¹‹å‰æˆ–者shift-insert或者使用 + +然åŽå†æŒ‰ä¸é”®æˆ–者shift-insert或者使用:: + :r filename -如果想è¦æŠŠè¡¥ä¸ä½œä¸ºå†…嵌文本。 -(a)ttach工作的很好，ä¸å¸¦æœ‰"set paste"。 +把补ä¸æ’入为内嵌文本。 +在未设置 ``set paste`` æ—¶(a)ttach工作的很好。 ä½ å¯ä»¥é€šè¿‡ ``git format-patch`` 生æˆè¡¥ä¸ï¼Œç„¶åŽç”¨ Muttå‘é€å®ƒä»¬:: - $ mutt -H 0001-some-bug-fix.patch + $ mutt -H 0001-some-bug-fix.patch é…置选项： + 它应该以默认设置的形å¼å·¥ä½œã€‚ -然而，把"send_charset"设置为"us-ascii::utf-8"也是一个ä¸é”™çš„主æ„。 +然而，把 ``send_charset`` 设置一下也是一个ä¸é”™çš„主æ„:: + + set send_charset="us-ascii:utf-8" Mutt 是高度å¯é…置的。 这里是个使用mutt通过 Gmail å‘é€çš„è¡¥ä¸çš„最å°é…ç½®:: @@ -178,71 +221,107 @@ Mutt 是高度å¯é…置的。 这里是个使用mutt通过 Gmail å‘é€çš„è¡¥ä¸ set from = "username@gmail.com" set use_from = yes -Mutt文档å«æœ‰æ›´å¤šä¿¡æ¯: +Mutt文档å«æœ‰æ›´å¤šä¿¡æ¯ï¼š - http://dev.mutt.org/trac/wiki/UseCases/Gmail + https://gitlab.com/muttmua/mutt/-/wikis/UseCases/Gmail - http://dev.mutt.org/doc/manual.html + http://www.mutt.org/doc/manual/ Pine (TUI) -~~~~~~~~~~ +********** Pineè¿‡åŽ»æœ‰ä¸€äº›ç©ºæ ¼åˆ å‡é—®é¢˜ï¼Œä½†æ˜¯è¿™äº›çŽ°åœ¨åº”该都被修å¤äº†ã€‚ -如果å¯ä»¥ï¼Œè¯·ä½¿ç”¨alpine(pine的继承者) +如果å¯ä»¥ï¼Œè¯·ä½¿ç”¨alpine（pine的继承者）。 é…置选项： -- 最近的版本需è¦æ¶ˆé™¤æµç¨‹æ–‡æœ¬ -- "no-strip-whitespace-before-send"选项也是需è¦çš„。 + +- æœ€è¿‘çš„ç‰ˆæœ¬éœ€è¦ ``quell-flowed-text`` +- ``no-strip-whitespace-before-send`` 选项也是需è¦çš„。 Sylpheed (GUI) -~~~~~~~~~~~~~~ +************** - 内嵌文本å¯ä»¥å¾ˆå¥½çš„工作（或者使用附件）。 - å…许使用外部的编辑器。 -- 对于目录较多时éžå¸¸æ…¢ã€‚ +- 收件箱较多时éžå¸¸æ…¢ã€‚ - 如果通过non-SSLè¿žæŽ¥ï¼Œæ— æ³•ä½¿ç”¨TLS SMTP授æƒã€‚ -- 在组æˆçª—å£ä¸æœ‰ä¸€ä¸ªå¾ˆæœ‰ç”¨çš„ruler bar。 -- 给地å€æœ¬ä¸æ·»åŠ 地å€å°±ä¸ä¼šæ£ç¡®çš„了解显示å。 +- 撰写窗å£çš„æ ‡å°ºå¾ˆæœ‰ç”¨ã€‚ +- 将地å€æ·»åŠ åˆ°é€šè®¯ç°¿æ—¶æ— æ³•æ£ç¡®ç†è§£æ˜¾ç¤ºçš„å称。 Thunderbird (GUI) -~~~~~~~~~~~~~~~~~ +***************** + +Thunderbird是Outlook的克隆版本，它很容易æŸå文本，但也有一些方法强制修æ£ã€‚ + +在完æˆä¿®æ”¹åŽï¼ˆåŒ…括安装扩展），您需è¦é‡æ–°å¯åŠ¨Thunderbird。 + +- å…许使用外部编辑器： + + 使用Thunderbirdå‘è¡¥ä¸æœ€ç®€å•çš„方法是使用扩展æ¥æ‰“开您最喜欢的外部编辑器。 + + 下é¢æ˜¯ä¸€äº›èƒ½å¤Ÿåšåˆ°è¿™ä¸€ç‚¹çš„æ‰©å±•æ ·ä¾‹ã€‚ + + - “External Editor Revived†+ + https://github.com/Frederick888/external-editor-revived + + https://addons.thunderbird.net/en-GB/thunderbird/addon/external-editor-revived/ + + 它需è¦å®‰è£…“本地消æ¯ä¸»æœºï¼ˆnative messaging host）â€ã€‚ + å‚è§ä»¥ä¸‹æ–‡æ¡£: + https://github.com/Frederick888/external-editor-revived/wiki + + - “External Editor†+ + https://github.com/exteditor/exteditor + + 下载并安装æ¤æ‰©å±•ï¼Œç„¶åŽæ‰“å¼€ :menuselection:`新建消æ¯` 窗å£, 用 + :menuselection:`查看-->工具æ -->自定义...` ç»™å®ƒå¢žåŠ ä¸€ä¸ªæŒ‰é’®ï¼Œç›´æŽ¥ç‚¹å‡»æ¤ + 按钮å³å¯ä½¿ç”¨å¤–置编辑器。 + + 请注æ„，“External Editorâ€è¦æ±‚ä½ çš„ç¼–è¾‘å™¨ä¸èƒ½fork，æ¢å¥è¯è¯´ï¼Œç¼–辑器必须在 + å…³é—å‰ä¸è¿”å›žã€‚ä½ å¯èƒ½éœ€è¦ä¼ 递é¢å¤–çš„å‚数或修改编辑器设置。最值得注æ„的是， + 如果您使用的是gvim，那么您必须将 :menuselection:`external editor` 设置的 + 编辑器å—段设置为 ``/usr/bin/gvim --nofork"`` （å‡è®¾å¯æ‰§è¡Œæ–‡ä»¶åœ¨ + ``/usr/bin`` ï¼‰ï¼Œä»¥ä¼ é€’ ``-f`` å‚数。如果您æ£åœ¨ä½¿ç”¨å…¶ä»–编辑器，请阅读其 + 手册了解如何处ç†ã€‚ -默认情况下，thunderbird很容易æŸå文本，但是还有一些方法å¯ä»¥å¼ºåˆ¶å®ƒå˜å¾—更好。 +è‹¥è¦ä¿®æ£å†…部编辑器，请执行以下æ“作： -- 在用户å¸å·è®¾ç½®é‡Œï¼Œç»„æˆå’Œå¯»å€ï¼Œä¸è¦é€‰æ‹©"Compose messages in HTML format"。 +- ä¿®æ”¹ä½ çš„Thunderbird设置，ä¸è¦ä½¿ç”¨ ``format=flowed`` ï¼ + 回到主窗å£ï¼ŒæŒ‰ç…§ + :menuselection:`主èœå•-->首选项-->常规-->é…置编辑器...` + 打开Thunderbirdçš„é…置编辑器。 -- ç¼–è¾‘ä½ çš„Thunderbirdé…置设置æ¥ä½¿å®ƒä¸è¦æ‹†è¡Œä½¿ç”¨ï¼šuser_pref("mailnews.wraplength", 0); + - å°† ``mailnews.send_plaintext_flowed`` 设为 ``false`` -- ç¼–è¾‘ä½ çš„Thunderbirdé…置设置，使它ä¸è¦ä½¿ç”¨"format=flowed"æ ¼å¼ï¼šuser_pref("mailnews. - send_plaintext_flowed", false); + - å°† ``mailnews.wraplength`` 从 ``72`` 改为 ``0`` -- ä½ éœ€è¦ä½¿Thunderbirdå˜ä¸ºé¢„å…ˆæ ¼å¼æ–¹å¼ï¼š - å¦‚æžœé»˜è®¤æƒ…å†µä¸‹ä½ ä¹¦å†™çš„æ˜¯HTMLæ ¼å¼ï¼Œé‚£ä¸æ˜¯å¾ˆéš¾ã€‚ä»…ä»…ä»Žæ ‡é¢˜æ 的下拉框ä¸é€‰æ‹©"Preformat"æ ¼å¼ã€‚ - å¦‚æžœé»˜è®¤æƒ…å†µä¸‹ä½ ä¹¦å†™çš„æ˜¯æ–‡æœ¬æ ¼å¼ï¼Œä½ ä¸å¾—把它改为HTMLæ ¼å¼ï¼ˆä»…仅作为一次性的）æ¥ä¹¦å†™æ–°çš„消æ¯ï¼Œ - 然åŽå¼ºåˆ¶ä½¿å®ƒå›žåˆ°æ–‡æœ¬æ ¼å¼ï¼Œå¦åˆ™å®ƒå°±ä¼šæ‹†è¡Œã€‚è¦å®žçŽ°å®ƒï¼Œåœ¨å†™ä¿¡çš„å›¾æ ‡ä¸Šä½¿ç”¨shifté”®æ¥ä½¿å®ƒå˜ä¸ºHTML - æ ¼å¼ï¼Œç„¶åŽæ ‡é¢˜æ 的下拉框ä¸é€‰æ‹©"Preformat"æ ¼å¼ã€‚ +- ä¸è¦å†™HTMLé‚®ä»¶ï¼ + 回到主窗å£ï¼Œæ‰“å¼€ + :menuselection:`主èœå•-->账户设置-->ä½ çš„@邮件.地å€-->通讯录/编写&地å€ç°¿` ， + 关掉 ``以HTMLæ ¼å¼ç¼–写消æ¯`` 。 -- å…许使用外部的编辑器： - 针对Thunderbird打补ä¸æœ€ç®€å•çš„方法就是使用一个"external editor"扩展，然åŽä½¿ç”¨ä½ 最喜欢的 - $EDITORæ¥è¯»å–或者åˆå¹¶è¡¥ä¸åˆ°æ–‡æœ¬ä¸ã€‚è¦å®žçŽ°å®ƒï¼Œå¯ä»¥ä¸‹è½½å¹¶ä¸”安装这个扩展，然åŽæ·»åŠ 一个使用它的 - 按键View->Toolbars->Customize...最åŽå½“ä½ ä¹¦å†™ä¿¡æ¯çš„时候仅仅点击它就å¯ä»¥äº†ã€‚ +- åªç”¨çº¯æ–‡æœ¬æ ¼å¼æŸ¥çœ‹é‚®ä»¶ï¼ + 回到主窗å£ï¼Œ :menuselection:`主èœå•-->查看-->消æ¯ä½“为-->纯文本` ï¼ TkRat (GUI) -~~~~~~~~~~~ +*********** å¯ä»¥ä½¿ç”¨å®ƒã€‚使用"Insert file..."或者外部的编辑器。 Gmail (Web GUI) -~~~~~~~~~~~~~~~ +*************** ä¸è¦ä½¿ç”¨å®ƒå‘é€è¡¥ä¸ã€‚ Gmail网页客户端自动地把制表符转æ¢ä¸ºç©ºæ ¼ã€‚ -虽然制表符转æ¢ä¸ºç©ºæ ¼é—®é¢˜å¯ä»¥è¢«å¤–部编辑器解决，åŒæ—¶å®ƒè¿˜ä¼šä½¿ç”¨å›žè½¦æ¢è¡ŒæŠŠæ¯è¡Œæ‹†åˆ†ä¸º78个å—符。 +虽然制表符转æ¢ä¸ºç©ºæ ¼é—®é¢˜å¯ä»¥è¢«å¤–部编辑器解决，但它åŒæ—¶è¿˜ä¼šä½¿ç”¨å›žè½¦æ¢è¡ŒæŠŠæ¯è¡Œ +拆分为78个å—符。 -å¦ä¸€ä¸ªé—®é¢˜æ˜¯Gmail还会把任何ä¸æ˜¯ASCIIçš„å—符的信æ¯æ”¹ä¸ºbase64ç¼–ç 。它把东西å˜çš„åƒæ¬§æ´²äººçš„åå—。 +å¦ä¸€ä¸ªé—®é¢˜æ˜¯Gmail还会把任何å«æœ‰éžASCIIçš„å—符的消æ¯æ”¹ç”¨base64ç¼–ç ，如欧洲人的 +åå—。 - ### diff --git a/Documentation/translations/zh_CN/process/magic-number.rst b/Documentation/translations/zh_CN/process/magic-number.rst index 42f0635ca70a..0617ce125e12 100644 --- a/Documentation/translations/zh_CN/process/magic-number.rst +++ b/Documentation/translations/zh_CN/process/magic-number.rst @@ -58,87 +58,17 @@ Linux é”术数 é”术数å æ•°å— ç»“æž„ 文件 ===================== ================ ======================== ========================================== PG_MAGIC 'P' pg_{read,write}_hdr ``include/linux/pg.h`` -CMAGIC 0x0111 user ``include/linux/a.out.h`` -MKISS_DRIVER_MAGIC 0x04bf mkiss_channel ``drivers/net/mkiss.h`` -HDLC_MAGIC 0x239e n_hdlc ``drivers/char/n_hdlc.c`` APM_BIOS_MAGIC 0x4101 apm_user ``arch/x86/kernel/apm_32.c`` -DB_MAGIC 0x4442 fc_info ``drivers/net/iph5526_novram.c`` -DL_MAGIC 0x444d fc_info ``drivers/net/iph5526_novram.c`` FASYNC_MAGIC 0x4601 fasync_struct ``include/linux/fs.h`` -FF_MAGIC 0x4646 fc_info ``drivers/net/iph5526_novram.c`` -PTY_MAGIC 0x5001 ``drivers/char/pty.c`` -PPP_MAGIC 0x5002 ppp ``include/linux/if_pppvar.h`` -SSTATE_MAGIC 0x5302 serial_state ``include/linux/serial.h`` SLIP_MAGIC 0x5302 slip ``drivers/net/slip.h`` -STRIP_MAGIC 0x5303 strip ``drivers/net/strip.c`` -SIXPACK_MAGIC 0x5304 sixpack ``drivers/net/hamradio/6pack.h`` -AX25_MAGIC 0x5316 ax_disp ``drivers/net/mkiss.h`` -TTY_MAGIC 0x5401 tty_struct ``include/linux/tty.h`` -MGSL_MAGIC 0x5401 mgsl_info ``drivers/char/synclink.c`` -TTY_DRIVER_MAGIC 0x5402 tty_driver ``include/linux/tty_driver.h`` MGSLPC_MAGIC 0x5402 mgslpc_info ``drivers/char/pcmcia/synclink_cs.c`` -USB_SERIAL_MAGIC 0x6702 usb_serial ``drivers/usb/serial/usb-serial.h`` -FULL_DUPLEX_MAGIC 0x6969 ``drivers/net/ethernet/dec/tulip/de2104x.c`` -USB_BLUETOOTH_MAGIC 0x6d02 usb_bluetooth ``drivers/usb/class/bluetty.c`` -RFCOMM_TTY_MAGIC 0x6d02 ``net/bluetooth/rfcomm/tty.c`` -USB_SERIAL_PORT_MAGIC 0x7301 usb_serial_port ``drivers/usb/serial/usb-serial.h`` -CG_MAGIC 0x00090255 ufs_cylinder_group ``include/linux/ufs_fs.h`` -LSEMAGIC 0x05091998 lse ``drivers/fc4/fc.c`` -GDTIOCTL_MAGIC 0x06030f07 gdth_iowr_str ``drivers/scsi/gdth_ioctl.h`` -RIEBL_MAGIC 0x09051990 ``drivers/net/atarilance.c`` -NBD_REQUEST_MAGIC 0x12560953 nbd_request ``include/linux/nbd.h`` -RED_MAGIC2 0x170fc2a5 (any) ``mm/slab.c`` BAYCOM_MAGIC 0x19730510 baycom_state ``drivers/net/baycom_epp.c`` -ISDN_X25IFACE_MAGIC 0x1e75a2b9 isdn_x25iface_proto_data ``drivers/isdn/isdn_x25iface.h`` -ECP_MAGIC 0x21504345 cdkecpsig ``include/linux/cdk.h`` -LSOMAGIC 0x27091997 lso ``drivers/fc4/fc.c`` -LSMAGIC 0x2a3b4d2a ls ``drivers/fc4/fc.c`` -WANPIPE_MAGIC 0x414C4453 sdla_{dump,exec} ``include/linux/wanpipe.h`` -CS_CARD_MAGIC 0x43525553 cs_card ``sound/oss/cs46xx.c`` -LABELCL_MAGIC 0x4857434c labelcl_info_s ``include/asm/ia64/sn/labelcl.h`` -ISDN_ASYNC_MAGIC 0x49344C01 modem_info ``include/linux/isdn.h`` -CTC_ASYNC_MAGIC 0x49344C01 ctc_tty_info ``drivers/s390/net/ctctty.c`` -ISDN_NET_MAGIC 0x49344C02 isdn_net_local_s ``drivers/isdn/i4l/isdn_net_lib.h`` -SAVEKMSG_MAGIC2 0x4B4D5347 savekmsg ``arch/*/amiga/config.c`` -CS_STATE_MAGIC 0x4c4f4749 cs_state ``sound/oss/cs46xx.c`` -SLAB_C_MAGIC 0x4f17a36d kmem_cache ``mm/slab.c`` -COW_MAGIC 0x4f4f4f4d cow_header_v1 ``arch/um/drivers/ubd_user.c`` -I810_CARD_MAGIC 0x5072696E i810_card ``sound/oss/i810_audio.c`` -TRIDENT_CARD_MAGIC 0x5072696E trident_card ``sound/oss/trident.c`` -ROUTER_MAGIC 0x524d4157 wan_device [in ``wanrouter.h`` pre 3.9] -SAVEKMSG_MAGIC1 0x53415645 savekmsg ``arch/*/amiga/config.c`` -GDA_MAGIC 0x58464552 gda ``arch/mips/include/asm/sn/gda.h`` -RED_MAGIC1 0x5a2cf071 (any) ``mm/slab.c`` -EEPROM_MAGIC_VALUE 0x5ab478d2 lanai_dev ``drivers/atm/lanai.c`` HDLCDRV_MAGIC 0x5ac6e778 hdlcdrv_state ``include/linux/hdlcdrv.h`` -PCXX_MAGIC 0x5c6df104 channel ``drivers/char/pcxx.h`` KV_MAGIC 0x5f4b565f kernel_vars_s ``arch/mips/include/asm/sn/klkernvars.h`` -I810_STATE_MAGIC 0x63657373 i810_state ``sound/oss/i810_audio.c`` -TRIDENT_STATE_MAGIC 0x63657373 trient_state ``sound/oss/trident.c`` -M3_CARD_MAGIC 0x646e6f50 m3_card ``sound/oss/maestro3.c`` -FW_HEADER_MAGIC 0x65726F66 fw_header ``drivers/atm/fore200e.h`` -SLOT_MAGIC 0x67267321 slot ``drivers/hotplug/cpqphp.h`` -SLOT_MAGIC 0x67267322 slot ``drivers/hotplug/acpiphp.h`` -LO_MAGIC 0x68797548 nbd_device ``include/linux/nbd.h`` -M3_STATE_MAGIC 0x734d724d m3_state ``sound/oss/maestro3.c`` -VMALLOC_MAGIC 0x87654320 snd_alloc_track ``sound/core/memory.c`` -KMALLOC_MAGIC 0x87654321 snd_alloc_track ``sound/core/memory.c`` -PWC_MAGIC 0x89DC10AB pwc_device ``drivers/usb/media/pwc.h`` -NBD_REPLY_MAGIC 0x96744668 nbd_reply ``include/linux/nbd.h`` -ENI155_MAGIC 0xa54b872d midway_eprom ``drivers/atm/eni.h`` CODA_MAGIC 0xC0DAC0DA coda_file_info ``fs/coda/coda_fs_i.h`` -DPMEM_MAGIC 0xc0ffee11 gdt_pci_sram ``drivers/scsi/gdth.h`` YAM_MAGIC 0xF10A7654 yam_port ``drivers/net/hamradio/yam.c`` CCB_MAGIC 0xf2691ad2 ccb ``drivers/scsi/ncr53c8xx.c`` QUEUE_MAGIC_FREE 0xf7e1c9a3 queue_entry ``drivers/scsi/arm/queue.c`` QUEUE_MAGIC_USED 0xf7e1cc33 queue_entry ``drivers/scsi/arm/queue.c`` -HTB_CMAGIC 0xFEFAFEF1 htb_class ``net/sched/sch_htb.c`` NMI_MAGIC 0x48414d4d455201 nmi_s ``arch/mips/include/asm/sn/nmi.h`` ===================== ================ ======================== ========================================== - - -请注æ„，在声音记忆管ç†ä¸ä»ç„¶æœ‰ä¸€äº›ç‰¹æ®Šçš„为æ¯ä¸ªé©±åŠ¨å®šä¹‰çš„é”术值。查看include/sound/sndmagic.hæ¥èŽ·å–他们完整的列表信æ¯ã€‚很多OSS声音驱动拥有自己从声å¡PCI ID构建的é”术值-他们也没有被列在这里。 - -IrDAå系统也使用了大é‡çš„自己的é”术值，查看include/net/irda/irda.hæ¥èŽ·å–他们完整的信æ¯ã€‚ - -HFS是å¦å¤–一个比较大的使用é”术值的文件系统-ä½ å¯ä»¥åœ¨fs/hfs/hfs.hä¸æ‰¾åˆ°ä»–们。 diff --git a/Documentation/translations/zh_CN/process/submit-checklist.rst b/Documentation/translations/zh_CN/process/submit-checklist.rst index a64858d321fc..3d6ee21c74ae 100644 --- a/Documentation/translations/zh_CN/process/submit-checklist.rst +++ b/Documentation/translations/zh_CN/process/submit-checklist.rst @@ -1,105 +1,111 @@ .. include:: ../disclaimer-zh_CN.rst -:Original: :ref:`Documentation/process/submit-checklist.rst <submitchecklist>` -:Translator: Alex Shi <alex.shi@linux.alibaba.com> +:Original: Documentation/process/submit-checklist.rst +:Translator: + - Alex Shi <alexs@kernel.org> + - Wu XiangCheng <bobwxc@email.cn> .. _cn_submitchecklist: -Linuxå†…æ ¸è¡¥ä¸æäº¤æ¸…å• -~~~~~~~~~~~~~~~~~~~~~ +Linuxå†…æ ¸è¡¥ä¸æäº¤æ£€æŸ¥å• +~~~~~~~~~~~~~~~~~~~~~~~ 如果开å‘äººå‘˜å¸Œæœ›çœ‹åˆ°ä»–ä»¬çš„å†…æ ¸è¡¥ä¸æ交更快地被接å—，那么他们应该åšä¸€äº›åŸºæœ¬ 的事情。 -这些都是在 -:ref:`Documentation/translations/zh_CN/process/submitting-patches.rst <cn_submittingpatches>` +这些都是在 Documentation/translations/zh_CN/process/submitting-patches.rst 和其他有关æ交Linuxå†…æ ¸è¡¥ä¸çš„文档ä¸æ供的。 -1) 如果使用工具，则包括定义/声明该工具的文件。ä¸è¦ä¾èµ–于其他头文件拉入您使用 +1) 如果使用工具，则包括定义/声明该工具的文件。ä¸è¦ä¾èµ–其他头文件æ¥å¼•å…¥æ‚¨ä½¿ç”¨ 的头文件。 2) 干净的编译： - a) 使用适用或修改的 ``CONFIG`` 选项 ``=y``ã€``=m`` å’Œ ``=n`` 。没有GCC + a) 使用åˆé€‚çš„ ``CONFIG`` 选项 ``=y``ã€``=m`` å’Œ ``=n`` 。没有 ``gcc`` è¦å‘Š/错误，没有链接器è¦å‘Š/错误。 - b) 通过allnoconfigã€allmodconfig + b) 通过 ``allnoconfig`` 〠``allmodconfig`` c) 使用 ``O=builddir`` æ—¶å¯ä»¥æˆåŠŸç¼–译 -3) 通过使用本地交å‰ç¼–译工具或其他一些构建场在多个CPU体系结构上构建。 + d) 任何 Doucmentation/ 下的å˜æ›´éƒ½èƒ½æˆåŠŸæž„建且ä¸å¼•å…¥æ–°è¦å‘Š/错误。 + 用 ``make htmldocs`` 或 ``make pdfdocs`` 检验构建情况并修å¤é—®é¢˜ã€‚ + +3) 通过使用本地交å‰ç¼–译工具或其他一些构建设施在多个CPU体系结构上构建。 4) PPC64是一ç§å¾ˆå¥½çš„交å‰ç¼–è¯‘æ£€æŸ¥ä½“ç³»ç»“æž„ï¼Œå› ä¸ºå®ƒå€¾å‘于对64ä½çš„æ•°ä½¿ç”¨æ— ç¬¦å· é•¿æ•´åž‹ã€‚ -5) 如下所述 :ref:`Documentation/translations/zh_CN/process/coding-style.rst <cn_codingstyle>`. - 检查您的补ä¸æ˜¯å¦ä¸ºå¸¸è§„æ ·å¼ã€‚在æ交（ ``scripts/check patch.pl`` ）之å‰ï¼Œ - 使用补ä¸æ ·å¼æ£€æŸ¥å™¨æ£€æŸ¥æ˜¯å¦æœ‰è½»å¾®çš„冲çªã€‚您应该能够处ç†æ‚¨çš„è¡¥ä¸ä¸å˜åœ¨çš„所有 +5) 按 Documentation/translations/zh_CN/process/coding-style.rst 所述检查您的 + è¡¥ä¸æ˜¯å¦ä¸ºå¸¸è§„æ ·å¼ã€‚在æ交之å‰ä½¿ç”¨è¡¥ä¸æ ·å¼æ£€æŸ¥å™¨ ``scripts/checkpatch.pl`` + 检查是å¦æœ‰è½»å¾®çš„冲çªã€‚您应该能够处ç†æ‚¨çš„è¡¥ä¸ä¸å˜åœ¨çš„所有 è¿è§„行为。 -6) 任何新的或修改过的 ``CONFIG`` 选项都ä¸ä¼šå¼„è„é…ç½®èœå•ï¼Œå¹¶é»˜è®¤ä¸ºå…³é—ï¼Œé™¤éž - å®ƒä»¬ç¬¦åˆ ``Documentation/kbuild/kconfig-language.rst`` ä¸è®°å½•çš„异常æ¡ä»¶, - èœå•å±žæ€§ï¼šé»˜è®¤å€¼. +6) 任何新的或修改过的 ``CONFIG`` 选项都ä¸åº”æžä¹±é…ç½®èœå•ï¼Œå¹¶é»˜è®¤ä¸ºå…³é—ï¼Œé™¤éž + å®ƒä»¬ç¬¦åˆ ``Documentation/kbuild/kconfig-language.rst`` èœå•å±žæ€§ï¼šé»˜è®¤å€¼ä¸ + 记录的例外æ¡ä»¶ã€‚ 7) 所有新的 ``kconfig`` 选项都有帮助文本。 8) 已仔细审查了相关的 ``Kconfig`` 组åˆã€‚这很难用测试æ¥çº æ£â€”—脑力在这里是有 回报的。 -9) 用 sparse 检查干净。 +9) 通过 sparse 清查。 + （å‚è§ Documentation/translations/zh_CN/dev-tools/sparse.rst ） 10) 使用 ``make checkstack`` å’Œ ``make namespacecheck`` 并修å¤ä»–们å‘现的任何 问题。 .. note:: - ``checkstack`` å¹¶æ²¡æœ‰æ˜Žç¡®æŒ‡å‡ºé—®é¢˜ï¼Œä½†æ˜¯ä»»ä½•ä¸€ä¸ªåœ¨å †æ ˆä¸Šä½¿ç”¨è¶…è¿‡512 + ``checkstack`` 并ä¸ä¼šæ˜Žç¡®æŒ‡å‡ºé—®é¢˜ï¼Œä½†æ˜¯ä»»ä½•ä¸€ä¸ªåœ¨å †æ ˆä¸Šä½¿ç”¨è¶…过512 å—节的函数都å¯ä»¥è¿›è¡Œæ›´æ”¹ã€‚ -11) 包括 :ref:`kernel-doc <kernel_doc>` å†…æ ¸æ–‡æ¡£ä»¥è®°å½•å…¨å±€å†…æ ¸API。（é™æ€å‡½æ•° - ä¸éœ€è¦ï¼Œä½†ä¹Ÿå¯ä»¥ã€‚）使用 ``make htmldocs`` 或 ``make pdfdocs`` 检查 - :ref:`kernel-doc <kernel_doc>` 并修å¤ä»»ä½•é—®é¢˜ã€‚ +11) 包括 :ref:`kernel-doc <kernel_doc_zh>` å†…æ ¸æ–‡æ¡£ä»¥è®°å½•å…¨å±€å†…æ ¸API。（é™æ€ + 函数ä¸éœ€è¦ï¼Œä½†ä¹Ÿå¯ä»¥ã€‚）使用 ``make htmldocs`` 或 ``make pdfdocs`` 检查 + :ref:`kernel-doc <kernel_doc_zh>` 并修å¤ä»»ä½•é—®é¢˜ã€‚ -12) 通过以下选项åŒæ—¶å¯ç”¨çš„测试 ``CONFIG_PREEMPT``, ``CONFIG_DEBUG_PREEMPT``, +12) 通过以下选项åŒæ—¶å¯ç”¨çš„测试： ``CONFIG_PREEMPT``, ``CONFIG_DEBUG_PREEMPT``, ``CONFIG_DEBUG_SLAB``, ``CONFIG_DEBUG_PAGEALLOC``, ``CONFIG_DEBUG_MUTEXES``, ``CONFIG_DEBUG_SPINLOCK``, ``CONFIG_DEBUG_ATOMIC_SLEEP``, - ``CONFIG_PROVE_RCU`` and ``CONFIG_DEBUG_OBJECTS_RCU_HEAD`` - -13) å·²ç»è¿‡æž„建和è¿è¡Œæ—¶æµ‹è¯•ï¼ŒåŒ…括有或没有 ``CONFIG_SMP``, ``CONFIG_PREEMPT``. + ``CONFIG_PROVE_RCU`` å’Œ ``CONFIG_DEBUG_OBJECTS_RCU_HEAD`` 。 -14) 如果补ä¸ç¨‹åºå½±å“IO/ç£ç›˜ç‰ï¼šä½¿ç”¨æˆ–ä¸ä½¿ç”¨ ``CONFIG_LBDAF`` 进行测试。 +13) 在 ``CONFIG_SMP``, ``CONFIG_PREEMPT`` å¼€å¯å’Œå…³é—的情况下都进行构建和è¿è¡Œ + 时测试。 -15) 所有代ç 路径都已在å¯ç”¨æ‰€æœ‰lockdep功能的情况下è¿è¡Œã€‚ +14) 所有代ç 路径都已在å¯ç”¨æ‰€æœ‰æ»é”检测（lockdep）功能的情况下è¿è¡Œã€‚ -16) 所有新的/procæ¡ç›®éƒ½è®°å½•åœ¨ ``Documentation/`` +15) 所有新的 ``/proc`` æ¡ç›®éƒ½è®°å½•åœ¨ ``Documentation/`` -17) æ‰€æœ‰æ–°çš„å†…æ ¸å¼•å¯¼å‚数都记录在 +16) æ‰€æœ‰æ–°çš„å†…æ ¸å¼•å¯¼å‚数都记录在 Documentation/admin-guide/kernel-parameters.rst ä¸ã€‚ -18) 所有新的模å—å‚数都记录在 ``MODULE_PARM_DESC()`` +17) 所有新的模å—å‚数都记录在 ``MODULE_PARM_DESC()`` -19) 所有新的用户空间接å£éƒ½è®°å½•åœ¨ ``Documentation/ABI/`` ä¸ã€‚有关详细信æ¯ï¼Œ +18) 所有新的用户空间接å£éƒ½è®°å½•åœ¨ ``Documentation/ABI/`` ä¸ã€‚有关详细信æ¯ï¼Œ 请å‚阅 ``Documentation/ABI/README`` 。更改用户空间接å£çš„è¡¥ä¸åº”è¯¥æŠ„é€ linux-api@vger.kernel.org。 -20) 已通过至少注入slabå’Œpage分é…失败进行检查。请å‚阅 ``Documentation/fault-injection/`` +19) 已通过至少注入slabå’Œpage分é…失败进行检查。请å‚阅 ``Documentation/fault-injection/`` 。 如果新代ç æ˜¯å®žè´¨æ€§çš„ï¼Œé‚£ä¹ˆæ·»åŠ å系统特定的故障注入å¯èƒ½æ˜¯åˆé€‚的。 -21) æ–°æ·»åŠ çš„ä»£ç å·²ç»ç”¨ ``gcc -W`` 编译（使用 ``make EXTRA-CFLAGS=-W`` ）。这 +20) æ–°æ·»åŠ çš„ä»£ç å·²ç»ç”¨ ``gcc -W`` 编译（使用 ``make EXTRA-CFLAGS=-W`` ）。这 将产生大é‡å™ªå£°ï¼Œä½†å¯¹äºŽæŸ¥æ‰¾è¯¸å¦‚“è¦å‘Šï¼šæœ‰ç¬¦å·å’Œæ— 符å·ä¹‹é—´çš„比较â€ä¹‹ç±»çš„错误 很有用。 -22) 在它被åˆå¹¶åˆ°-mmè¡¥ä¸é›†ä¸ä¹‹åŽè¿›è¡Œæµ‹è¯•ï¼Œä»¥ç¡®ä¿å®ƒä»ç„¶ä¸Žæ‰€æœ‰å…¶ä»–排队的补ä¸ä»¥ +21) 在它被åˆå¹¶åˆ°-mmè¡¥ä¸é›†ä¸ä¹‹åŽè¿›è¡Œæµ‹è¯•ï¼Œä»¥ç¡®ä¿å®ƒä»ç„¶ä¸Žæ‰€æœ‰å…¶ä»–排队的补ä¸ä»¥ åŠVMã€VFS和其他å系统ä¸çš„å„ç§æ›´æ”¹ä¸€èµ·å·¥ä½œã€‚ -23) 所有内å˜å±éšœä¾‹å¦‚ ``barrier()``, ``rmb()``, ``wmb()`` 都需è¦æºä»£ç ä¸çš„注 +22) 所有内å˜å±éšœï¼ˆä¾‹å¦‚ ``barrier()``, ``rmb()``, ``wmb()`` ）都需è¦æºä»£ç 注 释æ¥è§£é‡Šå®ƒä»¬æ£åœ¨æ‰§è¡Œçš„æ“作åŠå…¶åŽŸå› 的逻辑。 -24) 如果补ä¸æ·»åŠ 了任何ioctl，那么也è¦æ›´æ–° ``Documentation/userspace-api/ioctl/ioctl-number.rst`` +23) 如果补ä¸æ·»åŠ 了任何ioctl，那么也è¦æ›´æ–° + ``Documentation/userspace-api/ioctl/ioctl-number.rst`` 。 -25) 如果修改åŽçš„æºä»£ç ä¾èµ–或使用与以下 ``Kconfig`` 符å·ç›¸å…³çš„ä»»ä½•å†…æ ¸API或 +24) 如果修改åŽçš„æºä»£ç ä¾èµ–或使用与以下 ``Kconfig`` 符å·ç›¸å…³çš„ä»»ä½•å†…æ ¸API或 功能，则在ç¦ç”¨ç›¸å…³ ``Kconfig`` 符å·å’Œ/或 ``=m`` （如果该选项å¯ç”¨ï¼‰çš„情况 下测试以下多个构建[并éžæ‰€æœ‰è¿™äº›éƒ½åŒæ—¶å˜åœ¨ï¼Œåªæ˜¯å®ƒä»¬çš„å„ç§/éšæœºç»„åˆ]： - ``CONFIG_SMP``, ``CONFIG_SYSFS``, ``CONFIG_PROC_FS``, ``CONFIG_INPUT``, ``CONFIG_PCI``, ``CONFIG_BLOCK``, ``CONFIG_PM``, ``CONFIG_MAGIC_SYSRQ``, - ``CONFIG_NET``, ``CONFIG_INET=n`` (但是åŽè€…ä¼´éš ``CONFIG_NET=y``). + ``CONFIG_SMP``, ``CONFIG_SYSFS``, ``CONFIG_PROC_FS``, ``CONFIG_INPUT``, + ``CONFIG_PCI``, ``CONFIG_BLOCK``, ``CONFIG_PM``, ``CONFIG_MAGIC_SYSRQ``, + ``CONFIG_NET``, ``CONFIG_INET=n`` （但是最åŽä¸€ä¸ªéœ€è¦ ``CONFIG_NET=y`` ）。 diff --git a/Documentation/translations/zh_CN/process/submitting-patches.rst b/Documentation/translations/zh_CN/process/submitting-patches.rst index ebb7f37575c1..f8978f02057c 100644 --- a/Documentation/translations/zh_CN/process/submitting-patches.rst +++ b/Documentation/translations/zh_CN/process/submitting-patches.rst @@ -1,142 +1,92 @@ -.. _cn_submittingpatches: +.. SPDX-License-Identifier: GPL-2.0-or-later .. include:: ../disclaimer-zh_CN.rst -:Original: :ref:`Documentation/process/submitting-patches.rst <submittingpatches>` +.. _cn_submittingpatches: + +:Original: Documentation/process/submitting-patches.rst -译者:: +:译者: + - 钟宇 TripleX Chung <xxx.phy@gmail.com> + - 时奎亮 Alex Shi <alexs@kernel.org> + - å´æƒ³æˆ Wu XiangCheng <bobwxc@email.cn> - ä¸æ–‡ç‰ˆç»´æŠ¤è€…： 钟宇 TripleX Chung <xxx.phy@gmail.com> - ä¸æ–‡ç‰ˆç¿»è¯‘者： 钟宇 TripleX Chung <xxx.phy@gmail.com> - 时奎亮 Alex Shi <alex.shi@linux.alibaba.com> - ä¸æ–‡ç‰ˆæ ¡è¯‘者： æŽé˜³ Li Yang <leoyang.li@nxp.com> - çŽ‹èª Wang Cong <xiyou.wangcong@gmail.com> +:æ ¡è¯‘: + - æŽé˜³ Li Yang <leoyang.li@nxp.com> + - çŽ‹èª Wang Cong <xiyou.wangcong@gmail.com> -å¦‚ä½•è®©ä½ çš„æ”¹åŠ¨è¿›å…¥å†…æ ¸ -====================== +æ交补ä¸ï¼šå¦‚ä½•è®©ä½ çš„æ”¹åŠ¨è¿›å…¥å†…æ ¸ +================================ 对于想è¦å°†æ”¹åŠ¨æ交到 Linux å†…æ ¸çš„ä¸ªäººæˆ–è€…å…¬å¸æ¥è¯´ï¼Œå¦‚æžœä¸ç†Ÿæ‚‰â€œè§„矩â€ï¼Œ -æ交的æµç¨‹ä¼šè®©äººç•æƒ§ã€‚本文档收集了一系列建议，这些建议å¯ä»¥å¤§å¤§çš„æé«˜ä½ +æ交的æµç¨‹ä¼šè®©äººç•æƒ§ã€‚本文档包å«äº†ä¸€ç³»åˆ—建议，å¯ä»¥å¤§å¤§æé«˜ä½ çš„æ”¹åŠ¨è¢«æŽ¥å—的机会. -以下文档å«æœ‰å¤§é‡ç®€æ´çš„建议， 具体请è§ï¼š -:ref:`Documentation/process <development_process_main>` -åŒæ ·ï¼Œ:ref:`Documentation/translations/zh_CN/process/submit-checklist.rst <cn_submitchecklist>` -给出在æ交代ç å‰éœ€è¦æ£€æŸ¥çš„项目的列表。 +本文档以较为简æ´çš„行文给出了大é‡å»ºè®®ã€‚å…³äºŽå†…æ ¸å¼€å‘æµç¨‹å¦‚何进行的详细信æ¯ï¼Œ +å‚è§ï¼š Documentation/translations/zh_CN/process/development-process.rst 。 +Documentation/translations/zh_CN/process/submit-checklist.rst 给出了一系列 +æ交补ä¸ä¹‹å‰è¦æ£€æŸ¥çš„äº‹é¡¹ã€‚è®¾å¤‡æ ‘ç›¸å…³çš„è¡¥ä¸ï¼Œè¯·å‚阅 +Documentation/devicetree/bindings/submitting-patches.rst 。 -å…¶ä¸è®¸å¤šæ¥éª¤æ述了Git版本控制系统的默认行为；如果您使用Gitæ¥å‡†å¤‡è¡¥ä¸ï¼Œ -您将å‘现它为您完æˆçš„大部分机械工作，尽管您ä»ç„¶éœ€è¦å‡†å¤‡å’Œè®°å½•ä¸€ç»„åˆç†çš„ -è¡¥ä¸ã€‚一般æ¥è¯´ï¼Œä½¿ç”¨gitå°†ä½¿æ‚¨ä½œä¸ºå†…æ ¸å¼€å‘人员的生活更轻æ¾ã€‚ +本文档å‡è®¾æ‚¨æ£åœ¨ä½¿ç”¨ ``git`` å‡†å¤‡ä½ çš„è¡¥ä¸ã€‚如果您ä¸ç†Ÿæ‚‰ ``git`` ，最好å¦ä¹ +å¦‚ä½•ä½¿ç”¨å®ƒï¼Œè¿™å°†ä½¿æ‚¨ä½œä¸ºå†…æ ¸å¼€å‘人员的生活å˜å¾—æ›´åŠ è½»æ¾ã€‚ +部分åç³»ç»Ÿå’Œç»´æŠ¤äººå‘˜çš„æ ‘æœ‰ä¸€äº›å…³äºŽå…¶å·¥ä½œæµç¨‹å’Œè¦æ±‚çš„é¢å¤–ä¿¡æ¯ï¼Œè¯·å‚阅 +Documentation/process/maintainer-handbooks.rst 。 -0) 获å–当å‰æºç æ ‘ ------------------ +获å–当å‰æºç æ ‘ +-------------- -如果您没有一个å¯ä»¥ä½¿ç”¨å½“å‰å†…æ ¸æºä»£ç çš„å˜å‚¨åº“，请使用git获å–ä¸€ä¸ªã€‚æ‚¨å°†è¦ -从主线å˜å‚¨åº“开始，它å¯ä»¥é€šè¿‡ä»¥ä¸‹æ–¹å¼èŽ·å–:: +如果您手头没有当å‰å†…æ ¸æºä»£ç çš„å˜å‚¨åº“，请使用 ``git`` 获å–一份。您需è¦å…ˆèŽ·å– +主线å˜å‚¨åº“，它å¯ä»¥é€šè¿‡ä»¥ä¸‹å‘½ä»¤æ‹‰å–:: - git clone git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git + git clone git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git -但是，请注æ„，您å¯èƒ½ä¸å¸Œæœ›ç›´æŽ¥é’ˆå¯¹ä¸»çº¿æ ‘进行开å‘。大多数åç³»ç»Ÿç»´æŠ¤äººå‘˜è¿ +但是，请注æ„，您å¯èƒ½ä¸æƒ³ç›´æŽ¥é’ˆå¯¹ä¸»çº¿æ ‘进行开å‘。大多数åç³»ç»Ÿç»´æŠ¤äººå‘˜è¿ è¡Œè‡ªå·±çš„æ ‘ï¼Œå¹¶å¸Œæœ›çœ‹åˆ°é’ˆå¯¹è¿™äº›æ ‘å‡†å¤‡çš„è¡¥ä¸ã€‚请å‚è§MAINTAINERS文件ä¸åç³» -统的 **T:** é¡¹ä»¥æŸ¥æ‰¾è¯¥æ ‘ï¼Œæˆ–è€…ç®€å•åœ°è¯¢é—®ç»´æŠ¤è€…è¯¥æ ‘æ˜¯å¦æœªåœ¨å…¶ä¸åˆ—出。 - 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MYSRC=/devel/linux - - tar xvfz linux-3.19.tar.gz - mv linux-3.19 linux-3.19-vanilla - diff -uprN -X linux-3.19-vanilla/Documentation/dontdiff \ - linux-3.19-vanilla $MYSRC > /tmp/patch - -"dontdiff" æ˜¯å†…æ ¸åœ¨ç¼–è¯‘çš„æ—¶å€™äº§ç”Ÿçš„æ–‡ä»¶çš„åˆ—è¡¨ï¼Œåˆ—è¡¨ä¸çš„文件在 diff(1) -产生的补ä¸é‡Œä¼šè¢«è·³è¿‡ã€‚ - -ç¡®å®šä½ çš„è¡¥ä¸é‡Œæ²¡æœ‰åŒ…å«ä»»ä½•ä¸å±žäºŽè¿™æ¬¡è¡¥ä¸æ交的é¢å¤–文件。记得在用diff(1) -生æˆè¡¥ä¸ä¹‹åŽï¼Œå®¡é˜…一次补ä¸ï¼Œä»¥ç¡®ä¿å‡†ç¡®ã€‚ - -å¦‚æžœä½ çš„æ”¹åŠ¨å¾ˆæ•£ä¹±ï¼Œä½ åº”è¯¥ç ”ç©¶ä¸€ä¸‹å¦‚ä½•å°†è¡¥ä¸åˆ†å‰²æˆç‹¬ç«‹çš„部分，将改动分 -割æˆä¸€ç³»åˆ—åˆä¹Žé€»è¾‘çš„æ¥éª¤ã€‚è¿™æ ·æ›´å®¹æ˜“è®©å…¶ä»–å†…æ ¸å¼€å‘è€…å®¡æ ¸ï¼Œå¦‚æžœä½ æƒ³ä½ çš„ -è¡¥ä¸è¢«æŽ¥å—，这是很é‡è¦çš„。请å‚阅： -:ref:`cn_split_changes` - -å¦‚æžœä½ ç”¨ ``git`` , ``git rebase -i`` å¯ä»¥å¸®åŠ©ä½ è¿™ä¸€ç‚¹ã€‚å¦‚æžœä½ ä¸ç”¨ ``git``, -``quilt`` <https://savannah.nongnu.org/projects/quilt> å¦å¤–一个æµè¡Œçš„选择。 - -.. _cn_describe_changes: - -2) æè¿°ä½ çš„æ”¹åŠ¨ ---------------- +æè¿°ä½ çš„æ”¹åŠ¨ +------------ æè¿°ä½ çš„é—®é¢˜ã€‚æ— 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https://lore.kernel.org/r/30th.anniversary.repost@klaava.Helsinki.FI/ + +请检查该链接以确ä¿å¯ç”¨ä¸”指å‘æ£ç¡®çš„邮件。 -如果修补程åºä¿®å¤äº†ç‰¹å®šæ交ä¸çš„错误，例如，使用 ``git bisct`` ï¼Œè¯·ä½¿ç”¨å¸¦æœ‰å‰ -12个å—符SHA-1 ID çš„"Fixes:"æ ‡è®°å’Œå•è¡Œæ‘˜è¦ã€‚为了简化ä¸è¦å°†æ ‡è®°æ‹†åˆ†ä¸ºå¤šä¸ªï¼Œ -è¡Œã€æ ‡è®°ä¸å—分æžè„šæœ¬â€œ75列æ¢è¡Œâ€è§„则的é™åˆ¶ã€‚例如:: +ä¸è¿‡ï¼Œåœ¨æ²¡æœ‰å¤–部资æºçš„情况下，也è¦å°½é‡è®©ä½ 的解释å¯ç†è§£ã€‚除了æ供邮件列表å˜æ¡£æˆ– +缺陷的URL之外，还è¦éœ€è¦æ€»ç»“该补ä¸çš„相关讨论è¦ç‚¹ã€‚ - Fixes: 54a4f0239f2e ("KVM: MMU: make kvm_mmu_zap_page() return the number of pages it actually freed") +如果补ä¸ä¿®å¤äº†ç‰¹å®šæ交ä¸çš„错误，例如使用 ``git bisct`` å‘现了一个问题，请使用 +带有å‰12个å—符SHA-1 ID的“Fixes:â€æ ‡ç¾å’Œå•è¡Œæ‘˜è¦ã€‚为了简化解æžè„šæœ¬ï¼Œä¸è¦å°†è¯¥ +æ ‡ç¾æ‹†åˆ†ä¸ºå¤šè¡Œï¼Œæ ‡ç¾ä¸å—“75列æ¢è¡Œâ€è§„则的é™åˆ¶ã€‚例如:: -下列 ``git config`` 设置å¯ä»¥æ·»åŠ 让 ``git log``, ``git show`` æ¼‚äº®çš„æ˜¾ç¤ºæ ¼å¼:: + Fixes: 54a4f0239f2e ("KVM: MMU: make kvm_mmu_zap_page() return the number of pages it actually freed") + +下列 ``git config`` 设置å¯ä»¥è®© ``git log``, ``git show`` å¢žåŠ ä¸Šè¿°é£Žæ ¼çš„æ˜¾ç¤ºæ ¼å¼:: [core] abbrev = 12 [pretty] fixes = Fixes: %h (\"%s\") -.. _cn_split_changes: +使用示例:: + + $ git log -1 --pretty=fixes 54a4f0239f2e + Fixes: 54a4f0239f2e ("KVM: MMU: make kvm_mmu_zap_page() return the number of pages it actually freed") -3) æ‹†åˆ†ä½ çš„æ”¹åŠ¨ ---------------- +.. _zh_split_changes: -å°†æ¯ä¸ªé€»è¾‘更改分隔æˆä¸€ä¸ªå•ç‹¬çš„è¡¥ä¸ã€‚ +æ‹†åˆ†ä½ çš„æ”¹åŠ¨ +------------ + +å°†æ¯ä¸ª **逻辑更改** 拆分æˆä¸€ä¸ªå•ç‹¬çš„è¡¥ä¸ã€‚ ä¾‹å¦‚ï¼Œå¦‚æžœä½ çš„æ”¹åŠ¨é‡ŒåŒæ—¶æœ‰bugä¿®æ£å’Œæ€§èƒ½ä¼˜åŒ–，那么把这些改动拆分到两个或 -者更多的补ä¸æ–‡ä»¶ä¸ã€‚å¦‚æžœä½ çš„æ”¹åŠ¨åŒ…å«å¯¹API的修改，并且修改了驱动程åºæ¥é€‚ -应这些新的API，那么把这些修改分æˆä¸¤ä¸ªè¡¥ä¸ã€‚ +者更多的补ä¸æ–‡ä»¶ä¸ã€‚å¦‚æžœä½ çš„æ”¹åŠ¨åŒ…å«å¯¹APIçš„ä¿®æ”¹ï¼Œå¹¶ä¸”å¢žåŠ äº†ä¸€ä¸ªä½¿ç”¨è¯¥æ–°API +的驱动，那么把这些修改分æˆä¸¤ä¸ªè¡¥ä¸ã€‚ å¦ä¸€æ–¹é¢ï¼Œå¦‚æžœä½ å°†ä¸€ä¸ªå•ç‹¬çš„改动åšæˆå¤šä¸ªè¡¥ä¸æ–‡ä»¶ï¼Œé‚£ä¹ˆå°†å®ƒä»¬åˆå¹¶æˆä¸€ä¸ª å•ç‹¬çš„è¡¥ä¸æ–‡ä»¶ã€‚è¿™æ ·ä¸€ä¸ªé€»è¾‘ä¸Šå•ç‹¬çš„改动åªè¢«åŒ…å«åœ¨ä¸€ä¸ªè¡¥ä¸æ–‡ä»¶é‡Œã€‚ -如果有一个补ä¸ä¾èµ–å¦å¤–一个补ä¸æ¥å®Œæˆå®ƒçš„改动，那没问题。简å•çš„åœ¨ä½ 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+---------------- -检查您的补ä¸æ˜¯å¦å˜åœ¨åŸºæœ¬æ ·å¼å†²çªï¼Œè¯¦ç»†ä¿¡æ¯å¯åœ¨ -:ref:`Documentation/translations/zh_CN/process/coding-style.rst <cn_codingstyle>` -ä¸æ‰¾åˆ°ã€‚如果ä¸è¿™æ ·åšï¼Œåªä¼šæµªè´¹å®¡ç¨¿äººçš„æ—¶é—´ï¼Œå¹¶ä¸”ä¼šå¯¼è‡´ä½ çš„è¡¥ä¸è¢«æ‹’ç»ï¼Œç”šè‡³ +检查您的补ä¸æ˜¯å¦è¿åäº†åŸºæœ¬æ ·å¼è§„定，详细信æ¯å‚è§ +Documentation/translations/zh_CN/process/coding-style.rst +ä¸æ‰¾åˆ°ã€‚如果ä¸è¿™æ ·åšï¼Œåªä¼šæµªè´¹å®¡é˜…è€…çš„æ—¶é—´ï¼Œå¹¶ä¸”ä¼šå¯¼è‡´ä½ çš„è¡¥ä¸è¢«æ‹’ç»ï¼Œç”šè‡³ å¯èƒ½æ²¡æœ‰è¢«é˜…读。 一个é‡è¦çš„例外是在将代ç 从一个文件移动到å¦ä¸€ä¸ªæ–‡ä»¶æ—¶â€”—在这ç§æƒ…况下，您ä¸åº” 该在移动代ç çš„åŒä¸€ä¸ªè¡¥ä¸ä¸ä¿®æ”¹ç§»åŠ¨çš„代ç 。这清楚地æ述了移动代ç 和您的更改 -的行为。这大大有助于审查实际差异，并å…许工具更好地跟踪代ç 本身的历å²ã€‚ +的行为。这大大有助于审阅实际差异，并å…许工具更好地跟踪代ç 本身的历å²ã€‚ 在æ交之å‰ï¼Œä½¿ç”¨è¡¥ä¸æ ·å¼æ£€æŸ¥ç¨‹åºæ£€æŸ¥è¡¥ä¸ï¼ˆscripts/check patch.pl）。ä¸è¿‡ï¼Œ 请注æ„ï¼Œæ ·å¼æ£€æŸ¥ç¨‹åºåº”该被视为一个指å—，而ä¸æ˜¯ä½œä¸ºäººç±»åˆ¤æ–的替代å“。如果您 -的代ç 看起æ¥æ›´å¥½ï¼Œä½†æœ‰è¿è§„行为，那么最好ä¸è¦ä½¿ç”¨å®ƒã€‚ +的代ç 看起æ¥æ›´å¥½ï¼Œä½†æœ‰è¿è§„行为，那么最好别管它。 检查者报告三个级别： - ERROR：很å¯èƒ½å‡ºé”™çš„事情 - - WARNING：需è¦ä»”细审查的事项 + - WARNING：需è¦ä»”细审阅的事项 - CHECK：需è¦æ€è€ƒçš„事情 您应该能够判æ–您的补ä¸ä¸å˜åœ¨çš„所有è¿è§„行为。 -5) 选择补ä¸æ”¶ä»¶äºº ------------------ +选择补ä¸æ”¶ä»¶äºº +-------------- -您应该总是在任何补ä¸ä¸Šå¤åˆ¶ç›¸åº”çš„å系统维护人员，以获得他们维护的代ç ；查看 +您应该总是知会任何补ä¸ç›¸åº”代ç çš„å系统维护人员；查看 维护人员文件和æºä»£ç 修订历å²è®°å½•ï¼Œä»¥äº†è§£è¿™äº›ç»´æŠ¤äººå‘˜æ˜¯è°ã€‚脚本 -scripts/get_Maintainer.pl在这个æ¥éª¤ä¸éžå¸¸æœ‰ç”¨ã€‚如果您找ä¸åˆ°æ£åœ¨å·¥ä½œçš„å系统 +scripts/get_maintainer.pl在这个æ¥éª¤ä¸éžå¸¸æœ‰ç”¨ã€‚如果您找ä¸åˆ°æ£åœ¨å·¥ä½œçš„å系统 的维护人员，那么Andrew Morton（akpm@linux-foundation.org）将充当最åŽçš„维护 人员。 -您通常还应该选择至少一个邮件列表æ¥æŽ¥æ”¶è¡¥ä¸é›†çš„。linux-kernel@vger.kernel.org -作为最åŽä¸€ä¸ªè§£å†³åŠžæ³•çš„列表，但是这个列表上的体积已ç»å¼•èµ·äº†è®¸å¤šå¼€å‘人员的拒ç»ã€‚ +您通常还应该选择至少一个邮件列表æ¥æŽ¥æ”¶è¡¥ä¸é›†çš„副本。linux-kernel@vger.kernel.org +是所有补ä¸çš„默认列表，但是这个列表的æµé‡å·²ç»å¯¼è‡´äº†è®¸å¤šå¼€å‘人员ä¸å†çœ‹å®ƒã€‚ 在MAINTAINERS文件ä¸æŸ¥æ‰¾å系统特定的列表；您的补ä¸å¯èƒ½ä¼šåœ¨é‚£é‡Œå¾—到更多的关注。 ä¸è¿‡ï¼Œè¯·ä¸è¦å‘é€åžƒåœ¾é‚®ä»¶åˆ°æ— 关的列表。 @@ -229,189 +201,170 @@ http://vger.kernel.org/vger-lists.html 上找到它们的列表。ä¸è¿‡ï¼Œä¹Ÿæœ ä¸è¦ä¸€æ¬¡å‘é€è¶…过15个补ä¸åˆ°vger邮件列表ï¼ï¼ï¼ï¼ -Linus Torvalds 是决定改动能å¦è¿›å…¥ Linux å†…æ ¸çš„æœ€ç»ˆè£å†³è€…。他的 e-mail -地å€æ˜¯ <torvalds@linux-foundation.org> 。他收到的 e-mail 很多，所以一般 -çš„è¯´ï¼Œæœ€å¥½åˆ«ç»™ä»–å‘ e-mail。 - -如果您有修å¤å¯åˆ©ç”¨å®‰å…¨æ¼æ´žçš„è¡¥ä¸ï¼Œè¯·å°†è¯¥è¡¥ä¸å‘é€åˆ° security@kernel.org。对于 -严é‡çš„bug，å¯ä»¥è€ƒè™‘çŸæœŸæš‚åœä»¥å…许分销商å‘用户å‘布补ä¸ï¼›åœ¨è¿™ç§æƒ…况下，显然ä¸åº” -将补ä¸å‘é€åˆ°ä»»ä½•å…¬å…±åˆ—表。 +Linus Torvalds是决定改动能å¦è¿›å…¥ Linux å†…æ ¸çš„æœ€ç»ˆè£å†³è€…。他的邮件地å€æ˜¯ +torvalds@linux-foundation.org 。他收到的邮件很多，所以一般æ¥è¯´æœ€å¥½ **别** +给他å‘邮件。 -ä¿®å¤å·²å‘å¸ƒå†…æ ¸ä¸ä¸¥é‡é”™è¯¯çš„è¡¥ä¸ç¨‹åºåº”该指å‘ç¨³å®šç‰ˆç»´æŠ¤äººå‘˜ï¼Œæ–¹æ³•æ˜¯æ”¾è¿™æ ·çš„ä¸€è¡Œ:: +如果您有修å¤å¯åˆ©ç”¨å®‰å…¨æ¼æ´žçš„è¡¥ä¸ï¼Œè¯·å°†è¯¥è¡¥ä¸å‘é€åˆ° security@kernel.org 。对于 +严é‡çš„bug，å¯ä»¥è€ƒè™‘çŸæœŸç¦ä»¤ä»¥å…许分销商（有时间）å‘用户å‘布补ä¸ï¼›åœ¨è¿™ç§æƒ…况下， +显然ä¸åº”将补ä¸å‘é€åˆ°ä»»ä½•å…¬å…±åˆ—表。 +å‚è§ Documentation/translations/zh_CN/admin-guide/security-bugs.rst 。 - Cc: stable@vger.kernel.org +ä¿®å¤å·²å‘å¸ƒå†…æ ¸ä¸ä¸¥é‡é”™è¯¯çš„è¡¥ä¸ç¨‹åºåº”该抄é€ç»™ç¨³å®šç‰ˆç»´æŠ¤äººå‘˜ï¼Œæ–¹æ³•æ˜¯æŠŠä»¥ä¸‹åˆ—è¡Œ +放进补ä¸çš„ç¾å‡†åŒºï¼ˆæ³¨æ„，ä¸æ˜¯ç”µå邮件收件人）:: -进入补ä¸çš„ç¾å‡†åŒºï¼ˆæ³¨æ„，ä¸æ˜¯ç”µå邮件收件人）。除了这个文件之外，您还应该阅读 -:ref:`Documentation/process/stable-kernel-rules.rst <stable_kernel_rules>` + Cc: stable@vger.kernel.org -但是，请注æ„，一些å系统维护人员希望得出他们自己的结论，å³å“ªäº›è¡¥ä¸åº”该被放到 -ç¨³å®šçš„æ ‘ä¸Šã€‚å°¤å…¶æ˜¯ç½‘ç»œç»´æŠ¤äººå‘˜ï¼Œä¸å¸Œæœ›çœ‹åˆ°å•ä¸ªå¼€å‘人员在补ä¸ä¸æ·»åŠ åƒä¸Šé¢è¿™æ · -的行。 +除了本文件之外，您还应该阅读 +Documentation/translations/zh_CN/process/stable-kernel-rules.rst 。 -如果更改影å“åˆ°ç”¨æˆ·å’Œå†…æ ¸æŽ¥å£ï¼Œè¯·å‘手册页维护人员（如维护人员文件ä¸æ‰€åˆ—）å‘é€ +如果更改影å“åˆ°ç”¨æˆ·ä¾§å†…æ ¸æŽ¥å£ï¼Œè¯·å‘手册页维护人员（如维护人员文件ä¸æ‰€åˆ—）å‘é€ æ‰‹å†Œé¡µè¡¥ä¸ï¼Œæˆ–至少å‘é€æ›´æ”¹é€šçŸ¥ï¼Œä»¥ä¾¿ä¸€äº›ä¿¡æ¯è¿›å…¥æ‰‹å†Œé¡µã€‚还应将用户空间API -更改å¤åˆ¶åˆ° linux-api@vger.kernel.org。 +更改抄é€åˆ° linux-api@vger.kernel.org 。 -6) 没有 MIME ç¼–ç ，没有链接，没有压缩，没有附件，åªæœ‰çº¯æ–‡æœ¬ ------------------------------------------------------------ +ä¸è¦MIMEç¼–ç ，ä¸è¦é“¾æŽ¥ï¼Œä¸è¦åŽ‹ç¼©ï¼Œä¸è¦é™„件，åªè¦çº¯æ–‡æœ¬ +------------------------------------------------------ Linus å’Œå…¶ä»–çš„å†…æ ¸å¼€å‘者需è¦é˜…è¯»å’Œè¯„è®ºä½ æäº¤çš„æ”¹åŠ¨ã€‚å¯¹äºŽå†…æ ¸å¼€å‘者æ¥è¯´ -，å¯ä»¥â€œå¼•ç”¨â€ä½ 的改动很é‡è¦ï¼Œä½¿ç”¨ä¸€èˆ¬çš„ e-mail 工具，他们就å¯ä»¥åœ¨ä½ çš„ +，å¯ä»¥â€œå¼•ç”¨â€ä½ 的改动很é‡è¦ï¼Œä½¿ç”¨ä¸€èˆ¬çš„邮件工具，他们就å¯ä»¥åœ¨ä½ çš„ 代ç 的任何ä½ç½®æ·»åŠ 评论。 -å› ä¸ºè¿™ä¸ªåŽŸå› ï¼Œæ‰€æœ‰çš„æ交的补ä¸éƒ½æ˜¯ e-mail ä¸â€œå†…嵌â€çš„。 +å› ä¸ºè¿™ä¸ªåŽŸå› ï¼Œæ‰€æœ‰çš„æ交的补ä¸éƒ½æ˜¯é‚®ä»¶ä¸â€œå†…嵌â€çš„。最简å•ï¼ˆå’ŒæŽ¨è）的方法就 +是使用 ``git send-email`` 。https://git-send-email.io 有 ``git send-email`` +的交互å¼æ•™ç¨‹ã€‚ + +å¦‚æžœä½ é€‰æ‹©ä¸ç”¨ ``git send-email`` ： .. warning:: - å¦‚æžœä½ ä½¿ç”¨å‰ªåˆ‡-ç²˜è´´ä½ çš„è¡¥ä¸ï¼Œå°å¿ƒä½ 的编辑器的自动æ¢è¡ŒåŠŸèƒ½ç ´åä½ çš„è¡¥ä¸ -ä¸è¦å°†è¡¥ä¸ä½œä¸º MIME ç¼–ç 的附件，ä¸ç®¡æ˜¯å¦åŽ‹ç¼©ã€‚很多æµè¡Œçš„ e-mail è½¯ä»¶ä¸ -是任何时候都将 MIME ç¼–ç 的附件当作纯文本å‘é€çš„ï¼Œè¿™ä¼šä½¿å¾—åˆ«äººæ— æ³•åœ¨ä½ çš„ -代ç ä¸åŠ 评论。å¦å¤–，MIME ç¼–ç 的附件会让 Linus 多花一点时间æ¥å¤„ç†ï¼Œè¿™å°± -é™ä½Žäº†ä½ 的改动被接å—çš„å¯èƒ½æ€§ã€‚ + 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Condensed patch summary -11）ç¾ç½²ä½ 的作å“-å¼€å‘è€…åŽŸå§‹è®¤è¯ -------------------------------- +å½“ä½ å‘布补ä¸ï¼ˆç³»åˆ—）修改版的时候，ä¸è¦åŠ 上“RESENDâ€â€”—“RESENDâ€åªé€‚ç”¨äºŽé‡ +æ–°æ交之å‰æœªç»ä¿®æ”¹çš„è¡¥ä¸ï¼ˆç³»åˆ—）。 -ä¸ºäº†åŠ å¼ºå¯¹è°åšäº†ä½•äº‹çš„追踪，尤其是对那些é€è¿‡å¥½å‡ 层的维护者的补ä¸ï¼Œæˆ‘们 -建议在å‘é€å‡ºåŽ»çš„è¡¥ä¸ä¸ŠåŠ 一个 “sign-off†的过程。 +主题ä¸åŒ…å« PATCH +---------------- -"sign-off" 是在补ä¸çš„注释的最åŽçš„简å•çš„一行文å—，认è¯ä½ 编写了它或者其他 +由于到Linuså’Œlinux-kernel的电å邮件æµé‡å¾ˆé«˜ï¼Œé€šå¸¸ä¼šåœ¨ä¸»é¢˜è¡Œå‰é¢åŠ 上[PATCH] +å‰ç¼€ã€‚这使Linuså’Œå…¶ä»–å†…æ ¸å¼€å‘人员更容易将补ä¸ä¸Žå…¶ä»–电å邮件讨论区分开。 + +``git send-email`` ä¼šè‡ªåŠ¨ä¸ºä½ åŠ ä¸Šã€‚ + +ç¾ç½²ä½ 的作å“——开å‘者æ¥æºè®¤è¯ +------------------------------ + +ä¸ºäº†åŠ å¼ºå¯¹è°åšäº†ä½•äº‹çš„追踪，尤其是对那些é€è¿‡å¥½å‡ 层维护者æ‰æœ€ç»ˆåˆ°è¾¾çš„è¡¥ä¸ï¼Œæˆ‘ +们在通过邮件å‘é€çš„è¡¥ä¸ä¸Šå¼•å…¥äº†â€œç¾ç½²ï¼ˆsign-off）â€æµç¨‹ã€‚ + +“ç¾ç½²â€æ˜¯åœ¨è¡¥ä¸æ³¨é‡Šæœ€åŽçš„一行简å•æ–‡å—，认è¯ä½ 编写了它或者其他 人有æƒåŠ›å°†å®ƒä½œä¸ºå¼€æ”¾æºä»£ç çš„è¡¥ä¸ä¼ 递。规则很简å•ï¼šå¦‚æžœä½ èƒ½è®¤è¯å¦‚下信æ¯: -å¼€å‘者æ¥æºè¯ä¹¦ 1.1 +å¼€å‘者æ¥æºè®¤è¯ 1.1 ^^^^^^^^^^^^^^^^^^ 对于本项目的贡献，我认è¯å¦‚下信æ¯ï¼š - （a）这些贡献是完全或者部分的由我创建，我有æƒåˆ©ä»¥æ–‡ä»¶ä¸æŒ‡å‡º + (a) 这些贡献是完全或者部分的由我创建，我有æƒåˆ©ä»¥æ–‡ä»¶ä¸æŒ‡å‡º 的开放æºä»£ç 许å¯è¯æ交它；或者 - （b）这些贡献基于以å‰çš„工作，æ®æˆ‘所知，这些以å‰çš„工作å—æ°å½“的开放 - æºä»£ç 许å¯è¯ä¿æŠ¤ï¼Œè€Œä¸”ï¼Œæ ¹æ®è®¸å¯è¯ï¼Œæˆ‘有æƒæ交修改åŽçš„贡献， + + (b) 这些贡献基于以å‰çš„工作，æ®æˆ‘所知，这些以å‰çš„工作å—æ°å½“的开放 + æºä»£ç 许å¯è¯ä¿æŠ¤ï¼Œè€Œä¸”ï¼Œæ ¹æ®æ–‡ä»¶ä¸æŒ‡å‡ºçš„许å¯è¯ï¼Œæˆ‘有æƒæ交修改åŽçš„贡献， æ— è®ºæ˜¯å®Œå…¨è¿˜æ˜¯éƒ¨åˆ†ç”±æˆ‘åˆ›é€ ï¼Œè¿™äº›è´¡çŒ®éƒ½ä½¿ç”¨åŒä¸€ä¸ªå¼€æ”¾æºä»£ç 许å¯è¯ - （除éžæˆ‘被å…许用其它的许å¯è¯ï¼‰ï¼Œæ£å¦‚文件ä¸æŒ‡å‡ºçš„；或者 - （c）这些贡献由认è¯ï¼ˆa），（b）或者（c）的人直接æ供给我，而 + （除éžæˆ‘被å…许用其它的许å¯è¯ï¼‰ï¼›æˆ–者 + + (c) 这些贡献由认è¯ï¼ˆa），（b）或者（c）的人直接æ供给我，而 且我没有修改它。 - （d）我ç†è§£å¹¶åŒæ„这个项目和贡献是公开的，贡献的记录（包括我 - 一起æ交的个人记录，包括 sign-off ）被永久维护并且å¯ä»¥å’Œè¿™ä¸ªé¡¹ç›® + + (d) 我ç†è§£å¹¶åŒæ„这个项目和贡献是公开的，贡献的记录（包括我 + 一起æ交的个人记录，包括sign-off）被永久维护并且å¯ä»¥å’Œè¿™ä¸ªé¡¹ç›® 或者开放æºä»£ç 的许å¯è¯åŒæ¥åœ°å†å‘行。 é‚£ä¹ˆåŠ å…¥è¿™æ ·ä¸€è¡Œ:: - Signed-off-by: Random J Developer <random@developer.example.org> - -ä½¿ç”¨ä½ çš„çœŸå（抱æ‰ï¼Œä¸èƒ½ä½¿ç”¨å‡å或者匿å。） - -有人在最åŽåŠ ä¸Šæ ‡ç¾ã€‚çŽ°åœ¨è¿™äº›ä¸œè¥¿ä¼šè¢«å¿½ç•¥ï¼Œä½†æ˜¯ä½ å¯ä»¥è¿™æ ·åšï¼Œæ¥æ ‡è®°å…¬å¸ -内部的过程，或者åªæ˜¯æŒ‡å‡ºå…³äºŽ sign-off 的一些特殊细节。 - -如果您是å系统或分支维护人员，有时需è¦ç¨å¾®ä¿®æ”¹æ”¶åˆ°çš„è¡¥ä¸ï¼Œä»¥ä¾¿åˆå¹¶å®ƒä»¬ï¼Œ -å› ä¸ºæ ‘å’Œæ交者ä¸çš„代ç ä¸å®Œå…¨ç›¸åŒã€‚å¦‚æžœä½ ä¸¥æ ¼éµå®ˆè§„则（cï¼‰ï¼Œä½ åº”è¯¥è¦æ±‚æ交者 -é‡æ–°å‘布，但这完全是在浪费时间和精力。规则（b）å…许您调整代ç ，但是更改一个 -æ交者的代ç 并让他认å¯æ‚¨çš„错误是éžå¸¸ä¸ç¤¼è²Œçš„。è¦è§£å†³æ¤é—®é¢˜ï¼Œå»ºè®®åœ¨æœ€åŽä¸€ä¸ª -ç”±ç¾åè¡Œå’Œæ‚¨çš„è¡Œä¹‹é—´æ·»åŠ ä¸€è¡Œï¼ŒæŒ‡ç¤ºæ›´æ”¹çš„æ€§è´¨ã€‚è™½ç„¶è¿™å¹¶ä¸æ˜¯å¼ºåˆ¶æ€§çš„，但似乎 -在æè¿°å‰åŠ 上您的邮件和/或姓å（全部用方括å·æ‹¬èµ·æ¥ï¼‰ï¼Œè¿™è¶³ä»¥è®©äººæ³¨æ„到您对最 -åŽä¸€åˆ†é’Ÿçš„更改负有责任。例如:: - - Signed-off-by: Random J Developer <random@developer.example.org> - [lucky@maintainer.example.org: struct foo moved from foo.c to foo.h] - Signed-off-by: Lucky K Maintainer <lucky@maintainer.example.org> - -如果您维护一个稳定的分支机构，åŒæ—¶å¸Œæœ›å¯¹ä½œè€…进行致谢ã€è·Ÿè¸ªæ›´æ”¹ã€åˆå¹¶ä¿®å¤å¹¶ -ä¿æŠ¤æ交者ä¸å—投诉，那么这ç§åšæ³•å°¤å…¶æœ‰ç”¨ã€‚请注æ„，在任何情况下都ä¸èƒ½æ›´æ”¹ä½œè€… -çš„ID（From å¤´ï¼‰ï¼Œå› ä¸ºå®ƒæ˜¯å‡ºçŽ°åœ¨æ›´æ”¹æ—¥å¿—ä¸çš„æ ‡è¯†ã€‚ - -对回åˆï¼ˆback-porters）的特别说明：在æ交消æ¯çš„顶部（主题行之åŽï¼‰æ’å…¥ä¸€ä¸ªè¡¥ä¸ -çš„èµ·æºæŒ‡ç¤ºä¼¼ä¹Žæ˜¯ä¸€ç§å¸¸è§ä¸”有用的实践，以便于跟踪。例如，下é¢æ˜¯æˆ‘们在3.x稳定 -版本ä¸çœ‹åˆ°çš„内容:: - - Date: Tue Oct 7 07:26:38 2014 -0400 - - libata: Un-break ATA blacklist - - commit 1c40279960bcd7d52dbdf1d466b20d24b99176c8 upstream. - -还有， è¿™é‡Œæ˜¯ä¸€ä¸ªæ—§ç‰ˆå†…æ ¸ä¸çš„一个回åˆè¡¥ä¸:: + Signed-off-by: Random J Developer <random@developer.example.org> - Date: Tue May 13 22:12:27 2008 +0200 +ä½¿ç”¨ä½ çš„çœŸå（抱æ‰ï¼Œä¸èƒ½ä½¿ç”¨å‡å或者匿å。）如果使用 ``git commit -s`` çš„è¯ +将会自动完æˆã€‚撤销也应当包å«â€œSigned-off-byâ€ï¼Œ ``git revert -s`` ä¼šå¸®ä½ æžå®šã€‚ - wireless, airo: waitbusy() won't delay +有些人会在最åŽåŠ 上é¢å¤–çš„æ ‡ç¾ã€‚çŽ°åœ¨è¿™äº›ä¸œè¥¿ä¼šè¢«å¿½ç•¥ï¼Œä½†æ˜¯ä½ å¯ä»¥è¿™æ ·åšï¼Œæ¥æ ‡è®° +å…¬å¸å†…部的过程，或者åªæ˜¯æŒ‡å‡ºå…³äºŽç¾ç½²çš„一些特殊细节。 - [backport of 2.6 commit b7acbdfbd1f277c1eb23f344f899cfa4cd0bf36a] +作者ç¾ç½²ä¹‹åŽçš„任何其他ç¾ç½²ï¼ˆSigned-off-by:'s）å‡æ¥è‡ªå¤„ç†å’Œä¼ 递补ä¸çš„人员，但 +未å‚与其开å‘。ç¾ç½²é“¾åº”当åæ˜ è¡¥ä¸ä¼ æ’åˆ°ç»´æŠ¤è€…å¹¶æœ€ç»ˆä¼ æ’到Linus所ç»è¿‡çš„ **真实** +路径，首个ç¾ç½²æŒ‡æ˜Žå•ä¸ªä½œè€…的主è¦ä½œè€…身份。 -12）何时使用Acked-by:，CC:，和Co-Developed by: ----------------------------------------------- +何时使用Acked-by:，CC:，和Co-Developed by: +------------------------------------------ -Singed-off-by: æ ‡è®°è¡¨ç¤ºç¾å者å‚与了补ä¸çš„å¼€å‘，或者他/她在补ä¸çš„ä¼ é€’è·¯å¾„ä¸ã€‚ +Singed-off-by: æ ‡ç¾è¡¨ç¤ºç¾å者å‚与了补ä¸çš„å¼€å‘，或者他/她在补ä¸çš„ä¼ é€’è·¯å¾„ä¸ã€‚ -如果一个人没有直接å‚与补ä¸çš„准备或处ç†ï¼Œä½†å¸Œæœ›è¡¨ç¤ºå¹¶è®°å½•ä»–们对补ä¸çš„批准， -那么他们å¯ä»¥è¦æ±‚在补ä¸çš„å˜æ›´æ—¥å¿—ä¸æ·»åŠ 一个 Acked-by: +如果一个人没有直接å‚与补ä¸çš„准备或处ç†ï¼Œä½†å¸Œæœ›è¡¨ç¤ºå¹¶è®°å½•ä»–们对补ä¸çš„批准/赞æˆï¼Œ +那么他们å¯ä»¥è¦æ±‚在补ä¸çš„å˜æ›´æ—¥å¿—ä¸æ·»åŠ 一个Acked-by:。 -Acked-by：通常由å—å½±å“代ç 的维护者使用，当该维护者既没有贡献也没有转å‘è¡¥ä¸æ—¶ã€‚ +Acked-by: 通常由å—å½±å“代ç 的维护者使用，当该维护者既没有贡献也没有转å‘è¡¥ä¸æ—¶ã€‚ -Acked-by: ä¸åƒç¾å—äººé‚£æ ·æ£å¼ã€‚这是一个记录，确认人至少审查了补ä¸ï¼Œå¹¶è¡¨ç¤ºæŽ¥å—。 -å› æ¤ï¼Œè¡¥ä¸åˆå¹¶æœ‰æ—¶ä¼šæ‰‹åŠ¨å°†Acker的“Yep，looks good to meâ€è½¬æ¢ä¸º Acked-By：（但 +Acked-by: ä¸åƒç¾ç½²é‚£æ ·æ£å¼ã€‚这是一个记录，确认人至少审阅了补ä¸ï¼Œå¹¶è¡¨ç¤ºæŽ¥å—。 +å› æ¤ï¼Œè¡¥ä¸åˆå¹¶æœ‰æ—¶ä¼šæ‰‹åŠ¨å°†Acker的“Yep，looks good to meâ€è½¬æ¢ä¸º Acked-By:（但 请注æ„，通常最好è¦æ±‚一个明确的Ack）。 Acked-by：ä¸ä¸€å®šè¡¨ç¤ºå¯¹æ•´ä¸ªè¡¥ä¸çš„确认。例如，如果一个补ä¸å½±å“多个å系统，并且 -有一个：æ¥è‡ªä¸€ä¸ªå系统维护者，那么这通常表示åªç¡®è®¤å½±å“维护者代ç 的部分。这里 -应该仔细判æ–。如有疑问，应å‚考邮件列表档案ä¸çš„原始讨论。 +有一个æ¥è‡ªæŸä¸ªå系统维护者的Acked-By:，那么这通常表示åªç¡®è®¤å½±å“维护者代ç 的部 +分。这里应该仔细判æ–。如有疑问，应å‚考邮件列表å˜æ¡£ä¸çš„原始讨论。 -如果æŸäººæœ‰æœºä¼šå¯¹è¡¥ä¸è¿›è¡Œè¯„论，但没有æä¾›æ¤ç±»è¯„论，您å¯ä»¥é€‰æ‹©åœ¨è¡¥ä¸ä¸æ·»åŠ ``Cc:`` -è¿™æ˜¯å”¯ä¸€ä¸€ä¸ªæ ‡ç¾ï¼Œå®ƒå¯ä»¥åœ¨æ²¡æœ‰è¢«å®ƒå‘½å的人显å¼æ“ä½œçš„æƒ…å†µä¸‹æ·»åŠ ï¼Œä½†å®ƒåº”è¯¥è¡¨æ˜Ž -这个人是在补ä¸ä¸ŠæŠ„é€çš„。讨论ä¸åŒ…å«äº†æ½œåœ¨åˆ©ç›Šç›¸å…³æ–¹ã€‚ +如果æŸäººæœ¬åº”有机会对补ä¸è¿›è¡Œè¯„论，但没有æä¾›æ¤ç±»è¯„论，您å¯ä»¥é€‰æ‹©åœ¨è¡¥ä¸ä¸æ·»åŠ +``Cc:`` 这是唯一å¯ä»¥åœ¨æ²¡æœ‰è¢«è¯¥äººæ˜Žç¡®åŒæ„çš„æƒ…å†µä¸‹æ·»åŠ çš„æ ‡ç¾â€”—但它应该表明 +这个人是在补ä¸ä¸ŠæŠ„é€çš„。æ¤æ ‡ç¾è®°å½•äº†è®¨è®ºä¸åŒ…å«çš„潜在利益相关方。 Co-developed-by: 声明补ä¸æ˜¯ç”±å¤šä¸ªå¼€å‘人员共åŒåˆ›å»ºçš„ï¼›å½“å‡ ä¸ªäººåœ¨ä¸€ä¸ªè¡¥ä¸ä¸Šå·¥ -作时，它用于将属性赋予共åŒä½œè€…（除了 From: æ‰€èµ‹äºˆçš„ä½œè€…ä¹‹å¤–ï¼‰ã€‚å› ä¸º -Co-developed-by: 表示作者身份，所以æ¯ä¸ªå…±åŒå¼€å‘人：必须紧跟在相关åˆä½œä½œè€…çš„ -ç¾å之åŽã€‚æ ‡å‡†çš„ç¾æ ¸ç¨‹åºè¦æ±‚ï¼šæ ‡è®°çš„ç¾æ ¸é¡ºåºåº”å°½å¯èƒ½åæ˜ è¡¥ä¸çš„时间历å²ï¼Œè€Œä¸ -管作者是通过 From ：还是由 Co-developed-by: å…±åŒå¼€å‘的。值得注æ„的是，最åŽä¸€ -个ç¾å—人：必须始终是æ交补ä¸çš„å¼€å‘人员。 +作时，它用于给出共åŒä½œè€…（除了From:æ‰€ç»™å‡ºçš„ä½œè€…ä¹‹å¤–ï¼‰ã€‚å› ä¸ºCo-developed-by: +表示作者身份，所以æ¯ä¸ªCo-developed-by:必须紧跟在相关åˆä½œä½œè€…çš„ç¾ç½²ä¹‹åŽã€‚æ ‡å‡† +ç¾ç½²ç¨‹åºè¦æ±‚Singed-off-by:æ ‡ç¾çš„顺åºåº”å°½å¯èƒ½åæ˜ è¡¥ä¸çš„时间历å²ï¼Œæ— 论作者是通 +过From:还是Co-developed-by:表明。值得注æ„的是，最åŽä¸€ä¸ªSinged-off-by:必须是 +æ交补ä¸çš„å¼€å‘人员。 -注æ„，当作者也是电åé‚®ä»¶æ ‡é¢˜â€œå‘件人：â€è¡Œä¸åˆ—出的人时，“From: â€ æ ‡è®°æ˜¯å¯é€‰çš„。 +注æ„，如果From:作者也是电åé‚®ä»¶æ ‡é¢˜çš„From:è¡Œä¸åˆ—出的人，则From:æ ‡ç¾æ˜¯å¯é€‰çš„。 -作者æ交的补ä¸ç¨‹åºç¤ºä¾‹:: +被From:作者æ交的补ä¸ç¤ºä¾‹:: <changelog> @@ -421,7 +374,7 @@ Co-developed-by: 表示作者身份，所以æ¯ä¸ªå…±åŒå¼€å‘人：必须紧跟 Signed-off-by: Second Co-Author <second@coauthor.example.org> Signed-off-by: From Author <from@author.example.org> -åˆä½œå¼€å‘者æ交的补ä¸ç¤ºä¾‹:: +被åˆä½œå¼€å‘者æ交的补ä¸ç¤ºä¾‹:: From: From Author <from@author.example.org> @@ -434,76 +387,85 @@ Co-developed-by: 表示作者身份，所以æ¯ä¸ªå…±åŒå¼€å‘人：必须紧跟 Signed-off-by: Submitting Co-Author <sub@coauthor.example.org> -13）使用报告人：ã€æµ‹è¯•äººï¼šã€å®¡æ ¸äººï¼šã€å»ºè®®äººï¼šã€ä¿®å¤äººï¼š --------------------------------------------------------- +使用Reported-by:ã€Tested-by:ã€Reviewed-by:ã€Suggested-by:å’ŒFixes: +----------------------------------------------------------------- Reported-by: 给那些å‘现错误并报告错误的人致谢，它希望激励他们在将æ¥å†æ¬¡å¸®åŠ© -我们。请注æ„，如果bug是以ç§æœ‰æ–¹å¼æŠ¥å‘Šçš„，那么在使用Reported-byæ ‡è®°ä¹‹å‰ï¼Œè¯· -先请求æƒé™ã€‚ +我们。请注æ„，如果bug是以ç§æœ‰æ–¹å¼æŠ¥å‘Šçš„，那么在使用Reported-byæ ‡ç¾ä¹‹å‰ï¼Œè¯· +先请求许å¯ã€‚æ¤æ ‡ç¾æ˜¯ä¸ºBug设计的；请ä¸è¦å°†å…¶ç”¨äºŽæ„Ÿè°¢åŠŸèƒ½è¯·æ±‚。 -Tested-by: æ ‡è®°è¡¨ç¤ºè¡¥ä¸å·²ç”±æŒ‡å®šçš„人（在æŸäº›çŽ¯å¢ƒä¸ï¼‰æˆåŠŸæµ‹è¯•ã€‚è¿™ä¸ªæ ‡ç¾é€šçŸ¥ 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-12ï¼‰æ ‡å‡†è¡¥ä¸æ ¼å¼ ----------------- + é™„åŠ Fixes:æ ‡ç¾ä¸ä¼šæ”¹å˜ç¨³å®šå†…æ ¸è§„åˆ™æµç¨‹ï¼Œä¹Ÿä¸æ”¹å˜æ‰€æœ‰ç¨³å®šç‰ˆè¡¥ä¸æŠ„é€ + stable@vger.kernel.orgçš„è¦æ±‚。有关更多信æ¯ï¼Œè¯·é˜…读 + Documentation/translations/zh_CN/process/stable-kernel-rules.rst 。 + +.. _zh_the_canonical_patch_format: + +æ ‡å‡†è¡¥ä¸æ ¼å¼ +------------ 本节æè¿°å¦‚ä½•æ ¼å¼åŒ–è¡¥ä¸æœ¬èº«ã€‚请注æ„，如果您的补ä¸å˜å‚¨åœ¨ ``Git`` å˜å‚¨åº“ä¸ï¼Œåˆ™ -å¯ä»¥ä½¿ç”¨ ``git format-patch`` 进行æ£ç¡®çš„è¡¥ä¸æ ¼å¼è®¾ç½®ã€‚ä½†æ˜¯ï¼Œè¿™äº›å·¥å…·æ— æ³•åˆ›å»º +å¯ä»¥ä½¿ç”¨ ``git format-patch`` 进行æ£ç¡®çš„è¡¥ä¸æ ¼å¼åŒ–ã€‚ä½†æ˜¯ï¼Œè¿™äº›å·¥å…·æ— æ³•åˆ›å»º å¿…è¦çš„æ–‡æœ¬ï¼Œå› æ¤è¯·åŠ¡å¿…阅读下é¢çš„说明。 -æ ‡å‡†çš„è¡¥ä¸ï¼Œæ ‡é¢˜è¡Œæ˜¯:: +æ ‡å‡†çš„è¡¥ä¸æ ‡é¢˜è¡Œæ˜¯:: Subject: [PATCH 001/123] å系统:一å¥è¯æ¦‚è¿° -æ ‡å‡†è¡¥ä¸çš„信体å˜åœ¨å¦‚下部分： +æ ‡å‡†è¡¥ä¸çš„信体包å«å¦‚下部分： - - 一个 "from" 行指出补ä¸ä½œè€…。åŽè·Ÿç©ºè¡Œï¼ˆä»…当å‘é€ä¿®è¡¥ç¨‹åºçš„人ä¸æ˜¯ä½œè€…æ—¶æ‰éœ€è¦ï¼‰ã€‚ + - 一个 ``from`` 行指出补ä¸ä½œè€…。åŽè·Ÿç©ºè¡Œï¼ˆä»…当å‘é€è¡¥ä¸çš„人ä¸æ˜¯ä½œè€…æ—¶æ‰éœ€è¦ï¼‰ã€‚ - - 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概述的å‰ç¼€å¯ä»¥ç”¨æ–¹æ‹¬å·æ‹¬èµ·æ¥ï¼šâ€œSubject: [PATCH <tag>...] <概述>â€ã€‚æ ‡è®° ä¸è¢«è§†ä¸ºæ¦‚述的一部分，而是æ述应该如何处ç†è¡¥ä¸ã€‚如果补ä¸çš„å¤šä¸ªç‰ˆæœ¬å·²å‘ -é€å‡ºæ¥ä»¥å“应评审（å³â€œv1，v2，v3â€ï¼‰æˆ–“rfcâ€ï¼Œä»¥æŒ‡ç¤ºè¯„å®¡è¯·æ±‚ï¼Œé‚£ä¹ˆé€šç”¨æ ‡è®° -å¯èƒ½åŒ…括版本æ述符。如果一个补ä¸ç³»åˆ—ä¸æœ‰å››ä¸ªè¡¥ä¸ï¼Œé‚£ä¹ˆå„个补ä¸å¯ä»¥è¿™æ · -ç¼–å·ï¼š1/4ã€2/4ã€3/4ã€4/4。这å¯ä»¥ç¡®ä¿å¼€å‘人员了解补ä¸åº”用的顺åºï¼Œå¹¶ä¸”他们 +é€å‡ºæ¥ä»¥å“应评审（å³â€œv1，v2，v3â€ï¼‰åˆ™å¿…须包å«ç‰ˆæœ¬å·ï¼Œæˆ–包å«â€œRFCâ€ä»¥æŒ‡ç¤º +评审请求。如果一个补ä¸ç³»åˆ—ä¸æœ‰å››ä¸ªè¡¥ä¸ï¼Œé‚£ä¹ˆå„个补ä¸å¯ä»¥è¿™æ ·ç¼–å·ï¼š1/4ã€2/4〠+3/4ã€4/4。这å¯ä»¥ç¡®ä¿å¼€å‘人员了解补ä¸åº”用的顺åºï¼Œä¸” å·²ç»æŸ¥çœ‹æˆ–应用了补ä¸ç³»åˆ—ä¸çš„所有补ä¸ã€‚ ä¸€äº›æ ‡é¢˜çš„ä¾‹å:: @@ -541,95 +503,134 @@ e-mail æ ‡é¢˜ä¸çš„“一å¥è¯æ¦‚è¿°â€æ‰¼è¦çš„æè¿° e-mail ä¸çš„è¡¥ä¸ã€‚†Subject: [patch 2/5] ext2: improve scalability of bitmap searching Subject: [PATCHv2 001/207] x86: fix eflags tracking -"From" 行是信体里的最上é¢ä¸€è¡Œï¼Œå…·æœ‰å¦‚ä¸‹æ ¼å¼ï¼š +``From`` 行是信体里的最上é¢ä¸€è¡Œï¼Œå…·æœ‰å¦‚ä¸‹æ ¼å¼:: + From: Patch Author <author@example.com> -"From" 行指明在永久改动日志里，è°ä¼šè¢«ç¡®è®¤ä¸ºä½œè€…。如果没有 "From" 行，那 -么邮件头里的 "From: " 行会被用æ¥å†³å®šæ”¹åŠ¨æ—¥å¿—ä¸çš„作者。 +``From`` 行指明在永久改动日志里，è°ä¼šè¢«ç¡®è®¤ä¸ºä½œè€…。如果没有 ``From`` 行，那 +么邮件头里的 ``From:`` 行会被用æ¥å†³å®šæ”¹åŠ¨æ—¥å¿—ä¸çš„作者。 -说明的主题将会被æ交到永久的æºä»£ç æ”¹åŠ¨æ—¥å¿—é‡Œï¼Œå› æ¤å¯¹é‚£äº›æ—©å·²ç»ä¸è®°å¾—å’Œ -这个补ä¸ç›¸å…³çš„讨论细节的有能力的读者æ¥è¯´ï¼Œæ˜¯æœ‰æ„义的。包括补ä¸ç¨‹åºå®šä½ -é”™è¯¯çš„ï¼ˆå†…æ ¸æ—¥å¿—æ¶ˆæ¯ã€OOPS消æ¯ç‰ï¼‰ç—‡çŠ¶ï¼Œå¯¹äºŽæœç´¢æ交日志以寻找适用补ä¸çš„人 -尤其有用。如果一个补ä¸ä¿®å¤äº†ä¸€ä¸ªç¼–译失败，那么å¯èƒ½ä¸éœ€è¦åŒ…å«æ‰€æœ‰ç¼–译失败； +说明文å—将会被æ交到永久的æºä»£ç æ”¹åŠ¨æ—¥å¿—é‡Œï¼Œå› æ¤åº”针对那些早已ç»ä¸è®°å¾—和这 +个补ä¸ç›¸å…³çš„讨论细节的读者。包括补ä¸å¤„ç†çš„æ•…éšœç—‡çŠ¶ï¼ˆå†…æ ¸æ—¥å¿—æ¶ˆæ¯ã€oopsæ¶ˆæ¯ +ç‰ï¼‰ï¼Œè¿™å¯¹äºŽå¯èƒ½æ£åœ¨æœç´¢æ交日志以查找适用补ä¸çš„人特别有用。文本应该写得如 +æ¤è¯¦ç»†ï¼Œä»¥ä¾¿åœ¨æ•°å‘¨ã€æ•°æœˆç”šè‡³æ•°å¹´åŽé˜…读时，能够为读者æ供所需的细节信æ¯ï¼Œä»¥ +掌æ¡åˆ›å»ºè¡¥ä¸çš„ **åŽŸå› ** 。 + +如果一个补ä¸ä¿®å¤äº†ä¸€ä¸ªç¼–译失败，那么å¯èƒ½ä¸éœ€è¦åŒ…å« *所有* 编译失败； åªè¦è¶³å¤Ÿè®©æœç´¢è¡¥ä¸çš„äººèƒ½å¤Ÿæ‰¾åˆ°å®ƒå°±è¡Œäº†ã€‚ä¸Žæ¦‚è¿°ä¸€æ ·ï¼Œæ—¢è¦ç®€æ´åˆè¦æ述性。 -"---" æ ‡è®°è¡Œå¯¹äºŽè¡¥ä¸å¤„ç†å·¥å…·è¦æ‰¾åˆ°å“ªé‡Œæ˜¯æ”¹åŠ¨æ—¥å¿—ä¿¡æ¯çš„结æŸï¼Œæ˜¯ä¸å¯ç¼ºå°‘ +``---`` æ ‡è®°è¡Œå¯¹äºŽè¡¥ä¸å¤„ç†å·¥å…·è¦æ‰¾åˆ°å“ªé‡Œæ˜¯æ”¹åŠ¨æ—¥å¿—ä¿¡æ¯çš„结æŸï¼Œæ˜¯ä¸å¯ç¼ºå°‘ 的。 -对于 "---" æ ‡è®°ä¹‹åŽçš„é¢å¤–注解，一个好的用途就是用æ¥å†™ diffstat，用æ¥æ˜¾ -示修改了什么文件和æ¯ä¸ªæ–‡ä»¶éƒ½å¢žåŠ å’Œåˆ é™¤äº†å¤šå°‘è¡Œã€‚diffstat 对于比较大的补 -ä¸ç‰¹åˆ«æœ‰ç”¨ã€‚其余那些åªæ˜¯å’Œæ—¶åˆ»æˆ–者开å‘者相关的注解，ä¸åˆé€‚放到永久的改 -动日志里的，也应该放这里。 -使用 diffstat的选项 "-p 1 -w 70" è¿™æ ·æ–‡ä»¶åå°±ä¼šä»Žå†…æ ¸æºä»£ç æ ‘çš„ç›®å½•å¼€å§‹ +对于 ``---`` æ ‡è®°ä¹‹åŽçš„é¢å¤–注解，一个好的用途就是用æ¥å†™ ``diffstat`` ，用æ¥æ˜¾ +示修改了什么文件和æ¯ä¸ªæ–‡ä»¶éƒ½å¢žåŠ å’Œåˆ é™¤äº†å¤šå°‘è¡Œã€‚ ``diffstat`` 对于比较大的补 +ä¸ç‰¹åˆ«æœ‰ç”¨ã€‚ +使用 ``diffstat`` 的选项 ``-p 1 -w 70`` è¿™æ ·æ–‡ä»¶åå°±ä¼šä»Žå†…æ ¸æºä»£ç æ ‘çš„ç›®å½•å¼€å§‹ ，ä¸ä¼šå 用太宽的空间（很容易适åˆ80列的宽度，也许会有一些缩进。） +（ ``git`` 默认会生æˆåˆé€‚çš„diffstat。） + +其余那些åªé€‚用于当时或者与维护者相关的注解，ä¸åˆé€‚放到永久的改动日志里的，也 +应该放这里。较好的例å就是 ``è¡¥ä¸æ›´æ”¹è®°å½•`` ，记录了v1å’Œv2版本补ä¸ä¹‹é—´çš„差异。 + +请将æ¤ä¿¡æ¯æ”¾åœ¨å°†å˜æ›´æ—¥å¿—与补ä¸çš„其余部分分隔开的 ``---`` è¡Œ **之åŽ** 。版本 +ä¿¡æ¯ä¸æ˜¯æ交到gitæ ‘çš„å˜æ›´æ—¥å¿—的一部分。åªæ˜¯ä¾›å®¡é˜…äººå‘˜ä½¿ç”¨çš„é™„åŠ ä¿¡æ¯ã€‚如果将 +其放置在æäº¤æ ‡è®°ä¸Šæ–¹ï¼Œåˆ™éœ€è¦æ‰‹åŠ¨äº¤äº’æ‰èƒ½å°†å…¶åˆ 除。如果它ä½äºŽåˆ†éš”线以下，则在 +应用补ä¸æ—¶ä¼šè‡ªåŠ¨å‰¥ç¦»:: + + <commit message> + ... + Signed-off-by: Author <author@mail> + --- + V2 -> V3: Removed redundant helper function + V1 -> V2: Cleaned up coding style and addressed review comments -在åŽé¢çš„å‚考资料ä¸èƒ½çœ‹åˆ°é€‚当的补ä¸æ ¼å¼çš„更多细节。 + path/to/file | 5+++-- + ... -.. _cn_explicit_in_reply_to: +在åŽé¢çš„å‚考资料ä¸èƒ½çœ‹åˆ°æ£ç¡®è¡¥ä¸æ ¼å¼çš„更多细节。 -15) 明确回å¤é‚®ä»¶å¤´(In-Reply-To) -------------------------------- +.. _zh_backtraces: -æ‰‹åŠ¨æ·»åŠ å›žå¤è¡¥ä¸çš„çš„æ ‡é¢˜å¤´(In-Reply_To:) 是有帮助的（例如，使用 ``git send-email`` ） -将补ä¸ä¸Žä»¥å‰çš„相关讨论关è”èµ·æ¥ï¼Œä¾‹å¦‚，将bugä¿®å¤ç¨‹åºé“¾æŽ¥åˆ°ç”µå邮件和bug报告。 +æ交消æ¯ä¸çš„回溯（Backtraces） +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +回溯有助于记录导致问题的调用链。然而，并éžæ‰€æœ‰å›žæº¯éƒ½æœ‰å¸®åŠ©ã€‚例如，早期引导调 +用链是独特而明显的。而é€å—å¤åˆ¶å®Œæ•´çš„dmesgè¾“å‡ºåˆ™ä¼šå¢žåŠ æ—¶é—´æˆ³ã€æ¨¡å—列表ã€å¯„å˜ +å™¨å’Œå †æ ˆè½¬å‚¨ç‰åˆ†æ•£æ³¨æ„力的信æ¯ã€‚ + +å› æ¤ï¼Œæœ€æœ‰ç”¨çš„回溯应该从转储ä¸æå–相关信æ¯ï¼Œä»¥æ›´å®¹æ˜“集ä¸åœ¨çœŸå®žé—®é¢˜ä¸Šã€‚下é¢æ˜¯ +一个剪è£è‰¯å¥½çš„回溯示例:: + + unchecked MSR access error: WRMSR to 0xd51 (tried to write 0x0000000000000064) + at rIP: 0xffffffffae059994 (native_write_msr+0x4/0x20) + Call Trace: + mba_wrmsr + update_domains + rdtgroup_mkdir + +.. _zh_explicit_in_reply_to: + +明确回å¤é‚®ä»¶å¤´ï¼ˆIn-Reply-To） +----------------------------- + +æ‰‹åŠ¨æ·»åŠ å›žå¤è¡¥ä¸çš„的邮件头（In-Reply_To:）是有用的（例如，使用 ``git send-email`` ）， +å¯ä»¥å°†è¡¥ä¸ä¸Žä»¥å‰çš„相关讨论关è”èµ·æ¥ï¼Œä¾‹å¦‚，将bugè¡¥ä¸é“¾æŽ¥åˆ°ç”µå邮件和bug报告。 但是，对于多补ä¸ç³»åˆ—，最好é¿å…在回å¤æ—¶ä½¿ç”¨é“¾æŽ¥åˆ°è¯¥ç³»åˆ—çš„æ—§ç‰ˆæœ¬ã€‚è¿™æ ·ï¼Œ -è¡¥ä¸çš„多个版本就ä¸ä¼šæˆä¸ºç”µå邮件客户端ä¸æ— 法管ç†çš„引用åºåˆ—。如果链接有用， +è¡¥ä¸çš„多个版本就ä¸ä¼šæˆä¸ºç”µå邮件客户端ä¸æ— 法管ç†çš„å¼•ç”¨æ ‘ã€‚å¦‚æžœé“¾æŽ¥æœ‰ç”¨ï¼Œ å¯ä»¥ä½¿ç”¨ https://lore.kernel.org/ é‡å®šå‘器（例如，在å°é¢ç”µå邮件文本ä¸ï¼‰ 链接到补ä¸ç³»åˆ—的早期版本。 -16) å‘é€git pull请求 --------------------- - -如果您有一系列补ä¸ï¼Œé‚£ä¹ˆè®©ç»´æŠ¤äººå‘˜é€šè¿‡git pullæ“作将它们直接拉入å系统å˜å‚¨ -库å¯èƒ½æ˜¯æœ€æ–¹ä¾¿çš„。但是，请注æ„，从开å‘人员那里获å–è¡¥ä¸æ¯”从邮件列表ä¸èŽ·å–è¡¥ -ä¸éœ€è¦æ›´é«˜çš„ä¿¡ä»»åº¦ã€‚å› æ¤ï¼Œè®¸å¤šå系统维护人员ä¸æ„¿æ„接å—请求，特别是æ¥è‡ªæ–°çš„ -未知开å‘人员的请求。如果有疑问，您å¯ä»¥åœ¨å°é¢é‚®ä»¶ä¸ä½¿ç”¨pull 请求作为补ä¸ç³»åˆ— -æ£å¸¸å‘布的一个选项，让维护人员å¯ä»¥é€‰æ‹©ä½¿ç”¨å…¶ä¸ä¹‹ä¸€ã€‚ - -pull 请求的主题行ä¸åº”该有[Git Pull]。请求本身应该在一行ä¸åŒ…å«å˜å‚¨åº“å称和 -感兴趣的分支；它应该看起æ¥åƒ:: +ç»™å‡ºåŸºç¡€æ ‘ä¿¡æ¯ +-------------- - Please pull from +当其他开å‘人员收到您的补ä¸å¹¶å¼€å§‹å®¡é˜…时，知é“应该将您的工作放到代ç æ ‘åŽ†å²è®°å½• +ä¸çš„什么ä½ç½®é€šå¸¸å¾ˆæœ‰ç”¨ã€‚这对于自动化æŒç»é›†æˆæµæ°´ï¼ˆCI）特别有用，这些æµæ°´çº¿è¯• +图è¿è¡Œä¸€ç³»åˆ—测试，以便在维护人员开始审阅之å‰ç¡®å®šæ交的质é‡ã€‚ - git://jdelvare.pck.nerim.net/jdelvare-2.6 i2c-for-linus +如果您使用 ``git format-patch`` 生æˆè¡¥ä¸ï¼Œåˆ™å¯ä»¥é€šè¿‡ ``--base`` æ ‡å¿—åœ¨æäº¤ä¸ +自动包å«åŸºç¡€æ ‘ä¿¡æ¯ã€‚使用æ¤é€‰é¡¹æœ€ç®€å•ã€æœ€æ–¹ä¾¿çš„方法是é…åˆä¸»é¢˜åˆ†æ”¯:: - to get these changes: + $ git checkout -t -b my-topical-branch master + Branch 'my-topical-branch' set up to track local branch 'master'. + Switched to a new branch 'my-topical-branch' + [perform your edits and commits] -pull 请求还应该包å«ä¸€æ¡æ•´ä½“消æ¯ï¼Œè¯´æ˜Žè¯·æ±‚ä¸å°†åŒ…å«ä»€ä¹ˆï¼Œä¸€ä¸ªè¡¥ä¸æœ¬èº«çš„ ``Git shortlog`` -以åŠä¸€ä¸ªæ˜¾ç¤ºè¡¥ä¸ç³»åˆ—整体效果的 ``diffstat`` 。当然，将所有这些信æ¯æ”¶é›†åœ¨ä¸€èµ· -的最简å•æ–¹æ³•æ˜¯è®© ``git`` 使用 ``git request-pull`` 命令为您完æˆè¿™äº›å·¥ä½œã€‚ + $ git format-patch --base=auto --cover-letter -o outgoing/ master + outgoing/0000-cover-letter.patch + outgoing/0001-First-Commit.patch + outgoing/... -一些维护人员（包括Linus）希望看到æ¥è‡ªå·²ç¾åæäº¤çš„è¯·æ±‚ï¼›è¿™å¢žåŠ äº†ä»–ä»¬å¯¹ä½ çš„ -请求信心。特别是，在没有ç¾åæ ‡ç¾çš„情况下，Linus ä¸ä¼šä»Žåƒ Github è¿™æ ·çš„å…¬å…± -托管站点拉请求。 +å½“ä½ ç¼–è¾‘ ``outgoing/0000-cover-letter.patch`` 时，您会注æ„到在它的最底部有一 +è¡Œ ``base-commit:`` 尾注，它为审阅者和CI工具æ供了足够的信æ¯ä»¥æ£ç¡®æ‰§è¡Œ +``git am`` 而ä¸å¿…担心冲çª:: -创建æ¤ç±»ç¾å的第一æ¥æ˜¯ç”Ÿæˆä¸€ä¸ª GNRPG å¯†é’¥ï¼Œå¹¶ç”±ä¸€ä¸ªæˆ–å¤šä¸ªæ ¸å¿ƒå†…æ ¸å¼€å‘人员对 -其进行ç¾å。这一æ¥å¯¹æ–°å¼€å‘人员æ¥è¯´å¯èƒ½å¾ˆå›°éš¾ï¼Œä½†æ²¡æœ‰åŠžæ³•ç»•è¿‡å®ƒã€‚å‚åŠ ä¼šè®®æ˜¯ -找到å¯ä»¥ç¾ç½²æ‚¨çš„密钥的开å‘人员的好方法。 + $ git checkout -b patch-review [base-commit-id] + Switched to a new branch 'patch-review' + $ git am patches.mbox + Applying: First Commit + Applying: ... -一旦您在Git ä¸å‡†å¤‡äº†ä¸€ä¸ªæ‚¨å¸Œæœ›æœ‰äººæ‹‰çš„è¡¥ä¸ç³»åˆ—，就用 ``git tag -s`` 创建一 -个ç¾åæ ‡è®°ã€‚è¿™å°†åˆ›å»ºä¸€ä¸ªæ–°æ ‡è®°ï¼Œæ ‡è¯†è¯¥ç³»åˆ—ä¸çš„最åŽä¸€æ¬¡æ交，并包å«ç”¨æ‚¨çš„ç§ -钥创建的ç¾å。您还å¯ä»¥å°†changelogæ ·å¼çš„消æ¯æ·»åŠ åˆ°æ ‡è®°ä¸ï¼›è¿™æ˜¯ä¸€ä¸ªæ述拉请求 -整体效果的ç†æƒ³ä½ç½®ã€‚ +有关æ¤é€‰é¡¹çš„更多信æ¯ï¼Œè¯·å‚阅 ``man git-format-patch`` 。 -如果维护人员将è¦ä»Žä¸æå–çš„æ ‘ä¸æ˜¯æ‚¨æ£åœ¨ä½¿ç”¨çš„å˜å‚¨åº“，请ä¸è¦å¿˜è®°å°†å·²ç¾åçš„æ ‡è®° -显å¼æŽ¨é€åˆ°å…¬å…±æ ‘。 +.. note:: -生æˆæ‹‰è¯·æ±‚时，请使用已ç¾åçš„æ ‡è®°ä½œä¸ºç›®æ ‡ã€‚è¿™æ ·çš„å‘½ä»¤å¯ä»¥å®žçŽ°:: + ``--base`` 功能是在2.9.0版gitä¸å¼•å…¥çš„。 - git request-pull master git://my.public.tree/linux.git my-signed-tag +如果您ä¸ä½¿ç”¨gitæ ¼å¼åŒ–è¡¥ä¸ï¼Œä»ç„¶å¯ä»¥åŒ…å«ç›¸åŒçš„ ``base-commit`` 尾注，以指示您 +çš„å·¥ä½œæ‰€åŸºäºŽçš„æ ‘çš„æäº¤å“ˆå¸Œã€‚ä½ åº”è¯¥åœ¨å°é¢é‚®ä»¶æˆ–系列的第一个补ä¸ä¸æ·»åŠ 它，它应 +该放在 ``---`` 行的下é¢æˆ–所有其他内容之åŽï¼Œå³åªåœ¨ä½ 的电å邮件ç¾å之å‰ã€‚ å‚考文献 -------- -Andrew Morton, "The perfect patch" (tpp). +Andrew Morton，“完美的补ä¸â€ï¼ˆtpp） <https://www.ozlabs.org/~akpm/stuff/tpp.txt> -Jeff Garzik, "Linux kernel patch submission format". +Jeff Garzik，“Linuxå†…æ ¸è¡¥ä¸æäº¤æ ¼å¼â€ <https://web.archive.org/web/20180829112450/http://linux.yyz.us/patch-format.html> -Greg Kroah-Hartman, "How to piss off a kernel subsystem maintainer". +Greg Kroah-Hartman，“如何惹æ¼å†…æ ¸å系统维护人员†<http://www.kroah.com/log/linux/maintainer.html> <http://www.kroah.com/log/linux/maintainer-02.html> @@ -642,16 +643,15 @@ Greg Kroah-Hartman, "How to piss off a kernel subsystem maintainer". <http://www.kroah.com/log/linux/maintainer-06.html> -NO!!!! No more huge patch bombs to linux-kernel@vger.kernel.org people! +ä¸ï¼ï¼ï¼åˆ«å†å‘巨型补ä¸ç‚¸å¼¹ç»™linux-kernel@vger.kernel.orgçš„äººä»¬äº†ï¼ <https://lore.kernel.org/r/20050711.125305.08322243.davem@davemloft.net> -Kernel Documentation/process/coding-style.rst: - :ref:`Documentation/translations/zh_CN/process/coding-style.rst <cn_codingstyle>` +å†…æ ¸ Documentation/translations/zh_CN/process/coding-style.rst -Linus Torvalds's mail on the canonical patch format: +Linus Torvaldså…³äºŽæ ‡å‡†è¡¥ä¸æ ¼å¼çš„邮件 <https://lore.kernel.org/r/Pine.LNX.4.58.0504071023190.28951@ppc970.osdl.org> -Andi Kleen, "On submitting kernel patches" - Some strategies to get difficult or controversial changes in. +Andi Kleen，“æ交补ä¸ä¹‹è·¯â€ + 一些帮助åˆå…¥å›°éš¾æˆ–有争议的å˜æ›´çš„ç–略。 http://halobates.de/on-submitting-patches.pdf diff --git a/Documentation/translations/zh_CN/scheduler/sched-design-CFS.rst b/Documentation/translations/zh_CN/scheduler/sched-design-CFS.rst index 26b0f36f793d..3076402406c4 100644 --- a/Documentation/translations/zh_CN/scheduler/sched-design-CFS.rst +++ b/Documentation/translations/zh_CN/scheduler/sched-design-CFS.rst @@ -80,7 +80,7 @@ p->se.vruntime。一旦p->se.vruntimeå˜å¾—足够大，其它的任务将æˆä¸ºæ CFS使用纳秒粒度的计时，ä¸ä¾èµ–于任何jiffies或HZçš„ç»†èŠ‚ã€‚å› æ¤CFS并ä¸åƒä¹‹å‰çš„è°ƒåº¦å™¨é‚£æ · 有“时间片â€çš„概念，也没有任何å¯å‘å¼çš„设计。唯一å¯è°ƒçš„å‚æ•°ï¼ˆä½ éœ€è¦æ‰“å¼€CONFIG_SCHED_DEBUG）是： - /proc/sys/kernel/sched_min_granularity_ns + /sys/kernel/debug/sched/min_granularity_ns 它å¯ä»¥ç”¨æ¥å°†è°ƒåº¦å™¨ä»Žâ€œæ¡Œé¢â€æ¨¡å¼ï¼ˆä¹Ÿå°±æ˜¯ä½Žæ—¶å»¶ï¼‰è°ƒèŠ‚为“æœåŠ¡å™¨â€ï¼ˆä¹Ÿå°±æ˜¯é«˜æ‰¹å¤„ç†ï¼‰æ¨¡å¼ã€‚ 它的默认设置是适åˆæ¡Œé¢çš„工作负载。SCHED_BATCH也被CFS调度器模å—处ç†ã€‚ diff --git a/Documentation/translations/zh_TW/oops-tracing.txt b/Documentation/translations/zh_TW/oops-tracing.txt deleted file mode 100644 index be8e59f2abaf..000000000000 --- a/Documentation/translations/zh_TW/oops-tracing.txt +++ /dev/null @@ -1,212 +0,0 @@ -Chinese translated version of Documentation/admin-guide/bug-hunting.rst - -If you have any comment or update to the content, please contact the -original document maintainer directly. However, if you have a problem -communicating in English you can also ask the Chinese maintainer for -help. Contact the Chinese maintainer if this translation is outdated -or if there is a problem with the translation. - -Traditional Chinese maintainer: Hu Haowen <src.res@email.cn> ---------------------------------------------------------------------- -Documentation/admin-guide/bug-hunting.rst çš„ç¹é«”ä¸æ–‡ç‰ˆç¿»è¯ - -如果想評論或更新本文的內容，請直接è¯ç¹«åŽŸæ–‡æª”çš„ç¶è·è€…ã€‚å¦‚æžœä½ ä½¿ç”¨è‹±æ–‡ -交æµæœ‰å›°é›£çš„話，也å¯ä»¥å‘ç¹é«”ä¸æ–‡ç‰ˆç¶è·è€…求助。如果本翻è¯æ›´æ–°ä¸åŠæ™‚或 -者翻è¯å˜åœ¨å•é¡Œï¼Œè«‹è¯ç¹«ç¹é«”ä¸æ–‡ç‰ˆç¶è·è€…。 - -ç¹é«”ä¸æ–‡ç‰ˆç¶è·è€…： 胡皓文 Hu Haowen <src.res@email.cn> -ç¹é«”ä¸æ–‡ç‰ˆç¿»è¯è€…： 胡皓文 Hu Haowen <src.res@email.cn> -ç¹é«”ä¸æ–‡ç‰ˆæ ¡è¯è€…： 胡皓文 Hu Haowen <src.res@email.cn> - -以下爲æ£æ–‡ ---------------------------------------------------------------------- - -注æ„： ksymoops 在2.6ä¸æ˜¯æ²’有用的。 è«‹ä»¥åŽŸæœ‰æ ¼å¼ä½¿ç”¨Oops(來自dmesg，ç‰ç‰)。 -忽略任何這樣那樣關於「解碼Oopsã€æˆ–者「通éŽksymoopsé‹è¡Œã€çš„文檔。 å¦‚æžœä½ è²¼å‡ºé‹è¡ŒéŽ -ksymoops的來自2.6çš„Oops，人們åªæœƒè®“ä½ é‡è²¼ä¸€æ¬¡ã€‚ - -å¿«é€Ÿç¸½çµ -------------- - -發ç¾Oops並發é€çµ¦çœ‹ä¼¼ç›¸é—œçš„å…§æ ¸é ˜åŸŸçš„ç¶è·è€…。別太擔心å°ä¸ä¸Šè™Ÿã€‚å¦‚æžœä½ ä¸ç¢ºå®šå°±ç™¼çµ¦ -å’Œä½ æ‰€åšçš„äº‹æƒ…ç›¸é—œçš„ä»£ç¢¼çš„è² è²¬äººã€‚ 如果å¯é‡ç¾è©¦è‘—æ述怎樣é‡æ§‹ã€‚ 那甚至比oops更有 -價值。 - -å¦‚æžœä½ å°æ–¼ç™¼é€çµ¦èª°ä¸€ç„¡æ‰€çŸ¥ï¼Œ 發給linux-kernel@vger.kernel.org。感è¬ä½ 幫助Linux -儘å¯èƒ½åœ°ç©©å®šã€‚ - -Oops在哪裡? ----------------------- - -通常Oops文本由klogdå¾žå…§æ ¸ç·©è¡å€é‡Œè®€å–並傳給syslogd，由syslogd寫到syslog文件ä¸ï¼Œ -典型地是/var/log/messages(ä¾è³´æ–¼/etc/syslog.conf)。有時klogd崩潰了,這種情æ³ä¸‹ä½ -èƒ½å¤ é‹è¡Œdmesg > fileä¾†å¾žå…§æ ¸ç·©è¡å€ä¸è®€å–數據並ä¿å˜ä¸‹ä¾†ã€‚ å¦å‰‡ä½ å¯ä»¥ -cat /proc/kmsg > file， ç„¶è€Œä½ å¿…é ˆä»‹å…¥ä¸æ¢å‚³è¼¸ï¼Œ kmsg是一個「永ä¸çµæŸçš„文件ã€ã€‚如 -æžœæ©Ÿå™¨å´©æ½°å£žåˆ°ä½ ä¸èƒ½è¼¸å…¥å‘½ä»¤æˆ–者ç£ç¢Ÿä¸å¯ç”¨é‚£éº¼ä½ 有三種é¸æ“‡:- - -（1） 手抄å±å¹•ä¸Šçš„文本待機器é‡å•“後å†è¼¸å…¥è¨ˆç®—機。 麻煩但如果沒有é‡å°å´©æ½°çš„準備， -這是僅有的é¸æ“‡ã€‚ å¦å¤–ï¼Œä½ å¯ä»¥ç”¨æ•¸ä½ç›¸æ©ŸæŠŠå±å¹•æ‹ä¸‹ä¾†-ä¸å¤ªå¥½ï¼Œä½†æ¯”沒有強。 如果信 -æ¯æ»¾å‹•åˆ°äº†çµ‚端的上é¢ï¼Œä½ 會發ç¾ä»¥é«˜åˆ†è¾¯çŽ‡å•“動（比如，vga=791ï¼‰æœƒè®“ä½ è®€åˆ°æ›´å¤šçš„æ–‡ -本。（注æ„：這需è¦vesafb，所以å°ã€Žæ—©æœŸã€çš„oops沒有幫助） - -（2）用串å£çµ‚端啓動（請åƒçœ‹Documentation/admin-guide/serial-console.rst），é‹è¡Œä¸€å€‹null -modem到å¦ä¸€å°æ©Ÿå™¨ä¸¦ç”¨ä½ å–œæ¡çš„通訊工具ç²å–輸出。Minicom工作地很好。 - -（3）使用Kdump（請åƒçœ‹Documentation/admin-guide/kdump/kdump.rst）， -使用在Documentation/admin-guide/kdump/gdbmacros.txtä¸å®šç¾©çš„dmesg gdbå®ï¼Œå¾žèˆŠçš„å…§å˜ä¸æå–å…§æ ¸ -環形緩è¡å€ã€‚ - -å®Œæ•´ä¿¡æ¯ ----------------- - -注æ„：以下來自於Linus的郵件é©ç”¨æ–¼2.4å…§æ ¸ã€‚ æˆ‘å› çˆ²æ·å²åŽŸå› ä¿ç•™äº†å®ƒï¼Œä¸¦ä¸”å› çˆ²å…¶ä¸ -一些信æ¯ä»ç„¶é©ç”¨ã€‚ 特別注æ„的是，請忽略任何ksymoops的引用。 - -From: Linus Torvalds <torvalds@osdl.org> - -怎樣跟蹤Oops.. [原發到linux-kernel的一å°éƒµä»¶] - -主è¦çš„竅門是有五年和這些煩人的oops消æ¯æ‰“交é“的經驗;-) - -å¯¦éš›ä¸Šï¼Œä½ æœ‰è¾¦æ³•ä½¿å®ƒæ›´ç°¡å–®ã€‚æˆ‘æœ‰å…©å€‹ä¸åŒçš„方法： - - gdb /usr/src/linux/vmlinux - gdb> disassemble <offending_function> - -那是發ç¾å•é¡Œçš„簡單辦法，至少如果bugå ±å‘Šåšçš„好的情æ³ä¸‹ï¼ˆè±¡é€™å€‹ä¸€æ¨£-é‹è¡Œksymoops -得到oops發生的函數åŠå‡½æ•¸å…§çš„å移）。 - -å“¦ï¼Œå¦‚æžœå ±å‘Šç™¼ç”Ÿçš„å…§æ ¸ä»¥ç›¸åŒçš„ç·¨è¯å™¨å’Œç›¸ä¼¼çš„é…置編è¯å®ƒæœƒæœ‰å¹«åŠ©çš„。 - -å¦ä¸€ä»¶è¦åšçš„事是å彙編bugå ±å‘Šçš„ã€ŒCodeã€éƒ¨åˆ†ï¼šksymoops也會用æ£ç¢ºçš„工具來åšé€™ä»¶äº‹ï¼Œ -ä½†å¦‚æžœæ²’æœ‰é‚£äº›å·¥å…·ä½ å¯ä»¥å¯«ä¸€å€‹å‚»ç¨‹åºï¼š - - char str[] = "\xXX\xXX\xXX..."; - main(){} - -並用gcc -gç·¨è¯å®ƒç„¶å¾ŒåŸ·è¡Œã€Œdisassemble strã€ï¼ˆXX部分是由Oopså ±å‘Šçš„å€¼-ä½ å¯ä»¥åƒ…剪切 -粘貼並用「\xã€æ›¿æ›ç©ºæ ¼-我就是這麼åšçš„ï¼Œå› çˆ²æˆ‘æ‡¶å¾—å¯«ç¨‹åºè‡ªå‹•åšé€™ä¸€åˆ‡ï¼‰ã€‚ - -å¦å¤–ï¼Œä½ å¯ä»¥ç”¨scripts/decodecode這個shell腳本。它的使用方法是： -decodecode < oops.txt - -「Codeã€ä¹‹å¾Œçš„åå…進ä½å—節å¯èƒ½ï¼ˆåœ¨æŸäº›æž¶æ§‹ä¸Šï¼‰æœ‰ä¸€äº›ç•¶å‰æŒ‡ä»¤ä¹‹å‰çš„指令å—ç¯€ä»¥åŠ -當å‰å’Œä¹‹å¾Œçš„指令å—節 - -Code: f9 0f 8d f9 00 00 00 8d 42 0c e8 dd 26 11 c7 a1 60 ea 2b f9 8b 50 08 a1 -64 ea 2b f9 8d 34 82 8b 1e 85 db 74 6d 8b 15 60 ea 2b f9 <8b> 43 04 39 42 54 -7e 04 40 89 42 54 8b 43 04 3b 05 00 f6 52 c0 - -æœ€å¾Œï¼Œå¦‚æžœä½ æƒ³çŸ¥é“ä»£ç¢¼ä¾†è‡ªå“ªè£¡ï¼Œä½ å¯ä»¥ï¼š - - cd /usr/src/linux - make fs/buffer.s # 或任何產生BUG的文件 - -ç„¶å¾Œä½ æœƒæ¯”gdbå彙編更清楚的知é“發生了什麼。 - -ç¾åœ¨ï¼Œå•é¡Œæ˜¯æŠŠä½ 所æ“有的所有數據çµåˆèµ·ä¾†ï¼šCæºç¢¼ï¼ˆé—œæ–¼å®ƒæ‡‰è©²æ€Žæ¨£çš„一般知è˜ï¼‰ï¼Œ -彙編代碼åŠå…¶å彙編得到的代碼（å¦å¤–還有從「oopsã€æ¶ˆæ¯å¾—到的寄å˜å™¨ç‹€æ…‹-å°äº†è§£æ¯€å£žçš„ -指é‡æœ‰ç”¨ï¼Œè€Œä¸”ç•¶ä½ æœ‰äº†å½™ç·¨ä»£ç¢¼ä½ ä¹Ÿèƒ½æ‹¿å…¶å®ƒçš„å¯„å˜å™¨å’Œä»»ä½•å®ƒå€‘å°æ‡‰çš„C表é”å¼åšåŒ¹é… -）。 - -å¯¦éš›ä¸Šï¼Œä½ åƒ…éœ€çœ‹çœ‹å“ªè£¡ä¸åŒ¹é…（這個例å是「Codeã€å彙編和編è¯å™¨ç”Ÿæˆçš„代碼ä¸åŒ¹é…）。 -ç„¶å¾Œä½ é ˆè¦æ‰¾å‡ºçˆ²ä»€éº¼ä¸åŒ¹é…。通常很簡單-ä½ çœ‹åˆ°ä»£ç¢¼ä½¿ç”¨äº†ç©ºæŒ‡é‡ç„¶å¾Œä½ çœ‹ä»£ç¢¼æƒ³çŸ¥é“ -空指é‡æ˜¯æ€Žéº¼å‡ºç¾çš„，還有檢查它是å¦åˆæ³•.. - -ç¾åœ¨ï¼Œå¦‚æžœæ˜Žç™½é€™æ˜¯ä¸€é …è€—æ™‚çš„å·¥ä½œè€Œä¸”éœ€è¦ä¸€ä¸é»žå…’的專心，沒錯。這就是我爲什麼大多 -åªæ˜¯å¿½ç•¥é‚£äº›æ²’有符號表信æ¯çš„å´©æ½°å ±å‘Šçš„åŽŸå› ï¼šç°¡å–®çš„èªªå¤ªé›£æŸ¥æ‰¾äº†ï¼ˆæˆ‘æœ‰ä¸€äº› -程åºç”¨æ–¼åœ¨å…§æ ¸ä»£ç¢¼æ®µä¸æœç´¢ç‰¹å®šçš„模å¼ï¼Œè€Œä¸”有時我也已經能找出那些崩潰的地方，但是 -僅僅是找出æ£ç¢ºçš„åºåˆ—也確實需è¦ç›¸ç•¶ç´®å¯¦çš„å…§æ ¸çŸ¥è˜ï¼‰ - -_有時_會發生這種情æ³ï¼Œæˆ‘僅看到崩潰ä¸çš„å彙編代碼åºåˆ—， 然後我馬上就明白å•é¡Œå‡ºåœ¨ -哪裡。這時我æ‰æ„è˜åˆ°è‡ªå·±å¹¹é€™å€‹å·¥ä½œå·²ç¶“太長時間了;-) - - Linus - - ---------------------------------------------------------------------------- -關於Oops跟蹤的註解： - -爲了幫助Linuså’Œå…¶å®ƒå…§æ ¸é–‹ç™¼è€…ï¼Œklogdç´å…¥äº†å¤§é‡çš„支æŒä¾†è™•ç†ä¿è·éŒ¯èª¤ã€‚爲了æ“æœ‰å° -地å€è§£æžçš„完整支æŒè‡³å°‘應該使用1.3-pl3çš„sysklogd包。 - -當ä¿è·éŒ¯èª¤ç™¼ç”Ÿæ™‚，klogd守è·é€²ç¨‹è‡ªå‹•æŠŠå…§æ ¸æ—¥èªŒä¿¡æ¯ä¸çš„é‡è¦åœ°å€ç¿»è¯æˆå®ƒå€‘相應的符 -號。 - -klogd執行兩種類型的地å€è§£æžã€‚首先是éœæ…‹ç¿»è¯å…¶æ¬¡æ˜¯å‹•æ…‹ç¿»è¯ã€‚éœæ…‹ç¿»è¯å’Œksymoops -一樣使用System.map文件。爲了åšéœæ…‹ç¿»è¯klogd守è·é€²ç¨‹å¿…é ˆåœ¨åˆå§‹åŒ–時能找到system -map文件。關於klogd怎樣æœç´¢map文件請åƒçœ‹klogd手冊é 。 - -動態地å€ç¿»è¯åœ¨ä½¿ç”¨å…§æ ¸å¯è£è¼‰æ¨¡å¡Šæ™‚很é‡è¦ã€‚ å› çˆ²å…§æ ¸æ¨¡å¡Šçš„å…§å˜æ˜¯å¾žå…§æ ¸å‹•æ…‹å…§å˜æ± -里分é…的，所以ä¸ç®¡æ˜¯æ¨¡å¡Šé–‹å§‹ä½ç½®é‚„是模塊ä¸å‡½æ•¸å’Œç¬¦è™Ÿçš„ä½ç½®éƒ½ä¸æ˜¯å›ºå®šçš„。 - -å…§æ ¸æ”¯æŒå…許程åºæ±ºå®šè£è¼‰å“ªäº›æ¨¡å¡Šå’Œå®ƒå€‘在內å˜ä¸ä½ç½®çš„系統調用。使用這些系統調用 -klogd守è·é€²ç¨‹ç”Ÿæˆä¸€å¼µç¬¦è™Ÿè¡¨ç”¨æ–¼èª¿è©¦ç™¼ç”Ÿåœ¨å¯è£è¼‰æ¨¡å¡Šä¸çš„ä¿è·éŒ¯èª¤ã€‚ - -至少klogd會æ供產生ä¿è·éŒ¯èª¤çš„模塊å。還å¯æœ‰é¡å¤–的符號信æ¯ä¾›å¯è£è¼‰æ¨¡å¡Šé–‹ç™¼è€…é¸æ“‡ -以從模塊ä¸è¼¸å‡ºç¬¦è™Ÿä¿¡æ¯ã€‚ - -å› çˆ²å…§æ ¸æ¨¡å¡Šç’°å¢ƒå¯èƒ½æ˜¯å‹•æ…‹çš„ï¼Œæ‰€ä»¥å¿…é ˆæœ‰ä¸€ç¨®æ©Ÿåˆ¶ç•¶æ¨¡å¡Šç’°å¢ƒç™¼ç”Ÿæ”¹è®Šæ™‚ä¾†é€šçŸ¥klogd -守è·é€²ç¨‹ã€‚ 有一些å¯ç”¨çš„命令行é¸é …å…許klogdå‘當å‰åŸ·è¡Œä¸çš„守è·é€²ç¨‹ç™¼é€ä¿¡è™Ÿï¼Œå‘ŠçŸ¥ç¬¦ -號信æ¯æ‡‰è©²è¢«åˆ·æ–°äº†ã€‚ 更多信æ¯è«‹åƒçœ‹klogd手冊é 。 - -sysklogd發布時包å«ä¸€å€‹è£œä¸ä¿®æ”¹äº†modules-2.0.0包，無論何時一個模塊è£è¼‰æˆ–者å¸è¼‰éƒ½ -會自動å‘klogd發é€ä¿¡è™Ÿã€‚打上這個補ä¸æ供了必è¦çš„å°èª¿è©¦ç™¼ç”Ÿæ–¼å…§æ ¸å¯è£è¼‰æ¨¡å¡Šçš„ä¿è· -錯誤的無縫支æŒã€‚ - -以下是被klogd處ç†éŽçš„發生在å¯è£è¼‰æ¨¡å¡Šä¸çš„一個ä¿è·éŒ¯èª¤ä¾‹å： ---------------------------------------------------------------------------- -Aug 29 09:51:01 blizard kernel: Unable to handle kernel paging request at virtual address f15e97cc -Aug 29 09:51:01 blizard kernel: current->tss.cr3 = 0062d000, %cr3 = 0062d000 -Aug 29 09:51:01 blizard kernel: *pde = 00000000 -Aug 29 09:51:01 blizard kernel: Oops: 0002 -Aug 29 09:51:01 blizard kernel: CPU: 0 -Aug 29 09:51:01 blizard kernel: EIP: 0010:[oops:_oops+16/3868] -Aug 29 09:51:01 blizard kernel: EFLAGS: 00010212 -Aug 29 09:51:01 blizard kernel: eax: 315e97cc ebx: 003a6f80 ecx: 001be77b edx: 00237c0c -Aug 29 09:51:01 blizard kernel: esi: 00000000 edi: bffffdb3 ebp: 00589f90 esp: 00589f8c -Aug 29 09:51:01 blizard kernel: ds: 0018 es: 0018 fs: 002b gs: 002b ss: 0018 -Aug 29 09:51:01 blizard kernel: Process oops_test (pid: 3374, process nr: 21, stackpage=00589000) -Aug 29 09:51:01 blizard kernel: Stack: 315e97cc 00589f98 0100b0b4 bffffed4 0012e38e 00240c64 003a6f80 00000001 -Aug 29 09:51:01 blizard kernel: 00000000 00237810 bfffff00 0010a7fa 00000003 00000001 00000000 bfffff00 -Aug 29 09:51:01 blizard kernel: bffffdb3 bffffed4 ffffffda 0000002b 0007002b 0000002b 0000002b 00000036 -Aug 29 09:51:01 blizard kernel: Call Trace: [oops:_oops_ioctl+48/80] [_sys_ioctl+254/272] [_system_call+82/128] -Aug 29 09:51:01 blizard kernel: Code: c7 00 05 00 00 00 eb 08 90 90 90 90 90 90 90 90 89 ec 5d c3 ---------------------------------------------------------------------------- - -Dr. G.W. Wettstein Oncology Research Div. Computing Facility -Roger Maris Cancer Center INTERNET: greg@wind.rmcc.com -820 4th St. N. -Fargo, ND 58122 -Phone: 701-234-7556 - - ---------------------------------------------------------------------------- -å—æ±™æŸ“çš„å…§æ ¸ - -一些oopså ±å‘Šåœ¨ç¨‹åºè¨˜æ•¸å™¨ä¹‹å¾ŒåŒ…å«å—符串'Tainted: 'ã€‚é€™è¡¨æ˜Žå…§æ ¸å·²ç¶“è¢«ä¸€äº›æ±è¥¿çµ¦æ±™ -染了。 該å—符串之後緊跟著一系列的ä½ç½®æ•æ„Ÿçš„å—符，æ¯å€‹ä»£è¡¨ä¸€å€‹ç‰¹å®šçš„汙染值。 - - 1：'G'如果所有è£è¼‰çš„模塊都有GPL或相容的許å¯è‰ï¼Œ'P'如果è£è¼‰äº†ä»»ä½•çš„專有模塊。 -沒有模塊MODULE_LICENSE或者帶有insmodèªçˆ²æ˜¯èˆ‡GPLä¸ç›¸å®¹çš„çš„MODULE_LICENSE的模塊被 -èªå®šæ˜¯å°ˆæœ‰çš„。 - - 2：'F'如果有任何通éŽã€Œinsmod -fã€è¢«å¼·åˆ¶è£è¼‰çš„模塊，' '如果所有模塊都被æ£å¸¸è£è¼‰ã€‚ - - 3：'S'如果oops發生在SMPå…§æ ¸ä¸ï¼Œé‹è¡Œæ–¼æ²’有è‰æ˜Žå®‰å…¨é‹è¡Œå¤šè™•ç†å™¨çš„硬體。 當å‰é€™ç¨® -情æ³åƒ…é™æ–¼å¹¾ç¨®ä¸æ”¯æŒSMP的速é¾è™•ç†å™¨ã€‚ - - 4：'R'如果模塊通éŽã€Œinsmod -fã€è¢«å¼·åˆ¶è£è¼‰ï¼Œ' '如果所有模塊都被æ£å¸¸è£è¼‰ã€‚ - - 5：'M'如果任何處ç†å™¨å ±å‘Šäº†æ©Ÿå™¨æª¢æŸ¥ç•°å¸¸ï¼Œ' '如果沒有發生機器檢查異常。 - - 6：'B'如果é 釋放函數發ç¾äº†ä¸€å€‹éŒ¯èª¤çš„é 引用或者一些éžé 期的é 標誌。 - - 7：'U'如果用戶或者用戶應用程å¼ç‰¹åˆ¥è«‹æ±‚è¨ç½®æ±™æŸ“標誌，å¦å‰‡' '。 - - 8：'D'å¦‚æžœå…§æ ¸å‰›å‰›æ»æŽ‰ï¼Œæ¯”如有OOPS或者BUG。 - -使用'Tainted: 'å—符串的主è¦åŽŸå› 是è¦å‘Šè¨´å…§æ ¸èª¿è©¦è€…，這是å¦æ˜¯ä¸€å€‹ä¹¾æ·¨çš„å…§æ ¸äº¦æˆ–ç™¼ -生了任何的ä¸æ£å¸¸çš„事。汙染是永久的：å³ä½¿å‡ºéŒ¯çš„模塊已經被å¸è¼‰äº†ï¼Œæ±™æŸ“值ä»ç„¶å˜åœ¨ï¼Œ -ä»¥è¡¨æ˜Žå…§æ ¸ä¸å†å€¼å¾—信任。 - diff --git a/Documentation/translations/zh_TW/process/magic-number.rst b/Documentation/translations/zh_TW/process/magic-number.rst index ae321a9aaece..f3f7082e17c6 100644 --- a/Documentation/translations/zh_TW/process/magic-number.rst +++ b/Documentation/translations/zh_TW/process/magic-number.rst @@ -61,88 +61,17 @@ Linux é”術數 é”術數å æ•¸å— çµæ§‹ 文件 ===================== ================ ======================== ========================================== PG_MAGIC 'P' pg_{read,write}_hdr ``include/linux/pg.h`` -CMAGIC 0x0111 user ``include/linux/a.out.h`` -MKISS_DRIVER_MAGIC 0x04bf mkiss_channel ``drivers/net/mkiss.h`` -HDLC_MAGIC 0x239e n_hdlc ``drivers/char/n_hdlc.c`` APM_BIOS_MAGIC 0x4101 apm_user ``arch/x86/kernel/apm_32.c`` -DB_MAGIC 0x4442 fc_info ``drivers/net/iph5526_novram.c`` -DL_MAGIC 0x444d fc_info ``drivers/net/iph5526_novram.c`` FASYNC_MAGIC 0x4601 fasync_struct ``include/linux/fs.h`` -FF_MAGIC 0x4646 fc_info ``drivers/net/iph5526_novram.c`` -PTY_MAGIC 0x5001 ``drivers/char/pty.c`` -PPP_MAGIC 0x5002 ppp ``include/linux/if_pppvar.h`` -SSTATE_MAGIC 0x5302 serial_state ``include/linux/serial.h`` SLIP_MAGIC 0x5302 slip ``drivers/net/slip.h`` -STRIP_MAGIC 0x5303 strip ``drivers/net/strip.c`` -SIXPACK_MAGIC 0x5304 sixpack ``drivers/net/hamradio/6pack.h`` -AX25_MAGIC 0x5316 ax_disp ``drivers/net/mkiss.h`` -TTY_MAGIC 0x5401 tty_struct ``include/linux/tty.h`` -MGSL_MAGIC 0x5401 mgsl_info ``drivers/char/synclink.c`` -TTY_DRIVER_MAGIC 0x5402 tty_driver ``include/linux/tty_driver.h`` MGSLPC_MAGIC 0x5402 mgslpc_info ``drivers/char/pcmcia/synclink_cs.c`` -USB_SERIAL_MAGIC 0x6702 usb_serial ``drivers/usb/serial/usb-serial.h`` -FULL_DUPLEX_MAGIC 0x6969 ``drivers/net/ethernet/dec/tulip/de2104x.c`` -USB_BLUETOOTH_MAGIC 0x6d02 usb_bluetooth ``drivers/usb/class/bluetty.c`` -RFCOMM_TTY_MAGIC 0x6d02 ``net/bluetooth/rfcomm/tty.c`` -USB_SERIAL_PORT_MAGIC 0x7301 usb_serial_port ``drivers/usb/serial/usb-serial.h`` -CG_MAGIC 0x00090255 ufs_cylinder_group ``include/linux/ufs_fs.h`` -LSEMAGIC 0x05091998 lse ``drivers/fc4/fc.c`` -GDTIOCTL_MAGIC 0x06030f07 gdth_iowr_str ``drivers/scsi/gdth_ioctl.h`` -RIEBL_MAGIC 0x09051990 ``drivers/net/atarilance.c`` -NBD_REQUEST_MAGIC 0x12560953 nbd_request ``include/linux/nbd.h`` -RED_MAGIC2 0x170fc2a5 (any) ``mm/slab.c`` BAYCOM_MAGIC 0x19730510 baycom_state ``drivers/net/baycom_epp.c`` -ISDN_X25IFACE_MAGIC 0x1e75a2b9 isdn_x25iface_proto_data ``drivers/isdn/isdn_x25iface.h`` -ECP_MAGIC 0x21504345 cdkecpsig ``include/linux/cdk.h`` -LSOMAGIC 0x27091997 lso ``drivers/fc4/fc.c`` -LSMAGIC 0x2a3b4d2a ls ``drivers/fc4/fc.c`` -WANPIPE_MAGIC 0x414C4453 sdla_{dump,exec} ``include/linux/wanpipe.h`` -CS_CARD_MAGIC 0x43525553 cs_card ``sound/oss/cs46xx.c`` -LABELCL_MAGIC 0x4857434c labelcl_info_s ``include/asm/ia64/sn/labelcl.h`` -ISDN_ASYNC_MAGIC 0x49344C01 modem_info ``include/linux/isdn.h`` -CTC_ASYNC_MAGIC 0x49344C01 ctc_tty_info ``drivers/s390/net/ctctty.c`` -ISDN_NET_MAGIC 0x49344C02 isdn_net_local_s ``drivers/isdn/i4l/isdn_net_lib.h`` -SAVEKMSG_MAGIC2 0x4B4D5347 savekmsg ``arch/*/amiga/config.c`` -CS_STATE_MAGIC 0x4c4f4749 cs_state ``sound/oss/cs46xx.c`` -SLAB_C_MAGIC 0x4f17a36d kmem_cache ``mm/slab.c`` -COW_MAGIC 0x4f4f4f4d cow_header_v1 ``arch/um/drivers/ubd_user.c`` -I810_CARD_MAGIC 0x5072696E i810_card ``sound/oss/i810_audio.c`` -TRIDENT_CARD_MAGIC 0x5072696E trident_card ``sound/oss/trident.c`` -ROUTER_MAGIC 0x524d4157 wan_device [in ``wanrouter.h`` pre 3.9] -SAVEKMSG_MAGIC1 0x53415645 savekmsg ``arch/*/amiga/config.c`` -GDA_MAGIC 0x58464552 gda ``arch/mips/include/asm/sn/gda.h`` -RED_MAGIC1 0x5a2cf071 (any) ``mm/slab.c`` -EEPROM_MAGIC_VALUE 0x5ab478d2 lanai_dev ``drivers/atm/lanai.c`` HDLCDRV_MAGIC 0x5ac6e778 hdlcdrv_state ``include/linux/hdlcdrv.h`` -PCXX_MAGIC 0x5c6df104 channel ``drivers/char/pcxx.h`` KV_MAGIC 0x5f4b565f kernel_vars_s ``arch/mips/include/asm/sn/klkernvars.h`` -I810_STATE_MAGIC 0x63657373 i810_state ``sound/oss/i810_audio.c`` -TRIDENT_STATE_MAGIC 0x63657373 trient_state ``sound/oss/trident.c`` -M3_CARD_MAGIC 0x646e6f50 m3_card ``sound/oss/maestro3.c`` -FW_HEADER_MAGIC 0x65726F66 fw_header ``drivers/atm/fore200e.h`` -SLOT_MAGIC 0x67267321 slot ``drivers/hotplug/cpqphp.h`` -SLOT_MAGIC 0x67267322 slot ``drivers/hotplug/acpiphp.h`` -LO_MAGIC 0x68797548 nbd_device ``include/linux/nbd.h`` -M3_STATE_MAGIC 0x734d724d m3_state ``sound/oss/maestro3.c`` -VMALLOC_MAGIC 0x87654320 snd_alloc_track ``sound/core/memory.c`` -KMALLOC_MAGIC 0x87654321 snd_alloc_track ``sound/core/memory.c`` -PWC_MAGIC 0x89DC10AB pwc_device ``drivers/usb/media/pwc.h`` -NBD_REPLY_MAGIC 0x96744668 nbd_reply ``include/linux/nbd.h`` -ENI155_MAGIC 0xa54b872d midway_eprom ``drivers/atm/eni.h`` CODA_MAGIC 0xC0DAC0DA coda_file_info ``fs/coda/coda_fs_i.h`` -DPMEM_MAGIC 0xc0ffee11 gdt_pci_sram ``drivers/scsi/gdth.h`` YAM_MAGIC 0xF10A7654 yam_port ``drivers/net/hamradio/yam.c`` CCB_MAGIC 0xf2691ad2 ccb ``drivers/scsi/ncr53c8xx.c`` QUEUE_MAGIC_FREE 0xf7e1c9a3 queue_entry ``drivers/scsi/arm/queue.c`` QUEUE_MAGIC_USED 0xf7e1cc33 queue_entry ``drivers/scsi/arm/queue.c`` -HTB_CMAGIC 0xFEFAFEF1 htb_class ``net/sched/sch_htb.c`` NMI_MAGIC 0x48414d4d455201 nmi_s ``arch/mips/include/asm/sn/nmi.h`` ===================== ================ ======================== ========================================== - - -請注æ„，在è²éŸ³è¨˜æ†¶ç®¡ç†ä¸ä»ç„¶æœ‰ä¸€äº›ç‰¹æ®Šçš„爲æ¯å€‹é©…動定義的é”術值。查看include/sound/sndmagic.h來ç²å–他們完整的列表信æ¯ã€‚很多OSSè²éŸ³é©…å‹•æ“有自己從音效å¡PCI ID構建的é”術值-他們也沒有被列在這裡。 - -IrDAå系統也使用了大é‡çš„自己的é”術值，查看include/net/irda/irda.h來ç²å–他們完整的信æ¯ã€‚ - -HFS是å¦å¤–一個比較大的使用é”術值的文件系統-ä½ å¯ä»¥åœ¨fs/hfs/hfs.hä¸æ‰¾åˆ°ä»–們。 - diff --git a/Documentation/usb/usbip_protocol.rst b/Documentation/usb/usbip_protocol.rst index 0b8541fda4d8..adc158967cc6 100644 --- a/Documentation/usb/usbip_protocol.rst +++ b/Documentation/usb/usbip_protocol.rst @@ -340,13 +340,12 @@ USBIP_CMD_SUBMIT: | 0 | 20 | usbip_header_basic, 'command' shall be 0x00000001 | +-----------+--------+---------------------------------------------------+ | 0x14 | 4 | transfer_flags: possible values depend on the | -| | | URB transfer_flags (refer to URB doc in | -| | | Documentation/driver-api/usb/URB.rst) | -| | | but with URB_NO_TRANSFER_DMA_MAP masked. Refer to | -| | | function usbip_pack_cmd_submit and function | -| | | tweak_transfer_flags in drivers/usb/usbip/ | -| | | usbip_common.c. The following fields may also ref | -| | | to function usbip_pack_cmd_submit and URB doc | +| | | USBIP_URB transfer_flags. | +| | | Refer to include/uapi/linux/usbip.h and | +| | | Documentation/driver-api/usb/URB.rst. | +| | | Refer to usbip_pack_cmd_submit() and | +| | | tweak_transfer_flags() in drivers/usb/usbip/ | +| | | usbip_common.c. | +-----------+--------+---------------------------------------------------+ | 0x18 | 4 | transfer_buffer_length: | | | | use URB transfer_buffer_length | diff --git a/Documentation/userspace-api/index.rst b/Documentation/userspace-api/index.rst index a61eac0c73f8..c78da9ce0ec4 100644 --- a/Documentation/userspace-api/index.rst +++ b/Documentation/userspace-api/index.rst @@ -26,6 +26,7 @@ place where this information is gathered. ioctl/index iommu media/index + netlink/index sysfs-platform_profile vduse futex2 diff --git a/Documentation/userspace-api/ioctl/ioctl-number.rst b/Documentation/userspace-api/ioctl/ioctl-number.rst index 3b985b19f39d..5f81e2a24a5c 100644 --- a/Documentation/userspace-api/ioctl/ioctl-number.rst +++ b/Documentation/userspace-api/ioctl/ioctl-number.rst @@ -308,7 +308,6 @@ Code Seq# Include File Comments 0x89 00-06 arch/x86/include/asm/sockios.h 0x89 0B-DF linux/sockios.h 0x89 E0-EF linux/sockios.h SIOCPROTOPRIVATE range -0x89 E0-EF linux/dn.h PROTOPRIVATE range 0x89 F0-FF linux/sockios.h SIOCDEVPRIVATE range 0x8B all linux/wireless.h 0x8C 00-3F WiNRADiO driver diff --git a/Documentation/userspace-api/landlock.rst b/Documentation/userspace-api/landlock.rst index b8ea59493964..cec780c2f497 100644 --- a/Documentation/userspace-api/landlock.rst +++ b/Documentation/userspace-api/landlock.rst @@ -8,7 +8,7 @@ Landlock: unprivileged access control ===================================== :Author: Mickaël Salaün -:Date: May 2022 +:Date: September 2022 The goal of Landlock is to enable to restrict ambient rights (e.g. global filesystem access) for a set of processes. Because Landlock is a stackable @@ -69,7 +69,7 @@ should try to protect users as much as possible whatever the kernel they are using. To avoid binary enforcement (i.e. either all security features or none), we can leverage a dedicated Landlock command to get the current version of the Landlock ABI and adapt the handled accesses. Let's check if we should -remove the `LANDLOCK_ACCESS_FS_REFER` access right which is only supported +remove the ``LANDLOCK_ACCESS_FS_REFER`` access right which is only supported starting with the second version of the ABI. .. code-block:: c @@ -128,7 +128,7 @@ descriptor. It may also be required to create rules following the same logic as explained for the ruleset creation, by filtering access rights according to the Landlock ABI version. In this example, this is not required because -`LANDLOCK_ACCESS_FS_REFER` is not allowed by any rule. +``LANDLOCK_ACCESS_FS_REFER`` is not allowed by any rule. We now have a ruleset with one rule allowing read access to ``/usr`` while denying all other handled accesses for the filesystem. The next step is to @@ -154,8 +154,8 @@ The current thread is now ready to sandbox itself with the ruleset. } close(ruleset_fd); -If the `landlock_restrict_self` system call succeeds, the current thread is now -restricted and this policy will be enforced on all its subsequently created +If the ``landlock_restrict_self`` system call succeeds, the current thread is +now restricted and this policy will be enforced on all its subsequently created children as well. Once a thread is landlocked, there is no way to remove its security policy; only adding more restrictions is allowed. These threads are now in a new Landlock domain, merge of their parent one (if any) with the new @@ -170,12 +170,13 @@ It is recommended setting access rights to file hierarchy leaves as much as possible. For instance, it is better to be able to have ``~/doc/`` as a read-only hierarchy and ``~/tmp/`` as a read-write hierarchy, compared to ``~/`` as a read-only hierarchy and ``~/tmp/`` as a read-write hierarchy. -Following this good practice leads to self-sufficient hierarchies that don't +Following this good practice leads to self-sufficient hierarchies that do not depend on their location (i.e. parent directories). This is particularly relevant when we want to allow linking or renaming. Indeed, having consistent access rights per directory enables to change the location of such directory without relying on the destination directory access rights (except those that -are required for this operation, see `LANDLOCK_ACCESS_FS_REFER` documentation). +are required for this operation, see ``LANDLOCK_ACCESS_FS_REFER`` +documentation). Having self-sufficient hierarchies also helps to tighten the required access rights to the minimal set of data. This also helps avoid sinkhole directories, i.e. directories where data can be linked to but not linked from. However, @@ -259,7 +260,7 @@ Backward and forward compatibility Landlock is designed to be compatible with past and future versions of the kernel. This is achieved thanks to the system call attributes and the -associated bitflags, particularly the ruleset's `handled_access_fs`. Making +associated bitflags, particularly the ruleset's ``handled_access_fs``. Making handled access right explicit enables the kernel and user space to have a clear contract with each other. This is required to make sure sandboxing will not get stricter with a system update, which could break applications. @@ -380,8 +381,8 @@ by the Documentation/admin-guide/cgroup-v1/memory.rst. Previous limitations ==================== -File renaming and linking (ABI 1) ---------------------------------- +File renaming and linking (ABI < 2) +----------------------------------- Because Landlock targets unprivileged access controls, it needs to properly handle composition of rules. Such property also implies rules nesting. @@ -394,7 +395,7 @@ according to the potentially lost constraints. To protect against privilege escalations through renaming or linking, and for the sake of simplicity, Landlock previously limited linking and renaming to the same directory. Starting with the Landlock ABI version 2, it is now possible to securely -control renaming and linking thanks to the new `LANDLOCK_ACCESS_FS_REFER` +control renaming and linking thanks to the new ``LANDLOCK_ACCESS_FS_REFER`` access right. .. _kernel_support: @@ -403,14 +404,14 @@ Kernel support ============== Landlock was first introduced in Linux 5.13 but it must be configured at build -time with `CONFIG_SECURITY_LANDLOCK=y`. Landlock must also be enabled at boot +time with ``CONFIG_SECURITY_LANDLOCK=y``. Landlock must also be enabled at boot time as the other security modules. The list of security modules enabled by -default is set with `CONFIG_LSM`. The kernel configuration should then -contains `CONFIG_LSM=landlock,[...]` with `[...]` as the list of other +default is set with ``CONFIG_LSM``. The kernel configuration should then +contains ``CONFIG_LSM=landlock,[...]`` with ``[...]`` as the list of other potentially useful security modules for the running system (see the -`CONFIG_LSM` help). +``CONFIG_LSM`` help). -If the running kernel doesn't have `landlock` in `CONFIG_LSM`, then we can +If the running kernel does not have ``landlock`` in ``CONFIG_LSM``, then we can still enable it by adding ``lsm=landlock,[...]`` to Documentation/admin-guide/kernel-parameters.rst thanks to the bootloader configuration. diff --git a/Documentation/userspace-api/media/drivers/dw100.rst b/Documentation/userspace-api/media/drivers/dw100.rst new file mode 100644 index 000000000000..fceea6ece622 --- /dev/null +++ b/Documentation/userspace-api/media/drivers/dw100.rst @@ -0,0 +1,84 @@ +.. SPDX-License-Identifier: GPL-2.0 + +DW100 dewarp driver +=================== + +The Vivante DW100 Dewarp Processor IP core found on i.MX8MP SoC applies a +programmable geometrical transformation on the input image to correct distortion +introduced by lenses. + +The transformation function is exposed by the hardware as a grid map with 16x16 +pixel macroblocks indexed using X, Y vertex coordinates. +:: + + Image width + <---------------------------------------> + + ^ .-------.-------.-------.-------.-------. + | | 16x16 | | | | | + I | | pixel | | | | | + m | | block | | | | | + a | .-------.-------.-------.-------.-------. + g | | | | | | | + e | | | | | | | + | | | | | | | + h | .-------.-------.-------.-------.-------. + e | | | | | | | + i | | | | | | | + g | | | | | | | + h | .-------.-------.-------.-------.-------. + t | | | | | | | + | | | | | | | + | | | | | | | + v '-------'-------'-------'-------'-------' + + Grid of Image Blocks for Dewarping Map + + +Each x, y coordinate register uses 16 bits to record the coordinate address in +an unsigned 12.4 fixed point format (UQ12.4). +:: + + .----------------------.--------..----------------------.--------. + | 31~20 | 19~16 || 15~4 | 3~0 | + | (integer) | (frac) || (integer) | (frac) | + '----------------------'--------''----------------------'--------' + <-------------------------------><-------------------------------> + Y coordinate X coordinate + + Remap Register Layout + +The dewarping map is set from applications using the +V4L2_CID_DW100_DEWARPING_16x16_VERTEX_MAP control. The control contains +an array of u32 values storing (x, y) destination coordinates for each +vertex of the grid. The x coordinate is stored in the 16 LSBs and the y +coordinate in the 16 MSBs. + +The number of elements in the array must match the image size: + +.. code-block:: C + + elems = (DIV_ROUND_UP(width, 16) + 1) * (DIV_ROUND_UP(height, 16) + 1); + +If the control has not been set by the application, the driver uses an identity +map. + +More details on the DW100 hardware operations can be found in +*chapter 13.15 DeWarp* of IMX8MP_ reference manual. + +The Vivante DW100 m2m driver implements the following driver-specific control: + +``V4L2_CID_DW100_DEWARPING_16x16_VERTEX_MAP (__u32 array)`` + Specifies to DW100 driver its dewarping map (aka LUT) blob as described in + *chapter 13.15.2.3 Dewarping Remap* of IMX8MP_ reference manual as an U32 + dynamic array. The image is divided into many small 16x16 blocks. If the + width/height of the image is not divisible by 16, the size of the + rightmost/bottommost block is the remainder. The dewarping map only saves + the vertex coordinates of the block. The dewarping grid map is comprised of + vertex coordinates for x and y. Each x, y coordinate register uses 16 bits + (UQ12.4) to record the coordinate address, with the Y coordinate in the + upper bits and X in the lower bits. The driver modifies the dimensions of + this control when the sink format is changed, to reflect the new input + resolution. + +.. _IMX8MP: https://www.nxp.com/webapp/Download?colCode=IMX8MPRM diff --git a/Documentation/userspace-api/media/drivers/index.rst b/Documentation/userspace-api/media/drivers/index.rst index 1a9038f5f9fa..32f82aed47d9 100644 --- a/Documentation/userspace-api/media/drivers/index.rst +++ b/Documentation/userspace-api/media/drivers/index.rst @@ -33,6 +33,7 @@ For more details see the file COPYING in the source distribution of Linux. ccs cx2341x-uapi + dw100 imx-uapi max2175 meye-uapi diff --git a/Documentation/userspace-api/media/v4l/async.rst b/Documentation/userspace-api/media/v4l/async.rst deleted file mode 100644 index d6960ff5c382..000000000000 --- a/Documentation/userspace-api/media/v4l/async.rst +++ /dev/null @@ -1,9 +0,0 @@ -.. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later - -.. _async: - -**************** -Asynchronous I/O -**************** - -This method is not defined yet. diff --git a/Documentation/userspace-api/media/v4l/dev-raw-vbi.rst b/Documentation/userspace-api/media/v4l/dev-raw-vbi.rst index 58f97c3a7792..2bec20d87928 100644 --- a/Documentation/userspace-api/media/v4l/dev-raw-vbi.rst +++ b/Documentation/userspace-api/media/v4l/dev-raw-vbi.rst @@ -41,7 +41,7 @@ Devices supporting the raw VBI capturing or output API set the in the ``capabilities`` field of struct :c:type:`v4l2_capability` returned by the :ref:`VIDIOC_QUERYCAP` ioctl. At least one of the -read/write, streaming or asynchronous I/O methods must be supported. VBI +read/write or streaming I/O methods must be supported. VBI devices may or may not have a tuner or modulator. Supplemental Functions diff --git a/Documentation/userspace-api/media/v4l/dev-sdr.rst b/Documentation/userspace-api/media/v4l/dev-sdr.rst index 928884dfe09d..dfdeddbca41f 100644 --- a/Documentation/userspace-api/media/v4l/dev-sdr.rst +++ b/Documentation/userspace-api/media/v4l/dev-sdr.rst @@ -34,7 +34,7 @@ Devices supporting the SDR transmitter interface set the device has an Digital to Analog Converter (DAC), which is a mandatory element for the SDR transmitter. -At least one of the read/write, streaming or asynchronous I/O methods +At least one of the read/write or streaming I/O methods must be supported. diff --git a/Documentation/userspace-api/media/v4l/dev-sliced-vbi.rst b/Documentation/userspace-api/media/v4l/dev-sliced-vbi.rst index 97ec2b115c71..44415822c7c5 100644 --- a/Documentation/userspace-api/media/v4l/dev-sliced-vbi.rst +++ b/Documentation/userspace-api/media/v4l/dev-sliced-vbi.rst @@ -36,7 +36,7 @@ Devices supporting the sliced VBI capturing or output API set the respectively, in the ``capabilities`` field of struct :c:type:`v4l2_capability` returned by the :ref:`VIDIOC_QUERYCAP` ioctl. At least one of the -read/write, streaming or asynchronous :ref:`I/O methods <io>` must be +read/write or streaming :ref:`I/O methods <io>` must be supported. Sliced VBI devices may have a tuner or modulator. Supplemental Functions diff --git a/Documentation/userspace-api/media/v4l/hist-v4l2.rst b/Documentation/userspace-api/media/v4l/hist-v4l2.rst index 28a2750d5c8c..dbc04374dc22 100644 --- a/Documentation/userspace-api/media/v4l/hist-v4l2.rst +++ b/Documentation/userspace-api/media/v4l/hist-v4l2.rst @@ -316,7 +316,7 @@ This unnamed version was finally merged into Linux 2.5.46. There are new fields to identify the driver, a new RDS device function ``V4L2_CAP_RDS_CAPTURE``, the ``V4L2_CAP_AUDIO`` flag indicates if the device has any audio connectors, another I/O - capability ``V4L2_CAP_ASYNCIO`` can be flagged. In response to these + capability V4L2_CAP_ASYNCIO can be flagged. In response to these changes the ``type`` field became a bit set and was merged into the ``flags`` field. ``V4L2_FLAG_TUNER`` was renamed to ``V4L2_CAP_TUNER``, ``V4L2_CAP_VIDEO_OVERLAY`` replaced diff --git a/Documentation/userspace-api/media/v4l/io.rst b/Documentation/userspace-api/media/v4l/io.rst index ce0cece6f35f..4b1964df9d73 100644 --- a/Documentation/userspace-api/media/v4l/io.rst +++ b/Documentation/userspace-api/media/v4l/io.rst @@ -17,8 +17,7 @@ read or write will fail at any time. Other methods must be negotiated. To select the streaming I/O method with memory mapped or user buffers applications call the -:ref:`VIDIOC_REQBUFS` ioctl. The asynchronous I/O -method is not defined yet. +:ref:`VIDIOC_REQBUFS` ioctl. Video overlay can be considered another I/O method, although the application does not directly receive the image data. It is selected by @@ -46,6 +45,5 @@ The following sections describe the various I/O methods in more detail. mmap userp dmabuf - async buffer field-order diff --git a/Documentation/userspace-api/media/v4l/vidioc-dqevent.rst b/Documentation/userspace-api/media/v4l/vidioc-dqevent.rst index 6eb40073c906..8db103760930 100644 --- a/Documentation/userspace-api/media/v4l/vidioc-dqevent.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-dqevent.rst @@ -332,6 +332,11 @@ call. - 0x0004 - This control event was triggered because the minimum, maximum, step or the default value of the control changed. + * - ``V4L2_EVENT_CTRL_CH_DIMENSIONS`` + - 0x0008 + - This control event was triggered because the dimensions of the + control changed. Note that the number of dimensions remains the + same. .. tabularcolumns:: |p{6.6cm}|p{2.2cm}|p{8.5cm}| diff --git a/Documentation/userspace-api/media/v4l/vidioc-querycap.rst b/Documentation/userspace-api/media/v4l/vidioc-querycap.rst index 63e23f6f95ee..6c57b8428356 100644 --- a/Documentation/userspace-api/media/v4l/vidioc-querycap.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-querycap.rst @@ -244,9 +244,6 @@ specification the ioctl returns an ``EINVAL`` error code. - 0x01000000 - The device supports the :c:func:`read()` and/or :c:func:`write()` I/O methods. - * - ``V4L2_CAP_ASYNCIO`` - - 0x02000000 - - The device supports the :ref:`asynchronous <async>` I/O methods. * - ``V4L2_CAP_STREAMING`` - 0x04000000 - The device supports the :ref:`streaming <mmap>` I/O method. diff --git a/Documentation/userspace-api/media/videodev2.h.rst.exceptions b/Documentation/userspace-api/media/videodev2.h.rst.exceptions index 64b2c0b1f666..2a589d34b80e 100644 --- a/Documentation/userspace-api/media/videodev2.h.rst.exceptions +++ b/Documentation/userspace-api/media/videodev2.h.rst.exceptions @@ -514,6 +514,7 @@ replace define V4L2_EVENT_PRIVATE_START event-type replace define V4L2_EVENT_CTRL_CH_VALUE ctrl-changes-flags replace define V4L2_EVENT_CTRL_CH_FLAGS ctrl-changes-flags replace define V4L2_EVENT_CTRL_CH_RANGE ctrl-changes-flags +replace define V4L2_EVENT_CTRL_CH_DIMENSIONS ctrl-changes-flags replace define V4L2_EVENT_SRC_CH_RESOLUTION src-changes-flags diff --git a/Documentation/userspace-api/netlink/index.rst b/Documentation/userspace-api/netlink/index.rst new file mode 100644 index 000000000000..b0c21538d97d --- /dev/null +++ b/Documentation/userspace-api/netlink/index.rst @@ -0,0 +1,12 @@ +.. SPDX-License-Identifier: BSD-3-Clause + +================ +Netlink Handbook +================ + +Netlink documentation for users. + +.. toctree:: + :maxdepth: 2 + + intro diff --git a/Documentation/userspace-api/netlink/intro.rst b/Documentation/userspace-api/netlink/intro.rst new file mode 100644 index 000000000000..0955e9f203d3 --- /dev/null +++ b/Documentation/userspace-api/netlink/intro.rst @@ -0,0 +1,681 @@ +.. SPDX-License-Identifier: BSD-3-Clause + +======================= +Introduction to Netlink +======================= + +Netlink is often described as an ioctl() replacement. +It aims to replace fixed-format C structures as supplied +to ioctl() with a format which allows an easy way to add +or extended the arguments. + +To achieve this Netlink uses a minimal fixed-format metadata header +followed by multiple attributes in the TLV (type, length, value) format. + +Unfortunately the protocol has evolved over the years, in an organic +and undocumented fashion, making it hard to coherently explain. +To make the most practical sense this document starts by describing +netlink as it is used today and dives into more "historical" uses +in later sections. + +Opening a socket +================ + +Netlink communication happens over sockets, a socket needs to be +opened first: + +.. code-block:: c + + fd = socket(AF_NETLINK, SOCK_RAW, NETLINK_GENERIC); + +The use of sockets allows for a natural way of exchanging information +in both directions (to and from the kernel). The operations are still +performed synchronously when applications send() the request but +a separate recv() system call is needed to read the reply. + +A very simplified flow of a Netlink "call" will therefore look +something like: + +.. code-block:: c + + fd = socket(AF_NETLINK, SOCK_RAW, NETLINK_GENERIC); + + /* format the request */ + send(fd, &request, sizeof(request)); + n = recv(fd, &response, RSP_BUFFER_SIZE); + /* interpret the response */ + +Netlink also provides natural support for "dumping", i.e. communicating +to user space all objects of a certain type (e.g. dumping all network +interfaces). + +.. code-block:: c + + fd = socket(AF_NETLINK, SOCK_RAW, NETLINK_GENERIC); + + /* format the dump request */ + send(fd, &request, sizeof(request)); + while (1) { + n = recv(fd, &buffer, RSP_BUFFER_SIZE); + /* one recv() call can read multiple messages, hence the loop below */ + for (nl_msg in buffer) { + if (nl_msg.nlmsg_type == NLMSG_DONE) + goto dump_finished; + /* process the object */ + } + } + dump_finished: + +The first two arguments of the socket() call require little explanation - +it is opening a Netlink socket, with all headers provided by the user +(hence NETLINK, RAW). The last argument is the protocol within Netlink. +This field used to identify the subsystem with which the socket will +communicate. + +Classic vs Generic Netlink +-------------------------- + +Initial implementation of Netlink depended on a static allocation +of IDs to subsystems and provided little supporting infrastructure. +Let us refer to those protocols collectively as **Classic Netlink**. +The list of them is defined on top of the ``include/uapi/linux/netlink.h`` +file, they include among others - general networking (NETLINK_ROUTE), +iSCSI (NETLINK_ISCSI), and audit (NETLINK_AUDIT). + +**Generic Netlink** (introduced in 2005) allows for dynamic registration of +subsystems (and subsystem ID allocation), introspection and simplifies +implementing the kernel side of the interface. + +The following section describes how to use Generic Netlink, as the +number of subsystems using Generic Netlink outnumbers the older +protocols by an order of magnitude. There are also no plans for adding +more Classic Netlink protocols to the kernel. +Basic information on how communicating with core networking parts of +the Linux kernel (or another of the 20 subsystems using Classic +Netlink) differs from Generic Netlink is provided later in this document. + +Generic Netlink +=============== + +In addition to the Netlink fixed metadata header each Netlink protocol +defines its own fixed metadata header. (Similarly to how network +headers stack - Ethernet > IP > TCP we have Netlink > Generic N. > Family.) + +A Netlink message always starts with struct nlmsghdr, which is followed +by a protocol-specific header. In case of Generic Netlink the protocol +header is struct genlmsghdr. + +The practical meaning of the fields in case of Generic Netlink is as follows: + +.. code-block:: c + + struct nlmsghdr { + __u32 nlmsg_len; /* Length of message including headers */ + __u16 nlmsg_type; /* Generic Netlink Family (subsystem) ID */ + __u16 nlmsg_flags; /* Flags - request or dump */ + __u32 nlmsg_seq; /* Sequence number */ + __u32 nlmsg_pid; /* Port ID, set to 0 */ + }; + struct genlmsghdr { + __u8 cmd; /* Command, as defined by the Family */ + __u8 version; /* Irrelevant, set to 1 */ + __u16 reserved; /* Reserved, set to 0 */ + }; + /* TLV attributes follow... */ + +In Classic Netlink :c:member:`nlmsghdr.nlmsg_type` used to identify +which operation within the subsystem the message was referring to +(e.g. get information about a netdev). Generic Netlink needs to mux +multiple subsystems in a single protocol so it uses this field to +identify the subsystem, and :c:member:`genlmsghdr.cmd` identifies +the operation instead. (See :ref:`res_fam` for +information on how to find the Family ID of the subsystem of interest.) +Note that the first 16 values (0 - 15) of this field are reserved for +control messages both in Classic Netlink and Generic Netlink. +See :ref:`nl_msg_type` for more details. + +There are 3 usual types of message exchanges on a Netlink socket: + + - performing a single action (``do``); + - dumping information (``dump``); + - getting asynchronous notifications (``multicast``). + +Classic Netlink is very flexible and presumably allows other types +of exchanges to happen, but in practice those are the three that get +used. + +Asynchronous notifications are sent by the kernel and received by +the user sockets which subscribed to them. ``do`` and ``dump`` requests +are initiated by the user. :c:member:`nlmsghdr.nlmsg_flags` should +be set as follows: + + - for ``do``: ``NLM_F_REQUEST | NLM_F_ACK`` + - for ``dump``: ``NLM_F_REQUEST | NLM_F_ACK | NLM_F_DUMP`` + +:c:member:`nlmsghdr.nlmsg_seq` should be a set to a monotonically +increasing value. The value gets echoed back in responses and doesn't +matter in practice, but setting it to an increasing value for each +message sent is considered good hygiene. The purpose of the field is +matching responses to requests. Asynchronous notifications will have +:c:member:`nlmsghdr.nlmsg_seq` of ``0``. + +:c:member:`nlmsghdr.nlmsg_pid` is the Netlink equivalent of an address. +This field can be set to ``0`` when talking to the kernel. +See :ref:`nlmsg_pid` for the (uncommon) uses of the field. + +The expected use for :c:member:`genlmsghdr.version` was to allow +versioning of the APIs provided by the subsystems. No subsystem to +date made significant use of this field, so setting it to ``1`` seems +like a safe bet. + +.. _nl_msg_type: + +Netlink message types +--------------------- + +As previously mentioned :c:member:`nlmsghdr.nlmsg_type` carries +protocol specific values but the first 16 identifiers are reserved +(first subsystem specific message type should be equal to +``NLMSG_MIN_TYPE`` which is ``0x10``). + +There are only 4 Netlink control messages defined: + + - ``NLMSG_NOOP`` - ignore the message, not used in practice; + - ``NLMSG_ERROR`` - carries the return code of an operation; + - ``NLMSG_DONE`` - marks the end of a dump; + - ``NLMSG_OVERRUN`` - socket buffer has overflown, not used to date. + +``NLMSG_ERROR`` and ``NLMSG_DONE`` are of practical importance. +They carry return codes for operations. Note that unless +the ``NLM_F_ACK`` flag is set on the request Netlink will not respond +with ``NLMSG_ERROR`` if there is no error. To avoid having to special-case +this quirk it is recommended to always set ``NLM_F_ACK``. + +The format of ``NLMSG_ERROR`` is described by struct nlmsgerr:: + + ---------------------------------------------- + | struct nlmsghdr - response header | + ---------------------------------------------- + | int error | + ---------------------------------------------- + | struct nlmsghdr - original request header | + ---------------------------------------------- + | ** optionally (1) payload of the request | + ---------------------------------------------- + | ** optionally (2) extended ACK | + ---------------------------------------------- + +There are two instances of struct nlmsghdr here, first of the response +and second of the request. ``NLMSG_ERROR`` carries the information about +the request which led to the error. This could be useful when trying +to match requests to responses or re-parse the request to dump it into +logs. + +The payload of the request is not echoed in messages reporting success +(``error == 0``) or if ``NETLINK_CAP_ACK`` setsockopt() was set. +The latter is common +and perhaps recommended as having to read a copy of every request back +from the kernel is rather wasteful. The absence of request payload +is indicated by ``NLM_F_CAPPED`` in :c:member:`nlmsghdr.nlmsg_flags`. + +The second optional element of ``NLMSG_ERROR`` are the extended ACK +attributes. See :ref:`ext_ack` for more details. The presence +of extended ACK is indicated by ``NLM_F_ACK_TLVS`` in +:c:member:`nlmsghdr.nlmsg_flags`. + +``NLMSG_DONE`` is simpler, the request is never echoed but the extended +ACK attributes may be present:: + + ---------------------------------------------- + | struct nlmsghdr - response header | + ---------------------------------------------- + | int error | + ---------------------------------------------- + | ** optionally extended ACK | + ---------------------------------------------- + +.. _res_fam: + +Resolving the Family ID +----------------------- + +This section explains how to find the Family ID of a subsystem. +It also serves as an example of Generic Netlink communication. + +Generic Netlink is itself a subsystem exposed via the Generic Netlink API. +To avoid a circular dependency Generic Netlink has a statically allocated +Family ID (``GENL_ID_CTRL`` which is equal to ``NLMSG_MIN_TYPE``). +The Generic Netlink family implements a command used to find out information +about other families (``CTRL_CMD_GETFAMILY``). + +To get information about the Generic Netlink family named for example +``"test1"`` we need to send a message on the previously opened Generic Netlink +socket. The message should target the Generic Netlink Family (1), be a +``do`` (2) call to ``CTRL_CMD_GETFAMILY`` (3). A ``dump`` version of this +call would make the kernel respond with information about *all* the families +it knows about. Last but not least the name of the family in question has +to be specified (4) as an attribute with the appropriate type:: + + struct nlmsghdr: + __u32 nlmsg_len: 32 + __u16 nlmsg_type: GENL_ID_CTRL // (1) + __u16 nlmsg_flags: NLM_F_REQUEST | NLM_F_ACK // (2) + __u32 nlmsg_seq: 1 + __u32 nlmsg_pid: 0 + + struct genlmsghdr: + __u8 cmd: CTRL_CMD_GETFAMILY // (3) + __u8 version: 2 /* or 1, doesn't matter */ + __u16 reserved: 0 + + struct nlattr: // (4) + __u16 nla_len: 10 + __u16 nla_type: CTRL_ATTR_FAMILY_NAME + char data: test1\0 + + (padding:) + char data: \0\0 + +The length fields in Netlink (:c:member:`nlmsghdr.nlmsg_len` +and :c:member:`nlattr.nla_len`) always *include* the header. +Attribute headers in netlink must be aligned to 4 bytes from the start +of the message, hence the extra ``\0\0`` after ``CTRL_ATTR_FAMILY_NAME``. +The attribute lengths *exclude* the padding. + +If the family is found kernel will reply with two messages, the response +with all the information about the family:: + + /* Message #1 - reply */ + struct nlmsghdr: + __u32 nlmsg_len: 136 + __u16 nlmsg_type: GENL_ID_CTRL + __u16 nlmsg_flags: 0 + __u32 nlmsg_seq: 1 /* echoed from our request */ + __u32 nlmsg_pid: 5831 /* The PID of our user space process */ + + struct genlmsghdr: + __u8 cmd: CTRL_CMD_GETFAMILY + __u8 version: 2 + __u16 reserved: 0 + + struct nlattr: + __u16 nla_len: 10 + __u16 nla_type: CTRL_ATTR_FAMILY_NAME + char data: test1\0 + + (padding:) + data: \0\0 + + struct nlattr: + __u16 nla_len: 6 + __u16 nla_type: CTRL_ATTR_FAMILY_ID + __u16: 123 /* The Family ID we are after */ + + (padding:) + char data: \0\0 + + struct nlattr: + __u16 nla_len: 9 + __u16 nla_type: CTRL_ATTR_FAMILY_VERSION + __u16: 1 + + /* ... etc, more attributes will follow. */ + +And the error code (success) since ``NLM_F_ACK`` had been set on the request:: + + /* Message #2 - the ACK */ + struct nlmsghdr: + __u32 nlmsg_len: 36 + __u16 nlmsg_type: NLMSG_ERROR + __u16 nlmsg_flags: NLM_F_CAPPED /* There won't be a payload */ + __u32 nlmsg_seq: 1 /* echoed from our request */ + __u32 nlmsg_pid: 5831 /* The PID of our user space process */ + + int error: 0 + + struct nlmsghdr: /* Copy of the request header as we sent it */ + __u32 nlmsg_len: 32 + __u16 nlmsg_type: GENL_ID_CTRL + __u16 nlmsg_flags: NLM_F_REQUEST | NLM_F_ACK + __u32 nlmsg_seq: 1 + __u32 nlmsg_pid: 0 + +The order of attributes (struct nlattr) is not guaranteed so the user +has to walk the attributes and parse them. + +Note that Generic Netlink sockets are not associated or bound to a single +family. A socket can be used to exchange messages with many different +families, selecting the recipient family on message-by-message basis using +the :c:member:`nlmsghdr.nlmsg_type` field. + +.. _ext_ack: + +Extended ACK +------------ + +Extended ACK controls reporting of additional error/warning TLVs +in ``NLMSG_ERROR`` and ``NLMSG_DONE`` messages. To maintain backward +compatibility this feature has to be explicitly enabled by setting +the ``NETLINK_EXT_ACK`` setsockopt() to ``1``. + +Types of extended ack attributes are defined in enum nlmsgerr_attrs. +The most commonly used attributes are ``NLMSGERR_ATTR_MSG``, +``NLMSGERR_ATTR_OFFS`` and ``NLMSGERR_ATTR_MISS_*``. + +``NLMSGERR_ATTR_MSG`` carries a message in English describing +the encountered problem. These messages are far more detailed +than what can be expressed thru standard UNIX error codes. + +``NLMSGERR_ATTR_OFFS`` points to the attribute which caused the problem. + +``NLMSGERR_ATTR_MISS_TYPE`` and ``NLMSGERR_ATTR_MISS_NEST`` +inform about a missing attribute. + +Extended ACKs can be reported on errors as well as in case of success. +The latter should be treated as a warning. + +Extended ACKs greatly improve the usability of Netlink and should +always be enabled, appropriately parsed and reported to the user. + +Advanced topics +=============== + +Dump consistency +---------------- + +Some of the data structures kernel uses for storing objects make +it hard to provide an atomic snapshot of all the objects in a dump +(without impacting the fast-paths updating them). + +Kernel may set the ``NLM_F_DUMP_INTR`` flag on any message in a dump +(including the ``NLMSG_DONE`` message) if the dump was interrupted and +may be inconsistent (e.g. missing objects). User space should retry +the dump if it sees the flag set. + +Introspection +------------- + +The basic introspection abilities are enabled by access to the Family +object as reported in :ref:`res_fam`. User can query information about +the Generic Netlink family, including which operations are supported +by the kernel and what attributes the kernel understands. +Family information includes the highest ID of an attribute kernel can parse, +a separate command (``CTRL_CMD_GETPOLICY``) provides detailed information +about supported attributes, including ranges of values the kernel accepts. + +Querying family information is useful in cases when user space needs +to make sure that the kernel has support for a feature before issuing +a request. + +.. _nlmsg_pid: + +nlmsg_pid +--------- + +:c:member:`nlmsghdr.nlmsg_pid` is the Netlink equivalent of an address. +It is referred to as Port ID, sometimes Process ID because for historical +reasons if the application does not select (bind() to) an explicit Port ID +kernel will automatically assign it the ID equal to its Process ID +(as reported by the getpid() system call). + +Similarly to the bind() semantics of the TCP/IP network protocols the value +of zero means "assign automatically", hence it is common for applications +to leave the :c:member:`nlmsghdr.nlmsg_pid` field initialized to ``0``. + +The field is still used today in rare cases when kernel needs to send +a unicast notification. User space application can use bind() to associate +its socket with a specific PID, it then communicates its PID to the kernel. +This way the kernel can reach the specific user space process. + +This sort of communication is utilized in UMH (User Mode Helper)-like +scenarios when kernel needs to trigger user space processing or ask user +space for a policy decision. + +Multicast notifications +----------------------- + +One of the strengths of Netlink is the ability to send event notifications +to user space. This is a unidirectional form of communication (kernel -> +user) and does not involve any control messages like ``NLMSG_ERROR`` or +``NLMSG_DONE``. + +For example the Generic Netlink family itself defines a set of multicast +notifications about registered families. When a new family is added the +sockets subscribed to the notifications will get the following message:: + + struct nlmsghdr: + __u32 nlmsg_len: 136 + __u16 nlmsg_type: GENL_ID_CTRL + __u16 nlmsg_flags: 0 + __u32 nlmsg_seq: 0 + __u32 nlmsg_pid: 0 + + struct genlmsghdr: + __u8 cmd: CTRL_CMD_NEWFAMILY + __u8 version: 2 + __u16 reserved: 0 + + struct nlattr: + __u16 nla_len: 10 + __u16 nla_type: CTRL_ATTR_FAMILY_NAME + char data: test1\0 + + (padding:) + data: \0\0 + + struct nlattr: + __u16 nla_len: 6 + __u16 nla_type: CTRL_ATTR_FAMILY_ID + __u16: 123 /* The Family ID we are after */ + + (padding:) + char data: \0\0 + + struct nlattr: + __u16 nla_len: 9 + __u16 nla_type: CTRL_ATTR_FAMILY_VERSION + __u16: 1 + + /* ... etc, more attributes will follow. */ + +The notification contains the same information as the response +to the ``CTRL_CMD_GETFAMILY`` request. + +The Netlink headers of the notification are mostly 0 and irrelevant. +The :c:member:`nlmsghdr.nlmsg_seq` may be either zero or a monotonically +increasing notification sequence number maintained by the family. + +To receive notifications the user socket must subscribe to the relevant +notification group. Much like the Family ID, the Group ID for a given +multicast group is dynamic and can be found inside the Family information. +The ``CTRL_ATTR_MCAST_GROUPS`` attribute contains nests with names +(``CTRL_ATTR_MCAST_GRP_NAME``) and IDs (``CTRL_ATTR_MCAST_GRP_ID``) of +the groups family. + +Once the Group ID is known a setsockopt() call adds the socket to the group: + +.. code-block:: c + + unsigned int group_id; + + /* .. find the group ID... */ + + setsockopt(fd, SOL_NETLINK, NETLINK_ADD_MEMBERSHIP, + &group_id, sizeof(group_id)); + +The socket will now receive notifications. + +It is recommended to use separate sockets for receiving notifications +and sending requests to the kernel. The asynchronous nature of notifications +means that they may get mixed in with the responses making the message +handling much harder. + +Buffer sizing +------------- + +Netlink sockets are datagram sockets rather than stream sockets, +meaning that each message must be received in its entirety by a single +recv()/recvmsg() system call. If the buffer provided by the user is too +short, the message will be truncated and the ``MSG_TRUNC`` flag set +in struct msghdr (struct msghdr is the second argument +of the recvmsg() system call, *not* a Netlink header). + +Upon truncation the remaining part of the message is discarded. + +Netlink expects that the user buffer will be at least 8kB or a page +size of the CPU architecture, whichever is bigger. Particular Netlink +families may, however, require a larger buffer. 32kB buffer is recommended +for most efficient handling of dumps (larger buffer fits more dumped +objects and therefore fewer recvmsg() calls are needed). + +Classic Netlink +=============== + +The main differences between Classic and Generic Netlink are the dynamic +allocation of subsystem identifiers and availability of introspection. +In theory the protocol does not differ significantly, however, in practice +Classic Netlink experimented with concepts which were abandoned in Generic +Netlink (really, they usually only found use in a small corner of a single +subsystem). This section is meant as an explainer of a few of such concepts, +with the explicit goal of giving the Generic Netlink +users the confidence to ignore them when reading the uAPI headers. + +Most of the concepts and examples here refer to the ``NETLINK_ROUTE`` family, +which covers much of the configuration of the Linux networking stack. +Real documentation of that family, deserves a chapter (or a book) of its own. + +Families +-------- + +Netlink refers to subsystems as families. This is a remnant of using +sockets and the concept of protocol families, which are part of message +demultiplexing in ``NETLINK_ROUTE``. + +Sadly every layer of encapsulation likes to refer to whatever it's carrying +as "families" making the term very confusing: + + 1. AF_NETLINK is a bona fide socket protocol family + 2. AF_NETLINK's documentation refers to what comes after its own + header (struct nlmsghdr) in a message as a "Family Header" + 3. Generic Netlink is a family for AF_NETLINK (struct genlmsghdr follows + struct nlmsghdr), yet it also calls its users "Families". + +Note that the Generic Netlink Family IDs are in a different "ID space" +and overlap with Classic Netlink protocol numbers (e.g. ``NETLINK_CRYPTO`` +has the Classic Netlink protocol ID of 21 which Generic Netlink will +happily allocate to one of its families as well). + +Strict checking +--------------- + +The ``NETLINK_GET_STRICT_CHK`` socket option enables strict input checking +in ``NETLINK_ROUTE``. It was needed because historically kernel did not +validate the fields of structures it didn't process. This made it impossible +to start using those fields later without risking regressions in applications +which initialized them incorrectly or not at all. + +``NETLINK_GET_STRICT_CHK`` declares that the application is initializing +all fields correctly. It also opts into validating that message does not +contain trailing data and requests that kernel rejects attributes with +type higher than largest attribute type known to the kernel. + +``NETLINK_GET_STRICT_CHK`` is not used outside of ``NETLINK_ROUTE``. + +Unknown attributes +------------------ + +Historically Netlink ignored all unknown attributes. The thinking was that +it would free the application from having to probe what kernel supports. +The application could make a request to change the state and check which +parts of the request "stuck". + +This is no longer the case for new Generic Netlink families and those opting +in to strict checking. See enum netlink_validation for validation types +performed. + +Fixed metadata and structures +----------------------------- + +Classic Netlink made liberal use of fixed-format structures within +the messages. Messages would commonly have a structure with +a considerable number of fields after struct nlmsghdr. It was also +common to put structures with multiple members inside attributes, +without breaking each member into an attribute of its own. + +This has caused problems with validation and extensibility and +therefore using binary structures is actively discouraged for new +attributes. + +Request types +------------- + +``NETLINK_ROUTE`` categorized requests into 4 types ``NEW``, ``DEL``, ``GET``, +and ``SET``. Each object can handle all or some of those requests +(objects being netdevs, routes, addresses, qdiscs etc.) Request type +is defined by the 2 lowest bits of the message type, so commands for +new objects would always be allocated with a stride of 4. + +Each object would also have it's own fixed metadata shared by all request +types (e.g. struct ifinfomsg for netdev requests, struct ifaddrmsg for address +requests, struct tcmsg for qdisc requests). + +Even though other protocols and Generic Netlink commands often use +the same verbs in their message names (``GET``, ``SET``) the concept +of request types did not find wider adoption. + +Notification echo +----------------- + +``NLM_F_ECHO`` requests for notifications resulting from the request +to be queued onto the requesting socket. This is useful to discover +the impact of the request. + +Note that this feature is not universally implemented. + +Other request-type-specific flags +--------------------------------- + +Classic Netlink defined various flags for its ``GET``, ``NEW`` +and ``DEL`` requests in the upper byte of nlmsg_flags in struct nlmsghdr. +Since request types have not been generalized the request type specific +flags are rarely used (and considered deprecated for new families). + +For ``GET`` - ``NLM_F_ROOT`` and ``NLM_F_MATCH`` are combined into +``NLM_F_DUMP``, and not used separately. ``NLM_F_ATOMIC`` is never used. + +For ``DEL`` - ``NLM_F_NONREC`` is only used by nftables and ``NLM_F_BULK`` +only by FDB some operations. + +The flags for ``NEW`` are used most commonly in classic Netlink. Unfortunately, +the meaning is not crystal clear. The following description is based on the +best guess of the intention of the authors, and in practice all families +stray from it in one way or another. ``NLM_F_REPLACE`` asks to replace +an existing object, if no matching object exists the operation should fail. +``NLM_F_EXCL`` has the opposite semantics and only succeeds if object already +existed. +``NLM_F_CREATE`` asks for the object to be created if it does not +exist, it can be combined with ``NLM_F_REPLACE`` and ``NLM_F_EXCL``. + +A comment in the main Netlink uAPI header states:: + + 4.4BSD ADD NLM_F_CREATE|NLM_F_EXCL + 4.4BSD CHANGE NLM_F_REPLACE + + True CHANGE NLM_F_CREATE|NLM_F_REPLACE + Append NLM_F_CREATE + Check NLM_F_EXCL + +which seems to indicate that those flags predate request types. +``NLM_F_REPLACE`` without ``NLM_F_CREATE`` was initially used instead +of ``SET`` commands. +``NLM_F_EXCL`` without ``NLM_F_CREATE`` was used to check if object exists +without creating it, presumably predating ``GET`` commands. + +``NLM_F_APPEND`` indicates that if one key can have multiple objects associated +with it (e.g. multiple next-hop objects for a route) the new object should be +added to the list rather than replacing the entire list. + +uAPI reference +============== + +.. kernel-doc:: include/uapi/linux/netlink.h diff --git a/Documentation/virt/kvm/api.rst b/Documentation/virt/kvm/api.rst index abd7c32126ce..eee9f857a986 100644 --- a/Documentation/virt/kvm/api.rst +++ b/Documentation/virt/kvm/api.rst @@ -4074,7 +4074,7 @@ Queues an SMI on the thread's vcpu. 4.97 KVM_X86_SET_MSR_FILTER ---------------------------- -:Capability: KVM_X86_SET_MSR_FILTER +:Capability: KVM_CAP_X86_MSR_FILTER :Architectures: x86 :Type: vm ioctl :Parameters: struct kvm_msr_filter @@ -4173,8 +4173,10 @@ If an MSR access is not permitted through the filtering, it generates a allows user space to deflect and potentially handle various MSR accesses into user space. -If a vCPU is in running state while this ioctl is invoked, the vCPU may -experience inconsistent filtering behavior on MSR accesses. +Note, invoking this ioctl while a vCPU is running is inherently racy. However, +KVM does guarantee that vCPUs will see either the previous filter or the new +filter, e.g. MSRs with identical settings in both the old and new filter will +have deterministic behavior. 4.98 KVM_CREATE_SPAPR_TCE_64 ---------------------------- @@ -5287,110 +5289,7 @@ KVM_PV_DUMP authentication tag all of which are needed to decrypt the dump at a later time. - -4.126 KVM_X86_SET_MSR_FILTER ----------------------------- - -:Capability: KVM_CAP_X86_MSR_FILTER -:Architectures: x86 -:Type: vm ioctl -:Parameters: struct kvm_msr_filter -:Returns: 0 on success, < 0 on error - -:: - - struct kvm_msr_filter_range { - #define KVM_MSR_FILTER_READ (1 << 0) - #define KVM_MSR_FILTER_WRITE (1 << 1) - __u32 flags; - __u32 nmsrs; /* number of msrs in bitmap */ - __u32 base; /* MSR index the bitmap starts at */ - __u8 *bitmap; /* a 1 bit allows the operations in flags, 0 denies */ - }; - - #define KVM_MSR_FILTER_MAX_RANGES 16 - struct kvm_msr_filter { - #define KVM_MSR_FILTER_DEFAULT_ALLOW (0 << 0) - #define KVM_MSR_FILTER_DEFAULT_DENY (1 << 0) - __u32 flags; - struct kvm_msr_filter_range ranges[KVM_MSR_FILTER_MAX_RANGES]; - }; - -flags values for ``struct kvm_msr_filter_range``: - -``KVM_MSR_FILTER_READ`` - - Filter read accesses to MSRs using the given bitmap. A 0 in the bitmap - indicates that a read should immediately fail, while a 1 indicates that - a read for a particular MSR should be handled regardless of the default - filter action. - -``KVM_MSR_FILTER_WRITE`` - - Filter write accesses to MSRs using the given bitmap. A 0 in the bitmap - indicates that a write should immediately fail, while a 1 indicates that - a write for a particular MSR should be handled regardless of the default - filter action. - -``KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE`` - - Filter both read and write accesses to MSRs using the given bitmap. A 0 - in the bitmap indicates that both reads and writes should immediately fail, - while a 1 indicates that reads and writes for a particular MSR are not - filtered by this range. - -flags values for ``struct kvm_msr_filter``: - -``KVM_MSR_FILTER_DEFAULT_ALLOW`` - - If no filter range matches an MSR index that is getting accessed, KVM will - fall back to allowing access to the MSR. - -``KVM_MSR_FILTER_DEFAULT_DENY`` - - If no filter range matches an MSR index that is getting accessed, KVM will - fall back to rejecting access to the MSR. In this mode, all MSRs that should - be processed by KVM need to explicitly be marked as allowed in the bitmaps. - -This ioctl allows user space to define up to 16 bitmaps of MSR ranges to -specify whether a certain MSR access should be explicitly filtered for or not. - -If this ioctl has never been invoked, MSR accesses are not guarded and the -default KVM in-kernel emulation behavior is fully preserved. - -Calling this ioctl with an empty set of ranges (all nmsrs == 0) disables MSR -filtering. In that mode, ``KVM_MSR_FILTER_DEFAULT_DENY`` is invalid and causes -an error. - -As soon as the filtering is in place, every MSR access is processed through -the filtering except for accesses to the x2APIC MSRs (from 0x800 to 0x8ff); -x2APIC MSRs are always allowed, independent of the ``default_allow`` setting, -and their behavior depends on the ``X2APIC_ENABLE`` bit of the APIC base -register. - -If a bit is within one of the defined ranges, read and write accesses are -guarded by the bitmap's value for the MSR index if the kind of access -is included in the ``struct kvm_msr_filter_range`` flags. If no range -cover this particular access, the behavior is determined by the flags -field in the kvm_msr_filter struct: ``KVM_MSR_FILTER_DEFAULT_ALLOW`` -and ``KVM_MSR_FILTER_DEFAULT_DENY``. - -Each bitmap range specifies a range of MSRs to potentially allow access on. -The range goes from MSR index [base .. base+nmsrs]. The flags field -indicates whether reads, writes or both reads and writes are filtered -by setting a 1 bit in the bitmap for the corresponding MSR index. - -If an MSR access is not permitted through the filtering, it generates a -#GP inside the guest. When combined with KVM_CAP_X86_USER_SPACE_MSR, that -allows user space to deflect and potentially handle various MSR accesses -into user space. - -Note, invoking this ioctl with a vCPU is running is inherently racy. However, -KVM does guarantee that vCPUs will see either the previous filter or the new -filter, e.g. MSRs with identical settings in both the old and new filter will -have deterministic behavior. - -4.127 KVM_XEN_HVM_SET_ATTR +4.126 KVM_XEN_HVM_SET_ATTR -------------------------- :Capability: KVM_CAP_XEN_HVM / KVM_XEN_HVM_CONFIG_SHARED_INFO @@ -8019,8 +7918,8 @@ guest according to the bits in the KVM_CPUID_FEATURES CPUID leaf (0x40000001). Otherwise, a guest may use the paravirtual features regardless of what has actually been exposed through the CPUID leaf. -8.29 KVM_CAP_DIRTY_LOG_RING ---------------------------- +8.29 KVM_CAP_DIRTY_LOG_RING/KVM_CAP_DIRTY_LOG_RING_ACQ_REL +---------------------------------------------------------- :Architectures: x86 :Parameters: args[0] - size of the dirty log ring @@ -8078,6 +7977,11 @@ on to the next GFN. The userspace should continue to do this until the flags of a GFN have the DIRTY bit cleared, meaning that it has harvested all the dirty GFNs that were available. +Note that on weakly ordered architectures, userspace accesses to the +ring buffer (and more specifically the 'flags' field) must be ordered, +using load-acquire/store-release accessors when available, or any +other memory barrier that will ensure this ordering. + It's not necessary for userspace to harvest the all dirty GFNs at once. However it must collect the dirty GFNs in sequence, i.e., the userspace program cannot skip one dirty GFN to collect the one next to it. @@ -8106,6 +8010,14 @@ KVM_CAP_DIRTY_LOG_RING with an acceptable dirty ring size, the virtual machine will switch to ring-buffer dirty page tracking and further KVM_GET_DIRTY_LOG or KVM_CLEAR_DIRTY_LOG ioctls will fail. +NOTE: KVM_CAP_DIRTY_LOG_RING_ACQ_REL is the only capability that +should be exposed by weakly ordered architecture, in order to indicate +the additional memory ordering requirements imposed on userspace when +reading the state of an entry and mutating it from DIRTY to HARVESTED. +Architecture with TSO-like ordering (such as x86) are allowed to +expose both KVM_CAP_DIRTY_LOG_RING and KVM_CAP_DIRTY_LOG_RING_ACQ_REL +to userspace. + 8.30 KVM_CAP_XEN_HVM -------------------- diff --git a/Documentation/virt/kvm/vcpu-requests.rst b/Documentation/virt/kvm/vcpu-requests.rst index 31f62b64e07b..87f04c1fa53d 100644 --- a/Documentation/virt/kvm/vcpu-requests.rst +++ b/Documentation/virt/kvm/vcpu-requests.rst @@ -97,7 +97,7 @@ VCPU requests are simply bit indices of the ``vcpu->requests`` bitmap. This means general bitops, like those documented in [atomic-ops]_ could also be used, e.g. :: - clear_bit(KVM_REQ_UNHALT & KVM_REQUEST_MASK, &vcpu->requests); + clear_bit(KVM_REQ_UNBLOCK & KVM_REQUEST_MASK, &vcpu->requests); However, VCPU request users should refrain from doing so, as it would break the abstraction. The first 8 bits are reserved for architecture @@ -126,17 +126,6 @@ KVM_REQ_UNBLOCK or in order to update the interrupt routing and ensure that assigned devices will wake up the vCPU. -KVM_REQ_UNHALT - - This request may be made from the KVM common function kvm_vcpu_block(), - which is used to emulate an instruction that causes a CPU to halt until - one of an architectural specific set of events and/or interrupts is - received (determined by checking kvm_arch_vcpu_runnable()). When that - event or interrupt arrives kvm_vcpu_block() makes the request. This is - in contrast to when kvm_vcpu_block() returns due to any other reason, - such as a pending signal, which does not indicate the VCPU's halt - emulation should stop, and therefore does not make the request. - KVM_REQ_OUTSIDE_GUEST_MODE This "request" ensures the target vCPU has exited guest mode prior to the @@ -297,21 +286,6 @@ architecture dependent. kvm_vcpu_block() calls kvm_arch_vcpu_runnable() to check if it should awaken. One reason to do so is to provide architectures a function where requests may be checked if necessary. -Clearing Requests ------------------ - -Generally it only makes sense for the receiving VCPU thread to clear a -request. However, in some circumstances, such as when the requesting -thread and the receiving VCPU thread are executed serially, such as when -they are the same thread, or when they are using some form of concurrency -control to temporarily execute synchronously, then it's possible to know -that the request may be cleared immediately, rather than waiting for the -receiving VCPU thread to handle the request in VCPU RUN. The only current -examples of this are kvm_vcpu_block() calls made by VCPUs to block -themselves. A possible side-effect of that call is to make the -KVM_REQ_UNHALT request, which may then be cleared immediately when the -VCPU returns from the call. - References ========== diff --git a/Documentation/virt/kvm/x86/amd-memory-encryption.rst b/Documentation/virt/kvm/x86/amd-memory-encryption.rst index 2d307811978c..935aaeb97fe6 100644 --- a/Documentation/virt/kvm/x86/amd-memory-encryption.rst +++ b/Documentation/virt/kvm/x86/amd-memory-encryption.rst @@ -89,9 +89,8 @@ context. In a typical workflow, this command should be the first command issued. The firmware can be initialized either by using its own non-volatile storage or the OS can manage the NV storage for the firmware using the module parameter -``init_ex_path``. The file specified by ``init_ex_path`` must exist. To create -a new NV storage file allocate the file with 32KB bytes of 0xFF as required by -the SEV spec. +``init_ex_path``. If the file specified by ``init_ex_path`` does not exist or +is invalid, the OS will create or override the file with output from PSP. Returns: 0 on success, -negative on error diff --git a/Documentation/virt/kvm/x86/mmu.rst b/Documentation/virt/kvm/x86/mmu.rst index 8739120f4300..8364afa228ec 100644 --- a/Documentation/virt/kvm/x86/mmu.rst +++ b/Documentation/virt/kvm/x86/mmu.rst @@ -377,7 +377,7 @@ Emulating cr0.wp ================ If tdp is not enabled, the host must keep cr0.wp=1 so page write protection -works for the guest kernel, not guest guest userspace. When the guest +works for the guest kernel, not guest userspace. When the guest cr0.wp=1, this does not present a problem. However when the guest cr0.wp=0, we cannot map the permissions for gpte.u=1, gpte.w=0 to any spte (the semantics require allowing any guest kernel access plus user read access). diff --git a/Documentation/w1/masters/ds2490.rst b/Documentation/w1/masters/ds2490.rst index 7e5b50f9c0f5..842e7ae80424 100644 --- a/Documentation/w1/masters/ds2490.rst +++ b/Documentation/w1/masters/ds2490.rst @@ -52,7 +52,7 @@ Notes and limitations. clear the entire bulk in buffer. It would be possible to read the maximum buffer size to not run into this error condition, only extra bytes in the buffer is a logic error in the driver. The code should - should match reads and writes as well as data sizes. Reads and + match reads and writes as well as data sizes. Reads and writes are serialized and the status verifies that the chip is idle (and data is available) before the read is executed, so it should not happen. diff --git a/Documentation/w1/w1-generic.rst b/Documentation/w1/w1-generic.rst index da4e8b4e9b01..99255b6d0e53 100644 --- a/Documentation/w1/w1-generic.rst +++ b/Documentation/w1/w1-generic.rst @@ -113,7 +113,7 @@ generally only make sense when searching is disabled, as a search will redetect manually removed devices that are present and timeout manually added devices that aren't on the bus. -Bus searches occur at an interval, specified as a summ of timeout and +Bus searches occur at an interval, specified as a sum of timeout and timeout_us module parameters (either of which may be 0) for as long as w1_master_search remains greater than 0 or is -1. Each search attempt decrements w1_master_search by 1 (down to 0) and increments diff --git a/Documentation/x86/entry_64.rst b/Documentation/x86/entry_64.rst index e433e08f7018..0afdce3c06f4 100644 --- a/Documentation/x86/entry_64.rst +++ b/Documentation/x86/entry_64.rst @@ -33,8 +33,8 @@ Some of these entries are: - interrupt: An array of entries. Every IDT vector that doesn't explicitly point somewhere else gets set to the corresponding value in interrupts. These point to a whole array of - magically-generated functions that make their way to do_IRQ with - the interrupt number as a parameter. + magically-generated functions that make their way to common_interrupt() + with the interrupt number as a parameter. - APIC interrupts: Various special-purpose interrupts for things like TLB shootdown. diff --git a/Documentation/x86/microcode.rst b/Documentation/x86/microcode.rst index a320d37982ed..b627c6f36bcf 100644 --- a/Documentation/x86/microcode.rst +++ b/Documentation/x86/microcode.rst @@ -6,6 +6,7 @@ The Linux Microcode Loader :Authors: - Fenghua Yu <fenghua.yu@intel.com> - Borislav Petkov <bp@suse.de> + - Ashok Raj <ashok.raj@intel.com> The kernel has a x86 microcode loading facility which is supposed to provide microcode loading methods in the OS. Potential use cases are @@ -92,15 +93,8 @@ vendor's site. Late loading ============ -There are two legacy user space interfaces to load microcode, either through -/dev/cpu/microcode or through /sys/devices/system/cpu/microcode/reload file -in sysfs. - -The /dev/cpu/microcode method is deprecated because it needs a special -userspace tool for that. - -The easier method is simply installing the microcode packages your distro -supplies and running:: +You simply install the microcode packages your distro supplies and +run:: # echo 1 > /sys/devices/system/cpu/microcode/reload @@ -110,6 +104,110 @@ The loading mechanism looks for microcode blobs in /lib/firmware/{intel-ucode,amd-ucode}. The default distro installation packages already put them there. +Since kernel 5.19, late loading is not enabled by default. + +The /dev/cpu/microcode method has been removed in 5.19. + +Why is late loading dangerous? +============================== + +Synchronizing all CPUs +---------------------- + +The microcode engine which receives the microcode update is shared +between the two logical threads in a SMT system. Therefore, when +the update is executed on one SMT thread of the core, the sibling +"automatically" gets the update. + +Since the microcode can "simulate" MSRs too, while the microcode update +is in progress, those simulated MSRs transiently cease to exist. This +can result in unpredictable results if the SMT sibling thread happens to +be in the middle of an access to such an MSR. The usual observation is +that such MSR accesses cause #GPs to be raised to signal that former are +not present. + +The disappearing MSRs are just one common issue which is being observed. +Any other instruction that's being patched and gets concurrently +executed by the other SMT sibling, can also result in similar, +unpredictable behavior. + +To eliminate this case, a stop_machine()-based CPU synchronization was +introduced as a way to guarantee that all logical CPUs will not execute +any code but just wait in a spin loop, polling an atomic variable. + +While this took care of device or external interrupts, IPIs including +LVT ones, such as CMCI etc, it cannot address other special interrupts +that can't be shut off. Those are Machine Check (#MC), System Management +(#SMI) and Non-Maskable interrupts (#NMI). + +Machine Checks +-------------- + +Machine Checks (#MC) are non-maskable. There are two kinds of MCEs. +Fatal un-recoverable MCEs and recoverable MCEs. While un-recoverable +errors are fatal, recoverable errors can also happen in kernel context +are also treated as fatal by the kernel. + +On certain Intel machines, MCEs are also broadcast to all threads in a +system. If one thread is in the middle of executing WRMSR, a MCE will be +taken at the end of the flow. Either way, they will wait for the thread +performing the wrmsr(0x79) to rendezvous in the MCE handler and shutdown +eventually if any of the threads in the system fail to check in to the +MCE rendezvous. + +To be paranoid and get predictable behavior, the OS can choose to set +MCG_STATUS.MCIP. Since MCEs can be at most one in a system, if an +MCE was signaled, the above condition will promote to a system reset +automatically. OS can turn off MCIP at the end of the update for that +core. + +System Management Interrupt +--------------------------- + +SMIs are also broadcast to all CPUs in the platform. Microcode update +requests exclusive access to the core before writing to MSR 0x79. So if +it does happen such that, one thread is in WRMSR flow, and the 2nd got +an SMI, that thread will be stopped in the first instruction in the SMI +handler. + +Since the secondary thread is stopped in the first instruction in SMI, +there is very little chance that it would be in the middle of executing +an instruction being patched. Plus OS has no way to stop SMIs from +happening. + +Non-Maskable Interrupts +----------------------- + +When thread0 of a core is doing the microcode update, if thread1 is +pulled into NMI, that can cause unpredictable behavior due to the +reasons above. + +OS can choose a variety of methods to avoid running into this situation. + + +Is the microcode suitable for late loading? +------------------------------------------- + +Late loading is done when the system is fully operational and running +real workloads. Late loading behavior depends on what the base patch on +the CPU is before upgrading to the new patch. + +This is true for Intel CPUs. + +Consider, for example, a CPU has patch level 1 and the update is to +patch level 3. + +Between patch1 and patch3, patch2 might have deprecated a software-visible +feature. + +This is unacceptable if software is even potentially using that feature. +For instance, say MSR_X is no longer available after an update, +accessing that MSR will cause a #GP fault. + +Basically there is no way to declare a new microcode update suitable +for late-loading. This is another one of the problems that caused late +loading to be not enabled by default. + Builtin microcode ================= |
