diff options
| -rw-r--r-- | drivers/gpu/drm/i915/display/skl_watermark.c | 9 |
1 files changed, 0 insertions, 9 deletions
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c index f234a3aa3d15..855bbce889c8 100644 --- a/drivers/gpu/drm/i915/display/skl_watermark.c +++ b/drivers/gpu/drm/i915/display/skl_watermark.c @@ -33,12 +33,6 @@ #include "skl_watermark.h" #include "skl_watermark_regs.h" -/*It is expected that DSB can do posted writes to every register in - * the pipe and planes within 100us. For flip queue use case, the - * recommended DSB execution time is 100us + one SAGV block time. - */ -#define DSB_EXE_TIME 100 - struct intel_dbuf_state { struct intel_global_state base; @@ -2899,9 +2893,6 @@ intel_program_dpkgc_latency(struct intel_atomic_state *state) } if (fixed_refresh_rate) { - added_wake_time = DSB_EXE_TIME + - display->sagv.block_time_us; - latency = skl_watermark_max_latency(display, 1); /* Wa_22020432604 */ |