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-rw-r--r--drivers/gpu/drm/xe/xe_rtp.c16
-rw-r--r--drivers/gpu/drm/xe/xe_rtp.h26
-rw-r--r--drivers/gpu/drm/xe/xe_rtp_types.h9
3 files changed, 27 insertions, 24 deletions
diff --git a/drivers/gpu/drm/xe/xe_rtp.c b/drivers/gpu/drm/xe/xe_rtp.c
index 9e8d0e43c643..d3484b906d4a 100644
--- a/drivers/gpu/drm/xe/xe_rtp.c
+++ b/drivers/gpu/drm/xe/xe_rtp.c
@@ -91,13 +91,13 @@ static void rtp_add_sr_entry(const struct xe_rtp_entry *entry,
u32 mmio_base,
struct xe_reg_sr *sr)
{
- u32 reg = entry->regval.reg + mmio_base;
+ u32 reg = entry->action.reg + mmio_base;
struct xe_reg_sr_entry sr_entry = {
- .clr_bits = entry->regval.clr_bits,
- .set_bits = entry->regval.set_bits,
- .read_mask = entry->regval.read_mask,
- .masked_reg = entry->regval.flags & XE_RTP_FLAG_MASKED_REG,
- .reg_type = entry->regval.reg_type,
+ .clr_bits = entry->action.clr_bits,
+ .set_bits = entry->action.set_bits,
+ .read_mask = entry->action.read_mask,
+ .masked_reg = entry->action.flags & XE_RTP_FLAG_MASKED_REG,
+ .reg_type = entry->action.reg_type,
};
xe_reg_sr_add(sr, reg, &sr_entry);
@@ -124,7 +124,7 @@ void xe_rtp_process(const struct xe_rtp_entry *entries, struct xe_reg_sr *sr,
for (entry = entries; entry && entry->name; entry++) {
u32 mmio_base = 0;
- if (entry->regval.flags & XE_RTP_FLAG_FOREACH_ENGINE) {
+ if (entry->action.flags & XE_RTP_FLAG_FOREACH_ENGINE) {
struct xe_hw_engine *each_hwe;
enum xe_hw_engine_id id;
@@ -135,7 +135,7 @@ void xe_rtp_process(const struct xe_rtp_entry *entries, struct xe_reg_sr *sr,
rtp_add_sr_entry(entry, gt, mmio_base, sr);
}
} else if (rule_matches(gt, hwe, entry)) {
- if (entry->regval.flags & XE_RTP_FLAG_ENGINE_BASE)
+ if (entry->action.flags & XE_RTP_FLAG_ENGINE_BASE)
mmio_base = hwe->mmio_base;
rtp_add_sr_entry(entry, gt, mmio_base, sr);
diff --git a/drivers/gpu/drm/xe/xe_rtp.h b/drivers/gpu/drm/xe/xe_rtp.h
index d4e11fdde77f..d86c6ba92b03 100644
--- a/drivers/gpu/drm/xe/xe_rtp.h
+++ b/drivers/gpu/drm/xe/xe_rtp.h
@@ -199,21 +199,21 @@ struct xe_reg_sr;
* XE_RTP_WR - Helper to write a value to the register, overriding all the bits
* @reg_: Register
* @val_: Value to set
- * @...: Additional fields to override in the struct xe_rtp_regval entry
+ * @...: Additional fields to override in the struct xe_rtp_action entry
*
* The correspondent notation in bspec is:
*
* REGNAME = VALUE
*/
#define XE_RTP_WR(reg_, val_, ...) \
- .regval = { .reg = reg_, .clr_bits = ~0u, .set_bits = (val_), \
+ .action = { .reg = reg_, .clr_bits = ~0u, .set_bits = (val_), \
.read_mask = (~0u), ##__VA_ARGS__ }
/**
* XE_RTP_SET - Set bits from @val_ in the register.
* @reg_: Register
* @val_: Bits to set in the register
- * @...: Additional fields to override in the struct xe_rtp_regval entry
+ * @...: Additional fields to override in the struct xe_rtp_action entry
*
* For masked registers this translates to a single write, while for other
* registers it's a RMW. The correspondent bspec notation is (example for bits 2
@@ -223,14 +223,14 @@ struct xe_reg_sr;
* REGNAME[5] = 1
*/
#define XE_RTP_SET(reg_, val_, ...) \
- .regval = { .reg = reg_, .clr_bits = (val_), .set_bits = (val_), \
+ .action = { .reg = reg_, .clr_bits = (val_), .set_bits = (val_), \
.read_mask = (val_), ##__VA_ARGS__ }
/**
* XE_RTP_CLR: Clear bits from @val_ in the register.
* @reg_: Register
* @val_: Bits to clear in the register
- * @...: Additional fields to override in the struct xe_rtp_regval entry
+ * @...: Additional fields to override in the struct xe_rtp_action entry
*
* For masked registers this translates to a single write, while for other
* registers it's a RMW. The correspondent bspec notation is (example for bits 2
@@ -240,7 +240,7 @@ struct xe_reg_sr;
* REGNAME[5] = 0
*/
#define XE_RTP_CLR(reg_, val_, ...) \
- .regval = { .reg = reg_, .clr_bits = (val_), .set_bits = 0, \
+ .action = { .reg = reg_, .clr_bits = (val_), .set_bits = 0, \
.read_mask = (val_), ##__VA_ARGS__ }
/**
@@ -248,7 +248,7 @@ struct xe_reg_sr;
* @reg_: Register
* @mask_bits_: Mask of bits to be changed in the register, forming a field
* @val_: Value to set in the field denoted by @mask_bits_
- * @...: Additional fields to override in the struct xe_rtp_regval entry
+ * @...: Additional fields to override in the struct xe_rtp_action entry
*
* For masked registers this translates to a single write, while for other
* registers it's a RMW. The correspondent bspec notation is:
@@ -256,25 +256,25 @@ struct xe_reg_sr;
* REGNAME[<end>:<start>] = VALUE
*/
#define XE_RTP_FIELD_SET(reg_, mask_bits_, val_, ...) \
- .regval = { .reg = reg_, .clr_bits = (mask_bits_), .set_bits = (val_),\
+ .action = { .reg = reg_, .clr_bits = (mask_bits_), .set_bits = (val_),\
.read_mask = (mask_bits_), ##__VA_ARGS__ }
#define XE_RTP_FIELD_SET_NO_READ_MASK(reg_, mask_bits_, val_, ...) \
- .regval = { .reg = reg_, .clr_bits = (mask_bits_), .set_bits = (val_),\
+ .action = { .reg = reg_, .clr_bits = (mask_bits_), .set_bits = (val_),\
.read_mask = 0, ##__VA_ARGS__ }
/**
* XE_WHITELIST_REGISTER - Add register to userspace whitelist
* @reg_: Register
* @flags_: Whitelist-specific flags to set
- * @...: Additional fields to override in the struct xe_rtp_regval entry
+ * @...: Additional fields to override in the struct xe_rtp_action entry
*
* Add a register to the whitelist, allowing userspace to modify the ster with
* regular user privileges.
*/
#define XE_WHITELIST_REGISTER(reg_, flags_, ...) \
/* TODO fail build if ((flags) & ~(RING_FORCE_TO_NONPRIV_MASK_VALID)) */\
- .regval = { .reg = reg_, .set_bits = (flags_), \
+ .action = { .reg = reg_, .set_bits = (flags_), \
.clr_bits = RING_FORCE_TO_NONPRIV_MASK_VALID, \
##__VA_ARGS__ }
@@ -287,12 +287,12 @@ struct xe_reg_sr;
#define XE_RTP_NAME(s_) .name = (s_)
/**
- * XE_RTP_FLAG - Helper to add multiple flags to a struct xe_rtp_regval entry
+ * XE_RTP_FLAG - Helper to add multiple flags to a struct xe_rtp_action entry
* @f1_: Last part of a ``XE_RTP_FLAG_*``
* @...: Additional flags, defined like @f1_
*
* Helper to automatically add a ``XE_RTP_FLAG_`` prefix to @f1_ so it can be
- * easily used to define struct xe_rtp_regval entries. Example:
+ * easily used to define struct xe_rtp_action entries. Example:
*
* .. code-block:: c
*
diff --git a/drivers/gpu/drm/xe/xe_rtp_types.h b/drivers/gpu/drm/xe/xe_rtp_types.h
index 630a2ec53fc6..9cd722f310cb 100644
--- a/drivers/gpu/drm/xe/xe_rtp_types.h
+++ b/drivers/gpu/drm/xe/xe_rtp_types.h
@@ -19,9 +19,12 @@ enum {
};
/**
- * struct xe_rtp_regval - register and value for rtp table
+ * struct xe_rtp_action - action to take for any matching rule
+ *
+ * This struct records what action should be taken in a register that has a
+ * matching rule. Example of actions: set/clear bits.
*/
-struct xe_rtp_regval {
+struct xe_rtp_action {
/** @reg: Register */
u32 reg;
/** @clr_bits: bits to clear when updating register */
@@ -93,7 +96,7 @@ struct xe_rtp_rule {
/** struct xe_rtp_entry - Entry in an rtp table */
struct xe_rtp_entry {
const char *name;
- const struct xe_rtp_regval regval;
+ const struct xe_rtp_action action;
const struct xe_rtp_rule *rules;
unsigned int n_rules;
};