diff options
| -rw-r--r-- | drivers/mfd/cros_ec_spi.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/drivers/mfd/cros_ec_spi.c b/drivers/mfd/cros_ec_spi.c index a518832ed5f5..c9714072e224 100644 --- a/drivers/mfd/cros_ec_spi.c +++ b/drivers/mfd/cros_ec_spi.c @@ -45,8 +45,11 @@ * on the other end and need to transfer ~256 bytes, then we need: * 10 us/bit * ~10 bits/byte * ~256 bytes = ~25ms * - * We'll wait 4 times that to handle clock stretching and other - * paranoia. + * We'll wait 8 times that to handle clock stretching and other + * paranoia. Note that some battery gas gauge ICs claim to have a + * clock stretch of 144ms in rare situations. That's incentive for + * not directly passing i2c through, but it's too late for that for + * existing hardware. * * It's pretty unlikely that we'll really see a 249 byte tunnel in * anything other than testing. If this was more common we might @@ -54,7 +57,7 @@ * wait loop. The 'flash write' command would be another candidate * for this, clocking in at 2-3ms. */ -#define EC_MSG_DEADLINE_MS 100 +#define EC_MSG_DEADLINE_MS 200 /* * Time between raising the SPI chip select (for the end of a |