diff options
23 files changed, 100 insertions, 101 deletions
diff --git a/drivers/gpu/drm/omapdrm/omap_connector.c b/drivers/gpu/drm/omapdrm/omap_connector.c index 912759daf562..86f4ead0441d 100644 --- a/drivers/gpu/drm/omapdrm/omap_connector.c +++ b/drivers/gpu/drm/omapdrm/omap_connector.c @@ -37,7 +37,7 @@ struct omap_connector { void copy_timings_omap_to_drm(struct drm_display_mode *mode, struct omap_video_timings *timings) { - mode->clock = timings->pixel_clock; + mode->clock = timings->pixelclock / 1000; mode->hdisplay = timings->x_res; mode->hsync_start = mode->hdisplay + timings->hfp; @@ -68,7 +68,7 @@ void copy_timings_omap_to_drm(struct drm_display_mode *mode, void copy_timings_drm_to_omap(struct omap_video_timings *timings, struct drm_display_mode *mode) { - timings->pixel_clock = mode->clock; + timings->pixelclock = mode->clock * 1000; timings->x_res = mode->hdisplay; timings->hfp = mode->hsync_start - mode->hdisplay; @@ -220,7 +220,7 @@ static int omap_connector_mode_valid(struct drm_connector *connector, if (!r) { /* check if vrefresh is still valid */ new_mode = drm_mode_duplicate(dev, mode); - new_mode->clock = timings.pixel_clock; + new_mode->clock = timings.pixelclock / 1000; new_mode->vrefresh = 0; if (mode->vrefresh == drm_mode_vrefresh(new_mode)) ret = MODE_OK; diff --git a/drivers/video/omap2/displays-new/connector-analog-tv.c b/drivers/video/omap2/displays-new/connector-analog-tv.c index ccd9073f706f..27f33ef8fca1 100644 --- a/drivers/video/omap2/displays-new/connector-analog-tv.c +++ b/drivers/video/omap2/displays-new/connector-analog-tv.c @@ -31,7 +31,7 @@ struct panel_drv_data { static const struct omap_video_timings tvc_pal_timings = { .x_res = 720, .y_res = 574, - .pixel_clock = 13500, + .pixelclock = 13500000, .hsw = 64, .hfp = 12, .hbp = 68, diff --git a/drivers/video/omap2/displays-new/connector-dvi.c b/drivers/video/omap2/displays-new/connector-dvi.c index b6c50904038e..d18e4b8c0731 100644 --- a/drivers/video/omap2/displays-new/connector-dvi.c +++ b/drivers/video/omap2/displays-new/connector-dvi.c @@ -23,7 +23,7 @@ static const struct omap_video_timings dvic_default_timings = { .x_res = 640, .y_res = 480, - .pixel_clock = 23500, + .pixelclock = 23500000, .hfp = 48, .hsw = 32, diff --git a/drivers/video/omap2/displays-new/connector-hdmi.c b/drivers/video/omap2/displays-new/connector-hdmi.c index 9abe2c039ae9..9393e2d6473d 100644 --- a/drivers/video/omap2/displays-new/connector-hdmi.c +++ b/drivers/video/omap2/displays-new/connector-hdmi.c @@ -21,7 +21,7 @@ static const struct omap_video_timings hdmic_default_timings = { .x_res = 640, .y_res = 480, - .pixel_clock = 25175, + .pixelclock = 25175000, .hsw = 96, .hfp = 16, .hbp = 48, diff --git a/drivers/video/omap2/displays-new/panel-dsi-cm.c b/drivers/video/omap2/displays-new/panel-dsi-cm.c index b7baafe83aa3..f317c878a259 100644 --- a/drivers/video/omap2/displays-new/panel-dsi-cm.c +++ b/drivers/video/omap2/displays-new/panel-dsi-cm.c @@ -1184,7 +1184,7 @@ static int dsicm_probe(struct platform_device *pdev) ddata->timings.x_res = 864; ddata->timings.y_res = 480; - ddata->timings.pixel_clock = DIV_ROUND_UP(864 * 480 * 60, 1000); + ddata->timings.pixelclock = 864 * 480 * 60; dssdev = &ddata->dssdev; dssdev->dev = dev; diff --git a/drivers/video/omap2/displays-new/panel-lgphilips-lb035q02.c b/drivers/video/omap2/displays-new/panel-lgphilips-lb035q02.c index 6e8977b18950..2e6b513222d9 100644 --- a/drivers/video/omap2/displays-new/panel-lgphilips-lb035q02.c +++ b/drivers/video/omap2/displays-new/panel-lgphilips-lb035q02.c @@ -23,7 +23,7 @@ static struct omap_video_timings lb035q02_timings = { .x_res = 320, .y_res = 240, - .pixel_clock = 6500, + .pixelclock = 6500000, .hsw = 2, .hfp = 20, diff --git a/drivers/video/omap2/displays-new/panel-nec-nl8048hl11.c b/drivers/video/omap2/displays-new/panel-nec-nl8048hl11.c index bb217da65c5f..996fa004b48c 100644 --- a/drivers/video/omap2/displays-new/panel-nec-nl8048hl11.c +++ b/drivers/video/omap2/displays-new/panel-nec-nl8048hl11.c @@ -40,7 +40,7 @@ struct panel_drv_data { * NEC PIX Clock Ratings * MIN:21.8MHz TYP:23.8MHz MAX:25.7MHz */ -#define LCD_PIXEL_CLOCK 23800 +#define LCD_PIXEL_CLOCK 23800000 static const struct { unsigned char addr; @@ -69,7 +69,7 @@ static const struct { static const struct omap_video_timings nec_8048_panel_timings = { .x_res = LCD_XRES, .y_res = LCD_YRES, - .pixel_clock = LCD_PIXEL_CLOCK, + .pixelclock = LCD_PIXEL_CLOCK, .hfp = 6, .hsw = 1, .hbp = 4, diff --git a/drivers/video/omap2/displays-new/panel-sharp-ls037v7dw01.c b/drivers/video/omap2/displays-new/panel-sharp-ls037v7dw01.c index 72a4fb5aa6b1..b2f710be565d 100644 --- a/drivers/video/omap2/displays-new/panel-sharp-ls037v7dw01.c +++ b/drivers/video/omap2/displays-new/panel-sharp-ls037v7dw01.c @@ -37,7 +37,7 @@ static const struct omap_video_timings sharp_ls_timings = { .x_res = 480, .y_res = 640, - .pixel_clock = 19200, + .pixelclock = 19200000, .hsw = 2, .hfp = 1, diff --git a/drivers/video/omap2/displays-new/panel-sony-acx565akm.c b/drivers/video/omap2/displays-new/panel-sony-acx565akm.c index 8e97d06921ff..27f60ad6b2ab 100644 --- a/drivers/video/omap2/displays-new/panel-sony-acx565akm.c +++ b/drivers/video/omap2/displays-new/panel-sony-acx565akm.c @@ -93,7 +93,7 @@ struct panel_drv_data { static const struct omap_video_timings acx565akm_panel_timings = { .x_res = 800, .y_res = 480, - .pixel_clock = 24000, + .pixelclock = 24000000, .hfp = 28, .hsw = 4, .hbp = 24, diff --git a/drivers/video/omap2/displays-new/panel-tpo-td028ttec1.c b/drivers/video/omap2/displays-new/panel-tpo-td028ttec1.c index 9a08908fe998..fae6adc005a7 100644 --- a/drivers/video/omap2/displays-new/panel-tpo-td028ttec1.c +++ b/drivers/video/omap2/displays-new/panel-tpo-td028ttec1.c @@ -45,7 +45,7 @@ struct panel_drv_data { static struct omap_video_timings td028ttec1_panel_timings = { .x_res = 480, .y_res = 640, - .pixel_clock = 22153, + .pixelclock = 22153000, .hfp = 24, .hsw = 8, .hbp = 8, diff --git a/drivers/video/omap2/displays-new/panel-tpo-td043mtea1.c b/drivers/video/omap2/displays-new/panel-tpo-td043mtea1.c index eadc6529fa3d..875b40263b33 100644 --- a/drivers/video/omap2/displays-new/panel-tpo-td043mtea1.c +++ b/drivers/video/omap2/displays-new/panel-tpo-td043mtea1.c @@ -76,7 +76,7 @@ static const struct omap_video_timings tpo_td043_timings = { .x_res = 800, .y_res = 480, - .pixel_clock = 36000, + .pixelclock = 36000000, .hsw = 1, .hfp = 68, diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c index 1659aa912d2b..b801be4660e9 100644 --- a/drivers/video/omap2/dss/dispc.c +++ b/drivers/video/omap2/dss/dispc.c @@ -2873,7 +2873,7 @@ bool dispc_mgr_timings_ok(enum omap_channel channel, timings_ok = _dispc_mgr_size_ok(timings->x_res, timings->y_res); - timings_ok &= _dispc_mgr_pclk_ok(channel, timings->pixel_clock * 1000); + timings_ok &= _dispc_mgr_pclk_ok(channel, timings->pixelclock); if (dss_mgr_is_lcd(channel)) { timings_ok &= _dispc_lcd_timings_ok(timings->hsw, timings->hfp, @@ -2968,10 +2968,10 @@ void dispc_mgr_set_timings(enum omap_channel channel, xtot = t.x_res + t.hfp + t.hsw + t.hbp; ytot = t.y_res + t.vfp + t.vsw + t.vbp; - ht = (timings->pixel_clock * 1000) / xtot; - vt = (timings->pixel_clock * 1000) / xtot / ytot; + ht = timings->pixelclock / xtot; + vt = timings->pixelclock / xtot / ytot; - DSSDBG("pck %u\n", timings->pixel_clock); + DSSDBG("pck %u\n", timings->pixelclock); DSSDBG("hsw %d hfp %d hbp %d vsw %d vfp %d vbp %d\n", t.hsw, t.hfp, t.hbp, t.vsw, t.vfp, t.vbp); DSSDBG("vsync_level %d hsync_level %d data_pclk_edge %d de_level %d sync_pclk_edge %d\n", diff --git a/drivers/video/omap2/dss/display-sysfs.c b/drivers/video/omap2/dss/display-sysfs.c index f7b5f9561041..5a2095a98ed8 100644 --- a/drivers/video/omap2/dss/display-sysfs.c +++ b/drivers/video/omap2/dss/display-sysfs.c @@ -132,7 +132,7 @@ static ssize_t display_timings_show(struct device *dev, dssdev->driver->get_timings(dssdev, &t); return snprintf(buf, PAGE_SIZE, "%u,%u/%u/%u/%u,%u/%u/%u/%u\n", - t.pixel_clock, + t.pixelclock, t.x_res, t.hfp, t.hbp, t.hsw, t.y_res, t.vfp, t.vbp, t.vsw); } @@ -158,7 +158,7 @@ static ssize_t display_timings_store(struct device *dev, } #endif if (!found && sscanf(buf, "%u,%hu/%hu/%hu/%hu,%hu/%hu/%hu/%hu", - &t.pixel_clock, + &t.pixelclock, &t.x_res, &t.hfp, &t.hbp, &t.hsw, &t.y_res, &t.vfp, &t.vbp, &t.vsw) != 9) return -EINVAL; diff --git a/drivers/video/omap2/dss/display.c b/drivers/video/omap2/dss/display.c index 669a81fdf58e..9f19ae22944c 100644 --- a/drivers/video/omap2/dss/display.c +++ b/drivers/video/omap2/dss/display.c @@ -248,7 +248,7 @@ void videomode_to_omap_video_timings(const struct videomode *vm, { memset(ovt, 0, sizeof(*ovt)); - ovt->pixel_clock = vm->pixelclock / 1000; + ovt->pixelclock = vm->pixelclock; ovt->x_res = vm->hactive; ovt->hbp = vm->hback_porch; ovt->hfp = vm->hfront_porch; @@ -280,7 +280,7 @@ void omap_video_timings_to_videomode(const struct omap_video_timings *ovt, { memset(vm, 0, sizeof(*vm)); - vm->pixelclock = ovt->pixel_clock * 1000; + vm->pixelclock = ovt->pixelclock; vm->hactive = ovt->x_res; vm->hback_porch = ovt->hbp; diff --git a/drivers/video/omap2/dss/dpi.c b/drivers/video/omap2/dss/dpi.c index 7411f2674e16..d806fd50aa94 100644 --- a/drivers/video/omap2/dss/dpi.c +++ b/drivers/video/omap2/dss/dpi.c @@ -307,22 +307,21 @@ static int dpi_set_mode(struct omap_overlay_manager *mgr) int r = 0; if (dpi.dsidev) - r = dpi_set_dsi_clk(mgr->id, t->pixel_clock * 1000, &fck, + r = dpi_set_dsi_clk(mgr->id, t->pixelclock, &fck, &lck_div, &pck_div); else - r = dpi_set_dispc_clk(t->pixel_clock * 1000, &fck, + r = dpi_set_dispc_clk(t->pixelclock, &fck, &lck_div, &pck_div); if (r) return r; - pck = fck / lck_div / pck_div / 1000; + pck = fck / lck_div / pck_div; - if (pck != t->pixel_clock) { - DSSWARN("Could not find exact pixel clock. " - "Requested %d kHz, got %lu kHz\n", - t->pixel_clock, pck); + if (pck != t->pixelclock) { + DSSWARN("Could not find exact pixel clock. Requested %d Hz, got %lu Hz\n", + t->pixelclock, pck); - t->pixel_clock = pck; + t->pixelclock = pck; } dss_mgr_set_timings(mgr, t); @@ -480,17 +479,17 @@ static int dpi_check_timings(struct omap_dss_device *dssdev, if (mgr && !dispc_mgr_timings_ok(mgr->id, timings)) return -EINVAL; - if (timings->pixel_clock == 0) + if (timings->pixelclock == 0) return -EINVAL; if (dpi.dsidev) { - ok = dpi_dsi_clk_calc(timings->pixel_clock * 1000, &ctx); + ok = dpi_dsi_clk_calc(timings->pixelclock, &ctx); if (!ok) return -EINVAL; fck = ctx.dsi_cinfo.dsi_pll_hsdiv_dispc_clk; } else { - ok = dpi_dss_clk_calc(timings->pixel_clock * 1000, &ctx); + ok = dpi_dss_clk_calc(timings->pixelclock, &ctx); if (!ok) return -EINVAL; @@ -500,9 +499,9 @@ static int dpi_check_timings(struct omap_dss_device *dssdev, lck_div = ctx.dispc_cinfo.lck_div; pck_div = ctx.dispc_cinfo.pck_div; - pck = fck / lck_div / pck_div / 1000; + pck = fck / lck_div / pck_div; - timings->pixel_clock = pck; + timings->pixelclock = pck; return 0; } diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c index a820c37e323e..0d82f731d2f0 100644 --- a/drivers/video/omap2/dss/dsi.c +++ b/drivers/video/omap2/dss/dsi.c @@ -4616,7 +4616,7 @@ static void print_dsi_vm(const char *str, static void print_dispc_vm(const char *str, const struct omap_video_timings *t) { - unsigned long pck = t->pixel_clock * 1000; + unsigned long pck = t->pixelclock; int hact, bl, tot; hact = t->x_res; @@ -4656,7 +4656,7 @@ static void print_dsi_dispc_vm(const char *str, dsi_hact = DIV_ROUND_UP(DIV_ROUND_UP(t->hact * t->bitspp, 8) + 6, t->ndl); dsi_htot = t->hss + t->hsa + t->hse + t->hbp + dsi_hact + t->hfp; - vm.pixel_clock = pck / 1000; + vm.pixelclock = pck; vm.hsw = div64_u64((u64)(t->hsa + t->hse) * pck, byteclk); vm.hbp = div64_u64((u64)t->hbp * pck, byteclk); vm.hfp = div64_u64((u64)t->hfp * pck, byteclk); @@ -4678,7 +4678,7 @@ static bool dsi_cm_calc_dispc_cb(int lckd, int pckd, unsigned long lck, ctx->dispc_cinfo.pck = pck; *t = *ctx->config->timings; - t->pixel_clock = pck / 1000; + t->pixelclock = pck; t->x_res = ctx->config->timings->x_res; t->y_res = ctx->config->timings->y_res; t->hsw = t->hfp = t->hbp = t->vsw = 1; @@ -4732,7 +4732,7 @@ static bool dsi_cm_calc(struct dsi_data *dsi, * especially as we go to LP between each pixel packet due to HW * "feature". So let's just estimate very roughly and multiply by 1.5. */ - pck = cfg->timings->pixel_clock * 1000; + pck = cfg->timings->pixelclock; pck = pck * 3 / 2; txbyteclk = pck * bitspp / 8 / ndl; @@ -4909,7 +4909,7 @@ static bool dsi_vm_calc_blanking(struct dsi_clk_calc_ctx *ctx) dispc_vm = &ctx->dispc_vm; *dispc_vm = *req_vm; - dispc_vm->pixel_clock = dispc_pck / 1000; + dispc_vm->pixelclock = dispc_pck; if (cfg->trans_mode == OMAP_DSS_DSI_PULSE_MODE) { hsa = div64_u64((u64)req_vm->hsw * dispc_pck, @@ -5031,9 +5031,9 @@ static bool dsi_vm_calc(struct dsi_data *dsi, ctx->dsi_cinfo.clkin = clkin; /* these limits should come from the panel driver */ - ctx->req_pck_min = t->pixel_clock * 1000 - 1000; - ctx->req_pck_nom = t->pixel_clock * 1000; - ctx->req_pck_max = t->pixel_clock * 1000 + 1000; + ctx->req_pck_min = t->pixelclock - 1000; + ctx->req_pck_nom = t->pixelclock; + ctx->req_pck_max = t->pixelclock + 1000; byteclk_min = div64_u64((u64)ctx->req_pck_min * bitspp, ndl * 8); pll_min = max(cfg->hs_clk_min * 4, byteclk_min * 4 * 4); diff --git a/drivers/video/omap2/dss/hdmi4.c b/drivers/video/omap2/dss/hdmi4.c index 4a74538f9ea5..895c252ae0a8 100644 --- a/drivers/video/omap2/dss/hdmi4.c +++ b/drivers/video/omap2/dss/hdmi4.c @@ -153,7 +153,8 @@ static int hdmi_power_on_full(struct omap_dss_device *dssdev) DSSDBG("hdmi_power_on x_res= %d y_res = %d\n", p->x_res, p->y_res); - phy = p->pixel_clock; + /* the functions below use kHz pixel clock. TODO: change to Hz */ + phy = p->pixelclock / 1000; hdmi_pll_compute(&hdmi.pll, clk_get_rate(hdmi.sys_clk), phy); @@ -238,13 +239,13 @@ static void hdmi_display_set_timing(struct omap_dss_device *dssdev, if (t != NULL) { hdmi.cfg = *t; - dispc_set_tv_pclk(t->timings.pixel_clock * 1000); + dispc_set_tv_pclk(t->timings.pixelclock); } else { hdmi.cfg.timings = *timings; hdmi.cfg.cm.code = 0; hdmi.cfg.cm.mode = HDMI_DVI; - dispc_set_tv_pclk(timings->pixel_clock * 1000); + dispc_set_tv_pclk(timings->pixelclock); } DSSDBG("using mode: %s, code %d\n", hdmi.cfg.cm.mode == HDMI_DVI ? @@ -509,7 +510,7 @@ static int hdmi_audio_config(struct omap_dss_device *dssdev, struct omap_dss_audio *audio) { int r; - u32 pclk = hdmi.cfg.timings.pixel_clock; + u32 pclk = hdmi.cfg.timings.pixelclock; mutex_lock(&hdmi.lock); diff --git a/drivers/video/omap2/dss/hdmi_common.c b/drivers/video/omap2/dss/hdmi_common.c index 0614922902dd..b11afac8e068 100644 --- a/drivers/video/omap2/dss/hdmi_common.c +++ b/drivers/video/omap2/dss/hdmi_common.c @@ -23,91 +23,91 @@ static const struct hdmi_config cea_timings[] = { { - { 640, 480, 25200, 96, 16, 48, 2, 10, 33, + { 640, 480, 25200000, 96, 16, 48, 2, 10, 33, OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, false, }, { 1, HDMI_HDMI }, }, { - { 720, 480, 27027, 62, 16, 60, 6, 9, 30, + { 720, 480, 27027000, 62, 16, 60, 6, 9, 30, OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, false, }, { 2, HDMI_HDMI }, }, { - { 1280, 720, 74250, 40, 110, 220, 5, 5, 20, + { 1280, 720, 74250000, 40, 110, 220, 5, 5, 20, OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, false, }, { 4, HDMI_HDMI }, }, { - { 1920, 540, 74250, 44, 88, 148, 5, 2, 15, + { 1920, 540, 74250000, 44, 88, 148, 5, 2, 15, OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, true, }, { 5, HDMI_HDMI }, }, { - { 1440, 240, 27027, 124, 38, 114, 3, 4, 15, + { 1440, 240, 27027000, 124, 38, 114, 3, 4, 15, OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, true, }, { 6, HDMI_HDMI }, }, { - { 1920, 1080, 148500, 44, 88, 148, 5, 4, 36, + { 1920, 1080, 148500000, 44, 88, 148, 5, 4, 36, OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, false, }, { 16, HDMI_HDMI }, }, { - { 720, 576, 27000, 64, 12, 68, 5, 5, 39, + { 720, 576, 27000000, 64, 12, 68, 5, 5, 39, OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, false, }, { 17, HDMI_HDMI }, }, { - { 1280, 720, 74250, 40, 440, 220, 5, 5, 20, + { 1280, 720, 74250000, 40, 440, 220, 5, 5, 20, OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, false, }, { 19, HDMI_HDMI }, }, { - { 1920, 540, 74250, 44, 528, 148, 5, 2, 15, + { 1920, 540, 74250000, 44, 528, 148, 5, 2, 15, OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, true, }, { 20, HDMI_HDMI }, }, { - { 1440, 288, 27000, 126, 24, 138, 3, 2, 19, + { 1440, 288, 27000000, 126, 24, 138, 3, 2, 19, OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, true, }, { 21, HDMI_HDMI }, }, { - { 1440, 576, 54000, 128, 24, 136, 5, 5, 39, + { 1440, 576, 54000000, 128, 24, 136, 5, 5, 39, OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, false, }, { 29, HDMI_HDMI }, }, { - { 1920, 1080, 148500, 44, 528, 148, 5, 4, 36, + { 1920, 1080, 148500000, 44, 528, 148, 5, 4, 36, OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, false, }, { 31, HDMI_HDMI }, }, { - { 1920, 1080, 74250, 44, 638, 148, 5, 4, 36, + { 1920, 1080, 74250000, 44, 638, 148, 5, 4, 36, OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, false, }, { 32, HDMI_HDMI }, }, { - { 2880, 480, 108108, 248, 64, 240, 6, 9, 30, + { 2880, 480, 108108000, 248, 64, 240, 6, 9, 30, OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, false, }, { 35, HDMI_HDMI }, }, { - { 2880, 576, 108000, 256, 48, 272, 5, 5, 39, + { 2880, 576, 108000000, 256, 48, 272, 5, 5, 39, OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, false, }, { 37, HDMI_HDMI }, @@ -117,121 +117,121 @@ static const struct hdmi_config cea_timings[] = { static const struct hdmi_config vesa_timings[] = { /* VESA From Here */ { - { 640, 480, 25175, 96, 16, 48, 2, 11, 31, + { 640, 480, 25175000, 96, 16, 48, 2, 11, 31, OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, false, }, { 4, HDMI_DVI }, }, { - { 800, 600, 40000, 128, 40, 88, 4, 1, 23, + { 800, 600, 40000000, 128, 40, 88, 4, 1, 23, OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, false, }, { 9, HDMI_DVI }, }, { - { 848, 480, 33750, 112, 16, 112, 8, 6, 23, + { 848, 480, 33750000, 112, 16, 112, 8, 6, 23, OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, false, }, { 0xE, HDMI_DVI }, }, { - { 1280, 768, 79500, 128, 64, 192, 7, 3, 20, + { 1280, 768, 79500000, 128, 64, 192, 7, 3, 20, OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW, false, }, { 0x17, HDMI_DVI }, }, { - { 1280, 800, 83500, 128, 72, 200, 6, 3, 22, + { 1280, 800, 83500000, 128, 72, 200, 6, 3, 22, OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW, false, }, { 0x1C, HDMI_DVI }, }, { - { 1360, 768, 85500, 112, 64, 256, 6, 3, 18, + { 1360, 768, 85500000, 112, 64, 256, 6, 3, 18, OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, false, }, { 0x27, HDMI_DVI }, }, { - { 1280, 960, 108000, 112, 96, 312, 3, 1, 36, + { 1280, 960, 108000000, 112, 96, 312, 3, 1, 36, OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, false, }, { 0x20, HDMI_DVI }, }, { - { 1280, 1024, 108000, 112, 48, 248, 3, 1, 38, + { 1280, 1024, 108000000, 112, 48, 248, 3, 1, 38, OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, false, }, { 0x23, HDMI_DVI }, }, { - { 1024, 768, 65000, 136, 24, 160, 6, 3, 29, + { 1024, 768, 65000000, 136, 24, 160, 6, 3, 29, OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, false, }, { 0x10, HDMI_DVI }, }, { - { 1400, 1050, 121750, 144, 88, 232, 4, 3, 32, + { 1400, 1050, 121750000, 144, 88, 232, 4, 3, 32, OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW, false, }, { 0x2A, HDMI_DVI }, }, { - { 1440, 900, 106500, 152, 80, 232, 6, 3, 25, + { 1440, 900, 106500000, 152, 80, 232, 6, 3, 25, OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW, false, }, { 0x2F, HDMI_DVI }, }, { - { 1680, 1050, 146250, 176 , 104, 280, 6, 3, 30, + { 1680, 1050, 146250000, 176 , 104, 280, 6, 3, 30, OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW, false, }, { 0x3A, HDMI_DVI }, }, { - { 1366, 768, 85500, 143, 70, 213, 3, 3, 24, + { 1366, 768, 85500000, 143, 70, 213, 3, 3, 24, OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, false, }, { 0x51, HDMI_DVI }, }, { - { 1920, 1080, 148500, 44, 148, 80, 5, 4, 36, + { 1920, 1080, 148500000, 44, 148, 80, 5, 4, 36, OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, false, }, { 0x52, HDMI_DVI }, }, { - { 1280, 768, 68250, 32, 48, 80, 7, 3, 12, + { 1280, 768, 68250000, 32, 48, 80, 7, 3, 12, OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH, false, }, { 0x16, HDMI_DVI }, }, { - { 1400, 1050, 101000, 32, 48, 80, 4, 3, 23, + { 1400, 1050, 101000000, 32, 48, 80, 4, 3, 23, OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH, false, }, { 0x29, HDMI_DVI }, }, { - { 1680, 1050, 119000, 32, 48, 80, 6, 3, 21, + { 1680, 1050, 119000000, 32, 48, 80, 6, 3, 21, OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH, false, }, { 0x39, HDMI_DVI }, }, { - { 1280, 800, 79500, 32, 48, 80, 6, 3, 14, + { 1280, 800, 79500000, 32, 48, 80, 6, 3, 14, OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH, false, }, { 0x1B, HDMI_DVI }, }, { - { 1280, 720, 74250, 40, 110, 220, 5, 5, 20, + { 1280, 720, 74250000, 40, 110, 220, 5, 5, 20, OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, false, }, { 0x55, HDMI_DVI }, }, { - { 1920, 1200, 154000, 32, 48, 80, 6, 3, 26, + { 1920, 1200, 154000000, 32, 48, 80, 6, 3, 26, OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH, false, }, { 0x44, HDMI_DVI }, @@ -277,8 +277,8 @@ static bool hdmi_timings_compare(struct omap_video_timings *timing1, { int timing1_vsync, timing1_hsync, timing2_vsync, timing2_hsync; - if ((DIV_ROUND_CLOSEST(timing2->pixel_clock, 1000) == - DIV_ROUND_CLOSEST(timing1->pixel_clock, 1000)) && + if ((DIV_ROUND_CLOSEST(timing2->pixelclock, 1000000) == + DIV_ROUND_CLOSEST(timing1->pixelclock, 1000000)) && (timing2->x_res == timing1->x_res) && (timing2->y_res == timing1->y_res)) { diff --git a/drivers/video/omap2/dss/sdi.c b/drivers/video/omap2/dss/sdi.c index efb9ee9e3c96..800b2bb4ed93 100644 --- a/drivers/video/omap2/dss/sdi.c +++ b/drivers/video/omap2/dss/sdi.c @@ -149,20 +149,19 @@ static int sdi_display_enable(struct omap_dss_device *dssdev) t->data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE; t->sync_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE; - r = sdi_calc_clock_div(t->pixel_clock * 1000, &fck, &dispc_cinfo); + r = sdi_calc_clock_div(t->pixelclock, &fck, &dispc_cinfo); if (r) goto err_calc_clock_div; sdi.mgr_config.clock_info = dispc_cinfo; - pck = fck / dispc_cinfo.lck_div / dispc_cinfo.pck_div / 1000; + pck = fck / dispc_cinfo.lck_div / dispc_cinfo.pck_div; - if (pck != t->pixel_clock) { - DSSWARN("Could not find exact pixel clock. Requested %d kHz, " - "got %lu kHz\n", - t->pixel_clock, pck); + if (pck != t->pixelclock) { + DSSWARN("Could not find exact pixel clock. Requested %d Hz, got %lu Hz\n", + t->pixelclock, pck); - t->pixel_clock = pck; + t->pixelclock = pck; } @@ -244,7 +243,7 @@ static int sdi_check_timings(struct omap_dss_device *dssdev, if (mgr && !dispc_mgr_timings_ok(mgr->id, timings)) return -EINVAL; - if (timings->pixel_clock == 0) + if (timings->pixelclock == 0) return -EINVAL; return 0; diff --git a/drivers/video/omap2/dss/venc.c b/drivers/video/omap2/dss/venc.c index 2cd7f7e42105..59ade34bd536 100644 --- a/drivers/video/omap2/dss/venc.c +++ b/drivers/video/omap2/dss/venc.c @@ -264,7 +264,7 @@ static const struct venc_config venc_config_pal_bdghi = { const struct omap_video_timings omap_dss_pal_timings = { .x_res = 720, .y_res = 574, - .pixel_clock = 13500, + .pixelclock = 13500000, .hsw = 64, .hfp = 12, .hbp = 68, @@ -279,7 +279,7 @@ EXPORT_SYMBOL(omap_dss_pal_timings); const struct omap_video_timings omap_dss_ntsc_timings = { .x_res = 720, .y_res = 482, - .pixel_clock = 13500, + .pixelclock = 13500000, .hsw = 64, .hfp = 16, .hbp = 58, diff --git a/drivers/video/omap2/dss/venc_panel.c b/drivers/video/omap2/dss/venc_panel.c index f7d92c57bd73..af68cd444d7e 100644 --- a/drivers/video/omap2/dss/venc_panel.c +++ b/drivers/video/omap2/dss/venc_panel.c @@ -89,7 +89,7 @@ static int venc_panel_probe(struct omap_dss_device *dssdev) const struct omap_video_timings default_timings = { .x_res = 720, .y_res = 574, - .pixel_clock = 13500, + .pixelclock = 13500000, .hsw = 64, .hfp = 12, .hbp = 68, diff --git a/drivers/video/omap2/omapfb/omapfb-main.c b/drivers/video/omap2/omapfb/omapfb-main.c index fcb9e932d00c..8d02f164c8c6 100644 --- a/drivers/video/omap2/omapfb/omapfb-main.c +++ b/drivers/video/omap2/omapfb/omapfb-main.c @@ -723,8 +723,8 @@ int check_fb_var(struct fb_info *fbi, struct fb_var_screeninfo *var) display->driver->get_timings(display, &timings); /* pixclock in ps, the rest in pixclock */ - var->pixclock = timings.pixel_clock != 0 ? - KHZ2PICOS(timings.pixel_clock) : + var->pixclock = timings.pixelclock != 0 ? + KHZ2PICOS(timings.pixelclock / 1000) : 0; var->left_margin = timings.hbp; var->right_margin = timings.hfp; @@ -2077,7 +2077,7 @@ static int omapfb_mode_to_timings(const char *mode_str, timings->sync_pclk_edge = OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES; } - timings->pixel_clock = PICOS2KHZ(var->pixclock); + timings->pixelclock = PICOS2KHZ(var->pixclock) * 1000; timings->hbp = var->left_margin; timings->hfp = var->right_margin; timings->vbp = var->upper_margin; @@ -2229,7 +2229,7 @@ static void fb_videomode_to_omap_timings(struct fb_videomode *m, t->x_res = m->xres; t->y_res = m->yres; - t->pixel_clock = PICOS2KHZ(m->pixclock); + t->pixelclock = PICOS2KHZ(m->pixclock) * 1000; t->hsw = m->hsync_len; t->hfp = m->right_margin; t->hbp = m->left_margin; diff --git a/include/video/omapdss.h b/include/video/omapdss.h index 1eb9aa605eee..24f3a57022b8 100644 --- a/include/video/omapdss.h +++ b/include/video/omapdss.h @@ -343,8 +343,8 @@ struct omap_video_timings { u16 x_res; /* Unit: pixels */ u16 y_res; - /* Unit: KHz */ - u32 pixel_clock; + /* Unit: Hz */ + u32 pixelclock; /* Unit: pixel clocks */ u16 hsw; /* Horizontal synchronization pulse width */ /* Unit: pixel clocks */ |