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-rw-r--r--arch/arm/boot/dts/omap36xx.dtsi21
-rw-r--r--drivers/cpufreq/ti-cpufreq.c2
2 files changed, 17 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/omap36xx.dtsi b/arch/arm/boot/dts/omap36xx.dtsi
index 2fcd0c5d72ba..c618cb257d00 100644
--- a/arch/arm/boot/dts/omap36xx.dtsi
+++ b/arch/arm/boot/dts/omap36xx.dtsi
@@ -23,6 +23,7 @@
cpu: cpu@0 {
operating-points-v2 = <&cpu0_opp_table>;
+ vbb-supply = <&abb_mpu_iva>;
clock-latency = <300000>; /* From omap-cpufreq driver */
};
};
@@ -37,9 +38,11 @@
/*
* we currently only select the max voltage from table
* Table 4-19 of the DM3730 Data sheet (SPRS685B)
- * Format is: <target min max>
+ * Format is: cpu0-supply: <target min max>
+ * vbb-supply: <target min max>
*/
- opp-microvolt = <1012500 1012500 1012500>;
+ opp-microvolt = <1012500 1012500 1012500>,
+ <1012500 1012500 1012500>;
/*
* first value is silicon revision bit mask
* second one is "speed binned" bit mask
@@ -50,25 +53,33 @@
opp100-600000000 {
opp-hz = /bits/ 64 <600000000>;
- opp-microvolt = <1200000 1200000 1200000>;
+ opp-microvolt = <1200000 1200000 1200000>,
+ <1200000 1200000 1200000>;
opp-supported-hw = <0xffffffff 3>;
};
opp130-800000000 {
opp-hz = /bits/ 64 <800000000>;
- opp-microvolt = <1325000 1325000 1325000>;
+ opp-microvolt = <1325000 1325000 1325000>,
+ <1325000 1325000 1325000>;
opp-supported-hw = <0xffffffff 3>;
};
opp1g-1000000000 {
opp-hz = /bits/ 64 <1000000000>;
- opp-microvolt = <1375000 1375000 1375000>;
+ opp-microvolt = <1375000 1375000 1375000>,
+ <1375000 1375000 1375000>;
/* only on am/dm37x with speed-binned bit set */
opp-supported-hw = <0xffffffff 2>;
turbo-mode;
};
};
+ opp_supply_mpu_iva: opp_supply {
+ compatible = "ti,omap-opp-supply";
+ ti,absolute-max-voltage-uv = <1375000>;
+ };
+
ocp@68000000 {
uart4: serial@49042000 {
compatible = "ti,omap3-uart";
diff --git a/drivers/cpufreq/ti-cpufreq.c b/drivers/cpufreq/ti-cpufreq.c
index a161098652e2..c7e5d3d43118 100644
--- a/drivers/cpufreq/ti-cpufreq.c
+++ b/drivers/cpufreq/ti-cpufreq.c
@@ -175,7 +175,7 @@ static struct ti_cpufreq_soc_data omap36xx_soc_data = {
.efuse_shift = 9,
.efuse_mask = BIT(9),
.rev_offset = OMAP3_CONTROL_IDCODE - OMAP3_SYSCON_BASE,
- .multi_regulator = false,
+ .multi_regulator = true,
};
/**