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-rw-r--r--drivers/net/dsa/microchip/ksz9477_reg.h1
-rw-r--r--drivers/net/dsa/microchip/ksz_common.c54
-rw-r--r--drivers/net/dsa/microchip/ksz_common.h10
-rw-r--r--drivers/net/dsa/microchip/lan937x_main.c18
-rw-r--r--drivers/net/dsa/microchip/lan937x_reg.h1
5 files changed, 69 insertions, 15 deletions
diff --git a/drivers/net/dsa/microchip/ksz9477_reg.h b/drivers/net/dsa/microchip/ksz9477_reg.h
index f23ed4809e47..2649fdf0bae1 100644
--- a/drivers/net/dsa/microchip/ksz9477_reg.h
+++ b/drivers/net/dsa/microchip/ksz9477_reg.h
@@ -1179,7 +1179,6 @@
#define PORT_SGMII_SEL BIT(7)
#define PORT_MII_FULL_DUPLEX BIT(6)
-#define PORT_MII_100MBIT BIT(4)
#define PORT_GRXC_ENABLE BIT(0)
#define REG_PORT_XMII_CTRL_1 0x0301
diff --git a/drivers/net/dsa/microchip/ksz_common.c b/drivers/net/dsa/microchip/ksz_common.c
index 343381102cbf..85392d3b1c2b 100644
--- a/drivers/net/dsa/microchip/ksz_common.c
+++ b/drivers/net/dsa/microchip/ksz_common.c
@@ -257,6 +257,7 @@ static const u16 ksz8795_regs[] = {
[S_START_CTRL] = 0x01,
[S_BROADCAST_CTRL] = 0x06,
[S_MULTICAST_CTRL] = 0x04,
+ [P_XMII_CTRL_0] = 0x06,
[P_XMII_CTRL_1] = 0x56,
};
@@ -282,6 +283,11 @@ static const u32 ksz8795_masks[] = {
[DYNAMIC_MAC_TABLE_TIMESTAMP] = GENMASK(28, 27),
};
+static const u8 ksz8795_xmii_ctrl0[] = {
+ [P_MII_100MBIT] = 0,
+ [P_MII_10MBIT] = 1,
+};
+
static const u8 ksz8795_xmii_ctrl1[] = {
[P_GMII_1GBIT] = 1,
[P_GMII_NOT_1GBIT] = 0,
@@ -357,6 +363,7 @@ static const u16 ksz9477_regs[] = {
[S_START_CTRL] = 0x0300,
[S_BROADCAST_CTRL] = 0x0332,
[S_MULTICAST_CTRL] = 0x0331,
+ [P_XMII_CTRL_0] = 0x0300,
[P_XMII_CTRL_1] = 0x0301,
};
@@ -369,6 +376,11 @@ static const u8 ksz9477_shifts[] = {
[ALU_STAT_INDEX] = 16,
};
+static const u8 ksz9477_xmii_ctrl0[] = {
+ [P_MII_100MBIT] = 1,
+ [P_MII_10MBIT] = 0,
+};
+
static const u8 ksz9477_xmii_ctrl1[] = {
[P_GMII_1GBIT] = 0,
[P_GMII_NOT_1GBIT] = 1,
@@ -400,6 +412,7 @@ const struct ksz_chip_data ksz_switch_chips[] = {
.regs = ksz8795_regs,
.masks = ksz8795_masks,
.shifts = ksz8795_shifts,
+ .xmii_ctrl0 = ksz8795_xmii_ctrl0,
.xmii_ctrl1 = ksz8795_xmii_ctrl1,
.supports_mii = {false, false, false, false, true},
.supports_rmii = {false, false, false, false, true},
@@ -437,6 +450,7 @@ const struct ksz_chip_data ksz_switch_chips[] = {
.regs = ksz8795_regs,
.masks = ksz8795_masks,
.shifts = ksz8795_shifts,
+ .xmii_ctrl0 = ksz8795_xmii_ctrl0,
.xmii_ctrl1 = ksz8795_xmii_ctrl1,
.supports_mii = {false, false, false, false, true},
.supports_rmii = {false, false, false, false, true},
@@ -460,6 +474,7 @@ const struct ksz_chip_data ksz_switch_chips[] = {
.regs = ksz8795_regs,
.masks = ksz8795_masks,
.shifts = ksz8795_shifts,
+ .xmii_ctrl0 = ksz8795_xmii_ctrl0,
.xmii_ctrl1 = ksz8795_xmii_ctrl1,
.supports_mii = {false, false, false, false, true},
.supports_rmii = {false, false, false, false, true},
@@ -503,6 +518,7 @@ const struct ksz_chip_data ksz_switch_chips[] = {
.regs = ksz9477_regs,
.masks = ksz9477_masks,
.shifts = ksz9477_shifts,
+ .xmii_ctrl0 = ksz9477_xmii_ctrl0,
.xmii_ctrl1 = ksz9477_xmii_ctrl1,
.supports_mii = {false, false, false, false,
false, true, false},
@@ -530,6 +546,7 @@ const struct ksz_chip_data ksz_switch_chips[] = {
.regs = ksz9477_regs,
.masks = ksz9477_masks,
.shifts = ksz9477_shifts,
+ .xmii_ctrl0 = ksz9477_xmii_ctrl0,
.xmii_ctrl1 = ksz9477_xmii_ctrl1,
.supports_mii = {false, false, false, false,
false, true, true},
@@ -556,6 +573,7 @@ const struct ksz_chip_data ksz_switch_chips[] = {
.regs = ksz9477_regs,
.masks = ksz9477_masks,
.shifts = ksz9477_shifts,
+ .xmii_ctrl0 = ksz9477_xmii_ctrl0,
.xmii_ctrl1 = ksz8795_xmii_ctrl1, /* Same as ksz8795 */
.supports_mii = {false, false, true},
.supports_rmii = {false, false, true},
@@ -579,6 +597,7 @@ const struct ksz_chip_data ksz_switch_chips[] = {
.regs = ksz9477_regs,
.masks = ksz9477_masks,
.shifts = ksz9477_shifts,
+ .xmii_ctrl0 = ksz9477_xmii_ctrl0,
.xmii_ctrl1 = ksz9477_xmii_ctrl1,
.supports_mii = {false, false, false, false,
false, true, true},
@@ -605,6 +624,7 @@ const struct ksz_chip_data ksz_switch_chips[] = {
.regs = ksz9477_regs,
.masks = lan937x_masks,
.shifts = lan937x_shifts,
+ .xmii_ctrl0 = ksz9477_xmii_ctrl0,
.xmii_ctrl1 = ksz9477_xmii_ctrl1,
.supports_mii = {false, false, false, false, true},
.supports_rmii = {false, false, false, false, true},
@@ -627,6 +647,7 @@ const struct ksz_chip_data ksz_switch_chips[] = {
.regs = ksz9477_regs,
.masks = lan937x_masks,
.shifts = lan937x_shifts,
+ .xmii_ctrl0 = ksz9477_xmii_ctrl0,
.xmii_ctrl1 = ksz9477_xmii_ctrl1,
.supports_mii = {false, false, false, false, true, true},
.supports_rmii = {false, false, false, false, true, true},
@@ -649,6 +670,7 @@ const struct ksz_chip_data ksz_switch_chips[] = {
.regs = ksz9477_regs,
.masks = lan937x_masks,
.shifts = lan937x_shifts,
+ .xmii_ctrl0 = ksz9477_xmii_ctrl0,
.xmii_ctrl1 = ksz9477_xmii_ctrl1,
.supports_mii = {false, false, false, false,
true, true, false, false},
@@ -675,6 +697,7 @@ const struct ksz_chip_data ksz_switch_chips[] = {
.regs = ksz9477_regs,
.masks = lan937x_masks,
.shifts = lan937x_shifts,
+ .xmii_ctrl0 = ksz9477_xmii_ctrl0,
.xmii_ctrl1 = ksz9477_xmii_ctrl1,
.supports_mii = {false, false, false, false,
true, true, false, false},
@@ -701,6 +724,7 @@ const struct ksz_chip_data ksz_switch_chips[] = {
.regs = ksz9477_regs,
.masks = lan937x_masks,
.shifts = lan937x_shifts,
+ .xmii_ctrl0 = ksz9477_xmii_ctrl0,
.xmii_ctrl1 = ksz9477_xmii_ctrl1,
.supports_mii = {false, false, false, false,
true, true, false, false},
@@ -1414,6 +1438,36 @@ void ksz_set_gbit(struct ksz_device *dev, int port, bool gbit)
ksz_pwrite8(dev, port, regs[P_XMII_CTRL_1], data8);
}
+static void ksz_set_100_10mbit(struct ksz_device *dev, int port, int speed)
+{
+ const u8 *bitval = dev->info->xmii_ctrl0;
+ const u16 *regs = dev->info->regs;
+ u8 data8;
+
+ ksz_pread8(dev, port, regs[P_XMII_CTRL_0], &data8);
+
+ data8 &= ~P_MII_100MBIT_M;
+
+ if (speed == SPEED_100)
+ data8 |= FIELD_PREP(P_MII_100MBIT_M, bitval[P_MII_100MBIT]);
+ else
+ data8 |= FIELD_PREP(P_MII_100MBIT_M, bitval[P_MII_10MBIT]);
+
+ /* Write the updated value */
+ ksz_pwrite8(dev, port, regs[P_XMII_CTRL_0], data8);
+}
+
+void ksz_port_set_xmii_speed(struct ksz_device *dev, int port, int speed)
+{
+ if (speed == SPEED_1000)
+ ksz_set_gbit(dev, port, true);
+ else
+ ksz_set_gbit(dev, port, false);
+
+ if (speed == SPEED_100 || speed == SPEED_10)
+ ksz_set_100_10mbit(dev, port, speed);
+}
+
static void ksz_phylink_mac_link_up(struct dsa_switch *ds, int port,
unsigned int mode,
phy_interface_t interface,
diff --git a/drivers/net/dsa/microchip/ksz_common.h b/drivers/net/dsa/microchip/ksz_common.h
index 22f03148be0b..d87dc88d9f20 100644
--- a/drivers/net/dsa/microchip/ksz_common.h
+++ b/drivers/net/dsa/microchip/ksz_common.h
@@ -51,6 +51,7 @@ struct ksz_chip_data {
const u16 *regs;
const u32 *masks;
const u8 *shifts;
+ const u8 *xmii_ctrl0;
const u8 *xmii_ctrl1;
int stp_ctrl_reg;
int broadcast_ctrl_reg;
@@ -170,6 +171,7 @@ enum ksz_regs {
S_START_CTRL,
S_BROADCAST_CTRL,
S_MULTICAST_CTRL,
+ P_XMII_CTRL_0,
P_XMII_CTRL_1,
};
@@ -210,6 +212,11 @@ enum ksz_shifts {
ALU_STAT_INDEX,
};
+enum ksz_xmii_ctrl0 {
+ P_MII_100MBIT,
+ P_MII_10MBIT,
+};
+
enum ksz_xmii_ctrl1 {
P_GMII_1GBIT,
P_GMII_NOT_1GBIT,
@@ -302,6 +309,7 @@ void ksz_r_mib_stats64(struct ksz_device *dev, int port);
void ksz_port_stp_state_set(struct dsa_switch *ds, int port, u8 state);
bool ksz_get_gbit(struct ksz_device *dev, int port);
void ksz_set_gbit(struct ksz_device *dev, int port, bool gbit);
+void ksz_port_set_xmii_speed(struct ksz_device *dev, int port, int speed);
extern const struct ksz_chip_data ksz_switch_chips[];
/* Common register access functions */
@@ -466,6 +474,8 @@ static inline int is_lan937x(struct ksz_device *dev)
#define SW_START 0x01
/* xMII configuration */
+#define P_MII_100MBIT_M BIT(4)
+
#define P_GMII_1GBIT_M BIT(6)
/* Regmap tables generation */
diff --git a/drivers/net/dsa/microchip/lan937x_main.c b/drivers/net/dsa/microchip/lan937x_main.c
index efca96b02e15..c48bae285758 100644
--- a/drivers/net/dsa/microchip/lan937x_main.c
+++ b/drivers/net/dsa/microchip/lan937x_main.c
@@ -346,21 +346,14 @@ static void lan937x_config_interface(struct ksz_device *dev, int port,
int speed, int duplex,
bool tx_pause, bool rx_pause)
{
- u8 xmii_ctrl0, xmii_ctrl1;
+ u8 xmii_ctrl0;
- ksz_pread8(dev, port, REG_PORT_XMII_CTRL_0, &xmii_ctrl0);
- ksz_pread8(dev, port, REG_PORT_XMII_CTRL_1, &xmii_ctrl1);
-
- xmii_ctrl0 &= ~(PORT_MII_100MBIT | PORT_MII_FULL_DUPLEX |
- PORT_MII_TX_FLOW_CTRL | PORT_MII_RX_FLOW_CTRL);
+ ksz_port_set_xmii_speed(dev, port, speed);
- if (speed == SPEED_1000)
- ksz_set_gbit(dev, port, true);
- else
- ksz_set_gbit(dev, port, false);
+ ksz_pread8(dev, port, REG_PORT_XMII_CTRL_0, &xmii_ctrl0);
- if (speed == SPEED_100)
- xmii_ctrl0 |= PORT_MII_100MBIT;
+ xmii_ctrl0 &= ~(PORT_MII_FULL_DUPLEX | PORT_MII_TX_FLOW_CTRL |
+ PORT_MII_RX_FLOW_CTRL);
if (duplex)
xmii_ctrl0 |= PORT_MII_FULL_DUPLEX;
@@ -372,7 +365,6 @@ static void lan937x_config_interface(struct ksz_device *dev, int port,
xmii_ctrl0 |= PORT_MII_RX_FLOW_CTRL;
ksz_pwrite8(dev, port, REG_PORT_XMII_CTRL_0, xmii_ctrl0);
- ksz_pwrite8(dev, port, REG_PORT_XMII_CTRL_1, xmii_ctrl1);
}
void lan937x_phylink_get_caps(struct ksz_device *dev, int port,
diff --git a/drivers/net/dsa/microchip/lan937x_reg.h b/drivers/net/dsa/microchip/lan937x_reg.h
index 747295d34411..b9364f6a4f8f 100644
--- a/drivers/net/dsa/microchip/lan937x_reg.h
+++ b/drivers/net/dsa/microchip/lan937x_reg.h
@@ -135,7 +135,6 @@
#define PORT_SGMII_SEL BIT(7)
#define PORT_MII_FULL_DUPLEX BIT(6)
#define PORT_MII_TX_FLOW_CTRL BIT(5)
-#define PORT_MII_100MBIT BIT(4)
#define PORT_MII_RX_FLOW_CTRL BIT(3)
#define PORT_GRXC_ENABLE BIT(0)
generated by cgit v1.2.3 (git 2.39.0) at 2025-02-07 14:44:53 +0300