diff options
-rw-r--r-- | drivers/gpu/drm/nouveau/include/nvif/class.h | 11 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/include/nvif/ioctl.h | 8 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_abi16.c | 16 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_chan.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_sysfs.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/pm/base.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/sw/gf100.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/sw/nv04.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/sw/nv10.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/sw/nv50.c | 4 |
11 files changed, 28 insertions, 31 deletions
diff --git a/drivers/gpu/drm/nouveau/include/nvif/class.h b/drivers/gpu/drm/nouveau/include/nvif/class.h index 95a64d89547c..8bf8161f9730 100644 --- a/drivers/gpu/drm/nouveau/include/nvif/class.h +++ b/drivers/gpu/drm/nouveau/include/nvif/class.h @@ -1,9 +1,14 @@ #ifndef __NVIF_CLASS_H__ #define __NVIF_CLASS_H__ -/******************************************************************************* - * class identifiers - ******************************************************************************/ +/* these class numbers are made up by us, and not nvidia-assigned */ +#define NVIF_CLASS_CONTROL -1 +#define NVIF_CLASS_PERFMON -2 +#define NVIF_CLASS_PERFDOM -3 +#define NVIF_CLASS_SW_NV04 -4 +#define NVIF_CLASS_SW_NV10 -5 +#define NVIF_CLASS_SW_NV50 -6 +#define NVIF_CLASS_SW_GF100 -7 /* the below match nvidia-assigned (either in hw, or sw) class numbers */ #define NV_DEVICE 0x00000080 diff --git a/drivers/gpu/drm/nouveau/include/nvif/ioctl.h b/drivers/gpu/drm/nouveau/include/nvif/ioctl.h index b0ac0215ebf9..c5f5eb83a594 100644 --- a/drivers/gpu/drm/nouveau/include/nvif/ioctl.h +++ b/drivers/gpu/drm/nouveau/include/nvif/ioctl.h @@ -55,14 +55,6 @@ struct nvif_ioctl_new_v0 { __u64 token; __u64 object; __u32 handle; -/* these class numbers are made up by us, and not nvidia-assigned */ -#define NVIF_IOCTL_NEW_V0_CONTROL -1 -#define NVIF_IOCTL_NEW_V0_PERFMON -2 -#define NVIF_IOCTL_NEW_V0_PERFDOM -3 -#define NVIF_IOCTL_NEW_V0_SW_NV04 -4 -#define NVIF_IOCTL_NEW_V0_SW_NV10 -5 -#define NVIF_IOCTL_NEW_V0_SW_NV50 -6 -#define NVIF_IOCTL_NEW_V0_SW_GF100 -7 __s32 oclass; __u8 data[]; /* class data (class.h) */ }; diff --git a/drivers/gpu/drm/nouveau/nouveau_abi16.c b/drivers/gpu/drm/nouveau/nouveau_abi16.c index 7f50cf5f929e..a6afeaf17f15 100644 --- a/drivers/gpu/drm/nouveau/nouveau_abi16.c +++ b/drivers/gpu/drm/nouveau/nouveau_abi16.c @@ -87,18 +87,18 @@ nouveau_abi16_swclass(struct nouveau_drm *drm) { switch (drm->device.info.family) { case NV_DEVICE_INFO_V0_TNT: - return NVIF_IOCTL_NEW_V0_SW_NV04; + return NVIF_CLASS_SW_NV04; case NV_DEVICE_INFO_V0_CELSIUS: case NV_DEVICE_INFO_V0_KELVIN: case NV_DEVICE_INFO_V0_RANKINE: case NV_DEVICE_INFO_V0_CURIE: - return NVIF_IOCTL_NEW_V0_SW_NV10; + return NVIF_CLASS_SW_NV10; case NV_DEVICE_INFO_V0_TESLA: - return NVIF_IOCTL_NEW_V0_SW_NV50; + return NVIF_CLASS_SW_NV50; case NV_DEVICE_INFO_V0_FERMI: case NV_DEVICE_INFO_V0_KEPLER: case NV_DEVICE_INFO_V0_MAXWELL: - return NVIF_IOCTL_NEW_V0_SW_GF100; + return NVIF_CLASS_SW_GF100; } return 0x0000; @@ -433,10 +433,10 @@ nouveau_abi16_ioctl_grobj_alloc(ABI16_IOCTL_ARGS) /* nvsw: compatibility with older 0x*6e class identifier */ for (i = 0; !oclass && i < ret; i++) { switch (sclass[i].oclass) { - case NVIF_IOCTL_NEW_V0_SW_NV04: - case NVIF_IOCTL_NEW_V0_SW_NV10: - case NVIF_IOCTL_NEW_V0_SW_NV50: - case NVIF_IOCTL_NEW_V0_SW_GF100: + case NVIF_CLASS_SW_NV04: + case NVIF_CLASS_SW_NV10: + case NVIF_CLASS_SW_NV50: + case NVIF_CLASS_SW_GF100: oclass = sclass[i].oclass; break; default: diff --git a/drivers/gpu/drm/nouveau/nouveau_chan.c b/drivers/gpu/drm/nouveau/nouveau_chan.c index 1860f389f21f..0a853ad5a21f 100644 --- a/drivers/gpu/drm/nouveau/nouveau_chan.c +++ b/drivers/gpu/drm/nouveau/nouveau_chan.c @@ -378,7 +378,7 @@ nouveau_channel_init(struct nouveau_channel *chan, u32 vram, u32 gart) /* allocate software object class (used for fences on <= nv05) */ if (device->info.family < NV_DEVICE_INFO_V0_CELSIUS) { ret = nvif_object_init(&chan->user, 0x006e, - NVIF_IOCTL_NEW_V0_SW_NV04, + NVIF_CLASS_SW_NV04, NULL, 0, &chan->nvsw); if (ret) return ret; diff --git a/drivers/gpu/drm/nouveau/nouveau_sysfs.c b/drivers/gpu/drm/nouveau/nouveau_sysfs.c index 5dac3546c1b8..87f6416a8c82 100644 --- a/drivers/gpu/drm/nouveau/nouveau_sysfs.c +++ b/drivers/gpu/drm/nouveau/nouveau_sysfs.c @@ -188,7 +188,7 @@ nouveau_sysfs_init(struct drm_device *dev) if (!sysfs) return -ENOMEM; - ret = nvif_object_init(&device->object, 0, NVIF_IOCTL_NEW_V0_CONTROL, + ret = nvif_object_init(&device->object, 0, NVIF_CLASS_CONTROL, NULL, 0, &sysfs->ctrl); if (ret == 0) device_create_file(nvxx_device(device)->dev, &dev_attr_pstate); diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c index cf8bc068e9b7..93b29caed07e 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c @@ -204,7 +204,7 @@ nvkm_control_new(struct nvkm_device *device, const struct nvkm_oclass *oclass, const struct nvkm_device_oclass nvkm_control_oclass = { - .base.oclass = NVIF_IOCTL_NEW_V0_CONTROL, + .base.oclass = NVIF_CLASS_CONTROL, .base.minver = -1, .base.maxver = -1, .ctor = nvkm_control_new, diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/pm/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/pm/base.c index 2721592d3031..808a23914c4d 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/pm/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/pm/base.c @@ -612,7 +612,7 @@ nvkm_perfmon_child_get(struct nvkm_object *object, int index, struct nvkm_oclass *oclass) { if (index == 0) { - oclass->base.oclass = NVIF_IOCTL_NEW_V0_PERFDOM; + oclass->base.oclass = NVIF_CLASS_PERFDOM; oclass->base.minver = 0; oclass->base.maxver = 0; oclass->ctor = nvkm_perfmon_child_new; @@ -679,7 +679,7 @@ nvkm_pm_oclass_new(struct nvkm_device *device, const struct nvkm_oclass *oclass, static const struct nvkm_device_oclass nvkm_pm_oclass = { - .base.oclass = NVIF_IOCTL_NEW_V0_PERFMON, + .base.oclass = NVIF_CLASS_PERFMON, .base.minver = -1, .base.maxver = -1, .ctor = nvkm_pm_oclass_new, diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/sw/gf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/sw/gf100.c index b01ef7eca906..ea8f4247b628 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/sw/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/sw/gf100.c @@ -28,8 +28,8 @@ #include <engine/disp.h> #include <engine/fifo.h> +#include <nvif/class.h> #include <nvif/event.h> -#include <nvif/ioctl.h> /******************************************************************************* * software context @@ -143,7 +143,7 @@ static const struct nvkm_sw_func gf100_sw = { .chan_new = gf100_sw_chan_new, .sclass = { - { nvkm_nvsw_new, { -1, -1, NVIF_IOCTL_NEW_V0_SW_GF100 } }, + { nvkm_nvsw_new, { -1, -1, NVIF_CLASS_SW_GF100 } }, {} } }; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv04.c b/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv04.c index 445217ffa791..2405116bffc7 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv04.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv04.c @@ -126,7 +126,7 @@ static const struct nvkm_sw_func nv04_sw = { .chan_new = nv04_sw_chan_new, .sclass = { - { nv04_nvsw_new, { -1, -1, NVIF_IOCTL_NEW_V0_SW_NV04 } }, + { nv04_nvsw_new, { -1, -1, NVIF_CLASS_SW_NV04 } }, {} } }; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv10.c b/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv10.c index adf70d92b244..09d22fcd194c 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv10.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv10.c @@ -25,7 +25,7 @@ #include "chan.h" #include "nvsw.h" -#include <nvif/ioctl.h> +#include <nvif/class.h> /******************************************************************************* * software context @@ -56,7 +56,7 @@ static const struct nvkm_sw_func nv10_sw = { .chan_new = nv10_sw_chan_new, .sclass = { - { nvkm_nvsw_new, { -1, -1, NVIF_IOCTL_NEW_V0_SW_NV10 } }, + { nvkm_nvsw_new, { -1, -1, NVIF_CLASS_SW_NV10 } }, {} } }; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv50.c index a381196af69d..01573d187f2c 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv50.c @@ -28,8 +28,8 @@ #include <engine/fifo/chan.h> #include <subdev/bar.h> +#include <nvif/class.h> #include <nvif/event.h> -#include <nvif/ioctl.h> /******************************************************************************* * software context @@ -136,7 +136,7 @@ static const struct nvkm_sw_func nv50_sw = { .chan_new = nv50_sw_chan_new, .sclass = { - { nvkm_nvsw_new, { -1, -1, NVIF_IOCTL_NEW_V0_SW_NV50 } }, + { nvkm_nvsw_new, { -1, -1, NVIF_CLASS_SW_NV50 } }, {} } }; |