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-rw-r--r--arch/powerpc/include/asm/exception-64s.h3
-rw-r--r--arch/powerpc/kernel/exceptions-64s.S12
2 files changed, 1 insertions, 14 deletions
diff --git a/arch/powerpc/include/asm/exception-64s.h b/arch/powerpc/include/asm/exception-64s.h
index 1a9afded909f..c2606715cfff 100644
--- a/arch/powerpc/include/asm/exception-64s.h
+++ b/arch/powerpc/include/asm/exception-64s.h
@@ -52,7 +52,6 @@
#ifdef CONFIG_RELOCATABLE
#define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
- ld r12,PACAKBASE(r13); /* get high part of &label */ \
mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
LOAD_HANDLER(r12,label); \
mtctr r12; \
@@ -90,6 +89,7 @@
* that kernelbase be 64K aligned.
*/
#define LOAD_HANDLER(reg, label) \
+ ld reg,PACAKBASE(r13); /* get high part of &label */ \
ori reg,reg,(label)-_stext; /* virt addr of handler ... */
/* Exception register prefixes */
@@ -175,7 +175,6 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
__EXCEPTION_PROLOG_1(area, extra, vec)
#define __EXCEPTION_PROLOG_PSERIES_1(label, h) \
- ld r12,PACAKBASE(r13); /* get high part of &label */ \
ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \
mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
LOAD_HANDLER(r12,label) \
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
index 0a6a683190af..21ab5dd54e1e 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -41,7 +41,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE) \
#define SYSCALL_PSERIES_2_RFID \
mfspr r12,SPRN_SRR1 ; \
- ld r10,PACAKBASE(r13) ; \
LOAD_HANDLER(r10, system_call_entry) ; \
mtspr SPRN_SRR0,r10 ; \
ld r10,PACAKMSR(r13) ; \
@@ -64,7 +63,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE) \
*/
#define SYSCALL_PSERIES_2_DIRECT \
mflr r10 ; \
- ld r12,PACAKBASE(r13) ; \
LOAD_HANDLER(r12, system_call_entry) ; \
mtctr r12 ; \
mfspr r12,SPRN_SRR1 ; \
@@ -185,7 +183,6 @@ data_access_slb_pSeries:
* the kernel ends up being put.
*/
mfctr r11
- ld r10,PACAKBASE(r13)
LOAD_HANDLER(r10, slb_miss_realmode)
mtctr r10
bctr
@@ -207,7 +204,6 @@ instruction_access_slb_pSeries:
b slb_miss_realmode
#else
mfctr r11
- ld r10,PACAKBASE(r13)
LOAD_HANDLER(r10, slb_miss_realmode)
mtctr r10
bctr
@@ -459,7 +455,6 @@ BEGIN_FTR_SECTION
mfmsr r11 /* get MSR value */
ori r11,r11,MSR_ME /* turn on ME bit */
ori r11,r11,MSR_RI /* turn on RI bit */
- ld r12,PACAKBASE(r13) /* get high part of &label */
LOAD_HANDLER(r12, machine_check_handle_early)
1: mtspr SPRN_SRR0,r12
mtspr SPRN_SRR1,r11
@@ -472,7 +467,6 @@ BEGIN_FTR_SECTION
*/
addi r1,r1,INT_FRAME_SIZE /* go back to previous stack frame */
ld r11,PACAKMSR(r13)
- ld r12,PACAKBASE(r13)
LOAD_HANDLER(r12, unrecover_mce)
li r10,MSR_ME
andc r11,r11,r10 /* Turn off MSR_ME */
@@ -493,7 +487,6 @@ machine_check_pSeries_0:
* used, so nested machine check corrupts it. machine_check_common
* enables MSR_RI.
*/
- ld r12,PACAKBASE(r13)
ld r10,PACAKMSR(r13)
xori r10,r10,MSR_RI
mfspr r11,SPRN_SRR0
@@ -795,7 +788,6 @@ data_access_slb_relon_pSeries:
* the kernel ends up being put.
*/
mfctr r11
- ld r10,PACAKBASE(r13)
LOAD_HANDLER(r10, slb_miss_realmode)
mtctr r10
bctr
@@ -816,7 +808,6 @@ instruction_access_slb_relon_pSeries:
b slb_miss_realmode
#else
mfctr r11
- ld r10,PACAKBASE(r13)
LOAD_HANDLER(r10, slb_miss_realmode)
mtctr r10
bctr
@@ -1357,7 +1348,6 @@ machine_check_handle_early:
andi. r11,r12,MSR_RI
bne 2f
1: mfspr r11,SPRN_SRR0
- ld r10,PACAKBASE(r13)
LOAD_HANDLER(r10,unrecover_mce)
mtspr SPRN_SRR0,r10
ld r10,PACAKMSR(r13)
@@ -1461,7 +1451,6 @@ END_MMU_FTR_SECTION_IFCLR(MMU_FTR_TYPE_RADIX)
b . /* prevent speculative execution */
2: mfspr r11,SPRN_SRR0
- ld r10,PACAKBASE(r13)
LOAD_HANDLER(r10,unrecov_slb)
mtspr SPRN_SRR0,r10
ld r10,PACAKMSR(r13)
@@ -1478,7 +1467,6 @@ unrecov_slb:
b 1b
8: mfspr r11,SPRN_SRR0
- ld r10,PACAKBASE(r13)
LOAD_HANDLER(r10,bad_addr_slb)
mtspr SPRN_SRR0,r10
ld r10,PACAKMSR(r13)