diff options
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_drv.c | 3 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_kms.c | 13 | ||||
| -rw-r--r-- | include/drm/radeon_drm.h | 2 |
3 files changed, 17 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c index 498d21d50ba3..ef7bb3f6ecae 100644 --- a/drivers/gpu/drm/radeon/radeon_drv.c +++ b/drivers/gpu/drm/radeon/radeon_drv.c @@ -56,9 +56,10 @@ * 2.12.0 - RADEON_CS_KEEP_TILING_FLAGS * 2.13.0 - virtual memory support, streamout * 2.14.0 - add evergreen tiling informations + * 2.15.0 - add max_pipes query */ #define KMS_DRIVER_MAJOR 2 -#define KMS_DRIVER_MINOR 14 +#define KMS_DRIVER_MINOR 15 #define KMS_DRIVER_PATCHLEVEL 0 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); int radeon_driver_unload_kms(struct drm_device *dev); diff --git a/drivers/gpu/drm/radeon/radeon_kms.c b/drivers/gpu/drm/radeon/radeon_kms.c index 1986ebae1ef2..72d70eb04a17 100644 --- a/drivers/gpu/drm/radeon/radeon_kms.c +++ b/drivers/gpu/drm/radeon/radeon_kms.c @@ -264,6 +264,19 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) return -EINVAL; value = RADEON_IB_VM_MAX_SIZE; break; + case RADEON_INFO_MAX_PIPES: + if (rdev->family >= CHIP_CAYMAN) + value = rdev->config.cayman.max_pipes_per_simd; + else if (rdev->family >= CHIP_CEDAR) + value = rdev->config.evergreen.max_pipes; + else if (rdev->family >= CHIP_RV770) + value = rdev->config.rv770.max_pipes; + else if (rdev->family >= CHIP_R600) + value = rdev->config.r600.max_pipes; + else { + return -EINVAL; + } + break; default: DRM_DEBUG_KMS("Invalid request %d\n", info->request); return -EINVAL; diff --git a/include/drm/radeon_drm.h b/include/drm/radeon_drm.h index cb2f0c362a13..6cde931d8e68 100644 --- a/include/drm/radeon_drm.h +++ b/include/drm/radeon_drm.h @@ -962,6 +962,8 @@ struct drm_radeon_cs { #define RADEON_INFO_VA_START 0x0e /* maximum size of ib using the virtual memory cs */ #define RADEON_INFO_IB_VM_MAX_SIZE 0x0f +/* max pipes - needed for compute shaders */ +#define RADEON_INFO_MAX_PIPES 0x10 struct drm_radeon_info { uint32_t request; |