diff options
| -rw-r--r-- | arch/arm/Kconfig | 18 | ||||
| -rw-r--r-- | arch/arm/mm/proc-v7.S | 11 |
2 files changed, 29 insertions, 0 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index ed275aa293e5..1be1022c21e8 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1210,6 +1210,24 @@ config ARM_ERRATA_821420 one is in the shadow of a branch or abort, can lead to a deadlock when the VMOV instructions are issued out-of-order. +config ARM_ERRATA_825619 + bool "ARM errata: A12: DMB NSHST/ISHST mixed ... might cause deadlock" + depends on CPU_V7 + help + This option enables the workaround for the 825619 Cortex-A12 + (all revs) erratum. Within rare timing constraints, executing a + DMB NSHST or DMB ISHST instruction followed by a mix of Cacheable + and Device/Strongly-Ordered loads and stores might cause deadlock + +config ARM_ERRATA_852421 + bool "ARM errata: A17: DMB ST might fail to create order between stores" + depends on CPU_V7 + help + This option enables the workaround for the 852421 Cortex-A17 + (r1p0, r1p1, r1p2) erratum. Under very rare timing conditions, + execution of a DMB ST instruction might fail to properly order + stores from GroupA and stores from GroupB. + config ARM_ERRATA_852423 bool "ARM errata: A17: some seqs of opposed cond code instrs => deadlock or corruption" depends on CPU_V7 diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index eefc10ff8e7e..a7123b4e129d 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -373,9 +373,20 @@ __ca12_errata: orr r10, r10, #1 << 1 @ set bit #1 mcr p15, 0, r10, c15, c0, 2 @ write internal feature reg #endif +#ifdef CONFIG_ARM_ERRATA_825619 + mrc p15, 0, r10, c15, c0, 1 @ read diagnostic register + orr r10, r10, #1 << 24 @ set bit #24 + mcr p15, 0, r10, c15, c0, 1 @ write diagnostic register +#endif b __errata_finish __ca17_errata: +#ifdef CONFIG_ARM_ERRATA_852421 + cmp r6, #0x12 @ only present up to r1p2 + mrcle p15, 0, r10, c15, c0, 1 @ read diagnostic register + orrle r10, r10, #1 << 24 @ set bit #24 + mcrle p15, 0, r10, c15, c0, 1 @ write diagnostic register +#endif #ifdef CONFIG_ARM_ERRATA_852423 cmp r6, #0x12 @ only present up to r1p2 mrcle p15, 0, r10, c15, c0, 1 @ read diagnostic register |